WAsm SIMD variants of F32 MAXPOOL microkernels

PiperOrigin-RevId: 320332301

9 files changed, 2195 insertions, 7 deletions

diff --git a/BUILD.bazel b/BUILD.bazel
index 80cf46cbe..9e22c0aa2 100644
--- a/BUILD.bazel
+++ b/BUILD.bazel
@@ -649,6 +649,8 @@ WASMSIMD_UKERNELS = [
     "src/f32-hswish/gen/wasmsimd-x86-x4.c",
     "src/f32-hswish/gen/wasmsimd-x86-x8.c",
     "src/f32-hswish/gen/wasmsimd-x86-x16.c",
+    "src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c",
+    "src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c",
     "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c",
     "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c",
     "src/f32-prelu/gen/wasmsimd-minmax-2x4.c",
diff --git a/src/f32-maxpool/9p8x-minmax-neon-c4.c b/src/f32-maxpool/9p8x-minmax-neon-c4.c
index 702572af1..b79677b43 100644
--- a/src/f32-maxpool/9p8x-minmax-neon-c4.c
+++ b/src/f32-maxpool/9p8x-minmax-neon-c4.c
@@ -10,7 +10,7 @@
 #include <xnnpack/maxpool.h>
 
 
-XNN_DISABLE_TSAN void xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4(
+void xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4(
     size_t output_pixels,
     size_t kernel_elements,
     size_t channels,
diff --git a/src/f32-maxpool/9p8x-minmax-psimd-c4.c b/src/f32-maxpool/9p8x-minmax-psimd-c4.c
index 72c7d6ce7..7a7d04eb7 100644
--- a/src/f32-maxpool/9p8x-minmax-psimd-c4.c
+++ b/src/f32-maxpool/9p8x-minmax-psimd-c4.c
@@ -10,7 +10,7 @@
 #include <xnnpack/maxpool.h>
 
 
-XNN_DISABLE_TSAN void xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4(
+void xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4(
     size_t output_pixels,
     size_t kernel_elements,
     size_t channels,
diff --git a/src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c b/src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c
new file mode 100644
index 000000000..fef55b4a7
--- /dev/null
+++ b/src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c
@@ -0,0 +1,258 @@
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <wasm_simd128.h>
+
+#include <xnnpack/maxpool.h>
+
+
+void xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4(
+    size_t output_pixels,
+    size_t kernel_elements,
+    size_t channels,
+    const float** input,
+    size_t input_offset,
+    float* output,
+    size_t input_increment,
+    size_t output_increment,
+    const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+{
+  assert(output_pixels != 0);
+  assert(kernel_elements != 0);
+  assert(channels != 0);
+
+  const v128_t voutput_max = wasm_v32x4_load_splat(&params->scalar.max);
+  const v128_t voutput_min = wasm_v32x4_load_splat(&params->scalar.min);
+  do {
+    float* o = output;
+    {
+      const float* i0 = *input++;
+      const float* i1 = *input++;
+      const float* i2 = *input++;
+      const float* i3 = *input++;
+      const float* i4 = *input++;
+      const float* i5 = *input++;
+      const float* i6 = *input++;
+      const float* i7 = *input++;
+      const float* i8 = *input++;
+      i0 = (const float*) ((uintptr_t) i0 + input_offset);
+      i1 = (const float*) ((uintptr_t) i1 + input_offset);
+      i2 = (const float*) ((uintptr_t) i2 + input_offset);
+      i3 = (const float*) ((uintptr_t) i3 + input_offset);
+      i4 = (const float*) ((uintptr_t) i4 + input_offset);
+      i5 = (const float*) ((uintptr_t) i5 + input_offset);
+      i6 = (const float*) ((uintptr_t) i6 + input_offset);
+      i7 = (const float*) ((uintptr_t) i7 + input_offset);
+      i8 = (const float*) ((uintptr_t) i8 + input_offset);
+      if (kernel_elements < 2) {
+        i1 = i0;
+      }
+      if (kernel_elements <= 2) {
+        i2 = i0;
+      }
+      if (kernel_elements < 4) {
+        i3 = i0;
+      }
+      if (kernel_elements <= 4) {
+        i4 = i0;
+      }
+      if (kernel_elements < 6) {
+        i5 = i0;
+      }
+      if (kernel_elements <= 6) {
+        i6 = i0;
+      }
+      if (kernel_elements < 8) {
+        i7 = i0;
+      }
+      if (kernel_elements <= 8) {
+        i8 = i0;
+      }
+
+      size_t c = channels;
+      for (; c >= 4; c -= 4) {
+        const v128_t vi0 = wasm_v128_load(i0);
+        i0 += 4;
+        const v128_t vi1 = wasm_v128_load(i1);
+        i1 += 4;
+        const v128_t vi2 = wasm_v128_load(i2);
+        i2 += 4;
+        const v128_t vi3 = wasm_v128_load(i3);
+        i3 += 4;
+        const v128_t vi4 = wasm_v128_load(i4);
+        i4 += 4;
+        const v128_t vi5 = wasm_v128_load(i5);
+        i5 += 4;
+        const v128_t vi6 = wasm_v128_load(i6);
+        i6 += 4;
+        const v128_t vi7 = wasm_v128_load(i7);
+        i7 += 4;
+        const v128_t vi8 = wasm_v128_load(i8);
+        i8 += 4;
+
+        const v128_t vmax018 = wasm_f32x4_max(wasm_f32x4_max(vi0, vi1), vi8);
+        const v128_t vmax23 = wasm_f32x4_max(vi2, vi3);
+        const v128_t vmax45 = wasm_f32x4_max(vi4, vi5);
+        const v128_t vmax67 = wasm_f32x4_max(vi6, vi7);
+
+        const v128_t vmax2345 = wasm_f32x4_max(vmax23, vmax45);
+        const v128_t vmax01678 = wasm_f32x4_max(vmax018, vmax67);
+        const v128_t vmax = wasm_f32x4_max(vmax2345, vmax01678);
+        const v128_t vout = wasm_f32x4_max(wasm_f32x4_min(vmax, voutput_max), voutput_min);
+
+        wasm_v128_store(o, vout);
+        o += 4;
+      }
+      if (c != 0) {
+        const v128_t vi0 = wasm_v128_load(i0);
+        i0 += 4;
+        const v128_t vi1 = wasm_v128_load(i1);
+        i1 += 4;
+        const v128_t vi2 = wasm_v128_load(i2);
+        i2 += 4;
+        const v128_t vi3 = wasm_v128_load(i3);
+        i3 += 4;
+        const v128_t vi4 = wasm_v128_load(i4);
+        i4 += 4;
+        const v128_t vi5 = wasm_v128_load(i5);
+        i5 += 4;
+        const v128_t vi6 = wasm_v128_load(i6);
+        i6 += 4;
+        const v128_t vi7 = wasm_v128_load(i7);
+        i7 += 4;
+        const v128_t vi8 = wasm_v128_load(i8);
+        i8 += 4;
+
+        const v128_t vmax018 = wasm_f32x4_max(wasm_f32x4_max(vi0, vi1), vi8);
+        const v128_t vmax23 = wasm_f32x4_max(vi2, vi3);
+        const v128_t vmax45 = wasm_f32x4_max(vi4, vi5);
+        const v128_t vmax67 = wasm_f32x4_max(vi6, vi7);
+
+        const v128_t vmax2345 = wasm_f32x4_max(vmax23, vmax45);
+        const v128_t vmax01678 = wasm_f32x4_max(vmax018, vmax67);
+        const v128_t vmax = wasm_f32x4_max(vmax2345, vmax01678);
+        v128_t vout = wasm_f32x4_max(wasm_f32x4_min(vmax, voutput_max), voutput_min);
+
+        if (c & 2) {
+          *((double*) o) = wasm_f64x2_extract_lane(vout, 0);
+          vout = wasm_v32x4_shuffle(vout, vout, 2, 3, 2, 3);
+          o += 2;
+        }
+        if (c & 1) {
+          *o++ = wasm_f32x4_extract_lane(vout, 0);
+        }
+      }
+    }
+
+    for (ptrdiff_t k = (ptrdiff_t) kernel_elements - 9; k > 0; k -= 8) {
+      const float* i0 = *input++;
+      const float* i1 = *input++;
+      const float* i2 = *input++;
+      const float* i3 = *input++;
+      const float* i4 = *input++;
+      const float* i5 = *input++;
+      const float* i6 = *input++;
+      const float* i7 = *input++;
+      i0 = (const float*) ((uintptr_t) i0 + input_offset);
+      i1 = (const float*) ((uintptr_t) i1 + input_offset);
+      i2 = (const float*) ((uintptr_t) i2 + input_offset);
+      i3 = (const float*) ((uintptr_t) i3 + input_offset);
+      i4 = (const float*) ((uintptr_t) i4 + input_offset);
+      i5 = (const float*) ((uintptr_t) i5 + input_offset);
+      i6 = (const float*) ((uintptr_t) i6 + input_offset);
+      i7 = (const float*) ((uintptr_t) i7 + input_offset);
+      if (k < 2) {
+        i1 = i0;
+      }
+      if (k <= 2) {
+        i2 = i0;
+      }
+      if (k < 4) {
+        i3 = i0;
+      }
+      if (k <= 4) {
+        i4 = i0;
+      }
+      if (k < 6) {
+        i5 = i0;
+      }
+      if (k <= 6) {
+        i6 = i0;
+      }
+      if (k < 8) {
+        i7 = i0;
+      }
+
+      o = output;
+      size_t c = channels;
+      for (; c >= 4; c -= 4) {
+        const v128_t vi0 = wasm_v128_load(i0);
+        i0 += 4;
+        const v128_t vi1 = wasm_v128_load(i1);
+        i1 += 4;
+        const v128_t vi2 = wasm_v128_load(i2);
+        i2 += 4;
+        const v128_t vi3 = wasm_v128_load(i3);
+        i3 += 4;
+        const v128_t vi4 = wasm_v128_load(i4);
+        i4 += 4;
+        const v128_t vi5 = wasm_v128_load(i5);
+        i5 += 4;
+        const v128_t vi6 = wasm_v128_load(i6);
+        i6 += 4;
+        const v128_t vi7 = wasm_v128_load(i7);
+        i7 += 4;
+        const v128_t vo = wasm_v128_load(o);
+
+        const v128_t vmax01 = wasm_f32x4_max(wasm_f32x4_max(vi0, vi1), vo);
+        const v128_t vmax23 = wasm_f32x4_max(vi2, vi3);
+        const v128_t vmax45 = wasm_f32x4_max(vi4, vi5);
+        const v128_t vmax67 = wasm_f32x4_max(vi6, vi7);
+
+        const v128_t vmax2345 = wasm_f32x4_max(vmax23, vmax45);
+        const v128_t vmax0167 = wasm_f32x4_max(vmax01, vmax67);
+        const v128_t vmax = wasm_f32x4_max(vmax2345, vmax0167);
+        const v128_t vout = wasm_f32x4_max(wasm_f32x4_min(vmax, voutput_max), voutput_min);
+
+        wasm_v128_store(o, vout);
+        o += 4;
+      }
+      if (c != 0) {
+        const v128_t vi0 = wasm_v128_load(i0);
+        const v128_t vi1 = wasm_v128_load(i1);
+        const v128_t vi2 = wasm_v128_load(i2);
+        const v128_t vi3 = wasm_v128_load(i3);
+        const v128_t vi4 = wasm_v128_load(i4);
+        const v128_t vi5 = wasm_v128_load(i5);
+        const v128_t vi6 = wasm_v128_load(i6);
+        const v128_t vi7 = wasm_v128_load(i7);
+        const v128_t vo = wasm_v128_load(o);
+
+        const v128_t vmax01 = wasm_f32x4_max(wasm_f32x4_max(vi0, vi1), vo);
+        const v128_t vmax23 = wasm_f32x4_max(vi2, vi3);
+        const v128_t vmax45 = wasm_f32x4_max(vi4, vi5);
+        const v128_t vmax67 = wasm_f32x4_max(vi6, vi7);
+
+        const v128_t vmax2345 = wasm_f32x4_max(vmax23, vmax45);
+        const v128_t vmax0167 = wasm_f32x4_max(vmax01, vmax67);
+        const v128_t vmax = wasm_f32x4_max(vmax2345, vmax0167);
+        v128_t vout = wasm_f32x4_max(wasm_f32x4_min(vmax, voutput_max), voutput_min);
+
+        if (c & 2) {
+          *((double*) o) = wasm_f64x2_extract_lane(vout, 0);
+          vout = wasm_v32x4_shuffle(vout, vout, 2, 3, 2, 3);
+          o += 2;
+        }
+        if (c & 1) {
+          *o++ = wasm_f32x4_extract_lane(vout, 0);
+        }
+      }
+    }
+    input = (const float**) ((uintptr_t) input + input_increment);
+    output = (float*) ((uintptr_t) o + output_increment);
+  } while (--output_pixels != 0);
+}
diff --git a/src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c b/src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c
new file mode 100644
index 000000000..33ec1441d
--- /dev/null
+++ b/src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c
@@ -0,0 +1,282 @@
+// Copyright 2020 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <wasm_simd128.h>
+
+#include <xnnpack/maxpool.h>
+
+
+void xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4(
+    size_t output_pixels,
+    size_t kernel_elements,
+    size_t channels,
+    const float** input,
+    size_t input_offset,
+    float* output,
+    size_t input_increment,
+    size_t output_increment,
+    const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
+{
+  assert(output_pixels != 0);
+  assert(kernel_elements != 0);
+  assert(channels != 0);
+
+  const v128_t voutput_max = wasm_v32x4_load_splat(&params->scalar.max);
+  const v128_t voutput_min = wasm_v32x4_load_splat(&params->scalar.min);
+  do {
+    float* o = output;
+    {
+      const float* i0 = *input++;
+      const float* i1 = *input++;
+      const float* i2 = *input++;
+      const float* i3 = *input++;
+      const float* i4 = *input++;
+      const float* i5 = *input++;
+      const float* i6 = *input++;
+      const float* i7 = *input++;
+      const float* i8 = *input++;
+      i0 = (const float*) ((uintptr_t) i0 + input_offset);
+      i1 = (const float*) ((uintptr_t) i1 + input_offset);
+      i2 = (const float*) ((uintptr_t) i2 + input_offset);
+      i3 = (const float*) ((uintptr_t) i3 + input_offset);
+      i4 = (const float*) ((uintptr_t) i4 + input_offset);
+      i5 = (const float*) ((uintptr_t) i5 + input_offset);
+      i6 = (const float*) ((uintptr_t) i6 + input_offset);
+      i7 = (const float*) ((uintptr_t) i7 + input_offset);
+      i8 = (const float*) ((uintptr_t) i8 + input_offset);
+      if (kernel_elements < 2) {
+        i1 = i0;
+      }
+      if (kernel_elements <= 2) {
+        i2 = i0;
+      }
+      if (kernel_elements < 4) {
+        i3 = i0;
+      }
+      if (kernel_elements <= 4) {
+        i4 = i0;
+      }
+      if (kernel_elements < 6) {
+        i5 = i0;
+      }
+      if (kernel_elements <= 6) {
+        i6 = i0;
+      }
+      if (kernel_elements < 8) {
+        i7 = i0;
+      }
+      if (kernel_elements <= 8) {
+        i8 = i0;
+      }
+
+      size_t c = channels;
+      for (; c >= 4; c -= 4) {
+        const v128_t vi0 = wasm_v128_load(i0);
+        i0 += 4;
+        const v128_t vi1 = wasm_v128_load(i1);
+        i1 += 4;
+        const v128_t vi2 = wasm_v128_load(i2);
+        i2 += 4;
+        const v128_t vi3 = wasm_v128_load(i3);
+        i3 += 4;
+        const v128_t vi4 = wasm_v128_load(i4);
+        i4 += 4;
+        const v128_t vi5 = wasm_v128_load(i5);
+        i5 += 4;
+        const v128_t vi6 = wasm_v128_load(i6);
+        i6 += 4;
+        const v128_t vi7 = wasm_v128_load(i7);
+        i7 += 4;
+        const v128_t vi8 = wasm_v128_load(i8);
+        i8 += 4;
+
+        const v128_t vmax01 = wasm_v128_bitselect(vi1, vi0, wasm_f32x4_lt(vi0, vi1));
+        const v128_t vmax23 = wasm_v128_bitselect(vi3, vi2, wasm_f32x4_lt(vi2, vi3));
+        const v128_t vmax45 = wasm_v128_bitselect(vi5, vi4, wasm_f32x4_lt(vi4, vi5));
+        const v128_t vmax018 = wasm_v128_bitselect(vi8, vmax01, wasm_f32x4_lt(vmax01, vi8));
+        const v128_t vmax67 = wasm_v128_bitselect(vi7, vi6, wasm_f32x4_lt(vi6, vi7));
+
+        const v128_t vmax2345 = wasm_v128_bitselect(vmax45, vmax23, wasm_f32x4_lt(vmax23, vmax45));
+        const v128_t vmax01678 = wasm_v128_bitselect(vmax67, vmax018, wasm_f32x4_lt(vmax018, vmax67));
+        const v128_t vmax = wasm_v128_bitselect(vmax2345, vmax01678, wasm_f32x4_lt(vmax01678, vmax2345));
+
+        const v128_t vmaskmin = wasm_f32x4_lt(vmax, voutput_min);
+        const v128_t vmaskmax = wasm_f32x4_le(vmax, voutput_max);
+
+        v128_t vout = wasm_v128_bitselect(voutput_min, vmax, vmaskmin);
+        vout = wasm_v128_bitselect(vout, voutput_max, vmaskmax);
+
+        wasm_v128_store(o, vout);
+        o += 4;
+      }
+      if (c != 0) {
+        const v128_t vi0 = wasm_v128_load(i0);
+        i0 += 4;
+        const v128_t vi1 = wasm_v128_load(i1);
+        i1 += 4;
+        const v128_t vi2 = wasm_v128_load(i2);
+        i2 += 4;
+        const v128_t vi3 = wasm_v128_load(i3);
+        i3 += 4;
+        const v128_t vi4 = wasm_v128_load(i4);
+        i4 += 4;
+        const v128_t vi5 = wasm_v128_load(i5);
+        i5 += 4;
+        const v128_t vi6 = wasm_v128_load(i6);
+        i6 += 4;
+        const v128_t vi7 = wasm_v128_load(i7);
+        i7 += 4;
+        const v128_t vi8 = wasm_v128_load(i8);
+        i8 += 4;
+
+        const v128_t vmax01 = wasm_v128_bitselect(vi1, vi0, wasm_f32x4_lt(vi0, vi1));
+        const v128_t vmax23 = wasm_v128_bitselect(vi3, vi2, wasm_f32x4_lt(vi2, vi3));
+        const v128_t vmax45 = wasm_v128_bitselect(vi5, vi4, wasm_f32x4_lt(vi4, vi5));
+        const v128_t vmax018 = wasm_v128_bitselect(vi8, vmax01, wasm_f32x4_lt(vmax01, vi8));
+        const v128_t vmax67 = wasm_v128_bitselect(vi7, vi6, wasm_f32x4_lt(vi6, vi7));
+
+        const v128_t vmax2345 = wasm_v128_bitselect(vmax45, vmax23, wasm_f32x4_lt(vmax23, vmax45));
+        const v128_t vmax01678 = wasm_v128_bitselect(vmax67, vmax018, wasm_f32x4_lt(vmax018, vmax67));
+        const v128_t vmax = wasm_v128_bitselect(vmax2345, vmax01678, wasm_f32x4_lt(vmax01678, vmax2345));
+
+        const v128_t vmaskmin = wasm_f32x4_lt(vmax, voutput_min);
+        const v128_t vmaskmax = wasm_f32x4_le(vmax, voutput_max);
+
+        v128_t vout = wasm_v128_bitselect(voutput_min, vmax, vmaskmin);
+        vout = wasm_v128_bitselect(vout, voutput_max, vmaskmax);
+
+        if (c & 2) {
+          *((double*) o) = wasm_f64x2_extract_lane(vout, 0);
+          vout = wasm_v32x4_shuffle(vout, vout, 2, 3, 2, 3);
+          o += 2;
+        }
+        if (c & 1) {
+          *o++ = wasm_f32x4_extract_lane(vout, 0);
+        }
+      }
+    }
+
+    for (ptrdiff_t k = (ptrdiff_t) kernel_elements - 9; k > 0; k -= 8) {
+      const float* i0 = *input++;
+      const float* i1 = *input++;
+      const float* i2 = *input++;
+      const float* i3 = *input++;
+      const float* i4 = *input++;
+      const float* i5 = *input++;
+      const float* i6 = *input++;
+      const float* i7 = *input++;
+      i0 = (const float*) ((uintptr_t) i0 + input_offset);
+      i1 = (const float*) ((uintptr_t) i1 + input_offset);
+      i2 = (const float*) ((uintptr_t) i2 + input_offset);
+      i3 = (const float*) ((uintptr_t) i3 + input_offset);
+      i4 = (const float*) ((uintptr_t) i4 + input_offset);
+      i5 = (const float*) ((uintptr_t) i5 + input_offset);
+      i6 = (const float*) ((uintptr_t) i6 + input_offset);
+      i7 = (const float*) ((uintptr_t) i7 + input_offset);
+      if (k < 2) {
+        i1 = i0;
+      }
+      if (k <= 2) {
+        i2 = i0;
+      }
+      if (k < 4) {
+        i3 = i0;
+      }
+      if (k <= 4) {
+        i4 = i0;
+      }
+      if (k < 6) {
+        i5 = i0;
+      }
+      if (k <= 6) {
+        i6 = i0;
+      }
+      if (k < 8) {
+        i7 = i0;
+      }
+
+      o = output;
+      size_t c = channels;
+      for (; c >= 4; c -= 4) {
+        const v128_t vi0 = wasm_v128_load(i0);
+        i0 += 4;
+        const v128_t vi1 = wasm_v128_load(i1);
+        i1 += 4;
+        const v128_t vi2 = wasm_v128_load(i2);
+        i2 += 4;
+        const v128_t vi3 = wasm_v128_load(i3);
+        i3 += 4;
+        const v128_t vi4 = wasm_v128_load(i4);
+        i4 += 4;
+        const v128_t vi5 = wasm_v128_load(i5);
+        i5 += 4;
+        const v128_t vi6 = wasm_v128_load(i6);
+        i6 += 4;
+        const v128_t vi7 = wasm_v128_load(i7);
+        i7 += 4;
+        const v128_t vo = wasm_v128_load(o);
+
+        const v128_t vmax01 = wasm_v128_bitselect(vi1, vi0, wasm_f32x4_lt(vi0, vi1));
+        const v128_t vmax23 = wasm_v128_bitselect(vi3, vi2, wasm_f32x4_lt(vi2, vi3));
+        const v128_t vmax45 = wasm_v128_bitselect(vi5, vi4, wasm_f32x4_lt(vi4, vi5));
+        const v128_t vmax01o = wasm_v128_bitselect(vo, vmax01, wasm_f32x4_lt(vmax01, vo));
+        const v128_t vmax67 = wasm_v128_bitselect(vi7, vi6, wasm_f32x4_lt(vi6, vi7));
+
+        const v128_t vmax2345 = wasm_v128_bitselect(vmax45, vmax23, wasm_f32x4_lt(vmax23, vmax45));
+        const v128_t vmax0167 = wasm_v128_bitselect(vmax67, vmax01o, wasm_f32x4_lt(vmax01o, vmax67));
+        const v128_t vmax = wasm_v128_bitselect(vmax2345, vmax0167, wasm_f32x4_lt(vmax0167, vmax2345));
+
+        const v128_t vmaskmin = wasm_f32x4_lt(vmax, voutput_min);
+        const v128_t vmaskmax = wasm_f32x4_le(vmax, voutput_max);
+
+        v128_t vout = wasm_v128_bitselect(voutput_min, vmax, vmaskmin);
+        vout = wasm_v128_bitselect(vout, voutput_max, vmaskmax);
+
+        wasm_v128_store(o, vout);
+        o += 4;
+      }
+      if (c != 0) {
+        const v128_t vi0 = wasm_v128_load(i0);
+        const v128_t vi1 = wasm_v128_load(i1);
+        const v128_t vi2 = wasm_v128_load(i2);
+        const v128_t vi3 = wasm_v128_load(i3);
+        const v128_t vi4 = wasm_v128_load(i4);
+        const v128_t vi5 = wasm_v128_load(i5);
+        const v128_t vi6 = wasm_v128_load(i6);
+        const v128_t vi7 = wasm_v128_load(i7);
+        const v128_t vo = wasm_v128_load(o);
+
+        const v128_t vmax01 = wasm_v128_bitselect(vi1, vi0, wasm_f32x4_lt(vi0, vi1));
+        const v128_t vmax23 = wasm_v128_bitselect(vi3, vi2, wasm_f32x4_lt(vi2, vi3));
+        const v128_t vmax45 = wasm_v128_bitselect(vi5, vi4, wasm_f32x4_lt(vi4, vi5));
+        const v128_t vmax01o = wasm_v128_bitselect(vo, vmax01, wasm_f32x4_lt(vmax01, vo));
+        const v128_t vmax67 = wasm_v128_bitselect(vi7, vi6, wasm_f32x4_lt(vi6, vi7));
+
+        const v128_t vmax2345 = wasm_v128_bitselect(vmax45, vmax23, wasm_f32x4_lt(vmax23, vmax45));
+        const v128_t vmax0167 = wasm_v128_bitselect(vmax67, vmax01o, wasm_f32x4_lt(vmax01o, vmax67));
+        const v128_t vmax = wasm_v128_bitselect(vmax2345, vmax0167, wasm_f32x4_lt(vmax0167, vmax2345));
+
+        const v128_t vmaskmin = wasm_f32x4_lt(vmax, voutput_min);
+        const v128_t vmaskmax = wasm_f32x4_le(vmax, voutput_max);
+
+        v128_t vout = wasm_v128_bitselect(voutput_min, vmax, vmaskmin);
+        vout = wasm_v128_bitselect(vout, voutput_max, vmaskmax);
+
+        if (c & 2) {
+          *((double*) o) = wasm_f64x2_extract_lane(vout, 0);
+          vout = wasm_v32x4_shuffle(vout, vout, 2, 3, 2, 3);
+          o += 2;
+        }
+        if (c & 1) {
+          *o++ = wasm_f32x4_extract_lane(vout, 0);
+        }
+      }
+    }
+    input = (const float**) ((uintptr_t) input + input_increment);
+    output = (float*) ((uintptr_t) o + output_increment);
+  } while (--output_pixels != 0);
+}
diff --git a/src/init.c b/src/init.c
index 65fddc010..561b336ae 100644
--- a/src/init.c
+++ b/src/init.c
@@ -1790,11 +1790,19 @@ static void init(void) {
       .mp = (xnn_gavgpool_multipass_ukernel_function) xnn_f32_gavgpool_minmax_ukernel_7p7x__psimd_c4,
       .mr = 7,
     };
-    xnn_params.f32.maxpool = (struct maxpool_parameters) {
-      .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4,
-      .mr = 9,
-      .qr = 8,
-    };
+    if (is_wasm_x86) {
+      xnn_params.f32.maxpool = (struct maxpool_parameters) {
+        .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4,
+        .mr = 9,
+        .qr = 8,
+      };
+    } else {
+      xnn_params.f32.maxpool = (struct maxpool_parameters) {
+        .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4,
+        .mr = 9,
+        .qr = 8,
+      };
+    }
     xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) {
       .up = (xnn_argmaxpool_unipass_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__psimd_c4,
       .mr = 4,
diff --git a/src/xnnpack/maxpool.h b/src/xnnpack/maxpool.h
index 397095945..cb7cf918a 100644
--- a/src/xnnpack/maxpool.h
+++ b/src/xnnpack/maxpool.h
@@ -34,6 +34,8 @@ extern "C" {
 DECLARE_F32_MAXPOOL_MINMAX_UKERNEL_FUNCTION(xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4)
 DECLARE_F32_MAXPOOL_MINMAX_UKERNEL_FUNCTION(xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4)
 DECLARE_F32_MAXPOOL_MINMAX_UKERNEL_FUNCTION(xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4)
+DECLARE_F32_MAXPOOL_MINMAX_UKERNEL_FUNCTION(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4)
+DECLARE_F32_MAXPOOL_MINMAX_UKERNEL_FUNCTION(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4)
 DECLARE_F32_MAXPOOL_MINMAX_UKERNEL_FUNCTION(xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1)
 DECLARE_F32_MAXPOOL_MINMAX_UKERNEL_FUNCTION(xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1)
 
diff --git a/test/f32-maxpool-minmax.cc b/test/f32-maxpool-minmax.cc
index 93f5a3441..2d01c3826 100644
--- a/test/f32-maxpool-minmax.cc
+++ b/test/f32-maxpool-minmax.cc
@@ -2681,6 +2681,1640 @@
 #endif  // !XNN_ARCH_ASMJS && !XNN_ARCH_WASM && !XNN_COMPILER_MSVC && !XNN_COMPILER_ICC
 
 
+#if XNN_ARCH_WASMSIMD
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_unipass_fulltile) {
+    MaxPoolMicrokernelTester()
+      .pooling_elements(9)
+      .pooling_tile(9, 8)
+      .channels(4)
+      .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_unipass_fulltile_with_input_offset) {
+    MaxPoolMicrokernelTester()
+      .pooling_elements(9)
+      .pooling_tile(9, 8)
+      .channels(4)
+      .input_offset(7)
+      .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_unipass_fulltile_with_qmin) {
+    MaxPoolMicrokernelTester()
+      .pooling_elements(9)
+      .pooling_tile(9, 8)
+      .channels(4)
+      .qmin(192)
+      .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_unipass_fulltile_with_qmax) {
+    MaxPoolMicrokernelTester()
+      .pooling_elements(9)
+      .pooling_tile(9, 8)
+      .channels(4)
+      .qmax(192)
+      .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_unipass_subtile) {
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(4)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_unipass_subtile_with_input_offset) {
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(4)
+        .input_offset(7)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_unipass_fulltile) {
+    for (size_t channels = 8; channels < 32; channels += 4) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_unipass_fulltile_with_input_offset) {
+    for (size_t channels = 8; channels < 32; channels += 4) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(37)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_unipass_fulltile_with_qmin) {
+    for (size_t channels = 8; channels < 32; channels += 4) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_unipass_fulltile_with_qmax) {
+    for (size_t channels = 8; channels < 32; channels += 4) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_unipass_subtile) {
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 8; channels < 32; channels += 4) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_unipass_subtile_with_input_offset) {
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 8; channels < 32; channels += 4) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(37)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_unipass_fulltile) {
+    for (size_t channels = 1; channels < 4; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_unipass_fulltile_with_input_offset) {
+    for (size_t channels = 1; channels < 4; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(5)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_unipass_fulltile_with_qmin) {
+    for (size_t channels = 1; channels < 4; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_unipass_fulltile_with_qmax) {
+    for (size_t channels = 1; channels < 4; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_unipass_subtile) {
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 1; channels < 4; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_unipass_subtile_with_input_offset) {
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 1; channels < 4; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(5)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_unipass_fulltile) {
+    for (size_t channels = 5; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_unipass_fulltile_with_input_offset) {
+    for (size_t channels = 5; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(11)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_unipass_fulltile_with_qmin) {
+    for (size_t channels = 5; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_unipass_fulltile_with_qmax) {
+    for (size_t channels = 5; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_unipass_subtile) {
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 5; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_unipass_subtile_with_input_offset) {
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 5; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(11)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_fulltile) {
+    MaxPoolMicrokernelTester()
+      .pooling_elements(17)
+      .pooling_tile(9, 8)
+      .channels(4)
+      .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_fulltile_with_input_offset) {
+    MaxPoolMicrokernelTester()
+      .pooling_elements(17)
+      .pooling_tile(9, 8)
+      .channels(4)
+      .input_offset(7)
+      .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_fulltile_with_qmin) {
+    MaxPoolMicrokernelTester()
+      .pooling_elements(17)
+      .pooling_tile(9, 8)
+      .channels(4)
+      .qmin(192)
+      .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_fulltile_with_qmax) {
+    MaxPoolMicrokernelTester()
+      .pooling_elements(17)
+      .pooling_tile(9, 8)
+      .channels(4)
+      .qmax(192)
+      .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_subtile) {
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(4)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_twopass_subtile_with_input_offset) {
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(4)
+        .input_offset(7)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_fulltile) {
+    for (size_t channels = 8; channels < 32; channels += 4) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_fulltile_with_input_offset) {
+    for (size_t channels = 8; channels < 32; channels += 4) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(23)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_fulltile_with_qmin) {
+    for (size_t channels = 8; channels < 32; channels += 4) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_fulltile_with_qmax) {
+    for (size_t channels = 8; channels < 32; channels += 4) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_subtile) {
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 8; channels < 32; channels += 4) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_twopass_subtile_with_input_offset) {
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 8; channels < 32; channels += 4) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(37)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_fulltile) {
+    for (size_t channels = 1; channels < 4; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_fulltile_with_input_offset) {
+    for (size_t channels = 1; channels < 4; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(5)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_fulltile_with_qmin) {
+    for (size_t channels = 1; channels < 4; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_fulltile_with_qmax) {
+    for (size_t channels = 1; channels < 4; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_subtile) {
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 1; channels < 4; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_twopass_subtile_with_input_offset) {
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 1; channels < 4; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(5)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_fulltile) {
+    for (size_t channels = 5; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_fulltile_with_input_offset) {
+    for (size_t channels = 5; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(11)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_fulltile_with_qmin) {
+    for (size_t channels = 5; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_fulltile_with_qmax) {
+    for (size_t channels = 5; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_subtile) {
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 5; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_twopass_subtile_with_input_offset) {
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 5; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(11)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_multipass) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(4)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_multipass_with_input_offset) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(4)
+        .input_offset(7)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_multipass_with_qmin) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(4)
+        .qmin(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_eq_4_multipass_with_qmax) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(4)
+        .qmax(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_multipass) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 8; channels < 32; channels += 4) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_multipass_with_input_offset) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 8; channels < 32; channels += 4) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(37)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_multipass_with_qmin) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 8; channels < 32; channels += 4) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmin(192)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_div_4_multipass_with_qmax) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 8; channels < 32; channels += 4) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmax(192)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_multipass) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 1; channels < 4; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_multipass_with_input_offset) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 1; channels < 4; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(4)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_multipass_with_qmin) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 1; channels < 4; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmin(192)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_lt_4_multipass_with_qmax) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 1; channels < 4; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmax(192)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_multipass) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 5; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_multipass_with_input_offset) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 5; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(11)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_multipass_with_qmin) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 5; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmin(192)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, channels_gt_4_multipass_with_qmax) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 5; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmax(192)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels) {
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 20; channels += 3) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+        }
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels_with_input_offset) {
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 20; channels += 3) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .input_offset(23)
+            .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+        }
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels_with_qmin) {
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 20; channels += 3) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .qmin(192)
+            .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+        }
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels_with_qmax) {
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 20; channels += 3) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .qmax(192)
+            .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+        }
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels_with_output_stride) {
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 20; channels += 3) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .output_stride(23)
+            .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+        }
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_ARM_C4, few_output_pixels_with_step) {
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 20; channels += 3) {
+          for (size_t step = 2; step <= pooling_elements; step++) {
+            MaxPoolMicrokernelTester()
+              .output_pixels(output_pixels)
+              .pooling_elements(pooling_elements)
+              .pooling_tile(9, 8)
+              .step(step)
+              .channels(channels)
+              .output_stride(23)
+              .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4);
+          }
+        }
+      }
+    }
+  }
+#endif  // XNN_ARCH_WASMSIMD
+
+
+#if XNN_ARCH_WASMSIMD
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_unipass_fulltile) {
+    MaxPoolMicrokernelTester()
+      .pooling_elements(9)
+      .pooling_tile(9, 8)
+      .channels(4)
+      .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_unipass_fulltile_with_input_offset) {
+    MaxPoolMicrokernelTester()
+      .pooling_elements(9)
+      .pooling_tile(9, 8)
+      .channels(4)
+      .input_offset(7)
+      .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_unipass_fulltile_with_qmin) {
+    MaxPoolMicrokernelTester()
+      .pooling_elements(9)
+      .pooling_tile(9, 8)
+      .channels(4)
+      .qmin(192)
+      .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_unipass_fulltile_with_qmax) {
+    MaxPoolMicrokernelTester()
+      .pooling_elements(9)
+      .pooling_tile(9, 8)
+      .channels(4)
+      .qmax(192)
+      .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_unipass_subtile) {
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(4)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_unipass_subtile_with_input_offset) {
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(4)
+        .input_offset(7)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_unipass_fulltile) {
+    for (size_t channels = 8; channels < 32; channels += 4) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_unipass_fulltile_with_input_offset) {
+    for (size_t channels = 8; channels < 32; channels += 4) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(37)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_unipass_fulltile_with_qmin) {
+    for (size_t channels = 8; channels < 32; channels += 4) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_unipass_fulltile_with_qmax) {
+    for (size_t channels = 8; channels < 32; channels += 4) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_unipass_subtile) {
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 8; channels < 32; channels += 4) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_unipass_subtile_with_input_offset) {
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 8; channels < 32; channels += 4) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(37)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_unipass_fulltile) {
+    for (size_t channels = 1; channels < 4; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_unipass_fulltile_with_input_offset) {
+    for (size_t channels = 1; channels < 4; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(5)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_unipass_fulltile_with_qmin) {
+    for (size_t channels = 1; channels < 4; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_unipass_fulltile_with_qmax) {
+    for (size_t channels = 1; channels < 4; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_unipass_subtile) {
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 1; channels < 4; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_unipass_subtile_with_input_offset) {
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 1; channels < 4; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(5)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_unipass_fulltile) {
+    for (size_t channels = 5; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_unipass_fulltile_with_input_offset) {
+    for (size_t channels = 5; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(11)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_unipass_fulltile_with_qmin) {
+    for (size_t channels = 5; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_unipass_fulltile_with_qmax) {
+    for (size_t channels = 5; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_unipass_subtile) {
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 5; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_unipass_subtile_with_input_offset) {
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 5; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(11)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_fulltile) {
+    MaxPoolMicrokernelTester()
+      .pooling_elements(17)
+      .pooling_tile(9, 8)
+      .channels(4)
+      .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_fulltile_with_input_offset) {
+    MaxPoolMicrokernelTester()
+      .pooling_elements(17)
+      .pooling_tile(9, 8)
+      .channels(4)
+      .input_offset(7)
+      .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_fulltile_with_qmin) {
+    MaxPoolMicrokernelTester()
+      .pooling_elements(17)
+      .pooling_tile(9, 8)
+      .channels(4)
+      .qmin(192)
+      .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_fulltile_with_qmax) {
+    MaxPoolMicrokernelTester()
+      .pooling_elements(17)
+      .pooling_tile(9, 8)
+      .channels(4)
+      .qmax(192)
+      .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_subtile) {
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(4)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_twopass_subtile_with_input_offset) {
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(4)
+        .input_offset(7)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_fulltile) {
+    for (size_t channels = 8; channels < 32; channels += 4) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_fulltile_with_input_offset) {
+    for (size_t channels = 8; channels < 32; channels += 4) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(23)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_fulltile_with_qmin) {
+    for (size_t channels = 8; channels < 32; channels += 4) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_fulltile_with_qmax) {
+    for (size_t channels = 8; channels < 32; channels += 4) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_subtile) {
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 8; channels < 32; channels += 4) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_twopass_subtile_with_input_offset) {
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 8; channels < 32; channels += 4) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(37)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_fulltile) {
+    for (size_t channels = 1; channels < 4; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_fulltile_with_input_offset) {
+    for (size_t channels = 1; channels < 4; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(5)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_fulltile_with_qmin) {
+    for (size_t channels = 1; channels < 4; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_fulltile_with_qmax) {
+    for (size_t channels = 1; channels < 4; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_subtile) {
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 1; channels < 4; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_twopass_subtile_with_input_offset) {
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 1; channels < 4; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(5)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_fulltile) {
+    for (size_t channels = 5; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_fulltile_with_input_offset) {
+    for (size_t channels = 5; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(11)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_fulltile_with_qmin) {
+    for (size_t channels = 5; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_fulltile_with_qmax) {
+    for (size_t channels = 5; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_subtile) {
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 5; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_twopass_subtile_with_input_offset) {
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 5; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(11)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_multipass) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(4)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_multipass_with_input_offset) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(4)
+        .input_offset(7)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_multipass_with_qmin) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(4)
+        .qmin(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_eq_4_multipass_with_qmax) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(4)
+        .qmax(192)
+        .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_multipass) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 8; channels < 32; channels += 4) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_multipass_with_input_offset) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 8; channels < 32; channels += 4) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(37)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_multipass_with_qmin) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 8; channels < 32; channels += 4) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmin(192)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_div_4_multipass_with_qmax) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 8; channels < 32; channels += 4) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmax(192)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_multipass) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 1; channels < 4; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_multipass_with_input_offset) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 1; channels < 4; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(4)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_multipass_with_qmin) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 1; channels < 4; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmin(192)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_lt_4_multipass_with_qmax) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 1; channels < 4; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmax(192)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_multipass) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 5; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_multipass_with_input_offset) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 5; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(11)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_multipass_with_qmin) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 5; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmin(192)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, channels_gt_4_multipass_with_qmax) {
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 5; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmax(192)
+          .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels) {
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 20; channels += 3) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+        }
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels_with_input_offset) {
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 20; channels += 3) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .input_offset(23)
+            .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+        }
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels_with_qmin) {
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 20; channels += 3) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .qmin(192)
+            .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+        }
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels_with_qmax) {
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 20; channels += 3) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .qmax(192)
+            .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+        }
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels_with_output_stride) {
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 20; channels += 3) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .output_stride(23)
+            .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+        }
+      }
+    }
+  }
+
+  TEST(F32_MAXPOOL_MINMAX_9P8X__WASMSIMD_X86_C4, few_output_pixels_with_step) {
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 20; channels += 3) {
+          for (size_t step = 2; step <= pooling_elements; step++) {
+            MaxPoolMicrokernelTester()
+              .output_pixels(output_pixels)
+              .pooling_elements(pooling_elements)
+              .pooling_tile(9, 8)
+              .step(step)
+              .channels(channels)
+              .output_stride(23)
+              .Test(xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4);
+          }
+        }
+      }
+    }
+  }
+#endif  // XNN_ARCH_WASMSIMD
+
+
 #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
   TEST(F32_MAXPOOL_MINMAX_9P8X__WASM_C1, channels_eq_1_unipass_fulltile) {
     MaxPoolMicrokernelTester()
diff --git a/test/f32-maxpool-minmax.yaml b/test/f32-maxpool-minmax.yaml
index d9b1cfaf9..35a5855b9 100644
--- a/test/f32-maxpool-minmax.yaml
+++ b/test/f32-maxpool-minmax.yaml
@@ -5,5 +5,7 @@
 - name: xnn_f32_maxpool_minmax_ukernel_9p8x__sse_c4
 - name: xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4
 - name: xnn_f32_maxpool_minmax_ukernel_9p8x__psimd_c4
+- name: xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_arm_c4
+- name: xnn_f32_maxpool_minmax_ukernel_9p8x__wasmsimd_x86_c4
 - name: xnn_f32_maxpool_minmax_ukernel_9p8x__wasm_c1
 - name: xnn_f32_maxpool_minmax_ukernel_9p8x__scalar_c1