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author | Android Build Coastguard Worker <android-build-coastguard-worker@google.com> | 2023-07-07 00:57:30 +0000 |
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committer | Android Build Coastguard Worker <android-build-coastguard-worker@google.com> | 2023-07-07 00:57:30 +0000 |
commit | 0edd6499aaed16bf45de92bb0ad1c729486ce6f4 (patch) | |
tree | b6182e391304fb3a42c51d482dcf671f540f2363 /math/v_exp2f.c | |
parent | f2e7d2de0fe4c2bddb59992ba401391f38627a1e (diff) | |
parent | 172d24a7ae67ee7bae413d5a8618f1b5edc002be (diff) | |
download | arm-optimized-routines-android14-mainline-cellbroadcast-release.tar.gz |
Snap for 10447354 from 172d24a7ae67ee7bae413d5a8618f1b5edc002be to mainline-cellbroadcast-releaseaml_cbr_341710000aml_cbr_341610000aml_cbr_341510010aml_cbr_341410010aml_cbr_341311010aml_cbr_341110000aml_cbr_341011000aml_cbr_340914000android14-mainline-cellbroadcast-release
Change-Id: I8753ae14d61308952964b5f87c7e48044f60727c
Diffstat (limited to 'math/v_exp2f.c')
-rw-r--r-- | math/v_exp2f.c | 51 |
1 files changed, 45 insertions, 6 deletions
diff --git a/math/v_exp2f.c b/math/v_exp2f.c index e3ea5af..7f40dba 100644 --- a/math/v_exp2f.c +++ b/math/v_exp2f.c @@ -1,8 +1,8 @@ /* * Single-precision vector 2^x function. * - * Copyright (c) 2019, Arm Limited. - * SPDX-License-Identifier: MIT + * Copyright (c) 2019-2022, Arm Limited. + * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception */ #include "mathlib.h" @@ -25,6 +25,22 @@ static const float Poly[] = { #define Shift v_f32 (0x1.8p23f) +#if WANT_SIMD_EXCEPT + +#define TinyBound 0x20000000 /* asuint (0x1p-63). */ +#define BigBound 0x42800000 /* asuint (0x1p6). */ + +VPCS_ATTR +static NOINLINE v_f32_t +specialcase (v_f32_t x, v_f32_t y, v_u32_t cmp) +{ + /* If fenv exceptions are to be triggered correctly, fall back to the scalar + routine to special lanes. */ + return v_call_f32 (exp2f, x, y, cmp); +} + +#else + VPCS_ATTR static v_f32_t specialcase (v_f32_t poly, v_f32_t n, v_u32_t e, v_f32_t absn, v_u32_t cmp1, v_f32_t scale) @@ -41,15 +57,28 @@ specialcase (v_f32_t poly, v_f32_t n, v_u32_t e, v_f32_t absn, v_u32_t cmp1, v_f return v_as_f32_u32 ((cmp2 & r2) | (~cmp2 & cmp1 & r1) | (~cmp1 & r0)); } +#endif + VPCS_ATTR v_f32_t V_NAME(exp2f) (v_f32_t x) { - v_f32_t n, r, r2, scale, p, q, poly, absn; + v_f32_t n, r, r2, scale, p, q, poly; v_u32_t cmp, e; - /* exp2(x) = 2^n (1 + poly(r)), with 1 + poly(r) in [1/sqrt(2),sqrt(2)] - x = n + r, with r in [-1/2, 1/2]. */ +#if WANT_SIMD_EXCEPT + cmp = v_cond_u32 ((v_as_u32_f32 (x) & 0x7fffffff) - TinyBound + >= BigBound - TinyBound); + v_f32_t xm = x; + /* If any lanes are special, mask them with 1 and retain a copy of x to allow + specialcase to fix special lanes later. This is only necessary if fenv + exceptions are to be triggered correctly. */ + if (unlikely (v_any_u32 (cmp))) + x = v_sel_f32 (cmp, v_f32 (1), x); +#endif + + /* exp2(x) = 2^n (1 + poly(r)), with 1 + poly(r) in [1/sqrt(2),sqrt(2)] + x = n + r, with r in [-1/2, 1/2]. */ #if 0 v_f32_t z; z = x + Shift; @@ -62,16 +91,26 @@ V_NAME(exp2f) (v_f32_t x) e = v_as_u32_s32 (v_round_s32 (x)) << 23; #endif scale = v_as_f32_u32 (e + v_u32 (0x3f800000)); - absn = v_abs_f32 (n); + +#if !WANT_SIMD_EXCEPT + v_f32_t absn = v_abs_f32 (n); cmp = v_cond_u32 (absn > v_f32 (126.0f)); +#endif + r2 = r * r; p = v_fma_f32 (C0, r, C1); q = v_fma_f32 (C2, r, C3); q = v_fma_f32 (p, r2, q); p = C4 * r; poly = v_fma_f32 (q, r2, p); + if (unlikely (v_any_u32 (cmp))) +#if WANT_SIMD_EXCEPT + return specialcase (xm, v_fma_f32 (poly, scale, scale), cmp); +#else return specialcase (poly, n, e, absn, cmp, scale); +#endif + return v_fma_f32 (poly, scale, scale); } VPCS_ALIAS |