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author | Mark Dykes <mardyk01@review.trustedfirmware.org> | 2020-09-15 16:44:09 +0000 |
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committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2020-09-15 16:44:09 +0000 |
commit | 51ca09179de33120687e621a148f86de35331a41 (patch) | |
tree | f47cc666b79839743c7d75a7665d9bb75f76ab18 /docs | |
parent | 47bda02c8e95797b93d81407dc9c6d99aec1e3ff (diff) | |
parent | 093ba62e14099ab4bd9c2452044d19e3589925d6 (diff) | |
download | arm-trusted-firmware-51ca09179de33120687e621a148f86de35331a41.tar.gz |
Merge "doc: Correct CPACR.FPEN usage" into integration
Diffstat (limited to 'docs')
-rw-r--r-- | docs/design/firmware-design.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/design/firmware-design.rst b/docs/design/firmware-design.rst index a357d5858..c12e73f45 100644 --- a/docs/design/firmware-design.rst +++ b/docs/design/firmware-design.rst @@ -369,7 +369,7 @@ Architectural initialization For AArch64, BL2 performs the minimal architectural initialization required for subsequent stages of TF-A and normal world software. EL1 and EL0 are given -access to Floating Point and Advanced SIMD registers by clearing the +access to Floating Point and Advanced SIMD registers by setting the ``CPACR.FPEN`` bits. For AArch32, the minimal architectural initialization required for subsequent |