diff options
Diffstat (limited to 'bl32')
| -rw-r--r-- | bl32/sp_min/aarch32/entrypoint.S | 13 | ||||
| -rw-r--r-- | bl32/sp_min/sp_min.ld.S | 7 | ||||
| -rw-r--r-- | bl32/tsp/aarch64/tsp_entrypoint.S | 16 |
3 files changed, 26 insertions, 10 deletions
diff --git a/bl32/sp_min/aarch32/entrypoint.S b/bl32/sp_min/aarch32/entrypoint.S index f3a1e440b..39f1065f0 100644 --- a/bl32/sp_min/aarch32/entrypoint.S +++ b/bl32/sp_min/aarch32/entrypoint.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -23,6 +23,8 @@ .globl sp_min_handle_smc .globl sp_min_handle_fiq +#define FIXUP_SIZE ((BL32_LIMIT) - (BL32_BASE)) + .macro route_fiq_to_sp_min reg /* ----------------------------------------------------- * FIQs are secure interrupts trapped by Monitor and non @@ -87,7 +89,8 @@ func sp_min_entrypoint _secondary_cold_boot=0 \ _init_memory=0 \ _init_c_runtime=1 \ - _exception_vectors=sp_min_vector_table + _exception_vectors=sp_min_vector_table \ + _pie_fixup_size=FIXUP_SIZE /* --------------------------------------------------------------------- * Relay the previous bootloader's arguments to the platform layer @@ -106,7 +109,8 @@ func sp_min_entrypoint _secondary_cold_boot=!COLD_BOOT_SINGLE_CPU \ _init_memory=1 \ _init_c_runtime=1 \ - _exception_vectors=sp_min_vector_table + _exception_vectors=sp_min_vector_table \ + _pie_fixup_size=FIXUP_SIZE /* --------------------------------------------------------------------- * For RESET_TO_SP_MIN systems, BL32 (SP_MIN) is the first bootloader @@ -306,7 +310,8 @@ func sp_min_warm_entrypoint _secondary_cold_boot=0 \ _init_memory=0 \ _init_c_runtime=0 \ - _exception_vectors=sp_min_vector_table + _exception_vectors=sp_min_vector_table \ + _pie_fixup_size=0 /* * We're about to enable MMU and participate in PSCI state coordination. diff --git a/bl32/sp_min/sp_min.ld.S b/bl32/sp_min/sp_min.ld.S index f202c7ada..475affae4 100644 --- a/bl32/sp_min/sp_min.ld.S +++ b/bl32/sp_min/sp_min.ld.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -92,6 +92,7 @@ SECTIONS __RW_START__ = . ; DATA_SECTION >RAM + RELA_SECTION >RAM #ifdef BL32_PROGBITS_LIMIT ASSERT(. <= BL32_PROGBITS_LIMIT, "BL32 progbits has exceeded its limit.") @@ -141,5 +142,9 @@ SECTIONS __BL32_END__ = .; + /DISCARD/ : { + *(.dynsym .dynstr .hash .gnu.hash) + } + ASSERT(. <= BL32_LIMIT, "BL32 image has exceeded its limit.") } diff --git a/bl32/tsp/aarch64/tsp_entrypoint.S b/bl32/tsp/aarch64/tsp_entrypoint.S index a007bab30..795c5865e 100644 --- a/bl32/tsp/aarch64/tsp_entrypoint.S +++ b/bl32/tsp/aarch64/tsp_entrypoint.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -114,13 +114,19 @@ func tsp_entrypoint _align=3 * - the coherent memory section. * --------------------------------------------- */ - ldr x0, =__BSS_START__ - ldr x1, =__BSS_SIZE__ + adrp x0, __BSS_START__ + add x0, x0, :lo12:__BSS_START__ + adrp x1, __BSS_END__ + add x1, x1, :lo12:__BSS_END__ + sub x1, x1, x0 bl zeromem #if USE_COHERENT_MEM - ldr x0, =__COHERENT_RAM_START__ - ldr x1, =__COHERENT_RAM_UNALIGNED_SIZE__ + adrp x0, __COHERENT_RAM_START__ + add x0, x0, :lo12:__COHERENT_RAM_START__ + adrp x1, __COHERENT_RAM_END_UNALIGNED__ + add x1, x1, :lo12:__COHERENT_RAM_END_UNALIGNED__ + sub x1, x1, x0 bl zeromem #endif |