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| author | Torne (Richard Coles) <torne@google.com> | 2014-08-12 13:48:36 +0100 |
|---|---|---|
| committer | Torne (Richard Coles) <torne@google.com> | 2014-08-12 13:48:36 +0100 |
| commit | 2600beef263e0755436d7a4979c9654a8db62d07 (patch) | |
| tree | 1618e458977b60f424c824e68b17976e9bc0a0b0 | |
| parent | 83d0254a412b93e81b06a354b90fb627408b4ec8 (diff) | |
| parent | 346651468f8e10a2f12fca26cbaa9ab5180f556a (diff) | |
| download | openmax_dl-2600beef263e0755436d7a4979c9654a8db62d07.tar.gz | |
Merge from Chromium at DEPS revision 288042
This commit was generated by merge_to_master.py.
Change-Id: I5adb73a0a6ba8488770a4e61b0a8a7ee0f38fcf8
54 files changed, 129 insertions, 153 deletions
diff --git a/README.chromium b/README.chromium index 3dbc3ff..eae1178 100644 --- a/README.chromium +++ b/README.chromium @@ -12,8 +12,8 @@ WebAudio for Chromium on Android. Local Modifications: Only the FFT routines from the OpenMAX DL package are included. The -code was modified to work with gcc and a new implementation for a -floating-point FFT was added. +code was modified to work with gcc and clang, and a new implementation +for a floating-point FFT was added. The original ARM license is unclear, but Google has obtained permission to relicense this code under a BSD license. diff --git a/dl/openmax_dl.target.darwin-arm.mk b/dl/openmax_dl.target.darwin-arm.mk index ee2402b..96058ee 100644 --- a/dl/openmax_dl.target.darwin-arm.mk +++ b/dl/openmax_dl.target.darwin-arm.mk @@ -141,7 +141,6 @@ MY_DEFS_Debug := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ @@ -248,7 +247,6 @@ MY_DEFS_Release := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ diff --git a/dl/openmax_dl.target.darwin-arm64.mk b/dl/openmax_dl.target.darwin-arm64.mk index d00e829..0d3888c 100644 --- a/dl/openmax_dl.target.darwin-arm64.mk +++ b/dl/openmax_dl.target.darwin-arm64.mk @@ -95,7 +95,6 @@ MY_DEFS_Debug := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ @@ -189,7 +188,6 @@ MY_DEFS_Release := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ diff --git a/dl/openmax_dl.target.darwin-mips.mk b/dl/openmax_dl.target.darwin-mips.mk index 9d7a893..49ec075 100644 --- a/dl/openmax_dl.target.darwin-mips.mk +++ b/dl/openmax_dl.target.darwin-mips.mk @@ -90,7 +90,6 @@ MY_DEFS_Debug := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ @@ -192,7 +191,6 @@ MY_DEFS_Release := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ diff --git a/dl/openmax_dl.target.darwin-x86.mk b/dl/openmax_dl.target.darwin-x86.mk index 3e3c3ba..ea25330 100644 --- a/dl/openmax_dl.target.darwin-x86.mk +++ b/dl/openmax_dl.target.darwin-x86.mk @@ -108,7 +108,6 @@ MY_DEFS_Debug := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ @@ -209,7 +208,6 @@ MY_DEFS_Release := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ diff --git a/dl/openmax_dl.target.darwin-x86_64.mk b/dl/openmax_dl.target.darwin-x86_64.mk index 010a9ca..8310de7 100644 --- a/dl/openmax_dl.target.darwin-x86_64.mk +++ b/dl/openmax_dl.target.darwin-x86_64.mk @@ -107,7 +107,6 @@ MY_DEFS_Debug := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ @@ -207,7 +206,6 @@ MY_DEFS_Release := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ diff --git a/dl/openmax_dl.target.linux-arm.mk b/dl/openmax_dl.target.linux-arm.mk index ee2402b..96058ee 100644 --- a/dl/openmax_dl.target.linux-arm.mk +++ b/dl/openmax_dl.target.linux-arm.mk @@ -141,7 +141,6 @@ MY_DEFS_Debug := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ @@ -248,7 +247,6 @@ MY_DEFS_Release := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ diff --git a/dl/openmax_dl.target.linux-arm64.mk b/dl/openmax_dl.target.linux-arm64.mk index d00e829..0d3888c 100644 --- a/dl/openmax_dl.target.linux-arm64.mk +++ b/dl/openmax_dl.target.linux-arm64.mk @@ -95,7 +95,6 @@ MY_DEFS_Debug := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ @@ -189,7 +188,6 @@ MY_DEFS_Release := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ diff --git a/dl/openmax_dl.target.linux-mips.mk b/dl/openmax_dl.target.linux-mips.mk index 9d7a893..49ec075 100644 --- a/dl/openmax_dl.target.linux-mips.mk +++ b/dl/openmax_dl.target.linux-mips.mk @@ -90,7 +90,6 @@ MY_DEFS_Debug := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ @@ -192,7 +191,6 @@ MY_DEFS_Release := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ diff --git a/dl/openmax_dl.target.linux-x86.mk b/dl/openmax_dl.target.linux-x86.mk index 3e3c3ba..ea25330 100644 --- a/dl/openmax_dl.target.linux-x86.mk +++ b/dl/openmax_dl.target.linux-x86.mk @@ -108,7 +108,6 @@ MY_DEFS_Debug := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ @@ -209,7 +208,6 @@ MY_DEFS_Release := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ diff --git a/dl/openmax_dl.target.linux-x86_64.mk b/dl/openmax_dl.target.linux-x86_64.mk index 010a9ca..8310de7 100644 --- a/dl/openmax_dl.target.linux-x86_64.mk +++ b/dl/openmax_dl.target.linux-x86_64.mk @@ -107,7 +107,6 @@ MY_DEFS_Debug := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ @@ -207,7 +206,6 @@ MY_DEFS_Release := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ diff --git a/dl/openmax_dl_armv7.target.darwin-arm.mk b/dl/openmax_dl_armv7.target.darwin-arm.mk index fa2da94..d01be0d 100644 --- a/dl/openmax_dl_armv7.target.darwin-arm.mk +++ b/dl/openmax_dl_armv7.target.darwin-arm.mk @@ -95,7 +95,6 @@ MY_DEFS_Debug := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ @@ -200,7 +199,6 @@ MY_DEFS_Release := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ diff --git a/dl/openmax_dl_armv7.target.linux-arm.mk b/dl/openmax_dl_armv7.target.linux-arm.mk index fa2da94..d01be0d 100644 --- a/dl/openmax_dl_armv7.target.linux-arm.mk +++ b/dl/openmax_dl_armv7.target.linux-arm.mk @@ -95,7 +95,6 @@ MY_DEFS_Debug := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ @@ -200,7 +199,6 @@ MY_DEFS_Release := \ '-DSYSTEM_NATIVELY_SIGNALS_MEMORY_PRESSURE' \ '-DENABLE_EGLIMAGE=1' \ '-DCLD_VERSION=1' \ - '-DCLD_DATA_FROM_STATIC' \ '-DENABLE_PRINTING=1' \ '-DENABLE_MANAGED_USERS=1' \ '-DDATA_REDUCTION_FALLBACK_HOST="http://compress.googlezip.net:80/"' \ diff --git a/dl/sp/src/arm/arm64/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_s.S b/dl/sp/src/arm/arm64/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_s.S index da68314..02ff1c2 100644 --- a/dl/sp/src/arm/arm64/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_s.S +++ b/dl/sp/src/arm/arm64/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_s.S @@ -113,7 +113,7 @@ #define dZip8b v19.8b #define half v13.2s - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name fmov half, 0.5 diff --git a/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_fs_s.S b/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_fs_s.S index b22912d..58fd8eb 100644 --- a/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_fs_s.S +++ b/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_fs_s.S @@ -72,7 +72,7 @@ #define dY0 v2.2s #define dY1 v3.2s - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name // Define stack arguments diff --git a/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_ls_s.S b/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_ls_s.S index e7de11e..3a45b95 100644 --- a/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_ls_s.S +++ b/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_ls_s.S @@ -74,7 +74,7 @@ #define qT0 v10.2s #define qT1 v12.2s - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name // Move parameters into our work registers ldr subFFTSize, [pSubFFTSize] diff --git a/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_s.S b/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_s.S index 530a815..6e732a8 100644 --- a/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_s.S +++ b/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_s.S @@ -81,7 +81,7 @@ #define qT0 v10.2s #define qT1 v11.2s - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name // Define stack arguments diff --git a/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix4_fs_s.S b/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix4_fs_s.S index 624ef3e..53a5822 100644 --- a/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix4_fs_s.S +++ b/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix4_fs_s.S @@ -94,7 +94,7 @@ #define dZi3 v23.2s - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name // Define stack arguments diff --git a/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix4_ls_s.S b/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix4_ls_s.S index 2fc2e60..6cc8acb 100644 --- a/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix4_ls_s.S +++ b/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix4_ls_s.S @@ -124,7 +124,7 @@ #define dZip v24.2s #define dZip8b v24.8b - .MACRO FFTSTAGE scaled, inverse , name + .macro FFTSTAGE scaled, inverse , name // Define stack arguments diff --git a/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix4_s.S b/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix4_s.S index 830fd16..7442e0d 100644 --- a/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix4_s.S +++ b/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix4_s.S @@ -108,7 +108,7 @@ #define dZr3 v26.2s #define dZi3 v27.2s - .MACRO FFTSTAGE scaled, inverse , name + .macro FFTSTAGE scaled, inverse , name // Define stack arguments diff --git a/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix8_fs_s.S b/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix8_fs_s.S index f348e6a..03969be 100644 --- a/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix8_fs_s.S +++ b/dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix8_fs_s.S @@ -174,7 +174,7 @@ #define dT0s v14.s #define dT1 v15.2s - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name // Define stack arguments @@ -294,7 +294,7 @@ radix8fsGrpZeroSetLoop\name : st2 {dYr6,dYi6},[pDst],step1 // store y6 - .ELSE + .else fadd dYr6,dVr2,dVi6 fsub dYi6,dVi2,dVr6 @@ -320,7 +320,7 @@ radix8fsGrpZeroSetLoop\name : st2 {dYr2,dYi2},[pDst],step1 // store y6 - .ENDIF + .endif // finish first stage of 8 point FFT @@ -396,7 +396,7 @@ radix8SkipLastUpdateInv\name: st2 {dYr7,dYi7},[pDst] // store y7 ADD pDst, pDst, #16 - .ELSE + .else // calculate b*v7 fmul dT1,dVr7,dT0[0] @@ -442,7 +442,7 @@ radix8SkipLastUpdateFwd\name: st2 {dYr3,dYi3},[pDst],step1 // store y5 st2 {dYr1,dYi1},[pDst],#16 // store y7 - .ENDIF + .endif // update pDst for the next set diff --git a/dl/sp/src/arm/armv7/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S b/dl/sp/src/arm/armv7/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S index 75d6711..700a09f 100644 --- a/dl/sp/src/arm/armv7/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S +++ b/dl/sp/src/arm/armv7/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S @@ -101,7 +101,7 @@ - .MACRO FFTSTAGE scaled, inverse,name + .macro FFTSTAGE scaled, inverse,name @// Initialize half now. movw N, #0x0000 diff --git a/dl/sp/src/arm/armv7/armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S b/dl/sp/src/arm/armv7/armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S index c2feb0b..68dcde9 100644 --- a/dl/sp/src/arm/armv7/armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S +++ b/dl/sp/src/arm/armv7/armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S @@ -73,7 +73,7 @@ - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @// Update grpCount and grpSize rightaway inorder to reuse pGrpCount @// and pGrpSize regs diff --git a/dl/sp/src/arm/armv7/armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S b/dl/sp/src/arm/armv7/armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S index 3bd4725..e3b88da 100644 --- a/dl/sp/src/arm/armv7/armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S +++ b/dl/sp/src/arm/armv7/armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S @@ -77,7 +77,7 @@ - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @// Define stack arguments diff --git a/dl/sp/src/arm/armv7/armSP_FFT_CToC_FC32_Radix4_unsafe_s.S b/dl/sp/src/arm/armv7/armSP_FFT_CToC_FC32_Radix4_unsafe_s.S index 00e48d1..e53fe59 100644 --- a/dl/sp/src/arm/armv7/armSP_FFT_CToC_FC32_Radix4_unsafe_s.S +++ b/dl/sp/src/arm/armv7/armSP_FFT_CToC_FC32_Radix4_unsafe_s.S @@ -86,7 +86,7 @@ - .MACRO FFTSTAGE scaled, inverse , name + .macro FFTSTAGE scaled, inverse , name @// Define stack arguments diff --git a/dl/sp/src/arm/armv7/armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S b/dl/sp/src/arm/armv7/armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S index 4ac2da4..e74c999 100644 --- a/dl/sp/src/arm/armv7/armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S +++ b/dl/sp/src/arm/armv7/armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S @@ -93,7 +93,7 @@ @// Define constants - .MACRO FFTSTAGE scaled, inverse , name + .macro FFTSTAGE scaled, inverse , name @// Define stack arguments @@ -342,7 +342,7 @@ grpZeroSetLoop\name: mov pDst, pPingPongBuf - .ENDM + .endm @@ -383,4 +383,4 @@ grpZeroSetLoop\name: @// Guarding implementation by the processor name - .END + .end diff --git a/dl/sp/src/arm/neon/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S index f9dd26e..ca0f29e 100644 --- a/dl/sp/src/arm/neon/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S @@ -126,7 +126,7 @@ .set ARMsFFTSpec_pTwiddle, 8 .set ARMsFFTSpec_pBuf, 12 - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @// Read the size from structure and take log LDR N, [pFFTSpec, #ARMsFFTSpec_N] diff --git a/dl/sp/src/arm/neon/armSP_FFTInv_CCSToR_S16_preTwiddleRadix2_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFTInv_CCSToR_S16_preTwiddleRadix2_unsafe_s.S index 950defd..52d2eeb 100644 --- a/dl/sp/src/arm/neon/armSP_FFTInv_CCSToR_S16_preTwiddleRadix2_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFTInv_CCSToR_S16_preTwiddleRadix2_unsafe_s.S @@ -116,7 +116,7 @@ .set ARMsFFTSpec_pTwiddle, 8 .set ARMsFFTSpec_pBuf, 12 - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @ Read the size from structure and take log LDR N, [pFFTSpec, #ARMsFFTSpec_N] diff --git a/dl/sp/src/arm/neon/armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe_s.S index 9959f8f..d0664f3 100644 --- a/dl/sp/src/arm/neon/armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe_s.S @@ -133,7 +133,7 @@ .set ARMsFFTSpec_pBuf, 12 - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @// Read the size from structure and take log LDR N, [pFFTSpec, #ARMsFFTSpec_N] diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S index 88a08ff..bf22677 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S @@ -73,7 +73,7 @@ #define dY1 D3.F32 - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @// Define stack arguments diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix2_ls_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix2_ls_unsafe_s.S index 85b8529..466e978 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix2_ls_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix2_ls_unsafe_s.S @@ -73,7 +73,7 @@ #define qT0 d10.f32 #define qT1 d12.f32 - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name MOV outPointStep,subFFTSize,LSL #3 diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix2_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix2_unsafe_s.S index 20c35e1..034e49e 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix2_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix2_unsafe_s.S @@ -82,7 +82,7 @@ #define qT1 D11.F32 - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @// Define stack arguments diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S index dbe170c..0bae159 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S @@ -106,7 +106,7 @@ #define qZ3 Q11.F32 - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @// Define stack arguments diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S index af86b91..897e9ec 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S @@ -128,7 +128,7 @@ - .MACRO FFTSTAGE scaled, inverse , name + .macro FFTSTAGE scaled, inverse , name @// Define stack arguments diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix4_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix4_unsafe_s.S index 8f63eb8..7f9475e 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix4_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix4_unsafe_s.S @@ -119,7 +119,7 @@ #define qZ2 Q12.F32 #define qZ3 Q13.F32 - .MACRO FFTSTAGE scaled, inverse , name + .macro FFTSTAGE scaled, inverse , name @// Define stack arguments diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S index 19a2f25..63e75e2 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S @@ -173,7 +173,7 @@ #define dT0 D14.F32 #define dT1 D15.F32 - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @// Define stack arguments @@ -259,7 +259,7 @@ radix8fsGrpZeroSetLoop\name : VSUB qU5,qX2,qX6 VST2 {dYr6,dYi6},[pDst :128],step1 @// store y6 - .ELSE + .else VADD dYr6,dVr2,dVi6 VSUB dYi6,dVi2,dVr6 @@ -276,7 +276,7 @@ radix8fsGrpZeroSetLoop\name : VST2 {dYr2,dYi2},[pDst :128],step1 @// store y6 - .ENDIF + .endif @// finish first stage of 8 point FFT @@ -346,7 +346,7 @@ radix8SkipLastUpdateInv\name: VST2 {dYr7,dYi7},[pDst :128] @// store y7 ADD pDst, pDst, #16 - .ELSE + .else @// calculate b*v7 VMUL dT1,dVr7,dT0[0] @@ -388,7 +388,7 @@ radix8SkipLastUpdateFwd\name: VST2 {dYr3,dYi3},[pDst :128],step1 @// store y5 VST2 {dYr1,dYi1},[pDst :128]! @// store y7 - .ENDIF + .endif @// update pDst for the next set diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix2_fs_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix2_fs_unsafe_s.S index 4bdbb52..adbb870 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix2_fs_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix2_fs_unsafe_s.S @@ -85,7 +85,7 @@ #define dY1S32 D3.S32 - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @// Define stack arguments @@ -120,13 +120,13 @@ grpZeroSetLoop\name: VHADD dY0,dX0,dX1 VHSUB dY1,dX0,dX1 - .ELSE + .else VADD dY0,dX0,dX1 VSUB dY1,dX0,dX1 - .ENDIF + .endif VST1 {dY0S32[0]},[pDst],outPointStep VST1 {dY1S32[0]},[pDst],dstStep @// dstStep = step = -pointStep + 4 @@ -167,4 +167,4 @@ grpZeroSetLoop\name: - .END + .end diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix2_ls_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix2_ls_unsafe_s.S index 94b3d49..091e1c0 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix2_ls_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix2_ls_unsafe_s.S @@ -91,7 +91,7 @@ #define qT1 Q6.S32 - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name MOV outPointStep,subFFTSize,LSL #2 @@ -129,13 +129,13 @@ grpLoop\name: VMULL qT1,dXi1,dWr VMLSL qT1,dXr1,dWi @// imag part - .ELSE + .else VMULL qT0,dXr1,dWr VMLSL qT0,dXi1,dWi @// real part VMULL qT1,dXi1,dWr VMLAL qT1,dXr1,dWi @// imag part - .ENDIF + .endif VRSHRN dXr1,qT0,#15 VRSHRN dXi1,qT1,#15 @@ -148,7 +148,7 @@ grpLoop\name: VHADD dYr1,dXr0,dXr1 VHADD dYi1,dXi0,dXi1 - .ELSE + .else VSUB dYr0,dXr0,dXr1 VSUB dYi0,dXi0,dXi1 @@ -156,7 +156,7 @@ grpLoop\name: VADD dYi1,dXi0,dXi1 - .ENDIF + .endif VST2 {dYr0[0],dYi0[0]},[pDst]! VST2 {dYr0[1],dYi0[1]},[pDst],step @// step = -4+outPointStep @@ -207,4 +207,4 @@ grpLoop\name: - .END + .end diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix2_ps_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix2_ps_unsafe_s.S index 2b34d99..396b2e0 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix2_ps_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix2_ps_unsafe_s.S @@ -87,7 +87,7 @@ #define qT1 Q6.S32 - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @// Define stack arguments @@ -136,13 +136,13 @@ grpLoop\name: VMULL qT1,dX3,dW1 VMLSL qT1,dX1,dW2 @// imag part - .ELSE + .else VMULL qT0,dX1,dW1 VMLSL qT0,dX3,dW2 @// real part VMULL qT1,dX3,dW1 VMLAL qT1,dX1,dW2 @// imag part - .ENDIF + .endif VRSHRN dX1,qT0,#15 VRSHRN dX3,qT1,#15 @@ -157,7 +157,7 @@ grpLoop\name: VHSUB dY2,dX2,dX3 VHADD dY3,dX2,dX3 - .ELSE + .else VSUB dY0,dX0,dX1 VADD dY1,dX0,dX1 @@ -166,7 +166,7 @@ grpLoop\name: - .ENDIF + .endif VST1 dY0,[pDst],outPointStep @// point0: of set0,set1 of grp0 VST1 dY1,[pDst],dstStep @// dstStep = -outPointStep + 8 @@ -213,4 +213,4 @@ grpLoop\name: - .END + .end diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix2_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix2_unsafe_s.S index 17e0415..6229364 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix2_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix2_unsafe_s.S @@ -89,7 +89,7 @@ - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @// Define stack arguments @@ -141,14 +141,14 @@ setLoop\name: VMULL qT1,dX3,dW[0] VMLSL qT1,dX2,dW[1] @// imag part - .ELSE + .else VMULL qT0,dX2,dW[0] VMLSL qT0,dX3,dW[1] @// real part VMULL qT1,dX3,dW[0] VMLAL qT1,dX2,dW[1] @// imag part - .ENDIF + .endif VRSHRN dX2,qT0,#15 VRSHRN dX3,qT1,#15 @@ -159,13 +159,13 @@ setLoop\name: VHADD dY2,dX0,dX2 VHADD dY3,dX1,dX3 - .ELSE + .else VSUB dY0,dX0,dX2 VSUB dY1,dX1,dX3 VADD dY2,dX0,dX2 VADD dY3,dX1,dX3 - .ENDIF + .endif VST2 {dY0,dY1},[pDst],outPointStep VST2 {dY2,dY3},[pDst],dstStep @// dstStep = -outPointStep + 16 @@ -216,4 +216,4 @@ setLoop\name: - .END + .end diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix4_fs_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix4_fs_unsafe_s.S index 049621b..07b4812 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix4_fs_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix4_fs_unsafe_s.S @@ -113,7 +113,7 @@ #define qZ1 Q9.S16 - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @// Define stack arguments @@ -147,9 +147,9 @@ .ifeqs "\scaled", "TRUE" VHADD qY0,qX0,qX2 @// u0 - .ELSE + .else VADD qY0,qX0,qX2 @// u0 - .ENDIF + .endif RSB step3,pointStep,#0 @// grp = 0 a special case since all the twiddle factors are 1 @@ -195,7 +195,7 @@ grpZeroSetLoop\name: VST2 {dZr2,dZi2},[pDst :128],setStep - .ELSE + .else VHADD dZr2,dYr2,dYi3 @// y1 VHSUB dZi2,dYi2,dYr3 @@ -210,10 +210,10 @@ grpZeroSetLoop\name: VHADD qY0,qX0,qX2 @// u0 (next loop) VST2 {dZr3,dZi3},[pDst :128],setStep - .ENDIF + .endif - .ELSE + .else @// finish first stage of 4 point FFT @@ -249,7 +249,7 @@ grpZeroSetLoop\name: VST2 {dZr2,dZi2},[pDst :128],setStep - .ELSE + .else VADD dZr2,dYr2,dYi3 @// y1 VSUB dZi2,dYi2,dYr3 @@ -264,10 +264,10 @@ grpZeroSetLoop\name: VADD qY0,qX0,qX2 @// u0 (next loop) VST2 {dZr3,dZi3},[pDst :128],setStep - .ENDIF + .endif - .ENDIF + .endif BGT grpZeroSetLoop\name @@ -305,4 +305,4 @@ grpZeroSetLoop\name: - .END + .end diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix4_ls_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix4_ls_unsafe_s.S index 4e46a01..ec7c1ac 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix4_ls_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix4_ls_unsafe_s.S @@ -158,7 +158,7 @@ #define qZ3 Q14.S16 - .MACRO FFTSTAGE scaled, inverse , name + .macro FFTSTAGE scaled, inverse , name @// Define stack arguments @@ -218,13 +218,13 @@ grpLoop\name: VMULL qT1,dXi1,dW1r VMLSL qT1,dXr1,dW1i @// imag part - .ELSE + .else VMULL qT0,dXr1,dW1r VMLSL qT0,dXi1,dW1i @// real part VMULL qT1,dXi1,dW1r VMLAL qT1,dXr1,dW1i @// imag part - .ENDIF + .endif @// Load the first twiddle for 4 groups : w^1 @// w^1 twiddle (i+0,i+1,i+2,i+3) for group 0,1,2,3 @@ -235,13 +235,13 @@ grpLoop\name: VMULL qT3,dXi2,dW2r VMLSL qT3,dXr2,dW2i @// imag part - .ELSE + .else VMULL qT2,dXr2,dW2r VMLSL qT2,dXi2,dW2i @// real part VMULL qT3,dXi2,dW2r VMLAL qT3,dXr2,dW2i @// imag part - .ENDIF + .endif VRSHRN dZr1,qT0,#15 VRSHRN dZi1,qT1,#15 @@ -254,13 +254,13 @@ grpLoop\name: VMULL qT1,dXi3,dW3r VMLSL qT1,dXr3,dW3i @// imag part - .ELSE + .else VMULL qT0,dXr3,dW3r VMLSL qT0,dXi3,dW3i @// real part VMULL qT1,dXi3,dW3r VMLAL qT1,dXr3,dW3i @// imag part - .ENDIF + .endif VRSHRN dZr2,qT2,#15 VRSHRN dZi2,qT3,#15 @@ -296,7 +296,7 @@ grpLoop\name: VST2 {dZr2,dZi2},[pDst :128],outPointStep VST2 {dZr1,dZi1},[pDst :128],dstStep @// dstStep = -3*outPointStep + 16 - .ELSE + .else VHSUB dZr1,dYr0,dYi3 @// y1 = u0+ju3 VHADD dZi1,dYi0,dYr3 @@ -308,9 +308,9 @@ grpLoop\name: VST2 {dZr2,dZi2},[pDst :128],outPointStep VST2 {dZr3,dZi3},[pDst :128],dstStep @// dstStep = -3*outPointStep + 16 - .ENDIF + .endif - .ELSE + .else @// finish first stage of 4 point FFT @@ -338,7 +338,7 @@ grpLoop\name: VST2 {dZr2,dZi2},[pDst :128],outPointStep VST2 {dZr1,dZi1},[pDst :128],dstStep @// dstStep = -3*outPointStep + 16 - .ELSE + .else VSUB dZr1,dYr0,dYi3 @// y1 = u0+ju3 VADD dZi1,dYi0,dYr3 @@ -350,12 +350,12 @@ grpLoop\name: VST2 {dZr2,dZi2},[pDst :128],outPointStep VST2 {dZr3,dZi3},[pDst :128],dstStep @// dstStep = -3*outPointStep + 16 - .ENDIF + .endif - .ENDIF + .endif BGT grpLoop\name @@ -392,4 +392,4 @@ grpLoop\name: - .END + .end diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix4_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix4_unsafe_s.S index 7bdbe41..cd9f3cc 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix4_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix4_unsafe_s.S @@ -127,7 +127,7 @@ #define qZ3 Q13.S16 - .MACRO FFTSTAGE scaled, inverse , name + .macro FFTSTAGE scaled, inverse , name @// Define stack arguments @@ -190,13 +190,13 @@ setLoop\name: VMULL qT1,dXi1,dW1[0] VMLSL qT1,dXr1,dW1[1] @// imag part - .ELSE + .else VMULL qT0,dXr1,dW1[0] VMLSL qT0,dXi1,dW1[1] @// real part VMULL qT1,dXi1,dW1[0] VMLAL qT1,dXr1,dW1[1] @// imag part - .ENDIF + .endif .ifeqs "\inverse", "TRUE" VMULL qT2,dXr2,dW2[0] @@ -204,13 +204,13 @@ setLoop\name: VMULL qT3,dXi2,dW2[0] VMLSL qT3,dXr2,dW2[1] @// imag part - .ELSE + .else VMULL qT2,dXr2,dW2[0] VMLSL qT2,dXi2,dW2[1] @// real part VMULL qT3,dXi2,dW2[0] VMLAL qT3,dXr2,dW2[1] @// imag part - .ENDIF + .endif VLD2 {dXr3,dXi3},[pSrc :128],setStep @// data[3] & update pSrc for the next set @@ -226,13 +226,13 @@ setLoop\name: VMULL qT1,dXi3,dW3[0] VMLSL qT1,dXr3,dW3[1] @// imag part - .ELSE + .else VMULL qT0,dXr3,dW3[0] VMLSL qT0,dXi3,dW3[1] @// real part VMULL qT1,dXi3,dW3[0] VMLAL qT1,dXr3,dW3[1] @// imag part - .ENDIF + .endif VRSHRN dZr2,qT2,#15 VRSHRN dZi2,qT3,#15 @@ -271,7 +271,7 @@ setLoop\name: VST2 {dZr3,dZi3},[pDst :128],dstStep - .ELSE + .else VHSUB qZ0,qY2,qY1 @@ -288,10 +288,10 @@ setLoop\name: VST2 {dZr2,dZi2},[pDst :128],dstStep - .ENDIF + .endif - .ELSE + .else @// finish first stage of 4 point FFT VADD qY0,qX0,qZ2 @@ -321,7 +321,7 @@ setLoop\name: VST2 {dZr3,dZi3},[pDst :128],dstStep - .ELSE + .else VSUB qZ0,qY2,qY1 @@ -338,11 +338,11 @@ setLoop\name: VST2 {dZr2,dZi2},[pDst :128],dstStep - .ENDIF + .endif - .ENDIF + .endif BGT setLoop\name @@ -389,4 +389,4 @@ setLoop\name: - .END + .end diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix8_fs_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix8_fs_unsafe_s.S index f9ff37a..17e730d 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix8_fs_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC16_Radix8_fs_unsafe_s.S @@ -196,7 +196,7 @@ .set ONEBYSQRT2, 0x00005A82 @// Q15 format - .MACRO FFTSTAGE scaled, inverse , name + .macro FFTSTAGE scaled, inverse , name @// Define stack arguments @@ -281,7 +281,7 @@ grpZeroSetLoop\name: VHSUB qU5,qX2,qX6 VST2 {dYr6,dYi6},[pDst :128],step1 @// store y6 - .ELSE + .else VHADD dYr6,dVr2,dVi6 VHSUB dYi6,dVi2,dVr6 @@ -298,7 +298,7 @@ grpZeroSetLoop\name: VST2 {dYr2,dYi2},[pDst :128],step1 @// store y6 - .ENDIF + .endif @// finish first stage of 8 point FFT @@ -362,7 +362,7 @@ grpZeroSetLoop\name: #else VST2 {dYr7,dYi7},[pDst :128]! @// store y7 #endif - .ELSE + .else @// calculate b*v7 VQRDMULH dT1,dVr7,dT0[0] @@ -402,11 +402,11 @@ grpZeroSetLoop\name: VST2 {dYr1,dYi1},[pDst :128]! @// store y7 #endif - .ENDIF + .endif - .ELSE + .else @// finish first stage of 8 point FFT VADD qU0,qX0,qX4 @@ -443,7 +443,7 @@ grpZeroSetLoop\name: VSUB qU5,qX2,qX6 VST2 {dYr6,dYi6},[pDst :128],step1 @// store y6 - .ELSE + .else VADD dYr6,dVr2,dVi6 VSUB dYi6,dVi2,dVr6 @@ -460,7 +460,7 @@ grpZeroSetLoop\name: VST2 {dYr2,dYi2},[pDst :128],step1 @// store y6 - .ENDIF + .endif @// finish first stage of 8 point FFT @@ -524,7 +524,7 @@ grpZeroSetLoop\name: #else VST2 {dYr7,dYi7},[pDst :128]! @// store y7 #endif - .ELSE + .else @// calculate b*v7 VQRDMULH dT1,dVr7,dT0[0] @@ -564,10 +564,10 @@ grpZeroSetLoop\name: VST2 {dYr1,dYi1},[pDst :128]! @// store y7 #endif - .ENDIF + .endif - .ENDIF + .endif SUB pDst, pDst, step2 @// update pDst for the next set BGT grpZeroSetLoop\name @@ -608,4 +608,4 @@ grpZeroSetLoop\name: - .END + .end diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix2_fs_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix2_fs_unsafe_s.S index de589c9..77ba666 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix2_fs_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix2_fs_unsafe_s.S @@ -81,7 +81,7 @@ #define dY1 D3.S32 - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @// Define stack arguments @@ -116,13 +116,13 @@ grpZeroSetLoop\name : VHADD dY0,dX0,dX1 VHSUB dY1,dX0,dX1 - .ELSE + .else VADD dY0,dX0,dX1 VSUB dY1,dX0,dX1 - .ENDIF + .endif VST1 dY0,[pDst],outPointStep VST1 dY1,[pDst],dstStep @// dstStep = step = -pointStep + 8 diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix2_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix2_unsafe_s.S index 967d7b5..850aff3 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix2_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix2_unsafe_s.S @@ -91,7 +91,7 @@ - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @// Define stack arguments diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.S index 412b64f..d29f4eb 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.S @@ -114,7 +114,7 @@ #define qZ3 Q11.S32 - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @// Define stack arguments diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S index 91e5299..e86f551 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S @@ -136,7 +136,7 @@ - .MACRO FFTSTAGE scaled, inverse , name + .macro FFTSTAGE scaled, inverse , name @// Define stack arguments diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix4_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix4_unsafe_s.S index 22efea4..6cb1257 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix4_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix4_unsafe_s.S @@ -130,7 +130,7 @@ #define qZ3 Q13.S32 - .MACRO FFTSTAGE scaled, inverse , name + .macro FFTSTAGE scaled, inverse , name @// Define stack arguments diff --git a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S index d4d4abb..9aa7086 100644 --- a/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S +++ b/dl/sp/src/arm/neon/armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S @@ -187,7 +187,7 @@ #define dT0 D14.S32 #define dT1 D15.S32 - .MACRO FFTSTAGE scaled, inverse, name + .macro FFTSTAGE scaled, inverse, name @// Define stack arguments @@ -272,7 +272,7 @@ grpZeroSetLoop\name : VHSUB qU5,qX2,qX6 VST2 {dYr6,dYi6},[pDst :128],step1 @// store y6 - .ELSE + .else VHADD dYr6,dVr2,dVi6 VHSUB dYi6,dVi2,dVr6 @@ -289,7 +289,7 @@ grpZeroSetLoop\name : VST2 {dYr2,dYi2},[pDst :128],step1 @// store y6 - .ENDIF + .endif @// finish first stage of 8 point FFT @@ -353,7 +353,7 @@ grpZeroSetLoop\name : VST2 {dYr5,dYi5},[pDst :128],step1 @// store y5 VST2 {dYr7,dYi7},[pDst :128]! @// store y7 - .ELSE + .else @// calculate b*v7 VQRDMULH dT1,dVr7,dT0[0] @@ -390,11 +390,11 @@ grpZeroSetLoop\name : VST2 {dYr3,dYi3},[pDst :128],step1 @// store y5 VST2 {dYr1,dYi1},[pDst :128]! @// store y7 - .ENDIF + .endif - .ELSE + .else @// finish first stage of 8 point FFT VADD qU0,qX0,qX4 @@ -431,7 +431,7 @@ grpZeroSetLoop\name : VSUB qU5,qX2,qX6 VST2 {dYr6,dYi6},[pDst :128],step1 @// store y6 - .ELSE + .else VADD dYr6,dVr2,dVi6 VSUB dYi6,dVi2,dVr6 @@ -448,7 +448,7 @@ grpZeroSetLoop\name : VST2 {dYr2,dYi2},[pDst :128],step1 @// store y6 - .ENDIF + .endif @// finish first stage of 8 point FFT @@ -512,7 +512,7 @@ grpZeroSetLoop\name : VST2 {dYr5,dYi5},[pDst :128],step1 @// store y5 VST2 {dYr7,dYi7},[pDst :128]! @// store y7 - .ELSE + .else @// calculate b*v7 VQRDMULH dT1,dVr7,dT0[0] @@ -549,10 +549,10 @@ grpZeroSetLoop\name : VST2 {dYr3,dYi3},[pDst :128],step1 @// store y5 VST2 {dYr1,dYi1},[pDst :128]! @// store y7 - .ENDIF + .endif - .ENDIF + .endif SUB pDst, pDst, step2 @// update pDst for the next set BGT grpZeroSetLoop\name diff --git a/dl/sp/src/arm/neon/omxSP_FFTFwd_CToC_SC16_Sfs_s.S b/dl/sp/src/arm/neon/omxSP_FFTFwd_CToC_SC16_Sfs_s.S index a3c21ac..2f299d7 100644 --- a/dl/sp/src/arm/neon/omxSP_FFTFwd_CToC_SC16_Sfs_s.S +++ b/dl/sp/src/arm/neon/omxSP_FFTFwd_CToC_SC16_Sfs_s.S @@ -353,4 +353,4 @@ End: @// Write function tail M_END - .END + .end diff --git a/dl/sp/src/arm/neon/omxSP_FFTFwd_RToCCS_S16_Sfs_s.S b/dl/sp/src/arm/neon/omxSP_FFTFwd_RToCCS_S16_Sfs_s.S index e953077..3763fba 100644 --- a/dl/sp/src/arm/neon/omxSP_FFTFwd_RToCCS_S16_Sfs_s.S +++ b/dl/sp/src/arm/neon/omxSP_FFTFwd_RToCCS_S16_Sfs_s.S @@ -636,4 +636,4 @@ End: @ Write function tail M_END - .END + .end diff --git a/dl/sp/src/arm/neon/omxSP_FFTInv_CCSToR_S16_Sfs_s.S b/dl/sp/src/arm/neon/omxSP_FFTInv_CCSToR_S16_Sfs_s.S index 311dba9..ae0ae0d 100644 --- a/dl/sp/src/arm/neon/omxSP_FFTInv_CCSToR_S16_Sfs_s.S +++ b/dl/sp/src/arm/neon/omxSP_FFTInv_CCSToR_S16_Sfs_s.S @@ -298,4 +298,4 @@ End: - .END + .end diff --git a/dl/sp/src/arm/neon/omxSP_FFTInv_CToC_SC16_Sfs_s.S b/dl/sp/src/arm/neon/omxSP_FFTInv_CToC_SC16_Sfs_s.S index 2388d0f..152c3dc 100644 --- a/dl/sp/src/arm/neon/omxSP_FFTInv_CToC_SC16_Sfs_s.S +++ b/dl/sp/src/arm/neon/omxSP_FFTInv_CToC_SC16_Sfs_s.S @@ -339,4 +339,4 @@ End: - .END + .end |