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authorMarat Dukhan <maratek@gmail.com>2017-04-16 05:04:04 -0400
committerMarat Dukhan <maratek@gmail.com>2017-04-16 05:04:04 -0400
commit0fbcdfdc8f646dbf4b61b5bbb79175ebb5892cec (patch)
treed9138a6795bb0292161423957daeab172ca43ea0
parente25187d5e37485955ab84213661db7950eae618c (diff)
downloadcpuinfo-0fbcdfdc8f646dbf4b61b5bbb79175ebb5892cec.tar.gz
Fix x86 compilation problems
-rw-r--r--src/x86/api.h3
-rw-r--r--src/x86/cache/descriptor.c2
-rw-r--r--src/x86/init.c2
-rw-r--r--src/x86/isa.c7
-rw-r--r--src/x86/uarch.c4
5 files changed, 10 insertions, 8 deletions
diff --git a/src/x86/api.h b/src/x86/api.h
index 061e3e5..71ff976 100644
--- a/src/x86/api.h
+++ b/src/x86/api.h
@@ -76,7 +76,8 @@ enum cpuinfo_uarch cpuinfo_x86_decode_uarch(
const struct cpuinfo_x86_model_info model_info[restrict static 1]);
struct cpuinfo_x86_isa cpuinfo_x86_detect_isa(const struct cpuid_regs basic_info,
- uint32_t max_base_index, uint32_t max_extended_index, enum cpuinfo_vendor vendor);
+ uint32_t max_base_index, uint32_t max_extended_index,
+ enum cpuinfo_vendor vendor, enum cpuinfo_uarch uarch);
struct cpuinfo_x86_isa cpuinfo_x86_nacl_detect_isa(void);
void cpuinfo_x86_detect_topology(
diff --git a/src/x86/cache/descriptor.c b/src/x86/cache/descriptor.c
index 573fe47..28e18ce 100644
--- a/src/x86/cache/descriptor.c
+++ b/src/x86/cache/descriptor.c
@@ -891,7 +891,7 @@ void cpuinfo_x86_decode_cache_descriptor(
#if CPUINFO_ARCH_X86
case cpuinfo_vendor_cyrix:
case cpuinfo_vendor_nsc:
- *dtlb_4KB = itlb_4KB = (struct cpuinfo_tlb) {
+ *dtlb_4KB = *itlb_4KB = (struct cpuinfo_tlb) {
.entries = 32,
.associativity = 4,
.pages = CPUINFO_PAGE_SIZE_4KB
diff --git a/src/x86/init.c b/src/x86/init.c
index 4ee98d1..4b93856 100644
--- a/src/x86/init.c
+++ b/src/x86/init.c
@@ -50,7 +50,7 @@ void cpuinfo_x86_init_processor(struct cpuinfo_x86_processor processor[restrict
#ifdef __native_client__
cpuinfo_isa = cpuinfo_x86_nacl_detect_isa();
#else
- cpuinfo_isa = cpuinfo_x86_detect_isa(leaf1, max_base_index, max_extended_index, vendor);
+ cpuinfo_isa = cpuinfo_x86_detect_isa(leaf1, max_base_index, max_extended_index, vendor, uarch);
#endif
}
}
diff --git a/src/x86/isa.c b/src/x86/isa.c
index 0043451..62048bd 100644
--- a/src/x86/isa.c
+++ b/src/x86/isa.c
@@ -26,7 +26,8 @@
struct cpuinfo_x86_isa cpuinfo_x86_detect_isa(const struct cpuid_regs basic_info,
- uint32_t max_base_index, uint32_t max_extended_index, enum cpuinfo_vendor vendor)
+ uint32_t max_base_index, uint32_t max_extended_index,
+ enum cpuinfo_vendor vendor, enum cpuinfo_uarch uarch)
{
struct cpuinfo_x86_isa isa = { 0 };
@@ -99,7 +100,7 @@ struct cpuinfo_x86_isa cpuinfo_x86_detect_isa(const struct cpuid_regs basic_info
* - Intel, AMD: edx[bit 4] in basic info.
* - AMD: edx[bit 4] in extended info (reserved bit on Intel CPUs).
*/
- isa.rdtsc = !!((basic_info.edx[3] | extended_info.edx[3]) & UINT32_C(0x00000010));
+ isa.rdtsc = !!((basic_info.edx | extended_info.edx) & UINT32_C(0x00000010));
#endif
/*
@@ -196,7 +197,7 @@ struct cpuinfo_x86_isa cpuinfo_x86_detect_isa(const struct cpuid_regs basic_info
* - Intel, AMD: edx[bit 25] in basic info (SSE feature flag).
* - Pre-SSE AMD: edx[bit 22] in extended info (zero bit on Intel CPUs).
*/
- isa.mmx_plus = !!(basic_info.edx & UINT32_C(0x02000000) | extended_info.edx & UINT32_C(0x00400000));
+ isa.mmx_plus = !!((basic_info.edx & UINT32_C(0x02000000)) | (extended_info.edx & UINT32_C(0x00400000)));
#endif
/*
diff --git a/src/x86/uarch.c b/src/x86/uarch.c
index 7e8f89f..0bdfbe4 100644
--- a/src/x86/uarch.c
+++ b/src/x86/uarch.c
@@ -18,9 +18,9 @@ enum cpuinfo_uarch cpuinfo_x86_decode_uarch(
case 0x02: // Pentium (75, 90, 100, 120, 133, 150, 166, 200)
case 0x03: // Pentium OverDrive for Intel486-based systems
case 0x04: // Pentium MMX
- return cpuinfo_arch_p5;
+ return cpuinfo_uarch_p5;
case 0x09:
- return cpuinfo_arch_quark;
+ return cpuinfo_uarch_quark;
}
break;
#endif /* CPUINFO_ARCH_X86 */