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Diffstat (limited to 'v2/assets/Header/Lattice-Semiconductor/copyright.txt')
-rw-r--r-- | v2/assets/Header/Lattice-Semiconductor/copyright.txt | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/v2/assets/Header/Lattice-Semiconductor/copyright.txt b/v2/assets/Header/Lattice-Semiconductor/copyright.txt new file mode 100644 index 0000000..dcef381 --- /dev/null +++ b/v2/assets/Header/Lattice-Semiconductor/copyright.txt @@ -0,0 +1,34 @@ +// >>>>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<< +// -------------------------------------------------------------------- +// Copyright (c) 2013 by Lattice Semiconductor Corporation +// -------------------------------------------------------------------- +// +// Permission: +// +// Lattice Semiconductor grants permission to use this code for use +// in synthesis for any Lattice programmable logic product. Other +// use of this code, including the selling or duplication of any +// portion is strictly prohibited. +// +// Disclaimer: +// +// This VHDL or Verilog source code is intended as a design reference +// which illustrates how these types of functions can be implemented. +// It is the user's responsibility to verify their design for +// consistency and functionality through the use of formal +// verification methods. Lattice Semiconductor provides no warranty +// regarding the use or functionality of this code. +// +// -------------------------------------------------------------------- +// +// Lattice Semiconductor Corporation +// 5555 NE Moore Court +// Hillsboro, OR 97214 +// U.S.A +// +// TEL: 1-800-Lattice (USA and Canada) +// +// web: http://www.latticesemi.com/ +// email: techsupport@latticesemi.com +// +// --------------------------------------------------------------------
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