diff options
| author | Caio Oliveira <caio.oliveira@intel.com> | 2024-02-26 21:33:05 -0800 |
|---|---|---|
| committer | Marge Bot <emma+marge@anholt.net> | 2024-02-28 05:45:39 +0000 |
| commit | 63a4a4400a64d80886fdb53a04cb879b3884c831 (patch) | |
| tree | ec83bfb4da9c271003c28adec33e00ca857e48a5 | |
| parent | 5a3f65e67850575f830b2ae6ed3f37a3650c34b0 (diff) | |
| download | mesa3d-63a4a4400a64d80886fdb53a04cb879b3884c831.tar.gz | |
intel/brw: Remove edgeflag_is_last VS parameter
Suggested by Ken.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27691>
| -rw-r--r-- | src/intel/compiler/brw_compile_vs.cpp | 2 | ||||
| -rw-r--r-- | src/intel/compiler/brw_compiler.h | 2 | ||||
| -rw-r--r-- | src/intel/compiler/brw_nir.c | 15 | ||||
| -rw-r--r-- | src/intel/compiler/brw_nir.h | 3 |
4 files changed, 5 insertions, 17 deletions
diff --git a/src/intel/compiler/brw_compile_vs.cpp b/src/intel/compiler/brw_compile_vs.cpp index 41c38d6a679..ecc07765f95 100644 --- a/src/intel/compiler/brw_compile_vs.cpp +++ b/src/intel/compiler/brw_compile_vs.cpp @@ -31,7 +31,7 @@ brw_compile_vs(const struct brw_compiler *compiler, prog_data->inputs_read = nir->info.inputs_read; prog_data->double_inputs_read = nir->info.vs.double_inputs; - brw_nir_lower_vs_inputs(nir, params->edgeflag_is_last); + brw_nir_lower_vs_inputs(nir); brw_nir_lower_vue_outputs(nir); brw_postprocess_nir(nir, compiler, debug_enabled, key->base.robust_flags); diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h index aa255290fc3..b13d4399dd9 100644 --- a/src/intel/compiler/brw_compiler.h +++ b/src/intel/compiler/brw_compiler.h @@ -1534,8 +1534,6 @@ struct brw_compile_vs_params { const struct brw_vs_prog_key *key; struct brw_vs_prog_data *prog_data; - - bool edgeflag_is_last; /* true for gallium */ }; /** diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index e8d9b52a6bf..a4e4f0585f8 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -343,8 +343,7 @@ remap_patch_urb_offsets(nir_block *block, nir_builder *b, } void -brw_nir_lower_vs_inputs(nir_shader *nir, - bool edgeflag_is_last) +brw_nir_lower_vs_inputs(nir_shader *nir) { /* Start with the location of the variable's base. */ nir_foreach_shader_in_variable(var, nir) @@ -448,16 +447,8 @@ brw_nir_lower_vs_inputs(nir_shader *nir, * before it and counting the bits. */ int attr = nir_intrinsic_base(intrin); - uint64_t inputs_read = nir->info.inputs_read; - int slot = -1; - if (edgeflag_is_last) { - inputs_read &= ~BITFIELD64_BIT(VERT_ATTRIB_EDGEFLAG); - if (attr == VERT_ATTRIB_EDGEFLAG) - slot = num_inputs - 1; - } - if (slot == -1) - slot = util_bitcount64(inputs_read & - BITFIELD64_MASK(attr)); + int slot = util_bitcount64(nir->info.inputs_read & + BITFIELD64_MASK(attr)); nir_intrinsic_set_base(intrin, slot); break; } diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h index f7923443fbe..54781da84c2 100644 --- a/src/intel/compiler/brw_nir.h +++ b/src/intel/compiler/brw_nir.h @@ -151,8 +151,7 @@ bool brw_nir_lower_cs_intrinsics(nir_shader *nir, bool brw_nir_lower_alpha_to_coverage(nir_shader *shader, const struct brw_wm_prog_key *key, const struct brw_wm_prog_data *prog_data); -void brw_nir_lower_vs_inputs(nir_shader *nir, - bool edgeflag_is_last); +void brw_nir_lower_vs_inputs(nir_shader *nir); void brw_nir_lower_vue_inputs(nir_shader *nir, const struct intel_vue_map *vue_map); void brw_nir_lower_tes_inputs(nir_shader *nir, const struct intel_vue_map *vue); |