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-rw-r--r--target-mips/translate.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 8b62e66ca6..c23cb94538 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1548,6 +1548,7 @@ static inline void check_insn_opc_removed(DisasContext *ctx, int flags)
}
}
+#ifdef TARGET_MIPS64
/* This code generates a "reserved instruction" exception if 64-bit
instructions are not enabled. */
static inline void check_mips_64(DisasContext *ctx)
@@ -1555,6 +1556,7 @@ static inline void check_mips_64(DisasContext *ctx)
if (unlikely(!(ctx->hflags & MIPS_HFLAG_64)))
generate_exception(ctx, EXCP_RI);
}
+#endif
/* Define small wrappers for gen_load_fpr* so that we have a uniform
calling interface for 32 and 64-bit FPRs. No sense in changing