diff options
author | Elliott Hughes <enh@google.com> | 2021-05-05 00:17:48 +0000 |
---|---|---|
committer | Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com> | 2021-05-05 00:17:48 +0000 |
commit | 5943036c6e805d2115112a4d730ca95fa4915802 (patch) | |
tree | 7ff10fe44e533e43b4643a5d5731ab66caa521aa /Tremolo | |
parent | 28a2a35c81ec9c046a207b379379e8ef32bcc4dd (diff) | |
parent | 16873a6b40ec1552a35abbd6f86def152a89a8cd (diff) | |
download | tremolo-5943036c6e805d2115112a4d730ca95fa4915802.tar.gz |
Merge "Fix ARM assembler to work with clang's as." am: c2d40e53e5 am: 16873a6b40
Original change: https://android-review.googlesource.com/c/platform/external/tremolo/+/1692372
Change-Id: I24e41244389ede033e25129a73a1fd964e9b3c48
Diffstat (limited to 'Tremolo')
-rw-r--r-- | Tremolo/dpen.s | 4 | ||||
-rw-r--r-- | Tremolo/mdctARM.s | 8 |
2 files changed, 10 insertions, 2 deletions
diff --git a/Tremolo/dpen.s b/Tremolo/dpen.s index 3ed3b36..cc492cf 100644 --- a/Tremolo/dpen.s +++ b/Tremolo/dpen.s @@ -143,7 +143,7 @@ m1_loop: BLT duff CMP r8, r7 @ if bit==0 (chase+bit==chase) (sets C) - LDRNEB r14,[r6, r7] @ r14= t[chase] + LDRBNE r14,[r6, r7] @ r14= t[chase] MOVEQ r14,#128 ADC r12,r8, r6 @ r12= chase+bit+1+t LDRB r14,[r12,r14,LSR #7] @ r14= t[chase+bit+1+(!bit || t[chase]0x0x80)] @@ -202,7 +202,7 @@ m3_loop: MOV r7, r7, LSL #1 CMP r8, r7 @ if bit==0 (chase+bit==chase) sets C - LDRNEH r14,[r6, r7] @ r14= t[chase] + LDRHNE r14,[r6, r7] @ r14= t[chase] MOVEQ r14,#0x8000 ADC r12,r8, r14,LSR #15 @ r12= 1+((chase+bit)<<1)+(!bit || t[chase]0x0x8000) ADC r12,r12,r14,LSR #15 @ r12= t + (1+chase+bit+(!bit || t[chase]0x0x8000))<<1 diff --git a/Tremolo/mdctARM.s b/Tremolo/mdctARM.s index c403f6c..c16c5e9 100644 --- a/Tremolo/mdctARM.s +++ b/Tremolo/mdctARM.s @@ -55,6 +55,14 @@ .hidden sincos_lookup0 .hidden sincos_lookup1 + @ clang doesn't support ADRL. + @ Workaround based on that at https://bugs.llvm.org/show_bug.cgi?id=24350. + .macro ADRL reg:req, label:req + add \reg, pc, #((\label - .L_adrl_\@) & 0xff00) + add \reg, \reg, #((\label - .L_adrl_\@) - ((\label - .L_adrl_\@) & 0xff00)) + .L_adrl_\@: + .endm + mdct_unroll_prelap: @ r0 = out @ r1 = post |