diff options
Diffstat (limited to 'none/tests/arm64/fp_and_simd.c')
| -rw-r--r-- | none/tests/arm64/fp_and_simd.c | 77 |
1 files changed, 32 insertions, 45 deletions
diff --git a/none/tests/arm64/fp_and_simd.c b/none/tests/arm64/fp_and_simd.c index fb0c7e6d0..0aba2c8f8 100644 --- a/none/tests/arm64/fp_and_simd.c +++ b/none/tests/arm64/fp_and_simd.c @@ -3,6 +3,7 @@ #include <assert.h> #include <malloc.h> // memalign #include <string.h> // memset +#include "tests/malloc.h" #include <math.h> // isnormal typedef unsigned char UChar; @@ -92,16 +93,6 @@ static void showBlock ( const char* msg, V128* block, Int nBlock ) } } -__attribute__((unused)) -static void* memalign16(size_t szB) -{ - void* x; - x = memalign(16, szB); - assert(x); - assert(0 == ((16-1) & (unsigned long)x)); - return x; -} - static ULong dup4x16 ( UInt x ) { ULong r = x & 0xF; @@ -4536,23 +4527,23 @@ GEN_UNARY_TEST(xtn2, 16b, 8h) // GNU assembler (GNU Binutils) 2.24.0.20140311 Linaro 2014.03 // cannot be persuaded to accept those instructions (AFAICT). -//GEN_TWOVEC_TEST(aesd_16b_16b, "aesd v6.16b, v27.16b", 6, 27) -//GEN_TWOVEC_TEST(aese_16b_16b, "aese v6.16b, v27.16b", 6, 27) -//GEN_TWOVEC_TEST(aesimc_16b_16b, "aesimc v6.16b, v27.16b", 6, 27) -//GEN_TWOVEC_TEST(aesmc_16b_16b, "aesmc v6.16b, v27.16b", 6, 27) -// -//GEN_THREEVEC_TEST(sha1c_q_s_4s, "sha1c q29, s28, v27.4s", 29,28,27) -//GEN_TWOVEC_TEST(sha1h_s_s, "sha1h s6, s27", 6, 27) -//GEN_THREEVEC_TEST(sha1m_q_s_4s, "sha1m q29, s28, v27.4s", 29,28,27) -//GEN_THREEVEC_TEST(sha1p_q_s_4s, "sha1p q29, s28, v27.4s", 29,28,27) -//GEN_THREEVEC_TEST(sha1su0_4s_4s_4s, "sha1su0 v29.4s, v28.4s, v27.4s", 29,28,27) -//GEN_TWOVEC_TEST(sha1su1_4s_4s, "sha1su1 v6.4s, v27.4s", 6, 27) -// -//GEN_THREEVEC_TEST(sha256h2_q_q_4s, "sha256h2 q29, q28, v27.4s", 29,28,27) -//GEN_THREEVEC_TEST(sha256h_q_q_4s, "sha256h q29, q28, v27.4s", 29,28,27) -//GEN_TWOVEC_TEST(sha256su0_4s_4s, "sha256su0 v6.4s, v27.4s", 6, 27) -//GEN_THREEVEC_TEST(sha256su1_4s_4s_4s, "sha256su1 v29.4s, v28.4s, v27.4s", -// 29,28,27) +GEN_TWOVEC_TEST(aesd_16b_16b, "aesd v6.16b, v27.16b", 6, 27) +GEN_TWOVEC_TEST(aese_16b_16b, "aese v6.16b, v27.16b", 6, 27) +GEN_TWOVEC_TEST(aesimc_16b_16b, "aesimc v6.16b, v27.16b", 6, 27) +GEN_TWOVEC_TEST(aesmc_16b_16b, "aesmc v6.16b, v27.16b", 6, 27) + +GEN_THREEVEC_TEST(sha1c_q_s_4s, "sha1c q29, s28, v27.4s", 29,28,27) +GEN_TWOVEC_TEST(sha1h_s_s, "sha1h s6, s27", 6, 27) +GEN_THREEVEC_TEST(sha1m_q_s_4s, "sha1m q29, s28, v27.4s", 29,28,27) +GEN_THREEVEC_TEST(sha1p_q_s_4s, "sha1p q29, s28, v27.4s", 29,28,27) +GEN_THREEVEC_TEST(sha1su0_4s_4s_4s, "sha1su0 v29.4s, v28.4s, v27.4s", 29,28,27) +GEN_TWOVEC_TEST(sha1su1_4s_4s, "sha1su1 v6.4s, v27.4s", 6, 27) + +GEN_THREEVEC_TEST(sha256h2_q_q_4s, "sha256h2 q29, q28, v27.4s", 29,28,27) +GEN_THREEVEC_TEST(sha256h_q_q_4s, "sha256h q29, q28, v27.4s", 29,28,27) +GEN_TWOVEC_TEST(sha256su0_4s_4s, "sha256su0 v6.4s, v27.4s", 6, 27) +GEN_THREEVEC_TEST(sha256su1_4s_4s_4s, "sha256su1 v29.4s, v28.4s, v27.4s", + 29,28,27) /* ---------------------------------------------------------------- */ @@ -7394,18 +7385,14 @@ int main ( void ) // ======================== CRYPTO ======================== - // These tests are believed to be correct but are disabled because - // GNU assembler (GNU Binutils) 2.24.0.20140311 Linaro 2014.03 - // cannot be persuaded to accept those instructions (AFAICT). - // aesd 16b (aes single round decryption) // aese 16b (aes single round encryption) // aesimc 16b (aes inverse mix columns) // aesmc 16b (aes mix columns) - //if (0) test_aesd_16b_16b(TyNONE); - //if (0) test_aese_16b_16b(TyNONE); - //if (0) test_aesimc_16b_16b(TyNONE); - //if (0) test_aesmc_16b_16b(TyNONE); + if (0) test_aesd_16b_16b(TyNONE); + if (0) test_aese_16b_16b(TyNONE); + if (0) test_aesimc_16b_16b(TyNONE); + if (0) test_aesmc_16b_16b(TyNONE); // sha1c q_s_4s // sha1h s_s @@ -7413,21 +7400,21 @@ int main ( void ) // sha1p q_s_4s // sha1su0 4s_4s_4s // sha1su1 4s_4s - //if (0) test_sha1c_q_s_4s(TyNONE); - //if (0) test_sha1h_s_s(TyNONE); - //if (0) test_sha1m_q_s_4s(TyNONE); - //if (0) test_sha1p_q_s_4s(TyNONE); - //if (0) test_sha1su0_4s_4s_4s(TyNONE); - //if (0) test_sha1su1_4s_4s(TyNONE); + if (0) test_sha1c_q_s_4s(TyNONE); + if (0) test_sha1h_s_s(TyNONE); + if (0) test_sha1m_q_s_4s(TyNONE); + if (0) test_sha1p_q_s_4s(TyNONE); + if (0) test_sha1su0_4s_4s_4s(TyNONE); + if (0) test_sha1su1_4s_4s(TyNONE); // sha256h2 q_q_4s // sha256h q_q_4s // sha256su0 4s_4s // sha256su1 4s_4s_4s - //if (0) test_sha256h2_q_q_4s(TyNONE); - //if (0) test_sha256h_q_q_4s(TyNONE); - //if (0) test_sha256su0_4s_4s(TyNONE); - //if (0) test_sha256su1_4s_4s_4s(TyNONE); + if (0) test_sha256h2_q_q_4s(TyNONE); + if (0) test_sha256h_q_q_4s(TyNONE); + if (0) test_sha256su0_4s_4s(TyNONE); + if (0) test_sha256su1_4s_4s_4s(TyNONE); return 0; } |