external/vixl.git -

Age	Commit message (Expand)	Author
2020-11-10	Revert^2 "Merge remote-tracking branch 'aosp/upstream-master' into..."	Artem Serov
2020-10-28	Revert "Merge remote-tracking branch 'aosp/upstream-master' into..."	Ulyana Trafimovich
2020-06-25	[sve] Remove extra spaces from load/store register lists.	Jacob Bramley
2020-06-24	[sve] Make modifiers lower case in disassembly	Martyn Capewell
2020-06-19	[sve] Trace writes to FFR.	Jacob Bramley
2020-01-13	[sve] Add SVE tests to cpufeatures tests.	Jacob Bramley
2019-12-16	[sve] Update simulator tracing for SVE.	Jacob Bramley
2019-12-16	[sve] Make pre-SVE register tracing consistent.	Jacob Bramley
2019-05-17	[sve] Basic SVE Z register tracing.	TatWai Chong
2018-09-06	Check CPU features in the Simulator and Disassembler.	Jacob Bramley
2016-12-08	Trace taken branches in the A64 simulator.	Jacob Bramley
2016-10-26	Fix memory access tracing for st2, st3 and st4.	Jacob Bramley
2016-10-24	Fix simulation of NEON min/maxp and tbl	Martyn Capewell
2016-07-25	AArch64: Work around undefined behaviour of `printf` for NaNs.	Alexandre Rames
2016-05-13	VIXL Release 1.13	armvixl