summaryrefslogtreecommitdiff
path: root/peripheral/libmraa/src/x86/intel_galileo_rev_g.c
diff options
context:
space:
mode:
Diffstat (limited to 'peripheral/libmraa/src/x86/intel_galileo_rev_g.c')
-rw-r--r--peripheral/libmraa/src/x86/intel_galileo_rev_g.c637
1 files changed, 386 insertions, 251 deletions
diff --git a/peripheral/libmraa/src/x86/intel_galileo_rev_g.c b/peripheral/libmraa/src/x86/intel_galileo_rev_g.c
index 9c6583c..acdee01 100644
--- a/peripheral/libmraa/src/x86/intel_galileo_rev_g.c
+++ b/peripheral/libmraa/src/x86/intel_galileo_rev_g.c
@@ -91,33 +91,6 @@ mraa_intel_galileo_gen2_gpio_close_pre(mraa_gpio_context dev)
}
mraa_result_t
-mraa_intel_galileo_gen2_i2c_init_pre(unsigned int bus)
-{
- mraa_gpio_context io18 = mraa_gpio_init_raw(57);
- int status = 0;
-
- if (io18 == NULL) {
- return MRAA_ERROR_UNSPECIFIED;
- }
- status += mraa_gpio_dir(io18, MRAA_GPIO_IN);
- status += mraa_gpio_mode(io18, MRAA_GPIO_HIZ);
- mraa_gpio_close(io18);
-
- mraa_gpio_context io19 = mraa_gpio_init_raw(59);
- if (io19 == NULL) {
- return MRAA_ERROR_UNSPECIFIED;
- }
- status += mraa_gpio_dir(io19, MRAA_GPIO_IN);
- status += mraa_gpio_mode(io19, MRAA_GPIO_HIZ);
- mraa_gpio_close(io19);
-
- if (status > 0) {
- return MRAA_ERROR_UNSPECIFIED;
- }
- return MRAA_SUCCESS;
-}
-
-mraa_result_t
mraa_intel_galileo_gen2_pwm_period_replace(mraa_pwm_context dev, int period)
{
char bu[MAX_SIZE];
@@ -211,35 +184,6 @@ mraa_intel_galileo_gen2_gpio_mode_replace(mraa_gpio_context dev, mraa_gpio_mode_
return MRAA_SUCCESS;
}
-mraa_result_t
-mraa_intel_galileo_gen2_uart_init_pre(int index)
-{
- mraa_gpio_context io0_output = mraa_gpio_init_raw(32);
- if (io0_output == NULL) {
- return MRAA_ERROR_INVALID_RESOURCE;
- }
- mraa_gpio_context io1_output = mraa_gpio_init_raw(28);
- if (io1_output == NULL) {
- mraa_gpio_close(io0_output);
- return MRAA_ERROR_INVALID_RESOURCE;
- }
-
- int status = 0;
- status += mraa_gpio_dir(io0_output, MRAA_GPIO_OUT);
- status += mraa_gpio_dir(io1_output, MRAA_GPIO_OUT);
-
- status += mraa_gpio_write(io0_output, 1);
- status += mraa_gpio_write(io1_output, 0);
-
- mraa_gpio_close(io0_output);
- mraa_gpio_close(io1_output);
-
- if (status > 0) {
- return MRAA_ERROR_UNSPECIFIED;
- }
- return MRAA_SUCCESS;
-}
-
static mraa_result_t
mraa_intel_galileo_g2_mmap_unsetup()
{
@@ -341,10 +285,8 @@ mraa_intel_galileo_gen2()
}
b->adv_func->gpio_close_pre = &mraa_intel_galileo_gen2_gpio_close_pre;
b->adv_func->gpio_dir_pre = &mraa_intel_galileo_gen2_dir_pre;
- b->adv_func->i2c_init_pre = &mraa_intel_galileo_gen2_i2c_init_pre;
b->adv_func->pwm_period_replace = &mraa_intel_galileo_gen2_pwm_period_replace;
b->adv_func->gpio_mode_replace = &mraa_intel_galileo_gen2_gpio_mode_replace;
- b->adv_func->uart_init_pre = &mraa_intel_galileo_gen2_uart_init_pre;
b->adv_func->gpio_mmap_setup = &mraa_intel_galileo_g2_mmap_setup;
b->pins = (mraa_pininfo_t*) calloc(MRAA_INTEL_GALILEO_GEN_2_PINCOUNT, sizeof(mraa_pininfo_t));
@@ -357,376 +299,569 @@ mraa_intel_galileo_gen2()
b->pins[0].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 1, 0, 0, 0, 1 };
b->pins[0].gpio.pinmap = 11;
b->pins[0].gpio.parent_id = 0;
- b->pins[0].gpio.mux_total = 0;
+ b->pins[0].gpio.mux_total = 1;
+ b->pins[0].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[0].gpio.mux[0].pin = 33;
+ b->pins[0].gpio.mux[0].value = MRAA_GPIO_IN;
b->pins[0].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[0].gpio.output_enable = 32;
- b->pins[0].gpio.pullup_enable = 33;
b->pins[0].mmap.gpio.pinmap = 11;
strncpy(b->pins[0].mmap.mem_dev, "/dev/uio0", 12);
- b->pins[0].mmap.gpio.mux_total = 2;
- b->pins[0].mmap.gpio.mux[0].pin = 32;
- b->pins[0].mmap.gpio.mux[0].value = 0;
- b->pins[0].mmap.gpio.mux[1].pin = 11;
+ b->pins[0].mmap.gpio.mux_total = 3;
+ b->pins[0].mmap.gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[0].mmap.gpio.mux[0].pin = 33;
+ b->pins[0].mmap.gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[0].mmap.gpio.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[0].mmap.gpio.mux[1].pin = 32;
b->pins[0].mmap.gpio.mux[1].value = 0;
+ b->pins[0].mmap.gpio.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[0].mmap.gpio.mux[2].pin = 11;
+ b->pins[0].mmap.gpio.mux[2].value = 0;
b->pins[0].mmap.mem_sz = 0x1000;
b->pins[0].mmap.bit_pos = 3;
b->pins[0].uart.parent_id = 0;
- b->pins[0].uart.mux_total = 0;
+ b->pins[0].uart.mux_total = 2;
+ b->pins[0].uart.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[0].uart.mux[0].pin = 33;
+ b->pins[0].uart.mux[0].value = MRAA_GPIO_IN;
+ b->pins[0].uart.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[0].uart.mux[1].pin = 32;
+ b->pins[0].uart.mux[1].value = 1;
strncpy(b->pins[1].name, "IO1", 8);
b->pins[1].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 1, 0, 0, 0, 1 };
b->pins[1].gpio.pinmap = 12;
b->pins[1].gpio.parent_id = 0;
- b->pins[1].gpio.mux_total = 1;
- b->pins[1].gpio.mux[0].pin = 45;
- b->pins[1].gpio.mux[0].value = 0;
+ b->pins[1].gpio.mux_total = 2;
+ b->pins[1].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[1].gpio.mux[0].pin = 29;
+ b->pins[1].gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[1].gpio.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[1].gpio.mux[1].pin = 45;
+ b->pins[1].gpio.mux[1].value = 0;
b->pins[1].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[1].gpio.output_enable = 28;
- b->pins[1].gpio.pullup_enable = 29;
b->pins[1].mmap.gpio.pinmap = 12;
strncpy(b->pins[1].mmap.mem_dev, "/dev/uio0", 12);
- b->pins[1].mmap.gpio.mux_total = 3;
- b->pins[1].mmap.gpio.mux[0].pin = 45;
- b->pins[1].mmap.gpio.mux[0].value = 0;
- b->pins[1].mmap.gpio.mux[1].pin = 28;
+ b->pins[1].mmap.gpio.mux_total = 4;
+ b->pins[1].mmap.gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[1].mmap.gpio.mux[0].pin = 29;
+ b->pins[1].mmap.gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[1].mmap.gpio.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[1].mmap.gpio.mux[1].pin = 45;
b->pins[1].mmap.gpio.mux[1].value = 0;
- b->pins[1].mmap.gpio.mux[2].pin = 12;
+ b->pins[1].mmap.gpio.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[1].mmap.gpio.mux[2].pin = 28;
b->pins[1].mmap.gpio.mux[2].value = 0;
+ b->pins[1].mmap.gpio.mux[3].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[1].mmap.gpio.mux[3].pin = 12;
+ b->pins[1].mmap.gpio.mux[3].value = 0;
b->pins[1].mmap.mem_sz = 0x1000;
b->pins[1].mmap.bit_pos = 4;
b->pins[1].uart.parent_id = 0;
- b->pins[1].uart.mux_total = 1;
- b->pins[1].uart.mux[0].pin = 45;
- b->pins[1].uart.mux[0].value = 1;
+ b->pins[1].uart.mux_total = 3;
+ b->pins[1].uart.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[1].uart.mux[0].pin = 29;
+ b->pins[1].uart.mux[0].value = MRAA_GPIO_IN;
+ b->pins[1].uart.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[1].uart.mux[1].pin = 45;
+ b->pins[1].uart.mux[1].value = 1;
+ b->pins[1].uart.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[1].uart.mux[2].pin = 28;
+ b->pins[1].uart.mux[2].value = 0;
strncpy(b->pins[2].name, "IO2", 8);
- b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 1, 0, 0, 0 };
+ b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 1, 0, 0, 0, 0};
b->pins[2].gpio.pinmap = 13;
b->pins[2].gpio.parent_id = 0;
- b->pins[2].gpio.mux_total = 1;
- b->pins[2].gpio.mux[0].pin = 77;
- b->pins[2].gpio.mux[0].value = 0;
+ b->pins[2].gpio.mux_total = 2;
+ b->pins[2].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[2].gpio.mux[0].pin = 35;
+ b->pins[2].gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[2].gpio.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[2].gpio.mux[1].pin = 77;
+ b->pins[2].gpio.mux[1].value = 0;
b->pins[2].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[2].gpio.output_enable = 34;
- b->pins[2].gpio.pullup_enable = 35;
b->pins[2].mmap.gpio.pinmap = 13;
strncpy(b->pins[2].mmap.mem_dev, "/dev/uio0", 12);
- b->pins[2].mmap.gpio.mux_total = 3;
- b->pins[2].mmap.gpio.mux[0].pin = 77;
- b->pins[2].mmap.gpio.mux[0].value = 0;
- b->pins[2].mmap.gpio.mux[1].pin = 34;
+ b->pins[2].mmap.gpio.mux_total = 4;
+ b->pins[2].mmap.gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[2].mmap.gpio.mux[0].pin = 35;
+ b->pins[2].mmap.gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[2].mmap.gpio.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[2].mmap.gpio.mux[1].pin = 77;
b->pins[2].mmap.gpio.mux[1].value = 0;
- b->pins[2].mmap.gpio.mux[2].pin = 13;
+ b->pins[2].mmap.gpio.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[2].mmap.gpio.mux[2].pin = 34;
b->pins[2].mmap.gpio.mux[2].value = 0;
+ b->pins[2].mmap.gpio.mux[3].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[2].mmap.gpio.mux[3].pin = 13;
+ b->pins[2].mmap.gpio.mux[3].value = 0;
b->pins[2].mmap.mem_sz = 0x1000;
b->pins[2].mmap.bit_pos = 5;
strncpy(b->pins[3].name, "IO3", 8);
- b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 1, 0, 0, 0 };
+ b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 1, 0, 0, 0, 0 };
b->pins[3].gpio.pinmap = 14;
b->pins[3].gpio.parent_id = 0;
- b->pins[3].gpio.mux_total = 2;
- b->pins[3].gpio.mux[0].pin = 76;
- b->pins[3].gpio.mux[0].value = 0;
- b->pins[3].gpio.mux[1].pin = 64;
+ b->pins[3].gpio.mux_total = 3;
+ b->pins[3].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[3].gpio.mux[0].pin = 17;
+ b->pins[3].gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[3].gpio.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[3].gpio.mux[1].pin = 76;
b->pins[3].gpio.mux[1].value = 0;
+ b->pins[3].gpio.mux[2].pincmd = PINCMD_SET_VALUE;
+ b->pins[3].gpio.mux[2].pin = 64;
+ b->pins[3].gpio.mux[2].value = 0;
b->pins[3].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[3].gpio.output_enable = 16;
- b->pins[3].gpio.pullup_enable = 17;
b->pins[3].pwm.pinmap = 1;
b->pins[3].pwm.parent_id = 0;
- b->pins[3].pwm.mux_total = 3;
- b->pins[3].pwm.mux[0].pin = 76;
- b->pins[3].pwm.mux[0].value = 0;
- b->pins[3].pwm.mux[1].pin = 64;
- b->pins[3].pwm.mux[1].value = 1;
- b->pins[3].pwm.mux[2].pin = 16;
- b->pins[3].pwm.mux[2].value = 0;
+ b->pins[3].pwm.mux_total = 4;
+ b->pins[3].pwm.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[3].pwm.mux[0].pin = 17;
+ b->pins[3].pwm.mux[0].value = MRAA_GPIO_IN;
+ b->pins[3].pwm.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[3].pwm.mux[1].pin = 76;
+ b->pins[3].pwm.mux[1].value = 0;
+ b->pins[3].pwm.mux[2].pincmd = PINCMD_SET_VALUE;
+ b->pins[3].pwm.mux[2].pin = 64;
+ b->pins[3].pwm.mux[2].value = 1;
+ b->pins[3].pwm.mux[3].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[3].pwm.mux[3].pin = 16;
+ b->pins[3].pwm.mux[3].value = 0;
b->pins[3].mmap.gpio.pinmap = 14;
strncpy(b->pins[3].mmap.mem_dev, "/dev/uio0", 12);
- b->pins[3].mmap.gpio.mux_total = 4;
- b->pins[3].mmap.gpio.mux[0].pin = 76;
- b->pins[3].mmap.gpio.mux[0].value = 0;
- b->pins[3].mmap.gpio.mux[1].pin = 64;
+ b->pins[3].mmap.gpio.mux_total = 5;
+ b->pins[3].mmap.gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[3].mmap.gpio.mux[0].pin = 17;
+ b->pins[3].mmap.gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[3].mmap.gpio.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[3].mmap.gpio.mux[1].pin = 76;
b->pins[3].mmap.gpio.mux[1].value = 0;
- b->pins[3].mmap.gpio.mux[2].pin = 16;
+ b->pins[3].mmap.gpio.mux[2].pincmd = PINCMD_SET_VALUE;
+ b->pins[3].mmap.gpio.mux[2].pin = 64;
b->pins[3].mmap.gpio.mux[2].value = 0;
- b->pins[3].mmap.gpio.mux[3].pin = 14;
+ b->pins[3].mmap.gpio.mux[3].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[3].mmap.gpio.mux[3].pin = 16;
b->pins[3].mmap.gpio.mux[3].value = 0;
+ b->pins[3].mmap.gpio.mux[4].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[3].mmap.gpio.mux[4].pin = 14;
+ b->pins[3].mmap.gpio.mux[4].value = 0;
b->pins[3].mmap.mem_sz = 0x1000;
b->pins[3].mmap.bit_pos = 6;
strncpy(b->pins[4].name, "IO4", 8);
- b->pins[4].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
+ b->pins[4].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[4].gpio.pinmap = 6;
b->pins[4].gpio.parent_id = 0;
- b->pins[4].gpio.mux_total = 0;
+ b->pins[4].gpio.mux_total = 1;
+ b->pins[4].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[4].gpio.mux[0].pin = 37;
+ b->pins[4].gpio.mux[0].value = MRAA_GPIO_IN;
b->pins[4].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[4].gpio.output_enable = 36;
- b->pins[4].gpio.pullup_enable = 37;
strncpy(b->pins[5].name, "IO5", 8);
- b->pins[5].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
+ b->pins[5].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 , 0 };
b->pins[5].gpio.pinmap = 0;
b->pins[5].gpio.parent_id = 0;
- b->pins[5].gpio.mux_total = 1;
- b->pins[5].gpio.mux[0].pin = 66;
- b->pins[5].gpio.mux[0].value = 0;
+ b->pins[5].gpio.mux_total = 2;
+ b->pins[5].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[5].gpio.mux[0].pin = 19;
+ b->pins[5].gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[5].gpio.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[5].gpio.mux[1].pin = 66;
+ b->pins[5].gpio.mux[1].value = 0;
b->pins[5].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[5].gpio.output_enable = 18;
- b->pins[5].gpio.pullup_enable = 19;
b->pins[5].pwm.pinmap = 3;
b->pins[5].pwm.parent_id = 0;
- b->pins[5].pwm.mux_total = 2;
- b->pins[5].pwm.mux[0].pin = 66;
- b->pins[5].pwm.mux[0].value = 1;
- b->pins[5].pwm.mux[1].pin = 18;
- b->pins[5].pwm.mux[1].value = 0;
+ b->pins[5].pwm.mux_total = 3;
+ b->pins[5].pwm.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[5].pwm.mux[0].pin = 19;
+ b->pins[5].pwm.mux[0].value = MRAA_GPIO_IN;
+ b->pins[5].pwm.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[5].pwm.mux[1].pin = 66;
+ b->pins[5].pwm.mux[1].value = 1;
+ b->pins[5].pwm.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[5].pwm.mux[2].pin = 18;
+ b->pins[5].pwm.mux[2].value = 0;
strncpy(b->pins[6].name, "IO6", 8);
- b->pins[6].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
+ b->pins[6].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
b->pins[6].gpio.pinmap = 1;
b->pins[6].gpio.parent_id = 0;
- b->pins[6].gpio.mux_total = 1;
- b->pins[6].gpio.mux[0].pin = 68;
- b->pins[6].gpio.mux[0].value = 0;
+ b->pins[6].gpio.mux_total = 2;
+ b->pins[6].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[6].gpio.mux[0].pin = 21;
+ b->pins[6].gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[6].gpio.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[6].gpio.mux[1].pin = 68;
+ b->pins[6].gpio.mux[1].value = 0;
b->pins[6].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[6].gpio.output_enable = 20;
- b->pins[6].gpio.pullup_enable = 21;
b->pins[6].pwm.pinmap = 5;
b->pins[6].pwm.parent_id = 0;
- b->pins[6].pwm.mux_total = 2;
- b->pins[6].pwm.mux[0].pin = 68;
- b->pins[6].pwm.mux[0].value = 1;
- b->pins[6].pwm.mux[1].pin = 20;
- b->pins[6].pwm.mux[1].value = 0;
+ b->pins[6].pwm.mux_total = 3;
+ b->pins[6].pwm.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[6].pwm.mux[0].pin = 21;
+ b->pins[6].pwm.mux[0].value = MRAA_GPIO_IN;
+ b->pins[6].pwm.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[6].pwm.mux[1].pin = 68;
+ b->pins[6].pwm.mux[1].value = 1;
+ b->pins[6].pwm.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[6].pwm.mux[2].pin = 20;
+ b->pins[6].pwm.mux[2].value = 0;
strncpy(b->pins[7].name, "IO7", 8);
- b->pins[7].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
+ b->pins[7].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[7].gpio.pinmap = 38;
b->pins[7].gpio.parent_id = 0;
- b->pins[7].gpio.mux_total = 0;
+ b->pins[7].gpio.mux_total = 1;
+ b->pins[7].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[7].gpio.mux[0].pin = 39;
+ b->pins[7].gpio.mux[0].value = MRAA_GPIO_IN;
b->pins[7].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
- b->pins[7].gpio.pullup_enable = 39;
strncpy(b->pins[8].name, "IO8", 8);
- b->pins[8].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
+ b->pins[8].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[8].gpio.pinmap = 40;
b->pins[8].gpio.parent_id = 0;
- b->pins[8].gpio.mux_total = 0;
+ b->pins[8].gpio.mux_total = 1;
+ b->pins[8].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[8].gpio.mux[0].pin = 41;
+ b->pins[8].gpio.mux[0].value = MRAA_GPIO_IN;
b->pins[8].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
- b->pins[8].gpio.pullup_enable = 41;
strncpy(b->pins[9].name, "IO9", 8);
- b->pins[9].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
+ b->pins[9].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
b->pins[9].gpio.pinmap = 4;
b->pins[9].gpio.parent_id = 0;
- b->pins[9].gpio.mux_total = 1;
- b->pins[9].gpio.mux[0].pin = 70;
- b->pins[9].gpio.mux[0].value = 0;
+ b->pins[9].gpio.mux_total = 2;
+ b->pins[9].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[9].gpio.mux[0].pin = 23;
+ b->pins[9].gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[9].gpio.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[9].gpio.mux[1].pin = 70;
+ b->pins[9].gpio.mux[1].value = 0;
b->pins[9].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[9].gpio.output_enable = 22;
- b->pins[9].gpio.pullup_enable = 23;
b->pins[9].pwm.pinmap = 7;
b->pins[9].pwm.parent_id = 0;
- b->pins[9].pwm.mux_total = 2;
- b->pins[9].pwm.mux[0].pin = 70;
- b->pins[9].pwm.mux[0].value = 1;
- b->pins[9].pwm.mux[1].pin = 22;
- b->pins[9].pwm.mux[1].value = 0;
+ b->pins[9].pwm.mux_total = 3;
+ b->pins[9].pwm.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[9].pwm.mux[0].pin = 23;
+ b->pins[9].pwm.mux[0].value = MRAA_GPIO_IN;
+ b->pins[9].pwm.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[9].pwm.mux[1].pin = 70;
+ b->pins[9].pwm.mux[1].value = 1;
+ b->pins[9].pwm.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[9].pwm.mux[2].pin = 22;
+ b->pins[9].pwm.mux[2].value = 0;
strncpy(b->pins[10].name, "IO10", 8);
- b->pins[10].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 1, 1, 0, 0 };
+ b->pins[10].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 1, 1, 0, 0, 0 };
b->pins[10].gpio.pinmap = 10;
b->pins[10].gpio.parent_id = 0;
- b->pins[10].gpio.mux_total = 1;
- b->pins[10].gpio.mux[0].pin = 74;
- b->pins[10].gpio.mux[0].value = 0;
+ b->pins[10].gpio.mux_total = 2;
+ b->pins[10].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[10].gpio.mux[0].pin = 27;
+ b->pins[10].gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[10].gpio.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[10].gpio.mux[1].pin = 74;
+ b->pins[10].gpio.mux[1].value = 0;
b->pins[10].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[10].gpio.output_enable = 26;
- b->pins[10].gpio.pullup_enable = 27;
b->pins[10].pwm.pinmap = 11;
b->pins[10].pwm.parent_id = 0;
- b->pins[10].pwm.mux_total = 2;
- b->pins[10].pwm.mux[0].pin = 74;
- b->pins[10].pwm.mux[0].value = 1;
- b->pins[10].pwm.mux[1].pin = 26;
- b->pins[10].pwm.mux[1].value = 0;
+ b->pins[10].pwm.mux_total = 3;
+ b->pins[10].pwm.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[10].pwm.mux[0].pin = 27;
+ b->pins[10].pwm.mux[0].value = MRAA_GPIO_IN;
+ b->pins[10].pwm.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[10].pwm.mux[1].pin = 74;
+ b->pins[10].pwm.mux[1].value = 1;
+ b->pins[10].pwm.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[10].pwm.mux[2].pin = 26;
+ b->pins[10].pwm.mux[2].value = 0;
b->pins[10].mmap.gpio.pinmap = 10;
strncpy(b->pins[10].mmap.mem_dev, "/dev/uio0", 12);
- b->pins[10].mmap.gpio.mux_total = 3;
- b->pins[10].mmap.gpio.mux[0].pin = 74;
- b->pins[10].mmap.gpio.mux[0].value = 0;
- b->pins[10].mmap.gpio.mux[1].pin = 26;
+ b->pins[10].mmap.gpio.mux_total = 4;
+ b->pins[10].mmap.gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[10].mmap.gpio.mux[0].pin = 27;
+ b->pins[10].mmap.gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[10].mmap.gpio.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[10].mmap.gpio.mux[1].pin = 74;
b->pins[10].mmap.gpio.mux[1].value = 0;
- b->pins[10].mmap.gpio.mux[2].pin = 10;
+ b->pins[10].mmap.gpio.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[10].mmap.gpio.mux[2].pin = 26;
b->pins[10].mmap.gpio.mux[2].value = 0;
+ b->pins[10].mmap.gpio.mux[3].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[10].mmap.gpio.mux[3].pin = 10;
+ b->pins[10].mmap.gpio.mux[3].value = 0;
b->pins[10].mmap.mem_sz = 0x1000;
b->pins[10].mmap.bit_pos = 2;
b->pins[10].spi.parent_id = 1;
- b->pins[10].spi.mux_total = 1;
- b->pins[10].spi.mux[0].pin = 74;
- b->pins[10].spi.mux[0].value = 0;
+ b->pins[10].spi.mux_total = 3;
+ b->pins[10].spi.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[10].spi.mux[0].pin = 27;
+ b->pins[10].spi.mux[0].value = MRAA_GPIO_IN;
+ b->pins[10].spi.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[10].spi.mux[1].pin = 74;
+ b->pins[10].spi.mux[1].value = 0;
+ b->pins[10].spi.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[10].spi.mux[2].pin = 26;
+ b->pins[10].spi.mux[2].value = 0;
strncpy(b->pins[11].name, "IO11", 8);
- b->pins[11].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 1, 0, 0 };
+ b->pins[11].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 1, 0, 0, 0 };
b->pins[11].gpio.pinmap = 5;
b->pins[11].gpio.parent_id = 0;
- b->pins[11].gpio.mux_total = 2;
- b->pins[11].gpio.mux[0].pin = 72;
- b->pins[11].gpio.mux[0].value = 0;
- b->pins[11].gpio.mux[1].pin = 44;
+ b->pins[11].gpio.mux_total = 3;
+ b->pins[11].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[11].gpio.mux[0].pin = 25;
+ b->pins[11].gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[11].gpio.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[11].gpio.mux[1].pin = 72;
b->pins[11].gpio.mux[1].value = 0;
+ b->pins[11].gpio.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[11].gpio.mux[2].pin = 44;
+ b->pins[11].gpio.mux[2].value = 0;
b->pins[11].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[11].gpio.output_enable = 24;
- b->pins[11].gpio.pullup_enable = 25;
b->pins[11].pwm.pinmap = 9;
b->pins[11].pwm.parent_id = 0;
- b->pins[11].pwm.mux_total = 3;
- b->pins[11].pwm.mux[0].pin = 72;
- b->pins[11].pwm.mux[0].value = 1;
- b->pins[11].pwm.mux[1].pin = 44;
- b->pins[11].pwm.mux[1].value = 0;
- b->pins[11].pwm.mux[2].pin = 24;
+ b->pins[11].pwm.mux_total = 4;
+ b->pins[11].pwm.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[11].pwm.mux[0].pin = 25;
+ b->pins[11].pwm.mux[0].value = MRAA_GPIO_IN;
+ b->pins[11].pwm.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[11].pwm.mux[1].pin = 72;
+ b->pins[11].pwm.mux[1].value = 1;
+ b->pins[11].pwm.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[11].pwm.mux[2].pin = 44;
b->pins[11].pwm.mux[2].value = 0;
+ b->pins[11].pwm.mux[3].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[11].pwm.mux[3].pin = 24;
+ b->pins[11].pwm.mux[3].value = 0;
b->pins[11].spi.pinmap = 1;
- b->pins[11].spi.mux_total = 3;
- b->pins[11].spi.mux[0].pin = 72;
- b->pins[11].spi.mux[0].value = 0;
- b->pins[11].spi.mux[1].pin = 44;
- b->pins[11].spi.mux[1].value = 1;
- b->pins[11].spi.mux[2].pin = 24;
- b->pins[11].spi.mux[2].value = 0;
+ b->pins[11].spi.mux_total = 4;
+ b->pins[11].spi.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[11].spi.mux[0].pin = 25;
+ b->pins[11].spi.mux[0].value = MRAA_GPIO_IN;
+ b->pins[11].spi.mux[1].pincmd = PINCMD_SET_VALUE;
+ b->pins[11].spi.mux[1].pin = 72;
+ b->pins[11].spi.mux[1].value = 0;
+ b->pins[11].spi.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[11].spi.mux[2].pin = 44;
+ b->pins[11].spi.mux[2].value = 1;
+ b->pins[11].spi.mux[3].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[11].spi.mux[3].pin = 24;
+ b->pins[11].spi.mux[3].value = 0;
strncpy(b->pins[12].name, "IO12", 8);
- b->pins[12].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 1, 1, 0, 0 };
+ b->pins[12].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 1, 1, 0, 0, 0 };
b->pins[12].gpio.pinmap = 15;
b->pins[12].gpio.parent_id = 0;
- b->pins[12].gpio.mux_total = 0;
+ b->pins[12].gpio.mux_total = 1;
+ b->pins[12].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[12].gpio.mux[0].pin = 43;
+ b->pins[12].gpio.mux[0].value = MRAA_GPIO_IN;
b->pins[12].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[12].gpio.output_enable = 42;
- b->pins[12].gpio.pullup_enable = 43;
b->pins[12].spi.pinmap = 1;
- b->pins[12].spi.mux_total = 1;
- b->pins[12].spi.mux[0].pin = 42;
- b->pins[12].spi.mux[0].value = 1;
+ b->pins[12].spi.mux_total = 2;
+ b->pins[12].spi.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[12].spi.mux[0].pin = 43;
+ b->pins[12].spi.mux[0].value = MRAA_GPIO_IN;
+ b->pins[12].spi.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[12].spi.mux[1].pin = 42;
+ b->pins[12].spi.mux[1].value = 1;
b->pins[12].mmap.gpio.pinmap = 15;
strncpy(b->pins[12].mmap.mem_dev, "/dev/uio0", 12);
- b->pins[12].mmap.gpio.mux_total = 2;
- b->pins[12].mmap.gpio.mux[0].pin = 42;
- b->pins[12].mmap.gpio.mux[0].value = 0;
- b->pins[12].mmap.gpio.mux[1].pin = 15;
+ b->pins[12].mmap.gpio.mux_total = 3;
+ b->pins[12].mmap.gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[12].mmap.gpio.mux[0].pin = 43;
+ b->pins[12].mmap.gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[12].mmap.gpio.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[12].mmap.gpio.mux[1].pin = 42;
b->pins[12].mmap.gpio.mux[1].value = 0;
+ b->pins[12].mmap.gpio.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[12].mmap.gpio.mux[2].pin = 15;
+ b->pins[12].mmap.gpio.mux[2].value = 0;
b->pins[12].mmap.mem_sz = 0x1000;
b->pins[12].mmap.bit_pos = 7;
strncpy(b->pins[13].name, "IO13", 8);
- b->pins[13].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0 };
+ b->pins[13].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
b->pins[13].gpio.pinmap = 7;
b->pins[13].gpio.parent_id = 0;
- b->pins[13].gpio.mux_total = 1;
- b->pins[13].gpio.mux[0].pin = 46;
- b->pins[13].gpio.mux[0].value = 0;
+ b->pins[13].gpio.mux_total = 2;
+ b->pins[13].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[13].gpio.mux[0].pin = 31;
+ b->pins[13].gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[13].gpio.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[13].gpio.mux[1].pin = 46;
+ b->pins[13].gpio.mux[1].value = 0;
b->pins[13].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[13].gpio.output_enable = 30;
- b->pins[13].gpio.pullup_enable = 31;
b->pins[13].spi.pinmap = 1;
- b->pins[13].spi.mux_total = 2;
- b->pins[13].spi.mux[0].pin = 46;
- b->pins[13].spi.mux[0].value = 1;
- b->pins[13].spi.mux[1].pin = 30;
- b->pins[13].spi.mux[1].value = 0;
+ b->pins[13].spi.mux_total = 3;
+ b->pins[13].spi.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[13].spi.mux[0].pin = 31;
+ b->pins[13].spi.mux[0].value = MRAA_GPIO_IN;
+ b->pins[13].spi.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[13].spi.mux[1].pin = 46;
+ b->pins[13].spi.mux[1].value = 1;
+ b->pins[13].spi.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[13].spi.mux[2].pin = 30;
+ b->pins[13].spi.mux[2].value = 0;
// ANALOG
strncpy(b->pins[14].name, "A0", 8);
- b->pins[14].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1 };
+ b->pins[14].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
b->pins[14].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
- b->pins[14].gpio.pullup_enable = 49;
b->pins[14].aio.pinmap = 0;
- b->pins[14].aio.mux_total = 1;
+ b->pins[14].aio.mux_total = 2;
+ b->pins[14].aio.mux[0].pincmd = PINCMD_SET_DIRECTION;
b->pins[14].aio.mux[0].pin = 49;
- b->pins[14].aio.mux[0].value = 1;
+ b->pins[14].aio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[14].aio.mux[1].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[14].aio.mux[1].pin = 48;
+ b->pins[14].aio.mux[1].value = MRAA_GPIO_IN;
b->pins[14].gpio.pinmap = 48;
- b->pins[14].gpio.mux_total = 0;
+ b->pins[14].gpio.mux_total = 1;
+ b->pins[14].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[14].gpio.mux[0].pin = 49;
+ b->pins[14].gpio.mux[0].value = MRAA_GPIO_IN;
strncpy(b->pins[15].name, "A1", 8);
- b->pins[15].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1 };
+ b->pins[15].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
b->pins[15].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
- b->pins[15].gpio.pullup_enable = 51;
b->pins[15].aio.pinmap = 1;
+ b->pins[15].aio.mux_total = 2;
+ b->pins[15].aio.mux[0].pincmd = PINCMD_SET_DIRECTION;
b->pins[15].aio.mux[0].pin = 51;
- b->pins[15].aio.mux[0].value = 1;
- b->pins[15].aio.mux_total = 0;
+ b->pins[15].aio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[15].aio.mux[1].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[15].aio.mux[1].pin = 50;
+ b->pins[15].aio.mux[1].value = MRAA_GPIO_IN;
b->pins[15].gpio.pinmap = 50;
- b->pins[15].gpio.mux_total = 0;
+ b->pins[15].gpio.mux_total = 1;
+ b->pins[15].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[15].gpio.mux[0].pin = 51;
+ b->pins[15].gpio.mux[0].value = MRAA_GPIO_IN;
strncpy(b->pins[16].name, "A2", 8);
- b->pins[16].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1 };
+ b->pins[16].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
b->pins[16].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
- b->pins[16].gpio.pullup_enable = 53;
b->pins[16].aio.pinmap = 2;
- b->pins[16].aio.mux_total = 1;
+ b->pins[16].aio.mux_total = 2;
+ b->pins[16].aio.mux[0].pincmd = PINCMD_SET_DIRECTION;
b->pins[16].aio.mux[0].pin = 53;
- b->pins[16].aio.mux[0].value = 1;
+ b->pins[16].aio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[16].aio.mux[1].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[16].aio.mux[1].pin = 52;
+ b->pins[16].aio.mux[1].value = MRAA_GPIO_IN;
b->pins[16].gpio.pinmap = 52;
- b->pins[16].gpio.mux_total = 0;
+ b->pins[16].gpio.mux_total = 1;
+ b->pins[16].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[16].gpio.mux[0].pin = 53;
+ b->pins[16].gpio.mux[0].value = MRAA_GPIO_IN;
strncpy(b->pins[17].name, "A3", 8);
- b->pins[17].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1 };
+ b->pins[17].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
b->pins[17].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
- b->pins[17].gpio.pullup_enable = 55;
b->pins[17].aio.pinmap = 3;
- b->pins[17].aio.mux_total = 1;
+ b->pins[17].aio.mux_total = 2;
+ b->pins[17].aio.mux[0].pincmd = PINCMD_SET_DIRECTION;
b->pins[17].aio.mux[0].pin = 55;
- b->pins[17].aio.mux[0].value = 1;
+ b->pins[17].aio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[17].aio.mux[1].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[17].aio.mux[1].pin = 54;
+ b->pins[17].aio.mux[1].value = MRAA_GPIO_IN;
b->pins[17].gpio.pinmap = 54;
- b->pins[17].gpio.mux_total = 0;
+ b->pins[17].gpio.mux_total = 1;
+ b->pins[17].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[17].gpio.mux[0].pin = 55;
+ b->pins[17].gpio.mux[0].value = MRAA_GPIO_IN;
strncpy(b->pins[18].name, "A4", 8);
- b->pins[18].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 1 };
+ b->pins[18].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 1, 0 };
b->pins[18].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
- b->pins[18].gpio.pullup_enable = 57;
b->pins[18].i2c.pinmap = 1;
- b->pins[18].i2c.mux_total = 1;
- b->pins[18].i2c.mux[0].pin = 60;
- b->pins[18].i2c.mux[0].value = 0;
+ b->pins[18].i2c.mux_total = 3;
+ b->pins[18].i2c.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[18].i2c.mux[0].pin = 57;
+ b->pins[18].i2c.mux[0].value = MRAA_GPIO_IN;
+ b->pins[18].i2c.mux[1].pincmd = PINCMD_SET_MODE;
+ b->pins[18].i2c.mux[1].pin = 57;
+ b->pins[18].i2c.mux[1].value = MRAA_GPIO_HIZ;
+ b->pins[18].i2c.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[18].i2c.mux[2].pin = 60;
+ b->pins[18].i2c.mux[2].value = 0;
b->pins[18].aio.pinmap = 4;
b->pins[18].aio.mux_total = 3;
- b->pins[18].aio.mux[0].pin = 60;
- b->pins[18].aio.mux[0].value = 1;
- b->pins[18].aio.mux[1].pin = 78;
- b->pins[18].aio.mux[1].value = 0;
- b->pins[18].aio.mux[2].pin = 57;
+ b->pins[18].aio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[18].aio.mux[0].pin = 57;
+ b->pins[18].aio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[18].aio.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[18].aio.mux[1].pin = 60;
+ b->pins[18].aio.mux[1].value = 1;
+ b->pins[18].aio.mux[2].pincmd = PINCMD_SET_VALUE;
+ b->pins[18].aio.mux[2].pin = 78;
b->pins[18].aio.mux[2].value = 0;
b->pins[18].gpio.pinmap = 56;
- b->pins[18].gpio.mux_total = 2;
- b->pins[18].gpio.mux[0].pin = 60;
- b->pins[18].gpio.mux[0].value = 1;
- b->pins[18].gpio.mux[1].pin = 78;
+ b->pins[18].gpio.mux_total = 3;
+ b->pins[18].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[18].gpio.mux[0].pin = 57;
+ b->pins[18].gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[18].gpio.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[18].gpio.mux[1].pin = 60;
b->pins[18].gpio.mux[1].value = 1;
+ b->pins[18].gpio.mux[2].pincmd = PINCMD_SET_VALUE;
+ b->pins[18].gpio.mux[2].pin = 78;
+ b->pins[18].gpio.mux[2].value = 1;
strncpy(b->pins[19].name, "A5", 8);
- b->pins[19].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 1 };
+ b->pins[19].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 1, 0 };
b->pins[19].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
- b->pins[19].gpio.pullup_enable = 59;
b->pins[19].i2c.pinmap = 1;
- b->pins[19].i2c.mux_total = 1;
- b->pins[19].i2c.mux[0].pin = 60;
- b->pins[19].i2c.mux[0].value = 0;
+ b->pins[19].i2c.mux_total = 3;
+ b->pins[19].i2c.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[19].i2c.mux[0].pin = 59;
+ b->pins[19].i2c.mux[0].value = MRAA_GPIO_IN;
+ b->pins[19].i2c.mux[1].pincmd = PINCMD_SET_MODE;
+ b->pins[19].i2c.mux[1].pin = 59;
+ b->pins[19].i2c.mux[1].value = MRAA_GPIO_HIZ;
+ b->pins[19].i2c.mux[2].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[19].i2c.mux[2].pin = 60;
+ b->pins[19].i2c.mux[2].value = 0;
b->pins[19].aio.pinmap = 5;
b->pins[19].aio.mux_total = 3;
- b->pins[19].aio.mux[0].pin = 60;
- b->pins[19].aio.mux[0].value = 1;
- b->pins[19].aio.mux[1].pin = 79;
- b->pins[19].aio.mux[1].value = 0;
- b->pins[19].aio.mux[2].pin = 59;
- b->pins[19].aio.mux[2].value = 1;
+ b->pins[19].aio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[19].aio.mux[0].pin = 59;
+ b->pins[19].aio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[19].aio.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[19].aio.mux[1].pin = 60;
+ b->pins[19].aio.mux[1].value = 1;
+ b->pins[19].aio.mux[2].pincmd = PINCMD_SET_VALUE;
+ b->pins[19].aio.mux[2].pin = 79;
+ b->pins[19].aio.mux[2].value = 0;
b->pins[19].gpio.pinmap = 58;
- b->pins[19].gpio.mux_total = 2;
- b->pins[19].gpio.mux[0].pin = 60;
- b->pins[19].gpio.mux[0].value = 1;
- b->pins[19].gpio.mux[1].pin = 79;
+ b->pins[19].gpio.mux_total = 3;
+ b->pins[19].gpio.mux[0].pincmd = PINCMD_SET_DIRECTION;
+ b->pins[19].gpio.mux[0].pin = 59;
+ b->pins[19].gpio.mux[0].value = MRAA_GPIO_IN;
+ b->pins[19].gpio.mux[1].pincmd = PINCMD_SET_OUT_VALUE;
+ b->pins[19].gpio.mux[1].pin = 60;
b->pins[19].gpio.mux[1].value = 1;
+ b->pins[19].gpio.mux[2].pincmd = PINCMD_SET_VALUE;
+ b->pins[19].gpio.mux[2].pin = 79;
+ b->pins[19].gpio.mux[2].value = 1;
// BUS DEFINITIONS
b->i2c_bus_count = 1;
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-17 23:30:47 +0000