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| author | Caesar Wang <wxt@rock-chips.com> | 2016-01-25 21:43:00 +0800 |
|---|---|---|
| committer | Leo Wang <leozwang@google.com> | 2016-01-27 06:13:35 +0000 |
| commit | c3b2d17d6108e86b636840364b94bebae8ba4ba3 (patch) | |
| tree | ab5baf73355d777a94a8f234dcfb3e79cb95b1a3 | |
| parent | 235516e12eba89d98ebf7e49a28a0116de9ae6d5 (diff) | |
| download | v4.1-c3b2d17d6108e86b636840364b94bebae8ba4ba3.tar.gz | |
VENDOR: rockchip: ARM: dts: rockchip: support the spi for rk3036
You have to use the 4 bus to work if someone wants to support
the spi devices, since the the pin is re-used by data[5-8] and spi.
Anyway, this patch to support the spi making the happy work.
Unfortunatily, that will waste the emmc performance.
Moment, the kylin hasn't the spi devices to work, so maybe we need wait
the new required to land it.
Bug: 25923642
Patchset: rk3036 kylin bring up with spi devices.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: I0e50f742439278323c6247fbba086ba9eb94a971
| -rw-r--r-- | arch/arm/boot/dts/rk3036.dtsi | 55 |
1 files changed, 47 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 7618c6b7787..791b22783a8 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -60,6 +60,7 @@ serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; + spi0 = &spi0; }; memory { @@ -308,7 +309,7 @@ reg = <0x1021c000 0x4000>; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; broken-cd; - bus-width = <8>; + bus-width = <4>; cap-mmc-highspeed; clock-frequency = <37500000>; clock-freq-min-max = <400000 37500000>; @@ -324,7 +325,7 @@ non-removable; num-slots = <1>; pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus4>; status = "disabled"; }; @@ -544,6 +545,24 @@ pinctrl-0 = <&i2c0_xfer>; }; + spi0: spi@20074000 { + compatible = "rockchip,rockchip-spi"; + reg = <0x20074000 0x1000>; + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_txd &spi0_rxd &spi0_clk &spi0_cs0 &spi0_cs1>; + rockchip,spi-src-clk = <0>; + num-cs = <2>; + clocks =<&cru SCLK_SPI>, <&cru PCLK_SPI>; + clock-names = "spi","pclk_spi0"; + dmas = <&pdma 8>, <&pdma 9>; + #dma-cells = <2>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + usb_otg: usb@10180000 { compatible = "rockchip,rk3036-usb", "rockchip,rk3066-usb", "snps,dwc2"; @@ -709,15 +728,11 @@ rockchip,pins = <2 1 RK_FUNC_2 &pcfg_pull_default>; }; - emmc_bus8: emmc-bus8 { + emmc_bus4: emmc-bus4 { rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_default>, <1 25 RK_FUNC_2 &pcfg_pull_default>, <1 26 RK_FUNC_2 &pcfg_pull_default>, - <1 27 RK_FUNC_2 &pcfg_pull_default>, - <1 28 RK_FUNC_2 &pcfg_pull_default>, - <1 29 RK_FUNC_2 &pcfg_pull_default>, - <1 30 RK_FUNC_2 &pcfg_pull_default>, - <1 31 RK_FUNC_2 &pcfg_pull_default>; + <1 27 RK_FUNC_2 &pcfg_pull_default>; }; }; @@ -833,5 +848,29 @@ }; /* no rts / cts for uart2 */ }; + + gpio1_spi0 { + spi0_txd:spi0-txd { + rockchip,pins = <1 29 RK_FUNC_3 &pcfg_pull_default>; + }; + + spi0_rxd:spi0-rxd { + rockchip,pins = <1 28 RK_FUNC_3 &pcfg_pull_default>; + }; + + spi0_clk:spi0-clk { + rockchip,pins = <2 0 RK_FUNC_2 &pcfg_pull_default>; + }; + + spi0_cs0:spi0-cs0 { + rockchip,pins = <1 30 RK_FUNC_3 &pcfg_pull_default>; + + }; + + spi0_cs1:spi0-cs1 { + rockchip,pins = <1 31 RK_FUNC_3 &pcfg_pull_default>; + + }; + }; }; }; |