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authorEzequiel Garcia <ezequiel.garcia@imgtec.com>2015-05-21 18:06:17 -0300
committerGovindraj Raja <Govindraj.Raja@imgtec.com>2015-06-22 16:01:17 +0100
commit75206f531749a73183dc88267b46dbc76b4f91cc (patch)
treed3b6a13a7c92241c88d1c2c232f4b191d14d22f1 /Documentation/devicetree
parent123879e9c3eac8a975f1d48786805ccad77cdee8 (diff)
downloadv4.1-75206f531749a73183dc88267b46dbc76b4f91cc.tar.gz
clocksource: Add Pistachio SoC general purpose timer binding document
Add a device-tree binding document for the clocksource driver provided by Pistachio SoC general purpose timers. Change-Id: I5cb5c5a484462d9299dfe1be9dd9f53de8d03fdd Reviewed-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/timer/img,pistachio-gptimer.txt28
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diff --git a/Documentation/devicetree/bindings/timer/img,pistachio-gptimer.txt b/Documentation/devicetree/bindings/timer/img,pistachio-gptimer.txt
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+* Pistachio general-purpose timer based clocksource
+
+Required properties:
+ - compatible: "img,pistachio-gptimer".
+ - reg: Address range of the timer registers.
+ - interrupts: An interrupt for each of the four timers
+ - clocks: Should contain a clock specifier for each entry in clock-names
+ - clock-names: Should contain the following entries:
+ "sys", interface clock
+ "slow", slow counter clock
+ "fast", fast counter clock
+ - img,cr-periph: Must contain a phandle to the peripheral control
+ syscon node.
+
+Example:
+ timer: timer@18102000 {
+ compatible = "img,pistachio-gptimer";
+ reg = <0x18102000 0x100>;
+ interrupts = <GIC_SHARED 60 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SHARED 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SHARED 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SHARED 63 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_periph PERIPH_CLK_COUNTER_FAST>,
+ <&clk_periph PERIPH_CLK_COUNTER_SLOW>,
+ <&cr_periph SYS_CLK_TIMER>;
+ clock-names = "fast", "slow", "sys";
+ img,cr-periph = <&cr_periph>;
+ };