diff options
| author | Saadi Maalem <saadi.maalem@intel.com> | 2014-02-19 17:44:43 +0100 |
|---|---|---|
| committer | Steve Sakoman <steve@sakoman.com> | 2015-06-02 14:58:32 -0700 |
| commit | 31c96c1c16cfc7d9a18652bb2dcf35555bef84fd (patch) | |
| tree | b527f4782c406638488fb83026b5d113c168beb3 | |
| parent | 55d3f8d5ba7121a0ee91713d783b7a5724c25390 (diff) | |
| download | edison-v3.10-31c96c1c16cfc7d9a18652bb2dcf35555bef84fd.tar.gz | |
Edison kernel rebase: Correct merge errors
While cherry-picking patches for Tangier support on top of
3.10.17 Yocto kernel, we have a few merge errors.
Squashing the various corrections into this commit.
Signed-off-by: Saadi Maalem <saadi.maalem@intel.com>
37 files changed, 6041 insertions, 566 deletions
diff --git a/arch/x86/configs/i386_mrfl_defconfig b/arch/x86/configs/i386_mrfl_defconfig new file mode 100644 index 00000000000..db31fccc9be --- /dev/null +++ b/arch/x86/configs/i386_mrfl_defconfig @@ -0,0 +1,3980 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/i386 3.10.17 Kernel Configuration +# +# CONFIG_64BIT is not set +CONFIG_X86_32=y +CONFIG_X86=y +CONFIG_INSTRUCTION_DECODER=y +CONFIG_OUTPUT_FORMAT="elf32-i386" +CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_MMU=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_GENERIC_ISA_DMA=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_HAS_CPU_RELAX=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_HAS_CPU_AUTOPROBE=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_ZONE_DMA32 is not set +# CONFIG_AUDIT_ARCH is not set +CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_X86_32_SMP=y +CONFIG_X86_HT=y +CONFIG_X86_32_LAZY_GS=y +CONFIG_ARCH_HWEIGHT_CFLAGS="-fcall-saved-ecx -fcall-saved-edx" +CONFIG_ARCH_CPU_PROBE_RELEASE=y +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_BZIP2=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_BZIP2 is not set +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_XZ is not set +# CONFIG_KERNEL_LZO is not set +CONFIG_DEFAULT_HOSTNAME="(none)" +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_FHANDLE is not set +CONFIG_AUDIT=y +CONFIG_AUDITSYSCALL=y +CONFIG_AUDIT_WATCH=y +CONFIG_AUDIT_TREE=y +# CONFIG_AUDIT_LOGINUID_IMMUTABLE is not set +CONFIG_HAVE_GENERIC_HARDIRQS=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_PENDING_IRQ=y +CONFIG_IRQ_DOMAIN=y +# CONFIG_IRQ_DOMAIN_DEBUG is not set +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +CONFIG_CLOCKSOURCE_WATCHDOG=y +CONFIG_KTIME_SCALAR=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y +CONFIG_GENERIC_CMOS_UPDATE=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y + +# +# CPU/Task time and stats accounting +# +# CONFIG_TICK_CPU_ACCOUNTING is not set +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y + +# +# RCU Subsystem +# +CONFIG_TREE_PREEMPT_RCU=y +CONFIG_PREEMPT_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_FANOUT=32 +CONFIG_RCU_FANOUT_LEAF=16 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_RCU_FAST_NO_HZ is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_BOOST is not set +# CONFIG_RCU_NOCB_CPU is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y +CONFIG_CGROUPS=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +# CONFIG_MEMCG is not set +CONFIG_CGROUP_PERF=y +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_CFS_BANDWIDTH is not set +CONFIG_RT_GROUP_SCHED=y +CONFIG_BLK_CGROUP=y +# CONFIG_DEBUG_BLK_CGROUP is not set +# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_NET_NS is not set +CONFIG_UIDGID_CONVERTED=y +# CONFIG_UIDGID_STRICT_TYPE_CHECKS is not set +CONFIG_SCHED_AUTOGROUP=y +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_SYSFS_DEPRECATED_V2 is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_XZ is not set +# CONFIG_RD_LZO is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_HAVE_UID16=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_HOTPLUG=y +CONFIG_HAVE_PCSPKR_PLATFORM=y +CONFIG_EXPERT=y +# CONFIG_UPTIME_LIMITED_KERNEL is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_PCSPKR_PLATFORM=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_PCI_QUIRKS=y +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +CONFIG_OPROFILE=y +# CONFIG_OPROFILE_EVENT_MULTIPLEX is not set +CONFIG_HAVE_OPROFILE=y +CONFIG_OPROFILE_NMI_TIMER=y +CONFIG_KPROBES=y +# CONFIG_JUMP_LABEL is not set +CONFIG_KPROBES_ON_FTRACE=y +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_KRETPROBES=y +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_OPTPROBES=y +CONFIG_HAVE_KPROBES_ON_FTRACE=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_USE_GENERIC_SMP_HELPERS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y +CONFIG_HAVE_USER_RETURN_NOTIFIER=y +CONFIG_HAVE_PERF_EVENTS_NMI=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OLD_SIGACTION=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_MODULE_SIG=y +CONFIG_MODULE_SIG_FORCE=y +CONFIG_MODULE_SIG_ALL=y +# CONFIG_MODULE_SIG_SHA1 is not set +# CONFIG_MODULE_SIG_SHA224 is not set +CONFIG_MODULE_SIG_SHA256=y +# CONFIG_MODULE_SIG_SHA384 is not set +# CONFIG_MODULE_SIG_SHA512 is not set +CONFIG_MODULE_SIG_HASH="sha256" +CONFIG_STOP_MACHINE=y +CONFIG_BLOCK=y +CONFIG_LBDAF=y +CONFIG_BLK_DEV_BSG=y +# CONFIG_BLK_DEV_BSGLIB is not set +# CONFIG_BLK_DEV_INTEGRITY is not set +CONFIG_BLK_DEV_THROTTLING=y + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +CONFIG_OSF_PARTITION=y +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +# CONFIG_LDM_PARTITION is not set +CONFIG_SGI_PARTITION=y +# CONFIG_ULTRIX_PARTITION is not set +CONFIG_SUN_PARTITION=y +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_DEADLINE is not set +CONFIG_IOSCHED_CFQ=y +# CONFIG_CFQ_GROUP_IOSCHED is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_ASN1=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_FREEZER=y + +# +# Processor type and features +# +CONFIG_ZONE_DMA=y +CONFIG_SMP=y +CONFIG_X86_MPPARSE=y +# CONFIG_X86_BIGSMP is not set +CONFIG_X86_EXTENDED_PLATFORM=y +# CONFIG_X86_GOLDFISH is not set +CONFIG_X86_WANT_INTEL_MID=y +CONFIG_X86_INTEL_MID=y +# CONFIG_X86_MDFLD is not set +CONFIG_ATOM_SOC_POWER=y +# CONFIG_REMOVEME_INTEL_ATOM_MDFLD_POWER is not set +# CONFIG_REMOVEME_INTEL_ATOM_CLV_POWER is not set +CONFIG_REMOVEME_INTEL_ATOM_MRFLD_POWER=y +CONFIG_INTEL_DEBUG_FEATURE=y +# CONFIG_X86_RDC321X is not set +# CONFIG_X86_32_NON_STANDARD is not set +CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y +# CONFIG_X86_32_IRIS is not set +# CONFIG_SCHED_OMIT_FRAME_POINTER is not set +# CONFIG_HYPERVISOR_GUEST is not set +CONFIG_NO_BOOTMEM=y +# CONFIG_MEMTEST is not set +# CONFIG_M486 is not set +# CONFIG_M586 is not set +# CONFIG_M586TSC is not set +# CONFIG_M586MMX is not set +# CONFIG_M686 is not set +# CONFIG_MPENTIUMII is not set +# CONFIG_MPENTIUMIII is not set +# CONFIG_MPENTIUMM is not set +# CONFIG_MPENTIUM4 is not set +# CONFIG_MK6 is not set +# CONFIG_MK7 is not set +# CONFIG_MK8 is not set +# CONFIG_MCRUSOE is not set +# CONFIG_MEFFICEON is not set +# CONFIG_MWINCHIPC6 is not set +# CONFIG_MWINCHIP3D is not set +# CONFIG_MELAN is not set +# CONFIG_MGEODEGX1 is not set +# CONFIG_MGEODE_LX is not set +# CONFIG_MCYRIXIII is not set +# CONFIG_MVIAC3_2 is not set +# CONFIG_MVIAC7 is not set +# CONFIG_MCORE2 is not set +# CONFIG_MATOM is not set +CONFIG_MSLM=y +CONFIG_X86_GENERIC=y +CONFIG_X86_INTERNODE_CACHE_SHIFT=6 +CONFIG_X86_L1_CACHE_SHIFT=6 +CONFIG_X86_INTEL_USERCOPY=y +CONFIG_X86_USE_PPRO_CHECKSUM=y +CONFIG_X86_TSC=y +CONFIG_X86_CMPXCHG64=y +CONFIG_X86_CMOV=y +CONFIG_X86_MINIMUM_CPU_FAMILY=5 +CONFIG_X86_DEBUGCTLMSR=y +# CONFIG_PROCESSOR_SELECT is not set +CONFIG_CPU_SUP_INTEL=y +CONFIG_CPU_SUP_CYRIX_32=y +CONFIG_CPU_SUP_AMD=y +CONFIG_CPU_SUP_CENTAUR=y +CONFIG_CPU_SUP_TRANSMETA_32=y +CONFIG_CPU_SUP_UMC_32=y +# CONFIG_HPET_TIMER is not set +# CONFIG_APB_TIMER is not set +CONFIG_DMI=y +CONFIG_NR_CPUS=2 +CONFIG_SCHED_SMT=y +CONFIG_SCHED_MC=y +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_PREEMPT_COUNT=y +CONFIG_X86_LOCAL_APIC=y +CONFIG_X86_IO_APIC=y +# CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set +CONFIG_X86_MCE=y +CONFIG_X86_MCE_INTEL=y +# CONFIG_X86_MCE_AMD is not set +# CONFIG_X86_ANCIENT_MCE is not set +CONFIG_X86_MCE_THRESHOLD=y +# CONFIG_X86_MCE_INJECT is not set +CONFIG_X86_THERMAL_VECTOR=y +CONFIG_VM86=y +# CONFIG_TOSHIBA is not set +# CONFIG_I8K is not set +CONFIG_X86_REBOOTFIXUPS=y +# CONFIG_MICROCODE is not set +CONFIG_X86_MSR=y +CONFIG_X86_CPUID=y +# CONFIG_NOHIGHMEM is not set +# CONFIG_HIGHMEM4G is not set +CONFIG_HIGHMEM64G=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_HIGHMEM=y +CONFIG_X86_PAE=y +CONFIG_ARCH_PHYS_ADDR_T_64BIT=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ILLEGAL_POINTER_VALUE=0 +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_SPARSEMEM_STATIC=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_HAVE_MEMBLOCK_NODE_MAP=y +CONFIG_ARCH_DISCARD_MEMBLOCK=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=999999 +# CONFIG_COMPACTION is not set +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +# CONFIG_MEMORY_FAILURE is not set +# CONFIG_TRANSPARENT_HUGEPAGE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_CLEANCACHE is not set +# CONFIG_HIGHPTE is not set +CONFIG_X86_CHECK_BIOS_CORRUPTION=y +# CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK is not set +CONFIG_X86_RESERVE_LOW=64 +# CONFIG_MATH_EMULATION is not set +CONFIG_MTRR=y +CONFIG_MTRR_SANITIZER=y +CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=1 +CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1 +CONFIG_X86_PAT=y +CONFIG_ARCH_USES_PG_UNCACHED=y +# CONFIG_ARCH_RANDOM is not set +CONFIG_X86_SMAP=y +# CONFIG_SECCOMP is not set +# CONFIG_CC_STACKPROTECTOR is not set +CONFIG_HZ_100=y +# CONFIG_HZ_250 is not set +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=100 +CONFIG_SCHED_HRTICK=y +CONFIG_KEXEC=y +# CONFIG_CRASH_DUMP is not set +CONFIG_PHYSICAL_START=0x1200000 +# CONFIG_RELOCATABLE is not set +CONFIG_PHYSICAL_ALIGN=0x100000 +CONFIG_HOTPLUG_CPU=y +# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_DEBUG_HOTPLUG_CPU0 is not set +# CONFIG_COMPAT_VDSO is not set +# CONFIG_CMDLINE_BOOL is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y + +# +# Power management and ACPI options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +CONFIG_PM_WAKELOCKS=y +CONFIG_PM_WAKELOCKS_LIMIT=100 +CONFIG_PM_WAKELOCKS_GC=y +CONFIG_PM_RUNTIME=y +CONFIG_PM=y +CONFIG_PM_DEBUG=y +CONFIG_PM_ADVANCED_DEBUG=y +# CONFIG_PM_TEST_SUSPEND is not set +CONFIG_PM_SLEEP_DEBUG=y +# CONFIG_PM_TRACE_RTC is not set +# CONFIG_ACPI is not set +CONFIG_SFI=y +# CONFIG_APM is not set + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_STAT_DETAILS=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set + +# +# x86 CPU frequency scaling drivers +# +# CONFIG_X86_INTEL_PSTATE is not set +CONFIG_X86_SFI_CPUFREQ=y +# CONFIG_X86_POWERNOW_K6 is not set +# CONFIG_X86_POWERNOW_K7 is not set +# CONFIG_X86_GX_SUSPMOD is not set +# CONFIG_X86_SPEEDSTEP_CENTRINO is not set +# CONFIG_X86_SPEEDSTEP_ICH is not set +# CONFIG_X86_SPEEDSTEP_SMI is not set +# CONFIG_X86_P4_CLOCKMOD is not set +# CONFIG_X86_CPUFREQ_NFORCE2 is not set +# CONFIG_X86_LONGRUN is not set + +# +# shared options +# +# CONFIG_X86_SPEEDSTEP_LIB is not set +CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set +CONFIG_INTEL_IDLE=y + +# +# Bus options (PCI etc.) +# +CONFIG_PCI=y +# CONFIG_PCI_GOBIOS is not set +# CONFIG_PCI_GOMMCONFIG is not set +# CONFIG_PCI_GODIRECT is not set +CONFIG_PCI_GOANY=y +CONFIG_PCI_BIOS=y +CONFIG_PCI_DIRECT=y +CONFIG_PCI_MMCONFIG=y +CONFIG_PCI_DOMAINS=y +# CONFIG_PCI_CNB20LE_QUIRK is not set +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIEAER is not set +CONFIG_PCIEASPM=y +# CONFIG_PCIEASPM_DEBUG is not set +# CONFIG_PCIEASPM_DEFAULT is not set +# CONFIG_PCIEASPM_POWERSAVE is not set +CONFIG_PCIEASPM_PERFORMANCE=y +CONFIG_PCIE_PME=y +CONFIG_ARCH_SUPPORTS_MSI=y +CONFIG_PCI_MSI=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +CONFIG_HT_IRQ=y +# CONFIG_PCI_IOV is not set +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +CONFIG_PCI_LABEL=y +CONFIG_ISA_DMA_API=y +# CONFIG_ISA is not set +# CONFIG_SCx200 is not set +# CONFIG_ALIX is not set +# CONFIG_NET5501 is not set +# CONFIG_GEOS is not set +CONFIG_AMD_NB=y +# CONFIG_PCCARD is not set +# CONFIG_HOTPLUG_PCI is not set +# CONFIG_RAPIDIO is not set + +# +# Executable file formats / Emulations +# +CONFIG_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +CONFIG_BINFMT_MISC=y +CONFIG_COREDUMP=y +CONFIG_HAVE_ATOMIC_IOMAP=y +CONFIG_HAVE_TEXT_POKE_SMP=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +# CONFIG_UNIX_DIAG is not set +CONFIG_XFRM=y +CONFIG_XFRM_ALGO=y +CONFIG_XFRM_USER=y +CONFIG_XFRM_SUB_POLICY=y +CONFIG_XFRM_MIGRATE=y +CONFIG_XFRM_STATISTICS=y +CONFIG_NET_KEY=y +CONFIG_NET_KEY_MIGRATE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +# CONFIG_IP_FIB_TRIE_STATS is not set +CONFIG_IP_MULTIPLE_TABLES=y +# CONFIG_IP_ROUTE_MULTIPATH is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=y +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_NET_IPVTI is not set +# CONFIG_INET_AH is not set +CONFIG_INET_ESP=y +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=y +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +CONFIG_INET_LRO=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +CONFIG_TCP_MD5SIG=y +CONFIG_IPV6=y +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=y +CONFIG_INET6_XFRM_MODE_TUNNEL=y +CONFIG_INET6_XFRM_MODE_BEET=y +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=y +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_GRE is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +# CONFIG_IPV6_SUBTREES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETLABEL is not set +CONFIG_NETWORK_SECMARK=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_NETLINK=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_MARK=y +# CONFIG_NF_CONNTRACK_SECMARK is not set +CONFIG_NF_CONNTRACK_PROCFS=y +CONFIG_NF_CONNTRACK_EVENTS=y +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CT_PROTO_DCCP is not set +# CONFIG_NF_CT_PROTO_SCTP is not set +# CONFIG_NF_CT_PROTO_UDPLITE is not set +# CONFIG_NF_CONNTRACK_AMANDA is not set +# CONFIG_NF_CONNTRACK_FTP is not set +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +# CONFIG_NF_CT_NETLINK_TIMEOUT is not set +CONFIG_NF_NAT=y +CONFIG_NF_NAT_NEEDED=y +# CONFIG_NF_NAT_AMANDA is not set +# CONFIG_NF_NAT_FTP is not set +# CONFIG_NF_NAT_IRC is not set +# CONFIG_NF_NAT_SIP is not set +# CONFIG_NF_NAT_TFTP is not set +CONFIG_NETFILTER_TPROXY=y +CONFIG_NETFILTER_XTABLES=y + +# +# Xtables combined modules +# +CONFIG_NETFILTER_XT_MARK=y +CONFIG_NETFILTER_XT_CONNMARK=y + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set +# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +# CONFIG_NETFILTER_XT_TARGET_CT is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +CONFIG_NETFILTER_XT_TARGET_HL=y +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +# CONFIG_NETFILTER_XT_TARGET_LOG is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_TARGET_NETMAP=y +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +CONFIG_NETFILTER_XT_TARGET_REDIRECT=y +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set +# CONFIG_NETFILTER_XT_TARGET_SECMARK is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +CONFIG_NETFILTER_XT_MATCH_CLUSTER=y +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +CONFIG_NETFILTER_XT_MATCH_HELPER=y +CONFIG_NETFILTER_XT_MATCH_HL=y +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +CONFIG_NETFILTER_XT_MATCH_QUOTA=y +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +CONFIG_NETFILTER_XT_MATCH_SOCKET=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_NF_CONNTRACK_PROC_COMPAT=y +CONFIG_IP_NF_IPTABLES=y +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +# CONFIG_IP_NF_TARGET_ULOG is not set +CONFIG_NF_NAT_IPV4=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +# CONFIG_NF_NAT_PPTP is not set +# CONFIG_NF_NAT_H323 is not set +CONFIG_IP_NF_MANGLE=y +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +CONFIG_IP_NF_RAW=y +# CONFIG_IP_NF_SECURITY is not set +# CONFIG_IP_NF_ARPTABLES is not set + +# +# IPv6: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV6=y +# CONFIG_NF_CONNTRACK_IPV6 is not set +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_MATCH_AH=y +CONFIG_IP6_NF_MATCH_EUI64=y +CONFIG_IP6_NF_MATCH_FRAG=y +CONFIG_IP6_NF_MATCH_OPTS=y +CONFIG_IP6_NF_MATCH_HL=y +CONFIG_IP6_NF_MATCH_IPV6HEADER=y +CONFIG_IP6_NF_MATCH_MH=y +# CONFIG_IP6_NF_MATCH_RPFILTER is not set +CONFIG_IP6_NF_MATCH_RT=y +CONFIG_IP6_NF_TARGET_HL=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +CONFIG_IP6_NF_MANGLE=y +CONFIG_IP6_NF_RAW=y +# CONFIG_IP6_NF_SECURITY is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +CONFIG_L2TP=y +# CONFIG_L2TP_DEBUGFS is not set +# CONFIG_L2TP_V3 is not set +# CONFIG_BRIDGE is not set +CONFIG_HAVE_NET_DSA=y +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_MMAP is not set +# CONFIG_NETLINK_DIAG is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_NETPRIO_CGROUP is not set +CONFIG_BQL=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_TCPPROBE is not set +# CONFIG_NET_DROP_MONITOR is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +CONFIG_FIB_RULES=y +CONFIG_WIRELESS=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_REG_DEBUG is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +# CONFIG_CFG80211_INTERNAL_REGDB is not set +# CONFIG_CFG80211_WEXT is not set +# CONFIG_LIB80211 is not set +CONFIG_MAC80211=m +CONFIG_MAC80211_HAS_RC=y +# CONFIG_MAC80211_RC_PID is not set +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_MINSTREL_HT=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +# CONFIG_MAC80211_LEDS is not set +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_LEDS=y +# CONFIG_RFKILL_INPUT is not set +# CONFIG_RFKILL_REGULATOR is not set +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +CONFIG_NFC=y +# CONFIG_NFC_NCI is not set +# CONFIG_NFC_HCI is not set + +# +# Near Field Communication (NFC) devices +# +# CONFIG_NFC_PN533 is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="" +# CONFIG_DEVTMPFS is not set +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +CONFIG_FW_LOADER_USER_HELPER=y +# CONFIG_DEBUG_DRIVER is not set +CONFIG_DEBUG_DEVRES=y +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_GENERIC_CPU_DEVICES is not set +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_IRQ=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_CMA is not set + +# +# Bus devices +# +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +# CONFIG_MTD is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_NVME is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_VIRTIO_BLK is not set +# CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set + +# +# Misc devices +# +# CONFIG_SENSORS_LIS3LV02D is not set +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_IBM_ASM is not set +# CONFIG_PHANTOM is not set +CONFIG_INTEL_MID_PTI=y +CONFIG_INTEL_PTI_STM=y +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ATMEL_SSC is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1780 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +# CONFIG_BMP085_I2C is not set +# CONFIG_BMP085_SPI is not set +# CONFIG_PCH_PHUB is not set +# CONFIG_USB_SWITCH_FSA9480 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +# CONFIG_SRAM is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set + +# +# Altera FPGA firmware download module +# +# CONFIG_ALTERA_STAPL is not set +# CONFIG_VMWARE_VMCI is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +CONFIG_BLK_DEV_SR_VENDOR=y +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set +CONFIG_SCSI_MULTI_LUN=y +CONFIG_SCSI_CONSTANTS=y +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=y +# CONFIG_SATA_AHCI_PLATFORM is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +CONFIG_ATA_PIIX=y +# CONFIG_SATA_HIGHBANK is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +CONFIG_PATA_AMD=y +# CONFIG_PATA_ARASAN_CF is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CS5535 is not set +# CONFIG_PATA_CS5536 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +CONFIG_PATA_OLDPIIX=y +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SC1200 is not set +CONFIG_PATA_SCH=y +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +CONFIG_PATA_MPIIX=y +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +CONFIG_ATA_GENERIC=y +# CONFIG_PATA_LEGACY is not set +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +CONFIG_MD_AUTODETECT=y +# CONFIG_MD_LINEAR is not set +# CONFIG_MD_RAID0 is not set +# CONFIG_MD_RAID1 is not set +# CONFIG_MD_RAID10 is not set +# CONFIG_MD_RAID456 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set +# CONFIG_BCACHE is not set +CONFIG_BLK_DEV_DM=y +# CONFIG_DM_DEBUG is not set +CONFIG_DM_CRYPT=y +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_THIN_PROVISIONING is not set +# CONFIG_DM_CACHE is not set +CONFIG_DM_MIRROR=y +# CONFIG_DM_RAID is not set +# CONFIG_DM_LOG_USERSPACE is not set +CONFIG_DM_ZERO=y +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +CONFIG_DM_UEVENT=y +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# CONFIG_I2O is not set +# CONFIG_MACINTOSH_DRIVERS is not set +CONFIG_NETDEVICES=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +CONFIG_MII=y +# CONFIG_NET_TEAM is not set +# CONFIG_MACVLAN is not set +# CONFIG_VXLAN is not set +CONFIG_NETCONSOLE=y +# CONFIG_NETCONSOLE_DYNAMIC is not set +CONFIG_NETPOLL=y +# CONFIG_NETPOLL_TRAP is not set +CONFIG_NET_POLL_CONTROLLER=y +CONFIG_TUN=y +# CONFIG_VETH is not set +# CONFIG_VIRTIO_NET is not set +# CONFIG_ARCNET is not set + +# +# CAIF transport drivers +# +# CONFIG_VHOST_NET is not set + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set +CONFIG_ETHERNET=y +CONFIG_NET_VENDOR_3COM=y +# CONFIG_VORTEX is not set +# CONFIG_TYPHOON is not set +CONFIG_NET_VENDOR_ADAPTEC=y +# CONFIG_ADAPTEC_STARFIRE is not set +CONFIG_NET_VENDOR_ALTEON=y +# CONFIG_ACENIC is not set +CONFIG_NET_VENDOR_AMD=y +# CONFIG_AMD8111_ETH is not set +# CONFIG_PCNET32 is not set +CONFIG_NET_VENDOR_ATHEROS=y +# CONFIG_ATL2 is not set +# CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set +# CONFIG_ATL1C is not set +# CONFIG_ALX is not set +CONFIG_NET_CADENCE=y +# CONFIG_ARM_AT91_ETHER is not set +# CONFIG_MACB is not set +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +CONFIG_BNX2=y +# CONFIG_CNIC is not set +CONFIG_TIGON3=y +# CONFIG_BNX2X is not set +CONFIG_NET_VENDOR_BROCADE=y +# CONFIG_BNA is not set +# CONFIG_NET_CALXEDA_XGMAC is not set +CONFIG_NET_VENDOR_CHELSIO=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_CHELSIO_T4 is not set +# CONFIG_CHELSIO_T4VF is not set +CONFIG_NET_VENDOR_CISCO=y +# CONFIG_ENIC is not set +# CONFIG_DNET is not set +CONFIG_NET_VENDOR_DEC=y +CONFIG_NET_TULIP=y +# CONFIG_DE2104X is not set +# CONFIG_TULIP is not set +# CONFIG_DE4X5 is not set +# CONFIG_WINBOND_840 is not set +# CONFIG_DM9102 is not set +# CONFIG_ULI526X is not set +CONFIG_NET_VENDOR_DLINK=y +# CONFIG_DL2K is not set +# CONFIG_SUNDANCE is not set +CONFIG_NET_VENDOR_EMULEX=y +# CONFIG_BE2NET is not set +CONFIG_NET_VENDOR_EXAR=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +CONFIG_NET_VENDOR_HP=y +# CONFIG_HP100 is not set +CONFIG_NET_VENDOR_INTEL=y +CONFIG_E100=y +CONFIG_E1000=y +CONFIG_E1000E=y +# CONFIG_IGB is not set +# CONFIG_IGBVF is not set +# CONFIG_IXGB is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGBEVF is not set +CONFIG_NET_VENDOR_I825XX=y +# CONFIG_IP1000 is not set +# CONFIG_JME is not set +CONFIG_NET_VENDOR_MARVELL=y +# CONFIG_MVMDIO is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +CONFIG_NET_VENDOR_MELLANOX=y +# CONFIG_MLX4_EN is not set +# CONFIG_MLX4_CORE is not set +CONFIG_NET_VENDOR_MICREL=y +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +# CONFIG_KSZ884X_PCI is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +CONFIG_NET_VENDOR_MYRI=y +# CONFIG_MYRI10GE is not set +# CONFIG_FEALNX is not set +CONFIG_NET_VENDOR_NATSEMI=y +# CONFIG_NATSEMI is not set +# CONFIG_NS83820 is not set +CONFIG_NET_VENDOR_8390=y +CONFIG_NE2K_PCI=y +CONFIG_NET_VENDOR_NVIDIA=y +CONFIG_FORCEDETH=y +CONFIG_NET_VENDOR_OKI=y +# CONFIG_PCH_GBE is not set +# CONFIG_ETHOC is not set +# CONFIG_NET_PACKET_ENGINE is not set +CONFIG_NET_VENDOR_QLOGIC=y +# CONFIG_QLA3XXX is not set +# CONFIG_QLCNIC is not set +# CONFIG_QLGE is not set +# CONFIG_NETXEN_NIC is not set +CONFIG_NET_VENDOR_REALTEK=y +# CONFIG_8139CP is not set +CONFIG_8139TOO=y +# CONFIG_8139TOO_PIO is not set +# CONFIG_8139TOO_TUNE_TWISTER is not set +# CONFIG_8139TOO_8129 is not set +# CONFIG_8139_OLD_RX_RESET is not set +CONFIG_R8169=y +CONFIG_NET_VENDOR_RDC=y +# CONFIG_R6040 is not set +CONFIG_NET_VENDOR_SEEQ=y +CONFIG_NET_VENDOR_SILAN=y +# CONFIG_SC92031 is not set +CONFIG_NET_VENDOR_SIS=y +# CONFIG_SIS900 is not set +# CONFIG_SIS190 is not set +# CONFIG_SFC is not set +CONFIG_NET_VENDOR_SMSC=y +# CONFIG_EPIC100 is not set +# CONFIG_SMSC9420 is not set +CONFIG_NET_VENDOR_STMICRO=y +# CONFIG_STMMAC_ETH is not set +CONFIG_NET_VENDOR_SUN=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NIU is not set +CONFIG_NET_VENDOR_TEHUTI=y +# CONFIG_TEHUTI is not set +CONFIG_NET_VENDOR_TI=y +# CONFIG_TLAN is not set +CONFIG_NET_VENDOR_VIA=y +# CONFIG_VIA_RHINE is not set +# CONFIG_VIA_VELOCITY is not set +CONFIG_NET_VENDOR_WIZNET=y +# CONFIG_WIZNET_W5100 is not set +# CONFIG_WIZNET_W5300 is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_AT803X_PHY is not set +# CONFIG_AMD_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_RTL8152 is not set +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +# CONFIG_USB_NET_AX88179_178A is not set +# CONFIG_USB_NET_CDCETHER is not set +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=y +# CONFIG_USB_NET_CDC_MBIM is not set +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET=y +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +# CONFIG_USB_BELKIN is not set +# CONFIG_USB_ARMLINUX is not set +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +# CONFIG_USB_NET_ZAURUS is not set +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +CONFIG_WLAN=y +# CONFIG_LIBERTAS_THINFIRM is not set +# CONFIG_AIRO is not set +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +# CONFIG_PRISM54 is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +# CONFIG_ADM8211 is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_MWL8K is not set +CONFIG_WIFI_CONTROL_FUNC=y +CONFIG_WIFI_PLATFORM_DATA=y +# CONFIG_ATH_CARDS is not set +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_BRCMFMAC is not set +# CONFIG_HOSTAP is not set +# CONFIG_IPW2100 is not set +# CONFIG_IWLWIFI is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_LIBERTAS is not set +# CONFIG_P54_COMMON is not set +# CONFIG_RT2X00 is not set +# CONFIG_RTLWIFI is not set +# CONFIG_WL_TI is not set +# CONFIG_ZD1211RW is not set +# CONFIG_MWIFIEX is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=y +CONFIG_INPUT_SPARSEKMAP=y +# CONFIG_INPUT_MATRIXKMAP is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_GPIO_POLLED=y +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_INPUT_MOUSE=y +# CONFIG_MOUSE_PS2 is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +CONFIG_INPUT_JOYSTICK=y +# CONFIG_JOYSTICK_ANALOG is not set +# CONFIG_JOYSTICK_A3D is not set +# CONFIG_JOYSTICK_ADI is not set +# CONFIG_JOYSTICK_COBRA is not set +# CONFIG_JOYSTICK_GF2K is not set +# CONFIG_JOYSTICK_GRIP is not set +# CONFIG_JOYSTICK_GRIP_MP is not set +# CONFIG_JOYSTICK_GUILLEMOT is not set +# CONFIG_JOYSTICK_INTERACT is not set +# CONFIG_JOYSTICK_SIDEWINDER is not set +# CONFIG_JOYSTICK_TMDC is not set +# CONFIG_JOYSTICK_IFORCE is not set +# CONFIG_JOYSTICK_WARRIOR is not set +# CONFIG_JOYSTICK_MAGELLAN is not set +# CONFIG_JOYSTICK_SPACEORB is not set +# CONFIG_JOYSTICK_SPACEBALL is not set +# CONFIG_JOYSTICK_STINGER is not set +# CONFIG_JOYSTICK_TWIDJOY is not set +# CONFIG_JOYSTICK_ZHENHUA is not set +# CONFIG_JOYSTICK_AS5011 is not set +# CONFIG_JOYSTICK_JOYDUMP is not set +# CONFIG_JOYSTICK_XPAD is not set +CONFIG_INPUT_TABLET=y +# CONFIG_TABLET_USB_ACECAD is not set +# CONFIG_TABLET_USB_AIPTEK is not set +# CONFIG_TABLET_USB_GTCO is not set +# CONFIG_TABLET_USB_HANWANG is not set +# CONFIG_TABLET_USB_KBTAB is not set +# CONFIG_TABLET_USB_WACOM is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_INTEL_MID is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_PCSPKR is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_MPU3050 is not set +# CONFIG_INPUT_APANEL is not set +# CONFIG_INPUT_GP2A is not set +# CONFIG_INPUT_GPIO_TILT_POLLED is not set +# CONFIG_INPUT_WISTRON_BTNS is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +CONFIG_INPUT_UINPUT=y +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_CMA3000 is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_I8042 is not set +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_CT82C710 is not set +# CONFIG_SERIO_PCIPS2 is not set +# CONFIG_SERIO_LIBPS2 is not set +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +# CONFIG_LEGACY_PTYS is not set +CONFIG_SERIAL_NONSTANDARD=y +# CONFIG_ROCKETPORT is not set +# CONFIG_CYCLADES is not set +# CONFIG_MOXA_INTELLIO is not set +# CONFIG_MOXA_SMARTIO is not set +# CONFIG_SYNCLINK is not set +# CONFIG_SYNCLINKMP is not set +# CONFIG_SYNCLINK_GT is not set +# CONFIG_NOZOMI is not set +# CONFIG_ISI is not set +# CONFIG_N_HDLC is not set +CONFIG_N_GSM=y +# CONFIG_TRACE_SINK is not set +CONFIG_DEVKMEM=y +# CONFIG_STALDRV is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set +CONFIG_FIX_EARLYCON_MEM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +CONFIG_SERIAL_MRST_MAX3110=y +# CONFIG_SERIAL_MFD_HSU is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_TIMBERDALE is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_PCH_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_TTY_PRINTK is not set +# CONFIG_VIRTIO_CONSOLE is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_INTEL=y +CONFIG_HW_RANDOM_AMD=y +CONFIG_HW_RANDOM_GEODE=y +CONFIG_HW_RANDOM_VIA=y +# CONFIG_HW_RANDOM_VIRTIO is not set +CONFIG_NVRAM=y +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_SONYPI is not set +# CONFIG_MWAVE is not set +# CONFIG_PC8736x_GPIO is not set +# CONFIG_NSC_GPIO is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_HANGCHECK_TIMER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_MUX is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_ISMT is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EG20T is not set +CONFIG_I2C_GPIO=y +# CONFIG_I2C_INTEL_MID is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_PXA_PCI is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_SCx200_ACB is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +CONFIG_SPI_BITBANG=y +CONFIG_SPI_GPIO=y +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_PXA2XX_PCI is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_TOPCLIFF_PCH is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +CONFIG_SPI_DESIGNWARE=y +CONFIG_SPI_DW_PCI=y +CONFIG_SPI_DW_MID_DMA=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set + +# +# Qualcomm MSM SSBI bus support +# +# CONFIG_SSBI is not set +# CONFIG_HSI is not set + +# +# PPS support +# +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +# CONFIG_PTP_1588_CLOCK_PCH is not set +CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +CONFIG_GPIO_DEVRES=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y +CONFIG_GPIODEBUG=y + +# +# Memory mapped GPIO drivers: +# +# CONFIG_GPIO_GENERIC_PLATFORM is not set +# CONFIG_GPIO_IT8761E is not set +# CONFIG_GPIO_TS5500 is not set +# CONFIG_GPIO_SCH is not set +# CONFIG_GPIO_ICH is not set +# CONFIG_GPIO_VX855 is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_SX150X is not set +# CONFIG_GPIO_WM8994 is not set +# CONFIG_GPIO_ADP5588 is not set + +# +# PCI GPIO expanders: +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_AMD8111 is not set +CONFIG_GPIO_LANGWELL=y +# CONFIG_GPIO_PCH is not set +# CONFIG_GPIO_ML_IOH is not set +# CONFIG_GPIO_RDC321X is not set + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_74X164 is not set + +# +# AC97 GPIO expanders: +# + +# +# MODULbus GPIO expanders: +# +# CONFIG_GPIO_MSIC is not set + +# +# USB GPIO expanders: +# +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_SBS is not set +# CONFIG_BATTERY_BQ27x00 is not set +# CONFIG_BATTERY_MAX17040 is not set +CONFIG_BATTERY_MAX17042=y +# CONFIG_BATTERY_INTEL_MID is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GOLDFISH is not set +# CONFIG_POWER_RESET is not set +# CONFIG_POWER_AVS is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_ABITUGURU is not set +# CONFIG_SENSORS_ABITUGURU3 is not set +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_K8TEMP is not set +# CONFIG_SENSORS_K10TEMP is not set +# CONFIG_SENSORS_FAM15H_POWER is not set +# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FSCHMD is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +CONFIG_SENSORS_CORETEMP=y +CONFIG_SENSORS_CORETEMP_INTERRUPT=y +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +CONFIG_MSIC_GPADC=y +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH56XX_COMMON is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_ADS1015 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +# CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VIA_CPUTEMP is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_SENSORS_APPLESMC is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_USER_SPACE is not set +# CONFIG_CPU_THERMAL is not set +# CONFIG_THERMAL_EMULATION is not set +# CONFIG_INTEL_POWERCLAMP is not set +CONFIG_SENSORS_THERMAL_MRFLD=y +CONFIG_SOC_THERMAL=y +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_CORE is not set +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_ACQUIRE_WDT is not set +# CONFIG_ADVANTECH_WDT is not set +# CONFIG_ALIM1535_WDT is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_F71808E_WDT is not set +# CONFIG_SP5100_TCO is not set +# CONFIG_SC520_WDT is not set +# CONFIG_SBC_FITPC2_WATCHDOG is not set +# CONFIG_EUROTECH_WDT is not set +# CONFIG_IB700_WDT is not set +# CONFIG_IBMASR is not set +# CONFIG_WAFER_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_IE6XX_WDT is not set +# CONFIG_INTEL_SCU_WATCHDOG is not set +CONFIG_INTEL_SCU_WATCHDOG_EVO=y +CONFIG_DISABLE_SCU_WATCHDOG=y +# CONFIG_ITCO_WDT is not set +# CONFIG_IT8712F_WDT is not set +# CONFIG_IT87_WDT is not set +# CONFIG_HP_WATCHDOG is not set +# CONFIG_SC1200_WDT is not set +# CONFIG_PC87413_WDT is not set +# CONFIG_NV_TCO is not set +# CONFIG_60XX_WDT is not set +# CONFIG_SBC8360_WDT is not set +# CONFIG_SBC7240_WDT is not set +# CONFIG_CPU5_WDT is not set +# CONFIG_SMSC_SCH311X_WDT is not set +# CONFIG_SMSC37B787_WDT is not set +# CONFIG_VIA_WDT is not set +# CONFIG_W83627HF_WDT is not set +# CONFIG_W83697HF_WDT is not set +# CONFIG_W83697UG_WDT is not set +# CONFIG_W83877F_WDT is not set +# CONFIG_W83977F_WDT is not set +# CONFIG_MACHZ_WDT is not set +# CONFIG_SBC_EPX_C3_WATCHDOG is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y + +# +# Broadcom specific AMBA +# +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_CS5535 is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_CROS_EC is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +CONFIG_MFD_INTEL_MSIC=y +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SMSC is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +# CONFIG_MFD_SYSCON is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TIMBERDALE is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +CONFIG_MFD_WM8994=y +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_DUMMY is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_GPIO is not set +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_FAN53555 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_REGULATOR_WM8994=y +CONFIG_REGULATOR_PMIC_BASIN_COVE=y +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set +# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_RC_SUPPORT is not set +CONFIG_MEDIA_CONTROLLER=y +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_VIDEO_V4L2=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_VIDEO_V4L2_INT_DEVICE is not set +# CONFIG_TTPCI_EEPROM is not set + +# +# Media drivers +# +# CONFIG_MEDIA_USB_SUPPORT is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +# CONFIG_V4L_PLATFORM_DRIVERS is not set +# CONFIG_V4L_MEM2MEM_DRIVERS is not set +# CONFIG_V4L_TEST_DRIVERS is not set + +# +# Supported MMC/SDIO adapters +# +# CONFIG_CYPRESS_FIRMWARE is not set + +# +# Media ancillary drivers (tuners, sensors, i2c, frontends) +# +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set + +# +# Encoders, decoders, sensors and other helper chips +# + +# +# Audio decoders, processors and mixers +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_UDA1342 is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set +# CONFIG_VIDEO_SONY_BTF_MPX is not set + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_ADV7604 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_SAA7191 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9903 is not set +# CONFIG_VIDEO_TW9906 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_CX25840 is not set + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_AD9389B is not set +# CONFIG_VIDEO_AK881X is not set + +# +# Camera sensor devices +# +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5C73M3 is not set + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_AS3645A is not set + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set + +# +# Miscelaneous helper chips +# +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_M52790 is not set + +# +# Sensors used on soc_camera driver +# + +# +# Customise DVB Frontends +# +# CONFIG_DVB_AU8522_V4L is not set +CONFIG_DVB_TUNER_DIB0070=m +CONFIG_DVB_TUNER_DIB0090=m + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set + +# +# Graphics support +# +CONFIG_AGP=y +# CONFIG_AGP_ALI is not set +# CONFIG_AGP_ATI is not set +# CONFIG_AGP_AMD is not set +CONFIG_AGP_AMD64=y +CONFIG_AGP_INTEL=y +# CONFIG_AGP_NVIDIA is not set +# CONFIG_AGP_SIS is not set +# CONFIG_AGP_SWORKS is not set +# CONFIG_AGP_VIA is not set +# CONFIG_AGP_EFFICEON is not set +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 +CONFIG_DRM=y +# CONFIG_DRM_TDFX is not set +# CONFIG_DRM_R128 is not set +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_I915 is not set +# CONFIG_DRM_MGA is not set +# CONFIG_DRM_SIS is not set +# CONFIG_DRM_VIA is not set +# CONFIG_DRM_SAVAGE is not set +# CONFIG_DRM_VMWGFX is not set +# CONFIG_DRM_GMA500 is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_QXL is not set +# CONFIG_VGASTATE is not set +CONFIG_VIDEO_OUTPUT_CONTROL=y +CONFIG_HDMI=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +# CONFIG_FB_CFB_FILLRECT is not set +# CONFIG_FB_CFB_COPYAREA is not set +# CONFIG_FB_CFB_IMAGEBLIT is not set +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_TILEBLITTING=y + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ARC is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_VGA16 is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_VESA is not set +# CONFIG_FB_N411 is not set +# CONFIG_FB_HGA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_I810 is not set +# CONFIG_FB_LE80578 is not set +# CONFIG_FB_INTEL is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_VIA is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_GEODE is not set +# CONFIG_FB_TMIO is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_GOLDFISH is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +# CONFIG_FB_AUO_K190X is not set +# CONFIG_EXYNOS_VIDEO is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +# CONFIG_BACKLIGHT_SAHARA is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630 is not set +# CONFIG_BACKLIGHT_LM3639 is not set +# CONFIG_BACKLIGHT_LP855X is not set + +# +# Console display driver support +# +CONFIG_VGA_CONSOLE=y +# CONFIG_VGACON_SOFT_SCROLLBACK is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_LOGO is not set +CONFIG_SOUND=y +# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_COMPRESS_OFFLOAD=y +CONFIG_SND_JACK=y +CONFIG_SND_SEQUENCER=y +# CONFIG_SND_SEQ_DUMMY is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SND_SEQUENCER_OSS is not set +# CONFIG_SND_HRTIMER is not set +CONFIG_SND_DYNAMIC_MINORS=y +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_VERBOSE_PROCFS is not set +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_DMA_SGBUF=y +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_PCSP is not set +# CONFIG_SND_DUMMY is not set +CONFIG_SND_ALOOP=y +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +# CONFIG_SND_PCI is not set +# CONFIG_SND_SPI is not set +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_USX2Y is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_US122L is not set +# CONFIG_SND_USB_6FIRE is not set +CONFIG_SND_SOC=y +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_MFLD_MACHINE is not set +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_ALL_CODECS is not set +# CONFIG_SND_SIMPLE_CARD is not set +# CONFIG_SOUND_PRIME is not set + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LENOVO_TPKBD is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_PS3REMOTE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set + +# +# USB HID support +# +CONFIG_USB_HID=y +CONFIG_HID_PID=y +CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB_ARCH_HAS_XHCI=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_MON=y +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PLATFORM=y +# CONFIG_USB_XHCI_HCD_DEBUGGING is not set +CONFIG_USB_EHCI_HCD=y +# CONFIG_USB_EHCI_ROOT_HUB_TT is not set +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +CONFIG_USB_EHCI_PCI=y +# CONFIG_USB_EHCI_HCD_PLATFORM is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_RENESAS_USBHS is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=y +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_HOST is not set +CONFIG_USB_DWC3_GADGET=y +# CONFIG_USB_DWC3_DUAL_ROLE is not set + +# +# Platform Glue Driver Support +# +# CONFIG_USB_DWC3_PCI is not set +CONFIG_USB_DWC3_OTG=y +CONFIG_USB_DWC3_INTEL_MRFL=y +# CONFIG_USB_DWC3_INTEL_BYT is not set +CONFIG_USB_DWC3_DEVICE_INTEL=y +CONFIG_USB_DWC3_HOST_INTEL=y + +# +# Debugging features +# +# CONFIG_USB_DWC3_DEBUG is not set +# CONFIG_USB_CHIPIDEA is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP210X is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_FUNSOFT is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MOTOROLA is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=y +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIEMENS_MPI is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +# CONFIG_USB_SERIAL_OPTION is not set +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_ZIO is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_ZTE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HSIC_USB3503 is not set +CONFIG_USB_PHY=y +CONFIG_NOP_USB_XCEIV=y +# CONFIG_OMAP_CONTROL_USB is not set +# CONFIG_OMAP_USB3 is not set +# CONFIG_SAMSUNG_USBPHY is not set +# CONFIG_SAMSUNG_USB2PHY is not set +# CONFIG_SAMSUNG_USB3PHY is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_RCAR_PHY is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=500 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 + +# +# USB Peripheral Controller +# +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_DUMMY_HCD is not set +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set +# CONFIG_UWB is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y +# CONFIG_MMC_CLKGATE is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=10 +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PCI=y +# CONFIG_MMC_RICOH_MMC is not set +# CONFIG_MMC_SDHCI_PLTFM is not set +# CONFIG_MMC_WBSD is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_PCA9532 is not set +# CONFIG_LEDS_GPIO is not set +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_LP5562 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA9633 is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_INTEL_SS4200 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_OT200 is not set +# CONFIG_LEDS_BLINKM is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_ONESHOT is not set +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +# CONFIG_LEDS_TRIGGER_CPU is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC=y +CONFIG_EDAC_LEGACY_SYSFS=y +# CONFIG_EDAC_DEBUG is not set +# CONFIG_EDAC_MM_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_RX4581 is not set + +# +# Platform RTC drivers +# +CONFIG_RTC_DRV_CMOS=y +# CONFIG_RTC_DRV_VRTC is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_DS2404 is not set + +# +# on-CPU RTC drivers +# + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_INTEL_MID_DMAC=y +# CONFIG_INTEL_IOATDMA is not set +# CONFIG_DW_DMAC is not set +# CONFIG_TIMB_DMA is not set +# CONFIG_PCH_DMA is not set +CONFIG_DMA_ENGINE=y + +# +# DMA Clients +# +# CONFIG_NET_DMA is not set +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO=y + +# +# Virtio drivers +# +# CONFIG_VIRTIO_PCI is not set +# CONFIG_VIRTIO_BALLOON is not set +# CONFIG_VIRTIO_MMIO is not set + +# +# Microsoft Hyper-V guest support +# +CONFIG_STAGING=y +# CONFIG_ET131X is not set +# CONFIG_SLICOSS is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_W35UND is not set +# CONFIG_PRISM2_USB is not set +# CONFIG_ECHO is not set +# CONFIG_COMEDI is not set +# CONFIG_ASUS_OLED is not set +# CONFIG_R8187SE is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_R8712U is not set +# CONFIG_RTS5139 is not set +# CONFIG_TRANZPORT is not set +# CONFIG_IDE_PHISON is not set +# CONFIG_LINE6_USB is not set +# CONFIG_USB_SERIAL_QUATECH2 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set +# CONFIG_DX_SEP is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16204 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADIS16220 is not set +# CONFIG_ADIS16240 is not set +# CONFIG_LIS3L02DQ is not set + +# +# Analog to digital converters +# +# CONFIG_AD7291 is not set +# CONFIG_AD7606 is not set +# CONFIG_AD799X is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7816 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7280 is not set + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7152 is not set +# CONFIG_AD7746 is not set + +# +# Direct Digital Synthesis +# +# CONFIG_AD5930 is not set +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set +# CONFIG_AD9850 is not set +# CONFIG_AD9852 is not set +# CONFIG_AD9910 is not set +# CONFIG_AD9951 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16060 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16260 is not set + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set + +# +# Light sensors +# +# CONFIG_SENSORS_ISL29018 is not set +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_TSL2583 is not set +# CONFIG_TSL2x7x is not set + +# +# Magnetometer sensors +# +# CONFIG_SENSORS_HMC5843 is not set + +# +# Active energy metering IC +# +# CONFIG_ADE7753 is not set +# CONFIG_ADE7754 is not set +# CONFIG_ADE7758 is not set +# CONFIG_ADE7759 is not set +# CONFIG_ADE7854 is not set + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set + +# +# Triggers - standalone +# +# CONFIG_IIO_SIMPLE_DUMMY is not set +# CONFIG_ZSMALLOC is not set +# CONFIG_FB_SM7XX is not set +# CONFIG_CRYSTALHD is not set +# CONFIG_FB_XGI is not set +# CONFIG_USB_ENESTORAGE is not set +# CONFIG_BCM_WIMAX is not set +# CONFIG_FT1000 is not set + +# +# Speakup console speech +# +# CONFIG_SPEAKUP is not set +# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set +# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ASHMEM=y +CONFIG_ANDROID_LOGGER=y +CONFIG_ANDROID_TIMED_OUTPUT=y +# CONFIG_ANDROID_TIMED_GPIO is not set +CONFIG_ANDROID_LOW_MEMORY_KILLER=y +CONFIG_ANDROID_INTF_ALARM_DEV=y +CONFIG_SYNC=y +CONFIG_SW_SYNC=y +CONFIG_SW_SYNC_USER=y +# CONFIG_USB_WPAN_HCD is not set +# CONFIG_WIMAX_GDM72XX is not set +# CONFIG_NET_VENDOR_SILICOM is not set +# CONFIG_CED1401 is not set +# CONFIG_DGRP is not set +# CONFIG_USB_DWC2 is not set +CONFIG_X86_PLATFORM_DEVICES=y +# CONFIG_CHROMEOS_LAPTOP is not set +# CONFIG_AMILO_RFKILL is not set +# CONFIG_SENSORS_HDAPS is not set +CONFIG_INTEL_SCU_IPC=y +CONFIG_INTEL_SCU_IPC_INTR_MODE=y +# CONFIG_INTEL_SCU_IPC_POLL_MODE is not set +CONFIG_INTEL_SCU_IPC_UTIL=y +CONFIG_GPIO_INTEL_PMIC=y +CONFIG_INTEL_MID_POWER_BUTTON=y +# CONFIG_INTEL_MFLD_THERMAL is not set +# CONFIG_IBM_RTL is not set +# CONFIG_SAMSUNG_LAPTOP is not set +CONFIG_INTEL_SCU_FLIS=y + +# +# Hardware Spinlock drivers +# +CONFIG_CLKSRC_I8253=y +CONFIG_CLKEVT_I8253=y +CONFIG_I8253_LOCK=y +CONFIG_CLKBLD_I8253=y +# CONFIG_MAILBOX is not set +CONFIG_IOMMU_SUPPORT=y + +# +# Remoteproc drivers +# +CONFIG_REMOTEPROC=y +# CONFIG_STE_MODEM_RPROC is not set +CONFIG_INTEL_MID_REMOTEPROC=y + +# +# Rpmsg drivers +# +CONFIG_RPMSG=y +CONFIG_RPMSG_IPC=y +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y + +# +# DEVFREQ Drivers +# +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_MEMORY is not set +CONFIG_IIO=y +# CONFIG_IIO_BUFFER is not set +# CONFIG_IIO_TRIGGER is not set + +# +# Accelerometers +# +# CONFIG_KXSD9 is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set + +# +# Analog to digital converters +# +# CONFIG_AD7266 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7887 is not set +# CONFIG_MAX1363 is not set +# CONFIG_TI_ADC081C is not set +CONFIG_IIO_BASINCOVE_GPADC=y + +# +# Amplifiers +# +# CONFIG_AD8366 is not set + +# +# Hid Sensor IIO Common +# + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5791 is not set +# CONFIG_AD5686 is not set +# CONFIG_MAX517 is not set +# CONFIG_MCP4725 is not set + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_INV_MPU6050_IIO is not set + +# +# Light sensors +# +# CONFIG_ADJD_S311 is not set +# CONFIG_SENSORS_TSL2563 is not set +# CONFIG_VCNL4000 is not set + +# +# Magnetometer sensors +# +# CONFIG_AK8975 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_VME_BUS is not set +# CONFIG_PWM is not set +# CONFIG_IPACK_BUS is not set +# CONFIG_RESET_CONTROLLER is not set + +# +# Firmware Drivers +# +# CONFIG_EDD is not set +CONFIG_FIRMWARE_MEMMAP=y +# CONFIG_DELL_RBU is not set +# CONFIG_DCDBAS is not set +CONFIG_DMIID=y +# CONFIG_DMI_SYSFS is not set +# CONFIG_ISCSI_IBFT_FIND is not set +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +# CONFIG_EXT4_FS_POSIX_ACL is not set +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +# CONFIG_FANOTIFY_ACCESS_PERMISSIONS is not set +# CONFIG_QUOTA is not set +# CONFIG_QUOTACTL is not set +# CONFIG_AUTOFS4_FS is not set +CONFIG_FUSE_FS=y +# CONFIG_CUSE is not set +CONFIG_GENERIC_ACL=y + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +# CONFIG_VFAT_FS_NO_DUALNAMES is not set +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_VFAT_NO_CREATE_WITH_LONGNAMES is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_HUGETLBFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_CONFIGFS_FS=y +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_LOGFS is not set +# CONFIG_CRAMFS is not set +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_PSTORE=y +CONFIG_PSTORE_CONSOLE=y +CONFIG_PSTORE_FTRACE=y +CONFIG_PSTORE_RAM=y +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_AUFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_DEF_FILE_IO_SIZE=4096 +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +# CONFIG_NFS_SWAP is not set +# CONFIG_NFS_V4_1 is not set +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set + +# +# Kernel hacking +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_PRINTK_TIME=y +CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 +# CONFIG_ENABLE_WARN_DEPRECATED is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_SECTION_MISMATCH=y +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_SHIRQ=y +CONFIG_LOCKUP_DETECTOR=y +CONFIG_HARDLOCKUP_DETECTOR=y +CONFIG_BOOTPARAM_HARDLOCKUP_PANIC=y +CONFIG_BOOTPARAM_HARDLOCKUP_PANIC_VALUE=1 +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1 +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_DEBUG_KMEMLEAK=y +CONFIG_DEBUG_KMEMLEAK_EARLY_LOG_SIZE=400 +# CONFIG_DEBUG_KMEMLEAK_TEST is not set +CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF=y +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +CONFIG_TRACE_IRQFLAGS=y +CONFIG_DEBUG_ATOMIC_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +CONFIG_STACKTRACE=y +CONFIG_DEBUG_STACK_USAGE=y +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_HIGHMEM is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VIRTUAL is not set +# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_DEBUG_LIST=y +CONFIG_TEST_LIST_SORT=y +CONFIG_DEBUG_SG=y +CONFIG_DEBUG_NOTIFIERS=y +# CONFIG_DEBUG_CREDENTIALS is not set +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +CONFIG_BOOT_PRINTK_DELAY=y + +# +# RCU Debugging +# +# CONFIG_PROVE_RCU_DELAY is not set +CONFIG_SPARSE_RCU_POINTER=y +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +CONFIG_RCU_CPU_STALL_VERBOSE=y +CONFIG_RCU_CPU_STALL_INFO=y +# CONFIG_RCU_TRACE is not set +# CONFIG_KPROBES_SANITY_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_LKDTM is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_ARCH_HAS_DEBUG_STRICT_USER_COPY_CHECKS=y +# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set +# CONFIG_DEBUG_PAGEALLOC is not set +CONFIG_USER_STACKTRACE_SUPPORT=y +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y +CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACER_MAX_TRACE=y +CONFIG_TRACE_CLOCK=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_RING_BUFFER_ALLOW_SWAP=y +CONFIG_TRACING=y +CONFIG_GENERIC_TRACER=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +CONFIG_FUNCTION_TRACER=y +CONFIG_FUNCTION_GRAPH_TRACER=y +CONFIG_IRQSOFF_TRACER=y +CONFIG_PREEMPT_TRACER=y +CONFIG_SCHED_TRACER=y +CONFIG_FTRACE_SYSCALLS=y +CONFIG_TRACER_SNAPSHOT=y +CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP=y +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_STACK_TRACER is not set +CONFIG_BLK_DEV_IO_TRACE=y +# CONFIG_KPROBE_EVENT is not set +# CONFIG_UPROBE_EVENT is not set +# CONFIG_PROBE_EVENTS is not set +CONFIG_DYNAMIC_FTRACE=y +CONFIG_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_FUNCTION_PROFILER=y +CONFIG_FTRACE_MCOUNT_RECORD=y +# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_MMIOTRACE is not set +# CONFIG_RING_BUFFER_BENCHMARK is not set +# CONFIG_RING_BUFFER_STARTUP_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +CONFIG_PROVIDE_OHCI1394_DMA_INIT=y +CONFIG_DYNAMIC_DEBUG=y +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_HAVE_ARCH_KMEMCHECK=y +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_STRICT_DEVMEM is not set +CONFIG_X86_VERBOSE_BOOTUP=y +CONFIG_EARLY_PRINTK=y +CONFIG_EARLY_PRINTK_INTEL_MID=y +# CONFIG_EARLY_PRINTK_DBGP is not set +CONFIG_DEBUG_STACKOVERFLOW=y +# CONFIG_X86_PTDUMP is not set +CONFIG_DEBUG_RODATA=y +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_DEBUG_SET_MODULE_RONX=y +CONFIG_DEBUG_NX_TEST=m +CONFIG_DOUBLEFAULT=y +# CONFIG_DEBUG_TLBFLUSH is not set +# CONFIG_IOMMU_STRESS is not set +CONFIG_HAVE_MMIOTRACE_SUPPORT=y +# CONFIG_X86_DECODER_SELFTEST is not set +CONFIG_IO_DELAY_TYPE_0X80=0 +CONFIG_IO_DELAY_TYPE_0XED=1 +CONFIG_IO_DELAY_TYPE_UDELAY=2 +CONFIG_IO_DELAY_TYPE_NONE=3 +CONFIG_IO_DELAY_0X80=y +# CONFIG_IO_DELAY_0XED is not set +# CONFIG_IO_DELAY_UDELAY is not set +# CONFIG_IO_DELAY_NONE is not set +CONFIG_DEFAULT_IO_DELAY_TYPE=0 +CONFIG_DEBUG_BOOT_PARAMS=y +# CONFIG_CPA_DEBUG is not set +CONFIG_OPTIMIZE_INLINING=y +# CONFIG_DEBUG_NMI_SELFTEST is not set + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_ENCRYPTED_KEYS is not set +CONFIG_KEYS_DEBUG_PROC_KEYS=y +# CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_SECURITY=y +# CONFIG_SECURITYFS is not set +CONFIG_SECURITY_NETWORK=y +# CONFIG_SECURITY_NETWORK_XFRM is not set +# CONFIG_SECURITY_PATH is not set +CONFIG_LSM_MMAP_MIN_ADDR=65536 +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1 +CONFIG_SECURITY_SELINUX_DISABLE=y +CONFIG_SECURITY_SELINUX_DEVELOP=y +CONFIG_SECURITY_SELINUX_AVC_STATS=y +CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 +# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set +# CONFIG_SECURITY_SMACK is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_SECURITY_APPARMOR is not set +# CONFIG_SECURITY_YAMA is not set +# CONFIG_IMA is not set +# CONFIG_EVM is not set +CONFIG_DEFAULT_SECURITY_SELINUX=y +# CONFIG_DEFAULT_SECURITY_DAC is not set +CONFIG_DEFAULT_SECURITY="selinux" +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTODEV is not set +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_PCOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_ABLK_HELPER_X86=y + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y +# CONFIG_CRYPTO_GCM is not set +CONFIG_CRYPTO_SEQIV=y + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_LRW=y +# CONFIG_CRYPTO_PCBC is not set +CONFIG_CRYPTO_XTS=y + +# +# Hash modes +# +# CONFIG_CRYPTO_CMAC is not set +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32C_INTEL is not set +# CONFIG_CRYPTO_CRC32 is not set +# CONFIG_CRYPTO_CRC32_PCLMUL is not set +# CONFIG_CRYPTO_GHASH is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +CONFIG_CRYPTO_AES_586=y +CONFIG_CRYPTO_AES_NI_INTEL=y +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SALSA20_586 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SERPENT_SSE2_586 is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_TWOFISH_COMMON=y +CONFIG_CRYPTO_TWOFISH_586=y + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_PADLOCK is not set +# CONFIG_CRYPTO_DEV_GEODE is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_PUBLIC_KEY_ALGO_RSA=y +CONFIG_X509_CERTIFICATE_PARSER=y +CONFIG_HAVE_KVM=y +CONFIG_VIRTUALIZATION=y +# CONFIG_KVM is not set +# CONFIG_LGUEST is not set +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IO=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +# CONFIG_CRC32_SLICEBY8 is not set +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +CONFIG_CRC32_BIT=y +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=y +# CONFIG_CRC8 is not set +CONFIG_AUDIT_GENERIC=y +CONFIG_ZLIB_INFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +CONFIG_XZ_DEC_POWERPC=y +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_REED_SOLOMON=y +CONFIG_REED_SOLOMON_ENC8=y +CONFIG_REED_SOLOMON_DEC8=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_NLATTR=y +CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y +CONFIG_AVERAGE=y +CONFIG_CLZ_TAB=y +# CONFIG_CORDIC is not set +# CONFIG_DDR is not set +CONFIG_MPILIB=y +CONFIG_OID_REGISTRY=y diff --git a/arch/x86/include/asm/intel-mid.h b/arch/x86/include/asm/intel-mid.h index 5792ee4a686..e6be1264bc3 100644 --- a/arch/x86/include/asm/intel-mid.h +++ b/arch/x86/include/asm/intel-mid.h @@ -11,12 +11,91 @@ #ifndef _ASM_X86_INTEL_MID_H #define _ASM_X86_INTEL_MID_H +#include <linux/types.h> +#include <linux/init.h> #include <linux/sfi.h> +#include <linux/pci.h> +#include <linux/platform_device.h> +#include <asm/spid.h> +#include <asm/intel_mid_pcihelpers.h> + +#ifdef CONFIG_SFI +extern int get_gpio_by_name(const char *name); +extern void install_irq_resource(struct platform_device *pdev, int irq); +#else +static inline int get_gpio_by_name(const char *name) { return -ENODEV; } +/* Dummy function to prevent compilation error in byt */ +static inline void install_irq_resource(struct platform_device *pdev, int irq) +{}; +#endif extern int intel_mid_pci_init(void); +extern void *get_oem0_table(void); +extern void intel_delayed_device_register(void *dev, + void (*delayed_callback)(void *dev_desc)); +extern void intel_scu_device_register(struct platform_device *pdev); +extern struct devs_id *get_device_id(u8 type, char *name); extern int __init sfi_parse_mrtc(struct sfi_table_header *table); +extern int __init sfi_parse_mtmr(struct sfi_table_header *table); extern int sfi_mrtc_num; extern struct sfi_rtc_table_entry sfi_mrtc_array[]; +extern void *get_oem0_table(void); +extern void register_rpmsg_service(char *name, int id, u32 addr); +extern int sdhci_pci_request_regulators(void); + +/* OEMB table */ +struct sfi_table_oemb { + struct sfi_table_header header; + u32 board_id; + u32 board_fab; + u8 iafw_major_version; + u8 iafw_main_version; + u8 val_hooks_major_version; + u8 val_hooks_minor_version; + u8 ia_suppfw_major_version; + u8 ia_suppfw_minor_version; + u8 scu_runtime_major_version; + u8 scu_runtime_minor_version; + u8 ifwi_major_version; + u8 ifwi_minor_version; + struct soft_platform_id spid; + u8 ssn[INTEL_PLATFORM_SSN_SIZE]; +} __packed; + +/* + * Here defines the array of devices platform data that IAFW would export + * through SFI "DEVS" table, we use name and type to match the device and + * its platform data. + */ +struct devs_id { + char name[SFI_NAME_LEN + 1]; + u8 type; + u8 delay; + void *(*get_platform_data)(void *info); + void (*device_handler)(struct sfi_device_table_entry *pentry, + struct devs_id *dev); + /* Custom handler for devices */ + u8 trash_itp;/* true if this driver uses pin muxed with XDB connector */ +}; + +#define SD_NAME_SIZE 16 +/** + * struct sd_board_info - template for device creation + * @name: Initializes sdio_device.name; identifies the driver. + * @bus_num: board-specific identifier for a given SDIO controller. + * @board_ref_clock: Initializes sd_device.board_ref_clock; + * @platform_data: Initializes sd_device.platform_data; the particular + * data stored there is driver-specific. + * + */ +struct sd_board_info { + char name[SD_NAME_SIZE]; + int bus_num; + unsigned short addr; + u32 board_ref_clock; + void *platform_data; +}; + /* * Medfield is the follow-up of Moorestown, it combines two chip solution into @@ -26,25 +105,56 @@ extern struct sfi_rtc_table_entry sfi_mrtc_array[]; * identified via MSRs. */ enum intel_mid_cpu_type { + INTEL_CPU_CHIP_NOTMID = 0, /* 1 was Moorestown */ INTEL_MID_CPU_CHIP_PENWELL = 2, + INTEL_MID_CPU_CHIP_CLOVERVIEW, + INTEL_MID_CPU_CHIP_TANGIER, + INTEL_MID_CPU_CHIP_VALLEYVIEW2, + INTEL_MID_CPU_CHIP_ANNIEDALE, + INTEL_MID_CPU_CHIP_CARBONCANYON, }; extern enum intel_mid_cpu_type __intel_mid_cpu_chip; -#ifdef CONFIG_X86_INTEL_MID +/** + * struct intel_mid_ops - Interface between intel-mid & sub archs + * @arch_setup: arch_setup function to re-initialize platform + * structures (x86_init, x86_platform_init) + * + * This structure can be extended if any new interface is required + * between intel-mid & its sub arch files. + */ +struct intel_mid_ops { + void (*arch_setup)(void); +}; + +/* Helper API's for INTEL_MID_OPS_INIT */ +#define DECLARE_INTEL_MID_OPS_INIT(cpuname, cpuid)[cpuid] = \ + get_##cpuname##_ops, + +/* Maximum number of CPU ops */ +#define MAX_CPU_OPS(a) (sizeof(a)/sizeof(void *)) + +/* + * For every new cpu addition, a weak get_<cpuname>_ops() function needs be + * declared in arch/x86/platform/intel_mid/intel_mid_weak_decls.h. + */ +#define INTEL_MID_OPS_INIT {\ + DECLARE_INTEL_MID_OPS_INIT(penwell, INTEL_MID_CPU_CHIP_PENWELL) \ + DECLARE_INTEL_MID_OPS_INIT(cloverview, INTEL_MID_CPU_CHIP_CLOVERVIEW) \ + DECLARE_INTEL_MID_OPS_INIT(tangier, INTEL_MID_CPU_CHIP_TANGIER) \ +}; static inline enum intel_mid_cpu_type intel_mid_identify_cpu(void) { +#ifdef CONFIG_X86_INTEL_MID return __intel_mid_cpu_chip; +#else + return INTEL_CPU_CHIP_NOTMID; +#endif } -#else /* !CONFIG_X86_INTEL_MID */ - -#define intel_mid_identify_cpu() (0) - -#endif /* !CONFIG_X86_INTEL_MID */ - enum intel_mid_timer_options { INTEL_MID_TIMER_DEFAULT, INTEL_MID_TIMER_APBT_ONLY, @@ -57,8 +167,21 @@ extern enum intel_mid_timer_options intel_mid_timer_options; * Penwell uses spread spectrum clock, so the freq number is not exactly * the same as reported by MSR based on SDM. */ -#define PENWELL_FSB_FREQ_83SKU 83200 -#define PENWELL_FSB_FREQ_100SKU 99840 +#define FSB_FREQ_83SKU 83200 +#define FSB_FREQ_100SKU 99840 +#define FSB_FREQ_133SKU 133000 + +#define FSB_FREQ_167SKU 167000 +#define FSB_FREQ_200SKU 200000 +#define FSB_FREQ_267SKU 267000 +#define FSB_FREQ_333SKU 333000 +#define FSB_FREQ_400SKU 400000 + +/* Bus Select SoC Fuse value */ +#define BSEL_SOC_FUSE_MASK 0x7 +#define BSEL_SOC_FUSE_001 0x1 /* FSB 133MHz */ +#define BSEL_SOC_FUSE_101 0x5 /* FSB 100MHz */ +#define BSEL_SOC_FUSE_111 0x7 /* FSB 83MHz */ #define SFI_MTMR_MAX_NUM 8 #define SFI_MRTC_MAX 8 @@ -72,8 +195,12 @@ extern void mrfld_early_console_init(void); extern struct console early_hsu_console; extern void hsu_early_console_init(const char *); +extern struct console early_pti_console; + extern void intel_scu_devices_create(void); extern void intel_scu_devices_destroy(void); +extern void intel_psh_devices_create(void); +extern void intel_psh_devices_destroy(void); /* VRTC timer */ #define MRST_VRTC_MAP_SZ (1024) @@ -81,4 +208,24 @@ extern void intel_scu_devices_destroy(void); extern void intel_mid_rtc_init(void); +enum intel_mid_sim_type { + INTEL_MID_CPU_SIMULATION_NONE = 0, + INTEL_MID_CPU_SIMULATION_VP, + INTEL_MID_CPU_SIMULATION_SLE, + INTEL_MID_CPU_SIMULATION_HVP, +}; +extern enum intel_mid_sim_type __intel_mid_sim_platform; +static inline enum intel_mid_sim_type intel_mid_identify_sim(void) +{ +#ifdef CONFIG_X86_INTEL_MID + return __intel_mid_sim_platform; +#else + return INTEL_MID_CPU_SIMULATION_NONE; +#endif +} + +#define INTEL_MID_IRQ_OFFSET 0x100 + +extern void pstore_ram_reserve_memory(void); + #endif /* _ASM_X86_INTEL_MID_H */ diff --git a/arch/x86/include/asm/intel_basincove_gpadc.h b/arch/x86/include/asm/intel_basincove_gpadc.h index a34ec9efbcb..d4d1ffac76f 100644 --- a/arch/x86/include/asm/intel_basincove_gpadc.h +++ b/arch/x86/include/asm/intel_basincove_gpadc.h @@ -43,6 +43,7 @@ struct iio_dev; struct intel_basincove_gpadc_platform_data { int channel_num; unsigned long intr; + u8 intr_mask; struct iio_map *gpadc_iio_maps; struct gpadc_regmap_t *gpadc_regmaps; struct gpadc_regs_t *gpadc_regs; diff --git a/arch/x86/include/asm/intel_mid_rpmsg.h b/arch/x86/include/asm/intel_mid_rpmsg.h index 7691234de3c..6a666a273f8 100644 --- a/arch/x86/include/asm/intel_mid_rpmsg.h +++ b/arch/x86/include/asm/intel_mid_rpmsg.h @@ -2,9 +2,12 @@ #define _INTEL_MID_RPMSG_H_ #include <asm/scu_ipc_rpmsg.h> -#include <linux/wakelock.h> #include <linux/rpmsg.h> +#ifdef ANDROID_BUILD +#include <linux/wakelock.h> +#endif + #define RPMSG_TX_TIMEOUT (5 * HZ) struct rpmsg_instance { diff --git a/arch/x86/platform/intel-mid/Makefile b/arch/x86/platform/intel-mid/Makefile index 70cb81f8092..c65d673ef82 100644 --- a/arch/x86/platform/intel-mid/Makefile +++ b/arch/x86/platform/intel-mid/Makefile @@ -13,7 +13,7 @@ obj-y += device_libs/ # SoC specific files obj-$(CONFIG_X86_INTEL_MID) += mfld.o mrfl.o -obj-$(CONFIG_X86_WANT_INTEL_MID) += vlv2.o intel_mid_pcihelpers.o +obj-$(CONFIG_X86_WANT_INTEL_MID) += intel_mid_pcihelpers.o obj-$(CONFIG_X86_INTEL_MID) += intel_mid_scu.o # BOARD files diff --git a/arch/x86/platform/intel-mid/board.c b/arch/x86/platform/intel-mid/board.c index 4fd975d2daf..a03c1cc2cff 100644 --- a/arch/x86/platform/intel-mid/board.c +++ b/arch/x86/platform/intel-mid/board.c @@ -53,14 +53,13 @@ #include "device_libs/platform_msic_audio.h" #include "device_libs/platform_msic_power_btn.h" #include "device_libs/platform_msic_ocd.h" -#include "device_libs/platform_msic_vdd.h" +#include "device_libs/platform_mrfl_pmic.h" +#include "device_libs/platform_mrfl_pmic_i2c.h" #include "device_libs/platform_mrfl_ocd.h" #include "device_libs/platform_msic_thermal.h" #include "device_libs/platform_soc_thermal.h" #include "device_libs/platform_msic_adc.h" #include "device_libs/platform_bcove_adc.h" -#include <asm/platform_mrfld_audio.h> -#include <asm/platform_ctp_audio.h> #include "device_libs/platform_mrfl_thermal.h" /* @@ -137,53 +136,6 @@ struct devs_id __initconst device_ids[] = { {"bcove_thrm", SFI_DEV_TYPE_IPC, 1, &mrfl_thermal_platform_data, &ipc_device_handler}, - /* I2C devices */ - {"bq24192", SFI_DEV_TYPE_I2C, 1, &bq24192_platform_data}, - /* Panel */ - {"PANEL_CMI_CMD", SFI_DEV_TYPE_MDM, 0, &no_platform_data, - &panel_handler}, - {"PANEL_JDI_VID", SFI_DEV_TYPE_MDM, 0, &no_platform_data, - &panel_handler}, - {"ctp_lt_wm8994", SFI_DEV_TYPE_IPC, 1, &ctp_audio_platform_data, - &ipc_device_handler}, - - /* I2C devices for camera image subsystem */ - {"lm3554", SFI_DEV_TYPE_I2C, 0, &lm3554_platform_data_func, - &intel_register_i2c_camera_device}, - {"mt9e013", SFI_DEV_TYPE_I2C, 0, &mt9e013_platform_data, - &intel_register_i2c_camera_device}, - {"mt9d113", SFI_DEV_TYPE_I2C, 0, &mt9d113_platform_data, - &intel_register_i2c_camera_device}, - {"mt9m114", SFI_DEV_TYPE_I2C, 0, &mt9m114_platform_data, - &intel_register_i2c_camera_device}, - {"mt9v113", SFI_DEV_TYPE_I2C, 0, &mt9v113_platform_data, - &intel_register_i2c_camera_device}, - {"ov8830", SFI_DEV_TYPE_I2C, 0, &ov8830_platform_data, - &intel_register_i2c_camera_device}, - {"ov5640", SFI_DEV_TYPE_I2C, 0, &ov5640_platform_data, - &intel_register_i2c_camera_device}, - {"imx175", SFI_DEV_TYPE_I2C, 0, &imx175_platform_data, - &intel_register_i2c_camera_device}, - {"imx135", SFI_DEV_TYPE_I2C, 0, &imx135_platform_data, - &intel_register_i2c_camera_device}, - {"imx134", SFI_DEV_TYPE_I2C, 0, &imx134_platform_data, - &intel_register_i2c_camera_device}, - {"imx132", SFI_DEV_TYPE_I2C, 0, &imx132_platform_data, - &intel_register_i2c_camera_device}, - {"s5k8aay", SFI_DEV_TYPE_I2C, 0, &s5k8aay_platform_data, - &intel_register_i2c_camera_device}, - {"ov9724", SFI_DEV_TYPE_I2C, 0, &ov9724_platform_data, - &intel_register_i2c_camera_device}, - {"ov2722", SFI_DEV_TYPE_I2C, 0, &ov2722_platform_data, - &intel_register_i2c_camera_device}, - {"lm3559", SFI_DEV_TYPE_I2C, 0, &lm3559_platform_data_func, - &intel_register_i2c_camera_device}, - {"audience_es305", SFI_DEV_TYPE_I2C, 0, &audience_platform_data, - NULL}, - {"wm8994", SFI_DEV_TYPE_I2C, 0, &wm8994_platform_data, NULL}, - {"PANEL_JDI_CMD", SFI_DEV_TYPE_MDM, 0, &no_platform_data, - &panel_handler}, - /* IPC devices */ {"pmic_charger", SFI_DEV_TYPE_IPC, 1, &no_platform_data, NULL}, {"pmic_ccsm", SFI_DEV_TYPE_IPC, 1, &mrfl_pmic_ccsm_platform_data, @@ -192,53 +144,7 @@ struct devs_id __initconst device_ids[] = { &ipc_device_handler}, /* IPC devices */ - {"ctp_rhb_cs42l73", SFI_DEV_TYPE_IPC, 1, &ctp_audio_platform_data, - &ipc_device_handler}, - {"ctp_vb_cs42l73", SFI_DEV_TYPE_IPC, 1, &ctp_audio_platform_data, - &ipc_device_handler}, - {"ctp_ht_wm5102", SFI_DEV_TYPE_IPC, 1, &ctp_audio_platform_data, - &ipc_device_handler}, - {"mrfld_lm49453", SFI_DEV_TYPE_IPC, 1, &merfld_audio_platform_data, - &ipc_device_handler}, - {"mrfld_wm8958", SFI_DEV_TYPE_IPC, 1, &merfld_wm8958_audio_platform_data, - &ipc_device_handler}, {"soc_thrm", SFI_DEV_TYPE_IPC, 1, &no_platform_data, &soc_thrm_device_handler}, - {"wm8958", SFI_DEV_TYPE_I2C, 0, &wm8994_platform_data, NULL}, - {"lm49453_codec", SFI_DEV_TYPE_I2C, 1, &no_platform_data, NULL}, - {"cs42l73", SFI_DEV_TYPE_I2C, 1, &cs42l73_platform_data, NULL}, -#ifndef CONFIG_HSI_NO_MODEM - {"hsi_ifx_modem", SFI_DEV_TYPE_HSI, 0, &hsi_modem_platform_data, NULL}, - {"hsi_ffl_modem", SFI_DEV_TYPE_HSI, 0, &ffl_modem_platform_data, NULL}, - {"hsi_edlp_modem", SFI_DEV_TYPE_HSI, 0, &edlp_modem_platform_data, - NULL}, - {"hsi_edlp_fast", SFI_DEV_TYPE_HSI, 0, &edlp_fast_platform_data, NULL}, -#endif - {"XMM_6260", SFI_DEV_TYPE_MDM, 0, &modem_platform_data, - &sfi_handle_mdm}, - {"XMM_6268", SFI_DEV_TYPE_MDM, 0, &modem_platform_data, - &sfi_handle_mdm}, - {"XMM_6360", SFI_DEV_TYPE_MDM, 0, &modem_platform_data, - &sfi_handle_mdm}, - {"XMM_7160_REV1", SFI_DEV_TYPE_MDM, 0, &modem_platform_data, - &sfi_handle_mdm}, - {"XMM_7160_REV3", SFI_DEV_TYPE_MDM, 0, &modem_platform_data, - &sfi_handle_mdm}, - {"XMM_7160_REV3_5", SFI_DEV_TYPE_MDM, 0, &modem_platform_data, - &sfi_handle_mdm}, - {"XMM_7160_REV4", SFI_DEV_TYPE_MDM, 0, &modem_platform_data, - &sfi_handle_mdm}, - {"XMM_7260_REV1", SFI_DEV_TYPE_MDM, 0, &modem_platform_data, - &sfi_handle_mdm}, - {"RMC_CYGNUS", SFI_DEV_TYPE_MDM, 0, &modem_platform_data, - &sfi_handle_mdm}, - {"CYGNUS_FFRD_EU", SFI_DEV_TYPE_MDM, 0, &modem_platform_data, - &sfi_handle_mdm}, - {"CYGNUS_FFRD_NA", SFI_DEV_TYPE_MDM, 0, &modem_platform_data, - &sfi_handle_mdm}, - {"RMC_CYGNUS_PCI", SFI_DEV_TYPE_MDM, 0, &modem_platform_data, - &sfi_handle_mdm}, - {"RMC_PEGASUS", SFI_DEV_TYPE_MDM, 0, &modem_platform_data, - &sfi_handle_mdm}, {}, }; diff --git a/arch/x86/platform/intel-mid/device_libs/Makefile b/arch/x86/platform/intel-mid/device_libs/Makefile index c4a51eec5eb..f6a7dc74eaf 100644 --- a/arch/x86/platform/intel-mid/device_libs/Makefile +++ b/arch/x86/platform/intel-mid/device_libs/Makefile @@ -20,7 +20,6 @@ obj-$(subst m,y,$(CONFIG_SENSORS_MID_VDD)) += platform_msic_vdd.o obj-$(subst m,y,$(CONFIG_SENSORS_MRFL_OCD)) += platform_mrfl_ocd.o obj-$(subst m,y,$(CONFIG_PMIC_CCSM)) += platform_mrfl_pmic.o obj-$(subst m,y,$(CONFIG_I2C_PMIC)) += platform_mrfl_pmic_i2c.o -obj-$(subst m,y,$(CONFIG_VLV2_PLAT_CLK)) += platform_vlv2_plat_clk.o ifdef CONFIG_INTEL_BYT_THERMAL obj-$(subst m,y,$(CONFIG_INTEL_BYT_THERMAL)) += platform_byt_thermal.o else @@ -50,11 +49,6 @@ ifndef CONFIG_ACPI obj-$(subst m,y,$(CONFIG_BCM_BT_LPM)) += platform_btlpm.o endif #I2C Devices -ifdef CONFIG_BATTERY_MAX17042 -obj-$(subst m,y,$(CONFIG_BATTERY_MAX17042)) += platform_max17042.o -else -obj-$(subst m,y,$(CONFIG_BATTERY_MAX17050)) += platform_max17042.o -endif # Panel Control Device obj-$(subst m,y,$(CONFIG_DRM_MRFLD)) += platform_panel.o # GPS @@ -64,5 +58,3 @@ obj-$(subst m,y,$(CONFIG_WIFI_PLATFORM_DATA)) += platform_wifi.o obj-$(subst m,y,$(CONFIG_MMC_SDHCI_ACPI)) += platform_sdio_regulator.o # SCU log obj-$(subst m,y,$(CONFIG_SCU_LOGGING)) += platform_scu_log.o -# Display Control Device -obj-y += platform_display.o diff --git a/arch/x86/platform/intel-mid/device_libs/pci/platform_sdhci_pci.c b/arch/x86/platform/intel-mid/device_libs/pci/platform_sdhci_pci.c index e32e78733de..3b22e3b775c 100644 --- a/arch/x86/platform/intel-mid/device_libs/pci/platform_sdhci_pci.c +++ b/arch/x86/platform/intel-mid/device_libs/pci/platform_sdhci_pci.c @@ -298,11 +298,6 @@ static int mrfl_flis_check(void *data, unsigned int clk) return ret; } -/* Board specific cleanup related to SDIO goes here */ -static void mrfl_sdio_cleanup(struct sdhci_pci_data *data) -{ -} - /* Board specific setup related to eMMC goes here */ static int mrfl_emmc_setup(struct sdhci_pci_data *data) { diff --git a/arch/x86/platform/intel-mid/device_libs/pci/platform_usb_otg.c b/arch/x86/platform/intel-mid/device_libs/pci/platform_usb_otg.c index f9f1c007af0..6e656a86f9a 100644 --- a/arch/x86/platform/intel-mid/device_libs/pci/platform_usb_otg.c +++ b/arch/x86/platform/intel-mid/device_libs/pci/platform_usb_otg.c @@ -13,6 +13,7 @@ #include <linux/pci.h> #include <asm/intel-mid.h> #include <asm/intel_scu_ipc.h> +#include <asm/spid.h> #include <linux/dma-mapping.h> #ifdef CONFIG_USB_DWC3_OTG @@ -115,11 +116,5 @@ static void otg_pci_early_quirks(struct pci_dev *pci_dev) pci_dev->dev.platform_data = get_otg_platform_data(pci_dev); } -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MFD_OTG, - otg_pci_early_quirks); -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CLV_OTG, - otg_pci_early_quirks); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFL_DWC3_OTG, otg_pci_early_quirks); -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_OTG, - otg_pci_early_quirks); diff --git a/arch/x86/platform/intel-mid/device_libs/platform_bcove_adc.c b/arch/x86/platform/intel-mid/device_libs/platform_bcove_adc.c index 8146bd62ad2..88125ac851a 100644 --- a/arch/x86/platform/intel-mid/device_libs/platform_bcove_adc.c +++ b/arch/x86/platform/intel-mid/device_libs/platform_bcove_adc.c @@ -116,6 +116,15 @@ void __init *bcove_adc_platform_data(void *info) goto out; } + bcove_adc_pdata.channel_num = GPADC_CH_NUM; + bcove_adc_pdata.intr = GPADC_SRAM_INTR_ADDR; + bcove_adc_pdata.intr_mask = MBATTEMP | MSYSTEMP | MBATT + | MVIBATT | MCCTICK; + bcove_adc_pdata.gpadc_iio_maps = basincove_iio_maps; + bcove_adc_pdata.gpadc_regmaps = basincove_gpadc_regmaps; + bcove_adc_pdata.gpadc_regs = &basincove_gpadc_regs; + bcove_adc_pdata.gpadc_channels = basincove_adc_channels; + pdev->dev.platform_data = &bcove_adc_pdata; ret = platform_device_add(pdev); diff --git a/arch/x86/platform/intel-mid/intel-mid.c b/arch/x86/platform/intel-mid/intel-mid.c index f167aec327b..a7635b38318 100644 --- a/arch/x86/platform/intel-mid/intel-mid.c +++ b/arch/x86/platform/intel-mid/intel-mid.c @@ -94,14 +94,6 @@ static unsigned long __init intel_mid_calibrate_tsc(void) return 0; } -extern void xen_time_init(); - -#ifdef CONFIG_XEN -static void __init intel_mid_time_init(void) -{ - return xen_time_init(); -} -#else static void __init intel_mid_time_init(void) { @@ -126,7 +118,6 @@ static void __init intel_mid_time_init(void) pre_init_apic_IRQ0(); apbt_time_init(); } -#endif /* CONFIG_XEN */ static void __cpuinit intel_mid_arch_setup(void) { @@ -192,21 +183,18 @@ void __init x86_intel_mid_early_setup(void) { x86_init.resources.probe_roms = x86_init_noop; x86_init.resources.reserve_resources = x86_init_noop; -#ifdef CONFIG_XEN - xen_oem_arch_setup = intel_mid_arch_setup; -#else x86_init.oem.arch_setup = intel_mid_arch_setup; x86_init.timers.setup_percpu_clockev = x86_init_noop; x86_cpuinit.setup_percpu_clockev = apbt_setup_secondary_clock; -#endif /* CONFIG_XEN */ x86_init.timers.timer_init = intel_mid_time_init; - - x86_init.resources.probe_roms = x86_init_noop; - x86_init.resources.reserve_resources = x86_init_noop; + x86_init.timers.setup_percpu_clockev = x86_init_noop; x86_init.irqs.pre_vector_init = x86_init_noop; + x86_init.oem.arch_setup = intel_mid_arch_setup; + + x86_cpuinit.setup_percpu_clockev = apbt_setup_secondary_clock; x86_platform.calibrate_tsc = intel_mid_calibrate_tsc; x86_platform.i8042_detect = intel_mid_i8042_detect; @@ -249,4 +237,3 @@ static inline int __init setup_x86_intel_mid_timer(char *arg) return 0; } __setup("x86_intel_mid_timer=", setup_x86_intel_mid_timer); - diff --git a/arch/x86/platform/intel-mid/spid.c b/arch/x86/platform/intel-mid/spid.c index 4332c2bcab2..f89282409d2 100644 --- a/arch/x86/platform/intel-mid/spid.c +++ b/arch/x86/platform/intel-mid/spid.c @@ -51,6 +51,7 @@ char intel_platform_ssn[INTEL_PLATFORM_SSN_SIZE + 1]; struct soft_platform_id spid; +EXPORT_SYMBOL(spid); #ifdef CONFIG_ACPI struct platform_id pidv; @@ -95,6 +96,7 @@ static void populate_spid_cmdline(void) } else pr_err("SPID not found in kernel command line.\n"); } + static ssize_t customer_id_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) { @@ -167,18 +169,20 @@ static struct attribute_group spid_attr_group = { static ssize_t iafw_version_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) { - return sprintf(buf, "%02X.%02X\n", pidv.iafw_major, pidv.iafw_minor); + return sprintf(buf, "%04X.%04X\n", pidv.iafwrevvalues[iarevmajor], + pidv.iafwrevvalues[iarevminor]); } pidv_attr(iafw_version); static ssize_t secfw_version_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) { - return sprintf(buf, "%02X.%02X\n", pidv.secfw_major, pidv.secfw_minor); + return sprintf(buf, "%02d.%02d\n", + (pidv.secrevvalues[secrev] / 100), + (pidv.secrevvalues[secrev] % 100)); } pidv_attr(secfw_version); - static struct attribute *pidv_attrs[] = { &iafw_version_attr.attr, &secfw_version_attr.attr, @@ -208,10 +212,30 @@ static int __init acpi_parse_pidv(struct acpi_table_header *table) /* * FIXME: add ssn accessor, instead of memcpy */ - memcpy(&intel_platform_ssn, &(pidv_tbl->pidv.part_number), + memcpy(intel_platform_ssn, &(pidv_tbl->pidv.part_number), INTEL_PLATFORM_SSN_SIZE); intel_platform_ssn[INTEL_PLATFORM_SSN_SIZE] = '\0'; + pr_info("SPID updated according to ACPI Table:\n"); + pr_info("\tspid customer id : %04x\n" + "\tspid vendor id : %04x\n" + "\tspid manufacturer id : %04x\n" + "\tspid platform family id : %04x\n" + "\tspid product line id : %04x\n" + "\tspid hardware id : %04x\n" + "\tspid fru[4..0] : %02x %02x %02x %02x %02x\n" + "\tspid fru[9..5] : %02x %02x %02x %02x %02x\n" + "\tssn : %s\n", + spid.customer_id, + spid.vendor_id, + spid.manufacturer_id, + spid.platform_family_id, + spid.product_line_id, + spid.hardware_id, + spid.fru[4], spid.fru[3], spid.fru[2], spid.fru[1], + spid.fru[0], spid.fru[9], spid.fru[8], spid.fru[7], + spid.fru[6], spid.fru[5], + intel_platform_ssn); return 0; } @@ -272,6 +296,24 @@ err_sysfs_spid: arch_initcall(acpi_spid_init); #endif +/** + * Check if buffer contains printable character, from SPACE(0x20) to + * TILDE (0x7E), until \0 or maxlen characters occur. + * param char *str_buf buffer of characters to look for + * param int maxlen max number of characters to look for + * return true if valid, otherwise false + * */ +static bool chk_prt_validity(char *strbuf, int max_len) +{ + int idx = 0; + while ((idx < max_len) && (strbuf[idx] != '\0')) { + if ((strbuf[idx] < 0x20) || (strbuf[idx] > 0x7E)) + return false; + idx++; + } + return true; +} + int __init sfi_handle_spid(struct sfi_table_header *table) { struct sfi_table_oemb *oemb; @@ -301,21 +343,30 @@ int __init sfi_handle_spid(struct sfi_table_header *table) memcpy(&spid, &oemb->spid, sizeof(struct soft_platform_id)); if (oemb->header.len < - (char *)oemb->ssn + INTEL_PLATFORM_SSN_SIZE - (char *)oemb) { + (char *)oemb->ssn + INTEL_PLATFORM_SSN_SIZE - + (char *)oemb) { pr_err("SFI OEMB does not contains SSN\n"); intel_platform_ssn[0] = '\0'; } else { - memcpy(intel_platform_ssn, oemb->ssn, INTEL_PLATFORM_SSN_SIZE); - intel_platform_ssn[INTEL_PLATFORM_SSN_SIZE] = '\0'; + if (!chk_prt_validity(oemb->ssn, INTEL_PLATFORM_SSN_SIZE)) { + pr_err("SSN contains non printable character\n"); + intel_platform_ssn[0] = '\0'; + } else { + memcpy(intel_platform_ssn, oemb->ssn, + INTEL_PLATFORM_SSN_SIZE); + intel_platform_ssn[INTEL_PLATFORM_SSN_SIZE] = '\0'; + } } /* Populate command line with SPID values */ populate_spid_cmdline(); + return 0; + err_sfi_oemb_tbl: sysfs_remove_group(spid_kobj, &spid_attr_group); err_sfi_sysfs_spid: kobject_put(spid_kobj); - return 0; + return ret; } diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c index 573b014bed8..f8b907d692e 100644 --- a/drivers/gpio/gpio-langwell.c +++ b/drivers/gpio/gpio-langwell.c @@ -760,6 +760,7 @@ static void lnw_irq_handler(unsigned irq, struct irq_desc *desc) enum GPIO_REG reg_type; struct irq_desc *lnw_irq_desc; unsigned int lnw_irq; + lnw = irq_data_get_irq_handler_data(data); debug = lnw->debug; diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c index 797ed937290..b251e89f1d8 100644 --- a/drivers/idle/intel_idle.c +++ b/drivers/idle/intel_idle.c @@ -61,6 +61,7 @@ #include <linux/notifier.h> #include <linux/cpu.h> #include <linux/module.h> +#include <linux/intel_mid_pm.h> #include <asm/cpu_device_id.h> #include <asm/mwait.h> #include <asm/msr.h> @@ -788,6 +789,10 @@ static const struct idle_cpu idle_cpu_hsw = { .disable_promotion_to_c1e = true, }; +static const struct idle_cpu idle_cpu_mrfld = { + .state_table = mrfld_cstates, +}; + #define ICPU(model, cpu) \ { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu } @@ -809,6 +814,7 @@ static const struct x86_cpu_id intel_idle_ids[] = { ICPU(0x3f, idle_cpu_hsw), ICPU(0x45, idle_cpu_hsw), ICPU(0x46, idle_cpu_hsw), + ICPU(0x4a, idle_cpu_mrfld), /* Tangier SoC */ {} }; MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids); diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index e7bc1edfc7d..c44f8c10e86 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -2418,12 +2418,7 @@ void mmc_rescan(struct work_struct *work) out: mmc_emergency_setup(host); - if (extend_wakelock) - wake_lock_timeout(&host->detect_wake_lock, HZ / 2); - else - wake_unlock(&host->detect_wake_lock); - if (host->caps & MMC_CAP_NEEDS_POLL) { - wake_lock(&host->detect_wake_lock); + if (host->caps & MMC_CAP_NEEDS_POLL) mmc_schedule_delayed_work(&host->detect, HZ); } diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c index 10e5a64d5d7..6f4297b51cd 100644 --- a/drivers/mmc/host/sdhci-pci.c +++ b/drivers/mmc/host/sdhci-pci.c @@ -41,9 +41,6 @@ */ #define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809 #define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a -#define PCI_DEVICE_ID_INTEL_BYT_EMMC 0x0f14 -#define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15 -#define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16 /* * PCI registers @@ -294,7 +291,7 @@ static void mfd_emmc_mutex_register(struct sdhci_pci_slot *slot) #ifdef CONFIG_INTEL_SCU_IPC int err; - err = intel_scu_ipc_command(IPC_EMMC_MUTEX_CMD, 0, + err = rpmsg_send_generic_command(IPC_EMMC_MUTEX_CMD, 0, NULL, 0, &mutex_var_addr, 1); if (err) { dev_err(&slot->chip->pdev->dev, "IPC error: %d\n", err); @@ -614,24 +611,6 @@ static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot) return 0; } -static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = { - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, - .allow_runtime_pm = true, - .probe_slot = byt_emmc_probe_slot, -}; - -static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = { - .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON, - .allow_runtime_pm = true, - .probe_slot = byt_sdio_probe_slot, -}; - -static const struct sdhci_pci_fixes sdhci_intel_byt_sd = { - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, - .probe_slot = byt_sd_probe_slot, - .remove_slot = byt_sd_remove_slot, -}; - #define TNG_IOAPIC_IDX 0xfec00000 static void mrfl_ioapic_rte_reg_addr_map(struct sdhci_pci_slot *slot) { @@ -665,7 +644,7 @@ static int intel_mrfl_mmc_probe_slot(struct sdhci_pci_slot *slot) if (slot->chip->pdev->revision == 0x1) { /* B0 stepping */ slot->host->mmc->caps2 |= MMC_CAP2_HS200_1_8V_SDR; /* WA for async abort silicon issue */ - slot->host->quirks2 |= SDHCI_QUIRK2_CARD_CD_DELAY | + slot->host->quirks2 |= SDHCI_QUIRK2_2MS_DELAY | SDHCI_QUIRK2_WAIT_FOR_IDLE | SDHCI_QUIRK2_TUNING_POLL; } @@ -680,18 +659,6 @@ static int intel_mrfl_mmc_probe_slot(struct sdhci_pci_slot *slot) break; } - if (PCI_FUNC(slot->chip->pdev->devfn) == INTEL_MRFL_EMMC_0) - sdhci_alloc_panic_host(slot->host); - - if (PCI_FUNC(slot->chip->pdev->devfn) == INTEL_MRFL_EMMC_0) - mrfl_ioapic_rte_reg_addr_map(slot); - - slot->host->mmc->caps2 |= MMC_CAP2_INIT_CARD_SYNC | - MMC_CAP2_POLL_R1B_BUSY; - - if (PCI_FUNC(slot->chip->pdev->devfn) == INTEL_MRFL_SDIO) - slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE; - if (slot->data->platform_quirks & PLFM_QUIRK_NO_HIGH_SPEED) { slot->host->quirks2 |= SDHCI_QUIRK2_DISABLE_HIGH_SPEED; slot->host->mmc->caps &= ~MMC_CAP_1_8V_DDR; @@ -1378,30 +1345,6 @@ static const struct pci_device_id pci_ids[] = { { .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_BYT_EMMC, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc, - }, - - { - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_BYT_SDIO, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio, - }, - - { - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_BYT_SD, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd, - }, - - { - .vendor = PCI_VENDOR_ID_INTEL, .device = PCI_DEVICE_ID_INTEL_CLV_SDIO0, .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, @@ -1714,18 +1657,6 @@ static int sdhci_pci_get_cd(struct sdhci_host *host) return present; } -static void sdhci_platform_reset_exit(struct sdhci_host *host, u8 mask) -{ - if (host->quirks2 & SDHCI_QUIRK2_POWER_PIN_GPIO_MODE) { - if (mask & SDHCI_RESET_ALL) { - /* reset back to 3.3v signaling */ - gpio_set_value(host->gpio_1p8_en, 0); - /* disable the VDD power */ - gpio_set_value(host->gpio_pwr_en, 1); - } - } -} - static int sdhci_pci_get_tuning_count(struct sdhci_host *host) { struct sdhci_pci_slot *slot = sdhci_priv(host); @@ -1754,37 +1685,6 @@ static int sdhci_gpio_buf_check(struct sdhci_host *host, unsigned int clk) return ret; } -#if defined(CONFIG_X86_MDFLD) -static int sdhci_pci_power_up_host(struct sdhci_host *host) -{ - int ret = -ENOSYS; - struct sdhci_pci_slot *slot = sdhci_priv(host); - - if (slot->data && slot->data->power_up) - ret = slot->data->power_up(host); - /* - * If there is no power_up callbacks in platform data, - * return -ENOSYS; - */ - if (ret) - return ret; - - /* - * after power up host, let's have a little test - */ - - if (sdhci_readl(host, SDHCI_HOST_VERSION) == - 0xffffffff) { - pr_err("%s: power up sdhci host failed\n", - __func__); - return -EPERM; - } - - pr_info("%s: host controller power up is done\n", __func__); - - return 0; -} - static const struct sdhci_ops sdhci_pci_ops = { .enable_dma = sdhci_pci_enable_dma, .platform_bus_width = sdhci_pci_bus_width, @@ -1792,7 +1692,6 @@ static const struct sdhci_ops sdhci_pci_ops = { .power_up_host = sdhci_pci_power_up_host, .set_dev_power = sdhci_pci_set_dev_power, .get_cd = sdhci_pci_get_cd, - .platform_reset_exit = sdhci_platform_reset_exit, .get_tuning_count = sdhci_pci_get_tuning_count, .gpio_buf_check = sdhci_gpio_buf_check, }; @@ -2105,9 +2004,6 @@ static struct sdhci_pci_slot *sdhci_pci_probe_slot( host->mmc->caps &= ~MMC_CAP_NONREMOVABLE; host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP; - if (host->quirks2 & SDHCI_QUIRK2_ENABLE_MMC_PM_IGNORE_PM_NOTIFY) - host->mmc->pm_flags |= MMC_PM_IGNORE_PM_NOTIFY; - ret = sdhci_add_host(host); if (ret) goto remove; diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 8bfc330256d..5e651cf2525 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -4154,8 +4154,6 @@ int sdhci_add_host(struct sdhci_host *host) ocr_avail = 0; spin_lock_init(&host->lock); - sdhci_try_get_regulator(host); - #ifdef CONFIG_REGULATOR sdhci_try_get_regulator(host); /* diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig index 5fb0225c6af..a1df080a000 100644 --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig @@ -651,6 +651,20 @@ config INTEL_SCU_IPC IPC is used to bridge the communications between kernel and SCU on some embedded Intel x86 platforms. This is not needed for PC-type machines. +choice + prompt "IPC access mode" + depends on INTEL_SCU_IPC + default INTEL_SCU_IPC_INTR_MODE + ---help--- + Select the desired access mode for IPC call. + +config INTEL_SCU_IPC_INTR_MODE + bool "Intel SCU IPC interrupt mode" + +config INTEL_SCU_IPC_POLL_MODE + bool "Intel SCU IPC polling mode" + +endchoice config INTEL_SCU_IPC_UTIL tristate "Intel SCU IPC utility driver" diff --git a/drivers/platform/x86/intel_scu_ipc.c b/drivers/platform/x86/intel_scu_ipc.c index 990ff8db902..d8d251f05f9 100644 --- a/drivers/platform/x86/intel_scu_ipc.c +++ b/drivers/platform/x86/intel_scu_ipc.c @@ -34,7 +34,6 @@ #include <linux/atomic.h> #include <linux/notifier.h> #include <linux/suspend.h> -#include <linux/wakelock.h> enum { SCU_IPC_LINCROFT, @@ -104,31 +103,6 @@ static struct notifier_block scu_ipc_pm_notifier = { * message handler is called within firmware. */ -======= - -static struct notifier_block scu_ipc_pm_notifier = { - .notifier_call = scu_ipc_pm_callback, - .priority = 1, -}; - -/* - * IPC register summary - * - * IPC register blocks are memory mapped at fixed address of 0xFF11C000 - * To read or write information to the SCU, driver writes to IPC-1 memory - * mapped registers (base address 0xFF11C000). The following is the IPC - * mechanism - * - * 1. IA core cDMI interface claims this transaction and converts it to a - * Transaction Layer Packet (TLP) message which is sent across the cDMI. - * - * 2. South Complex cDMI block receives this message and writes it to - * the IPC-1 register block, causing an interrupt to the SCU - * - * 3. SCU firmware decodes this interrupt and IPC message and the appropriate - * message handler is called within firmware. - */ - #define IPC_STATUS_ADDR 0X04 #define IPC_SPTR_ADDR 0x08 #define IPC_DPTR_ADDR 0x0C @@ -168,14 +142,6 @@ static char *ipc_err_sources[] = { "Unsigned kernel", }; -/* Suspend status get */ -bool suspend_in_progress(void) -{ - return suspend_status; -} - -static struct wake_lock ipc_wake_lock; - /* PM Qos struct */ static struct pm_qos_request *qos; @@ -318,17 +284,12 @@ void intel_scu_ipc_lock(void) /* Prevent S3 */ mutex_lock(&scu_suspend_lock); - if (!suspend_in_progress()) - wake_lock(&ipc_wake_lock); } EXPORT_SYMBOL_GPL(intel_scu_ipc_lock); void intel_scu_ipc_unlock(void) { /* Re-enable S3 */ - if (!suspend_in_progress()) - wake_unlock(&ipc_wake_lock); - mutex_unlock(&scu_suspend_lock); /* Re-enable Deeper C-states beyond C6 */ @@ -469,12 +430,16 @@ static irqreturn_t ioc(int irq, void *dev_id) */ static int ipc_probe(struct pci_dev *dev, const struct pci_device_id *id) { - int err; + int err, pid; + struct intel_scu_ipc_pdata_t *pdata; resource_size_t pci_resource; if (ipcdev.pdev) /* We support only one SCU */ return -EBUSY; + pid = id->driver_data; + pdata = &intel_scu_ipc_pdata[pid]; + ipcdev.pdev = pci_dev_get(dev); err = pci_enable_device(dev); @@ -495,11 +460,11 @@ static int ipc_probe(struct pci_dev *dev, const struct pci_device_id *id) &ipcdev)) return -EBUSY; - ipcdev.ipc_base = ioremap_nocache(IPC_BASE_ADDR, IPC_MAX_ADDR); + ipcdev.ipc_base = ioremap_nocache(pdata->ipc_base, pdata->ipc_len); if (!ipcdev.ipc_base) return -ENOMEM; - ipcdev.i2c_base = ioremap_nocache(IPC_I2C_BASE, IPC_I2C_MAX_ADDR); + ipcdev.i2c_base = ioremap_nocache(pdata->i2c_base, pdata->i2c_len); if (!ipcdev.i2c_base) { iounmap(ipcdev.ipc_base); return -ENOMEM; @@ -561,8 +526,6 @@ static int intel_scu_ipc_init(void) register_pm_notifier(&scu_ipc_pm_notifier); - wake_lock_init(&ipc_wake_lock, WAKE_LOCK_SUSPEND, "intel_scu_ipc"); - return pci_register_driver(&ipc_driver); } @@ -577,5 +540,5 @@ MODULE_AUTHOR("Sreedhara DS <sreedhara.ds@intel.com>"); MODULE_DESCRIPTION("Intel SCU IPC driver"); MODULE_LICENSE("GPL"); -module_init(intel_scu_ipc_init); +fs_initcall(intel_scu_ipc_init); module_exit(intel_scu_ipc_exit); diff --git a/drivers/platform/x86/intel_scu_ipcutil.c b/drivers/platform/x86/intel_scu_ipcutil.c index e3c59bc2c65..8d4c96c4246 100644 --- a/drivers/platform/x86/intel_scu_ipcutil.c +++ b/drivers/platform/x86/intel_scu_ipcutil.c @@ -1583,6 +1583,7 @@ int intel_scu_ipc_read_oshob_info(void) ret = intel_scu_ipc_read_oshob_def_param(oshob_addr); if (oshob_info->platform_type == INTEL_MID_CPU_CHIP_TANGIER) { + pr_debug("(default oshob) SCU buffer size is %d bytes\n", OSHOB_SCU_BUF_MRFLD_DW_SIZE*4); } else { pr_debug("(default oshob) SCU buffer size is %d bytes\n", @@ -1953,7 +1954,10 @@ u32 intel_scu_ipc_get_fabricerror_buf1_offset(void) return offsetof(struct scu_ipc_oshob, fab_err_log) + oshob_info->offs_add; } + else { + pr_err("scu_ipc_get_fabricerror_buf_offset: platform not recognized!\n"); return 0; + } } /* diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 5f0d9a108e7..27b22de0f1f 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -514,4 +514,9 @@ config REGULATOR_AS3711 This driver provides support for the voltage regulators on the AS3711 PMIC +config REGULATOR_PMIC_BASIN_COVE + tristate "PMIC Basin Cove voltage regulator" + help + This driver controls intel Basin Cove pmic voltage output regulator + endif diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index afb77284929..8b751e77aa0 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -49,6 +49,7 @@ obj-$(CONFIG_REGULATOR_PALMAS) += palmas-regulator.o obj-$(CONFIG_REGULATOR_TPS51632) += tps51632-regulator.o obj-$(CONFIG_REGULATOR_PCAP) += pcap-regulator.o obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o +obj-$(CONFIG_REGULATOR_PMIC_BASIN_COVE) += pmic_basin_cove.o obj-$(CONFIG_REGULATOR_RC5T583) += rc5t583-regulator.o obj-$(CONFIG_REGULATOR_S2MPS11) += s2mps11.o obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o diff --git a/drivers/spi/intel_mid_ssp_spi.c b/drivers/spi/intel_mid_ssp_spi.c new file mode 100644 index 00000000000..4033fe0b34c --- /dev/null +++ b/drivers/spi/intel_mid_ssp_spi.c @@ -0,0 +1,1555 @@ +/* + * intel_mid_ssp_spi.c + * This driver supports Bulverde SSP core used on Intel MID platforms + * It supports SSP of Moorestown & Medfield platforms and handles clock + * slave & master modes. + * + * Copyright (c) 2010, Intel Corporation. + * Ken Mills <ken.k.mills@intel.com> + * Sylvain Centelles <sylvain.centelles@intel.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + * + */ + +/* + * Note: + * + * Supports DMA and non-interrupt polled transfers. + * + */ +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/delay.h> +#include <linux/interrupt.h> +#include <linux/highmem.h> +#include <linux/pci.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/dma-mapping.h> +#include <linux/intel_mid_dma.h> +#include <linux/pm_qos.h> +#include <linux/pm_runtime.h> +#include <linux/completion.h> +#include <asm/intel-mid.h> + +#include <linux/spi/spi.h> +#include <linux/spi/intel_mid_ssp_spi.h> + +#define DRIVER_NAME "intel_mid_ssp_spi_unified" + +MODULE_AUTHOR("Ken Mills"); +MODULE_DESCRIPTION("Bulverde SSP core SPI contoller"); +MODULE_LICENSE("GPL"); + +static int ssp_timing_wr; + +#ifdef DUMP_RX +static void dump_trailer(const struct device *dev, char *buf, int len, int sz) +{ + int tlen1 = (len < sz ? len : sz); + int tlen2 = ((len - sz) > sz) ? sz : (len - sz); + unsigned char *p; + static char msg[MAX_SPI_TRANSFER_SIZE]; + + memset(msg, '\0', sizeof(msg)); + p = buf; + while (p < buf + tlen1) + sprintf(msg, "%s%02x", msg, (unsigned int)*p++); + + if (tlen2 > 0) { + sprintf(msg, "%s .....", msg); + p = (buf+len) - tlen2; + while (p < buf + len) + sprintf(msg, "%s%02x", msg, (unsigned int)*p++); + } + + dev_info(dev, "DUMP: %p[0:%d ... %d:%d]:%s", buf, tlen1 - 1, + len-tlen2, len - 1, msg); +} +#endif + +static inline u8 ssp_cfg_get_mode(u8 ssp_cfg) +{ + if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER || + intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_ANNIEDALE) + return (ssp_cfg) & 0x03; + else + return (ssp_cfg) & 0x07; +} + +static inline u8 ssp_cfg_get_spi_bus_nb(u8 ssp_cfg) +{ + if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER || + intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_ANNIEDALE) + return ((ssp_cfg) >> 2) & 0x07; + else + return ((ssp_cfg) >> 3) & 0x07; +} + +static inline u8 ssp_cfg_is_spi_slave(u8 ssp_cfg) +{ + if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER || + intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_ANNIEDALE) + return (ssp_cfg) & 0x20; + else + return (ssp_cfg) & 0x40; +} + +static inline u32 is_tx_fifo_empty(struct ssp_drv_context *sspc) +{ + u32 sssr; + sssr = read_SSSR(sspc->ioaddr); + if ((sssr & SSSR_TFL_MASK) || (sssr & SSSR_TNF) == 0) + return 0; + else + return 1; +} + +static inline u32 is_rx_fifo_empty(struct ssp_drv_context *sspc) +{ + return ((read_SSSR(sspc->ioaddr) & SSSR_RNE) == 0); +} + +static inline void disable_interface(struct ssp_drv_context *sspc) +{ + void *reg = sspc->ioaddr; + write_SSCR0(read_SSCR0(reg) & ~SSCR0_SSE, reg); +} + +static inline void disable_triggers(struct ssp_drv_context *sspc) +{ + void *reg = sspc->ioaddr; + write_SSCR1(read_SSCR1(reg) & ~sspc->cr1_sig, reg); +} + + +static void flush(struct ssp_drv_context *sspc) +{ + void *reg = sspc->ioaddr; + u32 i = 0; + + /* If the transmit fifo is not empty, reset the interface. */ + if (!is_tx_fifo_empty(sspc)) { + dev_err(&sspc->pdev->dev, "TX FIFO not empty. Reset of SPI IF"); + disable_interface(sspc); + return; + } + + dev_dbg(&sspc->pdev->dev, " SSSR=%x\r\n", read_SSSR(reg)); + while (!is_rx_fifo_empty(sspc) && (i < SPI_FIFO_SIZE + 1)) { + read_SSDR(reg); + i++; + } + WARN(i > 0, "%d words flush occured\n", i); + + return; +} + +static int null_writer(struct ssp_drv_context *sspc) +{ + void *reg = sspc->ioaddr; + u8 n_bytes = sspc->n_bytes; + + if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK) + || (sspc->tx == sspc->tx_end)) + return 0; + + write_SSDR(0, reg); + sspc->tx += n_bytes; + + return 1; +} + +static int null_reader(struct ssp_drv_context *sspc) +{ + void *reg = sspc->ioaddr; + u8 n_bytes = sspc->n_bytes; + + while ((read_SSSR(reg) & SSSR_RNE) + && (sspc->rx < sspc->rx_end)) { + read_SSDR(reg); + sspc->rx += n_bytes; + } + + return sspc->rx == sspc->rx_end; +} + +static int u8_writer(struct ssp_drv_context *sspc) +{ + void *reg = sspc->ioaddr; + if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK) + || (sspc->tx == sspc->tx_end)) + return 0; + + write_SSDR(*(u8 *)(sspc->tx), reg); + ++sspc->tx; + + return 1; +} + +static int u8_reader(struct ssp_drv_context *sspc) +{ + void *reg = sspc->ioaddr; + while ((read_SSSR(reg) & SSSR_RNE) + && (sspc->rx < sspc->rx_end)) { + *(u8 *)(sspc->rx) = read_SSDR(reg); + ++sspc->rx; + } + + return sspc->rx == sspc->rx_end; +} + +static int u16_writer(struct ssp_drv_context *sspc) +{ + void *reg = sspc->ioaddr; + if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK) + || (sspc->tx == sspc->tx_end)) + return 0; + + write_SSDR(*(u16 *)(sspc->tx), reg); + sspc->tx += 2; + + return 1; +} + +static int u16_reader(struct ssp_drv_context *sspc) +{ + void *reg = sspc->ioaddr; + while ((read_SSSR(reg) & SSSR_RNE) && (sspc->rx < sspc->rx_end)) { + *(u16 *)(sspc->rx) = read_SSDR(reg); + sspc->rx += 2; + } + + return sspc->rx == sspc->rx_end; +} + +static int u32_writer(struct ssp_drv_context *sspc) +{ + void *reg = sspc->ioaddr; + if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK) + || (sspc->tx == sspc->tx_end)) + return 0; + + write_SSDR(*(u32 *)(sspc->tx), reg); + sspc->tx += 4; + + return 1; +} + +static int u32_reader(struct ssp_drv_context *sspc) +{ + void *reg = sspc->ioaddr; + while ((read_SSSR(reg) & SSSR_RNE) && (sspc->rx < sspc->rx_end)) { + *(u32 *)(sspc->rx) = read_SSDR(reg); + sspc->rx += 4; + } + + return sspc->rx == sspc->rx_end; +} + +static bool chan_filter(struct dma_chan *chan, void *param) +{ + struct ssp_drv_context *sspc = param; + bool ret = false; + + if (!sspc->dmac1) + return ret; + + if (chan->device->dev == &sspc->dmac1->dev) + ret = true; + + return ret; +} + +/** + * unmap_dma_buffers() - Unmap the DMA buffers used during the last transfer. + * @sspc: Pointer to the private driver context + */ +static void unmap_dma_buffers(struct ssp_drv_context *sspc) +{ + struct device *dev = &sspc->pdev->dev; + + if (!sspc->dma_mapped) + return; + dma_unmap_single(dev, sspc->rx_dma, sspc->len, PCI_DMA_FROMDEVICE); + dma_unmap_single(dev, sspc->tx_dma, sspc->len, PCI_DMA_TODEVICE); + sspc->dma_mapped = 0; +} + +/** + * intel_mid_ssp_spi_dma_done() - End of DMA transfer callback + * @arg: Pointer to the data provided at callback registration + * + * This function is set as callback for both RX and TX DMA transfers. The + * RX or TX 'done' flag is set acording to the direction of the ended + * transfer. Then, if both RX and TX flags are set, it means that the + * transfer job is completed. + */ +static void intel_mid_ssp_spi_dma_done(void *arg) +{ + struct callback_param *cb_param = (struct callback_param *)arg; + struct ssp_drv_context *sspc = cb_param->drv_context; + struct device *dev = &sspc->pdev->dev; + void *reg = sspc->ioaddr; + + if (cb_param->direction == TX_DIRECTION) + sspc->txdma_done = 1; + else + sspc->rxdma_done = 1; + + dev_dbg(dev, "DMA callback for direction %d [RX done:%d] [TX done:%d]\n", + cb_param->direction, sspc->rxdma_done, + sspc->txdma_done); + + if (sspc->txdma_done && sspc->rxdma_done) { + /* Clear Status Register */ + write_SSSR(sspc->clear_sr, reg); + dev_dbg(dev, "DMA done\n"); + /* Disable Triggers to DMA or to CPU*/ + disable_triggers(sspc); + unmap_dma_buffers(sspc); + + queue_work(sspc->dma_wq, &sspc->complete_work); + } +} + +/** + * intel_mid_ssp_spi_dma_init() - Initialize DMA + * @sspc: Pointer to the private driver context + * + * This function is called at driver setup phase to allocate DMA + * ressources. + */ +static void intel_mid_ssp_spi_dma_init(struct ssp_drv_context *sspc) +{ + struct intel_mid_dma_slave *rxs, *txs; + struct dma_slave_config *ds; + dma_cap_mask_t mask; + struct device *dev = &sspc->pdev->dev; + unsigned int device_id; + + /* Configure RX channel parameters */ + rxs = &sspc->dmas_rx; + ds = &rxs->dma_slave; + + ds->direction = DMA_FROM_DEVICE; + rxs->hs_mode = LNW_DMA_HW_HS; + rxs->cfg_mode = LNW_DMA_PER_TO_MEM; + ds->dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; + ds->src_addr_width = sspc->n_bytes; + + /* Use a DMA burst according to the FIFO thresholds */ + if (sspc->rx_fifo_threshold == 8) { + ds->src_maxburst = 8; + ds->dst_maxburst = 8; + } else if (sspc->rx_fifo_threshold == 4) { + ds->src_maxburst = 4; + ds->dst_maxburst = 4; + } else { + ds->src_maxburst = 1; + ds->dst_maxburst = 1; + } + + /* Configure TX channel parameters */ + txs = &sspc->dmas_tx; + ds = &txs->dma_slave; + + ds->direction = DMA_TO_DEVICE; + txs->hs_mode = LNW_DMA_HW_HS; + txs->cfg_mode = LNW_DMA_MEM_TO_PER; + ds->src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; + ds->dst_addr_width = sspc->n_bytes; + + /* Use a DMA burst according to the FIFO thresholds */ + if (sspc->rx_fifo_threshold == 8) { + ds->src_maxburst = 8; + ds->dst_maxburst = 8; + } else if (sspc->rx_fifo_threshold == 4) { + ds->src_maxburst = 4; + ds->dst_maxburst = 4; + } else { + ds->src_maxburst = 1; + ds->dst_maxburst = 1; + } + + /* Nothing more to do if already initialized */ + if (sspc->dma_initialized) + return; + + /* Use DMAC1 */ + if (sspc->quirks & QUIRKS_PLATFORM_MRST) + device_id = PCI_MRST_DMAC1_ID; + else + device_id = PCI_MDFL_DMAC1_ID; + + sspc->dmac1 = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL); + if (!sspc->dmac1) { + dev_err(dev, "Can't find DMAC1"); + return; + } + + if (sspc->quirks & QUIRKS_SRAM_ADDITIONAL_CPY) { + sspc->virt_addr_sram_rx = ioremap_nocache(SRAM_BASE_ADDR, + 2 * MAX_SPI_TRANSFER_SIZE); + if (sspc->virt_addr_sram_rx) + sspc->virt_addr_sram_tx = sspc->virt_addr_sram_rx + + MAX_SPI_TRANSFER_SIZE; + else + dev_err(dev, "Virt_addr_sram_rx is null\n"); + } + + /* 1. Allocate rx channel */ + dma_cap_zero(mask); + dma_cap_set(DMA_MEMCPY, mask); + dma_cap_set(DMA_SLAVE, mask); + + sspc->rxchan = dma_request_channel(mask, chan_filter, sspc); + if (!sspc->rxchan) + goto err_exit; + + sspc->rxchan->private = rxs; + + /* 2. Allocate tx channel */ + dma_cap_set(DMA_SLAVE, mask); + dma_cap_set(DMA_MEMCPY, mask); + + sspc->txchan = dma_request_channel(mask, chan_filter, sspc); + if (!sspc->txchan) + goto free_rxchan; + else + sspc->txchan->private = txs; + + /* set the dma done bit to 1 */ + sspc->txdma_done = 1; + sspc->rxdma_done = 1; + + sspc->tx_param.drv_context = sspc; + sspc->tx_param.direction = TX_DIRECTION; + sspc->rx_param.drv_context = sspc; + sspc->rx_param.direction = RX_DIRECTION; + + sspc->dma_initialized = 1; + return; + +free_rxchan: + dma_release_channel(sspc->rxchan); +err_exit: + dev_err(dev, "Error : DMA Channel Not available\n"); + + if (sspc->quirks & QUIRKS_SRAM_ADDITIONAL_CPY) + iounmap(sspc->virt_addr_sram_rx); + + pci_dev_put(sspc->dmac1); + return; +} + +/** + * intel_mid_ssp_spi_dma_exit() - Release DMA ressources + * @sspc: Pointer to the private driver context + */ +static void intel_mid_ssp_spi_dma_exit(struct ssp_drv_context *sspc) +{ + dma_release_channel(sspc->txchan); + dma_release_channel(sspc->rxchan); + + if (sspc->quirks & QUIRKS_SRAM_ADDITIONAL_CPY) + iounmap(sspc->virt_addr_sram_rx); + + pci_dev_put(sspc->dmac1); +} + +/** + * dma_transfer() - Initiate a DMA transfer + * @sspc: Pointer to the private driver context + */ +static void dma_transfer(struct ssp_drv_context *sspc) +{ + dma_addr_t ssdr_addr; + struct dma_async_tx_descriptor *txdesc = NULL, *rxdesc = NULL; + struct dma_chan *txchan, *rxchan; + enum dma_ctrl_flags flag; + struct device *dev = &sspc->pdev->dev; + + /* get Data Read/Write address */ + ssdr_addr = (dma_addr_t)(sspc->paddr + 0x10); + + if (sspc->tx_dma) + sspc->txdma_done = 0; + + if (sspc->rx_dma) + sspc->rxdma_done = 0; + + /* 2. prepare the RX dma transfer */ + txchan = sspc->txchan; + rxchan = sspc->rxchan; + + flag = DMA_PREP_INTERRUPT | DMA_CTRL_ACK; + + if (likely(sspc->quirks & QUIRKS_DMA_USE_NO_TRAIL)) { + /* Since the DMA is configured to do 32bits access */ + /* to/from the DDR, the DMA transfer size must be */ + /* a multiple of 4 bytes */ + sspc->len_dma_rx = sspc->len & ~(4 - 1); + sspc->len_dma_tx = sspc->len_dma_rx; + + /* In Rx direction, TRAIL Bytes are handled by memcpy */ + if (sspc->rx_dma && + (sspc->len_dma_rx > + sspc->rx_fifo_threshold * sspc->n_bytes)) + sspc->len_dma_rx = TRUNCATE(sspc->len_dma_rx, + sspc->rx_fifo_threshold * sspc->n_bytes); + else if (!sspc->rx_dma) + dev_err(dev, "ERROR : rx_dma is null\r\n"); + } else { + /* TRAIL Bytes are handled by DMA */ + if (sspc->rx_dma) { + sspc->len_dma_rx = sspc->len; + sspc->len_dma_tx = sspc->len; + } else + dev_err(dev, "ERROR : sspc->rx_dma is null!\n"); + } + + rxdesc = rxchan->device->device_prep_dma_memcpy + (rxchan, /* DMA Channel */ + sspc->rx_dma, /* DAR */ + ssdr_addr, /* SAR */ + sspc->len_dma_rx, /* Data Length */ + flag); /* Flag */ + + if (rxdesc) { + rxdesc->callback = intel_mid_ssp_spi_dma_done; + rxdesc->callback_param = &sspc->rx_param; + } else { + dev_dbg(dev, "rxdesc is null! (len_dma_rx:%d)\n", + sspc->len_dma_rx); + sspc->rxdma_done = 1; + } + + /* 3. prepare the TX dma transfer */ + if (sspc->tx_dma) { + txdesc = txchan->device->device_prep_dma_memcpy + (txchan, /* DMA Channel */ + ssdr_addr, /* DAR */ + sspc->tx_dma, /* SAR */ + sspc->len_dma_tx, /* Data Length */ + flag); /* Flag */ + if (txdesc) { + txdesc->callback = intel_mid_ssp_spi_dma_done; + txdesc->callback_param = &sspc->tx_param; + } else { + dev_dbg(dev, "txdesc is null! (len_dma_tx:%d)\n", + sspc->len_dma_tx); + sspc->txdma_done = 1; + } + } else { + dev_err(dev, "ERROR : sspc->tx_dma is null!\n"); + return; + } + + dev_info(dev, "DMA transfer len:%d len_dma_tx:%d len_dma_rx:%d\n", + sspc->len, sspc->len_dma_tx, sspc->len_dma_rx); + + if (rxdesc || txdesc) { + if (rxdesc) { + dev_dbg(dev, "Firing DMA RX channel\n"); + rxdesc->tx_submit(rxdesc); + } + if (txdesc) { + dev_dbg(dev, "Firing DMA TX channel\n"); + txdesc->tx_submit(txdesc); + } + } else { + struct callback_param cb_param; + cb_param.drv_context = sspc; + dev_dbg(dev, "Bypassing DMA transfer\n"); + intel_mid_ssp_spi_dma_done(&cb_param); + } +} + +/** + * map_dma_buffers() - Map DMA buffer before a transfer + * @sspc: Pointer to the private drivzer context + */ +static int map_dma_buffers(struct ssp_drv_context *sspc) +{ + struct device *dev = &sspc->pdev->dev; + + if (unlikely(sspc->dma_mapped)) { + dev_err(dev, "ERROR : DMA buffers already mapped\n"); + return 0; + } + if (unlikely(sspc->quirks & QUIRKS_SRAM_ADDITIONAL_CPY)) { + /* Copy sspc->tx into sram_tx */ + memcpy_toio(sspc->virt_addr_sram_tx, sspc->tx, sspc->len); +#ifdef DUMP_RX + dump_trailer(&sspc->pdev->dev, sspc->tx, sspc->len, 16); +#endif + sspc->rx_dma = SRAM_RX_ADDR; + sspc->tx_dma = SRAM_TX_ADDR; + } else { + /* no QUIRKS_SRAM_ADDITIONAL_CPY */ + if (unlikely(sspc->dma_mapped)) + return 1; + + sspc->tx_dma = dma_map_single(dev, sspc->tx, sspc->len, + PCI_DMA_TODEVICE); + if (unlikely(dma_mapping_error(dev, sspc->tx_dma))) { + dev_err(dev, "ERROR : tx dma mapping failed\n"); + return 0; + } + + sspc->rx_dma = dma_map_single(dev, sspc->rx, sspc->len, + PCI_DMA_FROMDEVICE); + if (unlikely(dma_mapping_error(dev, sspc->rx_dma))) { + dma_unmap_single(dev, sspc->tx_dma, + sspc->len, DMA_TO_DEVICE); + dev_err(dev, "ERROR : rx dma mapping failed\n"); + return 0; + } + } + return 1; +} + +/** + * drain_trail() - Handle trailing bytes of a transfer + * @sspc: Pointer to the private driver context + * + * This function handles the trailing bytes of a transfer for the case + * they are not handled by the DMA. + */ +void drain_trail(struct ssp_drv_context *sspc) +{ + struct device *dev = &sspc->pdev->dev; + void *reg = sspc->ioaddr; + + if (sspc->len != sspc->len_dma_rx) { + dev_dbg(dev, "Handling trailing bytes. SSSR:%08x\n", + read_SSSR(reg)); + sspc->rx += sspc->len_dma_rx; + sspc->tx += sspc->len_dma_tx; + + while ((sspc->tx != sspc->tx_end) || + (sspc->rx != sspc->rx_end)) { + sspc->read(sspc); + sspc->write(sspc); + } + } +} + +/** + * sram_to_ddr_cpy() - Copy data from Langwell SDRAM to DDR + * @sspc: Pointer to the private driver context + */ +static void sram_to_ddr_cpy(struct ssp_drv_context *sspc) +{ + u32 length = sspc->len; + + if ((sspc->quirks & QUIRKS_DMA_USE_NO_TRAIL) + && (sspc->len > sspc->rx_fifo_threshold * sspc->n_bytes)) + length = TRUNCATE(sspc->len, + sspc->rx_fifo_threshold * sspc->n_bytes); + + memcpy_fromio(sspc->rx, sspc->virt_addr_sram_rx, length); +} + +static void int_transfer_complete(struct ssp_drv_context *sspc) +{ + void *reg = sspc->ioaddr; + struct spi_message *msg; + struct device *dev = &sspc->pdev->dev; + + if (unlikely(sspc->quirks & QUIRKS_USE_PM_QOS)) + pm_qos_update_request(&sspc->pm_qos_req, + PM_QOS_DEFAULT_VALUE); + + if (unlikely(sspc->quirks & QUIRKS_SRAM_ADDITIONAL_CPY)) + sram_to_ddr_cpy(sspc); + + if (likely(sspc->quirks & QUIRKS_DMA_USE_NO_TRAIL)) + drain_trail(sspc); + else + /* Stop getting Time Outs */ + write_SSTO(0, reg); + + sspc->cur_msg->status = 0; + sspc->cur_msg->actual_length = sspc->len; + +#ifdef DUMP_RX + dump_trailer(dev, sspc->rx, sspc->len, 16); +#endif + + dev_dbg(dev, "End of transfer. SSSR:%08X\n", read_SSSR(reg)); + msg = sspc->cur_msg; + if (likely(msg->complete)) + msg->complete(msg->context); + complete(&sspc->msg_done); +} + +static void int_transfer_complete_work(struct work_struct *work) +{ + struct ssp_drv_context *sspc = container_of(work, + struct ssp_drv_context, complete_work); + + int_transfer_complete(sspc); +} + +static void poll_transfer_complete(struct ssp_drv_context *sspc) +{ + struct spi_message *msg; + + /* Update total byte transfered return count actual bytes read */ + sspc->cur_msg->actual_length += sspc->len - (sspc->rx_end - sspc->rx); + + sspc->cur_msg->status = 0; + msg = sspc->cur_msg; + if (likely(msg->complete)) + msg->complete(msg->context); + complete(&sspc->msg_done); +} + +/** + * ssp_int() - Interrupt handler + * @irq + * @dev_id + * + * The SSP interrupt is not used for transfer which are handled by + * DMA or polling: only under/over run are catched to detect + * broken transfers. + */ +static irqreturn_t ssp_int(int irq, void *dev_id) +{ + struct ssp_drv_context *sspc = dev_id; + void *reg = sspc->ioaddr; + struct device *dev = &sspc->pdev->dev; + u32 status = read_SSSR(reg); + + /* It should never be our interrupt since SSP will */ + /* only trigs interrupt for under/over run. */ + if (likely(!(status & sspc->mask_sr))) + return IRQ_NONE; + + if (status & SSSR_ROR || status & SSSR_TUR) { + dev_err(dev, "--- SPI ROR or TUR occurred : SSSR=%x\n", status); + WARN_ON(1); + if (status & SSSR_ROR) + dev_err(dev, "we have Overrun\n"); + if (status & SSSR_TUR) + dev_err(dev, "we have Underrun\n"); + } + + /* We can fall here when not using DMA mode */ + if (!sspc->cur_msg) { + disable_interface(sspc); + disable_triggers(sspc); + } + /* clear status register */ + write_SSSR(sspc->clear_sr, reg); + return IRQ_HANDLED; +} + +static void poll_transfer(unsigned long data) +{ + struct ssp_drv_context *sspc = (void *)data; + + bool delay = false; + + if ((intel_mid_identify_sim() == INTEL_MID_CPU_SIMULATION_VP) || + intel_mid_identify_sim() == INTEL_MID_CPU_SIMULATION_HVP) { + delay = true; + } + + if (sspc->tx) + while (sspc->tx != sspc->tx_end) { + /* [REVERT ME] Tangier simulator requires a delay */ + if (delay) + udelay(10); + if (ssp_timing_wr) { + int timeout = 100; + /* It is used as debug UART on Tangier. Since + baud rate = 115200, it needs at least 312us + for one word transferring. Becuase of silicon + issue, it MUST check SFIFOL here instead of + TNF. It is the workaround for A0 stepping*/ + while (--timeout && + ((read_SFIFOL(sspc->ioaddr)) & 0xFFFF)) + udelay(10); + } + sspc->write(sspc); + sspc->read(sspc); + } + + while (!sspc->read(sspc)) + cpu_relax(); + + poll_transfer_complete(sspc); +} + +/** + * start_bitbanging() - Clock synchronization by bit banging + * @sspc: Pointer to private driver context + * + * This clock synchronization will be removed as soon as it is + * handled by the SCU. + */ +static void start_bitbanging(struct ssp_drv_context *sspc) +{ + u32 sssr; + u32 count = 0; + u32 cr0; + void *i2c_reg = sspc->I2C_ioaddr; + struct device *dev = &sspc->pdev->dev; + void *reg = sspc->ioaddr; + struct chip_data *chip = spi_get_ctldata(sspc->cur_msg->spi); + cr0 = chip->cr0; + + dev_warn(dev, "In %s : Starting bit banging\n", + __func__); + if (read_SSSR(reg) & SSP_NOT_SYNC) + dev_warn(dev, "SSP clock desynchronized.\n"); + if (!(read_SSCR0(reg) & SSCR0_SSE)) + dev_warn(dev, "in SSCR0, SSP disabled.\n"); + + dev_dbg(dev, "SSP not ready, start CLK sync\n"); + + write_SSCR0(cr0 & ~SSCR0_SSE, reg); + write_SSPSP(0x02010007, reg); + + write_SSTO(chip->timeout, reg); + write_SSCR0(cr0, reg); + + /* + * This routine uses the DFx block to override the SSP inputs + * and outputs allowing us to bit bang SSPSCLK. On Langwell, + * we have to generate the clock to clear busy. + */ + write_I2CDATA(0x3, i2c_reg); + udelay(I2C_ACCESS_USDELAY); + write_I2CCTRL(0x01070034, i2c_reg); + udelay(I2C_ACCESS_USDELAY); + write_I2CDATA(0x00000099, i2c_reg); + udelay(I2C_ACCESS_USDELAY); + write_I2CCTRL(0x01070038, i2c_reg); + udelay(I2C_ACCESS_USDELAY); + sssr = read_SSSR(reg); + + /* Bit bang the clock until CSS clears */ + while ((sssr & 0x400000) && (count < MAX_BITBANGING_LOOP)) { + write_I2CDATA(0x2, i2c_reg); + udelay(I2C_ACCESS_USDELAY); + write_I2CCTRL(0x01070034, i2c_reg); + udelay(I2C_ACCESS_USDELAY); + write_I2CDATA(0x3, i2c_reg); + udelay(I2C_ACCESS_USDELAY); + write_I2CCTRL(0x01070034, i2c_reg); + udelay(I2C_ACCESS_USDELAY); + sssr = read_SSSR(reg); + count++; + } + if (count >= MAX_BITBANGING_LOOP) + dev_err(dev, "ERROR in %s : infinite loop on bit banging. Aborting\n", + __func__); + + dev_dbg(dev, "---Bit bang count=%d\n", count); + + write_I2CDATA(0x0, i2c_reg); + udelay(I2C_ACCESS_USDELAY); + write_I2CCTRL(0x01070038, i2c_reg); +} + +static unsigned int ssp_get_clk_div(int speed) +{ + return max(100000000 / speed, 4) - 1; +} + +/** + * transfer() - Start a SPI transfer + * @spi: Pointer to the spi_device struct + * @msg: Pointer to the spi_message struct + */ +static int transfer(struct spi_device *spi, struct spi_message *msg) +{ + struct ssp_drv_context *sspc = spi_master_get_devdata(spi->master); + unsigned long flags; + + msg->actual_length = 0; + msg->status = -EINPROGRESS; + spin_lock_irqsave(&sspc->lock, flags); + list_add_tail(&msg->queue, &sspc->queue); + if (!sspc->suspended) + queue_work(sspc->workqueue, &sspc->pump_messages); + spin_unlock_irqrestore(&sspc->lock, flags); + + return 0; +} + +static int handle_message(struct ssp_drv_context *sspc) +{ + struct chip_data *chip = NULL; + struct spi_transfer *transfer = NULL; + void *reg = sspc->ioaddr; + u32 cr1; + struct device *dev = &sspc->pdev->dev; + struct spi_message *msg = sspc->cur_msg; + + chip = spi_get_ctldata(msg->spi); + + /* We handle only one transfer message since the protocol module has to + control the out of band signaling. */ + transfer = list_entry(msg->transfers.next, struct spi_transfer, + transfer_list); + + /* Check transfer length */ + if (unlikely((transfer->len > MAX_SPI_TRANSFER_SIZE) || + (transfer->len == 0))) { + dev_warn(dev, "transfer length null or greater than %d\n", + MAX_SPI_TRANSFER_SIZE); + dev_warn(dev, "length = %d\n", transfer->len); + msg->status = -EINVAL; + + if (msg->complete) + msg->complete(msg->context); + complete(&sspc->msg_done); + return 0; + } + + /* Flush any remaining data (in case of failed previous transfer) */ + flush(sspc); + + sspc->tx = (void *)transfer->tx_buf; + sspc->rx = (void *)transfer->rx_buf; + sspc->len = transfer->len; + sspc->write = chip->write; + sspc->read = chip->read; + + if (likely(chip->dma_enabled)) { + sspc->dma_mapped = map_dma_buffers(sspc); + if (unlikely(!sspc->dma_mapped)) + return 0; + } else { + sspc->write = sspc->tx ? chip->write : null_writer; + sspc->read = sspc->rx ? chip->read : null_reader; + } + sspc->tx_end = sspc->tx + transfer->len; + sspc->rx_end = sspc->rx + transfer->len; + + /* [REVERT ME] Bug in status register clear for Tangier simulation */ + if ((intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER) || + (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_ANNIEDALE)) { + if ((intel_mid_identify_sim() != INTEL_MID_CPU_SIMULATION_VP && + (intel_mid_identify_sim() != INTEL_MID_CPU_SIMULATION_HVP))) + write_SSSR(sspc->clear_sr, reg); + } else /* Clear status */ + write_SSSR(sspc->clear_sr, reg); + + /* setup the CR1 control register */ + cr1 = chip->cr1 | sspc->cr1_sig; + + if (likely(sspc->quirks & QUIRKS_DMA_USE_NO_TRAIL)) { + /* in case of len smaller than burst size, adjust the RX */ + /* threshold. All other cases will use the default threshold */ + /* value. The RX fifo threshold must be aligned with the DMA */ + /* RX transfer size, which may be limited to a multiple of 4 */ + /* bytes due to 32bits DDR access. */ + if (sspc->len / sspc->n_bytes <= sspc->rx_fifo_threshold) { + u32 rx_fifo_threshold; + + rx_fifo_threshold = (sspc->len & ~(4 - 1)) / + sspc->n_bytes; + cr1 &= ~(SSCR1_RFT); + cr1 |= SSCR1_RxTresh(rx_fifo_threshold) & SSCR1_RFT; + } else + write_SSTO(chip->timeout, reg); + } + + dev_dbg(dev, "transfer len:%d n_bytes:%d cr0:%x cr1:%x", + sspc->len, sspc->n_bytes, chip->cr0, cr1); + + /* first set CR1 */ + write_SSCR1(cr1, reg); + + if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER) + write_SSFS((1 << chip->chip_select), reg); + + /* Do bitbanging only if SSP not-enabled or not-synchronized */ + if (unlikely(((read_SSSR(reg) & SSP_NOT_SYNC) || + (!(read_SSCR0(reg) & SSCR0_SSE))) && + (sspc->quirks & QUIRKS_BIT_BANGING))) { + start_bitbanging(sspc); + } else { + /* (re)start the SSP */ + if (ssp_timing_wr) { + chip->cr0 = 0x00C0000F; + write_SSCR0(chip->cr0, reg); + chip->cr0 = 0x00C12C0F; + write_SSCR0(chip->cr0, reg); + chip->cr0 = 0x00C12C8F; + write_SSCR0(chip->cr0, reg); + } else + write_SSCR0(chip->cr0, reg); + } + + if (likely(chip->dma_enabled)) { + if (unlikely(sspc->quirks & QUIRKS_USE_PM_QOS)) + pm_qos_update_request(&sspc->pm_qos_req, + MIN_EXIT_LATENCY); + dma_transfer(sspc); + } else + tasklet_schedule(&sspc->poll_transfer); + + return 0; +} + +static void pump_messages(struct work_struct *work) +{ + struct ssp_drv_context *sspc = + container_of(work, struct ssp_drv_context, pump_messages); + struct device *dev = &sspc->pdev->dev; + unsigned long flags; + struct spi_message *msg; + + pm_runtime_get_sync(dev); + spin_lock_irqsave(&sspc->lock, flags); + while (!list_empty(&sspc->queue)) { + if (sspc->suspended) + break; + msg = list_entry(sspc->queue.next, struct spi_message, queue); + list_del_init(&msg->queue); + sspc->cur_msg = msg; + spin_unlock_irqrestore(&sspc->lock, flags); + INIT_COMPLETION(sspc->msg_done); + handle_message(sspc); + wait_for_completion(&sspc->msg_done); + spin_lock_irqsave(&sspc->lock, flags); + sspc->cur_msg = NULL; + } + spin_unlock_irqrestore(&sspc->lock, flags); + pm_runtime_put(dev); +} + +/** + * setup() - Driver setup procedure + * @spi: Pointeur to the spi_device struct + */ +static int setup(struct spi_device *spi) +{ + struct intel_mid_ssp_spi_chip *chip_info = NULL; + struct chip_data *chip; + struct ssp_drv_context *sspc = + spi_master_get_devdata(spi->master); + u32 tx_fifo_threshold; + u32 burst_size; + u32 clk_div; + + if (!spi->bits_per_word) + spi->bits_per_word = DFLT_BITS_PER_WORD; + + if ((spi->bits_per_word < MIN_BITS_PER_WORD + || spi->bits_per_word > MAX_BITS_PER_WORD)) + return -EINVAL; + + chip = spi_get_ctldata(spi); + if (!chip) { + chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL); + if (!chip) { + dev_err(&spi->dev, + "failed setup: can't allocate chip data\n"); + return -ENOMEM; + } + } + chip->cr0 = SSCR0_Motorola | SSCR0_DataSize(spi->bits_per_word > 16 ? + spi->bits_per_word - 16 : spi->bits_per_word) + | SSCR0_SSE + | (spi->bits_per_word > 16 ? SSCR0_EDSS : 0); + + /* protocol drivers may change the chip settings, so... */ + /* if chip_info exists, use it */ + chip_info = spi->controller_data; + + /* chip_info isn't always needed */ + chip->cr1 = 0; + if (chip_info) { + burst_size = chip_info->burst_size; + if (burst_size > IMSS_FIFO_BURST_8) + burst_size = DFLT_FIFO_BURST_SIZE; + + chip->timeout = chip_info->timeout; + + if (chip_info->enable_loopback) + chip->cr1 |= SSCR1_LBM; + + chip->dma_enabled = chip_info->dma_enabled; + + } else { + /* if no chip_info provided by protocol driver, */ + /* set default values */ + dev_info(&spi->dev, "setting default chip values\n"); + + burst_size = DFLT_FIFO_BURST_SIZE; + chip->dma_enabled = 1; + if (sspc->quirks & QUIRKS_DMA_USE_NO_TRAIL) + chip->timeout = 0; + else + chip->timeout = DFLT_TIMEOUT_VAL; + } + /* Set FIFO thresholds according to burst_size */ + if (burst_size == IMSS_FIFO_BURST_8) + sspc->rx_fifo_threshold = 8; + else if (burst_size == IMSS_FIFO_BURST_4) + sspc->rx_fifo_threshold = 4; + else + sspc->rx_fifo_threshold = 1; + tx_fifo_threshold = SPI_FIFO_SIZE - sspc->rx_fifo_threshold; + chip->cr1 |= (SSCR1_RxTresh(sspc->rx_fifo_threshold) & + SSCR1_RFT) | (SSCR1_TxTresh(tx_fifo_threshold) & SSCR1_TFT); + + sspc->dma_mapped = 0; + + /* setting phase and polarity. spi->mode comes from boardinfo */ + if ((spi->mode & SPI_CPHA) != 0) + chip->cr1 |= SSCR1_SPH; + if ((spi->mode & SPI_CPOL) != 0) + chip->cr1 |= SSCR1_SPO; + + if (sspc->quirks & QUIRKS_SPI_SLAVE_CLOCK_MODE) + /* set slave mode */ + chip->cr1 |= SSCR1_SCLKDIR | SSCR1_SFRMDIR; + chip->cr1 |= SSCR1_SCFR; /* clock is not free running */ + + dev_dbg(&spi->dev, "%d bits/word, mode %d\n", + spi->bits_per_word, spi->mode & 0x3); + if (spi->bits_per_word <= 8) { + chip->n_bytes = 1; + chip->read = u8_reader; + chip->write = u8_writer; + } else if (spi->bits_per_word <= 16) { + chip->n_bytes = 2; + chip->read = u16_reader; + chip->write = u16_writer; + } else if (spi->bits_per_word <= 32) { + if (!ssp_timing_wr) + chip->cr0 |= SSCR0_EDSS; + chip->n_bytes = 4; + chip->read = u32_reader; + chip->write = u32_writer; + } else { + dev_err(&spi->dev, "invalid wordsize\n"); + return -EINVAL; + } + + if ((sspc->quirks & QUIRKS_SPI_SLAVE_CLOCK_MODE) == 0) { + chip->speed_hz = spi->max_speed_hz; + clk_div = ssp_get_clk_div(chip->speed_hz); + if (!ssp_timing_wr) + chip->cr0 |= clk_div << 8; + } + chip->bits_per_word = spi->bits_per_word; + chip->chip_select = spi->chip_select; + + spi_set_ctldata(spi, chip); + + /* setup of sspc members that will not change across transfers */ + sspc->n_bytes = chip->n_bytes; + + if (chip->dma_enabled) { + intel_mid_ssp_spi_dma_init(sspc); + sspc->cr1_sig = SSCR1_TSRE | SSCR1_RSRE; + sspc->mask_sr = SSSR_ROR | SSSR_TUR; + if (sspc->quirks & QUIRKS_DMA_USE_NO_TRAIL) + sspc->cr1_sig |= SSCR1_TRAIL; + } else { + sspc->cr1_sig = SSCR1_TINTE; + sspc->mask_sr = SSSR_ROR | SSSR_TUR | SSSR_TINT; + } + sspc->clear_sr = SSSR_TUR | SSSR_ROR | SSSR_TINT; + + return 0; +} + +/** + * cleanup() - Driver cleanup procedure + * @spi: Pointer to the spi_device struct + */ +static void cleanup(struct spi_device *spi) +{ + struct chip_data *chip = spi_get_ctldata(spi); + struct ssp_drv_context *sspc = + spi_master_get_devdata(spi->master); + + if (sspc->dma_initialized) + intel_mid_ssp_spi_dma_exit(sspc); + + /* Remove the PM_QOS request */ + if (sspc->quirks & QUIRKS_USE_PM_QOS) + pm_qos_remove_request(&sspc->pm_qos_req); + + kfree(chip); + spi_set_ctldata(spi, NULL); +} + +/** + * intel_mid_ssp_spi_probe() - Driver probe procedure + * @pdev: Pointer to the pci_dev struct + * @ent: Pointer to the pci_device_id struct + */ +static int intel_mid_ssp_spi_probe(struct pci_dev *pdev, + const struct pci_device_id *ent) +{ + struct device *dev = &pdev->dev; + struct spi_master *master; + struct ssp_drv_context *sspc = 0; + int status; + u32 iolen = 0; + u8 ssp_cfg; + int pos; + void __iomem *syscfg_ioaddr; + unsigned long syscfg; + + /* Check if the SSP we are probed for has been allocated */ + /* to operate as SPI. This information is retreived from */ + /* the field adid of the Vendor-Specific PCI capability */ + /* which is used as a configuration register. */ + pos = pci_find_capability(pdev, PCI_CAP_ID_VNDR); + if (pos > 0) { + pci_read_config_byte(pdev, + pos + VNDR_CAPABILITY_ADID_OFFSET, + &ssp_cfg); + } else { + dev_info(dev, "No Vendor Specific PCI capability\n"); + goto err_abort_probe; + } + + if (ssp_cfg_get_mode(ssp_cfg) != SSP_CFG_SPI_MODE_ID) { + dev_info(dev, "Unsupported SSP mode (%02xh)\n", ssp_cfg); + goto err_abort_probe; + } + + dev_info(dev, "found PCI SSP controller (ID: %04xh:%04xh cfg: %02xh)\n", + pdev->vendor, pdev->device, ssp_cfg); + + status = pci_enable_device(pdev); + if (status) + return status; + + /* Allocate Slave with space for sspc and null dma buffer */ + master = spi_alloc_master(dev, sizeof(struct ssp_drv_context)); + + if (!master) { + dev_err(dev, "cannot alloc spi_slave\n"); + status = -ENOMEM; + goto err_free_0; + } + + sspc = spi_master_get_devdata(master); + sspc->master = master; + + sspc->pdev = pdev; + sspc->quirks = ent->driver_data; + + /* Set platform & configuration quirks */ + if (sspc->quirks & QUIRKS_PLATFORM_MRST) { + /* Apply bit banging workarround on MRST */ + sspc->quirks |= QUIRKS_BIT_BANGING; + /* MRST slave mode workarrounds */ + if (ssp_cfg_is_spi_slave(ssp_cfg)) + sspc->quirks |= QUIRKS_USE_PM_QOS | + QUIRKS_SRAM_ADDITIONAL_CPY; + } + sspc->quirks |= QUIRKS_DMA_USE_NO_TRAIL; + if (ssp_cfg_is_spi_slave(ssp_cfg)) + sspc->quirks |= QUIRKS_SPI_SLAVE_CLOCK_MODE; + + master->mode_bits = SPI_CPOL | SPI_CPHA; + master->bus_num = ssp_cfg_get_spi_bus_nb(ssp_cfg); + master->num_chipselect = 4; + master->cleanup = cleanup; + master->setup = setup; + master->transfer = transfer; + sspc->dma_wq = create_workqueue("intel_mid_ssp_spi"); + INIT_WORK(&sspc->complete_work, int_transfer_complete_work); + + sspc->dma_initialized = 0; + sspc->suspended = 0; + sspc->cur_msg = NULL; + + /* get basic io resource and map it */ + sspc->paddr = pci_resource_start(pdev, 0); + iolen = pci_resource_len(pdev, 0); + + status = pci_request_region(pdev, 0, dev_name(&pdev->dev)); + if (status) + goto err_free_1; + + sspc->ioaddr = ioremap_nocache(sspc->paddr, iolen); + if (!sspc->ioaddr) { + status = -ENOMEM; + goto err_free_2; + } + dev_dbg(dev, "paddr = : %08lx", sspc->paddr); + dev_dbg(dev, "ioaddr = : %p\n", sspc->ioaddr); + dev_dbg(dev, "attaching to IRQ: %04x\n", pdev->irq); + dev_dbg(dev, "quirks = : %08lx\n", sspc->quirks); + + if (sspc->quirks & QUIRKS_BIT_BANGING) { + /* Bit banging on the clock is done through */ + /* DFT which is available through I2C. */ + /* get base address of I2C_Serbus registers */ + sspc->I2C_paddr = 0xff12b000; + sspc->I2C_ioaddr = ioremap_nocache(sspc->I2C_paddr, 0x10); + if (!sspc->I2C_ioaddr) { + status = -ENOMEM; + goto err_free_3; + } + } + + /* Attach to IRQ */ + sspc->irq = pdev->irq; + status = request_irq(sspc->irq, ssp_int, IRQF_SHARED, + "intel_mid_ssp_spi", sspc); + + if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER) { + if ((intel_mid_identify_sim() == + INTEL_MID_CPU_SIMULATION_SLE) || + (intel_mid_identify_sim() == + INTEL_MID_CPU_SIMULATION_NONE)) { + /* [REVERT ME] Tangier SLE not supported. + * Requires debug before removal. Assume + * also required in Si. */ + disable_irq_nosync(sspc->irq); + } + if (intel_mid_identify_sim() == INTEL_MID_CPU_SIMULATION_NONE) + ssp_timing_wr = 1; + } + + if (status < 0) { + dev_err(&pdev->dev, "can not get IRQ\n"); + goto err_free_4; + } + + if (sspc->quirks & QUIRKS_PLATFORM_MDFL) { + /* get base address of DMA selector. */ + syscfg = sspc->paddr - SYSCFG; + syscfg_ioaddr = ioremap_nocache(syscfg, 0x10); + if (!syscfg_ioaddr) { + status = -ENOMEM; + goto err_free_5; + } + iowrite32(ioread32(syscfg_ioaddr) | 2, syscfg_ioaddr); + } + + INIT_LIST_HEAD(&sspc->queue); + init_completion(&sspc->msg_done); + spin_lock_init(&sspc->lock); + tasklet_init(&sspc->poll_transfer, poll_transfer, (unsigned long)sspc); + INIT_WORK(&sspc->pump_messages, pump_messages); + sspc->workqueue = create_singlethread_workqueue(dev_name(&pdev->dev)); + + /* Register with the SPI framework */ + dev_info(dev, "register with SPI framework (bus spi%d)\n", + master->bus_num); + + status = spi_register_master(master); + if (status) { + dev_err(dev, "problem registering spi\n"); + goto err_free_5; + } + + pci_set_drvdata(pdev, sspc); + + /* Create the PM_QOS request */ + if (sspc->quirks & QUIRKS_USE_PM_QOS) + pm_qos_add_request(&sspc->pm_qos_req, PM_QOS_CPU_DMA_LATENCY, + PM_QOS_DEFAULT_VALUE); + + pm_runtime_put_noidle(&pdev->dev); + pm_runtime_allow(&pdev->dev); + + return status; + +err_free_5: + free_irq(sspc->irq, sspc); +err_free_4: + iounmap(sspc->I2C_ioaddr); +err_free_3: + iounmap(sspc->ioaddr); +err_free_2: + pci_release_region(pdev, 0); +err_free_1: + spi_master_put(master); +err_free_0: + pci_disable_device(pdev); + + return status; +err_abort_probe: + dev_info(dev, "Abort probe for SSP %04xh:%04xh\n", + pdev->vendor, pdev->device); + return -ENODEV; +} + +/** + * intel_mid_ssp_spi_remove() - driver remove procedure + * @pdev: Pointer to the pci_dev struct + */ +static void intel_mid_ssp_spi_remove(struct pci_dev *pdev) +{ + struct ssp_drv_context *sspc = pci_get_drvdata(pdev); + + if (!sspc) + return; + + pm_runtime_forbid(&pdev->dev); + pm_runtime_get_noresume(&pdev->dev); + /* Release IRQ */ + free_irq(sspc->irq, sspc); + + iounmap(sspc->ioaddr); + if (sspc->quirks & QUIRKS_BIT_BANGING) + iounmap(sspc->I2C_ioaddr); + + /* disconnect from the SPI framework */ + spi_unregister_master(sspc->master); + + pci_set_drvdata(pdev, NULL); + pci_release_region(pdev, 0); + pci_disable_device(pdev); + + return; +} + +#ifdef CONFIG_PM +static int intel_mid_ssp_spi_suspend(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct ssp_drv_context *sspc = pci_get_drvdata(pdev); + unsigned long flags; + int loop = 26; + + dev_dbg(dev, "suspend\n"); + + spin_lock_irqsave(&sspc->lock, flags); + sspc->suspended = 1; + /* + * If there is one msg being handled, wait 500ms at most, + * if still not done, return busy + */ + while (sspc->cur_msg && --loop) { + spin_unlock_irqrestore(&sspc->lock, flags); + msleep(20); + spin_lock_irqsave(&sspc->lock, flags); + if (!loop) + sspc->suspended = 0; + } + spin_unlock_irqrestore(&sspc->lock, flags); + + if (loop) + return 0; + else + return -EBUSY; +} + +static int intel_mid_ssp_spi_resume(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct ssp_drv_context *sspc = pci_get_drvdata(pdev); + + dev_dbg(dev, "resume\n"); + spin_lock(&sspc->lock); + sspc->suspended = 0; + if (!list_empty(&sspc->queue)) + queue_work(sspc->workqueue, &sspc->pump_messages); + spin_unlock(&sspc->lock); + return 0; +} + +static int intel_mid_ssp_spi_runtime_suspend(struct device *dev) +{ + dev_dbg(dev, "runtime suspend called\n"); + return 0; +} + +static int intel_mid_ssp_spi_runtime_resume(struct device *dev) +{ + dev_dbg(dev, "runtime resume called\n"); + return 0; +} + +static int intel_mid_ssp_spi_runtime_idle(struct device *dev) +{ + int err; + + dev_dbg(dev, "runtime idle called\n"); + if (system_state == SYSTEM_BOOTING) + /* if SSP SPI UART is set as default console and earlyprintk + * is enabled, it cannot shutdown SSP controller during booting. + */ + err = pm_schedule_suspend(dev, 30000); + else + err = pm_schedule_suspend(dev, 500); + + return err; +} +#else +#define intel_mid_ssp_spi_suspend NULL +#define intel_mid_ssp_spi_resume NULL +#define intel_mid_ssp_spi_runtime_suspend NULL +#define intel_mid_ssp_spi_runtime_resume NULL +#define intel_mid_ssp_spi_runtime_idle NULL +#endif /* CONFIG_PM */ + + +static DEFINE_PCI_DEVICE_TABLE(pci_ids) = { + /* MRST SSP0 */ + { PCI_VDEVICE(INTEL, 0x0815), QUIRKS_PLATFORM_MRST}, + /* MDFL SSP0 */ + { PCI_VDEVICE(INTEL, 0x0832), QUIRKS_PLATFORM_MDFL}, + /* MDFL SSP1 */ + { PCI_VDEVICE(INTEL, 0x0825), QUIRKS_PLATFORM_MDFL}, + /* MDFL SSP3 */ + { PCI_VDEVICE(INTEL, 0x0816), QUIRKS_PLATFORM_MDFL}, + /* MRFL SSP5 */ + { PCI_VDEVICE(INTEL, 0x1194), 0}, + {}, +}; + +static const struct dev_pm_ops intel_mid_ssp_spi_pm_ops = { + .suspend = intel_mid_ssp_spi_suspend, + .resume = intel_mid_ssp_spi_resume, + .runtime_suspend = intel_mid_ssp_spi_runtime_suspend, + .runtime_resume = intel_mid_ssp_spi_runtime_resume, + .runtime_idle = intel_mid_ssp_spi_runtime_idle, +}; + +static struct pci_driver intel_mid_ssp_spi_driver = { + .name = DRIVER_NAME, + .id_table = pci_ids, + .probe = intel_mid_ssp_spi_probe, + .remove = intel_mid_ssp_spi_remove, + .driver = { + .pm = &intel_mid_ssp_spi_pm_ops, + }, +}; + +static int __init intel_mid_ssp_spi_init(void) +{ + return pci_register_driver(&intel_mid_ssp_spi_driver); +} + +late_initcall(intel_mid_ssp_spi_init); + +static void __exit intel_mid_ssp_spi_exit(void) +{ + pci_unregister_driver(&intel_mid_ssp_spi_driver); +} + +module_exit(intel_mid_ssp_spi_exit); diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index 02d38db518b..e0fb3480a6a 100644 --- a/drivers/thermal/Kconfig +++ b/drivers/thermal/Kconfig @@ -169,17 +169,6 @@ config INTEL_POWERCLAMP enforce idle time which results in more package C-state residency. The user interface is exposed via generic thermal framework. -<<<<<<< HEAD -======= -config INTEL_BYT_THERMAL - tristate "Thermal driver for Intel Baytrail platform" - depends on THERMAL && IIO && CRYSTAL_COVE - help - Say Y here to enable thermal driver on Intel Baytrail platform. - - To load this driver as a module, select M here. The module - will be called "byt_thermal" - config SENSORS_THERMAL_MRFLD tristate "Thermal driver for Intel Merrifield platform" depends on THERMAL && IIO && IIO_BASINCOVE_GPADC @@ -208,5 +197,4 @@ config SOC_THERMAL Say Y here to enable thermal driver on Intel Merrifield platform. To load this driver as a module, select M here. ->>>>>>> 174d8b6... [PORT FROM K3.4]Thermal: Config entry for SoC thermal driver to K3.10 endif diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile index 86cb18cf5a5..46c9aa52198 100644 --- a/drivers/thermal/Makefile +++ b/drivers/thermal/Makefile @@ -12,6 +12,7 @@ thermal_sys-y += thermal_core.o obj-$(CONFIG_INTEL_MFLD_THERMAL) += intel_mid_thermal.o obj-$(CONFIG_INTEL_BYT_THERMAL) += intel_byt_thermal.o obj-$(CONFIG_SENSORS_THERMAL_MRFLD) += intel_mrfl_thermal.o +obj-$(CONFIG_SOC_THERMAL) += intel_soc_thermal.o # governors thermal_sys-$(CONFIG_THERMAL_GOV_FAIR_SHARE) += fair_share.o diff --git a/drivers/thermal/intel_mrfl_thermal.c b/drivers/thermal/intel_mrfl_thermal.c index 3d05016b12e..ab34846bcab 100644 --- a/drivers/thermal/intel_mrfl_thermal.c +++ b/drivers/thermal/intel_mrfl_thermal.c @@ -666,6 +666,11 @@ static struct thermal_zone_device_ops tzd_ops = { #endif }; +static irqreturn_t mrfl_thermal_intrpt_handler(int irq, void* dev_data) +{ + return IRQ_WAKE_THREAD; +} + static int mrfl_thermal_probe(struct platform_device *pdev) { int ret, i; @@ -749,7 +754,7 @@ static int mrfl_thermal_probe(struct platform_device *pdev) } /* Register for Interrupt Handler */ - ret = request_threaded_irq(tdata->irq, NULL, thermal_intrpt, + ret = request_threaded_irq(tdata->irq, mrfl_thermal_intrpt_handler, thermal_intrpt, IRQF_TRIGGER_RISING, DRIVER_NAME, tdata); if (ret) { diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile index 23c0cd930c0..1bc7013c557 100644 --- a/drivers/usb/dwc3/Makefile +++ b/drivers/usb/dwc3/Makefile @@ -43,12 +43,7 @@ endif obj-$(CONFIG_USB_DWC3) += dwc3-omap.o obj-$(CONFIG_USB_DWC3) += dwc3-exynos.o -<<<<<<< HEAD -obj-$(CONFIG_USB_DWC3_PCI) += dwc3-pci.o -======= ifneq ($(CONFIG_PCI),) obj-$(CONFIG_USB_DWC3_OTG) += otg.o obj-$(CONFIG_USB_DWC3) += dwc3-pci.o endif ->>>>>>> 9bc9aec5... dwc3: Support OTG mode for dwc3 controller - diff --git a/drivers/usb/dwc3/dwc3-device-intel.c b/drivers/usb/dwc3/dwc3-device-intel.c index 21987490a54..0ffde5c352d 100644 --- a/drivers/usb/dwc3/dwc3-device-intel.c +++ b/drivers/usb/dwc3/dwc3-device-intel.c @@ -22,7 +22,6 @@ #include <linux/usb/dwc3-intel-mid.h> #include <linux/usb/phy.h> -#include <linux/wakelock.h> #include "core.h" #include "gadget.h" @@ -58,7 +57,6 @@ struct dwc3_dev_data { struct dwc3 *dwc; void __iomem *flis_reg; u32 grxthrcfg; - struct wake_lock wake_lock; struct mutex mutex; }; @@ -245,7 +243,6 @@ int dwc3_start_peripheral(struct usb_gadget *g) int irq; int ret = 0; - wake_lock(&_dev_data->wake_lock); pm_runtime_get_sync(dwc->dev); mutex_lock(&_dev_data->mutex); @@ -353,8 +350,6 @@ int dwc3_stop_peripheral(struct usb_gadget *g) cancel_delayed_work_sync(&dwc->link_work); - wake_unlock(&_dev_data->wake_lock); - return 0; } @@ -582,9 +577,6 @@ static int dwc3_device_intel_probe(struct platform_device *pdev) usb_put_phy(usb_phy); dwc->is_otg = 1; - wake_lock_init(&_dev_data->wake_lock, - WAKE_LOCK_SUSPEND, "dwc_wake_lock"); - dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE); ret = dwc3_gadget_init(dwc); if (ret) { @@ -620,8 +612,6 @@ static int dwc3_device_intel_remove(struct platform_device *pdev) { iounmap(_dev_data->flis_reg); - wake_lock_destroy(&_dev_data->wake_lock); - dwc3_remove(pdev); kfree(_dev_data); diff --git a/drivers/usb/dwc3/dwc3-host-intel.c b/drivers/usb/dwc3/dwc3-host-intel.c index a757e2b3152..ce21b684c89 100644 --- a/drivers/usb/dwc3/dwc3-host-intel.c +++ b/drivers/usb/dwc3/dwc3-host-intel.c @@ -49,7 +49,7 @@ static void xhci_dwc3_quirks(struct device *dev, struct xhci_hcd *xhci) * Synopsys DWC3 controller will generate PLC when link transfer to * compliance/loopback mode. */ - xhci->quirks |= XHCI_PLAT | XHCI_COMP_PLC_QUIRK; + xhci->quirks |= XHCI_PLAT; } /* called during probe() after chip reset completes */ @@ -474,9 +474,6 @@ static int xhci_dwc_drv_probe(struct platform_device *pdev) usb_put_phy(usb_phy); - /* Enable wakeup irq */ - hcd->has_wakeup_irq = 1; - platform_set_drvdata(pdev, hcd); pm_runtime_enable(hcd->self.controller); diff --git a/drivers/usb/dwc3/dwc3-intel-mrfl.c b/drivers/usb/dwc3/dwc3-intel-mrfl.c index 6918d5e0c97..207f18e65fa 100644 --- a/drivers/usb/dwc3/dwc3-intel-mrfl.c +++ b/drivers/usb/dwc3/dwc3-intel-mrfl.c @@ -25,7 +25,6 @@ static int enable_usb_phy(struct dwc_otg2 *otg, bool on_off); static int dwc3_intel_notify_charger_type(struct dwc_otg2 *otg, enum power_supply_charger_event event); static struct power_supply_cable_props cap_record; -static int shady_cove_get_id(struct dwc_otg2 *otg); static int charger_detect_enable(struct dwc_otg2 *otg) { @@ -103,32 +102,93 @@ static enum usb_charger_type aca_check(struct dwc_otg2 *otg) return type; } + + usb_put_phy(phy); +} + + +/* As we use SW mode to do charger detection, need to notify HW + * the result SW get, charging port or not */ +static int dwc_otg_charger_hwdet(bool enable) +{ + int retval; + struct usb_phy *phy; + struct dwc_otg2 *otg = dwc3_get_otg(); + + /* Just return if charger detection is not enabled */ + if (!charger_detect_enable(otg)) + return 0; + + phy = usb_get_phy(USB_PHY_TYPE_USB2); + if (!phy) + return -ENODEV; + + if (enable) { + retval = usb_phy_io_write(phy, PWCTRL_HWDETECT, + TUSB1211_POWER_CONTROL_SET); + if (retval) + return retval; + otg_dbg(otg, "set HWDETECT\n"); + } else { + retval = usb_phy_io_write(phy, PWCTRL_HWDETECT, + TUSB1211_POWER_CONTROL_CLR); + if (retval) + return retval; + otg_dbg(otg, "clear HWDETECT\n"); + } + usb_put_phy(phy); + + return 0; +} + static enum power_supply_charger_cable_type - shady_cove_aca_check(struct dwc_otg2 *otg) + basin_cove_aca_check(struct dwc_otg2 *otg) { + u8 rarbrc; + int ret; + enum power_supply_charger_cable_type type = + POWER_SUPPLY_CHARGER_TYPE_NONE; - if (!otg) - return POWER_SUPPLY_CHARGER_TYPE_NONE; + ret = intel_scu_ipc_update_register(PMIC_USBIDCTRL, + USBIDCTRL_ACA_DETEN_D1, + USBIDCTRL_ACA_DETEN_D1); + if (ret) + otg_err(otg, "Fail to enable ACA&ID detection logic\n"); - switch (shady_cove_get_id(otg)) { - case RID_A: - return POWER_SUPPLY_CHARGER_TYPE_ACA_DOCK; - case RID_B: - return POWER_SUPPLY_CHARGER_TYPE_ACA_B; - case RID_C: - return POWER_SUPPLY_CHARGER_TYPE_ACA_C; - default: - return POWER_SUPPLY_CHARGER_TYPE_NONE; + /* Wait >66.1ms (for TCHGD_SERX_DEB) */ + msleep(66); + + /* Read decoded RID value */ + ret = intel_scu_ipc_ioread8(PMIC_USBIDSTS, &rarbrc); + if (ret) + otg_err(otg, "Fail to read decoded RID value\n"); + rarbrc &= USBIDSTS_ID_RARBRC_STS(3); + rarbrc >>= 1; + + /* If ID_RARBRC_STS==01: ACA-Dock detected + * If ID_RARBRC_STS==00: MHL detected + */ + if (rarbrc == 1) { + /* ACA-Dock */ + type = POWER_SUPPLY_CHARGER_TYPE_ACA_DOCK; + } else if (!rarbrc) { + /* MHL */ + type = POWER_SUPPLY_CHARGER_TYPE_MHL; } + + ret = intel_scu_ipc_update_register(PMIC_USBIDCTRL, + USBIDCTRL_ACA_DETEN_D1, + 0); + if (ret) + otg_err(otg, "Fail to enable ACA&ID detection logic\n"); + + return type; } static enum power_supply_charger_cable_type dwc3_intel_aca_check(struct dwc_otg2 *otg) { - if (is_basin_cove(otg)) - return basin_cove_aca_check(otg); - else - return shady_cove_aca_check(otg); + return basin_cove_aca_check(otg); } static ssize_t store_otg_id(struct device *_dev, @@ -196,19 +256,6 @@ show_otg_id(struct device *_dev, struct device_attribute *attr, char *buf) static DEVICE_ATTR(otg_id, S_IRUGO|S_IWUSR|S_IWGRP, show_otg_id, store_otg_id); -static void dwc_a_bus_drop(struct usb_phy *x) -{ - struct dwc_otg2 *otg = dwc3_get_otg(); - unsigned long flags; - - if (otg->usb2_phy.vbus_state == VBUS_DISABLED) { - spin_lock_irqsave(&otg->lock, flags); - otg->user_events |= USER_A_BUS_DROP; - dwc3_wakeup_otg_thread(otg); - spin_unlock_irqrestore(&otg->lock, flags); - } -} - static void set_sus_phy(struct dwc_otg2 *otg, int bit) { u32 data = 0; @@ -234,10 +281,6 @@ int dwc3_intel_platform_init(struct dwc_otg2 *otg) u32 gctl; int retval; - /* Init a_bus_drop callback */ - otg->usb2_phy.a_bus_drop = dwc_a_bus_drop; - otg->usb2_phy.vbus_state = VBUS_ENABLED; - otg_info(otg, "De-assert USBRST# to enable PHY\n"); retval = intel_scu_ipc_iowrite8(PMIC_USBPHYCTRL, PMIC_USBPHYCTRL_D0); @@ -353,110 +396,9 @@ int basin_cove_get_id(struct dwc_otg2 *otg) return id; } -int shady_cove_get_id(struct dwc_otg2 *otg) -{ - int ret, count = 0, id = RID_UNKNOWN; - u8 val, id_l, id_h, cursrc, schgrirq1; - unsigned long rlsb, rid; - unsigned long rlsb_array[] = { - 0, 260480, 130240, 65120, - 32560, 16280, 8140, 4070, 2035}; - - ret = intel_scu_ipc_ioread8(PMIC_SCHGRIRQ1, &schgrirq1); - if (ret) { - otg_err(otg, "Fail to read id\n"); - return id; - } - - /* PMIC_SCHGRIRQ1_SUSBIDDET bit definition: - * 0 = RID_A/B/C ; 1 = RID_GND ; 2 = RID_FLOAT */ - if (schgrirq1 & PMIC_SCHGRIRQ1_SUSBIDDET(2)) - return RID_FLOAT; - else if (schgrirq1 & PMIC_SCHGRIRQ1_SUSBIDDET(1)) - return RID_GND; - - /* Initiate a USBID resistance check. */ - ret = intel_scu_ipc_update_register(PMIC_GPADCREQ_REG, - PMIC_GPADCREQ_ADC_USBID, - PMIC_GPADCREQ_ADC_USBID); - if (ret) { - otg_err(otg, "Fail to enable USBID resistance\n"); - goto done; - } - - /* Poll whether ADC conversion is finished. */ - while (1) { - count++; - - if (count > 9) { - otg_err(otg, "ADC conversion timeout!\n"); - goto done; - } - mdelay(1); - - ret = intel_scu_ipc_ioread8(PMIC_ADCIRQ_REG, &val); - if (ret) { - otg_err(otg, "Fail to read decoded RID value\n"); - goto done; - } - - if (val & PMIC_ADCIRQ_USBID) - break; - } - - /* Read ADC value lower 8 bits. */ - ret = intel_scu_ipc_ioread8(PMIC_USBIDRSLTL, &id_l); - if (ret) { - otg_err(otg, "IPC read PMIC_USBIDRSLTL failed!\n"); - goto done; - } - id_l &= PMIC_USBIDRSLTL_USBID_L_MASK; - - /* Read ADC value upper 4 bits. - * Read Current source value 4 bits.*/ - ret = intel_scu_ipc_ioread8(PMIC_USBIDRSLTH, &id_h); - if (ret) { - otg_err(otg, "IPC read PMIC_USBIDRSLTL failed!\n"); - goto done; - } - cursrc = id_h & PMIC_USBIDRSLTH_USBID_CURSRC_MASK; - id_h &= PMIC_USBIDRSLTH_USBID_H_MASK; - - /* @RLSb_array[USBID_CURSRC] = {NULL, 260.48, - * 130.24, 65.12, 32.56, 16.28, 8.14, 4.07, 2.035}; - * RLSb = 2.035 * power(2,8-USBID_CURSRC); - * RID = ((USBID_H << 8) + (USBID_L)) * RLSb;*/ - cursrc >>= 4; - - /* Due to linux kernel can't support float calculate. - * So we multiple 1000 for calculate */ - rlsb = rlsb_array[cursrc]; - rid = ((id_h << 8) + (id_l)) * rlsb; - - /* If RID value is within: - * 111.5k to 136.4kΩ: ACA-A/ACA-Dock detected - * 61.2k to 74.8kΩ: ACA-B detected - * 32.85k to 40.15kΩ: ACA-C detected - * else: Unknown detected */ - do_div(rid, 1000UL); - - if ((rid > 111500) && (rid < 136400)) - return RID_A; - else if ((rid > 61200) && (rid < 74800)) - return RID_B; - else if ((rid > 32850) && (rid < 40150)) - return RID_C; - -done: - return RID_UNKNOWN; -} - int dwc3_intel_get_id(struct dwc_otg2 *otg) { - if (is_basin_cove(otg)) - return basin_cove_get_id(otg); - else - return shady_cove_get_id(otg); + return basin_cove_get_id(otg); } int dwc3_intel_b_idle(struct dwc_otg2 *otg) @@ -507,9 +449,11 @@ static int dwc3_intel_set_power(struct usb_phy *_otg, data = (struct intel_dwc_otg_pdata *)otg->otg_data; - if (otg->charging_cap.chrg_type == CHRG_CDP) + if (otg->charging_cap.chrg_type == + POWER_SUPPLY_CHARGER_TYPE_USB_CDP) return 0; - else if (otg->charging_cap.chrg_type != CHRG_SDP) { + else if (otg->charging_cap.chrg_type != + POWER_SUPPLY_CHARGER_TYPE_USB_SDP) { otg_err(otg, "%s: currently, chrg type is not SDP!\n", __func__); return -EINVAL; @@ -599,19 +543,27 @@ int dwc3_intel_enable_vbus(struct dwc_otg2 *otg, int enable) } static int dwc3_intel_notify_charger_type(struct dwc_otg2 *otg, - enum usb_charger_state state) + enum power_supply_charger_event event) { - struct otg_bc_cap cap; + struct power_supply_cable_props cap; int ret = 0; unsigned long flags; - if (state > OTG_CHR_STATE_HOST) { - otg_err(otg, "%s: Invalid usb_charger_state!\n", __func__); + if (!charger_detect_enable(otg) && + (otg->charging_cap.chrg_type != + POWER_SUPPLY_CHARGER_TYPE_USB_SDP)) + return 0; + + if (event > POWER_SUPPLY_CHARGER_EVENT_DISCONNECT) { + otg_err(otg, + "%s: Invalid power_supply_charger_event!\n", __func__); return -EINVAL; } - if ((otg->charging_cap.chrg_type == CHRG_SDP) && - ((otg->charging_cap.ma != 100) && + if ((otg->charging_cap.chrg_type == + POWER_SUPPLY_CHARGER_TYPE_USB_SDP) && + ((otg->charging_cap.ma != 0) && + (otg->charging_cap.ma != 100) && (otg->charging_cap.ma != 150) && (otg->charging_cap.ma != 500) && (otg->charging_cap.ma != 900))) { @@ -622,7 +574,7 @@ static int dwc3_intel_notify_charger_type(struct dwc_otg2 *otg, spin_lock_irqsave(&otg->lock, flags); cap.chrg_type = otg->charging_cap.chrg_type; cap.ma = otg->charging_cap.ma; - cap.chrg_state = state; + cap.chrg_evt = event; spin_unlock_irqrestore(&otg->lock, flags); atomic_notifier_call_chain(&otg->usb2_phy.notifier, USB_EVENT_CHARGER, @@ -631,13 +583,48 @@ static int dwc3_intel_notify_charger_type(struct dwc_otg2 *otg, return ret; } -enum usb_charger_type dwc3_intel_get_charger_type(struct dwc_otg2 *otg) +static void dwc3_phy_soft_reset(struct dwc_otg2 *otg) +{ + u32 val; + + val = otg_read(otg, GCTL); + val |= GCTL_CORESOFTRESET; + otg_write(otg, GCTL, val); + + val = otg_read(otg, GUSB3PIPECTL0); + val |= GUSB3PIPECTL_PHYSOFTRST; + otg_write(otg, GUSB3PIPECTL0, val); + + val = otg_read(otg, GUSB2PHYCFG0); + val |= GUSB2PHYCFG_PHYSOFTRST; + otg_write(otg, GUSB2PHYCFG0, val); + + msleep(50); + + val = otg_read(otg, GUSB3PIPECTL0); + val &= ~GUSB3PIPECTL_PHYSOFTRST; + otg_write(otg, GUSB3PIPECTL0, val); + + val = otg_read(otg, GUSB2PHYCFG0); + val &= ~GUSB2PHYCFG_PHYSOFTRST; + otg_write(otg, GUSB2PHYCFG0, val); + + msleep(100); + + val = otg_read(otg, GCTL); + val &= ~GCTL_CORESOFTRESET; + otg_write(otg, GCTL, val); +} + +static enum power_supply_charger_cable_type + dwc3_intel_get_charger_type(struct dwc_otg2 *otg) { - u8 val, vdat_det, chgd_serx_dm; - unsigned long timeout, interval; int ret; - enum usb_charger_type type = CHRG_UNKNOWN; struct usb_phy *phy; + u8 val, vdat_det, chgd_serx_dm; + unsigned long timeout, interval; + enum power_supply_charger_cable_type type = + POWER_SUPPLY_CHARGER_TYPE_NONE; if (!charger_detect_enable(otg)) return cap_record.chrg_type; @@ -645,7 +632,7 @@ enum usb_charger_type dwc3_intel_get_charger_type(struct dwc_otg2 *otg) phy = usb_get_phy(USB_PHY_TYPE_USB2); if (!phy) { otg_err(otg, "Get USB2 PHY failed\n"); - return CHRG_UNKNOWN; + return POWER_SUPPLY_CHARGER_TYPE_NONE; } /* PHY Enable: @@ -654,16 +641,14 @@ enum usb_charger_type dwc3_intel_get_charger_type(struct dwc_otg2 *otg) enable_usb_phy(otg, true); dwc3_phy_soft_reset(otg); - if (is_basin_cove(otg)) { - /* Enable ACA: - * Enable ACA & ID detection logic. - */ - ret = intel_scu_ipc_update_register(PMIC_USBIDCTRL, - USBIDCTRL_ACA_DETEN_D1 | PMIC_USBPHYCTRL_D0, - USBIDCTRL_ACA_DETEN_D1 | PMIC_USBPHYCTRL_D0); - if (ret) - otg_err(otg, "Fail to enable ACA&ID detection logic\n"); - } + /* Enable ACA: + * Enable ACA & ID detection logic. + */ + ret = intel_scu_ipc_update_register(PMIC_USBIDCTRL, + USBIDCTRL_ACA_DETEN_D1 | PMIC_USBPHYCTRL_D0, + USBIDCTRL_ACA_DETEN_D1 | PMIC_USBPHYCTRL_D0); + if (ret) + otg_err(otg, "Fail to enable ACA&ID detection logic\n"); /* DCD Enable: Change OPMODE to 01 (Non-driving), * TermSel to 0, & @@ -738,7 +723,7 @@ enum usb_charger_type dwc3_intel_get_charger_type(struct dwc_otg2 *otg) * Else: goto 'Pri Det Enable'. */ if (val == 3) { - type = CHRG_SE1; + type = POWER_SUPPLY_CHARGER_TYPE_SE1; goto cleanup; } @@ -772,7 +757,7 @@ enum usb_charger_type dwc3_intel_get_charger_type(struct dwc_otg2 *otg) * If VDAT_DET==1 && CHGD_SERX_DM==0: CDP/DCP */ if (vdat_det == 0 || chgd_serx_dm == 1) - type = CHRG_SDP; + type = POWER_SUPPLY_CHARGER_TYPE_USB_SDP; /* Disable VDPSRC. */ usb_phy_io_write(phy, PWCTRL_DP_VSRC_EN, TUSB1211_POWER_CONTROL_CLR); @@ -780,7 +765,7 @@ enum usb_charger_type dwc3_intel_get_charger_type(struct dwc_otg2 *otg) /* If SDP, goto “Cleanup”. * Else, goto “Sec Det Enable” */ - if (type == CHRG_SDP) + if (type == POWER_SUPPLY_CHARGER_TYPE_USB_SDP) goto cleanup; /* Sec Det Enable: @@ -810,9 +795,9 @@ enum usb_charger_type dwc3_intel_get_charger_type(struct dwc_otg2 *otg) * If VDAT_DET==1: DCP detected. */ if (!val) - type = CHRG_CDP; + type = POWER_SUPPLY_CHARGER_TYPE_USB_CDP; else - type = CHRG_DCP; + type = POWER_SUPPLY_CHARGER_TYPE_USB_DCP; /* Disable VDMSRC. */ usb_phy_io_write(phy, PWCTRL_DP_VSRC_EN, TUSB1211_POWER_CONTROL_CLR); @@ -823,7 +808,7 @@ enum usb_charger_type dwc3_intel_get_charger_type(struct dwc_otg2 *otg) cleanup: /* If DCP detected, assert VDPSRC. */ - if (type == CHRG_DCP) + if (type == POWER_SUPPLY_CHARGER_TYPE_USB_DCP) usb_phy_io_write(phy, PWCTRL_SW_CONTROL | PWCTRL_DP_VSRC_EN, TUSB1211_POWER_CONTROL_SET); diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index f14c2007276..d5418acc8da 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -1430,7 +1430,7 @@ static int dwc3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request, /* pad OUT endpoint buffer to MaxPacketSize per databook requirement*/ req->short_packet = false; if (!IS_ALIGNED(request->length, ep->desc->wMaxPacketSize) - && !(dep->number & 1)) { + && !(dep->number & 1) && (dep->number != DWC3_EP_EBC_OUT_NB)) { request->length = roundup(request->length, (u32) ep->desc->wMaxPacketSize); /* set flag for bulk-out short request */ @@ -1838,28 +1838,6 @@ static int dwc3_init_for_enumeration(struct dwc3 *dwc) int ret = 0; u32 reg; - irq = platform_get_irq(to_platform_device(dwc->dev), 0); - ret = request_threaded_irq(irq, dwc3_interrupt, dwc3_thread_interrupt, - IRQF_SHARED, "dwc3", dwc); - if (ret) { - dev_err(dwc->dev, "failed to request irq #%d --> %d\n", - irq, ret); - goto err0; - } - - spin_lock_irqsave(&dwc->lock, flags); - - if (dwc->gadget_driver) { - dev_err(dwc->dev, "%s is already bound to %s\n", - dwc->gadget.name, - dwc->gadget_driver->driver.name); - ret = -EBUSY; - goto err1; - } - - dwc->gadget_driver = driver; - ->>>>>>> 18cc6d8... [BACKPORT]usb: dwc3: gadget: get rid of IRQF_ONESHOT reg = dwc3_readl(dwc->regs, DWC3_DCFG); reg &= ~(DWC3_DCFG_SPEED_MASK); @@ -3505,7 +3483,7 @@ int dwc3_runtime_suspend(struct device *device) dep->flags = DWC3_EP_HIBERNATION; } - dwc3_gadget_run_stop(dwc, 0); + __dwc3_gadget_run_stop(dwc, 0); dwc3_gadget_keep_conn(dwc, 1); dwc3_cache_hwregs(dwc); @@ -3519,8 +3497,8 @@ int dwc3_runtime_suspend(struct device *device) spin_unlock_irqrestore(&dwc->lock, flags); - __dwc3_vbus_draw(dwc, OTG_DEVICE_SUSPEND); - dev_dbg(dwc->dev, "%s(): suspended\n", __func__); + schedule_delayed_work(&dwc->link_work, msecs_to_jiffies(1000)); + dev_info(dwc->dev, "suspended\n"); dev_vdbg(dwc->dev, "<--- %s()\n", __func__); return 0; diff --git a/drivers/usb/dwc3/otg.c b/drivers/usb/dwc3/otg.c index 93f90a4c5fc..cc82b435060 100644 --- a/drivers/usb/dwc3/otg.c +++ b/drivers/usb/dwc3/otg.c @@ -323,7 +323,7 @@ static int get_id(struct dwc_otg2 *otg) } static int dwc_otg_notify_charger_type(struct dwc_otg2 *otg, - enum usb_charger_state state) + enum power_supply_charger_event event) { if (dwc3_otg_pdata->notify_charger_type) return dwc3_otg_pdata->notify_charger_type(otg, event); @@ -513,6 +513,8 @@ static enum dwc_otg_state do_charger_detection(struct dwc_otg2 *otg) ma = 1500; break; case POWER_SUPPLY_CHARGER_TYPE_USB_SDP: + /* Notify SDP current is 100ma before enumeration. */ + ma = 100; break; default: otg_err(otg, "Charger type is not valid to notify battery\n"); diff --git a/drivers/usb/dwc3/otg.h b/drivers/usb/dwc3/otg.h index a5df0050241..b89b89d132e 100644 --- a/drivers/usb/dwc3/otg.h +++ b/drivers/usb/dwc3/otg.h @@ -121,6 +121,8 @@ struct dwc_device_par { #define GCTL_PRT_CAP_DIR_OTG 3 #define GCTL_GBL_HIBERNATION_EN 0x2 #define GCTL_CORESOFTRESET (1 << 11) +#define GCTL_PWRDNSCALE(x) (x << 19) +#define GCTL_PWRDNSCALE_MASK (0x1fff << 19) #define OCFG 0xcc00 #define OCFG_SRP_CAP 0x01 diff --git a/include/linux/mfd/intel_msic.h b/include/linux/mfd/intel_msic.h index 439a7a617bc..51217636726 100644 --- a/include/linux/mfd/intel_msic.h +++ b/include/linux/mfd/intel_msic.h @@ -12,6 +12,8 @@ #ifndef __LINUX_MFD_INTEL_MSIC_H__ #define __LINUX_MFD_INTEL_MSIC_H__ +#include <asm/intel_mid_gpadc.h> + /* ID */ #define INTEL_MSIC_ID0 0x000 /* RO */ #define INTEL_MSIC_ID1 0x001 /* RO */ @@ -52,6 +54,15 @@ #define INTEL_MSIC_PBCONFIG 0x03e #define INTEL_MSIC_PBSTATUS 0x03f /* RO */ +/* + * MSIC interrupt tree is readable from SRAM at INTEL_MSIC_IRQ_PHYS_BASE. + * Since IRQ block starts from address 0x002 we need to substract that from + * the actual IRQ status register address. + */ +#define MSIC_IRQ_STATUS(x) (INTEL_MSIC_IRQ_PHYS_BASE + ((x) - 2)) +#define MSIC_IRQ_STATUS_ACCDET MSIC_IRQ_STATUS(INTEL_MSIC_ACCDET) +#define MSIC_IRQ_STATUS_OCAUDIO MSIC_IRQ_STATUS(INTEL_MSIC_OCAUDIO) + /* GPIO */ #define INTEL_MSIC_GPIO0LV7CTLO 0x040 #define INTEL_MSIC_GPIO0LV6CTLO 0x041 @@ -377,9 +388,39 @@ /** * struct intel_msic_gpio_pdata - platform data for the MSIC GPIO driver * @gpio_base: base number for the GPIOs + * @ngpio_lv: number of low voltage GPIOs + * @ngpio_hv: number of high voltage GPIOs + * @gpio0_lv_ctlo: low voltage GPIO0 output control register + * @gpio0_lv_ctli: low voltage GPIO0 input control register + * @gpio0_hv_ctlo: high voltage GPIO0 output control register + * @gpio0_hv_ctli: high voltage GPIO0 input control register + * @can_sleep: flag for gpio chip */ struct intel_msic_gpio_pdata { unsigned gpio_base; + int ngpio_lv; + int ngpio_hv; + u16 gpio0_lv_ctlo; + u16 gpio0_lv_ctli; + u16 gpio0_hv_ctlo; + u16 gpio0_hv_ctli; + int can_sleep; +}; + +#define DISABLE_VCRIT 0x01 +#define DISABLE_VWARNB 0x02 +#define DISABLE_VWARNA 0x04 +/** + * struct intel_msic_vdd_pdata - platform data for the MSIC VDD driver + * @msi: MSI number used for VDD interrupts + * + * The MSIC CTP driver converts @msi into an IRQ number and passes it to + * the VDD driver as %IORESOURCE_IRQ. + */ +struct intel_msic_vdd_pdata { + unsigned msi; + /* 1 = VCRIT, 2 = WARNB, 4 = WARNA */ + u8 disable_unused_comparator; }; /** @@ -429,6 +470,7 @@ struct intel_msic_platform_data { int irq[INTEL_MSIC_BLOCK_LAST]; struct intel_msic_gpio_pdata *gpio; struct intel_msic_ocd_pdata *ocd; + struct intel_mid_gpadc_platform_data *gpadc; }; struct intel_msic; diff --git a/include/linux/usb/dwc3-intel-mid.h b/include/linux/usb/dwc3-intel-mid.h index 1b79c12c974..376b01e0173 100644 --- a/include/linux/usb/dwc3-intel-mid.h +++ b/include/linux/usb/dwc3-intel-mid.h @@ -22,6 +22,12 @@ #include "otg.h" +enum intel_mid_pmic_type { + NO_PMIC, + SHADY_COVE, + BASIN_COVE +}; + struct intel_dwc_otg_pdata { int is_hvp; enum intel_mid_pmic_type pmic_type; @@ -165,7 +171,7 @@ struct intel_dwc_otg_pdata { #define USBIDCTRL_USB_IDEN_D0 (1 << 0) #define PMIC_USBIDSTS 0x1A #define USBIDSTS_ID_GND (1 << 0) -#define USBIDSTS_ID_RARBRC_STS(v) ((v & 0x3) << 0) +#define USBIDSTS_ID_RARBRC_STS(v) ((v & 0x3) << 1) #define USBIDSTS_ID_FLOAT_STS (1 << 3) #define PMIC_USBPHYCTRL_D0 (1 << 0) #define APBFC_EXIOTG3_MISC0_REG 0xF90FF85C @@ -174,4 +180,11 @@ struct intel_dwc_otg_pdata { #define DATACON_INTERVAL 10 #define VBUS_TIMEOUT 300 #define PCI_DEVICE_ID_DWC 0x119E + +#define VENDOR_ID_MASK (0x03 << 6) +#define BASIN_COVE_PMIC_ID (0x03 << 6) + +#define PMIC_MAJOR_REV (0x07 << 3) +#define PMIC_A0_MAJOR_REV 0x00 + #endif /* __DWC3_INTEL_H */ diff --git a/init/main.c b/init/main.c index fc071a6be23..beddd350212 100644 --- a/init/main.c +++ b/init/main.c @@ -665,11 +665,13 @@ static int __init_or_module do_one_initcall_debug(initcall_t fn) int ret; pr_debug("calling %pF @ %i\n", fn, task_pid_nr(current)); + calltime = ktime_get(); ret = fn(); rettime = ktime_get(); delta = ktime_sub(rettime, calltime); duration = (unsigned long long) ktime_to_ns(delta) >> 10; + pr_debug("initcall %pF returned %d after %lld usecs\n", fn, ret, duration); diff --git a/kernel/time/timer_list.c b/kernel/time/timer_list.c index b665872f633..61ed862cdd3 100644 --- a/kernel/time/timer_list.c +++ b/kernel/time/timer_list.c @@ -256,26 +256,6 @@ static void timer_list_show_tickdevices_header(struct seq_file *m) static inline void timer_list_header(struct seq_file *m, u64 now) { - struct timer_list_iter *iter = v; - - if (iter->cpu == -1 && !iter->second_pass) - timer_list_header(m, iter->now); - else if (!iter->second_pass) - print_cpu(m, iter->cpu, iter->now); -#ifdef CONFIG_GENERIC_CLOCKEVENTS - else if (iter->cpu == -1 && iter->second_pass) - timer_list_show_tickdevices_header(m); - else - print_tickdevice(m, tick_get_device(iter->cpu), iter->cpu); -#endif - return 0; -} - -void sysrq_timer_list_show(void) -{ - u64 now = ktime_to_ns(ktime_get()); - int cpu; - SEQ_printf(m, "Timer List Version: v0.7\n"); SEQ_printf(m, "HRTIMER_MAX_CLOCK_BASES: %d\n", HRTIMER_MAX_CLOCK_BASES); SEQ_printf(m, "now at %Ld nsecs\n", (unsigned long long)now); @@ -285,10 +265,9 @@ void sysrq_timer_list_show(void) static int timer_list_show(struct seq_file *m, void *v) { struct timer_list_iter *iter = v; - u64 now = ktime_to_ns(ktime_get()); if (iter->cpu == -1 && !iter->second_pass) - timer_list_header(m, now); + timer_list_header(m, iter->now); else if (!iter->second_pass) print_cpu(m, iter->cpu, iter->now); #ifdef CONFIG_GENERIC_CLOCKEVENTS @@ -355,14 +334,6 @@ static void *timer_list_next(struct seq_file *file, void *v, loff_t *offset) return move_iter(iter, 1); } -static void *timer_list_next(struct seq_file *file, void *v, loff_t *offset) -{ - struct timer_list_iter *iter = file->private; - iter->cpu = cpumask_next(iter->cpu, cpu_online_mask); - ++*offset; - return timer_list_start(file, offset); -} - static void timer_list_stop(struct seq_file *seq, void *v) { } |