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Signed-off-by: Bernhard Rosenkränzer <Bernhard.Rosenkranzer@linaro.org>
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Signed-off-by: Bernhard Rosenkränzer <Bernhard.Rosenkranzer@linaro.org>
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Rather than duplicate logic about which pipe driver to load, and
statically link pipe driver and winsys code into gralloc, dlopen()
gallium_dri.so and use the newly introduced load_pipe_screen() to
find our pipe driver.
This is important, as otherwise we end up w/ two copies of winsys,
one in GLES and one in gralloc. Which defeats the purpose of logic
in the winsys to avoid having two pipe_screen's (and therefore two
fd_device's) for same drm fd. Otherwise we end up w/ scenario's
where one pipe_screen (fd_device) closes GEM handles that the other
is still using, which leads to SUBMIT ioctl errors and generally a
bad time.
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This reverts commit 3aa8ec295d6e8846977bed3bf268467a28e3afef.
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Well, it *was* completely untested at the time.
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This will be passed in to driver, who expects to take ownership of the
fd.. so don't hand out our internal fd without dup()'ing it.
TODO: double check this.. EGL_EXT_image_dma_buf_import says driver does
not take ownership of the fd, and I think platform_android is using
almost the same code-paths.. so possibly the dup() should be in the
driver. (but dri3 doesn't appear to explode.. root question is whether
screen->resource_from_handle() takes ownership of the fd or not, so not
sure if there is already a dup() somewhere in the dma_buf_import path.)
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I'm not even sure how this could work.. vmwgfx should expect
pipe_format's for the pipe_transfer, so with this change it should be
converting incorrectly in svga_transform_format(). If this is really
needed, it must be fixed in vmwgfx (since GL would be equally broken
on vmwgfx)
This reverts commit dc21193e3252ba2d6526546ba1d0c02116baf3ee.
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We'd need to use pipe_transfer to synchronize w/ rendering done in the
same process.. so let's hope that never happens. But locking for cpu
access should sync w/ pending gpu access to the buffer to at least get
the sw rendered client sharing buffers safely w/ surfaceflinger using
the gpu.
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Rather than accessing gralloc_drm_pid directly.
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Note entirely sure what synchronization guarantees android provides
before calling in to module.. but stuff inside gralloc module is
definately not thread-safe so slap a big lock around the outside.
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Including macro for tracing/debugging buffer lifetime issues. Possibly
that should be made compile time option to reduce the debug traces for
release build..
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* registerBuffer(): import handles using dma-buf fd instead of flink
* alloc(): locally created bo-s carry both fd and flink
enabled using DMABUF flag in Android.mk.
Signed-off-by: Varad Gautam <varadgautam@gmail.com>
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gralloc:lock() must supply virtual address for GRALLOC_USAGE_SW*
type buffers.
Signed-off-by: Varad Gautam <varadgautam@gmail.com>
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- HAWAII and MULLINS added
- changed 0x9649 from CHIP_FAMILY_SUMO to CHIP_FAMILY_SUMO2
- added missing chipInfo for CHIP_FAMILY_VERDE, CHIP_FAMILY_OLAND, CHIP_FAMILY_BONAIRE and CHIP_FAMILY_KAVERI
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It allows the camera to get a lock on the buffer.
This is required when a picture is taken.
Credited to Edgardo Gho <edgardogho@gmail.com>.
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Seems it is buggy.
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Now the include paths are imported automatically from libdrm*.
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When allocating a new buffer using pipe driver, pipe constants
are used to define a format based on corresponding HAL_PIXEL_FORMAT
However, vmwgfx driver expects other constants
(SVGA3D_A8R8G8B8, SVGA3D_X8R8G8B8, SVGA3D_R5G6B5, etc)
Changed the returning constants to match what driver expects.
v2: [cwhuang]
- Use the constants defined in svga3d_types.h.
- Use C99 standard to avoid building errors with mesa 10.6.
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Based on the work by pstglia.
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Based on some work by pstglia, one needs to switch off (partially or
fully?) the tiling when creating the BO.
Comment/uncomment the SW_INDICATOR_FULLY_DISABLES_TILING define to
toggle between the two.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
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Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
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- Move MAX macro to gralloc_drm.h
- Drop the freedreno's duplicated ALIGN macro.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
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Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
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... rather than going through all the conditionals.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
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Just change the 'data' field of gralloc_drm_handle_t
to be a pointer to struct gralloc_drm_bo_t.
Fix some warnings as well.
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Convert LOCAL_MODULE_PATH to LOCAL_MODULE_RELATIVE_PATH
to support 64-bit targets.
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v2: [Emil Velikov]
- drmGetVersion returns the kernel module name.
- Add it to the build :)
- freedreno_map returns void * while gralloc::map expects int.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
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Copied radeon.h (radeon_probe.h) and radeon_chipinfo_gen.h from master branch
of http://cgit.freedesktop.org/xorg/driver/xf86-video-ati
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Old i915 doesn't have I915_EXEC_BLT bit. Only set the bit if it's available.
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This patch adds in a system property "debug.drm.mode.force", which works
*similarly* to "debug.drm.mode". XRESxYRES[@REFRESHRATE].
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