Android TV Ref RCU SDKHEADmastermain

Check in the RCU SDK based on Atmosic ATM2231 chipset, solution provided
by Atmosic Technologies

RCU SDK Version: 1.0

-) Support IR over BLE service
-) Support Voice over BLE service
-) Support NEC IR code override
-) Support RCU Wake Up service

Test: make run_all USE_LIB=1 CFG_ATVRC=1 USE_BD_ADDR:="AABBCCDDEEFF"

BYPASS_INCLUSIVE_LANGUAGE_REASON=existing methods

Change-Id: I9d7db82ff40f5552e8896b5356886982feb95ade

211 files changed, 68931 insertions, 0 deletions

diff --git a/README b/README
new file mode 100644
index 0000000..321d55f
--- /dev/null
+++ b/README
@@ -0,0 +1,100 @@
+
+### System requirements and toolchain ###
+
+Linux:
+Starting from scratch, it is recommended to use Ubuntu 18.04 LTS AMD64 with
+this SDK.  However, most relatively up-to-date 64-bit x86 linux distributions
+will work just fine.  See tools/README for install instructions.
+
+Windows:
+The recommended OS version is Windows 10 (64 bit).  See tools/README.Windows for
+install instructions.
+
+macOS:
+The recommended OS version is 10.14.5 (Mojave).  See tools/README.macOS for
+install instructions.
+
+### Atmosic SDK library and tools ###
+
+Please go to https://atmosic.com/google-tv-sdk-download/ to download the Atmosic
+SDK library and tools package, extract and put them into SDK as below:
+
+Put the 'lib' and 'tools' folders in platform/atm2/ATM22xx-x1x/
+    platform/atm2/ATM22xx-x1x/lib/lib_plf.a
+    platform/atm2/ATM22xx-x1x/lib/lib_plf_dbg.a
+    platform/atm2/ATM22xx-x1x/lib/app_lib/HID_remote.a
+    platform/atm2/ATM22xx-x1x/lib/app_lib/HID_remote_dbg.a
+
+    platform/atm2/ATM22xx-x1x/tools/bin/Darwin/nvds_tool
+    platform/atm2/ATM22xx-x1x/tools/bin/Linux/nvds_tool
+    platform/atm2/ATM22xx-x1x/tools/bin/Windows_NT/nvds_tool.exe
+
+Put the 'openocd' folder in tools/:
+    tools/openocd/bin/Darwin/openocd
+    tools/openocd/bin/Linux/openocd
+    tools/openocd/bin/Windows_NT/libusb-1.0.dll
+    tools/openocd/bin/Windows_NT/openocd.exe
+
+For Linux/macOS users, use "chmod +x" to change the permission of executables.
+
+### Quick start ###
+
+1) Follow the appropriate instructions mentioned above to install gcc toolchain,
+   SDK library and tools.
+2) Connect ATM2231 G10 remote board, IO adapater board and interface board
+   together and plug in the USB1 of interface board to PC.  See "ATM2231 G10
+   Remote Control Application Note" document for more details.
+3) Open a terminal and cd into platform/atm2/ATM22xx-x1x/examples/HID_remote
+4) Type the command below to build Android TV remote G10 application with NVDS,
+   program it via USB, and reset the remote to run it.
+
+   make run_all CFG_ATVRC=1 USE_LIB=1
+
+### Makefile helpers ###
+
+USE_LIB:= Use the application library(HID_remote.a/HID_remote_dbg.a) to compile.
+
+DEBUG:= Debug helper allows application to log debug messages on serial
+console output and enabling debug compile option.  By default debug is enabled.
+
+USER_BD_ADDR:= Set user specified 6 byte bluetooth MAC address.  Address is
+specified in LSB first order.  e.g. for BD addr of a1:a2:a3:a4:a5:a6 use
+USER_BD_ADDR:="a6 a5 a4 a3 a2 a1".
+
+flash_nvds.data := List of NVDS tags required by application
+
+### SDK layout ###
+
+platform/atm2/ATM22xx-x1x
+    Atmosic ATM22xx-x1x chip support
+
+platform/atm2/ATM22xx-x1x/driver
+    Peripheral driver
+
+platform/atm2/ATM22xx-x1x/examples/HID_remote
+    Remote application source code
+
+platform/atm2/ATM22xx-x1x/include
+    C header files
+
+platform/atm2/ATM22xx-x1x/lib
+    Application framework and libraries
+
+platform/atm2/ATM22xx-x1x/openocd
+    Programming and debug scripts
+
+platform/atm2/ATM22xx-x1x/rom
+    ROM makefile and linker scripts
+
+platform/atm2/ATM22xx-x1x/tools
+    Atmosic ATM22xx-x1x chip-specific tools
+
+platform/atm2/ATM22xx-x1x/user
+    Linker scripts and shared source code for ATM22xx-x1x
+
+tools
+    SDK toolsets
+
+tools/atm_isp
+tools/atm_isp_python
+    In-System Programming Tool
\ No newline at end of file
diff --git a/application/audio/gl_audio.c b/application/audio/gl_audio.c
new file mode 100644
index 0000000..45534c4
--- /dev/null
+++ b/application/audio/gl_audio.c
@@ -0,0 +1,1277 @@
+/******************************************************************************
+ * @file     gl_audio.c
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *  Copyright (C) Atmosic 2022
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+
+#ifdef CFG_ATM_SDK
+#include "refdesignrcu.h"
+#include "bridge_att.h"
+#include "bridge_audio.h"
+#include "gl_audio.h"
+#include "vendor/827x_ble_remote/app_att.h"
+#else
+#include  "tl_common.h"
+#include  "drivers.h"
+#include  "audio_config.h"
+#include  "adpcm.h"
+#include  "gl_audio.h"
+#include  "tl_audio.h"
+#endif
+
+#if defined(CFG_ATM_SDK) || (TL_AUDIO_MODE == TL_AUDIO_RCU_ADPCM_GATT_GOOGLE)
+
+#ifdef CFG_ATM_SDK
+#include "stack/ble/ble_format.h"
+#else
+#include     "stack/ble/ble.h"
+#endif
+
+extern void ui_enable_mic(int en);
+#ifndef CFG_ATM_SDK
+extern u8        buffer_mic_pkt_wptr;
+extern u8        buffer_mic_pkt_rptr;
+#endif
+
+u8 audio_start_reason = 0;        //on-request(0x00),PTT(0x01),HTT(0x03) etc.
+u8 audio_stop_reason = 0;
+
+
+u8 app_audio_send_index = 0;
+u8 app_audio_sync_serial = 0;            //Used for google voice v0.4 sync cmd
+
+u16 mic_open_error_code = 0;
+
+_attribute_data_retention_ u8 mic_open_mode = CAPTURE_MODE;        //0x00:playback mode   0x01:capture mode
+
+_attribute_data_retention_ u8 google_voice_ver = 4;    //4: ver 0.4e  10:ver 1.0
+_attribute_data_retention_ u8 used_assistant_model = REASON_MICOPEN;
+
+//Google voice v1.0 control parameter
+_attribute_data_retention_ u8 auido_frame_size = 20;      //Byte. this variable is updated after sending CAPS_RESP
+_attribute_data_retention_ u8 stream_id = 0;              //The identifier of an audio stream to extend.
+_attribute_data_retention_ u8 flag_active_mic_open = 0;   //Enable/disable mic open command
+
+_attribute_data_retention_ u16 google_voice_ctl = 0;
+
+_attribute_data_retention_ u16 atv_char_ctl_ccc = 0;
+_attribute_data_retention_ u16 atv_char_rx_ccc = 0;
+
+_attribute_data_retention_ u16 google_voice_codec_used = CODEC_USED_16K;
+_attribute_data_retention_ u16 google_voice_packet_length = VOICE_V0P4_ADPCM_PACKET_LEN;
+_attribute_data_retention_ u16 google_voice_pcm_sample_packet = VOICE_V0P4_ADPCM_UNIT_SIZE;
+
+_attribute_data_retention_ u32 app_audio_start_delay = 0;
+_attribute_data_retention_ u32 app_active_remote_timer = 0;     //Wait mic open cmd after send START_SEARCH
+_attribute_data_retention_ u32 app_audio_transfer_timer = 0;    //Used for google voice timeout
+_attribute_data_retention_ u32 g_delay_send_audio_stop = 0;
+extern u8 device_in_connection_state;
+
+/**
+ * @brief   initialize packet parameters according to the version of google voice
+ * @param   none
+ * @return  none
+ */
+void google_voice_para_init(){
+
+    if(google_voice_ver == 4){      //ver0.4e
+        google_voice_packet_length = VOICE_V0P4_ADPCM_PACKET_LEN;   //128+6+2
+        google_voice_pcm_sample_packet = VOICE_V0P4_ADPCM_UNIT_SIZE;    //
+
+    }else if(google_voice_ver == 10){   //ver1.0
+        google_voice_packet_length = VOICE_V1P0_ADPCM_PACKET_LEN;   //
+        google_voice_pcm_sample_packet = VOICE_V1P0_ADPCM_UNIT_SIZE;    //
+
+        google_voice_codec_used = CODEC_USED_16K;
+    }else{//set to ver0.4e
+        google_voice_ver = 4;
+
+        google_voice_packet_length = VOICE_V0P4_ADPCM_PACKET_LEN;   //128+6+2
+        google_voice_pcm_sample_packet = VOICE_V0P4_ADPCM_UNIT_SIZE;    //
+    }
+}
+
+/**
+ * @brief   initialize voice control parameters
+ * @param   none
+ * @return  none
+ */
+void app_audio_parameter_init(){
+
+    app_audio_send_index = 0;
+
+    //v0.4
+    app_audio_sync_serial = 0;
+    //app_audio_send_index = 0;
+
+#ifndef CFG_ATM_SDK
+    //adpcm parameter
+    adpcm_predict      = 0;
+    adpcm_predict_idx  = 1;
+    //adpcm_predict_idx  = 0;
+
+    adpcm_sequence_num = 0;
+
+    //adpcm buffer
+    buffer_mic_pkt_wptr = 0;
+    buffer_mic_pkt_rptr = 0;
+#endif
+
+//    previous_sampling_rate = U16_LO(CODEC_USED_16K);    //default sampling rate:16k
+//    previous_seq_no = 0xffff;
+}
+
+/**
+ * @brief       this function is used to save the assistant model.
+ * @param[in]   model:the model type
+ * @return      none
+ */
+void set_assistant_model(u8 model){
+    used_assistant_model = model;
+}
+
+/**
+ * @brief   this function is used to read the assistant model.
+ * @param   none
+ * @return  the model type
+ */
+u8 read_assistant_model(){
+    return used_assistant_model;
+}
+
+/**
+ * @brief   this function is used to enable the mic open command.
+ * @param   none
+ * @return  none
+ */
+void active_mic_open(){
+    flag_active_mic_open = 1;
+    app_active_remote_timer = clock_time()|1;
+}
+
+/**
+ * @brief   this function is used to read the audio frame size.
+ * @param   none
+ * @return  the audio frame size
+ */
+u8 read_audio_frame_size(){
+
+    return auido_frame_size;
+}
+
+/**
+ * @brief       this function is used to set the audio frame size.
+ * @param[in]   frame_size:The frame size(data length exchange)
+ * @return      none
+ */
+void set_audio_frame_size(u8 frame_size){
+    auido_frame_size = 20;
+
+    if(frame_size >= 123){
+        auido_frame_size = 120;
+    }else if(frame_size >= 63){
+        auido_frame_size = 60;
+    }else if(frame_size >= 43){
+        auido_frame_size = 40;
+    }else if(frame_size >= 33){
+        auido_frame_size = 30;
+    }else{
+        auido_frame_size = 20;
+    }
+}
+
+/**
+ * @brief   initial settings before sending voice.
+ * @param   none
+ * @return  none
+ */
+void google_mic_enable(){
+
+    app_audio_parameter_init();
+    ui_enable_mic(1);
+
+    //app_active_remote_timer = 0;
+    app_audio_transfer_timer = clock_time() | 1;
+
+    google_voice_ctl |= FLAG_NOTIFY_AUDIO_DATA;
+    google_voice_ctl |= FLAG_GOOGLE_AUDIO_FIRST_SYNC;
+
+    google_voice_ctl |= FLAG_DELAY_NOTIFY;
+    app_audio_start_delay  = clock_time() | 1;
+}
+
+/**
+ * @brief   set FLAG_GOOGLE_SEARCH bit for send search key(on-request)
+ * @param   none
+ * @return  none
+ */
+#define PREVENT_TIME    600 //ms
+_attribute_data_retention_ u32 prevent_repeat_trigger_on_request_tick = 0;
+void google_voice_on_request(){
+
+    //Prevent repeated triggers(2020.12.15)
+    if(prevent_repeat_trigger_on_request_tick && (!clock_time_exceed(prevent_repeat_trigger_on_request_tick,PREVENT_TIME*1000))) return;
+    prevent_repeat_trigger_on_request_tick = clock_time()|1;
+    google_voice_ctl |= FLAG_GOOGLE_SEARCH;
+}
+
+/**
+ * @brief   set FLAG_GOOGLE_DPAD_SELECT bit for send DPAD cmd.(ver 0.4e 3.2.3)
+ * @param   none
+ * @return  none
+ */
+void google_voice_dpad_select(){
+    if(google_voice_ver == 4){
+        google_voice_ctl |= FLAG_GOOGLE_DPAD_SELECT;
+    }
+}
+
+void google_init_audio_parameter(void)
+{
+    u8 sendBuff[20]  = {0};
+
+    stream_id++;    //increase stream_id
+    if(stream_id > 0x80) stream_id = 1;    //stream_id range 0x01~0x80
+    google_voice_codec_used = CODEC_USED_16K;
+    //init audio parameter
+    sendBuff[0] = ATV_MIC_CHAR_CTL_AUDIO_START;
+    sendBuff[1] = audio_start_reason;
+    sendBuff[2] = U16_LO(google_voice_codec_used);
+    sendBuff[3] = stream_id;
+
+    bls_att_pushNotifyData(AUDIO_GOOGLE_CTL_DP_H, sendBuff, 4);
+
+    google_mic_enable();
+
+}
+
+/**
+ * @brief       this function is used to start the voice.
+ * @param[in]   start_reason:audio start reason
+ * @return      none
+ */
+u8 app_audio_key_start(u8 start_reason){
+
+    printf("app_audio_key_start\n");
+    if(!atv_char_rx_ccc) return 1;                        //ATVV_CHAR_AUDIO ccc is disabled
+    if(google_voice_ver != 10) return 2;                //google voice version error
+
+    switch(start_reason){
+        case REASON_PTT:
+        {
+            printf("audio_start_reason = REASON_PTT\n");
+            audio_start_reason = REASON_PTT;
+            google_init_audio_parameter();
+            break;
+        }
+        case REASON_HTT:
+        {
+            if(start_reason == REASON_HTT)
+            {
+                audio_start_reason = REASON_HTT;
+                printf("audio_start_reason = REASON_HTT\n");
+            }
+            google_init_audio_parameter();
+            break;
+        }
+        case REASON_MICOPEN:
+        {
+            printf("audio_start_reason = REASON_MICOPEN\n");
+
+            //send google voice CHAR_CTL search
+            google_voice_on_request();
+            active_mic_open();
+
+            break;
+        }
+        default:
+        {
+            return 4;    //not supported
+            break;
+        }
+    }
+    return 0;
+}
+
+/**
+ * @brief       this function is used to stop the voice.
+ * @param[in]   reason:Audio stop reason
+ * @return      none
+ */
+u8 app_audio_key_stop(u8 reason){
+    ui_enable_mic(0);
+    app_active_remote_timer = 0;
+    app_audio_transfer_timer = 0;
+
+    audio_stop_reason = reason;
+    google_voice_ctl |= FLAG_AUDIO_CLOSE;
+
+    return 0;
+}
+
+/**
+ * @brief   this function is used to stop the voice by HTT.
+ * @param   none
+ * @return  0: ready to stop voice  1:voice start reason is not HTT
+ */
+u8 app_audio_key_stop_by_htt(){
+    if(audio_start_reason != REASON_HTT) return 1;
+
+    app_audio_key_stop(REASON_RELEASE_HTT);
+
+    return 0;
+}
+
+/**
+ * @brief   according to the version of google voice, start the corresponding process
+ * @param   none
+ * @return  none
+ */
+void google_voice_start(){
+
+    if(google_voice_ver == 10){
+        app_audio_key_start(read_assistant_model());
+
+    }else{
+        google_voice_on_request();
+    }
+}
+
+/**
+ * @brief   this function is used to stop the voice.
+ * @param   none
+ * @return  none
+ */
+void google_voice_stop(){
+    if(audio_start_reason == REASON_HTT)
+        app_audio_key_stop_by_htt();
+}
+
+/**
+ * @brief       google voice 0.4 processing function.
+ * @param[in]   pw:received RF data
+ * @return      none
+ */
+void google_voice_v0p4(rf_packet_att_data_t *pw){
+    u8 sendBuff[20]  = {0};
+
+    u8 cmd = pw->dat[0];
+    if(cmd == AUDIO_GOOGLE_CMD_OPEN)
+    {
+        //v0.4e proc
+
+        u8 len = pw->l2cap-3;
+        u16 ATV_codec_used = 2;
+        printf("received pkt len:%d\n",len);
+
+        array_printf(pw->dat,len);
+
+        if(len == 3){
+            ATV_codec_used = (pw->dat[1]<<8) + pw->dat[2];
+        }else{
+            ATV_codec_used = 2;
+        }
+
+
+        printf("received v0.4 mic open:%d\n",ATV_codec_used);
+        switch(ATV_codec_used){
+            case CODEC_USED_8K:
+            {
+                printf("ADPCM, 8khz/16bit\n");
+
+                google_voice_codec_used = CODEC_USED_8K; //8k
+                google_voice_packet_length = VOICE_V0P4_ADPCM_PACKET_LEN ; // 2 is just for 4*n
+                google_voice_pcm_sample_packet = VOICE_V0P4_ADPCM_UNIT_SIZE*2;  //512.
+
+
+                app_audio_send_index = 0;
+
+                sendBuff[0] = ATV_MIC_CHAR_CTL_AUDIO_START;
+                bls_att_pushNotifyData(AUDIO_GOOGLE_CTL_DP_H, sendBuff, 1);
+
+                google_mic_enable();
+
+                break;
+            }
+            case CODEC_USED_16K:
+            {
+                printf("ADPCM, 16khz/16bit\n");
+
+                google_voice_codec_used = CODEC_USED_16K;
+                google_voice_packet_length = VOICE_V0P4_ADPCM_PACKET_LEN ; // 2 is just for 4*n
+                google_voice_pcm_sample_packet = VOICE_V0P4_ADPCM_UNIT_SIZE;  //256
+
+                app_audio_send_index = 0;
+
+                sendBuff[0] = ATV_MIC_CHAR_CTL_AUDIO_START;
+                bls_att_pushNotifyData(AUDIO_GOOGLE_CTL_DP_H, sendBuff, 1);
+
+                google_mic_enable();
+
+                break;
+            }
+            case CODEC_USED_OPUS:
+                //printf("Opus(future),current sdk do Not support\n");
+            default:
+            {
+                printf("only support 8k voice\n");
+                printf("default ADPCM, 8khz/16bit\n");
+
+                google_voice_codec_used = CODEC_USED_8K; //8k
+                google_voice_packet_length = VOICE_V0P4_ADPCM_PACKET_LEN ; // 2 is just for 4*n
+                google_voice_pcm_sample_packet = VOICE_V0P4_ADPCM_UNIT_SIZE*2;  //512.
+
+
+                app_audio_send_index = 0;
+
+                sendBuff[0] = ATV_MIC_CHAR_CTL_AUDIO_START;
+                bls_att_pushNotifyData(AUDIO_GOOGLE_CTL_DP_H, sendBuff, 1);
+
+                google_mic_enable();
+                //err parameter
+                //printf("default\n");
+//                sendBuff[0] = ATV_MIC_CHAR_CTL_MIC_OPEN_ERROR;
+//                sendBuff[1] = U16_HI(ERROR_INVALIED_CODEC);
+//                sendBuff[2] = U16_LO(ERROR_INVALIED_CODEC);
+//                bls_att_pushNotifyData(AUDIO_GOOGLE_CTL_DP_H, sendBuff, 3);
+                break;
+            }
+        }
+        printf("google_voice_pcm_sample_packet:%d\n",google_voice_pcm_sample_packet);
+        printf("google_voice_packet_length:%d\n",google_voice_packet_length);
+    }else if(cmd == AUDIO_GOOGLE_CMD_CLOSE){
+        printf("AUDIO_GOOGLE_CMD_CLOSE\n");
+        //u8 close_stream_id = pw->dat[1];
+
+        ui_enable_mic(0);
+
+        //send audio close cmd
+        google_voice_ctl |= FLAG_AUDIO_CLOSE;
+    }
+}
+
+/**
+ * @brief       verify stream id.
+ * @param[in]   received stream id from host
+ * @return      0: OK  1: audio_start_reason is not REASON_MICOPEN
+ *              2: stream id out of range  3: the received id is inconsistent with the current id
+ */
+u8 verify_stream_id(u8 id){
+
+    switch(id){
+        case 0x00:        //  Check if start reason is on-request.
+        {
+            if(audio_start_reason != REASON_MICOPEN)    return 1;
+            break;
+        }
+        case 0xff:        //any ongoing audio stream.
+        {
+            break;
+        }
+        default:        //when start reason is htt or ptt,check the stream_id.
+        {
+            if(id > 0x80)    return 2;    //audio stream id range: 0x01 ~ 0x80
+            if(id != stream_id) return 3;
+            break;
+        }
+    }
+
+    return 0;
+}
+
+/**
+ * @brief       google voice 1.0 processing function.
+ * @param[in]   received RF data
+ * @return      none
+ */
+void google_voice_v1p0(rf_packet_att_data_t *pw){
+    if(pw->dat[0] == AUDIO_GOOGLE_CMD_OPEN){
+        printf("AUDIO_GOOGLE_CMD_OPEN\n");
+        //check ccc
+        if(!atv_char_rx_ccc){
+            printf("atv_char_rx_ccc is disabled\n");
+
+            //notifications are disabled while audio data transfer is in progress
+            google_voice_ctl |= FLAG_GOOGLE_OPEN_ERROR;
+            mic_open_error_code = ERROR_CCC_NOT_ENABLED;
+            return;
+        }
+
+        if(!flag_active_mic_open){
+            printf("mic is not activated\n");
+        }
+
+        u8 mic_mode = pw->dat[1];
+        if(google_voice_ctl & FLAG_NOTIFY_AUDIO_DATA){    //ongoing audio stream
+            printf("ongoing audio stream_audio_start_reason:%d\n",audio_start_reason);
+            switch(audio_start_reason){
+                case REASON_PTT:
+                case REASON_HTT:
+                {
+                    //send open error.microphone is open because of ongoing PTT/HTT interaction
+                    mic_open_error_code = ERROR_ONGOING_PTT_HTT;
+                    google_voice_ctl |= FLAG_GOOGLE_OPEN_ERROR;
+                    break;
+                }
+                case REASON_MICOPEN:
+                default:
+                {
+                    //send audio stop and restart audio or ignore cmd
+                    //Prevent repeated triggers(2020.12.15)
+                    ui_enable_mic(0);
+                    google_voice_ctl |= FLAG_AUDIO_CLOSE;
+                    audio_stop_reason = REASON_UPCOMING_AUDIO_START;
+                    audio_start_reason = REASON_MICOPEN;
+                    break;
+                }
+            }
+        }else{
+            printf("new audio. mic mode:0x%x \n",mic_mode);
+            //start audio
+            switch(mic_mode){
+                case PLAYBACK_MODE:
+                {
+                    mic_open_mode = PLAYBACK_MODE;
+                    break;
+                }
+                case CAPTURE_MODE:
+//                  mic_open_mode = CAPTURE_MODE;
+//                  break;
+                default:
+                {
+                    mic_open_mode = CAPTURE_MODE;
+                    break;
+                }
+            }
+            //SEND AUDIO START
+
+            audio_start_reason = REASON_MICOPEN;
+            google_voice_codec_used = CODEC_USED_16K;
+
+            u8 sendBuff[4] = {0};
+            //init audio parameter
+            sendBuff[0] = ATV_MIC_CHAR_CTL_AUDIO_START;
+            sendBuff[1] = audio_start_reason;
+            sendBuff[2] = U16_LO(google_voice_codec_used);
+            sendBuff[3] = 0x00;        //an audio stream which was initiated by the MIC_OPEN command
+
+            printf("sendBuff:");
+            array_printf(sendBuff,4);
+            bls_att_pushNotifyData(AUDIO_GOOGLE_CTL_DP_H, sendBuff, 4);
+
+            google_mic_enable();
+        }
+    }else if(pw->dat[0] == AUDIO_GOOGLE_CMD_CLOSE){
+        printf("AUDIO_GOOGLE_CMD_CLOSE\n");
+        u8 close_stream_id = pw->dat[1];
+
+        if(verify_stream_id(close_stream_id)) return;
+
+        //close ongoing audio stream
+        ui_enable_mic(0);
+        google_voice_ctl |= FLAG_AUDIO_CLOSE;
+        audio_stop_reason = REASON_MICCLOSE;
+
+    }else if(pw->dat[0] == AUDIO_GOOGLE_CMD_EXTEND){
+        printf("AUDIO_GOOGLE_CMD_EXTEND\n");
+        u8 close_stream_id = pw->dat[1];
+
+        if(verify_stream_id(close_stream_id)) return;
+
+        //fresh the timeout
+        app_audio_transfer_timer = clock_time() | 1;
+    }
+}
+
+/**
+ * @brief       google voice processing function.
+ * @param[in]   p: received RF data
+ * @return      none
+ */
+int app_auido_google_callback(void* p){
+    //u8 sendBuff[20]  = {0};
+    rf_packet_att_data_t *pw = (rf_packet_att_data_t *)p;
+
+    u8 google_command = pw->dat[0];
+
+    printf("google_command:%x\n",google_command);
+
+    if(google_command == AUDIO_GOOGLE_CMD_CAP){
+        u16 voice_ver = (pw->dat[1]<<8) + pw->dat[2];
+        printf("STB google voice ver: 0x%x\n",voice_ver);
+        if(ENABLE_GOOGLE_VOICE_1P0 && voice_ver == GOOGLE_VOICE_VERSION_1P0){
+            printf("GOOGLE_VOICE_VERSION_1P0\n");
+            array_printf(pw->dat,pw->l2cap-3);
+
+            google_voice_ver = 10;
+            //google_voice_para_init();
+            //u8 supported_assistant_models = pw->dat[5];
+            printf("supported_assistant_models:0x%x\n",pw->dat[5]);
+            set_assistant_model(pw->dat[5]);
+        }else{
+            printf("GOOGLE_VOICE_VERSION_0P4\n");
+
+            google_voice_ver = 0x04;
+        }
+        google_voice_ctl |=  FLAG_GOOGLE_CAPS_RESP;
+        google_voice_para_init();
+#ifdef CFG_ATM_SDK
+        bridge_audio_ready_ind(atv_char_ctl_ccc && atv_char_rx_ccc);
+#endif
+    }else{
+        if(google_voice_ver == 10){
+            google_voice_v1p0(pw);
+        }else{
+            google_voice_v0p4(pw);
+        }
+    }
+
+    return 0;
+}
+
+/**
+ * @brief   google command process for google voice v0.4.
+ * @param   none
+ * @return  none
+ */
+void google_cmd_v0p4_proc(){
+
+    if(google_voice_ctl & FLAG_GOOGLE_DPAD_SELECT){
+        //audio stop. google voice auido end
+        ble_sts_t ret;
+        u8 sendData = ATV_MIC_CHAR_CTL_DPAD_SELECT;
+        ret = bls_att_pushNotifyData(AUDIO_GOOGLE_CTL_DP_H, &sendData, 1);
+//        if(ret != BLE_SUCCESS) return;
+//        google_voice_ctl &= ~FLAG_GOOGLE_DPAD_SELECT;
+        if(ret == BLE_SUCCESS)
+            google_voice_ctl &= ~FLAG_GOOGLE_DPAD_SELECT;
+    }
+
+    if(google_voice_ctl & FLAG_AUDIO_CLOSE){
+        //audio stop. google voice auido end
+        printf("google_cmd_v0p4_proc_close\r\n");
+        ble_sts_t ret;
+        u8 sendData = ATV_MIC_CHAR_CTL_AUDIO_STOP;
+        ret = bls_att_pushNotifyData(AUDIO_GOOGLE_CTL_DP_H, &sendData, 1);
+
+        if(ret == BLE_SUCCESS){
+            google_voice_ctl = 0;
+            ui_enable_mic(0);
+        }
+    }
+
+    if(google_voice_ctl & FLAG_GOOGLE_AUDIO_SYNC){
+        //audio sync
+#ifdef CFG_ATM_SDK
+	u8 *p = bridge_audio_read_frame();
+#else
+        int *p = mic_encoder_data_buffer ();
+#endif
+        u16 frame_no;
+        if(p){
+            frame_no = (p[0] <<8) + p[1];
+        }else{
+#ifdef CFG_ATM_SDK
+	    ASSERT_ERR(0);
+	    return;
+#else
+            frame_no = adpcm_sequence_num;
+#endif
+        }
+
+        ble_sts_t ret;
+        u8 sendBuff[3] = {0};
+        sendBuff[0] = 0x0A;
+        sendBuff[1] = U16_HI(frame_no);
+        sendBuff[2] = U16_LO(frame_no);
+        ret = bls_att_pushNotifyData(AUDIO_GOOGLE_CTL_DP_H, sendBuff, 3);
+
+        if(ret == BLE_SUCCESS)
+            google_voice_ctl &= ~FLAG_GOOGLE_AUDIO_SYNC;
+
+    }
+
+    if(google_voice_ctl & FLAG_GOOGLE_OPEN_ERROR){
+        //mic open error.
+        //Timeout1.This is a timeout on the Android TV device.
+        ble_sts_t ret;
+        u8 sendBuff[3] = {0};
+        sendBuff[0] = ATV_MIC_CHAR_CTL_MIC_OPEN_ERROR;
+        sendBuff[1] = U16_HI(ERROR_INVALIED_CODEC);
+        sendBuff[2] = U16_LO(ERROR_INVALIED_CODEC);
+
+        ret  = bls_att_pushNotifyData(AUDIO_GOOGLE_CTL_DP_H, sendBuff, 3);
+        if(ret== BLE_SUCCESS){
+            google_voice_ctl = 0;
+            ui_enable_mic(0);
+        }
+    }
+}
+
+/**
+ * @brief   google command process for google voice v1.0.
+ * @param   none
+ * @return  none
+ */
+
+
+void google_cmd_v1p0_proc(){
+
+    if(!atv_char_rx_ccc && (google_voice_ctl & FLAG_NOTIFY_AUDIO_DATA)){
+        //notifications are disabled while audio data transfer is in progress
+        google_voice_ctl |= FLAG_AUDIO_CLOSE;
+        audio_stop_reason = REASON_DISABLE_CCC;
+    }
+
+    //audio stop
+    if(google_voice_ctl & FLAG_AUDIO_CLOSE){
+        //audio stop. google voice auido end
+        //printf("google_cmd_v1p0_proc_close\r\n");
+
+        u8 send_audio_stop = 1;
+        if(REASON_RELEASE_HTT == audio_stop_reason){
+            // If the voice is stopped by HTT, wait for adpcm buffer to be empty before sending the stop command
+            send_audio_stop = 0;
+
+            // If the adpcm data is not sent within 1 second, send the stop command
+            if(clock_time_exceed(g_delay_send_audio_stop,1000000)){
+                send_audio_stop = 1;
+            }
+
+            // adpcm buffer is empty
+#ifdef CFG_ATM_SDK
+	    u8 *p = bridge_audio_read_frame();
+#else
+            int *p = mic_encoder_data_buffer ();
+#endif
+            if(!p){
+                send_audio_stop = 1;
+            }
+        }
+
+        if(send_audio_stop){
+            ble_sts_t ret;
+            u8 sendBuff[2] = {0};
+            sendBuff[0] = ATV_MIC_CHAR_CTL_AUDIO_STOP;
+            sendBuff[1] = audio_stop_reason;
+
+        ret  = bls_att_pushNotifyData(AUDIO_GOOGLE_CTL_DP_H, sendBuff, 2);
+        printf("google_cmd_v1p0_proc_close ret=%x\r\n",ret);
+        if(ret == BLE_SUCCESS){
+            g_delay_send_audio_stop = 0;
+            printf("ATV_MIC_CHAR_CTL_AUDIO_STOP:0x%x\n",audio_stop_reason);
+            google_voice_ctl = 0;
+            ui_enable_mic(0);
+
+                if(audio_stop_reason == REASON_UPCOMING_AUDIO_START){
+                    google_voice_ctl |= FLAG_GOOGLE_AUDIO_START;
+                }
+            }
+        }
+    }
+
+    //audio start
+    if(google_voice_ctl & FLAG_GOOGLE_AUDIO_START){
+        //audio start. triggered by an upcoming AUDIO_START command;
+
+        google_voice_codec_used = CODEC_USED_16K;
+
+        ble_sts_t ret;
+        u8 sendBuff[4] = {0};
+        sendBuff[0] = ATV_MIC_CHAR_CTL_AUDIO_START;
+        sendBuff[1] = audio_start_reason;
+        sendBuff[2] = U16_LO(google_voice_codec_used);
+        sendBuff[3] = 0x00;        //an audio stream which was initiated by the MIC_OPEN command
+
+        ret  = bls_att_pushNotifyData(AUDIO_GOOGLE_CTL_DP_H, sendBuff, 4);
+
+        if(ret == BLE_SUCCESS){
+            google_voice_ctl &= ~FLAG_GOOGLE_AUDIO_START;
+            //start send audio data
+            google_mic_enable();
+        }
+    }
+
+    //mic open error
+    if(google_voice_ctl & FLAG_GOOGLE_OPEN_ERROR){
+        //mic open error.
+        //Timeout1.This is a timeout on the Android TV device.
+        printf("google_voice_ctl & FLAG_GOOGLE_OPEN_ERROR:%x",mic_open_error_code);
+
+        ble_sts_t ret;
+        u8 sendBuff[3] = {0};
+        sendBuff[0] = ATV_MIC_CHAR_CTL_MIC_OPEN_ERROR;
+        sendBuff[1] = U16_HI(mic_open_error_code);
+        sendBuff[2] = U16_LO(mic_open_error_code);
+
+        ret  = bls_att_pushNotifyData(AUDIO_GOOGLE_CTL_DP_H, sendBuff, 3);
+        if(ret == BLE_SUCCESS){
+            google_voice_ctl = 0;
+            ui_enable_mic(0);
+        }
+    }
+}
+
+/**
+ * @brief   notify CAPS_RESP packet.
+ * @param   none
+ * @return  none
+ */
+void google_get_rsp(void){
+
+    u8 sendBuff[9] = {0};
+    if(google_voice_ver == 10){
+
+        sendBuff[0] = ATV_MIC_CHAR_CTL_CAPS_RESP;
+        sendBuff[1] = U16_HI(GOOGLE_VOICE_VERSION_1P0);     //major version
+        sendBuff[2] = U16_LO(GOOGLE_VOICE_VERSION_1P0);     //minor version
+        sendBuff[3] = CODEC_SUPPORTED_8K16K;                //codecs supported (1)
+        sendBuff[4] = read_assistant_model();               //set assistant interaction model.  on-request,ptt,htt
+        sendBuff[5] = 0x00;                                 //audio frame size (2)
+        sendBuff[6] = read_audio_frame_size();              //audio frame size (2)
+        //sendBuff[7] = (read_audio_frame_size() == 20)?0:1;  //extra configuration (1)
+        extern u8  app_mtu_size;
+        sendBuff[7] = ((read_audio_frame_size()+3) > app_mtu_size)?1:0;       //extra configuration (1)
+        sendBuff[8] = 0x00;                                 //reserved(1)
+
+        }else{
+        sendBuff[0] = ATV_MIC_CHAR_CTL_CAPS_RESP;
+        sendBuff[1] = U16_HI(GOOGLE_VOICE_VERSION_0P4);     //major version
+        sendBuff[2] = U16_LO(GOOGLE_VOICE_VERSION_0P4);     //minor version
+        sendBuff[3] = 0x00;                                 //codecs_supported high
+        sendBuff[4] = CODEC_SUPPORTED_8K;                   //CODEC_SUPPORTED_8K16K;
+        sendBuff[5] = 0x00;                                 //frame lengths high
+        sendBuff[6] = 0x86;                                 //frame lengths low -- 134Byts
+        sendBuff[7] = 0x00;                                 //packet lengths high
+        sendBuff[8] = 0x14;                                 //packet lengths low -- 20 Bytes
+    }
+    ble_sts_t ret;
+    ret = bls_att_pushNotifyData(AUDIO_GOOGLE_CTL_DP_H, sendBuff, 9);
+    printf("google_get_rsp_ret=%x\r\n",ret);
+    if(ret == BLE_SUCCESS){
+        if(google_voice_ver == 10)
+        {
+            printf("read_audio_frame_size():%d\n",sendBuff[6]);
+        }
+        printf("send FLAG_GOOGLE_CAPS_RESP_ver:%d\n",google_voice_ver);
+        google_voice_ctl &= ~FLAG_GOOGLE_CAPS_RESP;
+     }
+}
+
+_attribute_data_retention_ u8 notify_get_rsp_en = 0;
+_attribute_data_retention_ u32 notify_get_rsp_tick = 0;
+_attribute_data_retention_ u32 notify_get_rsp_delay_time = 6000000;
+/**
+ * @brief   google command process at app_audio_task.
+ * @param   none
+ * @return  none
+ */
+void google_cmd_proc(){
+     ble_sts_t ret;
+
+//    if(app_active_remote_timer && clock_time_exceed(app_active_remote_timer, APP_AUDIO_GOOGLE_TIMEOUT1)){
+//        //wait mic open cmd
+//        printf("app_active_remote_timer timeout\n");
+//        app_active_remote_timer = 0;
+//
+//        mic_open_error_code = ERROR_RCU_NOT_ACTIVE;    //google voice v1.0
+//        google_voice_ctl = 0;
+//        google_voice_ctl |= FLAG_GOOGLE_OPEN_ERROR;
+//    }
+
+    if(app_audio_transfer_timer && clock_time_exceed(app_audio_transfer_timer, APP_AUDIO_GOOGLE_TIMEOUT2)){
+        printf("app_audio_transfer_timer timeout\n");
+        ui_enable_mic(0);    //app_audio_disable();
+
+        app_audio_transfer_timer = 0;
+
+        if(google_voice_ctl & FLAG_NOTIFY_AUDIO_DATA){
+            audio_stop_reason = REASON_TIMEOUT;
+            google_voice_ctl |= FLAG_AUDIO_CLOSE;
+        }
+    }
+
+    if(google_voice_ctl & FLAG_GOOGLE_SEARCH){
+        //google voice CHAR_CTL search
+#ifdef CFG_ATM_SDK
+        if (1){
+#else
+        if (blc_ll_getTxFifoNumber() < (14 - 3)){
+#endif
+            printf("sendData = ATV_MIC_CHAR_CTL_SEARCH\n");
+            u8 sendData[2] = {0};
+
+            sendData[0] = ATV_MIC_CHAR_CTL_SEARCH;
+            ret = bls_att_pushNotifyData(AUDIO_GOOGLE_CTL_DP_H, sendData, 1);
+            printf("search 1 ret=%x\r\n",ret);
+
+#ifdef CFG_ATM_SDK
+            google_voice_ctl &= ~FLAG_GOOGLE_SEARCH;
+#else
+            sendData[0] = 0x21;
+            sendData[1] = 0x02;
+            ret = bls_att_pushNotifyData(HID_CONSUME_REPORT_INPUT_DP_H, sendData, 2); //  8 HID_NORMAL_KB_REPORT_INPUT_DP_H
+
+            printf("search 2 ret=%x\r\n",ret);
+
+            sendData[0] = 0x00;
+            sendData[1] = 0x00;
+            ret = bls_att_pushNotifyData (HID_CONSUME_REPORT_INPUT_DP_H, sendData, 2);
+
+            printf("search 3 ret=%x\r\n",ret);
+
+            google_voice_ctl &= ~FLAG_GOOGLE_SEARCH;
+            extern void app_ota_status(u8 status);
+            app_ota_status(0);
+#endif
+        }
+    }
+
+    if(google_voice_ctl & FLAG_GOOGLE_CAPS_RESP){
+
+        if(notify_get_rsp_en)
+        {
+            if(notify_get_rsp_tick && clock_time_exceed(notify_get_rsp_tick,notify_get_rsp_delay_time))
+            {
+                notify_get_rsp_en = 0;
+                notify_get_rsp_tick = 0;
+                notify_get_rsp_delay_time = 6000000;
+                google_get_rsp();
+            }
+        }
+        else
+        {
+            google_get_rsp();
+        }
+    }
+
+    if(google_voice_ver == 10){
+        google_cmd_v1p0_proc();
+    }else{
+        google_cmd_v0p4_proc();
+    }
+}
+
+/**
+ * @brief   delay caps rsp time.
+ * @param   none
+ * @return  none
+ */
+void google_get_rsp_delay(void)
+{
+    if(notify_get_rsp_en)
+    {
+        notify_get_rsp_tick = clock_time()|1;
+        notify_get_rsp_delay_time = 300000;
+    }
+}
+
+void google_reset_rsp_delay(void)
+{
+    notify_get_rsp_delay_time = 12000000;
+}
+
+
+/**
+ * @brief   notify audio data process for google voice v0.4.
+ * @param   none
+ * @return  none
+ */
+void google_voice_data_notify_v0p4_proc(){
+
+    //////////////////////////////////////////////////////////////////
+#ifdef CFG_ATM_SDK
+    u8 *p = bridge_audio_read_frame();
+#else
+    if(blc_ll_getTxFifoNumber() >= (7 + app_audio_send_index)) return;
+    int *p = mic_encoder_data_buffer ();
+#endif
+
+    if(p == 0) return;
+    u8 audio_send_length;
+
+    for(u8 i=0; i<7; i++){
+        if(app_audio_send_index < 6){
+            audio_send_length = 20;
+        }else if(app_audio_send_index == 6){
+            audio_send_length = 14;
+        }else{
+            audio_send_length = 0;
+        }
+
+        if(BLE_SUCCESS == bls_att_pushNotifyData(AUDIO_GOOGLE_RX_DP_H, (u8*)p + app_audio_send_index*20, audio_send_length)){
+            app_audio_send_index++;
+        }else{
+            return ;
+        }
+
+        if(app_audio_send_index == 7){
+            app_audio_send_index = 0;
+#ifdef CFG_ATM_SDK
+	    bridge_audio_sent_frame_ind();
+#else
+            mic_encoder_data_read_ok();
+#endif
+
+            app_audio_sync_serial ++;
+            if(app_audio_sync_serial > 10){
+                app_audio_sync_serial =0;
+                google_voice_ctl |= FLAG_GOOGLE_AUDIO_SYNC;
+            }
+            return ;
+        }
+    }
+}
+
+u8  previous_sampling_rate = U16_LO(CODEC_USED_16K);    //default sampling rate:16k
+u16 previous_seq_no = 0xffff;
+/**
+ * @brief   notify audio data process for google voice v1.0
+ * @param   none
+ * @return  none
+ */
+#ifdef CFG_ATM_SDK
+__FAST
+#endif
+void google_voice_data_notify_v1p0_proc(){
+#ifdef CFG_ATM_SDK
+    u8 *p = bridge_audio_read_frame();
+#else
+    int *p = mic_encoder_data_buffer ();
+#endif
+
+    if(p){
+        //printf("google voice 1p0\n");
+
+        u8 *pd = (u8*)p;
+#ifdef CFG_ATM_SDK
+	audio_sync_t *sync = bridge_audio_get_sync_info();
+	u16 current_seq_no = sync->frame_no;
+	u8 current_sampling_rate = sync->codec;
+#else
+        u16 current_seq_no = (pd[0]<<8) + pd[1];
+        u8  current_sampling_rate = pd[2];
+#endif
+
+        u8 need_buffer_count = 0;
+        u8 send_sync_cmd_flag = 0;
+
+        //check seq no and sampling rate before notify audio data
+        if(current_sampling_rate != previous_sampling_rate){
+            send_sync_cmd_flag |= SAMPLING_CHANGE;
+            need_buffer_count = 1;
+        }
+
+        if((u16)(current_seq_no - previous_seq_no) != 1){
+            send_sync_cmd_flag |= PACKET_LOSS;
+            need_buffer_count = 1;
+        }
+
+        app_audio_sync_serial ++;
+        if(app_audio_sync_serial >= 20){
+            //app_audio_sync_serial = 0;
+            send_sync_cmd_flag |= SYNC_PACKET;
+            need_buffer_count = 1;
+        }
+
+        if(google_voice_ctl & FLAG_GOOGLE_AUDIO_FIRST_SYNC){
+            //printf("FLAG_GOOGLE_AUDIO_FIRST_SYNC\n");
+            google_voice_ctl &= ~FLAG_GOOGLE_AUDIO_FIRST_SYNC;
+            //send_sync_cmd_flag |= FIRST_SYNC;
+            //need_buffer_count = 1;
+            previous_sampling_rate = U16_LO(CODEC_USED_16K);    //default sampling rate:16k
+            previous_seq_no = 0xffff;
+            app_audio_sync_serial = 0;
+            //printf("start rate:0x%x",current_sampling_rate);
+        }
+
+        //adpcm packet: header:6byte, adpcm data:120byte,dummy:2byte
+        need_buffer_count += (VOICE_V1P0_ADPCM_PACKET_LEN - 8)/auido_frame_size;
+
+#ifndef CFG_ATM_SDK
+        if(blc_ll_getTxFifoNumber() >= (14 - need_buffer_count + app_audio_send_index)) return;
+#endif
+
+        //check sync data
+        if(send_sync_cmd_flag && !app_audio_send_index){
+
+            u8 sendBuff[7] = {0};
+            //send sync cmd
+            u32 notify_seq_no = current_seq_no * ((VOICE_V1P0_ADPCM_PACKET_LEN - 8)/auido_frame_size);
+            //printf("notify_seq_no:%d",notify_seq_no);
+
+            sendBuff[0] = ATV_MIC_CHAR_CTL_SYNC;
+            sendBuff[1] = current_sampling_rate;            //The audio codec that will be used for the audio stream after this sync point.
+            sendBuff[2] = (notify_seq_no >> 8) & 0xFF;      //Sequence number of the audio frame
+            sendBuff[3] = notify_seq_no & 0xFF;             //Sequence number of the audio frame
+
+#ifdef CFG_ATM_SDK
+            sendBuff[4] = (sync->pred_val >> 8) & 0xFF;
+            sendBuff[5] = sync->pred_val & 0xFF;
+            sendBuff[6] = sync->step_idx;
+#else
+            sendBuff[4] = pd[3];                            //Predicted ADPCM value.
+            sendBuff[5] = pd[4];                            //Predicted ADPCM value.
+            sendBuff[6] = pd[5];                            //step index (1) Index in ADPCM step size table.
+#endif
+
+            if(send_sync_cmd_flag&FIRST_SYNC){
+#ifndef CFG_ATM_SDK
+                printf("Predicted ADPCM value1:0x%x\n",sendBuff[4]);
+                printf("Predicted ADPCM value2:0x%x\n",sendBuff[5]);
+                printf("step index:0x%x\n",sendBuff[6]);
+                printf("need_buffer_count:0x%x\n",need_buffer_count);
+                printf("(VOICE_V1P0_ADPCM_PACKET_LEN - 8)/auido_frame_size:%d\n",(VOICE_V1P0_ADPCM_PACKET_LEN - 8)/auido_frame_size);
+#endif
+            }
+
+            ble_sts_t ret = bls_att_pushNotifyData(AUDIO_GOOGLE_CTL_DP_H, sendBuff, 7);
+            if(ret == BLE_SUCCESS){
+
+#ifndef CFG_ATM_SDK
+                printf("send_sync_cmd_flag:%d\n",send_sync_cmd_flag);
+                if(send_sync_cmd_flag&SAMPLING_CHANGE) printf("SAMPLING_CHANGE previous_sampling_rate:%d_current:%d\n",previous_sampling_rate,current_sampling_rate);
+                if(send_sync_cmd_flag&PACKET_LOSS) printf("PACKET_LOSS previous_seq_no:%d_current:%d\n",previous_seq_no,current_seq_no);
+#endif
+//                array_printf(sendBuff,7);
+
+                app_audio_send_index++;
+            }else{
+                return ;
+            }
+        }
+
+        //send audio data
+        for(u8 i=0; i< ((VOICE_V1P0_ADPCM_PACKET_LEN - 8)/auido_frame_size); i++){
+
+            u8 audio_addr_shift = app_audio_send_index - (send_sync_cmd_flag==0)?0:1;
+
+//            printf("send_sync_cmd_flag:%d\n",send_sync_cmd_flag);
+//            printf("audio_addr_shift:%d\n",audio_addr_shift);
+#ifdef CFG_ATM_SDK
+	    if(BLE_SUCCESS == bls_att_pushNotifyData(AUDIO_GOOGLE_RX_DP_H, pd, auido_frame_size)){
+#else
+            if(BLE_SUCCESS == bls_att_pushNotifyData(AUDIO_GOOGLE_RX_DP_H, pd + 6 + audio_addr_shift *auido_frame_size, auido_frame_size)){
+#endif
+                app_audio_send_index++;
+//                array_printf(pd + 6 + audio_addr_shift *auido_frame_size,20);
+            }else{
+                return;
+            }
+
+
+            if(app_audio_send_index >= need_buffer_count){
+//                printf("need_buffer_count:0x%x\n",need_buffer_count);
+//                printf("app_audio_send_index:0x%x\n",app_audio_send_index);
+                app_audio_send_index = 0;
+                //printf("notify data:");
+                //array_printf(pd,10);
+
+                app_audio_sync_serial = 0;
+
+#ifdef CFG_ATM_SDK
+		bridge_audio_sent_frame_ind();
+#else
+                mic_encoder_data_read_ok();
+#endif
+
+                previous_sampling_rate = current_sampling_rate;
+                previous_seq_no = current_seq_no;
+
+                return;
+            }
+        }
+    }
+}
+
+/**
+ * @brief   notify audio data process.
+ * @param   none
+ * @return  none
+ */
+void google_voice_data_notify_proc(){
+    //send voice data
+    if( google_voice_ver == 10){
+        google_voice_data_notify_v1p0_proc();
+    }else{
+        //google voice version error
+        google_voice_data_notify_v0p4_proc();
+    }
+}
+
+/**
+ * @brief   google voice task at main loop.
+ * @param   none
+ * @return  none
+ */
+void app_audio_task(void){
+
+    if(app_active_remote_timer && clock_time_exceed(app_active_remote_timer, APP_AUDIO_GOOGLE_TIMEOUT1)){
+        //wait mic open cmd
+        printf("app_active_remote_timer timeout\n");
+        app_active_remote_timer = 0;
+        flag_active_mic_open = 0;
+    }
+
+    if(!google_voice_ctl) return;
+
+    if(device_in_connection_state)
+        google_cmd_proc();
+
+    if(google_voice_ctl & FLAG_DELAY_NOTIFY){
+
+        if(clock_time_exceed(app_audio_start_delay,30*1000)){
+
+            google_voice_ctl &= ~FLAG_DELAY_NOTIFY;
+            audio_set_mute_pga(1);
+            printf("start notify audio data\n");
+            if(google_voice_ver == 10){
+                if(google_voice_codec_used == CODEC_USED_16K){
+                    printf("init adpcm unit size: to 240\n");
+                    google_voice_pcm_sample_packet = VOICE_V1P0_ADPCM_UNIT_SIZE;
+                }else if(google_voice_codec_used == CODEC_USED_8K){
+                    google_voice_pcm_sample_packet = VOICE_V1P0_ADPCM_UNIT_SIZE*2;
+                }
+            }else{
+                if(google_voice_codec_used == CODEC_USED_16K){
+                    printf("init adpcm unit size: to 256\n");
+                    google_voice_pcm_sample_packet = VOICE_V0P4_ADPCM_UNIT_SIZE;
+                }else if(google_voice_codec_used == CODEC_USED_8K){
+                    google_voice_pcm_sample_packet = VOICE_V0P4_ADPCM_UNIT_SIZE*2;
+                }
+            }
+        }
+        return;
+    }
+
+    if((google_voice_ctl & FLAG_NOTIFY_AUDIO_DATA) == 0) return;
+    prevent_repeat_trigger_on_request_tick = 0;
+    proc_mic_encoder();
+
+    google_voice_data_notify_proc();
+}
+
+#else
+
+#endif
diff --git a/application/audio/gl_audio.h b/application/audio/gl_audio.h
new file mode 100644
index 0000000..278c76e
--- /dev/null
+++ b/application/audio/gl_audio.h
@@ -0,0 +1,182 @@
+/******************************************************************************
+ * @file     gl_audio.h
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+
+#ifndef GL_AUDIO_H_
+#define GL_AUDIO_H_
+
+#ifndef CFG_ATM_SDK
+#include "audio_config.h"
+#endif
+
+#if defined(CFG_ATM_SDK) || (TL_AUDIO_MODE == TL_AUDIO_RCU_ADPCM_GATT_GOOGLE)
+
+#define ENABLE_GOOGLE_VOICE_1P0             1
+
+#define FLAG_NOTIFY_AUDIO_DATA              BIT(15) //notify audio data(0: disable , 1: enable)
+#define FLAG_AUDIO_CLOSE                    BIT(14) //
+#define FLAG_DELAY_NOTIFY                   BIT(13) //
+
+//google voice v0.4e
+#define FLAG_SEARCH_KEY                     BIT(0) //SEARCH_KEY(0x0c,0x221)
+#define FLAG_GOOGLE_SEARCH                  BIT(1) //Search(CHAR_CTL:0x08)
+#define FLAG_GOOGLE_OPEN_ERROR              BIT(2) //mic_open_error.(CHAR_CTL:0x0c,error_code(2))
+#define FLAG_GOOGLE_AUDIO_START             BIT(3) //auido_start.(CHAR_CTL:0x04)
+#define FLAG_GOOGLE_DPAD_SELECT             BIT(4) //DPAD Select key(OK button).(CHAR_CTL:0x07)
+
+#define FLAG_GOOGLE_AUDIO_SYNC              BIT(5) //auido_sync.(CHAR_CTL:0x0A,frame number(2))
+
+#define FLAG_GOOGLE_CAPS_RESP               BIT(6)
+
+//google voice v1.0
+#define FLAG_GOOGLE_START_SEARCH            FLAG_GOOGLE_SEARCH    //cmd same as v0.4e
+#define FLAG_GOOGLE_AUDIO_FIRST_SYNC        BIT(11)             //used for send sync cmd before start to send audio data
+
+
+/**************************************************************
+ ******************   google voice v0.4   *********************
+ **************************************************************/
+
+#define APP_AUDIO_GOOGLE_TIMEOUT1           60000000  //60s  //1000000 // 1s
+#define APP_AUDIO_GOOGLE_TIMEOUT2           15000000 // 15s
+
+#define PLAYBACK_MODE_THRESHOLD1            4    //16k audio change to 8k audio
+#define PLAYBACK_MODE_THRESHOLD2            2    //8k audio change to 16k audio
+#define PLAYBACK_MODE_HOLD_TIME             600    //60*10 =600ms
+
+#define CAPTURE_MODE_THRESHOLD1             6
+#define CAPTURE_MODE_THRESHOLD2             2
+#define CAPTURE_MODE_HOLD_TIME              24    //24*10 =240ms
+
+#define AUDIO_GOOGLE_CMD_CAP                0x0A
+#define AUDIO_GOOGLE_CMD_OPEN               0x0C
+#define AUDIO_GOOGLE_CMD_CLOSE              0x0D
+#define AUDIO_GOOGLE_CMD_EXTEND             0x0E
+
+
+#define ATV_MIC_CHAR_CTL_CAPS_RESP          0x0B
+#define ATV_MIC_CHAR_CTL_AUDIO_START        0x04
+#define ATV_MIC_CHAR_CTL_AUDIO_STOP         0x00
+#define ATV_MIC_CHAR_CTL_SYNC               0x0A
+#define ATV_MIC_CHAR_CTL_MIC_OPEN_ERROR     0x0C
+#define ATV_MIC_CHAR_CTL_SEARCH             0x08
+#define ATV_MIC_CHAR_CTL_DPAD_SELECT        0x07
+
+#define GOOGLE_VOICE_VERSION_1P0            0x0100
+#define GOOGLE_VOICE_VERSION_0P4            0x0004
+
+#define CODEC_USED_8K                       0x0001
+#define CODEC_USED_16K                      0x0002
+#define CODEC_USED_OPUS                     0x0004      //not support
+
+#define CODEC_SUPPORTED_8K                  0x01        //ADPCM,8khz/16bit
+#define CODEC_SUPPORTED_16K                 0x02        //ADPCM,16khz/16bit(default)
+#define CODEC_SUPPORTED_8K16K               0x03        //ADPCM (8khz/16bit & 16khz/16bit)
+#define CODEC_SUPPORTED_8KOPUS              0x05        //Opus and ADPCM 8khz/16bit
+#define CODEC_SUPPORTED_8K16KOPUS           0x07        //Opus and ADPCM (8khz/16bit & 16khz/16bit)
+
+#define ASSISTANT_SUPPORTED_ON_REQUEST      0x00        //only On-request model is supported;
+#define ASSISTANT_SUPPORTED_PTT             0x01        //Press-to-Talk and On-request models are supported;
+#define ASSISTANT_SUPPORTED_HTT             0x03        //Hold-to-Talk, Press-to-Talk and On-request models are supported.
+
+/**************************************************************
+ ******************   google voice v1.0   *********************
+ **************************************************************/
+#define FIRST_SYNC                          BIT(0)
+#define SAMPLING_CHANGE                     BIT(1)
+#define PACKET_LOSS                         BIT(2)
+#define SYNC_PACKET                         BIT(3)
+typedef enum {
+    REASON_MICCLOSE                         = 0x00,
+    REASON_RELEASE_HTT                      = 0x02,
+    REASON_UPCOMING_AUDIO_START             = 0x04,
+    REASON_TIMEOUT                          = 0x08,
+    REASON_DISABLE_CCC                      = 0x10,
+    REASON_OTHERS                           = 0x80,
+}AudioStop_TypeDef;
+
+typedef enum {
+    REASON_MICOPEN                          = 0x00,
+    REASON_PTT                              = 0x01,
+    REASON_HTT                              = 0x03,
+}AudioStartReason_TypeDef;
+
+typedef enum {
+    PLAYBACK_MODE                           = 0x00,
+    CAPTURE_MODE                            = 0x01,
+}MicOpenMode_TypeDef;
+
+
+typedef enum {
+     //google voice v0.4e
+    ERROR_INVALIED_CODEC                    = 0x0F01,
+    //google voice v1.0
+    ERROR_MIC_ALREADY_OPEN                  = 0x0F01,
+    ERROR_RCU_NOT_ACTIVE                    = 0x0F02,
+    ERROR_CCC_NOT_ENABLED                   = 0x0F03,
+    ERROR_ONGOING_PTT_HTT                   = 0x0F04,
+    ERROR_INTERNAL_ERROR                    = 0x0FFF,
+}MicOpenError_TypeDef;
+
+//parameter
+extern u16 google_voice_ctl;
+
+extern u8  google_voice_ver;
+extern u16 google_voice_codec_used;
+extern u16 google_voice_packet_length;
+extern u16 google_voice_pcm_sample_packet;
+
+extern u8  audio_start_reason;
+extern u8  audio_stop_reason;
+extern u8  stream_id;
+
+extern u8  mic_open_mode;
+
+extern u16 atv_char_ctl_ccc;
+extern u16 atv_char_rx_ccc;
+
+extern u8  enable_rsp_gaps_rsp;
+
+extern u8 notify_get_rsp_en;
+extern u32 notify_get_rsp_tick;
+extern u32 g_delay_send_audio_stop;
+
+void google_voice_on_request();
+void google_voice_dpad_select();
+u8 app_audio_key_start(u8 start_reason);
+void google_voice_start();
+void active_mic_open();
+
+int app_auido_google_callback(void* p);
+
+u8 read_audio_frame_size();
+void set_audio_frame_size(u8 frame_size);
+
+void app_audio_task(void);
+extern void google_get_rsp_delay(void);
+
+#endif
+
+#endif /* GL_AUDIO_H_ */
diff --git a/platform/atm2/ATM22xx-x1x/driver/atm_gpio/atm_gpio.h b/platform/atm2/ATM22xx-x1x/driver/atm_gpio/atm_gpio.h
new file mode 100644
index 0000000..7a9d647
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/driver/atm_gpio/atm_gpio.h
@@ -0,0 +1,198 @@
+/*
+ *-----------------------------------------------------------------------------
+ * The confidential and proprietary information contained in this file may
+ * only be used by a person authorised under and to the extent permitted
+ * by a subsisting licensing agreement from ARM Limited.
+ *
+ *            (C) COPYRIGHT 2010-2013 ARM Limited.
+ *                ALL RIGHTS RESERVED
+ *
+ * This entire notice must be reproduced on all copies of this file
+ * and copies of this file may only be made by a person if such person is
+ * permitted to do so under the terms of a subsisting license agreement
+ * from ARM Limited.
+ *
+ *      SVN Information
+ *
+ *      Checked In          : $Date: 2012-05-28 18:02:18 +0100 (Mon, 28 May 2012) $
+ *
+ *      Revision            : $Revision: 210377 $
+ *
+ *      Release Information : Cortex-M System Design Kit-r1p0-00rel0
+ *-----------------------------------------------------------------------------
+ */
+/*************************************************************************
+ * @file     atm_gpio.h
+ * @brief    ATM GPIO Device Driver Header File
+ * Copyright (C) Atmosic 2019-2020
+ ******************************************************************************/
+
+/** @addtogroup ATM_GPIO_Driver_definitions
+  This file defines Atmosic GPIO Driver functions.
+  @{
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// The atm_gpio error code
+typedef enum atm_gpio_err_s {
+    /// No Error
+    ATM_GPIO_NO_ERR,
+    /// GPIO invalid
+    ATM_GPIO_ERR_INVALID,
+    /// GPIO unconfigured
+    ATM_GPIO_ERR_UNCFG
+} atm_gpio_err_t;
+
+  /**
+   * @brief Sets up internal config for use as GPIO
+   * This function needs to be called prior to any GPIO configuration.
+   * @param[in] gpio pin number
+   */
+
+ void atm_gpio_setup(uint8_t gpio);
+
+  /**
+   * @brief Set GPIO PIN as input.
+   * @param[in] gpio pin number
+   */
+
+ void atm_gpio_set_input(uint8_t gpio);
+
+  /**
+   * @brief Clear GPIO PIN as input.
+   * @param[in] gpio pin number
+   */
+
+ void atm_gpio_clear_input(uint8_t gpio);
+
+  /**
+   * @brief Set GPIO PIN as output.
+   * @param[in] gpio pin number
+   */
+
+ void atm_gpio_set_output(uint8_t gpio);
+
+  /**
+   * @brief Clear GPIO PIN as output.
+   * @param[in] gpio pin number
+   */
+
+ void atm_gpio_clear_output(uint8_t gpio);
+
+  /**
+   * @brief Set GPIO PIN pullup.
+   * @param[in] gpio pin number
+   */
+
+ void atm_gpio_set_pullup(uint8_t gpio);
+
+  /**
+   * @brief Clear GPIO PIN pullup.
+   * @param[in] gpio pin number
+   */
+
+ void atm_gpio_clear_pullup(uint8_t gpio);
+
+  /**
+   * @brief Read GPIO Interrupt Status.
+   * @param[in] gpio pin number
+   */
+
+ bool atm_gpio_read_int_status(uint8_t gpio);
+
+  /**
+   * @brief Clear GPIO PIN Interrupt Status.
+   * @param[in] gpio pin number
+   */
+
+ void atm_gpio_clear_int_status(uint8_t gpio);
+
+  /**
+   * @brief Enable GPIO PIN Interrupt.
+   * @param[in] gpio pin number
+   */
+
+ void atm_gpio_set_int_enable(uint8_t gpio);
+
+  /**
+   * @brief Disable GPIO PIN Interrupt.
+   * @param[in] gpio pin number
+   */
+
+ void atm_gpio_set_int_disable(uint8_t gpio);
+
+  /**
+   * @brief Setup GPIO PIN Interrupt as high level.
+   * @param[in] gpio pin number
+   */
+
+ void atm_gpio_int_set_high(uint8_t gpio);
+
+  /**
+   * @brief Setup GPIO PIN Interrupt as rising edge.
+   * @param[in] gpio pin number
+   */
+
+ void atm_gpio_int_set_rising(uint8_t gpio);
+
+  /**
+   * @brief Setup GPIO PIN Interrupt as low level.
+   * @param[in] gpio pin number
+   */
+
+ void atm_gpio_int_set_low(uint8_t gpio);
+
+  /**
+   * @brief Setup GPIO PIN Interrupt as falling edge.
+   * @param[in] gpio pin number
+   */
+
+ void atm_gpio_int_set_falling(uint8_t gpio);
+
+  /**
+   * @brief Setup GPIO PIN Interrupt as high or low level.
+   * @param[in] gpio pin number
+   * @return Previous Interrupt edge configure.
+   */
+
+ bool atm_gpio_toggle_int_edge(uint8_t gpio);
+
+  /**
+   * @brief Write GPIO PIN output (1: high, 0: low)
+   * @param[in] gpio pin number
+   * @param[in] value (0/1)
+   */
+
+ void atm_gpio_write(uint8_t gpio, bool value);
+
+  /**
+   * @brief Read GPIO PIN.
+   * @param[in] gpio pin number
+   */
+
+ bool atm_gpio_read_gpio(uint8_t gpio);
+
+  /**
+   * @brief Toggle GPIO PIN.
+   * @param[in] gpio pin number
+   * @return GPIO pin value after toggling.
+   */
+ bool atm_gpio_toggle(uint8_t gpio);
+
+  /**
+   * @brief GPIO pin validation.
+   * @param[in] gpio pin number
+   * @return Error code (@ref atm_gpio_err_t)
+   */
+ uint8_t atm_gpio_validate_gpio(uint8_t gpio);
+
+#ifdef __cplusplus
+}
+#endif
+
+  /*@}*/ /* end of group ATM_GPIO_Driver_definitions Atmosic GPIO Driver definitions */
diff --git a/platform/atm2/ATM22xx-x1x/driver/atm_pm/atm_pm.h b/platform/atm2/ATM22xx-x1x/driver/atm_pm/atm_pm.h
new file mode 100644
index 0000000..fbab226
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/driver/atm_pm/atm_pm.h
@@ -0,0 +1,120 @@
+/*******************************************************************************
+ *
+ * @file atm_pm.h
+ *
+ * @brief Power wakelock manager
+ *
+ * Copyright (C) Atmosic 2020
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_DEV_PM Power managerment
+ * @ingroup DRIVERS
+ * @brief ATM power managerment driver
+ *
+ * This module contains the necessary functions to control the power modes
+ *
+ * @{
+ *******************************************************************************
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Lock type of low power mode
+typedef enum {
+    /// Sleep mode
+    PM_LOCK_SLEEP,
+    /// Retention mode
+    PM_LOCK_RETENTION,
+    /// Hibernation mode
+    PM_LOCK_HIBERNATE,
+    PM_LOCK_TYPE_MAX,
+} pm_lock_type_e;
+
+/// Lock identifier
+typedef struct {
+    /// Lock id
+    uint32_t id;
+    /// Lock type
+    pm_lock_type_e type;
+} pm_lock_id_t;
+
+/**
+ *******************************************************************************
+ * @brief Allocate lock identifier with specified id
+ * @param[in] id Identifier of specific lock and id.
+ * @param[in] type Type of low power to be manipulated.
+ *******************************************************************************
+ */
+bool atm_pm_realloc(pm_lock_id_t id, pm_lock_type_e type);
+
+/**
+ *******************************************************************************
+ * @brief Allocate lock identifier.
+ * @param[in] type Type of low power to be manipulated.
+ * @return Identifier of specific lock.
+ *******************************************************************************
+ */
+pm_lock_id_t atm_pm_alloc(pm_lock_type_e type);
+
+/**
+ *******************************************************************************
+ * @brief Free allocated lock
+ * @param[in] id Identifier of specific lock and id.
+ *******************************************************************************
+ */
+void atm_pm_free(pm_lock_id_t id);
+
+/**
+ *******************************************************************************
+ * @brief Lock specific power mode
+ * @param[in] index Lock index
+ *******************************************************************************
+ */
+void atm_pm_lock(pm_lock_id_t index);
+
+/**
+ *******************************************************************************
+ * @brief Unlock specific power mode
+ * @param[in] index Lock index
+ *******************************************************************************
+ */
+void atm_pm_unlock(pm_lock_id_t index);
+
+/**
+ *******************************************************************************
+ * @brief Print wakelocks
+ *******************************************************************************
+ */
+void atm_pm_lock_info(void);
+
+/**
+ *******************************************************************************
+ * @brief Set restart time from hibernate
+ * @param[in] restart_time Hibernation time in centisec.
+ *******************************************************************************
+ */
+void atm_pm_set_hib_restart_time(uint32_t restart_time);
+
+/**
+ *******************************************************************************
+ * @brief Set function of atm_pm replacement vector of hibernate.
+ * @param[in] cb Function of replacement vector.
+ * @note The cb should be placed in RAM using __FAST.
+ *******************************************************************************
+ */
+void atm_pm_set_hibernate_cb(rep_vec_fn__ret_bool__int32_t__uint32_t__t cb);
+
+#ifdef __cplusplus
+}
+#endif
+
+///@}
+
diff --git a/platform/atm2/ATM22xx-x1x/driver/atm_vkey/atm_vkey.h b/platform/atm2/ATM22xx-x1x/driver/atm_vkey/atm_vkey.h
new file mode 100644
index 0000000..cc84616
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/driver/atm_vkey/atm_vkey.h
@@ -0,0 +1,898 @@
+/**
+ *******************************************************************************
+ *
+ * @file atm_vkey.h
+ *
+ * @brief Virtual key event modeling
+ *
+ * Copyright (C) Atmosic 2021-2023
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+#include "co_math.h"
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_DEV_VKEY Virtual key models
+ * @ingroup DRIVERS
+ * @brief ATM virtual key handling module
+ *
+ * This module contains the necessary procedure to deal with keys based user
+ * events. In general, application registers interesting events initially and
+ * provids virtual key number with pressed(or released) information when user
+ * operated via some physical input like key matrixes and gpio buttons. If some
+ * event condition matched, callback function which was registered will be called.
+ *
+ * ## Register event table
+ * The Application could define preferred key events by atm_vk_reg_t type and
+ * form them as atm_vk_reg_t array table. Each array entry could be easily
+ * declared by macro such as @ref VKEY_CLICK, @ref VKEY_DB_CLICK, and so on.
+ * By calling @ref atm_vkey_add_table function, application could add the event
+ * table into atm_vkey module. Application could add many event tables and each
+ * table adding would return a handle to application.
+ *
+ * Below is two sets of event array registered in a HID keyboard example:
+ * @code
+ * // Key event on connected state
+ * static const atm_vk_reg_t kbd_conn_vkeys[] = {
+ *     VKEY_DOWN_FIRST(kbd_send_rpt, atm_vk_any),
+ *     VKEY_DOWN_MORE (kbd_send_rpt_more, atm_vk_any),
+ *     VKEY_UP_INTER  (kbd_send_rpt_more, atm_vk_any),
+ *     VKEY_UP_LAST   (kbd_send_rpt, atm_vk_any),
+ *     VKEY_HOLD_1KEY (kbd_hold_test1, NULL, 1000, VK_FN),
+ *     VKEY_HOLD_2KEY (kbd_hold_test2, NULL, 1000, VK_FN, VK_F1),
+ *     VKEY_HOLD_1KEY_CLICK(kbd_clear_all_bond, VK_U, VK_FN),
+ *     VKEY_HOLD_2KEY_CLICK(kbd_enter_rftest, VK_ENTER, VK_FN, VK_F1),
+ * };
+ *
+ * // Key event on disconnected state
+ * static const atm_vk_reg_t kbd_unconn_vkeys[] = {
+ *     VKEY_DOWN_FIRST(kbd_save_key, atm_vk_any),
+ *     VKEY_DOWN_MORE (kbd_save_key_more, atm_vk_any),
+ *     VKEY_UP_INTER  (kbd_save_key_more, atm_vk_any),
+ *     VKEY_UP_LAST   (kbd_save_key, atm_vk_any),
+ *     VKEY_HOLD_1KEY (kbd_hold_test1, NULL, 1000, VK_FN),
+ *     VKEY_HOLD_2KEY (kbd_hold_test2, NULL, 1000, VK_FN, VK_F1),
+ *     VKEY_HOLD_1KEY_CLICK(kbd_clear_all_bond, VK_U, VK_FN),
+ *     VKEY_HOLD_2KEY_CLICK(kbd_enter_rftest, VK_ENTER, VK_FN, VK_F1),
+ * };
+ *
+ * ...
+ *
+ * // Register events for connected state
+ * vkey_handles[0] = atm_vkey_add_table(kbd_unconn_vkeys,
+ *     ARRAY_LEN(kbd_unconn_vkeys), &mmi_vkey_ctx);
+ * // Register events for disconnected state
+ * vkey_handles[1] = atm_vkey_add_table(kbd_conn_vkeys,
+ *     ARRAY_LEN(kbd_conn_vkeys), &mmi_vkey_ctx);
+ * @endcode
+ *
+ * ## Feed virtual key
+ * When application was triggered by user input, it could use @ref atm_vkey_feed
+ * to provide the virtual key index and its pressed or release state.
+ *
+ * Below is the example of feeding virtual key into atm_vkey module:
+ * @code
+ *
+ * // key matrix callback function
+ * static void key_matrix_event(bool pressed, uint32_t idx)
+ * {
+ *     switch (atm_asm_get_current_state(MMI_S_TBL_IDX)) {
+ *         // Feed key when state is disconnected
+ *         case MMI_S_BOOTED:
+ *         case MMI_S_INITING:
+ *         case MMI_S_IDLE: {
+ *             atm_vkey_feed(vkey_handles[0], idx, pressed);
+ *         } break;
+ *         ...
+ *         // Feed key when state is connected
+ *         case MMI_S_HID_ONLY: {
+ *             atm_vkey_feed(vkey_handles[1], idx, pressed);
+ *         } break;
+ *           ...
+ *      }
+ * }
+ * @endcode
+ *
+ * @{
+ *
+ *******************************************************************************
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef ATM_VKEY_MAX
+#define ATM_VKEY_MAX 32
+#endif
+
+/**
+ *******************************************************************************
+ * @brief Create double click event entry.
+ * The entry is part of a @ref atm_vk_reg_t array which is used to
+ * registered into @ref atm_vkey_add_table function.
+ * @param[in] fn Callback function
+ * @ref atm_vk_dck_reg_t.cb
+ * @param[in] vkey Key index to monitor. @ref atm_vk_dck_reg_t.vkey
+ * @param[in] max_ms Maximal triggered interval within two clicks.
+ * @ref atm_vk_dck_reg_t.max_ms
+ *
+ * Here is the example of monitoring double click events on key index x or
+ * y while the time between two clicks is shorter than 100 milliseconds:
+ * - Method one:
+ * @code
+ *
+ * // Handler for double click event
+ * static void vkey_any_dbclick(atm_vk_dck_evt_t *evt, void const *ctx)
+ * {
+ *       DEBUG_TRACE("Key (%03u) double clicked", evt->vkey);
+ *
+ *       if (evt->vkey == x) {
+ *           // Doing things when key x was double clicked
+ *            ...
+ *       } else if (evt->vkey == y) {
+ *           // Doing things when key y was double clicked
+ *           ...
+ *       }
+ * }
+ *
+ * // Key event array
+ * static const atm_vk_reg_t key_event_array[] = {
+ *  ...
+ *  VKEY_DB_CLICK(vkey_any_dbclick, atm_vk_any, 100),
+ *  ...
+ * };
+ * @endcode
+ * - Method two:
+ * @code
+ *
+ * // Handler for double click event of key 3
+ * static void vkey_x_dbclick(atm_vk_dck_evt_t *evt, void const *ctx)
+ * {
+ *       DEBUG_TRACE("Key (%03u) double clicked", evt->vkey);
+ *       // Doing things when key x was double clicked
+ *       ...
+ * }
+ *
+ * // Handler for double click event of key y
+ * static void vkey_y_dbclick(atm_vk_dck_evt_t *evt, void const *ctx)
+ * {
+ *       DEBUG_TRACE("Key (%03u) double clicked", evt->vkey);
+ *       // Doing things when key y was double clicked
+ *       ...
+ * }
+ *
+ * // Key event array
+ * static const atm_vk_reg_t key_event_array[] = {
+ *  ...
+ *  VKEY_DB_CLICK(vkey_x_dbclick, x, 100),
+ *  VKEY_DB_CLICK(vkey_y_dbclick, y, 100),
+ *  ...
+ * };
+ * @endcode
+ *******************************************************************************
+ */
+#define VKEY_DB_CLICK(fn, vkey, max_ms) { \
+    atm_vk_db_click, .db_click = {fn, vkey, max_ms} \
+}
+
+/**
+ *******************************************************************************
+ * @brief Create click event entry.
+ * The entry is part of a @ref atm_vk_reg_t array which is used to
+ * registered into @ref atm_vkey_add_table function.
+ * @param[in] fn Callback function
+ * @ref atm_vk_ck_reg_t.cb
+ * @param[in] vkey Key index to monitor. @ref atm_vk_ck_reg_t.vkey
+ * @param[in] min_ms Minimal triggered interval within up and down.
+ * @ref atm_vk_ck_reg_t.min_ms
+ * @param[in] max_ms Maximal triggered interval within up and down.
+ * @ref atm_vk_ck_reg_t.max_ms
+ *
+ * Here is the example of monitoring click event on key index x with click interval
+ * within 50 to 100 millisecond and 500 to 1000 millisecond correspondingly:
+ * - Method one
+ * @code
+ * // Handler for key x quick click event
+ * static void vkey_x_quick_click(atm_vk_ck_evt_t *evt, void const *ctx)
+ * {
+ *      // evt->vkey shall be x
+ *      // evt->time_ms shall be from 50 to 100.
+ *      DEBUG_TRACE("Key (%03u) quick clicked in %ld ms", evt->vkey, evt->time_ms);
+ *      // Do things of quick clicking
+ *      ...
+ *  }
+ *
+ * // Handler for key x slow click event
+ * static void vkey_x_slow_click(atm_vk_ck_evt_t *evt, void const *ctx)
+ * {
+ *      // evt->vkey shall be x
+ *      // evt->time_ms shall be from 500 to 1000.
+ *      DEBUG_TRACE("Key (%03u) slow clicked in %ld ms", evt->vkey, evt->time_ms);
+ *      // Do things of slow clicking
+ *      ...
+ *  }
+ *
+ * // Key event array
+ * static const atm_vk_reg_t key_event_array[] = {
+ *  ...
+ *  VKEY_CLICK(vkey_3_quick_click, x, 50, 100),
+ *  ...
+ *  VKEY_CLICK(vkey_3_slow_click, x, 500, 1000),
+ *  ...
+ * };
+ * @endcode
+ * - Method two
+ * @code
+ * // Handler for key x quick click event
+ * static void vkey_x_click(atm_vk_ck_evt_t *evt, void const *ctx)
+ * {
+ *      // evt->vkey shall be x
+ *      // evt->time_ms shall be from 50 to 1000.
+ *      DEBUG_TRACE("Key (%03u) clicked in %ld ms", evt->vkey, evt->time_ms);
+ *      if (evt->time_ms <= 100) {
+ *          // Do things of quick clicking
+ *          ...
+ *      } else if(evt->time_ms >= 500) {
+ *          // Do things of slow clicking
+ *          ...
+ *      }
+ *  }
+ *
+ *
+ * // Key event array
+ * static const atm_vk_reg_t key_event_array[] = {
+ *  ...
+ *  VKEY_CLICK(vkey_x_click, x, 50, 1000),
+ *  ...
+ * };
+ * @endcode
+ *******************************************************************************
+ */
+#define VKEY_CLICK(fn, vkey, min_ms, max_ms) { \
+    atm_vk_click, .click = {fn, vkey, min_ms, max_ms} \
+}
+
+/**
+ *******************************************************************************
+ * @brief Create hold click event entry.
+ * The entry is part of a @ref atm_vk_reg_t array which is used to
+ * registered into @ref atm_vkey_add_table function.
+ * @param[in] fn Callback function
+ * @ref atm_vk_hc_reg_t.cb
+ * @param[in] vkey Virtual key index for clicking monitor.
+ * @param[in] ... Held keys' mask.
+ * @note VKEY_HOLD_CLICK don't support ATM_MASK_ANY
+ *
+ * Here is the example of monitoring click events on key index x clicking with
+ * key indexes a,b and c (where a < 32, b < 32, 32 < c < 64) held and key index
+ * y clicking with key index d (where d < 32) held:
+ * @code
+ *
+ * // Handler for key index x clicking with key indexes a,b and c held.
+ * static void vkey_x_click_in_abc(atm_vk_hc_evt_t *evt, void const *ctx)
+ * {
+ *      // evt->vkey shall be x
+ *      DEBUG_TRACE("Key (%03u) clicked", evt->vkey);
+ *      // evt->held.mask[0] should equal to  (1 << a) | (1 << b)
+ * 	DEBUG_TRACE("Key held mask[0] = %l#x", evt->held.mask[0]);
+ *      // evt->held.mask[1] should equal to  (1 << (c-32))
+ * 	DEBUG_TRACE("Key held mask[1] = %l#x", evt->held.mask[1]);
+ *  }
+ *
+ * // Handler for key index y click with key index d held.
+ * static void vkey_y_click_in_d(atm_vk_hc_evt_t *evt, void const *ctx)
+ * {
+ *      // evt->vkey will be y
+ *      DEBUG_TRACE("Key (%03u) clicked", evt->vkey);
+ *      // evt->held.mask[0] should equal to  (1 << d)
+ * 	DEBUG_TRACE("Key held mask[0] = %l#x", evt->held.mask[0]);
+ *  }
+ *
+ * // Key event array
+ * static const atm_vk_reg_t key_event_array[] = {
+ *  ...
+ *  VKEY_HOLD_CLICK(vkey_x_click_in_abc, x, (1 << a) | (1 << b), (1 << (c - 32))),
+ *  ...
+ *  VKEY_HOLD_CLICK(vkey_y_click_in_d, y, (1 << d)),
+ *  ...
+ * };
+ * @endcode
+ *******************************************************************************
+ */
+#define VKEY_HOLD_CLICK(fn, vkey, ...) { \
+    atm_vk_hold_click, .hold_click = {fn, vkey, {__VA_ARGS__}} \
+}
+
+/**
+ *******************************************************************************
+ * @brief Create hold click event entry with 1 key holding.
+ * The entry is part of a @ref atm_vk_reg_t array which is used to
+ * registered into @ref atm_vkey_add_table function. This is convenient version
+ * of @ref VKEY_HOLD_CLICK with 1 key holding.
+ * @param[in] fn Callback function
+ * @ref atm_vk_hc_reg_t.cb
+ * @param[in] vkey Virtual key index for clicking monitor.
+ * @param[in] mk Virtual key index for holding.
+ *
+ * Here is the example of monitoring click event on key index x clicking with
+ * key index a held:
+ * @code
+ *
+ * // Handler for key x click with key index a held.
+ * static void vkey_x_click_with_a(atm_vk_hc_evt_t *evt, void const *ctx)
+ * {
+ *      // evt->vkey will be x
+ *      DEBUG_TRACE("Key (%03u) clicked", evt->vkey);
+ *      // evt->held.mask[a/32] should equal to (1 << (a%32))
+ * 	DEBUG_TRACE("Key held mask[%x] = %l#x", a/32, evt->held.mask[a/32]);
+ *  }
+ *
+ * // Key event array
+ * static const atm_vk_reg_t key_event_array[] = {
+ *  ...
+ *  // If a < 32, this equals to VKEY_HOLD_CLICK(vkey_x_click_with_a, x, (1 << a))
+ *  // If a < 64, this equals to VKEY_HOLD_CLICK(vkey_x_click_with_a, x, 0, (1 << a % 32))
+ *  // If a < 96, this equals to VKEY_HOLD_CLICK(vkey_x_click_with_a, x, 0, 0, (1 << a % 32))
+ *  // Etc,.
+  *  VKEY_HOLD_1KEY_CLICK(vkey_x_click_with_a, x, a),
+ *  ...
+ * };
+ * @endcode
+ *******************************************************************************
+ */
+#define VKEY_HOLD_1KEY_CLICK(fn, vkey, mk) \
+    VKEY_HOLD_CLICK(fn, vkey, VKEY_1KEY_MASK(mk))
+
+/**
+ *******************************************************************************
+ * @brief Create hold click event entry with 2 key holding.
+ * The entry is part of a @ref atm_vk_reg_t array which is used to
+ * registered into @ref atm_vkey_add_table function. This is the convenient version
+ * of @ref VKEY_HOLD_CLICK with 2 key holding.
+ * @param[in] fn Callback function
+ * @ref atm_vk_hc_reg_t.cb
+ * @param[in] vkey Virtual key index for clicking monitor.
+ * @param[in] mk1 First virtual key index for holding.
+ * @param[in] mk2 Second virtual key index for holding.
+ * Here is the example of monitoring click event on key index x clicking with
+ * key index a and key index b held:
+ * @code
+ *
+ * // Handler for key index x click with key index a and b held.
+ * static void vkey_x_click_with_ab(atm_vk_hc_evt_t *evt, void const *ctx)
+ * {
+ *      // evt->vkey shall be x
+ *      DEBUG_TRACE("Key (%03u) clicked", evt->vkey);
+ *      // evt->held.mask[a/32] bit a%32 shall be 1
+ *      // evt->held.mask[b/32] bit b%32 shall be 1
+ * 	DEBUG_TRACE("mask %d = %l#x mask %d = %l#x", a/32, evt->held.mask[a/32], b/32,
+ *          evt->held.mask[b/32]);
+ *  }
+ *
+ * // Key event array
+ * static const atm_vk_reg_t key_event_array[] = {
+ *  ...
+ *  VKEY_HOLD_2KEY_CLICK(vkey_x_click_with_ab, x, a, b),
+ *  ...
+ * };
+ * @endcode
+ *******************************************************************************
+ */
+#define VKEY_HOLD_2KEY_CLICK(fn, vkey, mk1, mk2) \
+    VKEY_HOLD_CLICK(fn, vkey, VKEY_2KEY_MASK(mk1, mk2))
+
+/**
+ *******************************************************************************
+ * @brief Create hold event entry.
+ * The entry is part of a @ref atm_vk_reg_t array which is used to
+ * registered into @ref atm_vkey_add_table function.
+ * @param[in] fn Callback function
+ * @ref atm_vk_hd_reg_t.cb
+ * @param[in] fn1 Callback function
+ * @ref atm_vk_hd_reg_t.status_cb
+ * @param[in] min_ms Minimal hold time to trigger the event.
+ * @ref atm_vk_hd_reg_t.time_ms
+ * @param[in] ... Held keys' mask.
+ *
+ * Here is the example of monitoring click events on key a, b, and c held for
+ * 500 milliseconds and key index d held for 1000 milliseconds.
+ * @code
+ *
+ * // Handler for key index a,b and c held.
+ * static void vkey_abc_hold(atm_vk_hd_evt_t *evt, void const *ctx)
+ * {
+ *      // evt->held.mask[a/32] bit a%32 shall be 1
+ *      // evt->held.mask[b/32] bit b%32 shall be 1
+ *      // evt->held.mask[c/32] bit c%32 shall be 1
+ * 	DEBUG_TRACE("mask %d = %l#x mask %d = %l#x", a/32, evt->held.mask[a/32], b/32,
+ *          evt->held.mask[b/32], c/32, evt->held.mask[c/32]);
+ *      // evt->time_ms should be longer than 500 milliseconds
+ * 	DEBUG_TRACE("time = %ld", evt->time_ms);
+ *  }
+ *
+ * // Handler for key index d held.
+ * static void vkey_d_hold(atm_vk_hd_evt_t *evt, void const *ctx)
+ * {
+ *      // evt->held.mask[d/32] bit d%32 shall be 1
+ *      DEBUG_TRACE("mask %d = %l#x", d/32, evt->held.mask[d/32]);
+ *      // evt->time_ms should be longer than 1000 milliseconds
+ * 	DEBUG_TRACE("time = %ld", evt->time_ms);
+ *  }
+ *
+ * // Key event array
+ * static const atm_vk_reg_t key_event_array[] = {
+ *  ...
+ *  // The (1 << (a%32)), (1 << (b%32)) and (1 << (c%32)) would be located in
+ *  // mask a/32, b/32, c/32 respectively
+ *  VKEY_HOLD(vkey_abc_hold, NULL, 500, ... (1 << (a%32)) ... (1 << (b%32)) ... (1 << (c%32))),
+ *  ...
+ *  // The (1 << (d%32)) would be located in mask d/32
+ *  VKEY_HOLD(vkey_d_hold, NULL, 1000, ...(1 << (d%32)...),
+ *  ...
+ * };
+ * @endcode
+ *******************************************************************************
+ */
+#define VKEY_HOLD(fn, fn1, min_ms, ...) { \
+    atm_vk_hold, .hold = {fn, fn1, min_ms, {__VA_ARGS__}} \
+}
+
+/**
+ *******************************************************************************
+ * @brief Create hold event entry with 1 key holding.
+ * The entry is part of a @ref atm_vk_reg_t array which is used to
+ * registered into @ref atm_vkey_add_table function. This is convenient version of
+ * @ref VKEY_HOLD with 1 key holding
+ * @param[in] fn Callback function
+ * @ref atm_vk_hd_reg_t.cb
+ * @param[in] fn1 Callback function
+ * @ref atm_vk_hd_reg_t.status_cb
+ * @param[in] min_ms Minimal hold time to trigger the event.
+ * @param[in] mk Virtual key index for holding.
+ *
+ * Here is the example of monitoring click event on and key index x holding for
+ * 1000 ms.
+ * @code
+ *
+ * // Handler for key x held.
+ * static void vkey_x_hold(atm_vk_hd_evt_t *evt, void const *ctx)
+ * {
+ *      // evt->held.mask[x/32] bit x%32 shall be 1
+ *      DEBUG_TRACE("Holding key mask[%d] = %l#x", x/32,evt->held.mask[x/32]);
+ *      // evt->time_ms shall be longer than 1000
+ * 	DEBUG_TRACE("time = %ld", evt->time_ms);
+ *  }
+ *
+ * // Key event array
+ * static const atm_vk_reg_t key_event_array[] = {
+ *  ...
+ *  VKEY_HOLD_1KEY(vkey_x_hold, NULL, 1000, x),
+ *  ...
+ * };
+ * @endcode
+ *******************************************************************************
+ */
+#define VKEY_HOLD_1KEY(fn, fn1, min_ms, mk) \
+    VKEY_HOLD(fn, fn1, min_ms, VKEY_1KEY_MASK(mk))
+
+/**
+ *******************************************************************************
+ * @brief Create hold click event entry with 2 key holding.
+ * The entry is part of a @ref atm_vk_reg_t array which is used to
+ * registered into @ref atm_vkey_add_table function. This is convenient version
+ * of @ref VKEY_HOLD with 2 keys holding.
+ * @param[in] fn Callback function
+ * @ref atm_vk_hd_reg_t.cb
+ * @param[in] fn1 Callback function
+ * @ref atm_vk_hd_reg_t.status_cb
+ * @param[in] min_ms Minimal hold time to trigger the event.
+ * @param[in] mk1 First virtual key index for holding.
+ * @param[in] mk2 Second virtual key index for holding.
+ *
+ * Here is the example of monitoring click event on and key index x and y holding for
+ * 1500 ms.
+ * @code
+ *
+ * // Handler for key index x and y held.
+ * static void vkey_xy_hold(atm_vk_hd_evt_t *evt, void const *ctx)
+ * {
+ *      // evt->held.mask[x/32] bit x%32 shall be 1
+ *      DEBUG_TRACE("Holding key mask[%d] = %l#x", x/32, evt->held.mask[x/32]);
+ *      // evt->held.mask[y/32] bit y%32 shall be 1
+ *      DEBUG_TRACE("Holding key mask[%d] = %l#x", y/32, evt->held.mask[y/32]);
+ *      // evt->time_ms shall be longer than 1000
+ * 	DEBUG_TRACE("time = %ld", evt->time_ms);
+ *  }
+ *
+ * // Key event array
+ * static const atm_vk_reg_t key_event_array[] = {
+ *  ...
+ *  VKEY_HOLD_2KEY(vkey_xy_hold, NULL, 1500, x, y),
+ *  ...
+ * };
+ * @endcode
+ *******************************************************************************
+ */
+#define VKEY_HOLD_2KEY(fn, fn1, min_ms, mk1, mk2) \
+    VKEY_HOLD(fn, fn1, min_ms, VKEY_2KEY_MASK(mk1, mk2))
+
+/**
+ *******************************************************************************
+ * @brief Create non-first down event entry.
+ * The entry is part of a @ref atm_vk_reg_t array which is used to
+ * registered into @ref atm_vkey_add_table function.
+ * @param[in] fn Callback function
+ * @ref atm_vk_dnup_reg_t.cb
+ * @param[in] vkey Virtual key index for down monitor.
+ *
+ * @anchor down_more_example
+ * Here is the example of monitoring all kinds of down and up events and report
+ * them to a single callback:
+ * @code
+ *
+ * static void vkey_any_up_down_inter(atm_vk_dnup_inter_evt_t *evt, void const *ctx)
+ * {
+ *      if(evt->eid == atm_vk_down_1st || evt->eid == atm_vk_down_more) {
+ * 	    DEBUG_TRACE("vkey %d is pressed", evt->vkey);
+ *	} else {
+ * 	    DEBUG_TRACE("vkey %d is release", evt->vkey);
+ *      }
+ *
+ *      if(evt->eid == atm_vk_down_more || evt->eid == atm_vk_up_inter) {
+ *          DEBUG_TRACE("Some key held mask:")
+ *          for (int i = 0; i < VKEY_MASK_NUM; i++) {
+ *	        DEBUG_TRACE("mask[%d] = %lu", evt->held.mask[i]);
+ *          }
+ *      }
+ *  }
+ *
+ * static void vkey_any_up_down(atm_vk_dnup_evt_t *evt, void const *ctx)
+ * {
+ *    atm_vk_dnup_inter_evt_t new_evt;
+ *    memcpy(&new_evt, &evt, sizeof(atm_vk_dnup_evt_t));
+ *    vkey_any_up_down_inter(&new_evt, ctx);
+ * }
+ *
+ * // Key event array
+ * static const atm_vk_reg_t key_event_array[] = {
+ *  ...
+ *  VKEY_DOWN_MORE(vkey_any_up_down, atm_vk_any),
+ *  VKEY_DOWN_FIRST(vkey_any_up_down_inter, atm_vk_any),
+ *  VKEY_UP_INTER(vkey_any_up_down_inter, atm_vk_any),
+ *  VKEY_UP_LAST(vkey_any_up_down, atm_vk_any),
+ *  ...
+ * };
+ * @endcode
+ *******************************************************************************
+ */
+#define VKEY_DOWN_MORE(fn, vkey) { \
+    atm_vk_down_more, .dn = {fn, vkey} \
+}
+
+/**
+ *******************************************************************************
+ * @brief Create first down event entry.
+ * The entry is part of a @ref atm_vk_reg_t array which is used to
+ * registered into @ref atm_vkey_add_table function.
+ * @param[in] fn Callback function
+ * @ref atm_vk_dnup_reg_t.cb
+ * @param[in] vkey Virtual key index for down monitor.
+ * @note Please refer example @ref down_more_example "here"
+ *******************************************************************************
+ */
+#define VKEY_DOWN_FIRST(fn, vkey) { \
+    atm_vk_down_1st, .dn_fst = {fn, vkey} \
+}
+
+/**
+ *******************************************************************************
+ * @brief Create non-last up event entry.
+ * The entry is part of a @ref atm_vk_reg_t array which is used to
+ * registered into @ref atm_vkey_add_table function.
+ * @param[in] fn Callback function
+ * @ref atm_vk_dnup_reg_t.cb
+ * @param[in] vkey Virtual key index for up monitor.
+ * @note Please refer example @ref down_more_example "here"
+ *******************************************************************************
+ */
+#define VKEY_UP_INTER(fn, vkey) { \
+    atm_vk_up_inter, .up = {fn, vkey} \
+}
+
+/**
+ *******************************************************************************
+ * @brief Create last up event entry.
+ * The entry is part of a @ref atm_vk_reg_t array which is used to
+ * registered into @ref atm_vkey_add_table function.
+ * @param[in] fn Callback function
+ * @ref atm_vk_dnup_reg_t.cb
+ * @param[in] vkey Virtual key index for up monitor.
+ * @note Please refer example @ref down_more_example "here"
+ *******************************************************************************
+ */
+#define VKEY_UP_LAST(fn, vkey) { \
+    atm_vk_up_last, .up_lst = {fn, vkey} \
+}
+
+/// Internal macro used by VKEY_1KEY_MASK
+#define _MK_N(n, v) ((v / 32 == n) ? CO_BIT(v % 32) : 0)
+/// Internal macro used by VKEY_2KEY_MASK
+#define _MK_N2(n, v1, v2) (_MK_N(n,v1) | _MK_N(n,v2))
+/// Vkey index to vkey mask conversion by maximum vkey number
+#define _MK_N_64(v) _MK_N(0, v), _MK_N(1, v)
+#define _MK_N_96(v) _MK_N_64(v), _MK_N(2, v)
+#define _MK_N_128(v) _MK_N_96(v), _MK_N(3, v)
+#define _MK_N_160(v) _MK_N_128(v), _MK_N(4, v)
+#define _MK_N_192(v) _MK_N_160(v), _MK_N(5, v)
+#define _MK_N2_64(v1, v2) _MK_N2(0, v1, v2), _MK_N2(1, v1, v2)
+#define _MK_N2_96(v1, v2) _MK_N2_64(v1, v2), _MK_N2(2, v1, v2)
+#define _MK_N2_128(v1, v2) _MK_N2_96(v1, v2), _MK_N2(3, v1, v2)
+#define _MK_N2_160(v1, v2) _MK_N2_128(v1, v2), _MK_N2(4, v1, v2)
+#define _MK_N2_192(v1, v2) _MK_N2_160(v1, v2), _MK_N2(5, v1, v2)
+#if (ATM_VKEY_MAX <= 32)
+#define VKEY_1KEY_MASK(v) _MK_N(0, v)
+#define VKEY_2KEY_MASK(v1, v2) _MK_N2(0, v1, v2)
+#elif (ATM_VKEY_MAX <= 64)
+#define VKEY_1KEY_MASK(v) _MK_N_64(v)
+#define VKEY_2KEY_MASK(v1, v2) _MK_N2_64(v1, v2)
+#elif (ATM_VKEY_MAX <= 96)
+#define VKEY_1KEY_MASK(v) _MK_N_96(v)
+#define VKEY_2KEY_MASK(v1, v2) _MK_N2_96(v1, v2)
+#elif (ATM_VKEY_MAX <= 128)
+#define VKEY_1KEY_MASK(v) _MK_N_128(v)
+#define VKEY_2KEY_MASK(v1, v2) _MK_N2_128(v1, v2)
+#elif (ATM_VKEY_MAX <= 160)
+#define VKEY_1KEY_MASK(v) _MK_N_160(v)
+#define VKEY_2KEY_MASK(v1, v2) _MK_N2_160(v1, v2)
+#else
+#define VKEY_1KEY_MASK(v) _MK_N_192(v)
+#define VKEY_2KEY_MASK(v1, v2) _MK_N2_192(v1, v2)
+#endif // (ATM_VKEY_MAX <= 32)
+/// Check if a key is in mask array
+#define VKEY_IS_MASK_HIT(m, k) (m[k / 32] & CO_BIT(k % 32))
+/// Check if two mask array is equal
+#define VKEY_IS_MASK_EQU(m1, m2) \
+    (!memcmp(m1, m2, sizeof(uint32_t) * VKEY_MASK_NUM))
+/// Special number for any mask
+#define ATM_MASK_ANY 0xFFFFFFFF
+/// Number for vkey mask
+#define VKEY_MASK_NUM CO_DIVIDE_CEIL(ATM_VKEY_MAX, 32)
+
+/// Key event ID
+typedef enum {
+    /// First key down event.
+    atm_vk_down_1st,
+    /// Non-first key down event. Other pressed key(s) exist.
+    atm_vk_down_more,
+    /// Key held event.
+    atm_vk_hold,
+    /// Non-last Key up event. Other pressed key(s) exist.
+    atm_vk_up_inter,
+    /// Last key up event.
+    atm_vk_up_last,
+    /// Event for key clicking.
+    atm_vk_click,
+    /// Event for key clicking with some key(s) held.
+    atm_vk_hold_click,
+    /// Event for key double clicking.
+    atm_vk_db_click,
+} atm_vk_eid_t;
+
+/// key index: 0 to 254 is valid index.
+/// Here defined is special usage.
+typedef enum {
+    /// any keys
+    atm_vk_any = 0xff
+} atm_vk_idx_t;
+
+/// Held keys
+typedef struct {
+    /// Masks of current held keys.
+    uint32_t mask[VKEY_MASK_NUM];
+} atm_vk_held_keys_t;
+
+
+/// Event structure header
+typedef struct {
+    /// Event id
+    atm_vk_eid_t eid;
+    union {
+	/// Key index have been acted. @ref atm_vk_idx_t
+	atm_vk_idx_t vkey;
+	/// Key index of uint8_t type.
+	uint8_t u8vkey;
+    };
+} atm_vk_basic_evt_t;
+
+/// Event structure for atm_vk_down_fist and atm_vk_up_last.
+typedef struct {
+    /// Basic event
+    atm_vk_basic_evt_t top;
+} atm_vk_dnup_evt_t;
+
+/// Event structure for atm_vk_hold
+typedef struct atm_vk_hd_evt_s {
+    /// Basic event
+    /// @note the vkey in top is unused in atm_vk_hold
+    atm_vk_basic_evt_t top;
+    /// Minimal time of holding. Unit is millisecond.  Zero for ignoring.
+    uint16_t time_ms;
+    /// Current held key
+    atm_vk_held_keys_t held;
+} atm_vk_hd_evt_t;
+
+/// Event structure for atm_vk_hold_click, atm_vk_down_more and
+/// atm_vk_up_inter
+typedef struct {
+    /// Basic event;
+    atm_vk_basic_evt_t top;
+    /// Masks of current held key.
+    atm_vk_held_keys_t held;
+} atm_vk_hc_evt_t, atm_vk_dnup_inter_evt_t;
+
+/// Click and double click event structure
+typedef struct atm_vk_ck_evt_s {
+    /// Basic event;
+    atm_vk_basic_evt_t top;
+    /// Measured time for click and double click
+    /// click: time between press and release.
+    /// double click: time between two clicks.
+    uint16_t time_ms;
+} atm_vk_ck_evt_t, atm_vk_dck_evt_t;
+
+/// Entry structure for hold detection.
+typedef struct atm_vk_hd_reg_s {
+    /// callback while event happen
+    /// @brief This function will be called if hold condition matched.
+    /// @param[in] evt Event for hold and click structure
+    /// @param[in] ctx Context data.
+    /// @return Return true to keep detecting this hold. otherwise, false.
+    bool (*cb)(atm_vk_hd_evt_t const *evt, void const *ctx);
+    /// @brief This function will be called if hold key has been pressed or
+    /// released.
+    /// @param[in] pressed Indicate the hold key is pressed and a timer is
+    /// starting to count.
+    /// @param[in] ctx Context data.
+    void (*status_cb)(bool pressed, void const *ctx);
+    /// Minimal time of holding. Unit is millisecond.  Zero for ignoring.
+    uint16_t time_ms;
+    /// Masks of expecting held keys.
+    uint32_t mask[VKEY_MASK_NUM];
+} atm_vk_hd_reg_t;
+
+/// Entry structure for hold and click
+typedef struct atm_vk_hc_reg_s {
+    /// callback while event happen
+    /// @brief This function will be called if hold and click condition matched.
+    /// @param[in] evt Event for hold structure
+    /// @param[in] ctx Context data.
+    void (*cb)(atm_vk_hc_evt_t const *evt, void const *ctx);
+    /// Key index of clicking. @ref atm_vk_idx_t
+    uint8_t vkey;
+    /// Masks of expecting held keys.
+    uint32_t mask[VKEY_MASK_NUM];
+} atm_vk_hc_reg_t;
+
+/// Entry structure of click event
+typedef struct atm_vk_ck_reg_s {
+    /// callback while event happen
+    /// @brief This function will be called if click condition matched.
+    /// @param[in] evt Event for click structure
+    /// @note min_ms and max_ms represent the real click interval and they should
+    /// equal.
+    /// @param[in] ctx Context data.
+    void (*cb)(atm_vk_ck_evt_t const *evt, void const *ctx);
+    /// Key index of clicking. @ref atm_vk_idx_t
+    uint8_t vkey;
+    /// Minimal time between press and release. zero for ignoring.
+    uint16_t min_ms;
+    /// Maximal time between press and release. zero for ignoring.
+    uint16_t max_ms;
+} atm_vk_ck_reg_t;
+
+/// Entry structure for double click detection
+typedef struct atm_vk_dck_reg_s {
+    /// callback while event happen
+    /// @brief This function will be called if double click condition matched.
+    /// @param[in] evt Event for double click structure
+    /// @param[in] ctx Context data.
+    void (*cb)(atm_vk_dck_evt_t const *evt, void const *ctx);
+    /// Listening key index of double clicking. @ref atm_vk_idx_t
+    uint8_t vkey;
+    /// Maximal time between two clicks. zero for ignoring.
+    uint16_t max_ms;
+} atm_vk_dck_reg_t;
+
+/// Entry structure for down and up
+typedef struct atm_vk_dnup_reg_s {
+    /// callback while event happen
+    /// @brief This function will be called if down or up condition matched.
+    /// @param[in] evt Event for down or up structure
+    /// @param[in] ctx Context data.
+    void (*cb)(atm_vk_dnup_evt_t const *evt, void const *ctx);
+    /// Key listen index for atm_vk_down_fist, atm_vk_up_last
+    /// @ref atm_vk_idx_t
+    uint8_t vkey;
+} atm_vk_dnup_reg_t;
+
+/// Event structure for non-lonely down and up
+typedef struct atm_vk_dnup_inter_reg_s {
+    /// callback while event happen
+    /// @brief This function will be called if down or up condition matched.
+    /// @param[in] evt Event for non-lonely down or up structure
+    /// @param[in] ctx Context data.
+    void (*cb)(atm_vk_dnup_inter_evt_t const *evt, void const *ctx);
+    /// Key index for atm_vk_down_more, atm_vk_up_inter
+    /// @ref atm_vk_idx_t
+    uint8_t vkey;
+} atm_vk_dnup_inter_reg_t;
+
+/// Event union for table
+typedef struct {
+    /// Event id
+    atm_vk_eid_t eid;
+    union {
+	/// Non-first down event
+	atm_vk_dnup_inter_reg_t dn;
+	/// Non-last up event
+	atm_vk_dnup_inter_reg_t up;
+	/// First down event
+	atm_vk_dnup_reg_t dn_fst;
+	/// Last up event
+	atm_vk_dnup_reg_t up_lst;
+	/// Hold event
+	atm_vk_hd_reg_t hold;
+	/// Hold and click event
+	atm_vk_hc_reg_t hold_click;
+	/// click event
+	atm_vk_ck_reg_t click;
+	/// double click event
+	atm_vk_dck_reg_t db_click;
+    };
+} atm_vk_reg_t;
+
+/**
+ *******************************************************************************
+ * @brief Add a virtual key event table
+ * @param[in] table Virtual key event table
+ * @param[in] ent_cnt Entry count of event table
+ * @param[in] ctx application context
+ * @return Handle of this table. This handle is used to feed virtual key while
+ * some user input happened.
+ *******************************************************************************
+ */
+__NONNULL(1)
+struct vkll_ctx_s *atm_vkey_add_table(atm_vk_reg_t const *table, uint16_t ent_cnt,
+    void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Virtual key feed.
+ * When some user input happened, use this function to put virtual key into
+ * system.
+ * @param[in] handle Handle of virtual key event table.
+ * @param[in] vkey Virtual key to be inputted.
+ * @param[in] is_pressed True for key pressing. Otherwise for releasing.
+ *******************************************************************************
+ */
+__NONNULL(1)
+void atm_vkey_feed(struct vkll_ctx_s *handle, uint8_t vkey, bool is_pressed);
+
+/**
+ *******************************************************************************
+ * @brief Virtual key flush.
+ * @param[in] handle Handle of virtual key event table.
+ *******************************************************************************
+ */
+__NONNULL_ALL
+void atm_vkey_flush(struct vkll_ctx_s *handle);
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} ATM_BTFM_PVKEY
diff --git a/platform/atm2/ATM22xx-x1x/driver/batt_model/batt_model.h b/platform/atm2/ATM22xx-x1x/driver/batt_model/batt_model.h
new file mode 100644
index 0000000..916ddde
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/driver/batt_model/batt_model.h
@@ -0,0 +1,86 @@
+/**
+ *******************************************************************************
+ *
+ * @file batt_model.h
+ *
+ * @brief Battery model common prototype
+ *
+ * Copyright (C) Atmosic 2022-2023
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/**
+ * @defgroup BATT_MODEL Battery model
+ * @ingroup DRIVERS
+ * @brief Driver for battery model
+ * @{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Device abstract state for battery model
+typedef enum {
+    /// Invalid state. Use to report error when get state.
+    DEV_INVALID,
+    /// Reset state. It represents system is booting and doesn't decide whether
+    /// goes to normal function or not.
+    DEV_RESET,
+    /// Active state. System is in normal function.
+    DEV_ACTV,
+    /// Hibernate state. It represents system is going to hibernation or waking
+    /// up from hibernation.
+    DEV_HIB,
+    /// Soc off state. It represents system is going to SOC off or waking up
+    /// from SOC off.
+    DEV_SOCOFF,
+} dev_state_t;
+
+/// Device state getter and setter.
+typedef struct {
+    /// Get current device state.
+    dev_state_t (*get)(void);
+    /// Set current device state.
+    void (*set)(dev_state_t);
+} dev_state_fns_t;
+
+/// Hibernation flag getter and setter
+typedef struct {
+    /// Get hibernation flag
+    bool (*get)(uint8_t);
+    /// Set hibernation flag
+    void (*set)(uint8_t, bool);
+} hib_flag_fns_t;
+
+/// Callback functions from batt_model
+typedef struct {
+    /// Device state getter and setter.
+    dev_state_fns_t state;
+    /// Hibernation getter and setter.
+    hib_flag_fns_t flag;
+} batt_cbs;
+
+/// Battery model virtual functions
+typedef struct {
+    /// Initialization of the battery model.
+    void (*init)(batt_cbs const *);
+    /// Issue a battery capacity sampling.
+    bool (*sample)(void (*cb)(uint8_t level));
+} batt_fns;
+
+/**
+ *******************************************************************************
+ * @brief Retrieve the functions of battery model
+ * return Battery model functions.
+ *******************************************************************************
+ */
+batt_fns const *batt_model(void);
+#ifdef __cplusplus
+}
+#endif
+
+/// @} BATT_MODEL
diff --git a/platform/atm2/ATM22xx-x1x/driver/gadc/gadc.h b/platform/atm2/ATM22xx-x1x/driver/gadc/gadc.h
new file mode 100644
index 0000000..6f1719a
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/driver/gadc/gadc.h
@@ -0,0 +1,122 @@
+/**
+ *******************************************************************************
+ *
+ * @file gadc.h
+ *
+ * @brief Analog-to-digital converter
+ *
+ * Copyright (C) Atmosic 2020
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup GADC General purpose ADC
+ * @ingroup DRIVERS
+ * @brief User driver for General purpose Analog to Digital Converter
+ *
+ * @{
+ *******************************************************************************
+ */
+
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(__IEEE_LITTLE_ENDIAN) || defined(__LITTLE_ENDIAN__)
+/// Calibration data type
+struct gadc_cal_s {
+    union {
+	/// 32 bits data which combine offset and gain
+	uint32_t value;
+	/// Decomposition structure.
+	struct {
+	    /// Mantissa part of gain.
+	    unsigned int c1_mantissa:12;
+	    /// Exponent part of gain.
+	    int c1_exponent:6;
+	    /// Sign part of gain.
+	    unsigned int c1_sign:1;
+	    /// Double value of offset
+	    int c0_x2:13;
+	};
+    };
+};
+
+STATIC_ASSERT(sizeof(struct gadc_cal_s) == 4, "wrong size");
+/// Float data type
+typedef union {
+    /// C float value
+    float value;
+    /// Decomposition structure.
+    struct {
+	/// Mantissa part of float.
+	unsigned int fraction: 23;
+	/// Exponent part of float.
+	int exponent: 8;
+	/// Sign part of float.
+	unsigned int sign : 1;
+    } number;
+} __ieee_float_shape_type;
+#else
+#error "Unsupported floating point endian"
+#endif
+
+/// Channels used by GADC
+typedef enum {
+    /// VBAT channel.
+    VBATT =  0,
+    /// VSTORE channel.
+    VSTORE = 1,
+    /// VDD1A channel.
+    CORE = 2,
+    /// Temperature channel.
+    TEMP = 3,
+    /// P10/P11 differential channel.
+    PORT0_DIFFERENTIAL = 4,
+    /// P10 single-ended channel.
+    PORT0_SINGLE_ENDED_0 = 6,
+    /// P11 single-ended channel.
+    PORT0_SINGLE_ENDED_1 = 7,
+    /// For GADC driver use only
+    ZV_PORT = 8,
+    /// P9 single-ended channel.
+    PORT1_SINGLE_ENDED_1 = 9,
+} gadc_chan_t;
+
+/// Callback context data
+typedef struct {
+    /// Sensed channel.
+    gadc_chan_t ch;
+    /// Gext setting. (0 = more range / 1 = better resolution)
+    uint8_t gext;
+    /// Application context.
+    void const *app_ctx;
+} gadc_cb_ctx_t;
+
+/// Callback prototype
+typedef void (*gadc_callback_t)(float result, int16_t raw, struct gadc_cal_s cal,
+    gadc_cb_ctx_t const *ctx);
+
+/**
+ * @brief Sample given GADC channel and invoke callback on completion of measurement
+ * @param[in] channel    GADC channel to monitor
+ * @param[in] cb  Callback invoked with channel measurement on completion.
+ * @param[in] gext gain setting
+ * @param[in] ctx Context associated.
+ */
+void gadc_sample_channel(gadc_chan_t channel, gadc_callback_t cb, uint8_t gext,
+    void const *ctx);
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} GADC
+
diff --git a/platform/atm2/ATM22xx-x1x/driver/ir/ir.h b/platform/atm2/ATM22xx-x1x/driver/ir/ir.h
new file mode 100644
index 0000000..42d222a
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/driver/ir/ir.h
@@ -0,0 +1,63 @@
+/**
+ *******************************************************************************
+ *
+ * @file ir.h
+ *
+ * @brief IR driver interface
+ *
+ * Copyright (C) Atmosic 2019-2022
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/**
+ * @defgroup IR IR
+ * @ingroup DRIVERS
+ * @brief Driver for IR module
+ * @{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Reset IR sequence.
+ *
+ */
+void reset_ir_sequence(void);
+
+/**
+ * @brief Send IR sequence.
+ *
+ */
+void send_ir_sequence(void);
+
+/**
+ * @brief add IR period in period_us and carrier_on or off flag
+ * @param[in] carrier_on true if carrier freq needs to be used during the period
+ * @param[in] period_us Period in us
+ */
+void ir_add_period(uint8_t carrier_on, uint32_t period_us);
+
+/**
+ * @brief Initialize IR subsystem with given protocol
+ * @param[in] callback Callback to receive IR sequence completion event.
+ * @note This callback is invoked in interrupt context.
+ */
+void ir_init(void (*callback)(void));
+
+/**
+ * @brief Configure IR carrier parameters
+ * @param[in] freq Carrier frequency setting in Hz
+ * @param[in] duty Carrier duty cycle setting in percentage
+ */
+void ir_config_carr(uint32_t freq, uint8_t duty);
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} IR
diff --git a/platform/atm2/ATM22xx-x1x/driver/ir/ir_ctl.h b/platform/atm2/ATM22xx-x1x/driver/ir/ir_ctl.h
new file mode 100644
index 0000000..2645ef0
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/driver/ir/ir_ctl.h
@@ -0,0 +1,147 @@
+/**
+ *******************************************************************************
+ *
+ * @file ir_ctl.h
+ *
+ * @brief IR control interface
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/**
+ * @defgroup IR_CTL IR_CTL
+ * @ingroup DRIVERS
+ * @brief Driver for IR control
+ * @{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    IR_MSG_TYPE_IR_CMD,
+    IR_MSG_TYPE_IR_SEQ,
+} ir_msg_type_t;
+
+/// IR protocol definition
+typedef struct {
+    /// Name of IR protocol
+    const char *name;
+    /// IR Protocol Header ON duration in us
+    uint32_t header_on_dur;
+    /// IR Protocol Header OFF duration in us
+    uint32_t header_off_dur;
+    /// IR Protocol address bits
+    uint8_t  addr_len;
+    /// IR Protocol command bits
+    uint8_t  cmd_len;
+    /// IR Protocol logical one ON duration in us
+    uint32_t one_on_dur;
+    /// IR Protocol logical one OFF duration in us
+    uint32_t one_off_dur;
+    /// IR Protocol logical zero ON duration in us
+    uint32_t zero_on_dur;
+    /// IR Protocol logical zero OFF duration in us
+    uint32_t zero_off_dur;
+    /// IR Protocol message end duration in us
+    uint32_t msg_end_dur;
+    /// IR Protocol message end space in cs
+    uint32_t msg_end_space;
+    /// IR Protocol repeat ON duration in us
+    uint32_t rept_on_dur;
+    /// IR Protocol repeat OFF duration in us
+    uint32_t rept_off_dur;
+    /// IR Protocol repeat end ON duration in us
+    uint32_t rept_end_on_dur;
+    /// IR Protocol repeat delay in us
+    uint32_t rept_delay;
+} __PACKED ir_prot_t;
+
+typedef struct {
+    uint32_t addr;
+    uint32_t inv_addr;
+    uint32_t cmd;
+    uint32_t inv_cmd;
+} ir_data_t;
+
+typedef struct {
+    ir_prot_t const *prot;
+    ir_data_t const *data;
+    bool repeat;
+} __PACKED ir_cmd_t;
+
+typedef struct {
+    uint16_t us_per_seq;
+    uint16_t seq_len;
+    uint16_t const *seq;
+    uint16_t rept_len;
+    uint16_t const *rept_seq;
+} ir_seq_t;
+
+typedef struct {
+    ir_msg_type_t type;
+    uint8_t duty;
+    uint32_t freq;
+    union {
+	ir_cmd_t ir_cmd;
+	ir_seq_t ir_seq;
+    };
+} ir_msg_t;
+
+/**
+ * @brief Initial IR control instance.
+ * @param[in] cb_end Callback to receive IR sequence completion event.
+ */
+__NONNULL_ALL
+void ir_ctl_init(void(*cb_end)(void));
+
+/**
+ * @brief Start transmiting IR signals
+ * @param[in] msg IR message
+ */
+__NONNULL_ALL
+void ir_ctl_start(ir_msg_t *msg);
+
+/**
+ * @brief Stop repeat IR sequence
+ */
+void ir_ctl_stop_rept(void);
+
+/**
+ * @brief Send IR data using NEC protocol.
+ * @param[in] data IR address, inverse address, IR command, inverse command
+ * @param[in] repeat true for repeating IR until ir_ctl_stop_rept() is invoked
+ * @note If repeat is set, need to call @ref ir_ctl_stop_rept to stop repeat
+ * code.
+ */
+__NONNULL(1)
+void nec_ir_send(ir_data_t const *data, bool repeat);
+
+#ifdef CFG_ATVRC_UNI_IR
+/**
+ * @brief Send Universal IR message.
+ * @param[in] ir_code Universal IR code data
+ * @param[in] size IR code data size
+ */
+__NONNULL(1)
+void uni_ir_send(uint8_t const *code, uint16_t size);
+
+/**
+ * @brief Get repeat delay from Universal IR code data
+ * @param[in] uni_ir_code Universal IR code data
+ * @return repeat delay in us. return 0 if IR code type not match
+ */
+__NONNULL_ALL
+uint32_t uni_ir_get_rept_delay(uint8_t const *uni_ir_code);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} IR_CTL
diff --git a/platform/atm2/ATM22xx-x1x/driver/ir/nec_ir.h b/platform/atm2/ATM22xx-x1x/driver/ir/nec_ir.h
new file mode 100644
index 0000000..87d6a48
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/driver/ir/nec_ir.h
@@ -0,0 +1,47 @@
+/**
+ *******************************************************************************
+ *
+ * @file nec_ir.h
+ *
+ * @brief NEC IR driver interface
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/**
+ * @defgroup NEC_IR NEC_IR
+ * @ingroup DRIVERS
+ * @brief Driver for NEC IR module
+ * @{
+ */
+
+#include "ir_ctl.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Configure NEC IR instance.
+ * @param[in] cb_end Callback to receive IR sequence completion event.
+ */
+__NONNULL_ALL
+void nec_ir_init(void(*cb_end)(void));
+
+/**
+ * @brief Send IR address and cmd using NEC protocol.
+ * @param[in] data IR data: address, inverse address, command, inverse command
+ * @note If repeat is set, need to call @ref nec_ir_repeat_end to stop repeat
+ * code.
+ */
+void nec_ir_send(ir_data_t *data, bool repeat);
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} NEC_IR
\ No newline at end of file
diff --git a/platform/atm2/ATM22xx-x1x/driver/keyboard/keyboard.h b/platform/atm2/ATM22xx-x1x/driver/keyboard/keyboard.h
new file mode 100644
index 0000000..d243602
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/driver/keyboard/keyboard.h
@@ -0,0 +1,60 @@
+/**
+ *******************************************************************************
+ *
+ * @file keyboard.h
+ *
+ * @brief keyboard driver
+ *
+ * Copyright (C) Atmosic 2018-2021
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/**
+ * @defgroup KEYBOARD KEYBOARD
+ * @ingroup DRIVERS
+ * @brief User driver for KSM module.
+ * @{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Key matrix event
+typedef enum ksm_event_s {
+    /// A key was released.
+    KSM_RELEASE,
+    /// A Key was pressed.
+    KSM_PRESS,
+    /// Hardware overflow error.
+    KSM_ERR_HW_OVF
+} ksm_event_t;
+
+/**
+ * @brief Callback function prototype
+ * @param[in] event True if the key is pressed
+ * @param[in] idx Key index which is used in KSM_RELEASE and KSM_PRESS event.
+ * The index is Ri*Cn + Ci where Ci, Cn and Ri are column index, number of
+ * columns and row index respectively.
+ * @param[in] ctx Context from keyboard_run()
+ */
+typedef void (*keyboard_cb)(ksm_event_t event, uint32_t idx, void const *ctx);
+
+/**
+ * @brief Register callbacks and activate device.
+ * The callback is called from SW event.
+ * @param[in] callback Callback function. Called when a new keyboard
+ * event occurred.
+ * @param[in] ctx Context passed to callback
+ */
+__NONNULL(1)
+void keyboard_run(keyboard_cb callback, void const *ctx);
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} KEYBOARD
diff --git a/platform/atm2/ATM22xx-x1x/driver/keyboard/keyboard_internal.h b/platform/atm2/ATM22xx-x1x/driver/keyboard/keyboard_internal.h
new file mode 100644
index 0000000..9f3b750
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/driver/keyboard/keyboard_internal.h
@@ -0,0 +1,262 @@
+/**
+ *******************************************************************************
+ *
+ * @file keyboard_internal.h
+ *
+ * @brief keyboard ini helper macro
+ * This file is only included by keyboard_init() to reduce the context length.
+ *
+ * Copyright (C) Atmosic 2018-2021
+ *
+ *******************************************************************************
+ */
+#ifdef __KEYBOARD_INIT_USAGE__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Macro for setting mux
+#define KSM_COL_SET(x) do { \
+    if (!(ksm_pin_check & (1ULL << PIN_COL##x))) { \
+	DEBUG_TRACE("P%d is not supported.", PIN_COL##x); \
+	ASSERT_ERR(0); \
+    } \
+    PINMUX_KSO_SET(x); \
+    col[COL##x##_KSO] = x; \
+} while (0)
+
+#define KSM_ROW_SET(x) do { \
+    if (!(ksm_pin_check & (1ULL << PIN_ROW##x))) { \
+	DEBUG_TRACE("P%d is not supported.", PIN_ROW##x); \
+	ASSERT_ERR(0); \
+    } \
+    PINMUX_KSI_SET(x); \
+    row[ROW##x##_KSI] = x; \
+} while (0)
+
+#if (MAX_ROW > 0) && defined(PIN_ROW0) && defined(ROW0_KSI)
+    KSM_ROW_SET(0);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW0);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 0) && defined(PIN_ROW0) && defined(ROW0_KSI)
+
+#if (MAX_ROW > 1) && defined(PIN_ROW1) && defined(ROW1_KSI)
+    KSM_ROW_SET(1);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW1);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 1) && defined(PIN_ROW1) && defined(ROW1_KSI)
+
+#if (MAX_ROW > 2) && defined(PIN_ROW2) && defined(ROW2_KSI)
+    KSM_ROW_SET(2);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW2);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 2) && defined(PIN_ROW2) && defined(ROW2_KSI)
+
+#if (MAX_ROW > 3) && defined(PIN_ROW3) && defined(ROW3_KSI)
+    KSM_ROW_SET(3);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW3);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 3) && defined(PIN_ROW3) && defined(ROW3_KSI)
+
+#if (MAX_ROW > 4) && defined(PIN_ROW4) && defined(ROW4_KSI)
+    KSM_ROW_SET(4);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW4);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 4) && defined(PIN_ROW4) && defined(ROW4_KSI)
+
+#if (MAX_ROW > 5) && defined(PIN_ROW5) && defined(ROW5_KSI)
+    KSM_ROW_SET(5);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW5);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 5) && defined(PIN_ROW5) && defined(ROW5_KSI)
+
+#if (MAX_ROW > 6) && defined(PIN_ROW6) && defined(ROW6_KSI)
+    KSM_ROW_SET(6);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW6);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 6) && defined(PIN_ROW6) && defined(ROW6_KSI)
+
+#if (MAX_ROW > 7) && defined(PIN_ROW7) && defined(ROW7_KSI)
+    KSM_ROW_SET(7);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW7);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 7) && defined(PIN_ROW7) && defined(ROW7_KSI)
+
+#if (MAX_ROW > 8) && defined(PIN_ROW8) && defined(ROW8_KSI)
+    KSM_ROW_SET(8);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW8);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 8) && defined(PIN_ROW8) && defined(ROW8_KSI)
+
+#if (MAX_ROW > 9) && defined(PIN_ROW9) && defined(ROW9_KSI)
+    KSM_ROW_SET(9);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW9);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 9) && defined(PIN_ROW9) && defined(ROW9_KSI)
+
+#if (MAX_ROW > 10) && defined(PIN_ROW10) && defined(ROW10_KSI)
+    KSM_ROW_SET(10);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW10);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 10) && defined(PIN_ROW10) && defined(ROW10_KSI)
+
+#if (MAX_ROW > 11) && defined(PIN_ROW11) && defined(ROW11_KSI)
+    KSM_ROW_SET(11);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW11);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 11) && defined(PIN_ROW11) && defined(ROW11_KSI)
+
+#if (MAX_ROW > 12) && defined(PIN_ROW12) && defined(ROW12_KSI)
+    KSM_ROW_SET(12);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW12);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 12) && defined(PIN_ROW12) && defined(ROW12_KSI)
+
+#if (MAX_ROW > 13) && defined(PIN_ROW13) && defined(ROW13_KSI)
+    KSM_ROW_SET(13);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW13);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 13) && defined(PIN_ROW13) && defined(ROW13_KSI)
+
+#if (MAX_ROW > 14) && defined(PIN_ROW14) && defined(ROW14_KSI)
+    KSM_ROW_SET(14);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW14);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 14) && defined(PIN_ROW14) && defined(ROW14_KSI)
+
+#if (MAX_ROW > 15) && defined(PIN_ROW15) && defined(ROW15_KSI)
+    KSM_ROW_SET(15);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW15);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 15) && defined(PIN_ROW15) && defined(ROW15_KSI)
+
+#if (MAX_ROW > 16) && defined(PIN_ROW16) && defined(ROW16_KSI)
+    KSM_ROW_SET(16);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW16);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 16) && defined(PIN_ROW16) && defined(ROW16_KSI)
+
+#if (MAX_ROW > 17) && defined(PIN_ROW17) && defined(ROW17_KSI)
+    KSM_ROW_SET(17);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW17);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 17) && defined(PIN_ROW17) && defined(ROW17_KSI)
+
+#if (MAX_ROW > 18) && defined(PIN_ROW18) && defined(ROW18_KSI)
+    KSM_ROW_SET(18);
+#ifdef KSI_PULLUPS
+    PIN_PULLUP(PIN_ROW18);
+#endif // KSI_PULLUPS
+#endif // (MAX_ROW > 18) && defined(PIN_ROW18) && defined(ROW18_KSI)
+
+#if (MAX_COL > 0) && defined(PIN_COL0) && defined(COL0_KSO)
+    KSM_COL_SET(0);
+#endif // (MAX_COL > 0) && defined(PIN_COL0) && defined(COL0_KSO)
+
+#if (MAX_COL > 1) && defined(PIN_COL1) && defined(COL1_KSO)
+    KSM_COL_SET(1);
+#endif // (MAX_COL > 1) && defined(PIN_COL1) && defined(COL1_KSO)
+
+#if (MAX_COL > 2) && defined(PIN_COL2) && defined(COL2_KSO)
+    KSM_COL_SET(2);
+#endif // (MAX_COL > 2) && defined(PIN_COL2) && defined(COL2_KSO)
+
+#if (MAX_COL > 3) && defined(PIN_COL3) && defined(COL3_KSO)
+    KSM_COL_SET(3);
+#endif // (MAX_COL > 3) && defined(PIN_COL3) && defined(COL3_KSO)
+
+#if (MAX_COL > 4) && defined(PIN_COL4) && defined(COL4_KSO)
+    KSM_COL_SET(4);
+#endif // (MAX_COL > 4) && defined(PIN_COL4) && defined(COL4_KSO)
+
+#if (MAX_COL > 5) && defined(PIN_COL5) && defined(COL5_KSO)
+    KSM_COL_SET(5);
+#endif // (MAX_COL > 5) && defined(PIN_COL5) && defined(COL5_KSO)
+
+#if (MAX_COL > 6) && defined(PIN_COL6) && defined(COL6_KSO)
+    KSM_COL_SET(6);
+#endif // (MAX_COL > 6) && defined(PIN_COL6) && defined(COL6_KSO)
+
+#if (MAX_COL > 7) && defined(PIN_COL7) && defined(COL7_KSO)
+    KSM_COL_SET(7);
+#endif // (MAX_COL > 7) && defined(PIN_COL7) && defined(COL7_KSO)
+
+#if (MAX_COL > 8) && defined(PIN_COL8) && defined(COL8_KSO)
+    KSM_COL_SET(8);
+#endif // (MAX_COL > 8) && defined(PIN_COL8) && defined(COL8_KSO)
+
+#if (MAX_COL > 9) && defined(PIN_COL9) && defined(COL9_KSO)
+    KSM_COL_SET(9);
+/// In hw_cfg_pseq_init, the P1 was pullup to avoid leakage on designs
+/// that tie TMC high. But if P1 is used for column of keymatrix, pullup will
+/// cause current leakage when keyscan. So here clears the pull up for P1.
+#if (PIN_COL9 == 1)
+    PIN_PULL_CLR(PIN_COL9);
+#endif
+#endif // (MAX_COL > 9) && defined(PIN_COL9) && defined(COL9_KSO)
+
+#if (MAX_COL > 10) && defined(PIN_COL10) && defined(COL10_KSO)
+    KSM_COL_SET(10);
+#endif // (MAX_COL > 10) && defined(PIN_COL10) && defined(COL10_KSO)
+
+#if (MAX_COL > 11) && defined(PIN_COL11) && defined(COL11_KSO)
+    KSM_COL_SET(11);
+#endif // (MAX_COL > 11) && defined(PIN_COL11) && defined(COL11_KSO)
+
+#if (MAX_COL > 12) && defined(PIN_COL12) && defined(COL12_KSO)
+    KSM_COL_SET(12);
+#endif // (MAX_COL > 12) && defined(PIN_COL12) && defined(COL12_KSO)
+
+#if (MAX_COL > 13) && defined(PIN_COL13) && defined(COL13_KSO)
+    KSM_COL_SET(13);
+#endif // (MAX_COL > 13) && defined(PIN_COL13) && defined(COL13_KSO)
+
+#if (MAX_COL > 14) && defined(PIN_COL14) && defined(COL14_KSO)
+    KSM_COL_SET(14);
+#endif // (MAX_COL > 14) && defined(PIN_COL14) && defined(COL14_KSO)
+
+#if (MAX_COL > 15) && defined(PIN_COL15) && defined(COL15_KSO)
+    KSM_COL_SET(15);
+#endif // (MAX_COL > 15) && defined(PIN_COL15) && defined(COL15_KSO)
+
+#if (MAX_COL > 16) && defined(PIN_COL16) && defined(COL16_KSO)
+    KSM_COL_SET(16);
+#endif // (MAX_COL > 16) && defined(PIN_COL16) && defined(COL16_KSO)
+
+#if (MAX_COL > 17) && defined(PIN_COL17) && defined(COL17_KSO)
+    KSM_COL_SET(17);
+#endif // (MAX_COL > 17) && defined(PIN_COL17) && defined(COL17_KSO)
+
+#if (MAX_COL > 18) && defined(PIN_COL18) && defined(COL18_KSO)
+    KSM_COL_SET(18);
+#endif // (MAX_COL > 18) && defined(PIN_COL18) && defined(COL18_KSO)
+
+#if (MAX_COL > 19) && defined(PIN_COL19) && defined(COL19_KSO)
+    KSM_COL_SET(19);
+#endif // (MAX_COL > 19) && defined(PIN_COL19) && defined(COL19_KSO)
+
+#ifdef __cplusplus
+}
+#endif
+
+#undef __KEYBOARD_INIT_USAGE__
+#endif // __KEYBOARD_INIT_USAGE__
diff --git a/platform/atm2/ATM22xx-x1x/driver/led_blink/led_blink.h b/platform/atm2/ATM22xx-x1x/driver/led_blink/led_blink.h
new file mode 100644
index 0000000..278a792
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/driver/led_blink/led_blink.h
@@ -0,0 +1,84 @@
+/**
+ *******************************************************************************
+ *
+ * @file led_blink.h
+ *
+ * @brief LED control
+ *
+ * Copyright (C) Atmosic 2020-2021
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup LED LED driver
+ * @ingroup DRIVERS
+ * @brief ATM bluetooth framework LED driver
+ *
+ * This module contains the necessary function of LED.
+ *
+ * @{
+ *******************************************************************************
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// LED ID type
+typedef uint8_t led_id_t;
+
+/// LED enum
+enum {
+    /// LED_0
+    LED_0,
+    /// LED_1
+    LED_1,
+
+    /// LED_MAX
+    LED_MAX
+};
+
+/**
+ *******************************************************************************
+ * @brief Config LED blink parameter
+ * @param[in] id LED ID
+ * @param[in] hi_dur LED hi activity time(unit: 10ms)
+ * @param[in] low_dur LED low activity time(unit: 10ms)
+ * @param[in] times The count for Hi+Low LED activity
+ *******************************************************************************
+ */
+void led_blink(led_id_t id, uint16_t hi_dur, uint16_t low_dur, uint16_t times);
+
+/**
+ *******************************************************************************
+ * @brief Turn on LED
+ * @param[in] id LED ID
+ *******************************************************************************
+ */
+void led_on(led_id_t id);
+
+/**
+ *******************************************************************************
+ * @brief Turn off LED
+ * @param[in] id LED ID
+ *******************************************************************************
+ */
+void led_off(led_id_t id);
+
+/**
+ *******************************************************************************
+ * @brief Get LED status
+ * @param[in] id LED ID
+ * @return LED pin value.
+ *******************************************************************************
+ */
+bool led_status(led_id_t id);
+
+#ifdef __cplusplus
+}
+#endif
+
+///@} LED
diff --git a/platform/atm2/ATM22xx-x1x/driver/sw_event/sw_event.h b/platform/atm2/ATM22xx-x1x/driver/sw_event/sw_event.h
new file mode 100644
index 0000000..adcf1df
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/driver/sw_event/sw_event.h
@@ -0,0 +1,91 @@
+/**
+ ******************************************************************************
+ *
+ * @file sw_event.h
+ *
+ * @brief Atmosic Software Event Driver
+ *
+ * Copyright (C) Atmosic 2020
+ *
+ ******************************************************************************
+ */
+
+#ifndef __SW_EVENT_H__
+#define __SW_EVENT_H__
+
+/**
+ * @defgroup SW_EVENT Software Event APIs
+ * @ingroup DRIVERS
+ * @brief User driver for application to use software events
+ * @{
+ */
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Maximum number of concurrent events - adjust as needed
+#define SW_EVENT_ID_MAX	8
+
+/// Event ID type
+typedef uint8_t sw_event_id_t;
+
+/// Event triggered callback function type
+typedef void (*sw_event_func_t)(sw_event_id_t event_id, const void *ctx);
+
+/**
+ * @brief Allocate and configure event
+ * @param[in] handler  Event triggered callback (called from main event loop)
+ * @param[in] ctx      Context to pass to handler
+ * @return             Event ID
+ */
+sw_event_id_t sw_event_alloc(sw_event_func_t handler, const void *ctx);
+
+/**
+ * @brief Deallocate event
+ * @note Caller must guarantee that set/clear methods are not invoked from
+ *       an ISR while this method is running
+ * @param[in] event_id  Event ID from sw_event_alloc()
+ */
+void sw_event_free(sw_event_id_t event_id);
+
+/**
+ * @brief Reconfigure event handler and context
+ * @param[in] event_id  Event ID from sw_event_alloc()
+ * @param[in] handler   Event triggered callback (called from main event loop)
+ * @param[in] ctx       Context to pass to handler
+ */
+void sw_event_reconfig(sw_event_id_t event_id, sw_event_func_t handler,
+    const void *ctx);
+
+/**
+ * @brief Trigger event
+ * @note Safe to be called from ISR
+ * @param[in] event_id  Event ID from sw_event_alloc()
+ */
+void sw_event_set(sw_event_id_t event_id);
+
+/**
+ * @brief Clear event
+ * @note Safe to be called from ISR
+ * @param[in] event_id  Event ID from sw_event_alloc()
+ */
+void sw_event_clear(sw_event_id_t event_id);
+
+/**
+ * @brief Get event status
+ * @param[in] event_id  Event ID from sw_event_alloc()
+ * @return              True when event is valid and triggered
+ */
+bool sw_event_get(sw_event_id_t event_id);
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} SW_EVENT
+
+#endif // __SW_EVENT_H__
diff --git a/platform/atm2/ATM22xx-x1x/driver/sw_timer/sw_timer.h b/platform/atm2/ATM22xx-x1x/driver/sw_timer/sw_timer.h
new file mode 100644
index 0000000..1f249e5
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/driver/sw_timer/sw_timer.h
@@ -0,0 +1,95 @@
+/**
+ ******************************************************************************
+ *
+ * @file sw_timer.h
+ *
+ * @brief Atmosic Software Timer Driver
+ *
+ * Copyright (C) Atmosic 2020-2021
+ *
+ ******************************************************************************
+ */
+
+#ifndef __SW_TIMER_H__
+#define __SW_TIMER_H__
+
+/**
+ * @defgroup SW_TIMER Software Timer APIs
+ * @ingroup DRIVERS
+ * @brief User driver for application to use software timers
+ * @{
+ */
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Maximum number of concurrent timers - adjust as needed
+#ifndef SW_TIMER_ID_MAX
+#define SW_TIMER_ID_MAX 8
+#endif // SW_TIMER_ID_MAX
+
+/// Smallest granularity for sw_timer_set()
+#define SW_TIMER_10_MS 1
+/// Commonly used quantity for sw_timer_set()
+#define SW_TIMER_1_SEC 100
+
+/// Timer ID type
+typedef uint8_t sw_timer_id_t;
+
+/// Timer expired callback function type
+typedef void (*sw_timer_func_t)(sw_timer_id_t timer_id, const void *ctx);
+
+/**
+ * @brief Allocate and configure timer
+ * @param[in] handler  Timer expired callback (called from main event loop)
+ * @param[in] ctx      Context to pass to handler
+ * @return             Timer ID
+ */
+sw_timer_id_t sw_timer_alloc(sw_timer_func_t handler, const void *ctx);
+
+/**
+ * @brief Deallocate timer
+ * @param[in] timer_id  Timer ID from sw_timer_alloc()
+ */
+void sw_timer_free(sw_timer_id_t timer_id);
+
+/**
+ * @brief Reconfigure timer handler and context
+ * @param[in] timer_id  Timer ID from sw_timer_alloc()
+ * @param[in] handler   Timer expired callback (called from main event loop)
+ * @param[in] ctx       Context to pass to handler
+ */
+void sw_timer_reconfig(sw_timer_id_t timer_id, sw_timer_func_t handler,
+    const void *ctx);
+
+/**
+ * @brief Start one-shot timer running
+ * @param[in] timer_id  Timer ID from sw_timer_alloc()
+ * @param[in] centisec  Duration in hundredths of seconds
+ */
+void sw_timer_set(sw_timer_id_t timer_id, uint32_t centisec);
+
+/**
+ * @brief Stop/abort running timer
+ * @param[in] timer_id  Timer ID from sw_timer_alloc()
+ */
+void sw_timer_clear(sw_timer_id_t timer_id);
+
+/**
+ * @brief Get timer status
+ * @param[in] timer_id  Timer ID from sw_timer_alloc()
+ * @return              True when timer is valid and running
+ */
+bool sw_timer_active(sw_timer_id_t timer_id);
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} SW_TIMER
+
+#endif // __SW_TIMER_H__
diff --git a/platform/atm2/ATM22xx-x1x/driver/timer/timer.h b/platform/atm2/ATM22xx-x1x/driver/timer/timer.h
new file mode 100644
index 0000000..ac5d77c
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/driver/timer/timer.h
@@ -0,0 +1,266 @@
+/**
+ ******************************************************************************
+ *
+ * @file timer.h
+ *
+ * @brief Atmosic Timer Driver
+ *
+ * Copyright (C) Atmosic 2019-2022
+ *
+ ******************************************************************************
+ */
+
+#ifndef __TIMER_H__
+#define __TIMER_H__
+
+#include "at_wrpr.h"
+
+/**
+ * @defgroup TIMER HW Timer APIs
+ * @ingroup DRIVERS
+ * @brief User driver for application to use HW timers
+ * @{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Number of centisecond per second
+#define CS_PER_SEC 100
+
+/// Number of millisecond per second
+#define MS_PER_SEC 1000
+
+/// Number of millisecond per centisecond
+#define MS_PER_CS 10
+
+/// Number of microsecond per centisecond
+#define US_PER_CS 10000
+
+/// Number of microsecond per millisecond
+#define US_PER_MS 1000
+
+/// Number of second per minute
+#define SEC_PER_MIN 60
+
+/// Number of minute per hour
+#define MIN_PER_HOUR 60
+
+typedef enum {
+    ATM_TIMER0 = 0,
+    ATM_TIMER1 = 1,
+    ATM_DUALTIMER1 = 2,
+    ATM_DUALTIMER2 = 3,
+    ATM_SYSTICK = 4,
+    ATM_SLWTIMER = 5,   // Runs off 32Khz clock
+    ATM_TIMERS_MAX = 6
+} atm_timer_id_t;
+
+typedef enum {
+    ATM_TIMER_MODE_SINGLE_SHOT = 0,
+    ATM_TIMER_MODE_PERIODIC = 1,
+    ATM_TIMER_MODE_MAX = 2
+} atm_timer_mode_t;
+
+typedef enum {
+   ATM_TIMER_SUCCESS = 0,
+   ATM_TIMER_INVALID_PARAM = 1,
+   ATM_TIMER_RESOURCE_BUSY = 2,
+   ATM_TIMER_GENERIC_ERROR = 3
+} atm_timer_error_t;
+
+typedef void (*atm_timer_callback_t) (void *app_context);
+
+/**
+ * @brief Setup timer.
+ * @param[in] id                Timer ID
+ * @param[in] mode              SingleShot vs Periodic
+ * @param[in] timeout_handler   Application layer callback handler
+ *                              (called from interrupt context)
+ * @return                      Success or Error status
+ */
+atm_timer_error_t atm_timer_setup(atm_timer_id_t id, atm_timer_mode_t mode,
+                       atm_timer_callback_t timeout_handler);
+
+/**
+ * @brief Start timer.
+ * @param[in] id                Timer ID
+ * @param[in] timeout_us        Timer value in micro seconds
+ * @param[in] app_context       Application specific context
+ * @return                      Success or Error status
+ */
+atm_timer_error_t atm_timer_start(atm_timer_id_t id, uint32_t timeout_us,
+                       void *app_context);
+
+/**
+ * @brief Start dual timer with more accurate unit.(Only for single shot mode)
+ * @param[in] id                Dual timer ID
+ * @param[in] timeout_cycles    Timer value in cycles
+ */
+void atm_dual_timer_single_shot_quick_start(atm_timer_id_t id,
+    uint32_t timeout_cycles);
+
+/**
+ * @brief Stop timer.
+ * @param[in] id                Timer ID
+ * @return                      Success or Error status
+ */
+atm_timer_error_t atm_timer_stop(atm_timer_id_t id);
+
+/**
+ * @brief Busy wait using CMSDK_PSEQ->CURRENT_REAL_TIME.
+ * @param[in] msec  Delay value in milliseconds
+ * @return          Success or Error status
+ */
+atm_timer_error_t atm_timer_mdelay(uint32_t msec);
+
+/**
+ * @brief Busy wait using the Cortex-M0 SysTick.
+ * @param[in] usec  Delay value in microseconds
+ * @return          Success or Error status
+ */
+atm_timer_error_t atm_timer_udelay(uint32_t usec);
+
+/**
+ * @brief Sleep in WFI using a timer.
+ * @param[in] id    Timer ID
+ * @param[in] usec  Timer value in microseconds
+ * @return          Success or Error status
+ */
+atm_timer_error_t atm_timer_usleep(atm_timer_id_t id, uint32_t usec);
+
+// Permit customization for restrictive calling contexts
+// or to analyze rt{,1,2,3} locals
+#ifndef TIMER_ASSERT_ERR
+#define TIMER_ASSERT_ERR ASSERT_ERR
+#endif
+
+/**
+ * @brief Get the current system time based on the 32kHz clock
+ */
+__INLINE uint32_t atm_get_sys_time(void)
+{
+    // The high clock domain latch low clock domain signal directly
+    // would probably get bad value due to metastability. Considering
+    // the combinations, it could have 3 conditions:
+    // 1. bad -> good -> good
+    // 2. good -> good
+    // 3. good -> bad -> good -> good
+
+    uint32_t rt;
+    WRPR_CTRL_PUSH(CMSDK_PSEQ, WRPR_CTRL__CLK_ENABLE) {
+	GLOBAL_INT_DISABLE();
+	uint32_t rt1 = CMSDK_PSEQ->CURRENT_REAL_TIME;
+	rt = CMSDK_PSEQ->CURRENT_REAL_TIME;
+	if (rt != rt1) {
+	    uint32_t rt3 = CMSDK_PSEQ->CURRENT_REAL_TIME;
+	    if (rt != rt3) {
+		__UNUSED uint32_t rt2 = rt;
+		rt = CMSDK_PSEQ->CURRENT_REAL_TIME;
+		TIMER_ASSERT_ERR(rt == rt3);
+	    }
+	}
+	GLOBAL_INT_RESTORE();
+    } WRPR_CTRL_POP();
+    return rt;
+}
+
+#ifdef LPC_RCOS
+/**
+ * @brief Fetch LP clock frequency
+ *
+ * @return Value in Hz, or 0 when using a xtal
+ */
+uint32_t lpc_rcos_hz(void);
+
+#define TIMER_GET_LPC_FREQ ({ \
+    uint32_t lp_hz = lpc_rcos_hz(); \
+    lp_hz ? lp_hz : 32768; \
+})
+#else
+#define TIMER_GET_LPC_FREQ (32768)
+#endif
+
+/**
+ * @brief Busy wait using CMSDK_PSEQ->CURRENT_REAL_TIME.
+ * @param[in] ticks Delay value in counts of CMSDK_PSEQ->CURRENT_REAL_TIME.
+ * @return Success or Error status
+ */
+__INLINE void atm_timer_lpc_delay(uint32_t ticks)
+{
+    uint32_t then = atm_get_sys_time();
+    while (atm_get_sys_time() - then < ticks) {
+	YIELD();
+    }
+}
+
+/**
+ * @brief Translate centiseconds to ticks
+ * @param[in] cs Number of centiseconds
+ * @return LPC duration
+ */
+static inline uint32_t atm_cs_to_lpc(uint32_t cs)
+{
+    return ((uint64_t)cs * TIMER_GET_LPC_FREQ) / CS_PER_SEC;
+}
+
+/**
+ * @brief Translate milliseconds to ticks
+ * @param[in] ms Number of milliseconds
+ * @return LPC duration
+ */
+static inline uint32_t atm_ms_to_lpc(uint32_t ms)
+{
+    return ((uint64_t)ms * TIMER_GET_LPC_FREQ) / MS_PER_SEC;
+}
+
+/**
+ * @brief Translate microseconds to ticks
+ * @param[in] us Number of microseconds
+ * @return LPC duration
+ */
+static inline uint32_t atm_us_to_lpc(uint64_t us)
+{
+    return (us * TIMER_GET_LPC_FREQ) / (US_PER_MS * MS_PER_SEC);
+}
+
+/**
+ * @brief Translate ticks to centiseconds
+ * @param[in] lpc LPC duration
+ * @return Number of centiseconds
+ */
+static inline uint32_t atm_lpc_to_cs(uint32_t lpc)
+{
+    return ((uint64_t)lpc * CS_PER_SEC) / TIMER_GET_LPC_FREQ;
+}
+
+/**
+ * @brief Translate ticks to milliseconds
+ * @param[in] lpc LPC duration
+ * @return Number of milliseconds
+ */
+static inline uint32_t atm_lpc_to_ms(uint32_t lpc)
+{
+    return ((uint64_t)lpc * MS_PER_SEC) / TIMER_GET_LPC_FREQ;
+}
+
+/**
+ * @brief Translate ticks to microseconds
+ * @param[in] lpc LPC duration
+ * @return Number of microseconds
+ */
+static inline uint64_t atm_lpc_to_us(uint32_t lpc)
+{
+    return ((uint64_t)lpc * US_PER_MS * MS_PER_SEC) / TIMER_GET_LPC_FREQ;
+}
+
+#undef TIMER_GET_LPC_FREQ
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} TIMER
+
+#endif // __TIMER_H__
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/HID_remote.c b/platform/atm2/ATM22xx-x1x/examples/HID_remote/HID_remote.c
new file mode 100644
index 0000000..dee755d
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/HID_remote.c
@@ -0,0 +1,27 @@
+/**
+ *******************************************************************************
+ *
+ * @file HID_Remote.c
+ *
+ * @brief HID remote controller
+ *
+ * Copyright (C) Atmosic 2020-2021
+ *
+ *******************************************************************************
+ */
+#include "arch.h"
+#include "rc_mmi.h"
+
+static rep_vec_err_t rc_init(void)
+{
+    rc_mmi_init();
+
+    return RV_DONE;
+}
+
+int main(void)
+{
+    RV_APPM_INIT_ADD_LAST(rc_init);
+
+    return 0;
+}
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/makefile b/platform/atm2/ATM22xx-x1x/examples/HID_remote/makefile
new file mode 100644
index 0000000..30646bd
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/makefile
@@ -0,0 +1,380 @@
+################################################################################
+#
+# @file makefile
+#
+# @brief HID remote controller
+#
+# Copyright (C) Atmosic 2021-2023
+#
+################################################################################
+
+include ../../user/common.mk
+
+DEBUG := 1
+PROFILES := OTAPS DISS BASS HOGPD
+FRAMEWORK_MODULES := \
+	app_batt \
+	app_bass \
+	app_diss \
+	atm_adv \
+	atm_adv_param \
+	atm_asm \
+	atm_common \
+	atm_debug \
+	atm_gap \
+	atm_log \
+	ble_bass \
+	ble_diss \
+	ble_gap \
+	ble_gap_sec \
+	ble_hogpd \
+	ble_otaps \
+
+DRIVERS := \
+	atm_ble \
+	atm_gpio \
+	atm_pm \
+	atm_vkey \
+	batt_model \
+	gadc \
+	interrupt \
+	keyboard \
+	led_blink \
+	pdm \
+	sw_event \
+	sw_timer \
+	trng \
+
+OVERLAY_FILE ?= pinmap_$(BOARD)_overlay.h
+CFLAGS += -DPINMAP_$(BOARD)_OVERLAY="$(OVERLAY_FILE)"
+
+ifdef FLASHROM
+UU_TEST := HID_remote
+endif
+
+ifdef CFG_ATVRC
+CFG_ATVRC_FULL_FEAT := 1
+LPC_RCOS := 1
+FORCE_LPC_RCOS := 1
+BOARD := m2231
+endif
+
+ifdef CFG_ATVRC_BF
+CFG_ATVRC_FULL_FEAT := 1
+BOARD := m3231
+PV_HARV_EN := 1
+endif
+
+ifdef CFG_ATVRC_FULL_FEAT
+CFG_RC_IR := 1
+CFG_ATVRC_ATT := 1
+ifndef CFG_ATVRC_ATM_AUDIO
+CFG_ATVRC_AUDIO := 1
+endif
+CFG_ATVRC_CUSTOM := 1
+CFG_ATVRC_UNI_IR := 1
+CFG_ATVRC_NEC_IR_OVERRIDE := 1
+CFG_ATVRC_WAKEUP := 1
+
+ifdef USE_LIB
+REF_DESIGN_RCU_DIR := ../../../../..
+else
+REF_DESIGN_RCU_DIR := ../../../../../contrib/refDesignRcu
+endif
+SRC_ATVRC := src/atvrc
+INCLUDES += $(REF_DESIGN_RCU_DIR) $(SRC_ATVRC)
+CFLAGS += -DCFG_ATM_SDK -DCFG_VKEY_BUF -DCFG_OTA_SPEEDUP -DCFG_GAP_MAX_LL_MTU=247
+endif
+
+ifdef CFG_ATVRC_ATT
+FRAMEWORK_MODULES += atm_prfs ble_atmprfs
+CFLAGS += -DCFG_ATVRC_ATT
+ATVRC_C_SRCS += \
+	$(REF_DESIGN_RCU_DIR)/vendor/827x_ble_remote/app_att.c \
+	$(SRC_ATVRC)/bridge_att.c \
+	$(SRC_ATVRC)/bridge_timer.c \
+
+endif
+
+ifdef CFG_ATVRC_UNI_IR
+CFLAGS += -DCFG_ATVRC_UNI_IR
+C_SRCS += $(DRIVER_DIR)/ir/uni_ir.c
+ATVRC_C_SRCS += \
+	$(REF_DESIGN_RCU_DIR)/vendor/827x_ble_remote/app_ir.c \
+	$(SRC_ATVRC)/bridge_ir.c \
+
+endif
+
+ifdef CFG_ATVRC_CUSTOM
+CFLAGS += -DCFG_ATVRC_CUSTOM -DCFG_FLEX_VKEY_MAP
+ATVRC_C_SRCS += $(SRC_ATVRC)/atvrc_custom.c
+flash_nvds.data += C1-ATVRC_CUSTOM_DATA/g10
+endif
+
+ifdef CFG_ATVRC_NEC_IR_OVERRIDE
+CFLAGS += -DCFG_NEC_IR_OVERRIDE -DIR_DATA_CONST=
+flash_nvds.data += C2-ATVRC_NEC_IR_OVERRIDE/default
+endif
+
+ifdef CFG_ATVRC_WAKEUP
+CFLAGS += -DCFG_ATVRC_WAKEUP
+endif
+
+ifdef CFG_ATVRC_FIND_ME
+DRIVERS += buzzer
+CFLAGS += -DCFG_ATVRC_FIND_ME
+ATVRC_C_SRCS += \
+	$(REF_DESIGN_RCU_DIR)/vendor/827x_ble_remote/app_find_me/app_fms.c \
+	$(REF_DESIGN_RCU_DIR)/vendor/827x_ble_remote/app_find_me/app_imc.c \
+	$(SRC_ATVRC)/bridge_fms.c \
+
+endif
+
+ifneq (,$(filter -DAUTO_TEST,$(CFLAGS)))
+CFLAGS += -DCFG_PDM_LOCAL_TEST -DSW_TIMER_ID_MAX=13
+else
+ifdef CFG_ATVRC_ATT
+CFLAGS += -DSW_TIMER_ID_MAX=15
+else
+CFLAGS += -DSW_TIMER_ID_MAX=12
+endif
+endif
+
+SRC_TOP = src
+SRC_NONBT = src/non_bt
+SRC_BT = src/bt
+
+# Voice setting
+# HID_MSBC: mSBC over HID
+# HID_ADPCM: ADPCM over HID
+# otherwise: ADPCM over ATVV
+PDM_ADPCM := 1
+ifeq ($(CFG_VOICE),HID_MSBC)
+CFLAGS += -DCFG_VOHID -DCFG_PDM_MSBC -DCFG_PDM_INTP_TABLE_ALLOC
+C_SRCS += $(SRC_BT)/rc_hidau.c $(SRC_NONBT)/sbc_enc_wrapper.c
+override PDM_ADPCM :=
+ifdef FLASHROM
+UU_TEST += sbc_enc_wrapper rc_hidau
+endif
+
+else ifeq ($(CFG_VOICE),HID_ADPCM)
+CFLAGS += -DCFG_VOHID
+C_SRCS += $(SRC_BT)/rc_hidau.c
+
+ifdef FLASHROM
+UU_TEST += rc_hidau
+endif
+
+else # CFG_VOICE
+
+ifdef CFG_ATVRC_AUDIO
+CFLAGS += -DCFG_ATVRC_AUDIO
+ATVRC_C_SRCS += \
+	$(REF_DESIGN_RCU_DIR)/application/audio/gl_audio.c \
+	$(SRC_ATVRC)/bridge_audio.c \
+	$(SRC_BT)/rc_atvv.c \
+
+else
+C_SRCS += $(SRC_BT)/rc_atvv.c
+FRAMEWORK_MODULES += ble_atvvs
+PROFILES += ATVVS
+endif
+
+ifndef CFG_ATVV_VER_004
+CFLAGS += -DCFG_ATVV_VER_100
+endif
+
+ifdef CFG_ATVV_ASST_MODEL
+CFLAGS += -DCFG_ATVV_ASST_MODEL=$(CFG_ATVV_ASST_MODEL)
+endif
+
+ifdef CFG_RF_TEST
+CFLAGS += -DCFG_RF_TEST
+endif
+
+ifdef FLASHROM
+UU_TEST += rc_atvv
+endif
+
+endif # CFG_VOICE
+
+ifdef FLASHROM
+ifndef CFG_PDM_INTP_DISABLE
+UU_TEST += pdm_intp
+endif
+ifdef PDM_ADPCM
+UU_TEST += adpcm_enc
+endif
+endif # FLASHROM
+
+# power plan:
+# power_coin_none.mk
+# power_cone_pv.mk
+# power_hsc_3v3_pv.mk
+# power_hsc_3v8_pv.mk
+CFG_RC_POWER_FILE ?= power_coin_none.mk
+
+ifeq ($(wildcard $(CFG_RC_POWER_FILE)),)
+$(error $(CFG_RC_POWER_FILE) doesn't exist. Use one of [\
+	$(wildcard power*.mk)])
+endif
+
+include $(CFG_RC_POWER_FILE)
+
+ifneq (,$(filter m2202 m3202,$(BOARD)))
+VKEY_MAP_CFG := x202
+FLASH_SIZE = 0x80000
+# Keyboard, IR, PDM and LED
+CFLAGS += \
+	-DLED_UART_MUX \
+
+else ifneq (,$(filter m2221 m3221,$(BOARD)))
+VKEY_MAP_CFG := default
+ifndef FLASHROM
+FLASH_SIZE = 0x40000
+endif
+
+else ifneq (,$(filter m2231 m3231,$(BOARD)))
+VKEY_MAP_CFG := $(BOARD)
+ifndef FLASHROM
+ifdef PUYA_2MB
+FLASH_SIZE = 0x20000
+NVDS_SIZE = 4096
+else
+FLASH_SIZE = 0x40000
+endif
+endif
+OTA_DISCON_BEFORE_REBOOT := 1
+CFLAGS += \
+	-DCFG_ATVRC_MMI \
+	-DNUM_LEDS=2 \
+
+else ifneq (,$(filter x2xx_emu,$(BOARD)))
+VKEY_MAP_CFG := default
+ifndef FLASHROM
+FLASH_SIZE = 0x40000
+endif
+
+else
+$(error "usage: make $(MAKECMDGOALS) \
+	BOARD=<m2202|m3202|m2221|m3221|m2231|m3231>")
+endif
+
+CFLAGS += -DVKEY_MAP_FILE=rc_mmi_vkey_$(VKEY_MAP_CFG).h
+
+ifdef PV_HARV_EN
+$(error "PV_HARV_EN deprecated. Please use CFG_RC_POWER_FILE)
+endif
+
+ifdef CFG_RC_IR
+DRIVERS += ir timer
+C_SRCS += $(DRIVER_DIR)/ir/nec_ir.c $(DRIVER_DIR)/ir/ir_ctl.c
+ifdef CFG_ATVRC_UNI_IR
+ATVRC_C_SRCS += $(SRC_NONBT)/rc_ir.c
+else
+C_SRCS += $(SRC_NONBT)/rc_ir.c
+endif
+ifdef FLASHROM
+UU_TEST += rc_ir nec_ir ir_ctl
+endif
+# disable ATM_SLWTIMER, isr conflicts with pdm
+CFLAGS += \
+	-DCFG_RC_IR \
+	-DCFG_DIS_ATM_SLWTIMER \
+	-DATM_DUAL_TIMER_OVERRIDE_PRI=IRQ_PRI_RT \
+
+ifdef CFG_RC_IR_ON_HID
+CFLAGS += -DCFG_RC_IR_ON_HID
+endif # CFG_RC_IR_ON_HID
+endif
+
+ifdef CFG_ATVRC_FULL_FEAT
+EXCLUDE_APP_LIB_C_SRCS := $(ATVRC_C_SRCS)
+endif
+
+# Keyboard
+CFLAGS += -DCFG_KBD -DKSI_PULLUPS
+
+# Feature: ghostkey filter
+ifdef CFG_EN_GHOSTKEY
+CFLAGS += -DCFG_EN_GHOSTKEY
+DRIVERS += keyboard_ghostkey
+endif
+
+ifdef CFG_GHOSTKEY_MAX_DETECT
+CFLAGS += -DCFG_GHOSTKEY_MAX_DETECT=$(CFG_GHOSTKEY_MAX_DETECT)
+endif
+
+# BT
+CFLAGS += \
+	-DNO_ATM_SCAN \
+	-DNO_GAP_SEC_PASSKEY \
+	-DNO_GAP_SEC_NC \
+	-DCFG_GAP_PARAM_CONST=0 \
+	-DCFG_S_MAX_ENTRY=2 \
+	-DBLE_MSG_HANDLER_LIST_SIZE=10 \
+	-DCFG_RC_BIG_MTU \
+	-DCFG_RC_SLAVE_PARAM_NEGO \
+
+ifneq (,$(filter -DCFG_RC_BIG_MTU,$(CFLAGS)))
+FRAMEWORK_MODULES += ble_gattc
+else
+CFLAGS += -DNO_BLE_GATTC
+endif
+
+INCLUDES += \
+	$(SRC_TOP) \
+	$(SRC_BT) \
+	$(SRC_NONBT) \
+
+# define the files would not include to $(APP).a
+EXCLUDE_APP_LIB_C_SRCS += \
+	$(SRC_TOP)/rc_mmi.c \
+	$(SRC_TOP)/rc_mmi_vkey.c \
+
+ifdef FLASHROM
+UU_TEST += rc_mmi rc_mmi_vkey
+endif
+
+# Others would include to $(APP).a
+# Application : Non-BT part
+C_SRCS += \
+	$(SRC_NONBT)/rc_pdm.c \
+
+CFLAGS += \
+    -DCFG_ADV_DATA_PARAM_CONST=0 \
+
+ifdef FLASHROM
+UU_TEST += rc_pdm
+endif
+
+# Application: BT part
+C_SRCS += \
+	$(SRC_BT)/rc_gap.c \
+	$(SRC_BT)/rc_ota.c \
+	$(SRC_BT)/rc_hogp.c \
+
+ifdef FLASHROM
+UU_TEST += rc_gap rc_ota rc_hogp
+endif
+
+C_SRCS += $(EXCLUDE_APP_LIB_C_SRCS)
+
+CFLAGS += \
+	-DGAP_PARM_NAME="app_config.h" \
+	-DGAP_ADV_PARM_NAME="app_config.h" \
+	-DGAP_SCAN_PARM_NAME="app_config.h" \
+	-DAPP_VERSION=\"1.0.0.0\" \
+
+flash_nvds.data += \
+	02-DEVICE_NAME/remote \
+	11-SLEEP_ENABLE/hib \
+	12-EXT_WAKEUP_ENABLE/enable2 \
+
+ifdef NO_BROWNOUT
+CFLAGS += -DCFG_RC_NO_BROWNOUT
+endif
+include rc_test_mode.mk
+include $(COMMON_USER_DIR)/profiles.mk
+include $(COMMON_USER_DIR)/framework.mk
+
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/pinmap/pinmap_m2231_overlay.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/pinmap/pinmap_m2231_overlay.h
new file mode 100644
index 0000000..fb481d8
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/pinmap/pinmap_m2231_overlay.h
@@ -0,0 +1,34 @@
+/*
+ * This file should be auto-generated using a tool that consumes the pin
+ * selections in the JSON file
+ */
+
+#define PIN_PDM_POWER_SWITCH 22
+#define PIN_LPCOMP_IO 11
+#define PIN_LED0 27
+#define PIN_LED1 28
+#define PIN_IR_IO 26
+#ifdef CFG_ATVRC_FIND_ME
+#define PIN_BUZZER_IO 26 // IR LED
+// #define PIN_BUZZER_IO 27 // GREEN LED
+#endif
+#define PIN_ROW0 23
+#define PIN_ROW1 22
+#define PIN_ROW2 21
+#define PIN_ROW3 13
+#define PIN_ROW4 6
+#define PIN_COL0 29
+#define PIN_COL1 28
+#define PIN_COL2 9
+#define PIN_COL3 8
+#define PIN_COL4 7
+#define ROW0_KSI 0
+#define ROW1_KSI 1
+#define ROW2_KSI 2
+#define ROW3_KSI 6
+#define ROW4_KSI 13
+#define COL0_KSO 2
+#define COL1_KSO 3
+#define COL2_KSO 10
+#define COL3_KSO 11
+#define COL4_KSO 12
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/power_coin_none.mk b/platform/atm2/ATM22xx-x1x/examples/HID_remote/power_coin_none.mk
new file mode 100644
index 0000000..add83b1
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/power_coin_none.mk
@@ -0,0 +1,5 @@
+# PMU configuration
+PMU_CFG := VBAT_GT_1p8V_VDDIO_INT
+
+# battery driver
+DRIVERS += batt_model_coin
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/rc_test_mode.mk b/platform/atm2/ATM22xx-x1x/examples/HID_remote/rc_test_mode.mk
new file mode 100644
index 0000000..e6f34c6
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/rc_test_mode.mk
@@ -0,0 +1,3 @@
+
+CFLAGS += -DCFG_RC_TEST_MODE
+C_SRCS += $(SRC_BT)/rc_test_mode.c
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/app_config.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/app_config.h
new file mode 100644
index 0000000..371c7ef
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/app_config.h
@@ -0,0 +1,366 @@
+/**
+ *******************************************************************************
+ *
+ * @file app_config.h
+ *
+ * @brief Application configuration.
+ *
+ * Copyright (C) Atmosic 2021-2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+#include "ble_att.h"
+#include "sw_timer.h"
+
+// Connection Parameters Setting
+// Preferred connection parameter negotiation retry times.
+#ifndef RC_PARAM_NEGO_TIMES
+#define RC_PARAM_NEGO_TIMES 1
+#endif
+// Preferred connection parameter negotiation timeout time.
+#ifndef RC_PARAM_NEGO_TOUT_CS
+#define RC_PARAM_NEGO_TOUT_CS 300
+#endif
+
+// Preferred connection parameter negotiation delay time.
+#ifndef RC_PARAM_NEGO_DELAY_CS
+#define RC_PARAM_NEGO_DELAY_CS 100
+#endif
+
+// Timeout Settings
+
+// Timeout time after HID ready.
+// A timer with this timeout value will be set when link is connected and HID is
+// ready. When this timer occurs, system will disconnect link and go to hibernate.
+// The timer would be reset on any of user input.
+// If this value is zero, the link will always be maintained.
+#ifndef RC_CONN_READY_TOUT_CS
+#define RC_CONN_READY_TOUT_CS 0
+#endif
+
+// Timeout time after connected.
+// A timer with this timeout value will be set when link is connected but HID is
+// not ready. When this timer occurs, system will disconnect link and go to hibernate.
+// This timer will be clear after HID is ready.
+// If this value is zero, the link will always be maintained.
+#ifndef RC_CONN_NOT_READY_TOUT_CS
+#define RC_CONN_NOT_READY_TOUT_CS 0
+#endif
+
+// DISS configuration
+
+// Length of APP_DIS_MANUFACTURER_NAME
+#define APP_DIS_MANUFACTURER_NAME_LEN (sizeof(APP_DIS_MANUFACTURER_NAME) - 1)
+
+// Length of APP_DIS_MANUFACTURER_NAME
+#define APP_DIS_MODEL_NB_STR_LEN (sizeof(APP_DIS_MODEL_NB_STR) - 1)
+
+// Length of APP_DIS_MANUFACTURER_NAME
+#define APP_DIS_SERIAL_NB_STR_LEN (sizeof(APP_DIS_SERIAL_NB_STR) - 1)
+
+// Length of APP_DIS_MANUFACTURER_NAME
+#define APP_DIS_FIRM_REV_STR_LEN (sizeof(APP_DIS_FIRM_REV_STR) - 1)
+
+// Length of APP_DIS_MANUFACTURER_NAME
+#define APP_DIS_SYSTEM_ID_LEN (sizeof(APP_DIS_SYSTEM_ID) - 1)
+
+// Length of APP_DIS_MANUFACTURER_NAME
+#define APP_DIS_HARD_REV_STR_LEN (sizeof(APP_DIS_HARD_REV_STR) - 1)
+
+// Length of APP_DIS_MANUFACTURER_NAME
+#define APP_DIS_SW_REV_STR_LEN (sizeof(APP_DIS_SW_REV_STR) - 1)
+
+// Length of APP_DIS_MANUFACTURER_NAME
+#define APP_DIS_IEEE_LEN (sizeof(APP_DIS_IEEE) - 1)
+
+// Length of APP_DIS_MANUFACTURER_NAME
+#define APP_DIS_PNP_ID_LEN (sizeof(APP_DIS_PNP_ID) - 1)
+
+// Manufacturer Name Value
+#define APP_DIS_MANUFACTURER_NAME "Atmosic Tech."
+
+// Model Number String Value
+#define APP_DIS_MODEL_NB_STR "ATV-RC-01"
+
+// Serial Number
+#define APP_DIS_SERIAL_NB_STR "1.0.0.0"
+
+#ifdef CFG_NONRF_HARV
+// Firmware Revision
+#define APP_DIS_FIRM_REV_STR APP_VERSION"PV"
+// Software Revision String
+#define APP_DIS_SW_REV_STR APP_VERSION"PV"
+#else
+// Firmware Revision
+#define APP_DIS_FIRM_REV_STR APP_VERSION
+// Software Revision String
+#define APP_DIS_SW_REV_STR APP_VERSION
+#endif
+
+// Hardware Revision String
+#define APP_DIS_HARD_REV_STR "1.0.0"
+
+// System ID Value
+#define APP_DIS_SYSTEM_ID "\x12\x34\x56\xFF\xFE\x9A\xBC\xDE"
+
+// IEEE
+#define APP_DIS_IEEE "\xFF\xEE\xDD\xCC\xBB\xAA"
+
+/**
+ * PNP ID Value - LSB -> MSB
+ * Vendor ID Source : 0x01 (bluetooth SIG)
+ * Vendor ID : 0x7545
+ * Product ID : 0x0021
+ * Product Version : 0x0110
+ */
+#define APP_DIS_PNP_ID "\x01\x45\x75\x21\x00\x10\x01"
+
+// Feature enabled
+#define APP_DIS_FEATURES DIS_MANUFACTURER_NAME_CHAR_SUP | \
+    DIS_MODEL_NB_STR_CHAR_SUP | DIS_SERIAL_NB_STR_CHAR_SUP | \
+    DIS_HARD_REV_STR_CHAR_SUP | DIS_FIRM_REV_STR_CHAR_SUP | \
+    DIS_SW_REV_STR_CHAR_SUP | DIS_SYSTEM_ID_CHAR_SUP | \
+    DIS_IEEE_CHAR_SUP | DIS_PNP_ID_CHAR_SUP
+
+// Security level
+#define APP_DIS_SEC_PROPERTY BLE_SEC_PROP_NO_SECURITY
+
+// BASS configuration
+
+// Security level
+#define APP_BASS_SEC_PROPERTY SEC_PROFLE_LEVEL
+
+// OTAP configuration
+
+// OTA board identifier
+#define RC_OTA_BOARD_ID 02
+
+// Atm_gap configuration
+
+// Maximal support BT profiles
+#ifdef CFG_ATVRC_ATT
+#define CFG_GAP_MAX_MODULES 6
+#else
+#define CFG_GAP_MAX_MODULES 5
+#endif
+
+// Appearance Icon
+#define CFG_GAP_APPEARANCE 0x180
+
+// Pairing Mode
+#define CFG_GAP_PAIRING_MODE  (BLE_GAP_PAIRING_LEGACY)
+
+// Minimal connection interval
+#define CFG_GAP_CONN_INT_MIN 8
+
+// Maximal connection interval
+#define CFG_GAP_CONN_INT_MAX 8
+
+// Peripheral latency
+#define CFG_GAP_PERIPH_LATENCY 99
+
+// Connection timeout
+#define CFG_GAP_CONN_TIMEOUT 300
+
+// GAP attribute connfiguration
+#ifdef CFG_RC_BIG_MTU
+#define CFG_GAP_ATT_CFG BLE_GAP_ATT_PERIPH_PREF_CON_PAR_EN_MASK \
+    | BLE_GAP_ATT_CLI_AUTO_MTU_EXCH_EN_MASK
+#else
+#define CFG_GAP_ATT_CFG BLE_GAP_ATT_PERIPH_PREF_CON_PAR_EN_MASK
+// Maximal transmit octets
+#define CFG_GAP_MAX_TX_OCTETS BLE_MIN_OCTETS
+// Maximal transmit time
+#define CFG_GAP_MAX_TX_TIME BLE_MIN_TIME
+// Maximize MTU (comply with 4.2)
+#define CFG_GAP_MAX_LL_MTU 247
+#endif
+
+// Atm_adv configuration
+
+// ADV payload - UUID
+#define RC_HID_ADV_DAT_UUID 0x03, 0x03, 0x12, 0x18
+
+// ADV payload - Appearance
+#define RC_HID_ADV_DAT_APPEARANCE 0x03, 0x19, 0x80, 0x01
+
+// ADV payload - Atmosic Vendor Application ID info
+#define RC_HID_ADV_DAT_MANU 0x06, 0xFF, 0x0A, 0x24, 0x01, 0x03, 0x00
+
+// Non constant ADV creation parameter
+#define CFG_ADV_CREATE_PARAM_CONST 0
+
+// Maximal ADV instances
+#ifdef CFG_ATVRC_WAKEUP
+#define CFG_GAP_ADV_MAX_INST 5
+#else
+#define CFG_GAP_ADV_MAX_INST 2
+#endif
+
+// ADV0 configuration (for reconnection)
+
+// Owner address
+#define CFG_ADV0_OWNER_ADDR_TYPE BLE_OWN_STATIC_ADDR
+
+// parameters for creation
+#ifdef CFG_ATVRC_WAKEUP
+#define CFG_ADV0_CREATE_PROPERTY ADV_LEGACY_DIR_CONN_MASK
+#else
+#define CFG_ADV0_CREATE_PROPERTY ADV_LEGACY_DIR_CONN_HDC_MASK
+#endif
+#define CFG_ADV0_CREATE_CHNL_MAP ADV_ALL_CHNLS
+#define CFG_ADV0_CREATE_MAX_TX_POWER 0
+#define CFG_ADV0_CREATE_DISCOVERY_MODE ADV_MODE_NON_DISC
+
+// ADV timeout duration
+#ifdef CFG_ATVRC_WAKEUP
+#define CFG_ADV0_START_DURATION 300
+#else
+#define CFG_ADV0_START_DURATION 12000
+#endif
+
+// ADV data payload
+#define CFG_ADV0_DATA_ADV_PAYLOAD RC_HID_ADV_DAT_UUID, \
+    RC_HID_ADV_DAT_APPEARANCE, RC_HID_ADV_DAT_MANU
+
+// Scan response enabling
+#define CFG_ADV0_DATA_SCANRSP_ENABLE 0
+
+// ADV1 (for pairing)
+
+// Owner address
+#define CFG_ADV1_OWNER_ADDR_TYPE BLE_OWN_STATIC_ADDR
+
+// parameters for creation
+#define CFG_ADV1_CREATE_PROPERTY ADV_LEGACY_UNDIR_CONN_MASK
+#define CFG_ADV1_CREATE_CHNL_MAP ADV_ALL_CHNLS
+#define CFG_ADV1_CREATE_MAX_TX_POWER 0
+#define CFG_ADV1_CREATE_FILTER_POLICY FILTER_SCAN_ANY_CON_ANY
+
+// ADV timeout duration
+#ifdef CFG_ATVRC_MMI
+#define CFG_ADV1_START_DURATION 18000
+#else
+#define CFG_ADV1_START_DURATION 6000
+#endif
+
+#ifdef CFG_ATVRC_WAKEUP
+#define CFG_ADV1_CREATE_DISCOVERY_MODE ADV_MODE_LIM_DISC
+#define UUID_HID 0x12, 0x18
+#define UUID_BATTERY 0x0F, 0x18
+#define RC_SRV_HID_BAT 0x05, 0x02, UUID_HID, UUID_BATTERY
+// ADV data payload
+#define CFG_ADV1_DATA_ADV_PAYLOAD RC_HID_ADV_DAT_APPEARANCE, RC_SRV_HID_BAT
+
+// Scan response enabling
+#define CFG_ADV1_DATA_SCANRSP_ENABLE 0
+
+// Google wake up packet configuration
+#define CFG_ADV2_OWNER_ADDR_TYPE BLE_OWN_STATIC_ADDR
+#define CFG_ADV2_CREATE_TYPE ADV_TYPE_LEGACY
+#define CFG_ADV2_CREATE_PROPERTY ADV_LEGACY_UNDIR_CONN_MASK
+#define CFG_ADV2_CREATE_FILTER_POLICY FILTER_SCAN_ANY_CON_ANY
+#define CFG_ADV2_CREATE_DISCOVERY_MODE ADV_MODE_BEACON
+#define CFG_ADV2_CREATE_CHNL_MAP ADV_ALL_CHNLS
+#define CFG_ADV2_CREATE_PRIM_PHY BLE_GAP_PHY_LE_1MBPS
+#define CFG_ADV2_CREATE_INTERVAL_MIN (ADV_INTERVAL_MIN * 2)
+#define CFG_ADV2_CREATE_INTERVAL_MAX (ADV_INTERVAL_MIN * 2)
+#define CFG_ADV2_CREATE_MAX_TX_POWER 0
+#define CFG_ADV2_CREATE_SEC_MAX_SKIP 0
+#define CFG_ADV2_CREATE_SEC_PHY BLE_GAP_PHY_LE_1MBPS
+#define CFG_ADV2_CREATE_SEC_ADV_SID 0
+#define CFG_ADV2_CREATE_PERI_INTERVAL_MIN 80
+#define CFG_ADV2_CREATE_PERI_INTERVAL_MAX 80
+#define CFG_ADV2_CREATE_PEER_ADDR_TYPE 0
+#define CFG_ADV2_CREATE_PEER_ADDR 0
+
+#define CFG_ADV2_START_DURATION 300
+#define CFG_ADV2_START_MAX_ADV_EVENT 0
+
+#define CFG_ADV2_DATA_ADV_ENABLE 1
+#define CFG_ADV2_DATA_SCANRSP_ENABLE 0
+
+#define UUID_WAKEUP_SRV 0x36, 0xFD
+#define PACKET_FORMAT_VER 0x01
+#define DUMMY_KEY_ID 0xFF
+#define DUMMY_KEY_PRESS_CNT 0xFF
+#define DUMMY_PEER_BD_ADDR 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+
+#define RC_SRV_DATA_WAKEUP_SRV 0x0C, 0x16, UUID_WAKEUP_SRV, PACKET_FORMAT_VER, \
+    DUMMY_KEY_ID, DUMMY_KEY_PRESS_CNT, DUMMY_PEER_BD_ADDR
+#define CFG_ADV2_DATA_ADV_PAYLOAD RC_SRV_DATA_WAKEUP_SRV
+
+// Customized wake up packet configuration
+#define CFG_ADV3_OWNER_ADDR_TYPE BLE_OWN_STATIC_ADDR
+#define CFG_ADV3_CREATE_TYPE ADV_TYPE_LEGACY
+#define CFG_ADV3_CREATE_PROPERTY ADV_LEGACY_UNDIR_CONN_MASK
+#define CFG_ADV3_CREATE_FILTER_POLICY FILTER_SCAN_ANY_CON_ANY
+#define CFG_ADV3_CREATE_DISCOVERY_MODE ADV_MODE_NON_DISC
+#define CFG_ADV3_CREATE_CHNL_MAP ADV_ALL_CHNLS
+#define CFG_ADV3_CREATE_PRIM_PHY BLE_GAP_PHY_LE_1MBPS
+#define CFG_ADV3_CREATE_INTERVAL_MIN (ADV_INTERVAL_MIN * 2)
+#define CFG_ADV3_CREATE_INTERVAL_MAX (ADV_INTERVAL_MIN * 2)
+#define CFG_ADV3_CREATE_MAX_TX_POWER 0
+#define CFG_ADV3_CREATE_SEC_MAX_SKIP 0
+#define CFG_ADV3_CREATE_SEC_PHY BLE_GAP_PHY_LE_1MBPS
+#define CFG_ADV3_CREATE_SEC_ADV_SID 0
+#define CFG_ADV3_CREATE_PERI_INTERVAL_MIN 80
+#define CFG_ADV3_CREATE_PERI_INTERVAL_MAX 80
+#define CFG_ADV3_CREATE_PEER_ADDR_TYPE 0
+#define CFG_ADV3_CREATE_PEER_ADDR 0
+
+#define CFG_ADV3_START_DURATION 300
+#define CFG_ADV3_START_MAX_ADV_EVENT 0
+
+#define CFG_ADV3_DATA_ADV_ENABLE 1
+#define CFG_ADV3_DATA_SCANRSP_ENABLE 0
+#define CFG_ADV3_DATA_ADV_PAYLOAD 0
+
+// MTK wake up packet configuration
+#define CFG_ADV4_OWNER_ADDR_TYPE BLE_OWN_STATIC_ADDR
+#define CFG_ADV4_CREATE_TYPE ADV_TYPE_LEGACY
+#define CFG_ADV4_CREATE_PROPERTY ADV_LEGACY_UNDIR_CONN_MASK
+#define CFG_ADV4_CREATE_FILTER_POLICY FILTER_SCAN_ANY_CON_ANY
+#define CFG_ADV4_CREATE_DISCOVERY_MODE ADV_MODE_NON_DISC
+#define CFG_ADV4_CREATE_CHNL_MAP ADV_ALL_CHNLS
+#define CFG_ADV4_CREATE_PRIM_PHY BLE_GAP_PHY_LE_1MBPS
+#define CFG_ADV4_CREATE_INTERVAL_MIN (ADV_INTERVAL_MIN * 2)
+#define CFG_ADV4_CREATE_INTERVAL_MAX (ADV_INTERVAL_MIN * 2)
+#define CFG_ADV4_CREATE_MAX_TX_POWER 0
+#define CFG_ADV4_CREATE_SEC_MAX_SKIP 0
+#define CFG_ADV4_CREATE_SEC_PHY BLE_GAP_PHY_LE_1MBPS
+#define CFG_ADV4_CREATE_SEC_ADV_SID 0
+#define CFG_ADV4_CREATE_PERI_INTERVAL_MIN 80
+#define CFG_ADV4_CREATE_PERI_INTERVAL_MAX 80
+#define CFG_ADV4_CREATE_PEER_ADDR_TYPE 0
+#define CFG_ADV4_CREATE_PEER_ADDR 0
+
+#define CFG_ADV4_START_DURATION 1000
+#define CFG_ADV4_START_MAX_ADV_EVENT 0
+
+#define CFG_ADV4_DATA_ADV_ENABLE 1
+#define RC_SRV_HID 0x03, 0x02, UUID_HID
+#define KEY_ID_POWER 0xFF, 0xFF
+#define RC_MTK_MANUF_DATA 0x13, 0xFF, 0x46, 0x00, 0x00, DUMMY_PEER_BD_ADDR, \
+    KEY_ID_POWER, 0x00, 0x00, 'C', 'R', 'K', 'T', 'M'
+#define CFG_ADV4_DATA_ADV_PAYLOAD RC_HID_ADV_DAT_APPEARANCE, RC_SRV_HID, \
+    RC_MTK_MANUF_DATA
+
+#define CFG_ADV4_DATA_SCANRSP_ENABLE 1
+#define RC_LOCAL_NAME_MTK_RC 0x0F, 0x09, 'M', 'T', 'K', ' ', 'B', 'L', 'E', \
+    ' ', 'R', 'e', 'm', 'o', 't', 'e'
+#define CFG_ADV4_DATA_SCANRSP_PAYLOAD RC_LOCAL_NAME_MTK_RC
+
+#else // CFG_ATVRC_WAKEUP
+// ADV data payload
+#define CFG_ADV1_DATA_ADV_PAYLOAD RC_HID_ADV_DAT_UUID, \
+    RC_HID_ADV_DAT_APPEARANCE, RC_HID_ADV_DAT_MANU
+
+// Scan response enabling
+#define CFG_ADV1_DATA_SCANRSP_ENABLE 1
+
+// Scan response payload
+#define CFG_ADV1_DATA_SCANRSP_PAYLOAD RC_HID_ADV_DAT_UUID, RC_HID_ADV_DAT_APPEARANCE
+#endif // CFG_ATVRC_WAKEUP
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/atvrc_custom.c b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/atvrc_custom.c
new file mode 100644
index 0000000..93b9da7
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/atvrc_custom.c
@@ -0,0 +1,253 @@
+/**
+ *******************************************************************************
+ *
+ * @file atvrc_custom.c
+ *
+ * @brief Android TV remote customization data management
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+
+#include "arch.h"
+#include "atvrc_custom.h"
+#include "gap.h"
+#include "nvds.h"
+#include "rc_gap.h"
+#include "rc_keycode.h"
+#include "timer.h"
+
+#define ATVRC_CUSTOM_WAKE_PACKET_SIZE_MAX (31 - 4)
+#define ATVRC_AUTHENTICATION_KEY_SIZE 16
+#define ATVRC_ENCRYPTION_KEY_SIZE 16
+#define ATVRC_ECDSA_PUBLIC_KEY_SIZE 64
+
+typedef struct
+{
+    uint8_t dev_type;
+    uint8_t pnp_id[ATVRC_PNP_ID_LEN];
+    uint8_t dev_name_len;
+    uint8_t dev_name[ATVRC_DEV_NAME_LEN_MAX];
+    uint8_t dev_ui_layout;
+    uint16_t wake_key_1;
+    uint16_t wake_key_2;
+    uint8_t wake_pkt_len;
+    uint8_t key_id_oft;
+    uint8_t key_cnt_oft;
+    uint8_t peer_addr_oft;
+    uint8_t wake_pkt_data[ATVRC_CUSTOM_WAKE_PACKET_SIZE_MAX];
+    uint16_t period_wake_interval;
+    uint8_t period_wake;
+    uint8_t rpa_switch;
+    uint8_t disable_ble;
+    uint8_t wake_pkt_send_mode;
+    uint8_t cache_pwr;
+    uint8_t auth_key[ATVRC_AUTHENTICATION_KEY_SIZE];
+    uint8_t encrypt_key[ATVRC_ENCRYPTION_KEY_SIZE];
+    uint8_t ecdsa_pub_key[ATVRC_ECDSA_PUBLIC_KEY_SIZE];
+} __PACKED atvrc_custom_data_t;
+
+static atvrc_custom_data_t custom_data;
+static uint8_t fw_rev[ATVRC_FW_REV_STR_LEN] = {'V', '1', '.', '0', '0'};
+
+#define WAKE_KEY_NUM 12
+static uint32_t wake_key_bt_id[WAKE_KEY_NUM] = {
+    BT_ASST,
+    BT_HOME,
+    BT_POWER,
+    BT_INPUT,
+    BT_YOUTUBE,
+    BT_NETFLIX,
+    BT_APP03,
+    BT_APP04,
+    BT_BLUE,
+    BT_GREEN,
+    BT_RED,
+    BT_YELLOW,
+};
+
+#define NVDS_TAG_ATVRC_CUSTOM_DATA 0xC1
+void atvrc_custom_init(void)
+{
+    nvds_tag_len_t len = sizeof(atvrc_custom_data_t);
+    nvds_get(NVDS_TAG_ATVRC_CUSTOM_DATA, &len, (uint8_t*)&custom_data);
+#define FW_REV_MINOR_TEN_DIGIT 3
+#define FW_REV_MINOR_UNIT_DIGIT 4
+#define ASCII_BASE 0x30
+    fw_rev[FW_REV_MINOR_TEN_DIGIT] = custom_data.dev_type + ASCII_BASE;
+    fw_rev[FW_REV_MINOR_UNIT_DIGIT] = custom_data.dev_ui_layout + ASCII_BASE;
+    DEBUG_TRACE("Device type: %d", custom_data.dev_type);
+    DEBUG_TRACE("Vendor source: %d", custom_data.pnp_id[0]);
+    DEBUG_TRACE("VID: %02X%02X", custom_data.pnp_id[2], custom_data.pnp_id[1]);
+    DEBUG_TRACE("PID: %02X%02X", custom_data.pnp_id[4], custom_data.pnp_id[3]);
+    DEBUG_TRACE("PVer: %02X%02X", custom_data.pnp_id[6], custom_data.pnp_id[5]);
+    DEBUG_TRACE("Device name length: %d", custom_data.dev_name_len);
+    DEBUG_TRACE("Device name :");
+#if PLF_DEBUG
+    for (uint8_t i = 0; i < ATVRC_DEV_NAME_LEN_MAX; i++) {
+	printf("%c", custom_data.dev_name[i]);
+    }
+    printf("\n");
+#endif
+    DEBUG_TRACE("UI layout: %d", custom_data.dev_ui_layout);
+    DEBUG_TRACE("Wake key 1: %04X", custom_data.wake_key_1);
+    DEBUG_TRACE("Wake key 2: %04X", custom_data.wake_key_2);
+    DEBUG_TRACE("Wake packet len: %d", custom_data.wake_pkt_len);
+    DEBUG_TRACE("Key ID offset: %d", custom_data.key_id_oft);
+    DEBUG_TRACE("Key press count offset: %d", custom_data.key_cnt_oft);
+    DEBUG_TRACE("Peer Addr. offset: %d", custom_data.peer_addr_oft);
+    DEBUG_TRACE("Customized wakeup packet :");
+#if PLF_DEBUG
+    for (uint8_t i = 0; i < ATVRC_CUSTOM_WAKE_PACKET_SIZE_MAX; i++) {
+	printf("%02X ", custom_data.wake_pkt_data[i]);
+    }
+    printf("\n");
+#endif
+#define PERIOD_WAKE_INTERVEL_MINIMAL_MIN 5
+#define PERIOD_WAKE_INTERVEL_MAXIMAL_MIN 0x5A0
+#define PERIOD_WAKE_INTERVEL_DEFAULT_MIN 30
+    if ((custom_data.period_wake_interval < PERIOD_WAKE_INTERVEL_MINIMAL_MIN) ||
+	(custom_data.period_wake_interval > PERIOD_WAKE_INTERVEL_MAXIMAL_MIN)) {
+	custom_data.period_wake_interval = PERIOD_WAKE_INTERVEL_DEFAULT_MIN;
+    }
+    DEBUG_TRACE("Periodic wakeup interval: %d", custom_data.period_wake_interval);
+    DEBUG_TRACE("Periodic wakeup: %02X", custom_data.period_wake);
+    DEBUG_TRACE("RCU RPA switch: %02X", custom_data.rpa_switch);
+    DEBUG_TRACE("Disable BLE: %02X", custom_data.disable_ble);
+    DEBUG_TRACE("Wakeup sending mode: %02X", custom_data.wake_pkt_send_mode);
+    DEBUG_TRACE("Catch power switch: %02X", custom_data.cache_pwr);
+}
+
+uint8_t atvrc_custom_get_device_type(void)
+{
+    return custom_data.dev_type;
+}
+
+uint8_t *atvrc_custom_get_pnp(void)
+{
+    return custom_data.pnp_id;
+}
+
+uint8_t atvrc_custom_get_dev_name(nvds_tag_len_t *len, uint8_t *name)
+{
+    DEBUG_TRACE("%s: %s", __func__, custom_data.dev_name);
+    if (!custom_data.dev_name_len) {
+	DEBUG_TRACE("%s: FAIL", __func__);
+	return NVDS_FAIL;
+    }
+
+    if (custom_data.dev_name_len > *len) {
+	DEBUG_TRACE("%s: LENGTH_OUT_OF_RANGE", __func__);
+	return NVDS_LENGTH_OUT_OF_RANGE;
+    }
+
+    *len = custom_data.dev_name_len;
+    memcpy(name, custom_data.dev_name, *len);
+    return NVDS_OK;
+}
+
+uint8_t atvrc_custom_get_ui_layout(void)
+{
+    return custom_data.dev_ui_layout;
+}
+
+uint8_t *atvrc_custom_get_fw_rev(void)
+{
+    return fw_rev;
+}
+
+static bool is_mtk_wake(void)
+{
+    uint16_t product_ver = (custom_data.pnp_id[6] << 8) + custom_data.pnp_id[5];
+#define PRODUCT_VER_MTK_FORMAT 0x0101
+    return product_ver == PRODUCT_VER_MTK_FORMAT;
+}
+
+#define FEATURE_DISABLED 0xFFFF
+uint8_t atvrc_custom_check_wake_key(uint32_t bt_key)
+{
+    if (is_mtk_wake()) {
+	if (bt_key == BT_POWER) {
+	    return ATVRC_WAKE_MTK_POWER;
+	}
+	if (bt_key == BT_NETFLIX) {
+	    return ATVRC_WAKE_MTK_NETFLIX;
+	}
+	return ATVRC_WAKE_NOT_WAKE_KEY;
+    }
+    if (!custom_data.wake_key_1 && !custom_data.wake_key_2 &&
+	(custom_data.wake_key_1 == FEATURE_DISABLED) &&
+	(custom_data.wake_key_2 == FEATURE_DISABLED)) {
+	return ATVRC_WAKE_NOT_WAKE_KEY;
+    }
+    for (uint8_t i = 0; i < WAKE_KEY_NUM; i++) {
+	if (wake_key_bt_id[i] == bt_key) {
+	    if (custom_data.wake_key_1 & (1 << i)) {
+		return ATVRC_WAKE_KEY1;
+	    }
+	    if (custom_data.wake_key_2 & (1 << i)) {
+		return ATVRC_WAKE_KEY2;
+	    }
+	}
+    }
+    return ATVRC_WAKE_NOT_WAKE_KEY;
+}
+
+bool atvrc_custom_is_cwake(void)
+{
+    return custom_data.wake_pkt_len;
+}
+
+bool atvrc_custom_is_cwake_only(void)
+{
+    return !custom_data.wake_pkt_send_mode;
+}
+
+#define AD_FLAG_LEN 3
+#define ATVRC_DISABLED 0xFF
+uint8_t atvrc_custom_set_cwake_pkt(uint8_t *data, uint8_t key_id,
+    uint8_t key_cnt, uint8_t const *addr)
+{
+    ASSERT_ERR(custom_data.wake_pkt_len > AD_FLAG_LEN);
+
+    memcpy(data, custom_data.wake_pkt_data + AD_FLAG_LEN,
+	custom_data.wake_pkt_len - AD_FLAG_LEN);
+    if (custom_data.key_id_oft != ATVRC_DISABLED) {
+	data[custom_data.key_id_oft - AD_FLAG_LEN] = key_id;
+    }
+    if (custom_data.key_cnt_oft != ATVRC_DISABLED) {
+	data[custom_data.key_cnt_oft - AD_FLAG_LEN] = key_cnt;
+    }
+    if (custom_data.peer_addr_oft != ATVRC_DISABLED) {
+	memcpy(data + custom_data.peer_addr_oft - AD_FLAG_LEN, addr,
+	    GAP_BD_ADDR_LEN);
+    }
+    return custom_data.wake_pkt_len - AD_FLAG_LEN;
+}
+
+#define ATVRC_ENABLED 1
+bool atvrc_custom_is_period_wake(void)
+{
+    return custom_data.period_wake == ATVRC_ENABLED;
+}
+
+uint16_t atvrc_custom_get_wake_interval(void)
+{
+    return custom_data.period_wake_interval;
+}
+
+bool atvrc_custom_is_rpa_enabled(void)
+{
+    return custom_data.rpa_switch == ATVRC_ENABLED;
+}
+
+bool atvrc_custom_is_ble_adv_enabled(void)
+{
+    return custom_data.disable_ble;
+}
+
+bool atvrc_custom_is_cache_pwr(void)
+{
+    return custom_data.cache_pwr;
+}
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/atvrc_custom.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/atvrc_custom.h
new file mode 100644
index 0000000..417da91
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/atvrc_custom.h
@@ -0,0 +1,139 @@
+/**
+ *******************************************************************************
+ *
+ * @file atvrc_custom.c
+ *
+ * @brief Android TV remote customization data interface
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+#define ATVRC_PNP_ID_LEN 7
+#define ATVRC_DEV_NAME_LEN_MAX 16
+#define ATVRC_FW_REV_STR_LEN 5
+
+#define ATVRC_LED_KEY_CS 10
+#define ATVRC_LED_KEY_BLINK 1
+#define ATVRC_LED_CFM_CS 10
+#define ATVRC_LED_CFM_BLINK 2
+#define ATVRC_LED_ERR_CS 5
+#define ATVRC_LED_ERR_BLINK 4
+
+/**
+ * @brief Customization data initialization.
+ */
+void atvrc_custom_init(void);
+
+/**
+ * @brief Get device type
+ *
+ * @return Device type
+ */
+uint8_t atvrc_custom_get_device_type(void);
+
+/**
+ * @brief Get PNP ID
+ *
+ * @return PNP ID data pointer
+ */
+uint8_t *atvrc_custom_get_pnp(void);
+
+/**
+ * @brief Get device name
+ *
+ * @param[inout] len Input: device name length maximum, Output: actual device
+ * name length
+ * @param[out] name Device name data pointer
+ * @return Status
+ */
+uint8_t atvrc_custom_get_dev_name(uint16_t *len, uint8_t *name);
+
+/**
+ * @brief Get UI layout bitmap
+ *
+ * @return UI layout bitmap
+ */
+uint8_t atvrc_custom_get_ui_layout(void);
+
+/**
+ * @brief Get firmware revision string
+ *
+ * @return Firmware revision string pointer
+ */
+uint8_t *atvrc_custom_get_fw_rev(void);
+
+/**
+ * @brief Check wake up key and set wake up configuration
+ *
+ * @param[in] bt_key BT keycode of pressed key
+ *
+ * @return Wake key ID or not a wake key
+ */
+uint8_t atvrc_custom_check_wake_key(uint32_t bt_key);
+
+/**
+ * @brief Is cutomized wake up
+ *
+ * @return True if customized wake up configuration exists, otherwise false
+ */
+bool atvrc_custom_is_cwake(void);
+
+/**
+ * @brief Is sending customized wake up packet only
+ *
+ * @return True for sending customized wake up packet only, otherwise false
+ */
+bool atvrc_custom_is_cwake_only(void);
+
+/**
+ * @brief Set customzied wake up packet payload
+ *
+ * @param[out] data Configured wake up packet payload
+ * @param[in] key_id Wake key ID
+ * @param[in] key_cnt Pressed key count
+ * @param[in] addr Peer device address
+ *
+ * @return Length of customized wake up packet payload
+ */
+__NONNULL(1,4)
+uint8_t atvrc_custom_set_cwake_pkt(uint8_t *data, uint8_t key_id,
+    uint8_t key_cnt, uint8_t const *addr);
+
+/**
+ * @brief Is periodically wake up
+ *
+ * @return True if periodically wake up enabled, otherwise false
+ */
+bool atvrc_custom_is_period_wake(void);
+
+/**
+ * @brief Get periodically wake up interval
+ *
+ * @return Periodically wake up interval in minute
+ */
+uint16_t atvrc_custom_get_wake_interval(void);
+
+/**
+ * @brief Is remote RPA enabled
+ *
+ * @return True if remote RPA enabled, otherwise false
+ */
+bool atvrc_custom_is_rpa_enabled(void);
+
+/**
+ * @brief Is BLE advertisement enabled
+ *
+ * @return True if BLE advertisement enabled, otherwise false
+ */
+bool atvrc_custom_is_ble_adv_enabled(void);
+
+/**
+ * @brief Is cache power key
+ *
+ * @return True if cache power key enabled, otherwise false
+ */
+bool atvrc_custom_is_cache_pwr(void);
\ No newline at end of file
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/atvrc_porting.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/atvrc_porting.h
new file mode 100644
index 0000000..a551c48
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/atvrc_porting.h
@@ -0,0 +1,29 @@
+/**
+ *******************************************************************************
+ *
+ * @file atvrc_porting.h
+ *
+ * @brief Android TV Remote Control porting to use refDesignRcu implementations
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+#include "arch.h"
+
+typedef uint64_t u64;
+typedef uint32_t u32;
+typedef uint16_t u16;
+typedef uint8_t u8;
+typedef int16_t s16;
+typedef int8_t s8;
+
+#define APPLICATION_DONGLE 0
+#define SYSTEM_TIMER_TICK_1US 16
+#define SYSTEM_TIMER_TICK_1S 16000000
+
+void atm_array_printf(uint8_t const *data, uint16_t size);
+
+#define array_printf atm_array_printf
\ No newline at end of file
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_att.c b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_att.c
new file mode 100644
index 0000000..06900ce
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_att.c
@@ -0,0 +1,176 @@
+/**
+ *******************************************************************************
+ *
+ * @file bridge_att.c
+ *
+ * @brief Bridge BLE ATT
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+
+#include <inttypes.h>
+#include "atvrc_porting.h"
+#include "ble_att.h"
+#include "ble_atmprfs.h"
+#include "bridge_audio.h"
+#include "co_endian.h"
+#include "vendor/827x_ble_remote/app_config.h"
+#include "stack/ble/ble_format.h"
+#include "stack/ble/host/attr/att.h"
+#include "stack/ble/service/uuid.h"
+
+#undef ATT_DEBUG
+
+extern uint8_t device_in_connection_state;
+static attribute_t *att_tbl;
+
+void atm_array_printf(uint8_t const *data, uint16_t size)
+{
+#if PLF_DEBUG
+    for (uint16_t i = 0; i < size; i++) {
+	if (!(i % 16)) {
+	    printf("\n");
+	}
+	printf("%02X ", *(data + i));
+    }
+    printf("\n");
+#endif
+}
+
+#ifdef ATT_DEBUG
+#define ATT_TRACE DEBUG_TRACE
+
+static void print_uuid_128(uint8_t *uuid)
+{
+    printf("\t\tUUID: ");
+    for (uint8_t i = 0; i < ATT_UUID_128_LEN; i++) {
+	if (i && !(i % 4)) {
+	    printf("-");
+	}
+	printf("%02X", uuid[i]);
+    }
+    printf("\n");
+}
+#else
+#define ATT_TRACE(fmt, ...) DEBUG_TRACE_COND(0, fmt, ##__VA_ARGS__)
+#endif
+
+static uint8_t att_read_req_cb(uint8_t conidx, uint8_t att_idx)
+{
+    ATT_TRACE("%s: att_idx (%d)", __func__, att_idx);
+    ble_atmprfs_gattc_read_cfm(conidx, att_idx, 0, 0);
+    return ATT_ERR_NO_ERROR;
+}
+
+static rf_packet_att_data_t attd;
+static uint8_t att_write_req_cb(uint8_t conidx, uint8_t att_idx,
+    uint8_t const *data, uint16_t size)
+{
+    ATT_TRACE("%s: att_idx(%d) size(%d)", __func__, att_idx, size);
+#ifdef ATT_DEBUG
+    atm_array_printf(data, size);
+#endif
+#define ATT_HANDLE_OFFSET 1
+#define ATT_HEADER_LEN 3
+    attribute_t *att = att_tbl + att_idx + ATT_HANDLE_OFFSET;
+    if (att->w) {
+	attd.handle = att_idx + ATT_HANDLE_OFFSET;
+	attd.l2cap = size + ATT_HEADER_LEN;
+	memcpy(attd.dat, data, size);
+	att->w(&attd);
+    }
+    return ATT_ERR_NO_ERROR;
+}
+
+static ble_atmprfs_cbs_t const cbs = {
+    .read_req = att_read_req_cb,
+    .write_req = att_write_req_cb,
+};
+
+void atm_att_setAttributeTable(uint8_t *atts)
+{
+    DEBUG_TRACE("%s", __func__);
+#define ATT_TBL_NUM_ATTS 0
+    uint8_t num_att = atts[ATT_TBL_NUM_ATTS];
+    att_tbl = (attribute_t*)atts;
+    for (uint8_t i = 0; i <= num_att; i++) {
+	attribute_t *att = att_tbl + i;
+	uint16_t uuid = 0;
+	if (att->uuidLen == sizeof(uint16_t)) {
+	    uuid = *((uint16_t*)att->uuid);
+	}
+	if (uuid == GATT_UUID_PRIMARY_SERVICE) {
+	    ATT_TRACE("PRIMARY SERVICE (%04hX):", uuid);
+	    uint8_t svc_uuid[ATT_UUID_128_LEN] = {0};
+	    co_bswap(svc_uuid, att->pAttrValue, ATT_UUID_128_LEN);
+#ifdef ATT_DEBUG
+	    print_uuid_128(svc_uuid);
+#endif
+	    ble_atmprfs_add_svc(svc_uuid, BLE_SEC_PROP_NO_SECURITY, &cbs);
+	} else if (uuid == GATT_UUID_CHARACTER) {
+#define ATT_CHAR_PROP 0
+#define ATT_CHAR_HANDLE 1
+#define ATT_CHAR_UUID 3
+	    uint8_t prop = att->pAttrValue[ATT_CHAR_PROP];
+	    ATT_TRACE("\tCharacteristic (%04hX): %s%s%s%s%s", uuid,
+		(prop & CHAR_PROP_READ) ? "READ |" : "",
+		(prop & CHAR_PROP_WRITE_WITHOUT_RSP) ? " WRITE_WO_RSP |" : "",
+		(prop & CHAR_PROP_WRITE) ? " WRITE |" : "",
+		(prop & CHAR_PROP_NOTIFY) ? " NOTIFY |" : "",
+		(prop & CHAR_PROP_INDICATE) ? " INDICATE" : "");
+	    uint8_t char_uuid[ATT_UUID_128_LEN] = {0};
+	    co_bswap(char_uuid, &(att->pAttrValue[ATT_CHAR_UUID]),
+		ATT_UUID_128_LEN);
+#ifdef ATT_DEBUG
+	    printf("\t");
+	    print_uuid_128(char_uuid);
+#endif
+	    ATT_TRACE("\t\tattribute len: %ld", att->attrLen);
+	    uint16_t perm = (att->pAttrValue[ATT_CHAR_PROP] << 8) |
+		((att->perm & ATT_PERMISSIONS_READ) ? PERM(RP, NO_AUTH) : 0 ) |
+		((att->perm & ATT_PERMISSIONS_WRITE) ? PERM(WP, NO_AUTH) : 0 );
+	    ble_atmprfs_add_char(char_uuid, perm, att->attrLen);
+	} else if (uuid == GATT_UUID_CLIENT_CHAR_CFG) {
+	    ATT_TRACE("\t\tClient Characteristic Configuration (%04hX)", uuid);
+	    ble_atmprfs_add_client_char_cfg();
+	}
+    }
+}
+
+static void ntf_sent_cb(uint8_t conidx, ble_gattc_cmp_evt_ex_t const *parm,
+    void const *ctx)
+{
+#ifdef CFG_ATVRC_AUDIO
+    bridge_audio_resend_voice();
+#endif
+}
+
+__FAST
+uint8_t atm_att_pushNotifyData(uint16_t attHandle, uint8_t *data, int len)
+{
+#ifdef ATT_DEBUG
+    if (attHandle != AUDIO_GOOGLE_RX_DP_H) {
+	ATT_TRACE("%s attHandle: %d, len: %d", __func__, attHandle, len);
+	atm_array_printf(data, len);
+    }
+#endif
+    if (!device_in_connection_state) {
+	ATT_TRACE("No connection");
+	return 1;
+    }
+    uint8_t conidx = device_in_connection_state - 1;
+    uint8_t status = ble_atmprfs_gattc_send_ntf(conidx,
+	attHandle - ATT_HANDLE_OFFSET, data, len, ntf_sent_cb);
+    if (status) {
+	ATT_TRACE("%s handle: %d error: %02X", __func__, attHandle, status);
+    }
+    return status;
+}
+
+void bridge_att_init(void)
+{
+    extern void my_att_init(void);
+    my_att_init();
+}
\ No newline at end of file
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_att.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_att.h
new file mode 100644
index 0000000..b776283
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_att.h
@@ -0,0 +1,24 @@
+/**
+ *******************************************************************************
+ *
+ * @file bridge_att.h
+ *
+ * @brief Bridge BLE ATT
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ * @brief Bridge BLE ATT initialization.
+ */
+void bridge_att_init(void);
+
+void atm_att_setAttributeTable(uint8_t *atts);
+
+uint8_t atm_att_pushNotifyData(uint16_t attHandle, uint8_t *data, int len);
+
+#define bls_att_setAttributeTable atm_att_setAttributeTable
+#define bls_att_pushNotifyData atm_att_pushNotifyData
\ No newline at end of file
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_audio.c b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_audio.c
new file mode 100644
index 0000000..0adf80d
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_audio.c
@@ -0,0 +1,245 @@
+/**
+ *******************************************************************************
+ *
+ * @file bridge_audio.c
+ *
+ * @brief Bridge audio service
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+
+#include "arch.h"
+#include "atvrc_porting.h"
+#include "bridge_audio.h"
+#include "rc_atvv.h"
+#include "rc_pdm.h"
+#include "nvds.h"
+#include "sw_event.h"
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wstrict-prototypes"
+#include "application/audio/gl_audio.h"
+#pragma GCC diagnostic pop
+#include "stack/ble/ble_format.h"
+#include "vendor/827x_ble_remote/app_audio.h"
+#include "vendor/827x_ble_remote/app_config.h"
+
+extern void google_voice_data_notify_proc(void);
+
+uint8_t app_mtu_size;
+static uint16_t app_pkt_size;
+typedef struct {
+    uint16_t wr_oft;
+    uint16_t rd_oft;
+    uint16_t unsend;
+    bool mic_status;
+} audio_ctl_t;
+
+static audio_ctl_t au_ctl;
+static audio_sync_t au_sync;
+static sw_event_id_t sync_evt;
+extern uint16_t atv_char_ctl_ccc, atv_char_rx_ccc;
+
+__FAST
+audio_sync_t *bridge_audio_get_sync_info(void)
+{
+    return &au_sync;
+}
+
+__FAST
+static void audio_sync(sw_event_id_t event_id, void const *ctx)
+{
+    sw_event_clear(sync_evt);
+    au_sync.codec = google_voice_codec_used;
+    au_sync.frame_no += 1;
+    au_sync.pred_val = rc_atvv_get_pred_val(&(au_sync.step_idx));
+}
+
+#include "ke_mem.h"
+
+#define AUDIO_FRAME_SIZE 120
+#define NUM_AUDIO_BUF 20
+#define AUDIO_BUF_LEN AUDIO_FRAME_SIZE * NUM_AUDIO_BUF
+static uint8_t *audio_buf;
+
+typedef struct {
+    uint16_t rx_ccc;
+    uint16_t ctl_ccc;
+} atvv_ccc_t;
+
+static atvv_ccc_t atvv_ccc;
+
+#define NVDS_TAG_ATVRC_VOICE_CCC_CFG 0xC3
+
+extern void google_cmd_proc(void);
+static rep_vec_err_t bridge_audio_plf_schedule(void)
+{
+    google_cmd_proc();
+    return RV_NEXT;
+}
+
+void bridge_audio_init(void)
+{
+    audio_buf = ke_malloc(AUDIO_BUF_LEN, KE_MEM_ENV);
+    sync_evt = sw_event_alloc(audio_sync, NULL);
+    RV_PLF_SCHEDULE_ADD(bridge_audio_plf_schedule);
+    nvds_tag_len_t len = sizeof(atvv_ccc_t);
+    if (nvds_get(NVDS_TAG_ATVRC_VOICE_CCC_CFG, &len, (uint8_t*)&atvv_ccc)
+	!= NVDS_OK) {
+	DEBUG_TRACE("%s: Fail to read ATVRC VOICE CCC NVDS tag", __func__);
+    }
+    atv_char_rx_ccc = atvv_ccc.rx_ccc;
+    atv_char_ctl_ccc = atvv_ccc.ctl_ccc;
+    active_mic_open();
+}
+
+__FAST
+void bridge_audio_write_voice_data(uint8_t data)
+{
+    audio_buf[au_ctl.wr_oft++] = data;
+    if (!(au_ctl.wr_oft % AUDIO_FRAME_SIZE)) {
+	au_ctl.unsend += AUDIO_FRAME_SIZE;
+	if (au_ctl.unsend >= AUDIO_BUF_LEN) {
+	    DEBUG_TRACE("Audio buffer overflow: pause PDM");
+	    rc_pdm_pause();
+	    return;
+	}
+	google_voice_data_notify_proc();
+	sw_event_set(sync_evt);
+    }
+
+    if (au_ctl.wr_oft >= AUDIO_BUF_LEN) {
+	au_ctl.wr_oft = 0;
+    }
+}
+
+__FAST
+void bridge_audio_resend_voice(void)
+{
+    if (au_ctl.unsend > AUDIO_FRAME_SIZE) {
+	google_voice_data_notify_proc();
+    }
+}
+
+extern uint8_t read_assistant_model(void);
+bool bridge_audio_is_legacy_model(void)
+{
+    return read_assistant_model() == REASON_MICOPEN;
+}
+
+bool bridge_audio_is_htt_model(void)
+{
+    return read_assistant_model() == REASON_HTT;
+}
+
+void bridge_audio_start_search(void)
+{
+    google_voice_start();
+    sw_event_set(sync_evt);
+}
+
+void bridge_audio_dpad_select(void)
+{
+    google_voice_dpad_select();
+}
+
+extern uint8_t app_audio_key_stop(uint8_t reason);
+void bridge_audio_stop(void)
+{
+    app_audio_key_stop(bridge_audio_is_htt_model() ? REASON_RELEASE_HTT :
+	REASON_OTHERS);
+}
+
+void bridge_audio_set_mtu(uint8_t mtu)
+{
+    app_mtu_size = mtu;
+    extern void set_audio_frame_size(uint8_t);
+    set_audio_frame_size(mtu);
+}
+
+void bridge_audio_set_pkt_size(uint16_t pkt_size)
+{
+    DEBUG_TRACE("%s: %d", __func__, pkt_size);
+    app_pkt_size = pkt_size;
+}
+
+void bridge_audio_ready_ind(bool ready)
+{
+    rc_atvv_ready(ready);
+}
+
+static void write_atvv_ccc(atvv_ccc_t *ccc)
+{
+    nvds_tag_len_t len = sizeof(atvv_ccc_t);
+    nvds_put(NVDS_TAG_ATVRC_VOICE_CCC_CFG, len, (uint8_t*)ccc);
+}
+
+/// Porting refDesignRcu audio related functions
+int bridge_audio_ccc_write(void* msg)
+{
+    rf_packet_att_data_t *pw = (rf_packet_att_data_t *)msg;
+    uint16_t handle = pw->handle;
+    uint16_t data = (pw->dat[1] << 8) + pw->dat[0];
+    if (handle == AUDIO_GOOGLE_RX_CCC_H) {
+	DEBUG_TRACE("ATVV RX Notify: %s", data ? "Enabled" : "Disabled");
+	atvv_ccc.rx_ccc = atv_char_rx_ccc = data;
+	write_atvv_ccc(&atvv_ccc);
+    }
+
+    if (handle == AUDIO_GOOGLE_CTL_CCC_H) {
+	DEBUG_TRACE("ATVV CTL Notify: %s", data ? "Enabled" : "Disabled");
+	atvv_ccc.ctl_ccc = atv_char_ctl_ccc = data;
+	write_atvv_ccc(&atvv_ccc);
+    }
+
+    rc_atvv_ready(atv_char_ctl_ccc && atv_char_rx_ccc);
+    return 0;
+}
+
+__FAST
+uint8_t *bridge_audio_read_frame(void)
+{
+    if (!au_ctl.unsend) {
+	return NULL;
+    }
+    return audio_buf + au_ctl.rd_oft;
+}
+
+__FAST
+void bridge_audio_sent_frame_ind(void)
+{
+    au_ctl.unsend -= AUDIO_FRAME_SIZE;
+    if (rc_pdm_is_paused() && au_ctl.unsend < (AUDIO_BUF_LEN / 2)) {
+	DEBUG_TRACE("Audio buffer available: resume PDM");
+	rc_pdm_resume();
+    }
+    au_ctl.rd_oft += AUDIO_FRAME_SIZE;
+    if (au_ctl.rd_oft >= AUDIO_BUF_LEN) {
+	au_ctl.rd_oft = 0;
+    }
+
+}
+
+void ui_enable_mic(int en)
+{
+    if (!en) {
+	if (au_ctl.mic_status) {
+	    rc_atvv_mic_close();
+	    memset(&au_ctl, 0, sizeof(audio_ctl_t));
+	}
+	return;
+    }
+    au_ctl.mic_status = true;
+#ifdef CFG_FORCE_8K_NO_DLE
+    bool is8k = (app_pkt_size >= app_mtu_size) ?
+	!(google_voice_codec_used & CODEC_SUPPORTED_16K) : true;
+    if (is8k) {
+	google_voice_codec_used = CODEC_USED_8K;
+	google_voice_pcm_sample_packet = VOICE_V1P0_ADPCM_UNIT_SIZE * 2;
+    }
+#else
+    bool is8k = !(google_voice_codec_used & CODEC_SUPPORTED_16K);
+#endif
+    rc_atvv_mic_open(is8k);
+}
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_audio.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_audio.h
new file mode 100644
index 0000000..05e4cfb
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_audio.h
@@ -0,0 +1,147 @@
+/**
+ *******************************************************************************
+ *
+ * @file bridge_audio.h
+ *
+ * @brief Bridge audio service
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+#define VOICE_V0P4_ADPCM_PACKET_LEN 136
+#define VOICE_V0P4_ADPCM_UNIT_SIZE 256
+#define VOICE_V1P0_ADPCM_PACKET_LEN 128
+#define VOICE_V1P0_ADPCM_UNIT_SIZE 240
+
+typedef struct {
+    uint8_t codec;
+    uint16_t frame_no;
+    uint16_t pred_val;
+    uint8_t step_idx;
+} __PACKED audio_sync_t;
+
+/**
+ * @brief Get audio sync information
+ *
+ * @return Audio sync information
+ */
+audio_sync_t *bridge_audio_get_sync_info(void);
+
+/**
+ * @brief Write voice data to audio buffer
+ *
+ * @param[in] data ADPCM data
+ */
+void bridge_audio_write_voice_data(uint8_t data);
+
+/**
+ * @brief Resend voice packet
+ */
+void bridge_audio_resend_voice(void);
+
+/**
+ * @brief Check legacy model
+ *
+ * @return True if ATVV is using legacy model, otherwise return false
+ */
+bool bridge_audio_is_legacy_model(void);
+
+/**
+ * @brief Check HTT(Hold-to-Talk) model
+ *
+ * @return True if ATVV is using HTT model, otherwise return false
+ */
+bool bridge_audio_is_htt_model(void);
+
+/**
+ * @brief Start voice search
+ */
+void bridge_audio_start_search(void);
+
+/**
+ * @brief D-Pad select to start search
+ */
+void bridge_audio_dpad_select(void);
+
+/**
+ * @brief Stop voice search
+ */
+void bridge_audio_stop(void);
+
+/**
+ * @brief Set MTU
+ *
+ * @param[in] mtu Peer device RX MTU size
+ */
+void bridge_audio_set_mtu(uint8_t mtu);
+
+/**
+ * @brief Set BLE packet size
+ *
+ * @param[in] pkt_size Peer packet size
+ */
+void bridge_audio_set_pkt_size(uint16_t pkt_size);
+
+/**
+ * @brief Bridge audio initialization
+ */
+void bridge_audio_init(void);
+
+/**
+ * @brief Voice service status indication
+ *
+ * @param[in] ready True if voice service is ready, otherwise false
+ */
+void bridge_audio_ready_ind(bool ready);
+
+/**
+ * @brief Read audio frame
+ *
+ * @return The pointer of audio frame data
+ */
+uint8_t *bridge_audio_read_frame(void);
+
+
+/**
+ * @brief Audio frame sent indication
+ */
+void bridge_audio_sent_frame_ind(void);
+
+/// Porting clock time functions for gl_audio use
+#include "timer.h"
+
+/**
+ * @brief Get the current clock time
+ *
+ * @return Current system based on the 32kHz clock
+ */
+inline static uint32_t clock_time(void)
+{
+    return atm_get_sys_time();
+}
+
+/**
+ * @brief Check if clock time exceed
+ *
+ * @param[in] ref Reference clock time
+ * @param[in] us Expected duration in microseconds
+ *
+ * @return True if the delta time is exceeded expected duration.
+ */
+inline static bool clock_time_exceed(uint32_t ref, uint32_t us)
+{
+    return (atm_lpc_to_us(clock_time() - ref) > us);
+}
+
+#define att_ccc_control bridge_audio_ccc_write
+/**
+ * @brief Audio service CCC write indication
+ *
+ * @param[in] msg Write CCC message
+ *
+ * @return Always return 0
+ */
+int bridge_audio_ccc_write(void* msg);
\ No newline at end of file
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_fms.c b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_fms.c
new file mode 100644
index 0000000..bbef2a5
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_fms.c
@@ -0,0 +1,74 @@
+/**
+ *******************************************************************************
+ *
+ * @file bridge_fms.c
+ *
+ * @brief Bridge Find Me Service
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+
+#include <inttypes.h>
+#include "atm_utils_c.h"
+#include "atvrc_porting.h"
+#include "atvrc_custom.h"
+#include "bridge_fms.h"
+#include "buzzer.h"
+#include "atm_pm.h"
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wstrict-prototypes"
+#include "vendor/827x_ble_remote/app_find_me/app_fms.h"
+#include "vendor/827x_ble_remote/app_find_me/app_buzzer.h"
+#pragma GCC diagnostic pop
+
+uint8_t atm_fms_buf[ATM_FMS_BUF_SIZE];
+
+static pm_lock_id_t fms_lock_ret;
+
+#define NOTE_BPM 150 // 400ms for quarter note
+note_t note_seq[] = {
+    {NOTE_C5, QUARTER_NOTE},
+    {NOTE_D5, QUARTER_NOTE},
+    {NOTE_E5, QUARTER_NOTE},
+    {NOTE_F5, QUARTER_NOTE},
+    {NOTE_G5, QUARTER_NOTE},
+    {NOTE_A5, QUARTER_NOTE},
+    {NOTE_B5, QUARTER_NOTE},
+};
+
+static void buzzer_stop_cb(void)
+{
+    atm_pm_unlock(fms_lock_ret);
+}
+
+
+void bridge_fms_init(void)
+{
+    app_fms_buffer_init();
+#define FMS_CTRL_OFFSET 0x24
+    app_fms_ctrl_t *ctrl = (app_fms_ctrl_t*)(atm_fms_buf + FMS_CTRL_OFFSET);
+    ctrl->en_periodic_wakeup = atvrc_custom_is_period_wake();
+    DEBUG_TRACE("%s: en_periodic_wakeup(%p) %d", __func__,
+	&ctrl->en_periodic_wakeup, ctrl->en_periodic_wakeup);
+    fms_lock_ret = atm_pm_alloc(PM_LOCK_RETENTION);
+    buzzer_init(buzzer_stop_cb);
+}
+
+void atm_fms_buzzer_play(uint8_t reason, unsigned char vol_lv)
+{
+    atm_pm_lock(fms_lock_ret);
+    buzzer_play(note_seq, ARRAY_LEN(note_seq), NOTE_BPM, vol_lv);
+}
+
+void atm_fms_buzzer_stop(void)
+{
+    buzzer_stop();
+    atm_pm_unlock(fms_lock_ret);
+}
+
+uint8_t atm_fms_buzzer_is_busy(void)
+{
+    return buzzer_is_playing();
+}
\ No newline at end of file
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_fms.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_fms.h
new file mode 100644
index 0000000..05e5c10
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_fms.h
@@ -0,0 +1,25 @@
+/**
+ *******************************************************************************
+ *
+ * @file bridge_fms.h
+ *
+ * @brief Bridge Find Me Service
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+#include "arch.h"
+
+#define ATM_FMS_BUF_SIZE 0x30
+
+void bridge_fms_init(void);
+void atm_fms_buzzer_play(uint8_t reason, unsigned char sound_level);
+void atm_fms_buzzer_stop(void);
+uint8_t atm_fms_buzzer_is_busy(void);
+
+#define app_buzzer_play atm_fms_buzzer_play
+#define app_buzzer_stop atm_fms_buzzer_stop
+#define app_buzzer_is_buzy atm_fms_buzzer_is_busy
\ No newline at end of file
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_ir.c b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_ir.c
new file mode 100644
index 0000000..f69a5de
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_ir.c
@@ -0,0 +1,120 @@
+/**
+ *******************************************************************************
+ *
+ * @file bridge_ir.c
+ *
+ * @brief Bridge IR service
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+#include "arch.h"
+#include "bridge_ir.h"
+#include "nvds.h"
+#include "rc_ir.h"
+#include "rc_gap.h"
+#ifdef CFG_ATVRC_CUSTOM
+#include "atvrc_custom.h"
+#else
+#include "vendor/827x_ble_remote/app_config.h"
+#endif
+
+uint8_t app_custom_get_device_type(void)
+{
+#ifdef CFG_ATVRC_CUSTOM
+    return atvrc_custom_get_device_type();
+#else
+    return REMOTE_G10;
+#endif
+}
+
+void atm_disable_slave_latency(bool disable)
+{
+    rc_gap_local_slave_latency(disable);
+}
+
+void atm_ir_send_key_code(uint16_t key_id, uint8_t const *code, uint16_t size)
+{
+    DEBUG_TRACE("%s key_id: %d", __func__, key_id);
+    rc_ir_send_uni_code(key_id, code, size);
+}
+
+#define NVDS_TAG_ATVRC_IR_CCC_CFG 0xC4
+#define NVDS_TAG_ATVRC_IR_CODE_BASE 0xD0
+
+void atm_ir_write_code(uint8_t ir_idx, uint8_t *data, uint16_t size)
+{
+    DEBUG_TRACE("%s index: %d, size: %d", __func__, ir_idx, size);
+    nvds_tag_len_t len = size;
+    nvds_put(NVDS_TAG_ATVRC_IR_CODE_BASE + ir_idx, len, data);
+}
+
+uint8_t atm_ir_read_code(uint8_t ir_idx, uint8_t *data, uint16_t size)
+{
+    DEBUG_TRACE("%s index: %d, size: %d", __func__, ir_idx, size);
+    nvds_tag_len_t len = size;
+    if (nvds_get(NVDS_TAG_ATVRC_IR_CODE_BASE + ir_idx, &len, data) == NVDS_OK) {
+	return true;
+    }
+    return false;
+}
+
+void atm_ir_write_ccc(uint8_t ccc)
+{
+    DEBUG_TRACE("%s ccc: %d", __func__, ccc);
+    nvds_tag_len_t len = sizeof(uint8_t);
+    nvds_put(NVDS_TAG_ATVRC_IR_CCC_CFG, len, &ccc);
+}
+
+void atm_ir_del_code(void)
+{
+    DEBUG_TRACE("%s", __func__);
+#define NUM_IR_CODE_TAG 5
+    for (uint8_t i = 0; i < NUM_IR_CODE_TAG; i++) {
+	nvds_del(NVDS_TAG_ATVRC_IR_CODE_BASE + i);
+    }
+}
+
+extern uint8_t ir_key_is_suppress(uint8_t idx);
+extern uint8_t ir_fallback_send_key_code(uint8_t button_idx, bool key_down);
+extern void ir_table_init(void);
+extern void ir_flash_factory(void);
+extern int ir_fallback_send(uint8_t idx);
+extern void ir_flash_check(uint32_t addr);
+
+bool bridge_ir_check_key(uint16_t atv_keycode)
+{
+    if (!atv_keycode) {
+	return false;
+    }
+    if (ir_key_is_suppress(atv_keycode)) {
+	return false;
+    }
+    return ir_fallback_send_key_code(atv_keycode, 1);
+}
+
+void bridge_ir_clear(void)
+{
+    ir_table_init();
+    ir_flash_factory();
+}
+
+uint8_t bridge_ir_key_release(void)
+{
+    return ir_fallback_send(0);
+}
+
+extern void ir_init_key_event_notify(uint8_t value);
+void bridge_ir_init(void)
+{
+    uint8_t ccc;
+    nvds_tag_len_t len = sizeof(uint8_t);
+    if (nvds_get(NVDS_TAG_ATVRC_IR_CCC_CFG, &len, &ccc) == NVDS_OK) {
+	DEBUG_TRACE("%s ccc: %d", __func__, ccc);
+	ir_init_key_event_notify(ccc);
+    } else {
+	DEBUG_TRACE("%s: Fail to read ATVRC IR CCC NVDS TAG", __func__);
+    }
+    ir_flash_check(0);
+}
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_ir.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_ir.h
new file mode 100644
index 0000000..b405206
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_ir.h
@@ -0,0 +1,90 @@
+/**
+ *******************************************************************************
+ *
+ * @file bridge_ir.h
+ *
+ * @brief Bridge IR service
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ * @brief Get device type
+ *
+ * @return REMOTE_G10 or REMOTE_G20, see ATV remote control PRD for details
+ */
+uint8_t app_custom_get_device_type(void);
+
+/**
+ * @brief Send IR key codes
+ *
+ * @param[in] key_id IR key id
+ * @param[in] code Pointer of IR code data
+ * @param[in] size IR code data size
+ */
+void atm_ir_send_key_code(uint16_t key_id, uint8_t const *code, uint16_t size);
+
+/**
+ * @brief Disable slave latency
+ *
+ * @param[in] disable True for disabling slave latency. False for enabling slave
+ * latency;
+ */
+void atm_disable_slave_latency(bool disable);
+
+/**
+ * @brief Write IR code
+ *
+ * @param[in] ir_idx IR key index
+ * @param[in] data Pointer of IR code data
+ * @param[in] size IR code data size
+ */
+void atm_ir_write_code(uint8_t ir_idx, uint8_t *data, uint16_t size);
+
+/**
+ * @brief Read IR code
+ *
+ * @param[in] ir_idx IR key index
+ * @param[out] data Pointer of IR code data
+ * @param[in] size IR code data size
+ */
+uint8_t atm_ir_read_code(uint8_t ir_idx, uint8_t *data, uint16_t size);
+
+/**
+ * @brief Write IR key envet notification
+ *
+ * @param[in] ccc Client characteristic configuration
+ */
+void atm_ir_write_ccc(uint8_t ccc);
+
+/**
+ * @brief Delete all IR code data
+ */
+void atm_ir_del_code(void);
+
+/**
+ * @brief Check ATV keycode and send universal IR key code
+ *
+ * @param[in] atv_keycode Android TV keycode
+ *
+ * @return True if IR code is sent, otherwise return false
+ */
+bool bridge_ir_check_key(uint16_t atv_keycode);
+
+/**
+ * @brief Clear all universal IR code data in flash
+ */
+void bridge_ir_clear(void);
+
+/**
+ * @brief Send universal IR key release
+ */
+uint8_t bridge_ir_key_release(void);
+
+/**
+ * @brief Bridge IR initialization
+ */
+void bridge_ir_init(void);
\ No newline at end of file
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_timer.c b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_timer.c
new file mode 100644
index 0000000..0ce590b
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/bridge_timer.c
@@ -0,0 +1,88 @@
+/**
+ *******************************************************************************
+ *
+ * @file bridge_timer.c
+ *
+ * @brief Bridge timer
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+
+#include "arch.h"
+#include "atvrc_porting.h"
+#include "sw_timer.h"
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wold-style-declaration"
+#include "vendor/common/blt_soft_timer.h"
+#pragma GCC diagnostic pop
+
+#define NUM_BLT_TIMER 3
+
+#undef TIMER_DEBUG
+
+#ifdef TIMER_DEBUG
+#define TIMER_TRACE DEBUG_TRACE
+#else
+#define TIMER_TRACE(fmt, ...) DEBUG_TRACE_COND(0, fmt, ##__VA_ARGS__)
+#endif
+
+typedef struct blt_sw_timer_t {
+    sw_timer_id_t tid;
+    blt_timer_callback_t func;
+} blt_sw_timer_t;
+
+static blt_sw_timer_t blt_sw_timer[NUM_BLT_TIMER];
+
+static void blt_sw_timer_timeout(sw_timer_id_t idx, void const *ctx)
+{
+    TIMER_TRACE("%s idx: %d", __func__, idx);
+    blt_timer_callback_t func = (blt_timer_callback_t)(uintptr_t)ctx;
+    if (func) {
+	func();
+    }
+}
+
+static uint8_t get_available_blt_sw_timer(void)
+{
+    for (uint8_t i = 0; i < NUM_BLT_TIMER; i++) {
+	if (!blt_sw_timer[i].tid) {
+	    return i;
+	}
+    }
+    DEBUG_TRACE("No available blt_sw_timer, increase NUM_BLT_TIMER");
+    ASSERT_ERR(0);
+    return 0;
+}
+
+int blt_soft_timer_add(blt_timer_callback_t func, u32 interval_us)
+{
+    uint8_t idx = get_available_blt_sw_timer();
+
+    blt_sw_timer[idx].tid = sw_timer_alloc(blt_sw_timer_timeout, func);
+    TIMER_TRACE("%s id: %d tid: %d inv: %lu func: %p", __func__, idx,
+	blt_sw_timer[idx].tid, interval_us, func);
+    blt_sw_timer[idx].func = func;
+#define USEC_TO_CSEC 10000
+    sw_timer_set(blt_sw_timer[idx].tid, interval_us / USEC_TO_CSEC);
+    return idx;
+}
+
+int blt_soft_timer_delete(blt_timer_callback_t func)
+{
+    uint8_t cnt = 0;
+    for (uint8_t i = 0; i < NUM_BLT_TIMER; i++) {
+	if (blt_sw_timer[i].func == func) {
+	    TIMER_TRACE("%s id: %d tid: %d cb: %p", __func__, i,
+		blt_sw_timer[i].tid, func);
+	    sw_timer_clear(blt_sw_timer[i].tid);
+	    sw_timer_free(blt_sw_timer[i].tid);
+	    blt_sw_timer[i].tid = 0;
+	    blt_sw_timer[i].func = NULL;
+	    cnt++;
+	}
+    }
+    TIMER_TRACE("found and deleted %d timer", cnt);
+    return cnt;
+}
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/refdesignrcu.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/refdesignrcu.h
new file mode 100644
index 0000000..3e61642
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/atvrc/refdesignrcu.h
@@ -0,0 +1,49 @@
+/**
+ *******************************************************************************
+ *
+ * @file refdesignrcu.h
+ *
+ * @brief Required header to build refDesignRcu in Atmosic SDK
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+#include "atvrc_porting.h"
+
+/// Warning supressions for refDesignRcu codes
+#pragma GCC diagnostic ignored "-Wunused-but-set-variable"
+#pragma GCC diagnostic ignored "-Wmissing-prototypes"
+#pragma GCC diagnostic ignored "-Wstrict-prototypes"
+#pragma GCC diagnostic ignored "-Wcast-qual"
+#pragma GCC diagnostic ignored "-Wunused-const-variable="
+#pragma GCC diagnostic ignored "-Wint-conversion"
+#pragma GCC diagnostic ignored "-Wformat="
+#pragma GCC diagnostic ignored "-Wold-style-declaration"
+#pragma GCC diagnostic ignored "-Wunused-variable"
+#pragma GCC diagnostic ignored "-Wimplicit-function-declaration"
+#pragma GCC diagnostic ignored "-Wold-style-definition"
+#pragma GCC diagnostic ignored "-Wswitch-enum"
+
+/// Required definitions for refDesignRcu
+#define SUCCESS 0x00
+#define __PROJECT_8258_BLE_REMOTE__ 0
+#define __PROJECT_8258_DRIVER_TEST__ 0
+#define __PROJECT_8278_BLE_REMOTE__ 1
+#define __PROJECT_8278_DRIVER_TEST__ 0
+#define LL_FEATURE_ENABLE_LL_PRIVACY 0
+#define LL_FEATURE_ENABLE_LE_DATA_LENGTH_EXTENSION 0
+#define LL_MASTER_MULTI_CONNECTION 0
+#define _attribute_data_retention_
+#define _attribute_aligned_(s) __attribute__((aligned(s)))
+#define own_addr_type_t u8
+
+#define U16_HI(a) (((a) >> 8) & 0xFF)
+#define U16_LO(a) ((a) & 0xFF)
+#define BIT(n) ( 1<<(n) )
+
+#if !PLF_DEBUG
+#define printf(fmt, ...) do {} while(0)
+#endif
\ No newline at end of file
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_atvv.c b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_atvv.c
new file mode 100644
index 0000000..93bd355
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_atvv.c
@@ -0,0 +1,365 @@
+/**
+ *******************************************************************************
+ *
+ * @file rc_atvv.c
+ *
+ * @brief ATVV application part.
+ *
+ * Copyright (C) Atmosic 2021
+ *
+ *******************************************************************************
+ */
+#include "arch.h"
+#include "app_config.h"
+#include "rc_atvv.h"
+#include "rc_gap.h"
+#include <string.h>
+#include "rc_mmi.h"
+#include "atm_debug.h"
+#include "co_endian.h"
+#include "rc_pdm.h"
+#include "sw_event.h"
+#ifdef CFG_ATVRC_AUDIO
+#include "bridge_audio.h"
+
+static bool atvv_is8k;
+#else // CFG_ATVRC_AUDIO
+
+#define RF_BITS 4
+#define RF_SIZE (1 << RF_BITS)
+#define RF_MASK (RF_SIZE - 1)
+#define RF_NEXT(__p) (((__p) + 1) & RF_MASK)
+static ble_atvv_payload_t *report_fifo[RF_SIZE];
+static uint8_t rf_head, rf_tail;
+static uint16_t atvv_seqn;
+static bool atvv_is8k;
+static struct atvv_eid_context {
+    sw_event_id_t id;
+    bool is_first;
+} atvv_eid_ctx;
+#ifdef CFG_PDM_LOCAL_TEST
+bool fake_atvv_bad_link;
+static sw_timer_id_t wait_buffer_tid;
+#endif // CFG_PDM_LOCAL_TEST
+
+// Supply fifo as fast as possible
+__FAST
+static bool pdm_supply_fifo(ble_atvv_payload_t *pre_alloc)
+{
+    for (uint8_t rf_next = RF_NEXT(rf_head); rf_next != rf_tail; rf_next =
+	RF_NEXT(rf_next)) {
+	ble_atvv_payload_t *req;
+#ifdef CFG_PDM_LOCAL_TEST
+	if (fake_atvv_bad_link) {
+	    break;
+	}
+#endif // CFG_PDM_LOCAL_TEST
+	if (pre_alloc) {
+	    req = pre_alloc;
+	    pre_alloc = NULL;
+	} else {
+	    req = ble_atvvs_claim_audio_buf();
+	}
+
+	if (!req) {
+	    break;
+	}
+
+	req->id = 0;
+
+	report_fifo[rf_head] = req;
+	rf_head = rf_next;
+    }
+
+    if (rf_head == rf_tail) {
+	return false;
+    } else {
+	if (rc_pdm_is_paused()) {
+#ifdef CFG_PDM_LOCAL_TEST
+	    DEBUG_TRACE("pdm_resume");
+#endif
+            // Enable data processing
+	    rc_pdm_resume();
+	}
+    }
+    return !pre_alloc;
+}
+
+// pdm event:
+// 1. Supply audio packet fifo
+// 2. If pause, checking for possibility of resuming.
+__FAST
+static void atvv_event(sw_event_id_t event_id, void const *ctx)
+{
+    struct atvv_eid_context *eid_ctx = CONTEXT_VOID_P(ctx);
+
+    sw_event_clear(event_id);
+    pdm_supply_fifo(NULL);
+
+    if (eid_ctx->is_first) {
+	eid_ctx->is_first = false;
+	ble_atvv_payload_t *req = report_fifo[rf_tail];
+	req->seqn = co_bswap16(atvv_seqn++);
+	req->prevp = co_bswap16(rc_pdm_get_adpcm_index(&req->idx));
+    }
+}
+
+static void pdm_reset_fifo(void)
+{
+    if (rf_tail != rf_head) {
+	report_fifo[rf_tail]->id = 0;
+    }
+}
+
+#ifdef CFG_PDM_LOCAL_TEST
+static void wait_buffer_ok(sw_timer_id_t tid, void const *ctx)
+{
+    fake_atvv_bad_link = false;
+    sw_event_set(atvv_eid_ctx.id);
+}
+#endif // CFG_PDM_LOCAL_TEST
+#endif // CFG_ATVRC_AUDIO
+
+// INTP on: [Thread context]
+//    rc_pdm_event->rc_atvv_fill_pcm
+// INTP off: [IRQ_PRI_UI interrupt context]
+//    rc_pdm_pcm_2_atvv->rc_atvv_fill_pcm
+__FAST
+void rc_atvv_fill_pcm(uint8_t pcm)
+{
+#ifdef CFG_ATVRC_AUDIO
+    bridge_audio_write_voice_data(pcm);
+#else
+    ASSERT_ERR(rf_tail != rf_head);
+    ble_atvv_payload_t *req = report_fifo[rf_tail];
+    req->val[req->id++] = pcm;
+    if (req->id == BLE_ATVV_REPORT_SIZE) {
+	rf_tail = RF_NEXT(rf_tail);
+	if (ble_atvvs_state() != BLE_ATVVS_STREAMING) {
+	    ble_atvvs_free_audio_buf(req);
+	} else  {
+	    ble_atvvs_send_audio_buf(req);
+	}
+        sw_event_set(atvv_eid_ctx.id);
+
+	if (rf_tail == rf_head) {
+#ifdef CFG_PDM_LOCAL_TEST
+#define MAX_RECOVER_TIME_CS 1000
+	    sw_timer_set(wait_buffer_tid, rand() % MAX_RECOVER_TIME_CS);
+	    DEBUG_TRACE("pdm paused");
+#endif
+	    rc_pdm_pause();
+	    return;
+	} else {
+	    req = report_fifo[rf_tail];
+	    req->seqn = co_bswap16(atvv_seqn++);
+	    req->prevp = co_bswap16(rc_pdm_get_adpcm_index(&req->idx));
+	}
+    }
+#endif // CFG_ATVRC_AUDIO
+}
+
+
+#ifdef CFG_ATVV_VER_100
+#include "nvds.h"
+#define CUST_TAG_ATVV_CONFIGURED 0xC0
+#endif
+
+#ifdef CFG_ATVRC_AUDIO
+void rc_atvv_ready(uint8_t ready)
+{
+    rc_mmi_transition(ready ? MMI_OP_ATVV_READY : MMI_OP_ATVV_UNREADY);
+}
+
+void rc_atvv_mic_open(bool is8k)
+{
+    DEBUG_TRACE("%s 8k: %d", __func__, is8k);
+    atvv_is8k = is8k;
+    rc_mmi_transition(MMI_OP_OPEN_MIC);
+}
+
+void rc_atvv_mic_close(void)
+{
+    if (!rc_atvv_is_htt_model()) {
+	rc_pdm_stop();
+	rc_mmi_transition(MMI_OP_CLOSE_MIC);
+    }
+}
+
+uint16_t rc_atvv_get_pred_val(uint8_t *idx)
+{
+    return rc_pdm_get_adpcm_index(idx);
+}
+
+#else // CFG_ATVRC_AUDIO
+static bool rc_atvv_query_configured(uint8_t conidx)
+{
+#ifdef CFG_ATVV_VER_100
+    // Typically, we should use conidx to get peer's address and compare.
+    // But current design is only support 1 bond.
+    bool atvv_configured;
+    nvds_tag_len_t len = sizeof(bool);
+    if (nvds_get(CUST_TAG_ATVV_CONFIGURED, &len, (uint8_t *)&atvv_configured) !=
+	NVDS_OK) {
+	return false;
+    }
+    return atvv_configured;
+#else
+    return false;
+#endif
+}
+
+static void rc_atvv_ready(uint8_t conidx, uint8_t state)
+{
+    uint8_t is_ready = state == BLE_ATVVS_READY;
+    rc_mmi_transition(is_ready ? MMI_OP_ATVV_READY : MMI_OP_ATVV_UNREADY);
+#ifdef CFG_ATVV_VER_100
+    if (state == BLE_ATVVS_IDLE) {
+	return;
+    }
+    // Typically, we should use conidx to get peer's address and save.
+    // But current design is only support 1 bond.
+    nvds_tag_len_t len = sizeof(bool);
+    nvds_put(CUST_TAG_ATVV_CONFIGURED, len, &is_ready);
+#endif
+}
+
+static void rc_atvv_mic_close_ind(uint8_t conidx)
+{
+    rc_pdm_stop(); // Close pdm earlier
+    rc_mmi_transition(MMI_OP_CLOSE_MIC);
+    pdm_reset_fifo();
+}
+
+static void rc_atvv_mic_open_ind(uint8_t conidx, uint16_t codecs)
+{
+    if (!(codecs & CODEC_ADPCM_8K_16K_16BIT)) {
+	ble_atvvs_mic_open_error(ATVV_ERROR_CODEC_NOT_SUPPORTED);
+    } else {
+	// This state will open mic
+	atvv_seqn = 0;
+	atvv_eid_ctx.is_first = true;
+	sw_event_set(atvv_eid_ctx.id);
+	atvv_is8k = !(codecs & CODEC_ADPCM_16K_16BIT);
+	rc_mmi_transition(MMI_OP_OPEN_MIC);
+	ble_atvvs_audio_start(BLE_ATVV_AUDIO_START_BY_MIC_OPEN, codecs);
+    }
+}
+
+ble_atvvs_param_t const rc_atvvs_parm = {
+    .cb_atvv_mic_close_ind = rc_atvv_mic_close_ind,
+    .cb_atvv_mic_open_ind = rc_atvv_mic_open_ind,
+    .cb_atvv_ready = rc_atvv_ready,
+    .cb_atvv_query_configured = rc_atvv_query_configured,
+};
+
+ble_atvvs_param_t const *rc_atvv_param(void)
+{
+    return &rc_atvvs_parm;
+}
+#endif // CFG_ATVRC_AUDIO
+
+void rc_atvv_start_search(void)
+{
+#ifdef CFG_ATVRC_AUDIO
+    bridge_audio_start_search();
+#else
+    ble_atvvs_start_search();
+#endif
+}
+
+void rc_atvv_dpad_select(void)
+{
+#ifdef CFG_ATVRC_AUDIO
+    bridge_audio_dpad_select();
+#else
+    ble_atvvs_dpad_select();
+#endif
+}
+
+void rc_atvv_stop_search(void)
+{
+    rc_pdm_stop(); // Close pdm earlier
+    rc_mmi_transition(MMI_OP_CLOSE_MIC);
+#ifdef CFG_ATVRC_AUDIO
+    bridge_audio_stop();
+#else
+    pdm_reset_fifo();
+    uint8_t reason = rc_atvv_is_htt_model() ?
+	BLE_ATVV_AUDIO_STOP_BY_HTT_BUTTON : BLE_ATVV_AUDIO_STOP_BY_OTHER_REASON;
+    ble_atvvs_audio_stop(reason);
+#endif
+}
+
+#ifndef CFG_ATVRC_AUDIO
+ble_atvvs_state_t rc_atvv_state(void)
+{
+    return ble_atvvs_state();
+}
+#endif
+
+bool rc_atvv_is8k(void)
+{
+    return atvv_is8k;
+}
+
+bool rc_atvv_is_legacy_model(void)
+{
+#ifdef CFG_ATVRC_AUDIO
+    return bridge_audio_is_legacy_model();
+#else
+    return ble_atvvs_asst_model() == BLE_ATVV_ASST_MODEL_LEGACY;
+#endif
+}
+
+bool rc_atvv_is_htt_model(void)
+{
+#ifdef CFG_ATVRC_AUDIO
+    return bridge_audio_is_htt_model();
+#else
+    return ble_atvvs_asst_model() == BLE_ATVV_ASST_MODEL_HTT;
+#endif
+}
+
+void rc_atvv_init(void)
+{
+#ifndef CFG_ATVRC_AUDIO
+    atvv_eid_ctx.id = sw_event_alloc(atvv_event, &atvv_eid_ctx);
+    ble_atvvs_reg_replish_callback(pdm_supply_fifo);
+#endif
+}
+
+#ifdef CFG_ATVV_VER_100
+void rc_atvv_del_config(void)
+{
+    nvds_del(CUST_TAG_ATVV_CONFIGURED);
+}
+#endif
+
+#ifdef CFG_PDM_LOCAL_TEST
+void rc_atvv_test_start(void)
+{
+    fake_atvv_bad_link = false;
+    atvv_eid_ctx.is_first = true;
+    sw_event_set(atvv_eid_ctx.id);
+}
+
+void rc_atvv_fake_bad_link(void)
+{
+    if (!fake_atvv_bad_link) {
+	fake_atvv_bad_link = rand() & 1;
+    }
+}
+
+static rep_vec_err_t rc_atvv_test_init(void)
+{
+    wait_buffer_tid = sw_timer_alloc(wait_buffer_ok, NULL);
+    return RV_NEXT;
+}
+
+__attribute__((constructor))
+static void rc_atvv_test_init_cstr(void)
+{
+    RV_APPM_INIT_ADD(rc_atvv_test_init);
+}
+#endif // CFG_PDM_LOCAL_TEST
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_atvv.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_atvv.h
new file mode 100644
index 0000000..7432316
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_atvv.h
@@ -0,0 +1,129 @@
+/**
+ *******************************************************************************
+ *
+ * @file rc_atvv.h
+ *
+ * @brief ATVV application part
+ *
+ * Copyright (C) Atmosic 2021
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+#ifdef CFG_ATVRC_AUDIO
+void rc_atvv_ready(uint8_t ready);
+
+void rc_atvv_mic_open(bool is8k);
+
+void rc_atvv_mic_close(void);
+
+uint16_t rc_atvv_get_pred_val(uint8_t *idx);
+#else
+#include "ble_atvvs.h"
+
+/**
+ *******************************************************************************
+ * @brief Get ATVV profile parameter.
+ * This is used for passing parameters to @ref atm_gap_prf_reg.
+ * @return Parameters.
+ *******************************************************************************
+ */
+ble_atvvs_param_t const *rc_atvv_param(void);
+#endif
+
+/**
+ *******************************************************************************
+ * @brief Start ATVV search.
+ *******************************************************************************
+ */
+void rc_atvv_start_search(void);
+
+/**
+ *******************************************************************************
+ * @brief DPAD select to ATVV client.
+ *******************************************************************************
+ */
+void rc_atvv_dpad_select(void);
+
+/**
+ *******************************************************************************
+ * @brief Stop ATVV search.
+ *******************************************************************************
+ */
+void rc_atvv_stop_search(void);
+
+/**
+ *******************************************************************************
+ * @brief provide PCM data
+ * @param[in] pcm PCM data.
+ *******************************************************************************
+ */
+void rc_atvv_fill_pcm(uint8_t pcm);
+
+#ifndef CFG_ATVRC_AUDIO
+/**
+ *******************************************************************************
+ * @brief Get ATVV state
+ * @return ATVV state.
+ *******************************************************************************
+ */
+ble_atvvs_state_t rc_atvv_state(void);
+#endif
+
+/**
+ *******************************************************************************
+ * @brief Check if peer indicated codec is 8Khz.
+ * @return True if codec is 8Khz. Otherwise is 16Khz.
+ *******************************************************************************
+ */
+bool rc_atvv_is8k(void);
+
+/**
+ *******************************************************************************
+ * @brief Check if current assistant model is legacy mode
+ * @return True if using legacy mode
+ *******************************************************************************
+ */
+bool rc_atvv_is_legacy_model(void);
+
+/**
+ *******************************************************************************
+ * @brief Check if current assistant model is hold-to-talk mode(HTT)
+ * @return True if using HTT mode
+ *******************************************************************************
+ */
+bool rc_atvv_is_htt_model(void);
+
+#ifdef CFG_ATVV_VER_100
+/**
+ *******************************************************************************
+ * @brief Delete ATVV configuration
+ *******************************************************************************
+ */
+void rc_atvv_del_config(void);
+#endif
+
+/**
+ *******************************************************************************
+ * @brief Initialize ATVV environment.
+  *******************************************************************************
+ */
+void rc_atvv_init(void);
+
+#ifdef CFG_PDM_LOCAL_TEST
+/**
+ *******************************************************************************
+ * @brief ATVV test start
+ * @note This is used for ATVV flow unit test locally.
+ *******************************************************************************
+ */
+void rc_atvv_test_start(void);
+/**
+ *******************************************************************************
+ * @brief Pretend the bad link situation without allocating buffers.
+ * @note This is used for ATVV flow unit test locally.
+ *******************************************************************************
+ */
+void rc_atvv_fake_bad_link(void);
+#endif // CFG_PDM_LOCAL_TEST
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_gap.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_gap.h
new file mode 100644
index 0000000..95ddded
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_gap.h
@@ -0,0 +1,127 @@
+/**
+ *******************************************************************************
+ *
+ * @file rc_gap.h
+ *
+ * @brief GAP application part
+ *
+ * Copyright (C) Atmosic 2020-2021
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/// RF test type for @ref rc_gap_rf_test_adjust API.
+typedef enum {
+    /// PHY.
+    RC_RFTEST_PHY,
+    /// Channel.
+    RC_RFTEST_CH,
+    /// Power.
+    RC_RFTEST_PWR,
+} rc_rftest_type_t;
+
+/**
+ *******************************************************************************
+ * @brief Bluetooth initialization.
+ *******************************************************************************
+ */
+void rc_gap_init(void);
+
+/**
+ *******************************************************************************
+ * @brief Disconnect current link if have.
+ *******************************************************************************
+ */
+void rc_gap_disconnect(void);
+
+/**
+ *******************************************************************************
+ * @brief Start or stop device advertisement.
+ * @param[in] en True for enabling, otherwise for disabling.
+ *******************************************************************************
+ */
+void rc_gap_discoverable(bool en);
+
+/**
+ *******************************************************************************
+ * @brief Negotiate current link parameter.
+ *******************************************************************************
+ */
+void rc_gap_nego_parameter(void);
+
+/**
+ *******************************************************************************
+ * @brief Stop all the activities and links and back to idle.
+ *******************************************************************************
+ */
+void rc_gap_stop(void);
+
+/**
+ *******************************************************************************
+ * @brief Enter RF testing mode.
+ *******************************************************************************
+ */
+void rc_gap_enter_rf_test(void);
+
+/**
+ *******************************************************************************
+ * @brief Adjust RF testing parameter.
+ *
+ * @param[in] is_up True for increase parameter value.
+ * @param[in] type Parameter type.
+ *******************************************************************************
+ */
+void rc_gap_rf_test_adjust(bool is_up, rc_rftest_type_t type);
+
+/**
+ *******************************************************************************
+ * @brief Disable slave latency locally
+ * @param[in] disable True for disabling slave latency. False for enabling slave
+ * latency;
+ *******************************************************************************
+ */
+void rc_gap_local_slave_latency(bool disable);
+
+/**
+ *******************************************************************************
+ * @brief Enter pairing after next boot
+ * @param[in] enable True for enable pairing. False disable
+ * @note This switch is across hibernation.
+ *******************************************************************************
+ */
+void rc_gap_enter_pairing_next_boot(bool enable);
+
+/**
+ *******************************************************************************
+ * @brief Remove all bond information
+ *******************************************************************************
+ */
+void rc_gap_remove_all_bond(void);
+
+#ifdef CFG_ATVRC_WAKEUP
+typedef enum {
+    ATVRC_WAKE_NOT_WAKE_KEY,
+    ATVRC_WAKE_KEY1,
+    ATVRC_WAKE_KEY2,
+    ATVRC_WAKE_MTK_POWER,
+    ATVRC_WAKE_MTK_NETFLIX,
+} atvrc_wake_key_t;
+
+/**
+ *******************************************************************************
+ * @brief Start Wake up host
+ * @param[in] id Wake up key ID
+ *******************************************************************************
+ */
+void rc_gap_set_wake(atvrc_wake_key_t key);
+#endif
+
+#ifdef CFG_OTA_SPEEDUP
+/**
+ *******************************************************************************
+ * @brief Negotiate current link parameter for OTA speed up.
+ *******************************************************************************
+ */
+void rc_gap_nego_ota_parameter(void);
+#endif
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_hidau.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_hidau.h
new file mode 100644
index 0000000..17defac
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_hidau.h
@@ -0,0 +1,93 @@
+/**
+ *******************************************************************************
+ *
+ * @file rc_hidau.h
+ *
+ * @brief Voice over HID application part
+ *
+ * Copyright (C) Atmosic 2021
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+#ifdef CFG_PDM_MSBC
+#include "sbc_enc_wrapper.h"
+#define HID_AU_REPORT_SIZE (MSBC_ENC_SIZE * 2)
+#else
+#define HID_AU_REPORT_SIZE 128
+#endif
+
+/**
+ *******************************************************************************
+ * @brief Start Audio search.
+ *******************************************************************************
+ */
+void rc_hidau_start_search(void);
+
+/**
+ *******************************************************************************
+ * @brief Stop Audio search.
+ *******************************************************************************
+ */
+void rc_hidau_stop_search(void);
+
+/**
+ *******************************************************************************
+ * @brief Get audio frame
+ *
+ * @param[out] frame Byte point of audio frame
+ * @return Residual number from pointer.
+ *******************************************************************************
+ */
+uint16_t rc_hidau_frame_get(uint8_t **frame);
+
+/**
+ *******************************************************************************
+ * @brief Move audio frame pointer forward
+ *
+ * @param[in] count Byte count to move
+ * @return Actual moved byte count.
+ * @note If reach the end, rc_bta will send it out. If current frame is not
+ * enough, the actual moving count would be the residual number.
+ *******************************************************************************
+ */
+uint16_t rc_hidau_frame_ptr_move(uint16_t count);
+
+/**
+ *******************************************************************************
+ * @brief Fill data to audio frame.
+ *
+ * @param[in] pcm PCM data.
+ * @note If reach the end of frame, rc_bta will send it out.
+ *******************************************************************************
+ */
+void rc_hidau_fill_pcm(uint8_t pcm);
+
+/**
+ *******************************************************************************
+ * @brief Initialize ATVV environment.
+ *******************************************************************************
+ */
+void rc_hidau_init(void);
+
+#ifdef CFG_PDM_LOCAL_TEST
+/**
+ *******************************************************************************
+ * @brief ATVV test start
+ *
+ * @note This is used for ATVV flow unit test locally.
+ *******************************************************************************
+ */
+void rc_hidau_test_start(void);
+/**
+ *******************************************************************************
+ * @brief Pretend the bad link situation without allocating buffers.
+ *
+ * @note This is used for ATVV flow unit test locally.
+ *******************************************************************************
+ */
+void rc_hidau_fake_bad_link(void);
+#endif // CFG_PDM_LOCAL_TEST
+
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_hogp.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_hogp.h
new file mode 100644
index 0000000..737689d
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_hogp.h
@@ -0,0 +1,55 @@
+/**
+ *******************************************************************************
+ *
+ * @file rc_hogp.h
+ *
+ * @brief HOGP application part
+ *
+ * Copyright (C) Atmosic 2020-2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+#include "ble_hogpd.h"
+
+/**
+ *******************************************************************************
+ * @brief Get HOGP profile parameter.
+ * This is used for passing parameters to @ref atm_gap_prf_reg.
+ * @return Parameters.
+ *******************************************************************************
+ */
+ble_hogpd_param_t const *rc_hogp_param(void);
+
+/**
+ *******************************************************************************
+ * @brief Send key to peer.
+ *
+ * @param[in] keycode Key code.
+ * @note High 16 bits is usage, low 16 bits is key code.
+ *******************************************************************************
+ */
+void rc_hogp_send_single_key(uint32_t keycode);
+
+/**
+ *******************************************************************************
+ * @brief Get HOGP state
+ *
+ * @return HOGP state.
+ *******************************************************************************
+ */
+ble_hogpd_state_t rc_hogp_state(void);
+
+#ifdef CFG_VOHID
+/**
+ *******************************************************************************
+ * @brief Get audio report buffer index
+ *
+ * @param[in] hogp_cb Callback while sending complete.
+ * @param[in] ctx Application context.
+ * @return HID audio buffer context
+ *******************************************************************************
+ */
+void *rc_hogp_get_audio_buf(ble_hogpd_report_cmp_cb_t hogp_cb, void const *ctx);
+#endif
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_ota.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_ota.h
new file mode 100644
index 0000000..7147b38
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_ota.h
@@ -0,0 +1,22 @@
+/**
+ *******************************************************************************
+ *
+ * @file rc_ota.h
+ *
+ * @brief OTA application part
+ *
+ * Copyright (C) Atmosic 2020-2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+#include "ble_otaps.h"
+
+/**
+ *******************************************************************************
+ * @brief Get OTAP profile parameter.
+ * This is used for passing parameters to @ref atm_gap_prf_reg.
+ * @return Parameters.
+ *******************************************************************************
+ */
+ble_otaps_param_t const *rc_otps_param(void);
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_test_mode.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_test_mode.h
new file mode 100644
index 0000000..a15bb0f
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/rc_test_mode.h
@@ -0,0 +1,92 @@
+/**
+ *******************************************************************************
+ *
+ * @file rc_test_mode.h
+ *
+ * @brief Test mode for fast connection
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "atm_adv.h"
+
+// Two continuous test input would cause system reset and
+// enter test mode from index 0 to 15. The direct ADV can be generated right
+// after reset through rc_create_test_mode_adv API. Here is the mapping of
+// input combination and index.
+// |-------+--------|
+// | Index | Inputs |
+// |=======+========|
+// | 0     | U U    |
+// | 1     | U D    |
+// | 2     | U L    |
+// | 3     | U R    |
+// | 4     | D U    |
+// | 5     | D D    |
+// | 6     | D L    |
+// | 7     | D R    |
+// | 8     | L U    |
+// | 9     | L D    |
+// | 10    | L L    |
+// | 11    | L R    |
+// | 12    | R U    |
+// | 13    | R D    |
+// | 14    | R L    |
+// | 15    | R R    |
+// |-------+--------|
+
+/// Test input definition.
+typedef enum {
+    // Cancel test
+    RC_TEST_CANCEL,
+    // Up get
+    RC_TEST_U_GOT,
+    // Down get
+    RC_TEST_D_GOT,
+    // Left get
+    RC_TEST_L_GOT,
+    // Right get
+    RC_TEST_R_GOT,
+} rc_test_input_t;
+
+/// NVDS base tag for fasting connection bt address
+#define FAST_CONN_NVDS 0xD0
+
+/// Default address
+#define FAST_CONN_D4ADDR 0x11, 0x18, 0x12, 0x23, 0x01, 0x24
+
+/**
+ *******************************************************************************
+ * @brief Test mode control
+ * @param[in] input Input to trigger state machine. Two continue inputs which
+ * are not RC_TEST_CANCEL will enable test mode with specific index. If the I1 and I2
+ * are first and second input, then the index of test mode is (I1 - 1) * 4 +
+ * (I2 -1).
+ *******************************************************************************
+ */
+void rc_test_mode_control(rc_test_input_t input);
+
+/**
+ *******************************************************************************
+ * @brief Generate test mode direct ADV structure for fast connection.
+ * The target address of direct ADV would get from NVDS tag which tag number is
+ * FAT_CONN_NVDS + test mode index.
+ * @return Data which is used to create direct ADV instance.
+ *******************************************************************************
+ */
+atm_adv_create_t *rc_create_test_mode_adv(void);
+
+/**
+ *******************************************************************************
+ * @brief Query for direct ADV retry left
+ * @param[in] minus_one True if substract the value of retry time by 1.
+ * @return Current value of retry times.
+ *******************************************************************************
+ */
+uint8_t rc_test_mode_adv_times_left(bool minus_one);
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/uuid.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/uuid.h
new file mode 100644
index 0000000..be74840
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/bt/uuid.h
@@ -0,0 +1,65 @@
+/**
+ *******************************************************************************
+ *
+ * @file uuid.h
+ *
+ * @brief Android TV Service UUIDs
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+#define GOOGLE_UUID_POSTFIX 0x5A, 0x21, 0x4F, 0x05, 0xBC, 0x7D, 0xAF, 0x01, \
+    0xF6, 0x17, 0xB6, 0x64
+
+/* Google IR Configuration over BLE Service
+ * UUID : D343BFC0-5A21-4F05-BC7D-AF01F617B664
+ */
+#define SVC_UUID_IR_SERVICE 0xD3, 0x43, 0xBF, 0xC0, GOOGLE_UUID_POSTFIX
+
+/* Control Characteristic
+ * UUID : D343BFC1-5A21-4F05-BC7D-AF01F617B664
+ */
+#define CHAR_UUID_IR_PROG_CONTROL 0xD3, 0x43, 0xBF, 0xC1, GOOGLE_UUID_POSTFIX
+
+/* Key Code Characteristic
+ * UUID : D343BFC2-5A21-4F05-BC7D-AF01F617B664
+ */
+#define CHAR_UUID_IR_KEY_ID 0xD3, 0x43, 0xBF, 0xC2, GOOGLE_UUID_POSTFIX
+
+/* IR Code Characteristic
+ * UUID : D343BFC3-5A21-4F05-BC7D-AF01F617B664
+ */
+#define CHAR_UUID_IR_CODE 0xD3, 0x43, 0xBF, 0xC3, GOOGLE_UUID_POSTFIX
+
+/* IR Suppress Characteristic
+ * UUID : D343BFC4-5A21-4F05-BC7D-AF01F617B664
+ */
+#define CHAR_UUID_IR_SUPPRESS 0xD3, 0x43, 0xBF, 0xC4, GOOGLE_UUID_POSTFIX
+
+/* Key Down Characteristic
+ * UUID : D343BFC5-5A21-4F05-BC7D-AF01F617B664
+ */
+#define CHAR_UUID_IR_KEY_EVENT 0xD3, 0x43, 0xBF, 0xC5, GOOGLE_UUID_POSTFIX
+
+/* Google Voice over BLE Service
+ * UUID : AB5E0001-5A21-4F05-BC7D-AF01F617B664
+ */
+#define SVC_UUID_ATVV_SERVICE 0xAB, 0x5E, 0x00, 0x01, GOOGLE_UUID_POSTFIX
+
+/* ATVV TX Characteristic
+ * UUID : AB5E0002-5A21-4F05-BC7D-AF01F617B664
+ */
+#define CHAR_UUID_ATVV_TX 0xAB, 0x5E, 0x00, 0x02, GOOGLE_UUID_POSTFIX
+
+/* ATVV Audio Characteristic
+ * UUID : AB5E0003-5A21-4F05-BC7D-AF01F617B664
+ */
+#define CHAR_UUID_ATVV_AUDIO 0xAB, 0x5E, 0x00, 0x03, GOOGLE_UUID_POSTFIX
+
+/* ATVV CTL Characteristic
+ * UUID : AB5E0003-5A21-4F05-BC7D-AF01F617B664
+ */
+#define CHAR_UUID_ATVV_CTL 0xAB, 0x5E, 0x00, 0x04, GOOGLE_UUID_POSTFIX
\ No newline at end of file
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/non_bt/rc_ir.c b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/non_bt/rc_ir.c
new file mode 100644
index 0000000..f8c490c
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/non_bt/rc_ir.c
@@ -0,0 +1,273 @@
+/**
+ *******************************************************************************
+ *
+ * @file rc_ir.c
+ *
+ * @brief IR application part
+ *
+ * Copyright (C) Atmosic 2020-2021
+ *
+ *******************************************************************************
+ */
+
+#include "arch.h"
+#include <inttypes.h>
+#include "rc_ir.h"
+#include "ir_ctl.h"
+#include "timer.h"
+#include "sw_event.h"
+#include "sw_timer.h"
+#include "atm_pm.h"
+#include "co_list.h"
+#ifdef CFG_ATVRC_UNI_IR
+#include "bridge_ir.h"
+#endif
+
+
+#ifndef CFG_RC_IR_QUEUE_MAX
+#define CFG_RC_IR_QUEUE_MAX 10
+#endif
+
+static struct {
+    co_list_t keys;
+    pm_lock_id_t lock_hib;
+    sw_timer_id_t tid;
+    sw_event_id_t eid;
+    uint8_t count;
+    bool sent;
+    bool pressed;
+#ifdef CFG_ATVRC_UNI_IR
+    bool is_uni;
+    uint16_t last_uni_key;
+    uint32_t last_uni_sent;
+#endif
+} ir_ctx;
+
+typedef struct {
+    co_list_hdr_t hdr;
+    uint32_t address;
+    uint32_t cmd;
+#ifdef CFG_ATVRC_UNI_IR
+    uint16_t uni_key;
+    uint8_t const *uni_code;
+    uint16_t uni_size;
+#endif
+    uint32_t delay_cs;
+} ir_key_t;
+
+static void rc_ir_dispatch(void)
+{
+    ir_key_t const *key = (ir_key_t const *)co_list_pick(&ir_ctx.keys);
+    if (key) {
+	atm_pm_lock(ir_ctx.lock_hib);
+	sw_timer_set(ir_ctx.tid, key->delay_cs);
+    } else if (!sw_timer_active(ir_ctx.tid)) {
+	// Notify upper layer if needed.
+	atm_pm_unlock(ir_ctx.lock_hib);
+    }
+}
+
+static void sw_event_func(sw_event_id_t event_id, void const *ctx)
+{
+    sw_event_clear(event_id);
+    rc_ir_dispatch();
+}
+
+// __FAST because called from interrupt handler.
+__FAST
+static void rc_ir_end(void)
+{
+    sw_event_set(ir_ctx.eid);
+}
+
+static void rc_ir_key_pop_out(void)
+{
+    ir_key_t *key = (ir_key_t *)co_list_pop_front(&ir_ctx.keys);
+    if (key) {
+	ir_ctx.count--;
+	sw_timer_clear(ir_ctx.tid);
+	free(key);
+    }
+}
+
+#ifdef CFG_NEC_IR_OVERRIDE
+#include "rc_keycode.h"
+#include "nvds.h"
+#define OVRD_ENTRY_NUM 48
+#define OVRD_ENTRY_LEN 4
+static uint8_t const ovrd_ir_cmd_map[OVRD_ENTRY_NUM] = {
+    IR_POWER, IR_RIGHT, IR_VOLD, IR_INFO, IR_NUM4, IR_GREEN, IR_INPUT, IR_DOWN,
+    IR_CNLD, IR_NUM0, IR_NUM3, IR_RED, IR_BKMK, IR_BACK, IR_YOUTUBE, IR_SUBT,
+    IR_NUM2, IR_NUM6, IR_ASST, IR_HOME, IR_NETFLIX, IR_NUM9, IR_NUM1, IR_NUM5,
+    IR_DASHB, IR_GUIDE, IR_APP03, IR_NUM8, IR_BLUE, 0, IR_UP, IR_VOLU, IR_APP04,
+    IR_NUM7, IR_YELLOW, 0, IR_LEFT, IR_CNLU, 0, 0, 0, 0, IR_CENTER, IR_MUTE,
+    0, 0, 0, 0,
+};
+static uint8_t ovrd_val[OVRD_ENTRY_NUM][OVRD_ENTRY_LEN];
+static void nec_ir_override_init(void)
+{
+    nvds_tag_len_t len = sizeof(ovrd_val);
+#define NVDS_TAG_ATVRC_NEC_IR_OVERRIDE 0xC2
+    if (nvds_get(NVDS_TAG_ATVRC_NEC_IR_OVERRIDE, &len, (uint8_t*)&ovrd_val)
+	!= NVDS_OK) {
+	memset(ovrd_val, 0xFF, sizeof(ovrd_val));
+    }
+}
+
+static bool nec_ir_override_check(ir_data_t *ir_data)
+{
+    bool is_ovrd = false;
+    for (uint8_t oft = 0; oft < OVRD_ENTRY_NUM; oft++) {
+	if (ir_data->cmd == ovrd_ir_cmd_map[oft]) {
+	    uint32_t *data = (uint32_t*)ir_data;
+	    for (uint8_t idx = 0; idx < OVRD_ENTRY_LEN; idx++) {
+		if (ovrd_val[oft][idx] != 0xFF) {
+		    *(data + idx) = ovrd_val[oft][idx];
+		    is_ovrd = true;
+		}
+	    }
+	    return is_ovrd;
+	}
+    }
+    return is_ovrd;
+}
+#endif
+
+static void rc_ir_send_msg_id(sw_timer_id_t idx, void const *ctx)
+{
+    ir_key_t const *key = (ir_key_t const *)co_list_pick(&ir_ctx.keys);
+    if (key) { // prevent earlier end
+	ir_ctx.sent = true;
+#ifdef CFG_ATVRC_UNI_IR
+	if (key->uni_code) {
+	    ir_ctx.is_uni = true;
+	    ir_ctx.last_uni_key = key->uni_key;
+	    ir_ctx.last_uni_sent = atm_get_sys_time();
+	    uni_ir_send(key->uni_code, key->uni_size);
+	    rc_ir_key_pop_out();
+	    return;
+	}
+#endif
+	DEBUG_TRACE("send %#" PRIx32 " %#" PRIx32, key->address, key->cmd);
+	bool repeat = ir_ctx.pressed && (ir_ctx.count == 1);
+#ifndef IR_DATA_CONST
+#define IR_DATA_CONST const
+#endif
+	ir_data_t IR_DATA_CONST data = {
+	    .addr = key->address,
+	    .inv_addr = ~key->address,
+	    .cmd = key->cmd,
+	    .inv_cmd = ~key->cmd
+	};
+#ifdef CFG_NEC_IR_OVERRIDE
+	if (nec_ir_override_check(&data)) {
+	    DEBUG_TRACE("override %#" PRIx32 " %#" PRIx32 " %#" PRIx32
+		" %#" PRIx32, data.addr, data.inv_addr, data.cmd, data.inv_cmd);
+	}
+#endif
+	nec_ir_send(&data, repeat);
+	rc_ir_key_pop_out();
+    }
+}
+
+void rc_ir_init(void)
+{
+    ir_ctl_init(rc_ir_end);
+    ir_ctx.eid = sw_event_alloc(sw_event_func, NULL);
+#ifdef CFG_NEC_IR_OVERRIDE
+    nec_ir_override_init();
+#endif
+    ir_ctx.tid = sw_timer_alloc(rc_ir_send_msg_id, &ir_ctx);
+    co_list_init(&ir_ctx.keys);
+    ir_ctx.lock_hib = atm_pm_alloc(PM_LOCK_HIBERNATE);
+}
+
+void rc_ir_send(uint32_t address, uint32_t cmd, uint32_t delay_cs)
+{
+    if (!address || (ir_ctx.count >= CFG_RC_IR_QUEUE_MAX)) {
+	return;
+    }
+
+    ir_key_t *ikey = malloc(sizeof(ir_key_t));
+    if (!ikey) {
+	return;
+    }
+
+    ikey->address = address;
+    ikey->cmd = cmd;
+    ikey->delay_cs = delay_cs;
+
+#ifdef CFG_ATVRC_UNI_IR
+    ikey->uni_code = NULL;
+#endif
+
+    co_list_push_back(&ir_ctx.keys, &ikey->hdr);
+
+    if (!ir_ctx.count++) {
+	rc_ir_dispatch();
+    }
+    ir_ctx.pressed = true;
+}
+
+void rc_ir_repeat_end(void)
+{
+    ir_ctx.pressed = false;
+
+    if (ir_ctx.sent) {
+#ifdef CFG_ATVRC_UNI_IR
+	if(ir_ctx.is_uni) {
+	    bridge_ir_key_release();
+	    ir_ctx.is_uni = false;
+	}
+#endif
+	// this will trigger callback
+	ir_ctl_stop_rept();
+	ir_ctx.sent = false;
+    } else {
+	rc_ir_dispatch();
+    }
+}
+
+#ifdef CFG_ATVRC_UNI_IR
+bool rc_ir_check_uni_key(uint16_t atv_keycode)
+{
+    return bridge_ir_check_key(atv_keycode);
+}
+
+void rc_ir_send_uni_code(uint16_t key, uint8_t const *code, uint16_t size)
+{
+    if (!code || (ir_ctx.count >= CFG_RC_IR_QUEUE_MAX)) {
+	return;
+    }
+
+    ir_key_t *ikey = malloc(sizeof(ir_key_t));
+    if (!ikey) {
+	return;
+    }
+
+    ikey->uni_key = key;
+    ikey->uni_code = code;
+    ikey->uni_size = size;
+    ikey->delay_cs = 6;
+
+    if (ir_ctx.last_uni_key == key) {
+	uint32_t delay = uni_ir_get_rept_delay(code);
+	uint32_t delta_time = atm_get_sys_time() - ir_ctx.last_uni_sent;
+	if (delay && (atm_lpc_to_us(delta_time) < delay)) {
+	    DEBUG_TRACE("repeat delay(%lu) > delta(%lu)", delay, delta_time);
+	    ikey->delay_cs = delay / US_PER_CS;
+	}
+    }
+
+    co_list_push_back(&ir_ctx.keys, &ikey->hdr);
+
+    if (!ir_ctx.count++) {
+	rc_ir_dispatch();
+    }
+}
+
+void rc_ir_clear_uni_codes(void)
+{
+    bridge_ir_clear();
+}
+#endif
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/non_bt/rc_ir.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/non_bt/rc_ir.h
new file mode 100644
index 0000000..66ba534
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/non_bt/rc_ir.h
@@ -0,0 +1,59 @@
+/**
+ *******************************************************************************
+ *
+ * @file rc_ir.h
+ *
+ * @brief IR application part
+ *
+ * Copyright (C) Atmosic 2020-2021
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ * @brief IR initialization.
+ */
+void rc_ir_init(void);
+
+/**
+ *******************************************************************************
+ * @brief Send IR code.
+ * @param[in] address NEC address
+ * @param[in] cmd NEC command.
+ * @param[in] delay_ds Delay time to send.
+ *******************************************************************************
+ */
+void rc_ir_send(uint32_t address, uint32_t cmd, uint32_t delay_cs);
+
+/**
+ * @brief Stop repeat
+ */
+void rc_ir_repeat_end(void);
+
+#ifdef CFG_ATVRC_UNI_IR
+/**
+ *******************************************************************************
+ * @brief Check universal IR key
+ * @param[in] atv_keycode Android TV keycode
+ *******************************************************************************
+ */
+bool rc_ir_check_uni_key(uint16_t atv_keycode);
+
+/**
+ *******************************************************************************
+ * @brief Send Universal IR code data
+ * @param[in] key Universal IR key id
+ * @param[in] code Pointer of IR code data
+ * @param[in] size IR code data size
+ *******************************************************************************
+ */
+void rc_ir_send_uni_code(uint16_t key, uint8_t const *code, uint16_t size);
+
+/**
+ *******************************************************************************
+ * @brief Clear all Universal IR code data
+ *******************************************************************************
+ */
+void rc_ir_clear_uni_codes(void);
+#endif
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/non_bt/rc_keycode.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/non_bt/rc_keycode.h
new file mode 100644
index 0000000..d584b5b
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/non_bt/rc_keycode.h
@@ -0,0 +1,157 @@
+/**
+ *******************************************************************************
+ *
+ * @file rc_keycode.c
+ *
+ * @brief HID remote keycode definitions
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+#ifdef CFG_FLEX_VKEY_MAP
+#define __ATM_VKEY_MAP_CONST
+#else
+#define __ATM_VKEY_MAP_CONST const
+#endif
+
+#define CSM_USAGE 0x000C
+#define KBD_USAGE 0x0007
+
+#define CSM(x) ((CSM_USAGE << 16) | x)
+#define KBD(x) ((KBD_USAGE << 16) | x)
+
+#define BT_VOLU CSM(0xE9)
+#define BT_VOLD CSM(0xEA)
+#define BT_PLAY CSM(0xCD)
+#define BT_BACK CSM(0x224)
+#define BT_BW CSM(0xB6)
+#define BT_FW CSM(0xB5)
+#define BT_POWER CSM(0x30)
+#define BT_HOME CSM(0x223)
+#define BT_MENU KBD(0x76)
+#define BT_MIC CSM(0x221)
+#define BT_OK CSM(0x41)
+#define BT_UP CSM(0x42)
+#define BT_DOWN CSM(0x43)
+#define BT_RIGHT CSM(0x45)
+#define BT_LEFT CSM(0x44)
+
+#ifdef CFG_ATVRC_MMI
+#define BT_BKMK CSM(0x22A)
+#define BT_ALAP CSM(0x1A2)
+#define BT_PROF CSM(0x229)
+#define BT_ASST CSM(0x221)
+#define BT_SETT CSM(0x96)
+#define BT_DASHB CSM(0x9F)
+#define BT_CENTER CSM(0x41)
+#define BT_GUIDE CSM(0x8D)
+#define BT_LIVE CSM(0x89)
+#define BT_INPUT CSM(0x1BB)
+#define BT_MUTE CSM(0xE2)
+#define BT_YOUTUBE CSM(0x77)
+#define BT_NETFLIX CSM(0x78)
+#define BT_APP03 CSM(0x79)
+#define BT_APP04 CSM(0x7A)
+#define BT_CNLU CSM(0x9C)
+#define BT_CNLD CSM(0x9D)
+#define BT_FASTR CSM(0xB4)
+#define BT_RECORD CSM(0xCE)
+#define BT_PLAY CSM(0xCD)
+#define BT_FASTF CSM(0xB3)
+#define BT_RED CSM(0x69)
+#define BT_GREEN CSM(0x6A)
+#define BT_YELLOW CSM(0x6C)
+#define BT_BLUE CSM(0x6B)
+#define BT_NUM1 KBD(0x1E)
+#define BT_NUM2 KBD(0x1F)
+#define BT_NUM3 KBD(0x20)
+#define BT_NUM4 KBD(0x21)
+#define BT_NUM5 KBD(0x22)
+#define BT_NUM6 KBD(0x23)
+#define BT_NUM7 KBD(0x24)
+#define BT_NUM8 KBD(0x25)
+#define BT_NUM9 KBD(0x26)
+#define BT_NUM0 KBD(0x27)
+#define BT_INFO CSM(0x1BD)
+#define BT_SUBT CSM(0x61)
+#define BT_TEXT CSM(0x185)
+#endif
+
+#ifdef CFG_ATVRC_UNI_IR
+#define ATV_VOLU 0x18
+#define ATV_VOLD 0x19
+#define ATV_MUTE 0xA4
+#define ATV_POWER 0x1A
+#define ATV_INPUT 0xB2
+#endif
+
+#ifdef CFG_RC_IR
+#ifdef CFG_ATVRC_MMI
+#define IR_ADDR 0x88
+#define IR_POWER 0x21
+#define IR_INPUT 0x60
+#define IR_MUTE 0x25
+#define IR_VOLU 0x23
+#define IR_VOLD 0x24
+#define IR_YOUTUBE 0x63
+#define IR_NETFLIX 0x64
+#define IR_APP03 0x67
+#define IR_APP04 0x68
+#define IR_CNLU 0x33
+#define IR_CNLD 0x34
+#define IR_BKMK 0x74
+#define IR_ALAP 0x57
+#define IR_PROF 0x59
+#define IR_ASST 0x46
+#define IR_SETT 0x0F
+#define IR_DASHB 0x10
+#define IR_UP 0x15
+#define IR_DOWN 0x16
+#define IR_LEFT 0x17
+#define IR_RIGHT 0x18
+#define IR_CENTER 0x19
+#define IR_BACK 0x48
+#define IR_HOME 0x47
+#define IR_GUIDE 0x32
+#define IR_LIVE 0x61
+#define IR_FASTR 0x51
+#define IR_RECORD 0x54
+#define IR_PLAY 0x52
+#define IR_FASTF 0x53
+#define IR_RED 0x4B
+#define IR_GREEN 0x4A
+#define IR_YELLOW 0x49
+#define IR_BLUE 0x4C
+#define IR_NUM1 0x01
+#define IR_NUM2 0x02
+#define IR_NUM3 0x03
+#define IR_NUM4 0x04
+#define IR_NUM5 0x05
+#define IR_NUM6 0x06
+#define IR_NUM7 0x07
+#define IR_NUM8 0x08
+#define IR_NUM9 0x09
+#define IR_NUM0 0x0A
+#define IR_INFO 0x29
+#define IR_SUBT 0x58
+#define IR_TEXT 0x75
+#define IR_BUGR 0x96
+#else
+#define IR_ADDR 0x80
+#define IR_POWER 0x46
+#define IR_UP 0x52
+#define IR_LEFT 0x06
+#define IR_OK 0x0F
+#define IR_RIGHT 0x1A
+#define IR_MENU 0x07
+#define IR_DOWN 0x13
+#define IR_BACK 0x1B
+#define IR_VOLD 0x15
+#define IR_HOME 0x17
+#define IR_VOLU 0x16
+#endif
+#endif // CFG_RC_IR
\ No newline at end of file
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/non_bt/rc_pdm.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/non_bt/rc_pdm.h
new file mode 100644
index 0000000..78e099c
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/non_bt/rc_pdm.h
@@ -0,0 +1,95 @@
+/**
+ *******************************************************************************
+ *
+ * @file rc_pdm.h
+ *
+ * @brief PDM application part
+ *
+ * Copyright (C) Atmosic 2020-2021
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/// PDM operation type
+typedef enum {
+    /// Idle. (Not operation)
+    RC_PDM_IDLE,
+    /// Normal mode. (Sent to peer.)
+    RC_PDM_NORMAL,
+    /// Local test mode. (Drop data.)
+    RC_PDM_LOCAL_TEST_WO_DELAY,
+    /// Local test mode. (Interfere by delay and drop data.)
+    RC_PDM_LOCAL_TEST_WITH_DELAY,
+    /// Local test mode. (No buffer.)
+    RC_PDM_LOCAL_TEST_NO_BUF,
+    RC_PDM_LOCAL_TEST_MAX,
+} rc_pdm_op_t;
+
+/**
+ *******************************************************************************
+ * @brief PDM initialization.
+ *******************************************************************************
+ */
+void rc_pdm_init(void);
+
+/**
+ *******************************************************************************
+ * @brief Power on external PDM audio component.
+ *******************************************************************************
+ */
+void rc_pdm_device_pwr_on(void);
+
+/**
+ *******************************************************************************
+ * @brief Start PDM audio collection.
+ * @param op[in] PDM operation type.
+ * @param is8K[in] True if 8Khz. Otherwise is 16Khz.
+ *******************************************************************************
+ */
+void rc_pdm_start(rc_pdm_op_t op, bool is8K);
+
+/**
+ *******************************************************************************
+ * @brief Stop current PDM audio collection.
+ *******************************************************************************
+ */
+void rc_pdm_stop(void);
+
+/**
+ *******************************************************************************
+ * @brief PDM gain value adjust.
+ * @param[in] add True for increasing. Otherwise is decreasing.
+ *******************************************************************************
+ */
+void rc_pdm_gain_adjust(bool add);
+
+/**
+ *******************************************************************************
+ * @brief Resume paused PDM audio collection.
+ *******************************************************************************
+ */
+void rc_pdm_resume(void);
+
+/**
+ *******************************************************************************
+ * @brief Pause current PDM audio collection.
+ *******************************************************************************
+ */
+void rc_pdm_pause(void);
+
+/**
+ *******************************************************************************
+ * @brief Get ADPCM index and predicted sample.
+ * @param[out] idx Index
+ * @return Predicted sample.
+ *******************************************************************************
+ */
+uint16_t rc_pdm_get_adpcm_index(uint8_t *idx);
+
+/**
+ *******************************************************************************
+ * @brief Check if PDM paused.
+ *******************************************************************************
+ */
+bool rc_pdm_is_paused(void);
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/rc_mmi.c b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/rc_mmi.c
new file mode 100644
index 0000000..6f913c0
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/rc_mmi.c
@@ -0,0 +1,730 @@
+/*
+ *******************************************************************************
+ *
+ * @file rc_mmi.c
+ *
+ * @brief MMI (Man Machine Interface) of Atmosic remote controller reference design.
+ *
+ * Copyright (C) Atmosic 2020-2022
+ *
+ *******************************************************************************
+ */
+
+#include <inttypes.h>
+#include "app_config.h"
+#include "rc_hogp.h"
+#include "rc_gap.h"
+#include "led_blink.h"
+#include "app_bass.h"
+#ifdef CFG_VOHID
+#include "rc_hidau.h"
+#else
+#include "rc_atvv.h"
+#endif
+#include "rc_ir.h"
+#include "rc_pdm.h"
+#include "rc_mmi.h"
+#include "rc_mmi_vkey.h"
+#include "led_blink.h"
+#include "atm_gpio.h"
+#include "atm_debug.h"
+#include "atm_asm.h"
+#include "co_utils.h"
+#include "atm_pm.h"
+#ifdef AUTO_TEST
+#include "uart_stdout.h"
+#endif
+#include "gadc.h"
+#include "rc_keycode.h"
+#include "app_batt.h"
+#ifdef CFG_USB_DET
+#include "interrupt.h"
+#include "pinmux.h"
+#endif
+#ifdef CFG_ATVRC_ATT
+#include "bridge_att.h"
+#ifdef CFG_ATVRC_UNI_IR
+#include "bridge_ir.h"
+#endif
+#ifdef CFG_ATVRC_AUDIO
+#include "bridge_audio.h"
+#endif
+#endif  // CFG_ATVRC_ATT
+#ifdef CFG_ATVRC_CUSTOM
+#include "atvrc_custom.h"
+#endif
+#ifdef CFG_ATVRC_FIND_ME
+#include "bridge_fms.h"
+#endif
+
+#define MMI_S_TBL_IDX 0
+
+#define ATVV_PEER_TEST_COUNT 1000
+
+ATM_LOG_LOCAL_SETTING("rc_mmi", V);
+
+#if PLF_DEBUG
+static char const * const mmi_s_str[] = {
+    STR(MMI_S_BOOTED),
+    STR(MMI_S_INITING),
+    STR(MMI_S_IDLE),
+    STR(MMI_S_PAIRING),
+    STR(MMI_S_RECONNING),
+    STR(MMI_S_CONNECTED),
+ #ifdef CFG_VOHID
+    STR(MMI_S_HID_READY),
+    STR(MMI_S_HID_STREAMING),
+ #else
+    STR(MMI_S_ATVV_ONLY),
+    STR(MMI_S_HID_ONLY),
+    STR(MMI_S_HID_ATVV),
+    STR(MMI_S_ATVVING),
+#endif
+    STR(MMI_S_DISCONNING),
+    STR(MMI_S_RF_TEST),
+    STR(MMI_S_PDM_TEST)
+};
+
+static char const *const mmi_op_str[] = {
+    STR(MMI_OP_INITING),
+    STR(MMI_OP_INIT_DONE),
+    STR(MMI_OP_RECONNING),
+    STR(MMI_OP_PAIRING),
+    STR(MMI_OP_PAIR_FAIL),
+    STR(MMI_OP_RECONN_TOUT),
+    STR(MMI_OP_PAIR_TOUT),
+    STR(MMI_OP_PAIR_SUCCESS),
+    STR(MMI_OP_CONNECTED),
+    STR(MMI_OP_DISCONNED),
+    STR(MMI_OP_HID_READY),
+#ifndef CFG_VOHID
+    STR(MMI_OP_ATVV_READY),
+#endif
+    STR(MMI_OP_HID_UNREADY),
+#ifndef CFG_VOHID
+    STR(MMI_OP_ATVV_UNREADY),
+#endif
+    STR(MMI_OP_OPEN_MIC),
+    STR(MMI_OP_CLOSE_MIC),
+    STR(MMI_OP_DISCONNING),
+    STR(MMI_OP_ADV_STOPPED),
+};
+
+STATIC_ASSERT(ARRAY_LEN(mmi_op_str) == MMI_OP_NUM, "Not match");
+
+#endif
+
+
+static uint32_t key_auto_test;
+static sw_timer_id_t rc_tid_mmi_idle;
+#ifndef CFG_VOHID
+static sw_timer_id_t rc_tid_atvv_test;
+#endif
+static sw_timer_id_t rc_tid_key_test;
+static sw_timer_id_t rc_tid_mic_ctl;
+static void (*app_batt_done_cb)(void);
+
+void rc_mmi_transition(mmi_op_t op)
+{
+    atm_asm_move(MMI_S_TBL_IDX, op);
+}
+
+static void rc_s_changed(ASM_S last_s, ASM_O op, ASM_S next_s)
+{
+#if PLF_DEBUG
+    uint8_t nidx = atm_asm_ordinal(next_s);
+    uint8_t oidx = atm_asm_ordinal(op);
+    ATM_LOG(V, ATM_VT_SGR "%s" ATM_VT_SGR " (%s)", ATM_GG_BLUE,
+	mmi_s_str[nidx], ATM_DE_COLOR, mmi_op_str[oidx]);
+#endif // PLF_DEBUG
+    atm_pm_lock_info();
+    rc_mmi_vkey_state_change_notify(next_s);
+}
+
+#define RC_MMI_OPEN_MIC_DELAY_CS 1
+
+static void rc_mmi_open_mic(void)
+{
+    sw_timer_set(rc_tid_mic_ctl, RC_MMI_OPEN_MIC_DELAY_CS);
+}
+
+#ifndef CFG_VOHID
+static uint16_t atvv_test_cnt_left;
+
+#define ATVV_AUTO_TEST_TIMER_CS 700
+
+static void rc_mmi_atvv_test_timer_msg_ind(sw_timer_id_t idx, void const *ctx)
+{
+#ifdef CFG_ATVRC_AUDIO
+    if (atvv_test_cnt_left) {
+#else
+    if ((rc_atvv_state() == BLE_ATVVS_READY) && atvv_test_cnt_left) {
+#endif
+	rc_gap_local_slave_latency(true);
+	rc_hogp_send_single_key(BT_MIC);
+	rc_hogp_send_single_key(0x00);
+	rc_atvv_start_search();
+	rc_pdm_device_pwr_on();
+	rc_mmi_open_mic();
+	ATM_LOG(N, "audio test left = " ATM_VT_SGR "%d" ATM_VT_SGR,
+	    ATM_FG_CYAN, atvv_test_cnt_left, ATM_DE_COLOR);
+	atvv_test_cnt_left--;
+    }
+
+    if (atvv_test_cnt_left) {
+	sw_timer_set(rc_tid_atvv_test, ATVV_AUTO_TEST_TIMER_CS);
+    }
+}
+#endif
+#ifdef CFG_PDM_LOCAL_TEST
+static rc_pdm_op_t test_op;
+#endif
+
+static void rc_mmi_idle_timer_msg_ind(sw_timer_id_t idx, void const *ctx)
+{
+
+    if (rc_hogp_state() == BLE_HOGPD_READY) {
+	ATM_LOG(N, "idle too long timeout\n");
+    } else if (rc_hogp_state() == BLE_HOGPD_ENABLED) {
+	ATM_LOG(N, "HID not ready for a long time\n");
+    }
+
+    rc_mmi_transition(MMI_OP_DISCONNING);
+}
+
+
+static void rc_mmi_auto_key_test_timer_msg_ind(sw_timer_id_t idx, void const *ctx)
+{
+    rc_mmi_idle_timer(MMI_TOUT_START);
+    if (key_auto_test) {
+	ATM_LOG(V, "%" PRIu32 "//%d", (uint32_t)(6000-key_auto_test), 6000);
+
+	if (key_auto_test & 1){
+	    rc_hogp_send_single_key(BT_UP);
+	    rc_hogp_send_single_key(0x00);
+	    rc_hogp_send_single_key(BT_DOWN);
+	    rc_hogp_send_single_key(0x00);
+	} else {
+	    rc_hogp_send_single_key(BT_UP);
+	    rc_hogp_send_single_key(0x00);
+	    rc_hogp_send_single_key(BT_DOWN);
+	    rc_hogp_send_single_key(0x00);
+	}
+	sw_timer_set(rc_tid_key_test, (uint16_t) (50));
+    }
+
+    key_auto_test--;
+}
+
+static void rc_mmi_mic_ctl_timer_msg_ind(sw_timer_id_t idx, void const *ctx)
+{
+#ifdef CFG_PDM_LOCAL_TEST
+    rc_pdm_start(test_op, false);
+    return;
+#endif
+#ifdef CFG_VOHID
+    if (atm_asm_get_current_state(MMI_S_TBL_IDX) == MMI_S_HID_STREAMING) {
+	rc_pdm_start(RC_PDM_NORMAL, false);
+#else
+    if (atm_asm_get_current_state(MMI_S_TBL_IDX) == MMI_S_ATVVING) {
+	rc_pdm_start(RC_PDM_NORMAL, rc_atvv_is8k());
+#endif
+	return;
+    }
+}
+
+#ifdef CFG_USB_DET
+static void usb_det_intr(uint32_t mask)
+{
+    atm_gpio_clear_int_status(PIN_USB_DET);
+    if (!atm_gpio_read_gpio(PIN_USB_DET)) {
+	atm_gpio_int_set_rising(PIN_USB_DET);
+	led_off(LED_0);
+	return;
+    }
+    atm_gpio_int_set_falling(PIN_USB_DET);
+    led_on(LED_0);
+}
+#endif
+
+static void mmi_s_booted_op_initing(void)
+{
+    rc_gap_init();
+    rc_pdm_init();
+#ifdef CFG_VOHID
+    rc_hidau_init();
+#else
+    rc_atvv_init();
+#endif
+#ifdef CFG_RC_IR
+    rc_ir_init();
+#endif //CFG_RC_IR
+
+#ifndef CFG_VOHID
+    rc_tid_atvv_test = sw_timer_alloc(rc_mmi_atvv_test_timer_msg_ind, NULL);
+#endif
+    rc_tid_mmi_idle = sw_timer_alloc(rc_mmi_idle_timer_msg_ind, NULL);
+    rc_tid_key_test = sw_timer_alloc(rc_mmi_auto_key_test_timer_msg_ind, NULL);
+    rc_tid_mic_ctl = sw_timer_alloc(rc_mmi_mic_ctl_timer_msg_ind, NULL);
+
+#ifdef CFG_USB_DET
+    atm_gpio_setup(PIN_USB_DET);
+    atm_gpio_set_input(PIN_USB_DET);
+    atm_gpio_set_pullup(PIN_USB_DET);
+    interrupt_install_gpio(PIN_USB_DET, IRQ_PRI_UI, usb_det_intr);
+    if (!atm_gpio_read_gpio(PIN_USB_DET)) {
+	atm_gpio_int_set_rising(PIN_USB_DET);
+    } else {
+	atm_gpio_int_set_falling(PIN_USB_DET);
+	led_on(LED_0);
+    }
+    atm_gpio_set_int_enable(PIN_USB_DET);
+#endif
+}
+
+static void mmi_s_reconnecting_started(void)
+{
+#ifndef CFG_ATVRC_MMI
+    led_blink(LED_0, 10, 10, 0xffff);
+#endif
+}
+
+static void mmi_s_paring_started(void)
+{
+    led_blink(LED_0, 25, 25, 0xffff);
+#ifdef CFG_VKEY_BUF
+    rc_mmi_vkey_free_buf();
+#else
+    rc_mmi_vkey_clear_saved();
+#endif
+}
+
+static void mmi_pairing_stopped_routine(void)
+{
+    led_off(LED_0);
+#ifdef CFG_VKEY_BUF
+    rc_mmi_vkey_free_buf();
+#else
+    rc_mmi_vkey_clear_saved();
+#endif
+    atm_pm_lock_info();
+}
+
+static void mmi_s_pairing_success_stopped(void)
+{
+#ifdef CFG_ATVV_VER_100
+    rc_atvv_del_config();
+#endif
+    mmi_pairing_stopped_routine();
+}
+
+static void mmi_s_pairing_stopped(void)
+{
+    mmi_pairing_stopped_routine();
+#if (CFG_APP_FEATURE & APP_BATT_AUTO_TIMER_BIT)
+    app_batt_stop();
+#else
+#error "HID_remote only support app_batt with auto timer mode"
+#endif
+#ifdef CFG_ATVRC_MMI
+    led_blink(LED_1, ATVRC_LED_ERR_CS, ATVRC_LED_ERR_CS, ATVRC_LED_ERR_BLINK);
+#endif
+}
+
+static void mmi_s_pairing_disconnected(void)
+{
+    mmi_s_pairing_stopped();
+    sw_timer_clear(rc_tid_mmi_idle);
+}
+
+static void mmi_s_pairing_connected(void)
+{
+    rc_mmi_idle_timer(MMI_TOUT_START);
+#ifdef CFG_ATVRC_CUSTOM
+    led_blink(LED_0, ATVRC_LED_CFM_CS, ATVRC_LED_CFM_CS, ATVRC_LED_CFM_BLINK);
+#endif
+}
+
+static void mmi_s_reconnecting_tout(void)
+{
+    led_off(LED_0);
+#if (CFG_APP_FEATURE & APP_BATT_AUTO_TIMER_BIT)
+    app_batt_stop();
+#endif
+}
+
+static void mmi_s_reconnecting_connected(void)
+{
+    rc_mmi_idle_timer(MMI_TOUT_START);
+#ifdef CFG_ATVRC_CUSTOM
+    led_blink(LED_0, ATVRC_LED_CFM_CS, ATVRC_LED_CFM_CS, ATVRC_LED_CFM_BLINK);
+#else
+    led_off(LED_0);
+#endif
+}
+
+static void mmi_s_initing_op_done(void)
+{
+#ifdef CFG_PDM_LOCAL_TEST
+    rc_mmi_enter_test(MMI_TEST_PDM);
+#endif
+#ifdef CFG_RF_TEST
+    rc_mmi_enter_test(MMI_TEST_RF);
+#endif
+    app_batt_done_cb();
+}
+
+static void mmi_s_close_mic(void)
+{
+    rc_pdm_stop();
+    rc_mmi_idle_timer(MMI_TOUT_START);
+    rc_gap_local_slave_latency(false);
+#ifdef CFG_ATVRC_MMI
+    if (!rc_atvv_is_htt_model()) {
+	led_off(LED_0);
+    }
+#endif
+}
+
+static void mmi_s_streaming_open_mic(void)
+{
+#ifdef CFG_ATVV_VER_100
+    // 4.4
+    // 1. if microphone is open because of a previously
+    // sent MIC_OPEN command, then the Remote should restart an audio
+    // stream and notify Android TV host with AUDIO_START message;
+    ATM_LOG(D, "Mic already opened");
+#else
+    ATM_LOG(E, "Mic already opened");
+#endif
+}
+
+static void mmi_s_open_mic(void)
+{
+    rc_gap_local_slave_latency(true);
+    rc_pdm_device_pwr_on();
+    // wait for device charged.
+    rc_mmi_open_mic();
+}
+
+static void mmi_s_hid_ready(void)
+{
+    rc_mmi_idle_timer(MMI_TOUT_START);
+    rc_gap_nego_parameter();
+#ifdef CFG_VKEY_BUF
+    rc_mmi_vkey_flush_buf();
+#else
+    uint32_t key = rc_mmi_vkey_get_saved();
+    if (key && (key != BT_MIC)) {
+	rc_hogp_send_single_key(key);
+	rc_hogp_send_single_key(0);
+	rc_mmi_vkey_clear_saved();
+    }
+#endif
+}
+
+static void mmi_s_hid_ready_pairing_stopped(void)
+{
+    mmi_s_pairing_stopped();
+    mmi_s_hid_ready();
+    rc_gap_enter_pairing_next_boot(false);
+}
+
+static void mmi_s_disconnecting(void)
+{
+    rc_pdm_stop();
+    rc_gap_disconnect();
+}
+
+static void mmi_s_disconnected(void)
+{
+    led_off(LED_0);
+#ifndef CFG_VOHID
+    sw_timer_clear(rc_tid_atvv_test);
+#endif
+    sw_timer_clear(rc_tid_key_test);
+    sw_timer_clear(rc_tid_mmi_idle);
+#if (CFG_APP_FEATURE & APP_BATT_AUTO_TIMER_BIT)
+    app_batt_stop();
+#endif
+}
+
+static void mmi_s_prf_disconnected(void)
+{
+    mmi_s_disconnected();
+    rc_pdm_stop();
+    key_auto_test = 0;
+}
+
+static void mmi_s_unexp_disconnected(void)
+{
+    ATM_LOG(E, "Unexpected disconnection.");
+#ifdef CFG_VOHID
+    rc_hidau_stop_search();
+#else
+    rc_atvv_stop_search();
+#endif
+    mmi_s_prf_disconnected();
+}
+
+static state_entry const mmi_s_tbl[] = {
+    {MMI_S_BOOTED, MMI_OP_INITING, MMI_S_INITING, mmi_s_booted_op_initing},
+    {MMI_S_IDLE, MMI_OP_RECONNING, MMI_S_RECONNING, mmi_s_reconnecting_started},
+#ifndef CFG_VOHID
+    {MMI_S_IDLE, MMI_OP_ATVV_UNREADY, MMI_S_IDLE, NULL},
+#endif
+    {MMI_S_IDLE, MMI_OP_PAIRING, MMI_S_PAIRING, mmi_s_paring_started},
+    {MMI_S_IDLE, MMI_OP_DISCONNING, MMI_S_IDLE, NULL},
+    {MMI_S_IDLE, MMI_OP_DISCONNED, MMI_S_IDLE, NULL},
+    {MMI_S_IDLE, MMI_OP_PAIR_FAIL, MMI_S_IDLE, NULL},
+    {MMI_S_IDLE, MMI_OP_CLOSE_MIC, MMI_S_IDLE, mmi_s_close_mic},
+    {MMI_S_INITING, MMI_OP_INIT_DONE, MMI_S_IDLE, mmi_s_initing_op_done},
+    {MMI_S_INITING, MMI_OP_RECONNING, MMI_S_RECONNING,
+	mmi_s_reconnecting_started},
+    {MMI_S_INITING, MMI_OP_PAIRING, MMI_S_PAIRING, mmi_s_paring_started},
+    {MMI_S_RECONNING, MMI_OP_CONNECTED, MMI_S_CONNECTED,
+	mmi_s_reconnecting_connected},
+    {MMI_S_RECONNING, MMI_OP_RECONN_TOUT, MMI_S_IDLE, mmi_s_reconnecting_tout},
+    {MMI_S_RECONNING, MMI_OP_ADV_STOPPED, MMI_S_IDLE, NULL},
+    {MMI_S_PAIRING, MMI_OP_CONNECTED, MMI_S_PAIRING, mmi_s_pairing_connected},
+#ifdef CFG_ATVRC_WAKEUP
+    {MMI_S_IDLE, MMI_OP_RECONN_TOUT, MMI_S_IDLE, NULL},
+    {MMI_S_RECONNING, MMI_OP_DISCONNING, MMI_S_IDLE, NULL},
+    {MMI_S_PAIRING, MMI_OP_DISCONNING, MMI_S_PAIRING, NULL},
+#else
+    {MMI_S_PAIRING, MMI_OP_DISCONNING, MMI_S_DISCONNING, mmi_s_disconnecting},
+#endif
+    {MMI_S_PAIRING, MMI_OP_DISCONNED, MMI_S_IDLE, mmi_s_pairing_disconnected},
+    {MMI_S_PAIRING, MMI_OP_PAIR_FAIL, MMI_S_CONNECTED, mmi_s_pairing_stopped},
+    {MMI_S_PAIRING, MMI_OP_PAIR_TOUT, MMI_S_IDLE, mmi_s_pairing_stopped},
+    {MMI_S_PAIRING, MMI_OP_PAIR_SUCCESS, MMI_S_CONNECTED,
+	mmi_s_pairing_success_stopped},
+    {MMI_S_PAIRING, MMI_OP_ADV_STOPPED, MMI_S_IDLE, mmi_s_pairing_stopped},
+#ifdef CFG_VOHID
+    {MMI_S_PAIRING, MMI_OP_HID_READY, MMI_S_HID_READY,
+	mmi_s_hid_ready_pairing_stopped},
+    {MMI_S_CONNECTED, MMI_OP_HID_READY, MMI_S_HID_READY, mmi_s_hid_ready},
+#else
+    {MMI_S_PAIRING, MMI_OP_HID_READY, MMI_S_HID_ONLY,
+	mmi_s_hid_ready_pairing_stopped},
+#ifdef CFG_ATVRC_AUDIO
+    {MMI_S_PAIRING, MMI_OP_ATVV_UNREADY, MMI_S_PAIRING, NULL},
+    {MMI_S_PAIRING, MMI_OP_ATVV_READY, MMI_S_ATVV_ONLY, NULL},
+    {MMI_S_ATVV_ONLY, MMI_OP_PAIR_SUCCESS, MMI_S_ATVV_ONLY, NULL},
+    {MMI_S_ATVV_ONLY, MMI_OP_PAIR_FAIL, MMI_S_ATVV_ONLY, NULL},
+#endif
+    {MMI_S_CONNECTED, MMI_OP_ATVV_READY, MMI_S_ATVV_ONLY, NULL},
+    {MMI_S_CONNECTED, MMI_OP_HID_READY, MMI_S_HID_ONLY, mmi_s_hid_ready},
+#endif
+    {MMI_S_CONNECTED, MMI_OP_DISCONNING, MMI_S_DISCONNING, mmi_s_disconnecting},
+    {MMI_S_CONNECTED, MMI_OP_DISCONNED, MMI_S_IDLE, mmi_s_disconnected},
+#ifndef CFG_VOHID
+    {MMI_S_CONNECTED, MMI_OP_ATVV_UNREADY, MMI_S_CONNECTED, NULL},
+#endif
+    {MMI_S_CONNECTED, MMI_OP_PAIR_SUCCESS, MMI_S_CONNECTED, NULL},
+    {MMI_S_CONNECTED, MMI_OP_PAIR_FAIL, MMI_S_CONNECTED, NULL},
+#ifdef CFG_VOHID
+    {MMI_S_HID_READY, MMI_OP_OPEN_MIC, MMI_S_HID_STREAMING, mmi_s_open_mic},
+    {MMI_S_HID_READY, MMI_OP_DISCONNED, MMI_S_IDLE, mmi_s_prf_disconnected},
+    {MMI_S_HID_READY, MMI_OP_DISCONNING, MMI_S_DISCONNING, mmi_s_disconnecting},
+    {MMI_S_HID_STREAMING, MMI_OP_OPEN_MIC, MMI_S_HID_STREAMING,
+	mmi_s_streaming_open_mic},
+    {MMI_S_HID_STREAMING, MMI_OP_CLOSE_MIC, MMI_S_HID_READY, mmi_s_close_mic},
+    {MMI_S_HID_STREAMING, MMI_OP_DISCONNED, MMI_S_IDLE,
+	mmi_s_unexp_disconnected},
+#else
+    {MMI_S_HID_ONLY, MMI_OP_ATVV_READY, MMI_S_HID_ATVV, mmi_s_hid_ready},
+    {MMI_S_HID_ONLY, MMI_OP_ATVV_UNREADY, MMI_S_HID_ONLY, NULL},
+    {MMI_S_ATVV_ONLY, MMI_OP_ATVV_UNREADY, MMI_S_CONNECTED, NULL},
+    {MMI_S_ATVV_ONLY, MMI_OP_HID_READY, MMI_S_HID_ATVV, mmi_s_hid_ready},
+    {MMI_S_ATVV_ONLY, MMI_OP_ATVV_READY, MMI_S_ATVV_ONLY, NULL},
+    {MMI_S_ATVV_ONLY, MMI_OP_DISCONNED, MMI_S_IDLE, mmi_s_prf_disconnected},
+    {MMI_S_HID_ATVV, MMI_OP_ATVV_READY, MMI_S_HID_ATVV, NULL},
+    {MMI_S_HID_ATVV, MMI_OP_ATVV_UNREADY, MMI_S_HID_ONLY, NULL},
+    {MMI_S_HID_ATVV, MMI_OP_OPEN_MIC, MMI_S_ATVVING, mmi_s_open_mic},
+    {MMI_S_HID_ATVV, MMI_OP_DISCONNED, MMI_S_IDLE, mmi_s_prf_disconnected},
+    {MMI_S_ATVV_ONLY, MMI_OP_DISCONNING, MMI_S_DISCONNING, mmi_s_disconnecting},
+    {MMI_S_HID_ATVV, MMI_OP_DISCONNING, MMI_S_DISCONNING, mmi_s_disconnecting},
+    {MMI_S_HID_ONLY, MMI_OP_DISCONNING, MMI_S_DISCONNING, mmi_s_disconnecting},
+    {MMI_S_HID_ONLY, MMI_OP_DISCONNED, MMI_S_IDLE, mmi_s_prf_disconnected},
+    {MMI_S_ATVVING, MMI_OP_CLOSE_MIC, MMI_S_HID_ATVV, mmi_s_close_mic},
+    {MMI_S_ATVVING, MMI_OP_OPEN_MIC, MMI_S_ATVVING, mmi_s_streaming_open_mic},
+    {MMI_S_ATVVING, MMI_OP_DISCONNED, MMI_S_IDLE, mmi_s_unexp_disconnected},
+    {MMI_S_HID_ATVV, MMI_OP_CLOSE_MIC, MMI_S_HID_ATVV, NULL},
+#endif
+    {MMI_S_DISCONNING, MMI_OP_DISCONNED, MMI_S_IDLE, mmi_s_disconnected},
+    {MMI_S_RF_TEST, MMI_OP_DISCONNED, MMI_S_RF_TEST, NULL},
+};
+
+static void rc_batt_app_start(void (*done)(void))
+{
+    rc_mmi_transition(MMI_OP_INITING);
+
+    app_batt_done_cb = done;
+}
+
+static void rc_batt_app_stop(void (*done)(void))
+{
+    if (atm_asm_get_current_state(MMI_S_TBL_IDX) != MMI_S_BOOTED) {
+	led_off(LED_0);
+	rc_gap_stop();
+    }
+    done();
+}
+
+static rep_vec_err_t rc_mmi_plf_reset(void)
+{
+    led_off(LED_0);
+
+    return (RV_NEXT);
+}
+
+void rc_mmi_init(void)
+{
+    RV_PLF_RESET_ADD(rc_mmi_plf_reset);
+#ifdef CFG_ATVRC_CUSTOM
+    atvrc_custom_init();
+    rc_mmi_vkey_update_ui(atvrc_custom_get_ui_layout());
+#endif
+#if defined(CFG_ATVRC_UNI_IR) || defined(CFG_ATVRC_AUDIO)
+    bridge_att_init();
+#endif
+#ifdef CFG_ATVRC_UNI_IR
+    bridge_ir_init();
+#endif
+#ifdef CFG_ATVRC_AUDIO
+    bridge_audio_init();
+#endif
+#ifdef CFG_ATVRC_FIND_ME
+    bridge_fms_init();
+#endif
+    atm_asm_init_table(MMI_S_TBL_IDX, mmi_s_tbl, ARRAY_LEN(mmi_s_tbl));
+    atm_asm_reg_state_change_cb(MMI_S_TBL_IDX, rc_s_changed);
+    atm_asm_set_current_state(MMI_S_TBL_IDX, MMI_S_BOOTED);
+    static app_batt_cbs_t const cbs = {
+	.app_start = rc_batt_app_start,
+	.app_stop = rc_batt_app_stop,
+	.level_update = app_bass_send_battery_lvl,
+    };
+    app_batt_start(&cbs);
+}
+
+void rc_mmi_idle_timer(mmi_tout_t op)
+{
+    uint8_t state = atm_asm_get_current_state(MMI_S_TBL_IDX);
+    switch (op) {
+	case MMI_TOUT_START: {
+#ifdef CFG_VOHID
+	    if (state == MMI_S_HID_READY) {
+#else
+	    if (state == MMI_S_HID_ONLY || state == MMI_S_HID_ATVV) {
+#endif
+		if (RC_CONN_READY_TOUT_CS) {
+		    sw_timer_set(rc_tid_mmi_idle, RC_CONN_READY_TOUT_CS);
+		} else {
+		    sw_timer_clear(rc_tid_mmi_idle);
+		}
+	    } else {
+		if (RC_CONN_NOT_READY_TOUT_CS) {
+		    sw_timer_set(rc_tid_mmi_idle, RC_CONN_NOT_READY_TOUT_CS);
+		} else {
+		    sw_timer_clear(rc_tid_mmi_idle);
+		}
+	    }
+	} break;
+	case MMI_TOUT_STOP: {
+	    sw_timer_clear(rc_tid_mmi_idle);
+	} break;
+	case MMI_TOUT_FORCE: {
+	    sw_timer_set(rc_tid_mmi_idle, 100);
+	} break;
+	default:
+	    break;
+    }
+}
+
+#ifdef CFG_PDM_LOCAL_TEST
+#define MAX_TEST_TIME_CS 5000
+#define MIN_TEST_TIME_CS 500
+#ifndef TEST_COUNT
+#define TEST_COUNT 20
+#endif
+
+static char const * const test_type_str [] = {
+    "", "", "Frequency test", "Overflow test", "No buffer test"
+};
+static sw_timer_id_t test_tid;
+static uint16_t test_count;
+static void start_test(void)
+{
+    test_op = (rand() % (RC_PDM_LOCAL_TEST_MAX - 2)) + 2;
+    uint32_t test_time = (rand() % (MAX_TEST_TIME_CS - MIN_TEST_TIME_CS)) +
+	MIN_TEST_TIME_CS;
+    sw_timer_set(test_tid, test_time);
+    sw_timer_clear(rc_tid_mmi_idle);
+    rc_pdm_device_pwr_on();
+#ifdef CFG_VOHID
+    rc_hidau_test_start();
+#else
+    rc_atvv_test_start();
+#endif
+    rc_mmi_open_mic();
+    ATM_LOG(N, "PDM testing[%d] (%" PRIu32 " s): " ATM_VT_SGR "%s" ATM_VT_SGR,
+	test_count, CO_DIVIDE_ROUND(test_time, 100), ATM_FG_CYAN,
+	test_type_str[test_op], ATM_DE_COLOR);
+
+}
+
+static void stop_start(sw_timer_id_t tid, void const *ctx)
+{
+    atm_asm_set_current_state(MMI_S_TBL_IDX, MMI_S_PDM_TEST);
+    static bool not_first_time;
+    if (not_first_time) {
+	rc_pdm_stop();
+    } else {
+	not_first_time = true;
+    }
+
+    if (++test_count == TEST_COUNT) {
+	ATM_LOG(N, "pdm_local_test passed !");
+#ifdef AUTO_TEST
+	UartEndSimulation();
+#endif
+	return;
+    }
+    start_test();
+}
+#endif // CFG_PDM_LOCAL_TEST
+
+void rc_mmi_enter_test(mmi_test_t op)
+{
+    switch(op) {
+	case MMI_TEST_KEY: {
+	    ATM_LOG(N, "key current test start!! 6000 times");
+	    key_auto_test = 6000;
+	    sw_timer_set(rc_tid_key_test, (uint16_t)(50));
+	    rc_mmi_idle_timer(MMI_TOUT_STOP);
+	} break;
+	case MMI_TEST_RF: {
+	    ATM_LOG(N, "rftest");
+	    atm_asm_set_current_state(MMI_S_TBL_IDX, MMI_S_RF_TEST);
+	    led_blink(LED_0, 10, 10, 0xffff);
+	    rc_gap_enter_rf_test();
+	} break;
+#ifndef CFG_VOHID
+	case MMI_TEST_ATVV: {
+	    rc_mmi_idle_timer(MMI_TOUT_STOP);
+	    atvv_test_cnt_left = ATVV_PEER_TEST_COUNT;
+	    sw_timer_set(rc_tid_atvv_test, (uint16_t)(50));
+	} break;
+#endif
+#ifdef CFG_PDM_LOCAL_TEST
+	case MMI_TEST_PDM: {
+	    test_tid = sw_timer_alloc(stop_start, NULL);
+	    sw_timer_set(test_tid, 10);
+	} break;
+#endif // CFG_PDM_LOCAL_TEST
+	default:
+	break;
+    }
+}
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/rc_mmi.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/rc_mmi.h
new file mode 100644
index 0000000..57bd473
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/rc_mmi.h
@@ -0,0 +1,146 @@
+/*
+ *******************************************************************************
+ *
+ * @file rc_mmi.c
+ *
+ * @brief MMI of Atmosic remote controller reference design.
+ *
+ * Copyright (C) Atmosic 2020-2021
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/// MMI states
+typedef enum {
+    /// System booted.
+    MMI_S_BOOTED,
+    /// Initialing.
+    MMI_S_INITING,
+    /// Initialized.
+    MMI_S_IDLE,
+    /// Pairing.
+    MMI_S_PAIRING,
+    /// Reconnecting.
+    MMI_S_RECONNING,
+    /// Connected but no profile ready.
+    MMI_S_CONNECTED,
+#ifdef CFG_VOHID
+    /// HID is ready
+    MMI_S_HID_READY,
+    /// Audio streaming
+    MMI_S_HID_STREAMING,
+#else
+    /// ATVV is ready but HID isn't.
+    MMI_S_ATVV_ONLY,
+    /// HID is ready but ATVV isn't.
+    MMI_S_HID_ONLY,
+    /// HID and ATVV are ready.
+    MMI_S_HID_ATVV,
+    /// ATVV is transferring audio.
+    MMI_S_ATVVING,
+#endif
+    /// Disconnecting.
+    MMI_S_DISCONNING,
+    /// Under RF testing mode.
+    MMI_S_RF_TEST,
+    /// Under PDM local test
+    MMI_S_PDM_TEST,
+    /// Dummy state for marking.
+    MMI_S_END
+} mmi_state_t;
+
+/// MMI operations for MMI state transition
+typedef enum {
+    /// Started initialing.
+    MMI_OP_INITING,
+    /// Initialized.
+    MMI_OP_INIT_DONE,
+    /// Started reconnecting.
+    MMI_OP_RECONNING,
+    /// Started pairing.
+    MMI_OP_PAIRING,
+    /// Pairing failed.
+    MMI_OP_PAIR_FAIL,
+    /// Reconnection timeout.
+    MMI_OP_RECONN_TOUT,
+    /// Pairing timeout.
+    MMI_OP_PAIR_TOUT,
+    /// Pairing success.
+    MMI_OP_PAIR_SUCCESS,
+    /// Connected.
+    MMI_OP_CONNECTED,
+    /// Disconnected.
+    MMI_OP_DISCONNED,
+    /// HOGP became ready.
+    MMI_OP_HID_READY,
+#ifndef CFG_VOHID
+    /// ATVV became ready.
+    MMI_OP_ATVV_READY,
+#endif
+    /// HOGP became unready.
+    MMI_OP_HID_UNREADY,
+#ifndef CFG_VOHID
+    /// ATVV became unready.
+    MMI_OP_ATVV_UNREADY,
+#endif
+    /// Started transferring audio.
+    MMI_OP_OPEN_MIC,
+    /// Stopped transferring audio.
+    MMI_OP_CLOSE_MIC,
+    /// Started disconnecting.
+    MMI_OP_DISCONNING,
+    /// ADV became stopped.
+    MMI_OP_ADV_STOPPED,
+    /// Number of MMI operations
+    MMI_OP_NUM
+} mmi_op_t;
+
+/// MMI timeout setting for @ref rc_mmi_idle_timer API
+typedef enum mmi_tout_s {
+    /// Enable and reset MMI timeout timer.
+    MMI_TOUT_START,
+    /// Disable and clear MMI timeout timer.
+    MMI_TOUT_STOP,
+    /// Force MMI timeout in a short time.
+    MMI_TOUT_FORCE,
+} mmi_tout_t;
+
+/// MMI test mode type for @ref rc_mmi_enter_test API
+typedef enum mmi_test_s {
+#ifndef CFG_VOHID
+    /// ATVV auto test.
+    MMI_TEST_ATVV,
+#endif
+    /// RF test.
+    MMI_TEST_RF,
+    /// KEY auto test.
+    MMI_TEST_KEY,
+#ifdef CFG_PDM_LOCAL_TEST
+    /// PDM local test.
+    MMI_TEST_PDM,
+#endif
+} mmi_test_t;
+
+/**
+ * @brief MMI state machine initialization.
+ */
+void rc_mmi_init(void);
+
+/**
+ * @brief MMI state transition.
+ * @param[in] op Current operation.
+ */
+void rc_mmi_transition(mmi_op_t op);
+
+/**
+ * @brief MMI idle timer setting.
+ * @param[in] op Operation.
+ */
+void rc_mmi_idle_timer(mmi_tout_t op);
+
+/**
+ * @brief Enter test mode.
+ * @param[in] op Test mode.
+ */
+void rc_mmi_enter_test(mmi_test_t op);
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/rc_mmi_vkey.c b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/rc_mmi_vkey.c
new file mode 100644
index 0000000..7211761
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/rc_mmi_vkey.c
@@ -0,0 +1,751 @@
+/*
+ *******************************************************************************
+ *
+ * @file rc_mmi_vkey.c
+ *
+ * @brief VKEY application part.
+ *
+ * Copyright (C) Atmosic 2020-2022
+ *
+ *******************************************************************************
+ */
+
+#include <inttypes.h>
+#include "app_config.h"
+#include "rc_hogp.h"
+
+#ifdef CFG_VOHID
+#include "rc_hidau.h"
+#else
+#include "rc_atvv.h"
+#endif
+#include "rc_gap.h"
+#include "rc_mmi.h"
+#include "rc_mmi_vkey.h"
+#include "led_blink.h"
+#include "rc_pdm.h"
+#include "rc_ir.h"
+#include "atm_debug.h"
+#include "keyboard.h"
+#include "co_utils.h"
+#include "atm_asm.h"
+#include "atm_vkey.h"
+#include "atm_pm.h"
+#if defined(CFG_ATVRC_CUSTOM) && defined(CFG_ATVRC_WAKEUP)
+#include "atvrc_custom.h"
+#endif
+#ifdef LED_UART_MUX
+#include "timer.h"
+#include "at_wrpr.h"
+#include "at_pinmux.h"
+#include "pinmux.h"
+#endif
+#ifdef CFG_EN_GHOSTKEY
+#include "keyboard_ghostkey.h"
+#endif
+#include "rc_keycode.h"
+#include STR(VKEY_MAP_FILE)
+
+#ifdef CFG_ATVRC_FIND_ME
+#include "buzzer.h"
+#endif
+
+#ifdef CFG_ATVRC_MMI
+#include "timer.h"
+#include "sw_timer.h"
+static sw_timer_id_t tid_delay_reset;
+#define VK_MIC VK_ASST
+#define VK_OK VK_CENTER
+static bool wait_comb_key;
+#endif
+
+STATIC_ASSERT(ARRAY_LEN(bt_keycode) <= ATM_VKEY_MAX,
+    "Vkey number exceeds ATM_VKEY_MAX");
+
+#ifndef CFG_VKEY_BUF
+static uint32_t mmi_saved_key;
+#endif
+static pm_lock_id_t rc_vk_lock_hiber;
+
+enum {
+    VKEY_TABLE_HID_NOT_READY,
+    VKEY_TABLE_HID_READY,
+    VKEY_TABLE_RF_TEST,
+    VKEY_TABLE_MAX
+};
+
+typedef struct {
+    void *handle[VKEY_TABLE_MAX];
+    uint8_t cur_state;
+    uint8_t cur_hdl_idx;
+} rc_mmi_vkey_ctx_t;
+
+#ifdef CFG_RC_IR
+#define RC_IR_DELAY_CS 9
+#define RC_IR_DELAY_ON_HID_CS 6
+#endif
+
+// Time for led on while key down
+#define KEY_DOWN_LED_INTERVAL_CS 10
+
+// VKEY_DOWN_FIRST => send key down
+static void send_rpt(atm_vk_idx_t vkey, void const *ctx)
+{
+    rc_mmi_vkey_ctx_t const *context = ctx;
+
+    rc_mmi_idle_timer(MMI_TOUT_START);
+    led_blink(LED_0, KEY_DOWN_LED_INTERVAL_CS, 0, 0x1);
+    if (bt_keycode[vkey] == BT_MIC) {
+#ifdef CFG_VOHID
+	if (context->cur_state == MMI_S_HID_READY) {
+	    rc_gap_local_slave_latency(true);
+	    rc_hidau_start_search();
+	} else if (context->cur_state == MMI_S_HID_STREAMING) {
+	    rc_hidau_stop_search();
+	}
+#else // CFG_VOHID
+	// Dealing with ATVV (only allowed in ATVV ready)
+	if ((context->cur_state == MMI_S_HID_ATVV) ||
+#ifdef CFG_ATVV_VER_100
+	    (context->cur_state == MMI_S_ATVVING) ||
+#endif
+	    (context->cur_state == MMI_S_ATVV_ONLY)) {
+	    rc_gap_local_slave_latency(true);
+	    rc_atvv_start_search();
+	} else if (context->cur_state != MMI_S_ATVVING) {
+	    DEBUG_TRACE("Peer didn't enable ATVV");
+	}
+	if (rc_atvv_is_legacy_model()) {
+	    rc_hogp_send_single_key(BT_MIC);
+	    rc_hogp_send_single_key(CSM(0));
+#ifdef CFG_ATVRC_MMI
+	    led_on(LED_0);
+#endif
+	} else if (rc_atvv_is_htt_model()) {
+	    led_on(LED_0);
+	}
+#ifdef CFG_ATVRC_MMI
+	else {
+	    led_blink(LED_0, 50, 50, 0xffff);
+	}
+#endif
+#endif // CFG_VOHID
+    }  else {
+#ifdef CFG_ATVRC_UNI_IR
+	if (rc_ir_check_uni_key(atv_keycode[vkey])) {
+	    led_blink(LED_0, ATVRC_LED_KEY_CS, 0, ATVRC_LED_KEY_BLINK);
+	    led_blink(LED_1, ATVRC_LED_KEY_CS, 0, ATVRC_LED_KEY_BLINK);
+	    return;
+	}
+#endif
+	rc_hogp_send_single_key(bt_keycode[vkey]);
+#ifndef CFG_VOHID
+	if (bt_keycode[vkey] == BT_OK) {
+	    rc_atvv_dpad_select();
+	}
+#endif
+#ifdef CFG_RC_IR_ON_HID
+	rc_ir_send(ir_addr[vkey], ir_cmd[vkey],
+	    RC_IR_DELAY_ON_HID_CS);
+#endif
+    }
+    return;
+}
+
+static void rc_send_rpt(atm_vk_dnup_evt_t const *evt, void const *ctx)
+{
+#ifdef CFG_ATVRC_FIND_ME
+    buzzer_stop();
+#endif
+    send_rpt(evt->top.vkey, ctx);
+}
+
+static bool comb_rpt_sent;
+static void rc_send_comb_rpt(atm_vk_dnup_inter_evt_t const *evt,
+    void const *ctx)
+{
+    if (comb_rpt_sent) {
+	// No more combined reports until release all keys.
+	return;
+    }
+    send_rpt(evt->top.vkey, ctx);
+    comb_rpt_sent = true;
+}
+
+static void rc_sent_up_(atm_vk_dnup_inter_evt_t const *evt, void const *ctx)
+{
+    rc_mmi_idle_timer(MMI_TOUT_START);
+    rc_hogp_send_single_key(bt_keycode[evt->top.vkey] & ~0xFFFF);
+#ifdef CFG_RC_IR_ON_HID
+    rc_ir_repeat_end();
+#endif
+    return;
+}
+
+// VKEY_UP_LAST => send key up
+static void rc_sent_up(atm_vk_dnup_evt_t const *evt, void const *ctx)
+{
+    comb_rpt_sent = false;
+    rc_mmi_idle_timer(MMI_TOUT_START);
+    rc_hogp_send_single_key(bt_keycode[evt->top.vkey] & ~0xFFFF);
+#ifdef CFG_RC_IR_ON_HID
+    rc_ir_repeat_end();
+#endif
+#ifdef CFG_ATVRC_UNI_IR
+    rc_ir_repeat_end();
+#endif
+#ifdef CFG_ATVRC_MMI
+    // static LED during voice search
+    if ((bt_keycode[evt->top.vkey] == BT_MIC) && !rc_atvv_is_htt_model()) {
+	return;
+    }
+#endif
+    led_off(LED_0);
+    return;
+}
+
+static void rc_mic_up(atm_vk_dnup_evt_t const *evt, void const *ctx)
+{
+#ifdef CFG_ATVV_VER_100
+    if (!rc_atvv_is_htt_model()) {
+	return;
+    }
+    rc_mmi_vkey_ctx_t const *context = ctx;
+    if (context->cur_state == MMI_S_ATVVING) {
+	rc_atvv_stop_search();
+    }
+#endif
+}
+
+#ifdef CFG_RC_IR
+static void rc_save_key_up(atm_vk_dnup_evt_t const *evt, void const *ctx)
+{
+    rc_ir_repeat_end();
+    return;
+}
+#endif
+
+static bool rc_hold_test(atm_vk_hd_evt_t const *evt, void const *ctx)
+{
+    return evt->time_ms < 4000;
+}
+
+#ifdef CFG_RC_TEST_MODE
+#include "rc_test_mode.h"
+static void rc_ok_up(atm_vk_dnup_evt_t const *evt, void const *ctx)
+{
+    rc_test_mode_control(RC_TEST_CANCEL);
+}
+
+static void rc_ok_click(atm_vk_hc_evt_t const *evt, void const *ctx)
+{
+    switch (evt->top.u8vkey) {
+	case VK_UP:
+	case VK_DOWN:
+	case VK_RIGHT:
+	case VK_LEFT: {
+	    rc_test_input_t num;
+	    if (evt->top.u8vkey == VK_UP) {
+		num = RC_TEST_U_GOT;
+	    } else if (evt->top.u8vkey == VK_DOWN) {
+		num = RC_TEST_D_GOT;
+	    } else if (evt->top.u8vkey == VK_RIGHT) {
+		num = RC_TEST_R_GOT;
+	    } else if (evt->top.u8vkey == VK_LEFT) {
+		num = RC_TEST_L_GOT;
+	    } else {
+		num = RC_TEST_CANCEL;
+	    }
+	    rc_test_mode_control(num);
+	} break;
+	default:
+	    rc_test_mode_control(RC_TEST_CANCEL);
+	break;
+    }
+}
+
+static bool rc_ok_back(atm_vk_hd_evt_t const *evt, void const *ctx)
+{
+    return false;
+}
+
+static void rc_ok_back_sts(bool pressed, void const *ctx)
+{
+    if (pressed) {
+	rc_test_mode_control(RC_TEST_CANCEL);
+    }
+}
+
+#endif
+
+static bool rc_del_bond(atm_vk_hd_evt_t const *evt, void const *ctx)
+{
+#ifdef CFG_ATVRC_MMI
+    if (sw_timer_active(tid_delay_reset)) {
+	return true;
+    }
+#endif
+    rc_gap_remove_all_bond();
+    led_off(LED_0);
+#ifdef CFG_ATVRC_UNI_IR
+    rc_ir_clear_uni_codes();
+#endif
+#ifdef CFG_ATVRC_MMI
+    atm_timer_mdelay(100);
+    led_blink(LED_0, ATVRC_LED_CFM_CS, ATVRC_LED_CFM_CS, ATVRC_LED_CFM_BLINK);
+    wait_comb_key = false;
+#define ATVRC_LED_CFM_DELAY_CS (ATVRC_LED_CFM_CS * 5)
+    sw_timer_set(tid_delay_reset, ATVRC_LED_CFM_DELAY_CS);
+#else
+    platform_reset(RESET_NO_ERROR);
+#endif
+    return true;
+}
+
+static bool rc_pair_mode(atm_vk_hd_evt_t const *evt, void const *ctx)
+{
+    rc_gap_enter_pairing_next_boot(true);
+    led_off(LED_0);
+    platform_reset(RESET_NO_ERROR);
+    return true;
+}
+
+#ifdef CFG_ATVRC_MMI
+static void rc_comb_key_led_ctl(bool pressed)
+{
+    if (pressed && !wait_comb_key) {
+	wait_comb_key = true;
+	led_on(LED_0);
+    } else if (!pressed && wait_comb_key) {
+	wait_comb_key = false;
+	led_off(LED_0);
+    }
+}
+
+static bool rc_bug_report(atm_vk_hd_evt_t const *evt, void const *ctx)
+{
+    DEBUG_TRACE("BUG_REPORT");
+    wait_comb_key = false;
+    led_blink(LED_0, KEY_DOWN_LED_INTERVAL_CS, KEY_DOWN_LED_INTERVAL_CS, 2);
+#ifdef CFG_RC_IR
+    rc_ir_send(IR_ADDR, IR_BUGR, RC_IR_DELAY_CS);
+#endif
+    return false;
+}
+
+static bool rc_access_shortcut(atm_vk_hd_evt_t const *evt, void const *ctx)
+{
+    DEBUG_TRACE("ACCESS_SHORTCUT");
+    wait_comb_key = false;
+    return false;
+}
+#endif // CFG_ATVRC_MMI
+
+static void rc_atvv_test(atm_vk_hc_evt_t const *evt, void const *ctx)
+{
+    if (evt->top.u8vkey == VK_VOLUP) {
+	rc_pdm_gain_adjust(true);
+    } else if (evt->top.u8vkey == VK_VOLDN) {
+	rc_pdm_gain_adjust(false);
+    } else if (evt->top.u8vkey == VK_MIC) {
+#ifndef CFG_VOHID
+	rc_mmi_enter_test(MMI_TEST_ATVV);
+#endif
+    }
+    return;
+}
+
+static void rc_reset(atm_vk_hc_evt_t const *evt, void const *ctx)
+{
+    platform_reset(RESET_NO_ERROR);
+    return;
+}
+
+static void rc_keytest(atm_vk_hc_evt_t const *evt, void const *ctx)
+{
+    rc_mmi_enter_test(MMI_TEST_KEY);
+    return;
+}
+
+static void rc_disconnect(atm_vk_hc_evt_t const *evt, void const *ctx)
+{
+    rc_mmi_idle_timer(MMI_TOUT_FORCE);
+    led_off(LED_0);
+    return;
+}
+
+static void rc_enter_rftest(atm_vk_hc_evt_t const *evt, void const *ctx)
+{
+    rc_mmi_enter_test(MMI_TEST_RF);
+    return;
+}
+
+#ifdef CFG_VKEY_BUF
+#include "co_list.h"
+#include "ke_mem.h"
+
+/// Report buffer
+static struct co_list vk_buf;
+
+/// Vkey buffer element
+typedef struct {
+    /// list element header
+    struct co_list_hdr hdr;
+    /// report
+    atm_vk_idx_t vkey;
+    /// ctx
+    void const *ctx;
+} vk_elmt_t;
+
+static vk_elmt_t *rc_mmi_vkey_pop_from_buf(void)
+{
+    return (vk_elmt_t *)co_list_pop_front(&vk_buf);
+}
+
+void rc_mmi_vkey_free_buf(void)
+{
+    vk_elmt_t *val;
+
+    while((val = rc_mmi_vkey_pop_from_buf()) != NULL) {
+	ke_free(val);
+    }
+}
+
+static void rc_mmi_vkey_push_to_buf(atm_vk_idx_t vkey, void const *ctx)
+{
+    if (bt_keycode[vkey] == BT_MIC) {
+	return;
+    }
+#define VKEY_BUF_MAX 20
+    if (co_list_size(&vk_buf) > VKEY_BUF_MAX) {
+	rc_mmi_vkey_free_buf();
+	DEBUG_TRACE("Buf-Overflow");
+    } else {
+	vk_elmt_t *val = ke_malloc(sizeof(vk_elmt_t), KE_MEM_ENV);
+
+	val->vkey = vkey;
+	val->ctx = ctx;
+	co_list_push_back(&vk_buf, &val->hdr);
+    }
+}
+
+static vk_elmt_t *rc_mmi_vkey_peek_from_buf(void)
+{
+    return (vk_elmt_t *)(vk_buf.first);
+}
+
+void rc_mmi_vkey_flush_buf(void)
+{
+    DEBUG_TRACE("%s size: %d", __func__, co_list_size(&vk_buf));
+    for (vk_elmt_t *val = rc_mmi_vkey_peek_from_buf(); val;
+	val = rc_mmi_vkey_peek_from_buf()) {
+	send_rpt(val->vkey, val->ctx);
+	ke_free(rc_mmi_vkey_pop_from_buf());
+    }
+}
+#endif
+
+#ifdef LED_UART_MUX
+static uint32_t rc_mmi_vkey_init_ms;
+#endif
+
+static void rc_save_key(atm_vk_dnup_evt_t const *evt, void const *ctx)
+{
+#ifdef CFG_ATVRC_FIND_ME
+    buzzer_stop();
+#endif
+    DEBUG_TRACE("%s key: %d", __func__, evt->top.u8vkey);
+    rc_mmi_vkey_ctx_t const *context = ctx;
+#ifdef LED_UART_MUX
+    if ((evt->top.u8vkey == VK_RICE) && (atm_lpc_to_ms(atm_get_sys_time())
+	- rc_mmi_vkey_init_ms < 1000)) {
+	PINMUX_UART_SET(1, TX);
+    }
+#endif
+#if defined(CFG_ATVRC_CUSTOM) && defined(CFG_ATVRC_WAKEUP)
+    if ((context->cur_state == MMI_S_INITING) || (context->cur_state ==
+	MMI_S_RECONNING) ||  (context->cur_state == MMI_S_IDLE)) {
+	uint8_t id = atvrc_custom_check_wake_key(bt_keycode[evt->top.u8vkey]);
+	if (id) {
+	    rc_gap_set_wake(id);
+	}
+    }
+#endif
+#ifdef CFG_ATVRC_UNI_IR
+    if (rc_ir_check_uni_key(atv_keycode[evt->top.u8vkey])) {
+	led_blink(LED_0, ATVRC_LED_KEY_CS, 0, ATVRC_LED_KEY_BLINK);
+	led_blink(LED_1, ATVRC_LED_KEY_CS, 0, ATVRC_LED_KEY_BLINK);
+	return;
+    }
+#endif
+#ifdef CFG_ATVRC_CUSTOM
+    if ((context->cur_state == MMI_S_PAIRING) &&
+	(bt_keycode[evt->top.u8vkey] == BT_BACK)) {
+	DEBUG_TRACE("Stop pairing");
+	rc_gap_discoverable(false);
+    }
+    led_blink(LED_1, ATVRC_LED_KEY_CS, 0, ATVRC_LED_KEY_BLINK);
+#else
+    if (context->cur_state == MMI_S_IDLE) {
+	rc_gap_discoverable(true);
+    }
+#endif
+#ifdef CFG_RC_IR
+    rc_ir_send(ir_addr[evt->top.vkey], ir_cmd[evt->top.vkey],
+	RC_IR_DELAY_CS);
+#endif
+#ifdef CFG_ATVRC_CUSTOM
+    if (!atvrc_custom_is_cache_pwr() && (evt->top.u8vkey == VK_POWER)) {
+	return;
+    }
+#endif
+#ifdef CFG_VKEY_BUF
+    rc_mmi_vkey_push_to_buf(evt->top.vkey, ctx);
+#else
+    mmi_saved_key = bt_keycode[evt->top.vkey];
+#endif
+    return;
+}
+
+static void rc_rftest(atm_vk_dnup_evt_t const *evt, void const *ctx)
+{
+    switch (bt_keycode[evt->top.vkey]) {
+	case BT_UP: {
+	    rc_gap_rf_test_adjust(true, RC_RFTEST_CH);
+	} break;
+	case BT_DOWN: {
+	    rc_gap_rf_test_adjust(false, RC_RFTEST_CH);
+	} break;
+	case BT_VOLU: {
+	    rc_gap_rf_test_adjust(true, RC_RFTEST_PWR);
+	} break;
+	case BT_VOLD: {
+	    rc_gap_rf_test_adjust(false, RC_RFTEST_PWR);
+	} break;
+	default:
+	    break;
+    }
+    return;
+}
+
+static void rc_hold_key_status_ind(bool pressed, void const *ctx)
+{
+    if (pressed) {
+	atm_pm_lock(rc_vk_lock_hiber);
+	return;
+    }
+    atm_pm_unlock(rc_vk_lock_hiber);
+}
+
+#ifdef CFG_ATVRC_MMI
+static void rc_hold_key_status_ind_ex(bool pressed, void const *ctx)
+{
+    rc_hold_key_status_ind(pressed, ctx);
+    rc_comb_key_led_ctl(pressed);
+}
+#endif
+
+#define INVOKE(fm, ...) fm(__VA_ARGS__)
+#ifdef CFG_ATVRC_MMI
+#define VK_RICE VK_MUTE
+#define VK_MENU VK_GUIDE
+#define DEL_BOND_CB_KEY VK_CENTER, VK_MUTE
+#define PAIR_MODE_CB_KEY VK_HOME, VK_BACK
+#define SPEC_FUNC_CB_KEY VK_APP03, VK_APP04
+#else
+#define DEL_BOND_CB_KEY VK_OK, VK_MENU
+#define PAIR_MODE_CB_KEY VK_OK, VK_VOLDN
+#define SPEC_FUNC_CB_KEY VK_FW, VK_BW
+#endif
+
+// Key events in HID ready - VKEY_TABLE_HID_READY
+static atm_vk_reg_t const rc_key_event_hid_ready[] = {
+    VKEY_DOWN_FIRST(rc_send_rpt, atm_vk_any),
+    VKEY_DOWN_MORE(rc_send_comb_rpt, atm_vk_any),
+    VKEY_UP_INTER(rc_sent_up_, atm_vk_any),
+    VKEY_UP_LAST(rc_sent_up, atm_vk_any),
+    VKEY_UP_LAST(rc_mic_up, VK_MIC),
+    VKEY_HOLD_1KEY(rc_hold_test, NULL, 2000, VK_RICE),
+    VKEY_HOLD_1KEY_CLICK(rc_atvv_test, atm_vk_any, VK_RICE),
+#ifdef CFG_ATVRC_MMI
+    INVOKE(VKEY_HOLD_2KEY, rc_pair_mode, rc_hold_key_status_ind_ex, 4000,
+	PAIR_MODE_CB_KEY),
+    INVOKE(VKEY_HOLD_2KEY, rc_del_bond, rc_hold_key_status_ind_ex, 4000,
+	DEL_BOND_CB_KEY),
+    INVOKE(VKEY_HOLD_2KEY, rc_bug_report, rc_hold_key_status_ind_ex, 1000,
+	VK_CENTER, VK_BACK),
+    INVOKE(VKEY_HOLD_2KEY, rc_access_shortcut, rc_hold_key_status_ind, 1000,
+	VK_DOWN, VK_BACK),
+#else
+    INVOKE(VKEY_HOLD_2KEY, rc_del_bond, rc_hold_key_status_ind, 4000,
+	DEL_BOND_CB_KEY),
+    INVOKE(VKEY_HOLD_2KEY, rc_pair_mode, rc_hold_key_status_ind, 2000,
+	PAIR_MODE_CB_KEY),
+    INVOKE(VKEY_HOLD_2KEY, rc_pair_mode, rc_hold_key_status_ind, 4000, VK_HOME,
+	VK_BACK),
+#endif
+    INVOKE(VKEY_HOLD_2KEY_CLICK, rc_reset, VK_MENU, SPEC_FUNC_CB_KEY),
+    INVOKE(VKEY_HOLD_2KEY_CLICK, rc_disconnect, VK_VOLUP, SPEC_FUNC_CB_KEY),
+    INVOKE(VKEY_HOLD_2KEY_CLICK, rc_keytest, VK_OK, SPEC_FUNC_CB_KEY),
+    INVOKE(VKEY_HOLD_2KEY_CLICK, rc_enter_rftest, VK_VOLDN, SPEC_FUNC_CB_KEY),
+
+};
+
+// Key events in HID non-ready - VKEY_TABLE_HID_NOT_READY
+static atm_vk_reg_t const rc_key_event_hid_not_ready[] = {
+    VKEY_DOWN_FIRST(rc_save_key, atm_vk_any),
+#ifdef CFG_RC_IR
+    VKEY_UP_LAST(rc_save_key_up, atm_vk_any),
+#endif // CFG_RC_IR
+#ifdef CFG_ATVRC_MMI
+    INVOKE(VKEY_HOLD_2KEY, rc_bug_report, rc_hold_key_status_ind_ex, 1000,
+	VK_CENTER, VK_BACK),
+    INVOKE(VKEY_HOLD_2KEY, rc_pair_mode, rc_hold_key_status_ind_ex, 4000,
+	PAIR_MODE_CB_KEY),
+    INVOKE(VKEY_HOLD_2KEY, rc_del_bond, rc_hold_key_status_ind_ex, 4000,
+	DEL_BOND_CB_KEY),
+    INVOKE(VKEY_HOLD_2KEY, rc_access_shortcut, rc_hold_key_status_ind, 1000,
+	VK_DOWN, VK_BACK),
+#else
+    INVOKE(VKEY_HOLD_2KEY, rc_del_bond, rc_hold_key_status_ind, 4000,
+	DEL_BOND_CB_KEY),
+    INVOKE(VKEY_HOLD_2KEY, rc_pair_mode, rc_hold_key_status_ind, 2000,
+	PAIR_MODE_CB_KEY),
+    INVOKE(VKEY_HOLD_2KEY, rc_pair_mode, rc_hold_key_status_ind, 4000, VK_HOME,
+	VK_BACK),
+#endif
+    INVOKE(VKEY_HOLD_2KEY_CLICK, rc_reset, VK_MENU, SPEC_FUNC_CB_KEY),
+    INVOKE(VKEY_HOLD_2KEY_CLICK, rc_enter_rftest, VK_VOLDN, SPEC_FUNC_CB_KEY),
+#ifdef CFG_RC_TEST_MODE
+    INVOKE(VKEY_HOLD_2KEY, rc_ok_back, rc_ok_back_sts, 0, VK_OK, VK_BACK),
+    VKEY_UP_LAST(rc_ok_up, VK_OK),
+    VKEY_HOLD_1KEY_CLICK(rc_ok_click, atm_vk_any, VK_OK),
+#endif
+};
+
+// Key events in RF test - VKEY_TABLE_RF_TEST
+static atm_vk_reg_t const rc_key_event_rf_test[] = {
+    INVOKE(VKEY_HOLD_2KEY_CLICK, rc_reset, VK_MENU, SPEC_FUNC_CB_KEY),
+    VKEY_UP_LAST(rc_rftest, atm_vk_any),
+};
+
+static void keyboard_callback(ksm_event_t event, uint32_t idx, void const *ctx)
+{
+    rc_mmi_vkey_ctx_t const *context = ctx;
+    bool pressed = (event == KSM_PRESS);
+    if (context->cur_hdl_idx != VKEY_TABLE_MAX) {
+	atm_vkey_feed(context->handle[context->cur_hdl_idx], idx, pressed);
+    }
+}
+
+#ifdef CFG_ATVRC_MMI
+static void rc_mmi_vkey_delay_reset(sw_timer_id_t idx, void const *ctx)
+{
+    platform_reset(RESET_NO_ERROR);
+}
+#endif
+
+void rc_mmi_vkey_state_change_notify(uint8_t next_state)
+{
+    // enclose the context
+    static rc_mmi_vkey_ctx_t context = {.cur_hdl_idx = VKEY_TABLE_MAX};
+    context.cur_state = next_state;
+
+    switch (next_state) {
+	case MMI_S_INITING: {
+	    // key scan driver init
+#ifdef CFG_EN_GHOSTKEY
+	    keyboard_run_with_ghostkey_filter(keyboard_callback, &context);
+#else
+	    keyboard_run(keyboard_callback, &context);
+#endif
+	    // vkey modeling
+	    rc_vk_lock_hiber = atm_pm_alloc(PM_LOCK_HIBERNATE);
+	    context.handle[VKEY_TABLE_HID_NOT_READY] =
+		atm_vkey_add_table(rc_key_event_hid_not_ready,
+		ARRAY_LEN(rc_key_event_hid_not_ready), &context);
+	    context.handle[VKEY_TABLE_HID_READY] =
+		atm_vkey_add_table(rc_key_event_hid_ready,
+		ARRAY_LEN(rc_key_event_hid_ready), &context);
+	    context.handle[VKEY_TABLE_RF_TEST] =
+		atm_vkey_add_table(rc_key_event_rf_test,
+		ARRAY_LEN(rc_key_event_rf_test), &context);
+#ifdef LED_UART_MUX
+	    rc_mmi_vkey_init_ms = atm_lpc_to_ms(atm_get_sys_time());
+#endif
+#ifdef CFG_ATVRC_MMI
+	    tid_delay_reset = sw_timer_alloc(rc_mmi_vkey_delay_reset, NULL);
+#endif
+	}
+	case MMI_S_BOOTED:
+	case MMI_S_IDLE:
+	case MMI_S_PAIRING:
+	case MMI_S_RECONNING:
+#ifndef CFG_VOHID
+	case MMI_S_ATVV_ONLY:
+#endif
+	case MMI_S_CONNECTED: {
+	    context.cur_hdl_idx = VKEY_TABLE_HID_NOT_READY;
+	} break;
+#ifdef CFG_VOHID
+	case MMI_S_HID_READY:
+	case MMI_S_HID_STREAMING:
+#else
+	case MMI_S_HID_ONLY:
+	case MMI_S_HID_ATVV:
+	case MMI_S_ATVVING:
+#endif
+	{
+	    context.cur_hdl_idx = VKEY_TABLE_HID_READY;
+	} break;
+	case MMI_S_RF_TEST: {
+	    context.cur_hdl_idx = VKEY_TABLE_RF_TEST;
+	} break;
+	case MMI_S_DISCONNING:
+	default: {
+	    context.cur_hdl_idx = VKEY_TABLE_MAX;
+	} break;
+    }
+}
+
+#ifndef CFG_VKEY_BUF
+uint32_t rc_mmi_vkey_get_saved(void)
+{
+    uint32_t key = mmi_saved_key;
+    DEBUG_TRACE("save key = %" PRIu32, mmi_saved_key);
+
+    return key;
+}
+
+void rc_mmi_vkey_clear_saved(void)
+{
+    mmi_saved_key = 0;
+}
+#endif
+
+#ifdef CFG_ATVRC_CUSTOM
+void rc_mmi_vkey_update_ui(uint8_t ui)
+{
+#define UI_LAYOUT_B0_SETT_MASK 0x01
+#define UI_LAYOUT_B1_LIVE_MASK 0x02
+#define UI_LAYOUT_B3_PROF_MASK 0x08
+#define UI_LAYOUT_B4_ALAP_MASK 0x10
+#define UI_LAYOUT_B3_B4_MASK (UI_LAYOUT_B3_PROF_MASK | UI_LAYOUT_B4_ALAP_MASK)
+    if (ui & UI_LAYOUT_B0_SETT_MASK) {
+	bt_keycode[VK_DASHB] = BT_SETT;
+	ir_cmd[VK_DASHB] = IR_SETT;
+    }
+    if (ui & UI_LAYOUT_B1_LIVE_MASK) {
+	bt_keycode[VK_GUIDE] = BT_LIVE;
+	ir_cmd[VK_GUIDE] = IR_LIVE;
+    }
+    if ((ui & UI_LAYOUT_B3_B4_MASK) == UI_LAYOUT_B3_PROF_MASK) {
+	bt_keycode[VK_BKMK] = BT_PROF;
+	ir_cmd[VK_BKMK] = IR_PROF;
+    }
+    if ((ui & UI_LAYOUT_B3_B4_MASK) == UI_LAYOUT_B4_ALAP_MASK) {
+	bt_keycode[VK_BKMK] = BT_ALAP;
+	ir_cmd[VK_BKMK] = IR_ALAP;
+    }
+}
+#endif
\ No newline at end of file
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/rc_mmi_vkey.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/rc_mmi_vkey.h
new file mode 100644
index 0000000..319c7c3
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/rc_mmi_vkey.h
@@ -0,0 +1,50 @@
+/*
+ *******************************************************************************
+ *
+ * @file rc_mmi_vkey.h
+ *
+ * @brief VKEY application part.
+ *
+ * Copyright (C) Atmosic 2020-2021
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @brief Notify MMI state has been changed.
+ *******************************************************************************
+ */
+void rc_mmi_vkey_state_change_notify(uint8_t next_state);
+
+/**
+ * @brief Get saved key.
+ *
+ * @return Key saved. O is invalid.
+ */
+uint32_t rc_mmi_vkey_get_saved(void);
+
+/**
+ * @brief Clear saved key.
+ */
+void rc_mmi_vkey_clear_saved(void);
+
+#ifdef CFG_ATVRC_CUSTOM
+/**
+ * @brief Update UI layout configurable keys
+ */
+void rc_mmi_vkey_update_ui(uint8_t ui);
+#endif
+
+#ifdef CFG_VKEY_BUF
+/**
+ * @brief Flush buffered vkey events
+ */
+void rc_mmi_vkey_flush_buf(void);
+
+/**
+ * @brief Free buffered vkeys
+ */
+void rc_mmi_vkey_free_buf(void);
+#endif
\ No newline at end of file
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/rc_mmi_vkey_m2231.h b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/rc_mmi_vkey_m2231.h
new file mode 100644
index 0000000..13a680f
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/src/rc_mmi_vkey_m2231.h
@@ -0,0 +1,59 @@
+/**
+ *******************************************************************************
+ *
+ * @file rc_mmi_vkey_m2231.h
+ *
+ * @brief Key definitions for ATV Ref. Remote G10
+ *
+ * @note This file should only be included by rc_mmi_vkey.c
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+// Virtual key definitions
+enum {
+    VK_INPUT, VK_POWER, VK_DOWN, VK_VOLUP, VK_BACK,
+    VK_UP, VK_BKMK, NONE1, VK_HOME, VK_LEFT,
+    VK_DASHB, VK_ASST, VK_APP03, VK_YOUTUBE, VK_VOLDN,
+    NONE2, VK_NETFLIX, VK_APP04, VK_MUTE, VK_CENTER,
+    NONE3, VK_CNLD, VK_GUIDE, VK_CNLU, VK_RIGHT,
+};
+
+static uint32_t __ATM_VKEY_MAP_CONST bt_keycode[] = {
+    BT_INPUT, BT_POWER, BT_DOWN, BT_VOLU, BT_BACK,
+    BT_UP, BT_BKMK, 0, BT_HOME, BT_LEFT,
+    BT_DASHB, BT_ASST, BT_APP03, BT_YOUTUBE, BT_VOLD,
+    0, BT_NETFLIX, BT_APP04, BT_MUTE, BT_CENTER,
+    0, BT_CNLD, BT_GUIDE, BT_CNLU, BT_RIGHT,
+};
+
+#ifdef CFG_ATVRC_UNI_IR
+static uint32_t const atv_keycode[] = {
+    ATV_INPUT, ATV_POWER, 0, ATV_VOLU, 0,
+    0, 0, 0, 0, 0,
+    0, 0, 0, 0, ATV_VOLD,
+    0, 0, 0, ATV_MUTE, 0,
+    0, 0, 0, 0, 0,
+};
+#endif
+
+#ifdef CFG_RC_IR
+static uint32_t __ATM_VKEY_MAP_CONST ir_addr[] = {
+    IR_ADDR, IR_ADDR, IR_ADDR, IR_ADDR, IR_ADDR,
+    IR_ADDR, IR_ADDR, 0, IR_ADDR, IR_ADDR,
+    IR_ADDR, IR_ADDR, IR_ADDR, IR_ADDR, IR_ADDR,
+    0, IR_ADDR, IR_ADDR, IR_ADDR, IR_ADDR,
+    0, IR_ADDR, IR_ADDR, IR_ADDR, IR_ADDR,
+};
+
+static uint32_t __ATM_VKEY_MAP_CONST ir_cmd[] = {
+    IR_INPUT, IR_POWER, IR_DOWN, IR_VOLU, IR_BACK,
+    IR_UP, IR_BKMK, 0, IR_HOME, IR_LEFT,
+    IR_DASHB, IR_ASST, IR_APP03, IR_YOUTUBE, IR_VOLD,
+    0, IR_NETFLIX, IR_APP04, IR_MUTE, IR_CENTER,
+    0, IR_CNLD, IR_GUIDE, IR_CNLU, IR_RIGHT,
+};
+#endif
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/01-BD_ADDRESS/user.tds b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/01-BD_ADDRESS/user.tds
new file mode 100644
index 0000000..0661136
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/01-BD_ADDRESS/user.tds
@@ -0,0 +1 @@
+335566778899
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/02-DEVICE_NAME/remote.tds b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/02-DEVICE_NAME/remote.tds
new file mode 100644
index 0000000..799a3d8
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/02-DEVICE_NAME/remote.tds
@@ -0,0 +1,2 @@
+# Atmosic RCU
+41 74 6d 6f 73 69 63 20 52 43 55
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/0d-EXT_WAKEUP_TIME/no_32KHz_xtal.tds b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/0d-EXT_WAKEUP_TIME/no_32KHz_xtal.tds
new file mode 100644
index 0000000..7a513ec
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/0d-EXT_WAKEUP_TIME/no_32KHz_xtal.tds
@@ -0,0 +1 @@
+28 23
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/0e-OSC_WAKEUP_TIME/no_32KHz_xtal.tds b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/0e-OSC_WAKEUP_TIME/no_32KHz_xtal.tds
new file mode 100644
index 0000000..7a513ec
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/0e-OSC_WAKEUP_TIME/no_32KHz_xtal.tds
@@ -0,0 +1 @@
+28 23
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/11-SLEEP_ENABLE/hib.tds b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/11-SLEEP_ENABLE/hib.tds
new file mode 100644
index 0000000..4ab3050
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/11-SLEEP_ENABLE/hib.tds
@@ -0,0 +1,8 @@
+# 0x00: Sleep disabled
+# 0x01: Deep sleep enabled
+# 0x02: Retain all but DO NOT drop to retention voltage
+# 0x03: Retain all and drop to retention voltage
+# 0x04: Hibernate
+# 0x05: SOC off
+# 0x80: Test mask (roll through modes)
+04
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/12-EXT_WAKEUP_ENABLE/enable2.tds b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/12-EXT_WAKEUP_ENABLE/enable2.tds
new file mode 100644
index 0000000..eb73788
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/12-EXT_WAKEUP_ENABLE/enable2.tds
@@ -0,0 +1,4 @@
+# 0x00: Timer and software wakeup only
+# 0x01: External (from PSEQ) wakeup enabled with limited timeout
+# 0x02: External wakeup enabled with no maximum sleep duration
+02
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/2b-SLEEP_ADJ/no_32KHz_xtal.tds b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/2b-SLEEP_ADJ/no_32KHz_xtal.tds
new file mode 100644
index 0000000..b3fca3c
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/2b-SLEEP_ADJ/no_32KHz_xtal.tds
@@ -0,0 +1 @@
+02 00 00 00
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/C1-ATVRC_CUSTOM_DATA/g10.tds b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/C1-ATVRC_CUSTOM_DATA/g10.tds
new file mode 100644
index 0000000..d6ef7d9
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/C1-ATVRC_CUSTOM_DATA/g10.tds
@@ -0,0 +1,53 @@
+# ATVRC G10 Customization Data
+# Device Type
+01 # 01 = Hobb(short), 02 = Shaw(Long)
+# PNP ID
+01 # Vendor Source
+24 0A # VID
+01 00 # PID
+00 01 # Product version
+
+# Device name
+0D # length
+52 65 6d 6f 74 65 47 31 30 20 41 54 4d 00 00 00 # 'RemoteG10 ATM'
+
+# Device UI layout
+05
+# Wakeup key 1
+0F 00 # Enable wakeup key 1: Assistant, Home, Power, Input
+# Wakeup key 2
+F0 00 # Enable wakeup key 2: Youtube, Netflix, APP03, APP04
+
+# The following configurations are not yet available
+
+# Customized Wakeup Packet
+15 0D 0E 0F 02 01 04 03 03 12 18 0D FF 5D 00 03
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+
+# Periodically wakeup (FIND_ME_ENABLE)
+0F 00 # interval
+01 # FF: Disable 01: Enable
+
+# RCU RPA switch
+FF # FF: Disable 00: Enable
+
+# Disable BLE
+FF # FF: Enable BLE 00: Disable BLE
+
+# Wakeup packet sending mode
+FF # FF: customized packet 3 sec -> Google packet 3sec 00: customized packet 6 sec
+
+# Cache POWER switch
+FF # FF: Enable cache 00: Disable cache
+
+# Authentication key
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+
+# Encryption password
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+
+# ECDSA Public Key
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
\ No newline at end of file
diff --git a/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/C2-ATVRC_NEC_IR_OVERRIDE/default.tds b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/C2-ATVRC_NEC_IR_OVERRIDE/default.tds
new file mode 100644
index 0000000..66bc7e1
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/examples/HID_remote/tag_data/C2-ATVRC_NEC_IR_OVERRIDE/default.tds
@@ -0,0 +1,49 @@
+# NEC IR CODE override table
+FF FF FF FF # 0 POWER
+FF FF FF FF # 1 RIGHT
+FF FF FF FF # 2 VOLUME DOWN
+FF FF FF FF # 3 INFO*
+FF FF FF FF # 4 No.4*
+FF FF FF FF # 5 GREEN*
+FF FF FF FF # 6 INPUT
+FF FF FF FF # 7 DOWN
+FF FF FF FF # 8 CHANNEL DOWN
+FF FF FF FF # 9 No.0*
+FF FF FF FF # 10 No.3*
+FF FF FF FF # 11 RED*
+FF FF FF FF # 12 BOOKMARK
+FF FF FF FF # 13 BACK
+FF FF FF FF # 14 YOUTUBE
+FF FF FF FF # 15 SUBTITLE*
+FF FF FF FF # 16 No.2*
+FF FF FF FF # 17 No.6*
+FF FF FF FF # 18 ASSIST
+FF FF FF FF # 19 HOME
+FF FF FF FF # 20 NETFLIX
+FF FF FF FF # 21 No.9*
+FF FF FF FF # 22 No.1*
+FF FF FF FF # 23 No.5*
+FF FF FF FF # 24 DASHBOARD
+FF FF FF FF # 25 GUIDE
+FF FF FF FF # 26 APP03
+FF FF FF FF # 27 No.8*
+FF FF FF FF # 28 BLUE*
+FF FF FF FF # 29 NONE
+FF FF FF FF # 30 UP
+FF FF FF FF # 31 VOLUME UP
+FF FF FF FF # 32 APP04
+FF FF FF FF # 33 No.7*
+FF FF FF FF # 34 YELLOW*
+FF FF FF FF # 35 NONE
+FF FF FF FF # 36 LEFT
+FF FF FF FF # 37 CHANNEL UP
+FF FF FF FF # 38 NONE
+FF FF FF FF # 39 NONE
+FF FF FF FF # 40 NONE
+FF FF FF FF # 41 NONE
+FF FF FF FF # 42 CENTER
+FF FF FF FF # 43 MUTE
+FF FF FF FF # 44 NONE
+FF FF FF FF # 45 NONE
+FF FF FF FF # 46 NONE
+FF FF FF FF # 48 NONE
\ No newline at end of file
diff --git a/platform/atm2/ATM22xx-x1x/include/arch.h b/platform/atm2/ATM22xx-x1x/include/arch.h
new file mode 100644
index 0000000..5f290ac
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/arch.h
@@ -0,0 +1,463 @@
+/**
+ *******************************************************************************
+ *
+ * @file arch.h
+ *
+ * @brief This file contains the definitions of the macros and functions that are
+ * architecture dependent.  The implementation of those is implemented in the
+ * appropriate architecture directory.
+ *
+ * Copyright (C) RivieraWaves 2009-2015
+ * Copyright (C) Atmosic 2017-2023
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/**
+ ****************************************************************************************
+ * @defgroup ATM2x ATM2x
+ * @brief ATM2x Platform
+ *
+ * This module contains platform components.
+ *
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+/**
+ ****************************************************************************************
+ * @defgroup DRIVERS Drivers
+ * @ingroup ATM2x
+ * @brief ATM2x Platform Drivers
+ *
+ * This module contains the necessary drivers to run the platform with the
+ * RW BT SW protocol stack.
+ *
+ * This has the declaration of the platform architecture API.
+ *
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include <stdbool.h>
+#include <stdint.h>        // standard integer definition
+#if defined(CFG_DBG)
+#include <stdio.h>
+#endif
+#include <string.h>
+#include "compiler.h"      // inline functions
+
+#include "rep_vec.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * CPU WORD SIZE
+ ****************************************************************************************
+ */
+/// ARM is a 32-bit CPU
+#define CPU_WORD_SIZE   4
+
+/*
+ * CPU Endianness
+ ****************************************************************************************
+ */
+/// ARM is little endian
+#define CPU_LE          1
+
+// 16MHz system clock
+#define SYS_CLK         16000000
+#define SYS_CLK_IN_KHZ (SYS_CLK/1000)
+
+/*
+ * Constructor ordering
+ */
+#define CONSTRUCTOR_WATCHDOG	101	// Very first constructor
+#define CONSTRUCTOR_USER_DEBUG	102	// Provide DEBUG_TRACE
+#define CONSTRUCTOR_NVM		103	// Provide nvm_EFUSE_AUTOREAD
+#define CONSTRUCTOR_LED		104	// Before drivers configure pinmux
+#define CONSTRUCTOR_DTOP_BYPASS	105	// After NVM; can change sysclk
+#define CONSTRUCTOR_MAIN	198	// Main constructor
+#define CONSTRUCTOR_USER_INIT	199	// Last numbered constructor
+// Followed by unnumbered constructors
+
+/*
+ * DEBUG configuration
+ ****************************************************************************************
+ */
+#if defined(CFG_DBG)
+#define PLF_DEBUG          1
+#else //CFG_DBG
+#define PLF_DEBUG          0
+#endif //CFG_DBG
+
+/*
+ * LCD
+ ****************************************************************************************
+ */
+
+/// LCD screen
+#if defined(CFG_DISPLAY)
+#define PLF_LCD            1
+#else // CFG_DISPLAY
+#define PLF_LCD            0
+#endif // CFG_DISPLAY
+
+/*
+ * Display
+ ****************************************************************************************
+ */
+
+/// Display controller enable/disable
+#if defined(CFG_DISPLAY)
+#define PLF_DISPLAY          1
+#else // CFG_DISPLAY
+#define PLF_DISPLAY          0
+#endif // CFG_DISPLAY
+
+/*
+ * NVDS
+ ****************************************************************************************
+ */
+
+/// NVDS
+#ifdef CFG_NVDS
+#define PLF_NVDS             1
+#else // CFG_NVDS
+#define PLF_NVDS             0
+#endif // CFG_NVDS
+
+/*
+ * UART
+ ****************************************************************************************
+ */
+
+/// UART
+#if defined(CFG_APP) || defined(CFG_FRAMEWORK)
+#define PLF_UART             0
+#else
+#define PLF_UART             1
+#endif
+
+/*
+ * PS2
+ ****************************************************************************************
+ */
+
+/// PS2
+#if defined(CFG_PS2) && defined(CFG_APP_HID)
+#define PLF_PS2             1
+#else // CFG_PS2
+#define PLF_PS2             0
+#endif // CFG_PS2
+
+/*
+ * KEYBOARD
+ ****************************************************************************************
+ */
+
+/// KEYBOARD
+#if defined(CFG_KBD)
+#if defined(CFG_REMOTE)
+#define PLF_REMOTE	    1
+
+#if defined(CFG_PDM)
+#define PLF_PDM             1
+
+#else // CFG_PDM
+
+#define PLF_PDM             0
+
+#endif // CFG_PDM
+
+#else // CFG_REMOTE
+
+#define PLF_REMOTE	    0
+#define PLF_PDM		    0
+
+#endif // CFG_REMOTE
+
+#if defined(CFG_HID_PASSKEY)
+#define BLE_HID_PASSKEY        1
+#else
+#define BLE_HID_PASSKEY        0
+#endif // CFG_HID_PASSKEY
+#else // CFG_KBD
+#define PLF_REMOTE           0
+#define PLF_PDM              0
+#define BLE_HID_PASSKEY      0
+#endif // CFG_KBD
+
+/*
+ * Joystick
+ ****************************************************************************************
+ */
+
+/// Display controller enable/disable
+#if defined(CFG_DISPLAY)
+#define PLF_JOYSTICK         1
+#else // CFG_DISPLAY
+#define PLF_JOYSTICK         0
+#endif // CFG_DISPLAY
+
+/*
+ * Sensors
+ ****************************************************************************************
+ */
+
+/// ICM Sensor
+#ifdef CFG_ICM_SENSOR
+#define PLF_ICM_SENSOR       1
+#else
+#define PLF_ICM_SENSOR       0
+#endif
+
+/// TMP1075 Temperature Sensor
+#ifdef CFG_TMP1075_SENSOR
+#define PLF_TMP1075_SENSOR   1
+#else
+#define PLF_TMP1075_SENSOR   0
+#endif
+
+/*
+ * UART test application library
+ ****************************************************************************************
+ */
+#ifdef CFG_UART_TEST
+#define PLF_UART_TEST       1
+#else
+#define PLF_UART_TEST       0
+#endif
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+/// Possible errors detected by FW
+#define    RESET_NO_ERROR         0x00000000
+#define    RESET_MEM_ALLOC_FAIL   0xF2F2F2F2
+#define    RESET_WATCHDOG         0xDEDEDEDE
+
+/// Reset platform and stay in ROM
+#define    RESET_TO_ROM           0xA5A5A5A5
+/// Reset platform and reload FW
+#define    RESET_AND_LOAD_FW      0xC3C3C3C3
+
+/// Exchange memory size limit
+#define    EM_SIZE_LIMIT          0x8000
+
+/// Power saving modes
+#define SLEEP_ENABLE_NONE		0
+#define SLEEP_ENABLE_DEEP		1
+#define SLEEP_ENABLE_RETAIN		2
+#define SLEEP_ENABLE_RETAIN_DROP	3
+#define SLEEP_ENABLE_HIBERNATE		4
+#define SLEEP_ENABLE_SOC_OFF		5
+#define SLEEP_ENABLE_TEST_MASK		0x80
+
+
+/*
+ * EXPORTED FUNCTION DECLARATION
+ ****************************************************************************************
+ */
+
+/**
+ * @brief Boot type/temperature
+ * @return true when digital domain was reset before boot
+ */
+bool boot_was_cold(void);
+
+/**
+ * @brief Package info
+ * @return true when bonded to 5x5 package
+ */
+bool sydney_package_is_5x5(void);
+
+/**
+ * @brief Package info
+ * @return true when stacked flash is present inside package
+ */
+bool sydney_package_has_stacked_flash(void);
+
+/**
+ ****************************************************************************************
+ * @brief Compute size of SW stack used.
+ *
+ * This function is compute the maximum size stack used by SW.
+ *
+ * @return Size of stack used (in bytes)
+ ****************************************************************************************
+ */
+uint16_t get_stack_usage(void);
+
+/**
+ ****************************************************************************************
+ * @brief Re-boot FW.
+ *
+ * This function is used to re-boot the FW when error has been detected, it is the end of
+ * the current FW execution.
+ * After waiting transfers on UART to be finished, and storing the information that
+ * FW has re-booted by itself in a non-loaded area, the FW restart by branching at FW
+ * entry point.
+ *
+ * Note: when calling this function, the code after it will not be executed.
+ *
+ * @param[in] error      Error detected by FW
+ ****************************************************************************************
+ */
+__NORETURN void platform_reset(uint32_t error);
+
+#if !defined(CFG_ROM)
+/**
+ * @brief User application main function
+ * @return nothing - ignored
+ */
+int user_main(void);
+#endif
+
+#if PLF_DEBUG
+/**
+ ****************************************************************************************
+ * @brief Print the assertion error reason and loop forever.
+ *
+ * @param condition C string containing the condition.
+ * @param file C string containing file where the assertion is located.
+ * @param line Line number in the file where the assertion is located.
+ ****************************************************************************************
+ */
+void assert_err(const char *condition, const char * file, int line);
+
+/**
+ ****************************************************************************************
+ * @brief Print the assertion error reason and loop forever.
+ * The parameter value that is causing the assertion will also be disclosed.
+ *
+ * @param param0 parameter value 0.
+ * @param param1 parameter value 1.
+ * @param file C string containing file where the assertion is located.
+ * @param line Line number in the file where the assertion is located.
+ ****************************************************************************************
+ */
+void assert_param(int param0, int param1, const char * file, int line);
+
+/**
+ ****************************************************************************************
+ * @brief Print the assertion warning reason.
+ *
+ * @param param0 parameter value 0.
+ * @param param1 parameter value 1.
+ * @param file C string containing file where the assertion is located.
+ * @param line Line number in the file where the assertion is located.
+ ****************************************************************************************
+ */
+void assert_warn(int param0, int param1, const char * file, int line);
+#endif //PLF_DEBUG
+
+/**
+ * @brief Debug trace log with timestamp
+ * @param[in] format Printf-style formatter
+ * @param     ...    Arguments for formatter
+ * @return Number of characters logged
+ */
+__PRINTF(1, 2) int debug_trace(const char *format, ...);
+
+#ifdef RTT_DBG
+__PRINTF(1, 2) int debug_trace_rtt(const char *format, ...);
+#define DEBUG_TRACE_SEL debug_trace_rtt
+#else
+#define DEBUG_TRACE_SEL debug_trace
+#endif
+
+/*
+ * ASSERTION CHECK
+ ****************************************************************************************
+ */
+#if PLF_DEBUG
+/// Assertions showing a critical error that could require a full system reset
+#define ASSERT_ERR(cond)                              \
+    do {                                              \
+        if (!(cond)) {                                \
+            assert_err(#cond, __MODULE__, __LINE__);  \
+        }                                             \
+    } while(0)
+
+/// Assertions showing a critical error that could require a full system reset
+#define ASSERT_INFO(cond, param0, param1)             \
+    do {                                              \
+        if (!(cond)) {                                \
+            assert_param((int)param0, (int)param1, __MODULE__, __LINE__);  \
+        }                                             \
+    } while(0)
+
+/// Assertions showing a non-critical problem that has to be fixed by the SW
+#define ASSERT_WARN(cond, param0, param1)             \
+    do {                                              \
+        if (!(cond)) {                                \
+            assert_warn((int)param0, (int)param1, __MODULE__, __LINE__); \
+        }                                             \
+    } while(0)
+
+/// Debug trace log with timestamp
+#define DEBUG_TRACE(fmt, ...) do { \
+    DEBUG_TRACE_SEL(fmt, ##__VA_ARGS__); \
+} while(0)
+#define DEBUG_TRACE_COND(cond, fmt, ...) do { \
+    if (cond) { \
+	DEBUG_TRACE_SEL(fmt, ##__VA_ARGS__); \
+    } \
+} while(0)
+
+#else
+/// Assertions showing a critical error that could require a full system reset
+#define ASSERT_ERR(cond)                              \
+    do {                                              \
+        if (!(cond)) {                                \
+            __BKPT(0);                                \
+        }                                             \
+    } while(0)
+
+/// Assertions showing a critical error that could require a full system reset
+#define ASSERT_INFO(cond, param0, param1)             \
+    do {                                              \
+        if (!(cond)) {                                \
+            __BKPT(1);                                \
+        }                                             \
+    } while(0)
+
+/// Assertions showing a non-critical problem that has to be fixed by the SW
+#define ASSERT_WARN(cond, param0, param1)
+
+/// Debug trace log with timestamp
+#define DEBUG_TRACE(fmt, ...) do { \
+    if (0) { \
+	debug_trace(fmt, ##__VA_ARGS__); \
+    } \
+} while(0)
+#define DEBUG_TRACE_COND(cond, fmt, ...) do { \
+    if (0) { \
+	debug_trace(fmt, ##__VA_ARGS__); \
+    } \
+} while(0)
+
+#endif //PLF_DEBUG
+
+#ifdef __cplusplus
+}
+#endif
+
+// required to define GLOBAL_INT_** macros as inline assembly. This file is included after
+// definition of ASSERT macros as they are used inside ll.h
+#include "ll.h"     // ll definitions
+/// @} DRIVERS
+/// @} ATM2x
diff --git a/platform/atm2/ATM22xx-x1x/include/arm/core_cm0.h b/platform/atm2/ATM22xx-x1x/include/arm/core_cm0.h
new file mode 100644
index 0000000..e54b4b2
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/arm/core_cm0.h
@@ -0,0 +1,703 @@
+/**************************************************************************//**
+ * @file     core_cm0.h
+ * @brief    CMSIS Cortex-M0 Core Peripheral Access Layer Header File
+ * @version  V3.20
+ * @date     25. February 2013
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2013 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+/**
+ *******************************************************************************
+ *
+ * Copyright (C) Atmosic 2021
+ *
+ *******************************************************************************
+ */
+
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include  /* treat file as system include file for MISRA check */
+#endif
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#ifndef __CORE_CM0_H_GENERIC
+#define __CORE_CM0_H_GENERIC
+
+/** \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/** \ingroup Cortex_M0
+  @{
+ */
+
+/*  CMSIS CM0 definitions */
+#define __CM0_CMSIS_VERSION_MAIN  (0x03)                                   /*!< [31:16] CMSIS HAL main version   */
+#define __CM0_CMSIS_VERSION_SUB   (0x20)                                   /*!< [15:0]  CMSIS HAL sub version    */
+#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN << 16) | \
+                                    __CM0_CMSIS_VERSION_SUB          )     /*!< CMSIS HAL version number         */
+
+#define __CORTEX_M                (0x00)                                   /*!< Cortex-M Core                    */
+
+
+#if   defined ( __CC_ARM )
+  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
+  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
+  #define __STATIC_INLINE  static __inline
+
+#elif defined ( __ICCARM__ )
+  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
+  #define __STATIC_INLINE  static inline
+  #define __STATIC_FORCEINLINE _Pragma("inline=forced") static inline
+
+#elif defined ( __GNUC__ )
+  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
+  #define __STATIC_INLINE  static inline
+  #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
+
+#elif defined ( __TASKING__ )
+  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
+  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
+  #define __STATIC_INLINE  static inline
+
+#endif
+
+/** __FPU_USED indicates whether an FPU is used or not. This core does not support an FPU at all
+*/
+#define __FPU_USED       0
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+#endif
+
+#include <stdint.h>                      /* standard types definitions                      */
+#include <core_cmInstr.h>                /* Core Instruction Access                         */
+#include <core_cmFunc.h>                 /* Core Function Access                            */
+
+#endif /* __CORE_CM0_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM0_H_DEPENDANT
+#define __CORE_CM0_H_DEPENDANT
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM0_REV
+    #define __CM0_REV               0x0000
+    #warning "__CM0_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          2
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions                 */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions                */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions              */
+
+/*@} end of group Cortex_M0 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+ ******************************************************************************/
+/** \defgroup CMSIS_core_register Defines and Type Definitions
+    \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_CORE  Status and Control Registers
+    \brief  Core Register type definitions.
+  @{
+ */
+
+/** \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+#if (__CORTEX_M != 0x04)
+    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved                           */
+#else
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved                           */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved                           */
+#endif
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} APSR_Type;
+
+
+/** \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved                           */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} IPSR_Type;
+
+
+/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
+#if (__CORTEX_M != 0x04)
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved                           */
+#else
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved                           */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved                           */
+#endif
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0)          */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0)          */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} xPSR_Type;
+
+
+/** \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used                   */
+    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag           */
+    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved                           */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} CONTROL_Type;
+
+/*@} end of group CMSIS_CORE */
+
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+    \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/** \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IO uint32_t ISER[1];                 /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register           */
+       uint32_t RESERVED0[31];
+  __IO uint32_t ICER[1];                 /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register          */
+       uint32_t RSERVED1[31];
+  __IO uint32_t ISPR[1];                 /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register           */
+       uint32_t RESERVED2[31];
+  __IO uint32_t ICPR[1];                 /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register         */
+       uint32_t RESERVED3[31];
+       uint32_t RESERVED4[64];
+  __IO uint32_t IP[8];                   /*!< Offset: 0x300 (R/W)  Interrupt Priority Register              */
+}  NVIC_Type;
+
+/*@} end of group CMSIS_NVIC */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SCB     System Control Block (SCB)
+    \brief      Type definitions for the System Control Block Registers
+  @{
+ */
+
+/** \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __I  uint32_t CPUID;                   /*!< Offset: 0x000 (R/ )  CPUID Base Register                                   */
+  __IO uint32_t ICSR;                    /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register                  */
+       uint32_t RESERVED0;
+  __IO uint32_t AIRCR;                   /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register      */
+  __IO uint32_t SCR;                     /*!< Offset: 0x010 (R/W)  System Control Register                               */
+  __IO uint32_t CCR;                     /*!< Offset: 0x014 (R/W)  Configuration Control Register                        */
+       uint32_t RESERVED1;
+  __IO uint32_t SHP[2];                  /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED   */
+  __IO uint32_t SHCSR;                   /*!< Offset: 0x024 (R/W)  System Handler Control and State Register             */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24                                             /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20                                             /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16                                             /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4                                             /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0                                             /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL << SCB_CPUID_REVISION_Pos)              /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31                                             /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28                                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27                                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26                                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25                                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23                                             /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22                                             /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12                                             /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0                                             /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)           /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16                                             /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16                                             /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15                                             /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2                                             /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1                                             /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4                                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2                                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1                                             /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos                9                                             /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3                                             /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15                                             /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+    \brief      Type definitions for the System Timer Registers.
+  @{
+ */
+
+/** \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
+  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
+  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL << SysTick_CTRL_ENABLE_Pos)               /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)        /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+    \brief      Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR)
+                are only accessible over DAP and not via processor. Therefore
+                they are not covered by the Cortex-M0 header file.
+  @{
+ */
+/*@} end of group CMSIS_CoreDebug */
+
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_core_base     Core Definitions
+    \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Cortex-M0 Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address              */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address                 */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
+
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct           */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct       */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct          */
+
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+    \brief      Functions that manage interrupts and exceptions via the NVIC.
+    @{
+ */
+
+/* Interrupt Priorities are WORD accessible only under ARMv6M                   */
+/* The following MACROS handle generation of the register offset and byte masks */
+#define _BIT_SHIFT(IRQn)         (  (((uint32_t)(IRQn)       )    &  0x03) * 8 )
+#define _SHP_IDX(IRQn)           ( ((((uint32_t)(IRQn) & 0x0F)-8) >>    2)     )
+#define _IP_IDX(IRQn)            (   ((uint32_t)(IRQn)            >>    2)     )
+
+
+/** \brief  Enable External Interrupt
+
+    The function enables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+}
+
+
+/** \brief  Disable External Interrupt
+
+    The function disables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+}
+
+/** \brief Get external interrupt state
+
+    The function get a device-specific interrupt status in the NVIC interrupt controller.
+
+    \param[in] IRQn Interrupt number
+    \return 0: interrupt disable; 1: interrupt enable
+ */
+__STATIC_INLINE uint32_t NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  return ((uint32_t)((NVIC->ISER[0] & (1 << ((uint32_t)(IRQn) & 0x1F))) ? 1 : 0));
+}
+
+/** \brief  Get Pending Interrupt
+
+    The function reads the pending register in the NVIC and returns the pending bit
+    for the specified interrupt.
+
+    \param [in]      IRQn  Interrupt number.
+
+    \return             0  Interrupt status is not pending.
+    \return             1  Interrupt status is pending.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
+}
+
+
+/** \brief  Set Pending Interrupt
+
+    The function sets the pending bit of an external interrupt.
+
+    \param [in]      IRQn  Interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+}
+
+
+/** \brief  Clear Pending Interrupt
+
+    The function clears the pending bit of an external interrupt.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
+}
+
+
+/** \brief  Set Interrupt Priority
+
+    The function sets the priority of an interrupt.
+
+    \note The priority cannot be set for every core interrupt.
+
+    \param [in]      IRQn  Interrupt number.
+    \param [in]  priority  Priority to set.
+ */
+__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if(IRQn < 0) {
+    SCB->SHP[_SHP_IDX(IRQn)] = (SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
+        (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
+  else {
+    NVIC->IP[_IP_IDX(IRQn)] = (NVIC->IP[_IP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
+        (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
+}
+
+
+/** \brief  Get Interrupt Priority
+
+    The function reads the priority of an interrupt. The interrupt
+    number can be positive to specify an external (device specific)
+    interrupt, or negative to specify an internal (core) interrupt.
+
+
+    \param [in]   IRQn  Interrupt number.
+    \return             Interrupt Priority. Value is aligned automatically to the implemented
+                        priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if(IRQn < 0) {
+    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for Cortex-M0 system interrupts */
+  else {
+    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for device specific interrupts  */
+}
+
+
+/** \brief  System Reset
+
+    The function initiates a system reset request to reset the MCU.
+ */
+__STATIC_INLINE void NVIC_SystemReset(void)
+{
+  __DSB();                                                     /* Ensure all outstanding memory accesses included
+                                                                  buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FA << SCB_AIRCR_VECTKEY_Pos)      |
+                 SCB_AIRCR_SYSRESETREQ_Msk);
+  __DSB();                                                     /* Ensure completion of memory access */
+  while(1);                                                    /* wait until reset */
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+    \brief      Functions that configure the System.
+  @{
+ */
+
+#if (__Vendor_SysTickConfig == 0)
+
+/** \brief  System Tick Configuration
+
+    The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
+    Counter is in free running mode to generate periodic interrupts.
+
+    \param [in]  ticks  Number of ticks between two interrupts.
+
+    \return          0  Function succeeded.
+    \return          1  Function failed.
+
+    \note     When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+    function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+    must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1) > SysTick_LOAD_RELOAD_Msk)  return (1);      /* Reload value impossible */
+
+  SysTick->LOAD  = ticks - 1;                                  /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0;                                          /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                    /* Enable SysTick IRQ and SysTick Timer */
+  return (0);                                                  /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+
+#endif /* __CORE_CM0_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/platform/atm2/ATM22xx-x1x/include/arm/core_cmFunc.h b/platform/atm2/ATM22xx-x1x/include/arm/core_cmFunc.h
new file mode 100644
index 0000000..f0966c8
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/arm/core_cmFunc.h
@@ -0,0 +1,636 @@
+/**************************************************************************//**
+ * @file     core_cmFunc.h
+ * @brief    CMSIS Cortex-M Core Function Access Header File
+ * @version  V3.20
+ * @date     25. February 2013
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2013 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#ifndef __CORE_CMFUNC_H
+#define __CORE_CMFUNC_H
+
+
+/* ###########################  Core Function Access  ########################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+  @{
+ */
+
+#if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
+/* ARM armcc specific functions */
+
+#if (__ARMCC_VERSION < 400677)
+  #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
+#endif
+
+/* intrinsic void __enable_irq();     */
+/* intrinsic void __disable_irq();    */
+
+/** \brief  Get Control Register
+
+    This function returns the content of the Control Register.
+
+    \return               Control Register value
+ */
+__STATIC_INLINE uint32_t __get_CONTROL(void)
+{
+  register uint32_t __regControl         __ASM("control");
+  return(__regControl);
+}
+
+
+/** \brief  Set Control Register
+
+    This function writes the given value to the Control Register.
+
+    \param [in]    control  Control Register value to set
+ */
+__STATIC_INLINE void __set_CONTROL(uint32_t control)
+{
+  register uint32_t __regControl         __ASM("control");
+  __regControl = control;
+}
+
+
+/** \brief  Get IPSR Register
+
+    This function returns the content of the IPSR Register.
+
+    \return               IPSR Register value
+ */
+__STATIC_INLINE uint32_t __get_IPSR(void)
+{
+  register uint32_t __regIPSR          __ASM("ipsr");
+  return(__regIPSR);
+}
+
+
+/** \brief  Get APSR Register
+
+    This function returns the content of the APSR Register.
+
+    \return               APSR Register value
+ */
+__STATIC_INLINE uint32_t __get_APSR(void)
+{
+  register uint32_t __regAPSR          __ASM("apsr");
+  return(__regAPSR);
+}
+
+
+/** \brief  Get xPSR Register
+
+    This function returns the content of the xPSR Register.
+
+    \return               xPSR Register value
+ */
+__STATIC_INLINE uint32_t __get_xPSR(void)
+{
+  register uint32_t __regXPSR          __ASM("xpsr");
+  return(__regXPSR);
+}
+
+
+/** \brief  Get Process Stack Pointer
+
+    This function returns the current value of the Process Stack Pointer (PSP).
+
+    \return               PSP Register value
+ */
+__STATIC_INLINE uint32_t __get_PSP(void)
+{
+  register uint32_t __regProcessStackPointer  __ASM("psp");
+  return(__regProcessStackPointer);
+}
+
+
+/** \brief  Set Process Stack Pointer
+
+    This function assigns the given value to the Process Stack Pointer (PSP).
+
+    \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
+{
+  register uint32_t __regProcessStackPointer  __ASM("psp");
+  __regProcessStackPointer = topOfProcStack;
+}
+
+
+/** \brief  Get Main Stack Pointer
+
+    This function returns the current value of the Main Stack Pointer (MSP).
+
+    \return               MSP Register value
+ */
+__STATIC_INLINE uint32_t __get_MSP(void)
+{
+  register uint32_t __regMainStackPointer     __ASM("msp");
+  return(__regMainStackPointer);
+}
+
+
+/** \brief  Set Main Stack Pointer
+
+    This function assigns the given value to the Main Stack Pointer (MSP).
+
+    \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
+{
+  register uint32_t __regMainStackPointer     __ASM("msp");
+  __regMainStackPointer = topOfMainStack;
+}
+
+
+/** \brief  Get Priority Mask
+
+    This function returns the current state of the priority mask bit from the Priority Mask Register.
+
+    \return               Priority Mask value
+ */
+__STATIC_INLINE uint32_t __get_PRIMASK(void)
+{
+  register uint32_t __regPriMask         __ASM("primask");
+  return(__regPriMask);
+}
+
+
+/** \brief  Set Priority Mask
+
+    This function assigns the given value to the Priority Mask Register.
+
+    \param [in]    priMask  Priority Mask
+ */
+__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
+{
+  register uint32_t __regPriMask         __ASM("primask");
+  __regPriMask = (priMask);
+}
+
+
+#if       (__CORTEX_M >= 0x03)
+
+/** \brief  Enable FIQ
+
+    This function enables FIQ interrupts by clearing the F-bit in the CPSR.
+    Can only be executed in Privileged modes.
+ */
+#define __enable_fault_irq                __enable_fiq
+
+
+/** \brief  Disable FIQ
+
+    This function disables FIQ interrupts by setting the F-bit in the CPSR.
+    Can only be executed in Privileged modes.
+ */
+#define __disable_fault_irq               __disable_fiq
+
+
+/** \brief  Get Base Priority
+
+    This function returns the current value of the Base Priority register.
+
+    \return               Base Priority register value
+ */
+__STATIC_INLINE uint32_t  __get_BASEPRI(void)
+{
+  register uint32_t __regBasePri         __ASM("basepri");
+  return(__regBasePri);
+}
+
+
+/** \brief  Set Base Priority
+
+    This function assigns the given value to the Base Priority register.
+
+    \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
+{
+  register uint32_t __regBasePri         __ASM("basepri");
+  __regBasePri = (basePri & 0xff);
+}
+
+
+/** \brief  Get Fault Mask
+
+    This function returns the current value of the Fault Mask register.
+
+    \return               Fault Mask register value
+ */
+__STATIC_INLINE uint32_t __get_FAULTMASK(void)
+{
+  register uint32_t __regFaultMask       __ASM("faultmask");
+  return(__regFaultMask);
+}
+
+
+/** \brief  Set Fault Mask
+
+    This function assigns the given value to the Fault Mask register.
+
+    \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  register uint32_t __regFaultMask       __ASM("faultmask");
+  __regFaultMask = (faultMask & (uint32_t)1);
+}
+
+#endif /* (__CORTEX_M >= 0x03) */
+
+
+#if       (__CORTEX_M == 0x04)
+
+/** \brief  Get FPSCR
+
+    This function returns the current value of the Floating Point Status/Control register.
+
+    \return               Floating Point Status/Control register value
+ */
+__STATIC_INLINE uint32_t __get_FPSCR(void)
+{
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  register uint32_t __regfpscr         __ASM("fpscr");
+  return(__regfpscr);
+#else
+   return(0);
+#endif
+}
+
+
+/** \brief  Set FPSCR
+
+    This function assigns the given value to the Floating Point Status/Control register.
+
+    \param [in]    fpscr  Floating Point Status/Control value to set
+ */
+__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
+{
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  register uint32_t __regfpscr         __ASM("fpscr");
+  __regfpscr = (fpscr);
+#endif
+}
+
+#endif /* (__CORTEX_M == 0x04) */
+
+
+#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
+/* IAR iccarm specific functions */
+
+#include <cmsis_iar.h>
+
+
+#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
+/* TI CCS specific functions */
+
+#include <cmsis_ccs.h>
+
+
+#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
+/* GNU gcc specific functions */
+
+/** \brief  Enable IRQ Interrupts
+
+  This function enables IRQ interrupts by clearing the I-bit in the CPSR.
+  Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
+{
+  __ASM volatile ("cpsie i" : : : "memory");
+}
+
+
+/** \brief  Disable IRQ Interrupts
+
+  This function disables IRQ interrupts by setting the I-bit in the CPSR.
+  Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
+{
+  __ASM volatile ("cpsid i" : : : "memory");
+}
+
+
+/** \brief  Get Control Register
+
+    This function returns the content of the Control Register.
+
+    \return               Control Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Control Register
+
+    This function writes the given value to the Control Register.
+
+    \param [in]    control  Control Register value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
+{
+  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+}
+
+
+/** \brief  Get IPSR Register
+
+    This function returns the content of the IPSR Register.
+
+    \return               IPSR Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Get APSR Register
+
+    This function returns the content of the APSR Register.
+
+    \return               APSR Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Get xPSR Register
+
+    This function returns the content of the xPSR Register.
+
+    \return               xPSR Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Get Process Stack Pointer
+
+    This function returns the current value of the Process Stack Pointer (PSP).
+
+    \return               PSP Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp\n"  : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Process Stack Pointer
+
+    This function assigns the given value to the Process Stack Pointer (PSP).
+
+    \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : );
+}
+
+
+/** \brief  Get Main Stack Pointer
+
+    This function returns the current value of the Main Stack Pointer (MSP).
+
+    \return               MSP Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Main Stack Pointer
+
+    This function assigns the given value to the Main Stack Pointer (MSP).
+
+    \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : );
+}
+
+
+/** \brief  Get Priority Mask
+
+    This function returns the current state of the priority mask bit from the Priority Mask Register.
+
+    \return               Priority Mask value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Priority Mask
+
+    This function assigns the given value to the Priority Mask Register.
+
+    \param [in]    priMask  Priority Mask
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+}
+
+
+#if       (__CORTEX_M >= 0x03)
+
+/** \brief  Enable FIQ
+
+    This function enables FIQ interrupts by clearing the F-bit in the CPSR.
+    Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
+{
+  __ASM volatile ("cpsie f" : : : "memory");
+}
+
+
+/** \brief  Disable FIQ
+
+    This function disables FIQ interrupts by setting the F-bit in the CPSR.
+    Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
+{
+  __ASM volatile ("cpsid f" : : : "memory");
+}
+
+
+/** \brief  Get Base Priority
+
+    This function returns the current value of the Base Priority register.
+
+    \return               Base Priority register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Base Priority
+
+    This function assigns the given value to the Base Priority register.
+
+    \param [in]    basePri  Base Priority value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
+{
+  __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
+}
+
+
+/** \brief  Get Fault Mask
+
+    This function returns the current value of the Fault Mask register.
+
+    \return               Fault Mask register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Fault Mask
+
+    This function assigns the given value to the Fault Mask register.
+
+    \param [in]    faultMask  Fault Mask value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
+}
+
+#endif /* (__CORTEX_M >= 0x03) */
+
+
+#if       (__CORTEX_M == 0x04)
+
+/** \brief  Get FPSCR
+
+    This function returns the current value of the Floating Point Status/Control register.
+
+    \return               Floating Point Status/Control register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
+{
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  uint32_t result;
+
+  /* Empty asm statement works as a scheduling barrier */
+  __ASM volatile ("");
+  __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
+  __ASM volatile ("");
+  return(result);
+#else
+   return(0);
+#endif
+}
+
+
+/** \brief  Set FPSCR
+
+    This function assigns the given value to the Floating Point Status/Control register.
+
+    \param [in]    fpscr  Floating Point Status/Control value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
+{
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  /* Empty asm statement works as a scheduling barrier */
+  __ASM volatile ("");
+  __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
+  __ASM volatile ("");
+#endif
+}
+
+#endif /* (__CORTEX_M == 0x04) */
+
+
+#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
+/* TASKING carm specific functions */
+
+/*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all instrinsics,
+ * Including the CMSIS ones.
+ */
+
+#endif
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+
+#endif /* __CORE_CMFUNC_H */
diff --git a/platform/atm2/ATM22xx-x1x/include/arm/core_cmInstr.h b/platform/atm2/ATM22xx-x1x/include/arm/core_cmInstr.h
new file mode 100644
index 0000000..ab3a010
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/arm/core_cmInstr.h
@@ -0,0 +1,688 @@
+/**************************************************************************//**
+ * @file     core_cmInstr.h
+ * @brief    CMSIS Cortex-M Core Instruction Access Header File
+ * @version  V3.20
+ * @date     05. March 2013
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2013 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#ifndef __CORE_CMINSTR_H
+#define __CORE_CMINSTR_H
+
+
+/* ##########################  Core Instruction Access  ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+  Access to dedicated instructions
+  @{
+*/
+
+#if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
+/* ARM armcc specific functions */
+
+#if (__ARMCC_VERSION < 400677)
+  #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
+#endif
+
+
+/** \brief  No Operation
+
+    No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+#define __NOP                             __nop
+
+
+/** \brief  Wait For Interrupt
+
+    Wait For Interrupt is a hint instruction that suspends execution
+    until one of a number of events occurs.
+ */
+#define __WFI                             __wfi
+
+
+/** \brief  Wait For Event
+
+    Wait For Event is a hint instruction that permits the processor to enter
+    a low-power state until one of a number of events occurs.
+ */
+#define __WFE                             __wfe
+
+
+/** \brief  Send Event
+
+    Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+#define __SEV                             __sev
+
+
+/** \brief  Instruction Synchronization Barrier
+
+    Instruction Synchronization Barrier flushes the pipeline in the processor,
+    so that all instructions following the ISB are fetched from cache or
+    memory, after the instruction has been completed.
+ */
+#define __ISB()                           __isb(0xF)
+
+
+/** \brief  Data Synchronization Barrier
+
+    This function acts as a special kind of Data Memory Barrier.
+    It completes when all explicit memory accesses before this instruction complete.
+ */
+#define __DSB()                           __dsb(0xF)
+
+
+/** \brief  Data Memory Barrier
+
+    This function ensures the apparent order of the explicit memory operations before
+    and after the instruction, without ensuring their completion.
+ */
+#define __DMB()                           __dmb(0xF)
+
+
+/** \brief  Reverse byte order (32 bit)
+
+    This function reverses the byte order in integer value.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+#define __REV                             __rev
+
+
+/** \brief  Reverse byte order (16 bit)
+
+    This function reverses the byte order in two unsigned short values.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+#ifndef __NO_EMBEDDED_ASM
+__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
+{
+  rev16 r0, r0
+  bx lr
+}
+#endif
+
+/** \brief  Reverse byte order in signed short value
+
+    This function reverses the byte order in a signed short value with sign extension to integer.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+#ifndef __NO_EMBEDDED_ASM
+__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
+{
+  revsh r0, r0
+  bx lr
+}
+#endif
+
+
+/** \brief  Rotate Right in unsigned value (32 bit)
+
+    This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+
+    \param [in]    value  Value to rotate
+    \param [in]    value  Number of Bits to rotate
+    \return               Rotated value
+ */
+#define __ROR                             __ror
+
+
+/** \brief  Breakpoint
+
+    This function causes the processor to enter Debug state.
+    Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+
+    \param [in]    value  is ignored by the processor.
+                   If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value)                       __breakpoint(value)
+
+
+#if       (__CORTEX_M >= 0x03)
+
+/** \brief  Reverse bit order of value
+
+    This function reverses the bit order of the given value.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+#define __RBIT                            __rbit
+
+
+/** \brief  LDR Exclusive (8 bit)
+
+    This function performs a exclusive LDR command for 8 bit value.
+
+    \param [in]    ptr  Pointer to data
+    \return             value of type uint8_t at (*ptr)
+ */
+#define __LDREXB(ptr)                     ((uint8_t ) __ldrex(ptr))
+
+
+/** \brief  LDR Exclusive (16 bit)
+
+    This function performs a exclusive LDR command for 16 bit values.
+
+    \param [in]    ptr  Pointer to data
+    \return        value of type uint16_t at (*ptr)
+ */
+#define __LDREXH(ptr)                     ((uint16_t) __ldrex(ptr))
+
+
+/** \brief  LDR Exclusive (32 bit)
+
+    This function performs a exclusive LDR command for 32 bit values.
+
+    \param [in]    ptr  Pointer to data
+    \return        value of type uint32_t at (*ptr)
+ */
+#define __LDREXW(ptr)                     ((uint32_t ) __ldrex(ptr))
+
+
+/** \brief  STR Exclusive (8 bit)
+
+    This function performs a exclusive STR command for 8 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+#define __STREXB(value, ptr)              __strex(value, ptr)
+
+
+/** \brief  STR Exclusive (16 bit)
+
+    This function performs a exclusive STR command for 16 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+#define __STREXH(value, ptr)              __strex(value, ptr)
+
+
+/** \brief  STR Exclusive (32 bit)
+
+    This function performs a exclusive STR command for 32 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+#define __STREXW(value, ptr)              __strex(value, ptr)
+
+
+/** \brief  Remove the exclusive lock
+
+    This function removes the exclusive lock which is created by LDREX.
+
+ */
+#define __CLREX                           __clrex
+
+
+/** \brief  Signed Saturate
+
+    This function saturates a signed value.
+
+    \param [in]  value  Value to be saturated
+    \param [in]    sat  Bit position to saturate to (1..32)
+    \return             Saturated value
+ */
+#define __SSAT                            __ssat
+
+
+/** \brief  Unsigned Saturate
+
+    This function saturates an unsigned value.
+
+    \param [in]  value  Value to be saturated
+    \param [in]    sat  Bit position to saturate to (0..31)
+    \return             Saturated value
+ */
+#define __USAT                            __usat
+
+
+/** \brief  Count leading zeros
+
+    This function counts the number of leading zeros of a data value.
+
+    \param [in]  value  Value to count the leading zeros
+    \return             number of leading zeros in value
+ */
+#define __CLZ                             __clz
+
+#endif /* (__CORTEX_M >= 0x03) */
+
+
+
+#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
+/* IAR iccarm specific functions */
+
+#include <cmsis_iar.h>
+
+
+#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
+/* TI CCS specific functions */
+
+#include <cmsis_ccs.h>
+
+
+#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
+/* GNU gcc specific functions */
+
+/* Define macros for porting to both thumb1 and thumb2.
+ * For thumb1, use low register (r0-r7), specified by constrant "l"
+ * Otherwise, use general registers, specified by constrant "r" */
+#if defined (__thumb__) && !defined (__thumb2__)
+#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_USE_REG(r) "l" (r)
+#else
+#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_USE_REG(r) "r" (r)
+#endif
+
+/** \brief  No Operation
+
+    No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
+{
+  __ASM volatile ("nop");
+}
+
+
+/** \brief  Wait For Interrupt
+
+    Wait For Interrupt is a hint instruction that suspends execution
+    until one of a number of events occurs.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
+{
+  __ASM volatile ("wfi");
+}
+
+
+/** \brief  Wait For Event
+
+    Wait For Event is a hint instruction that permits the processor to enter
+    a low-power state until one of a number of events occurs.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
+{
+  __ASM volatile ("wfe");
+}
+
+
+/** \brief  Send Event
+
+    Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
+{
+  __ASM volatile ("sev");
+}
+
+
+/** \brief  Instruction Synchronization Barrier
+
+    Instruction Synchronization Barrier flushes the pipeline in the processor,
+    so that all instructions following the ISB are fetched from cache or
+    memory, after the instruction has been completed.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
+{
+  __ASM volatile ("isb");
+}
+
+
+/** \brief  Data Synchronization Barrier
+
+    This function acts as a special kind of Data Memory Barrier.
+    It completes when all explicit memory accesses before this instruction complete.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
+{
+  __ASM volatile ("dsb");
+}
+
+
+/** \brief  Data Memory Barrier
+
+    This function ensures the apparent order of the explicit memory operations before
+    and after the instruction, without ensuring their completion.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
+{
+  __ASM volatile ("dmb");
+}
+
+
+/** \brief  Reverse byte order (32 bit)
+
+    This function reverses the byte order in integer value.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
+{
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
+  return __builtin_bswap32(value);
+#else
+  uint32_t result;
+
+  __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+#endif
+}
+
+
+/** \brief  Reverse byte order (16 bit)
+
+    This function reverses the byte order in two unsigned short values.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
+{
+  uint32_t result;
+
+  __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+}
+
+
+/** \brief  Reverse byte order in signed short value
+
+    This function reverses the byte order in a signed short value with sign extension to integer.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
+{
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+  return (short)__builtin_bswap16(value);
+#else
+  uint32_t result;
+
+  __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+#endif
+}
+
+
+/** \brief  Rotate Right in unsigned value (32 bit)
+
+    This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+
+    \param [in]    value  Value to rotate
+    \param [in]    value  Number of Bits to rotate
+    \return               Rotated value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
+{
+  return (op1 >> op2) | (op1 << (32 - op2));
+}
+
+
+/** \brief  Breakpoint
+
+    This function causes the processor to enter Debug state.
+    Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+
+    \param [in]    value  is ignored by the processor.
+                   If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value)                       __ASM volatile ("bkpt "#value)
+
+
+#if       (__CORTEX_M >= 0x03)
+
+/** \brief  Reverse bit order of value
+
+    This function reverses the bit order of the given value.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
+{
+  uint32_t result;
+
+   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
+   return(result);
+}
+
+
+/** \brief  LDR Exclusive (8 bit)
+
+    This function performs a exclusive LDR command for 8 bit value.
+
+    \param [in]    ptr  Pointer to data
+    \return             value of type uint8_t at (*ptr)
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
+{
+    uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+   __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+       accepted by assembler. So has to use following less efficient pattern.
+    */
+   __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+   return(result);
+}
+
+
+/** \brief  LDR Exclusive (16 bit)
+
+    This function performs a exclusive LDR command for 16 bit values.
+
+    \param [in]    ptr  Pointer to data
+    \return        value of type uint16_t at (*ptr)
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
+{
+    uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+   __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+       accepted by assembler. So has to use following less efficient pattern.
+    */
+   __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+   return(result);
+}
+
+
+/** \brief  LDR Exclusive (32 bit)
+
+    This function performs a exclusive LDR command for 32 bit values.
+
+    \param [in]    ptr  Pointer to data
+    \return        value of type uint32_t at (*ptr)
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
+   return(result);
+}
+
+
+/** \brief  STR Exclusive (8 bit)
+
+    This function performs a exclusive STR command for 8 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
+{
+   uint32_t result;
+
+   __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
+   return(result);
+}
+
+
+/** \brief  STR Exclusive (16 bit)
+
+    This function performs a exclusive STR command for 16 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
+{
+   uint32_t result;
+
+   __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
+   return(result);
+}
+
+
+/** \brief  STR Exclusive (32 bit)
+
+    This function performs a exclusive STR command for 32 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
+{
+   uint32_t result;
+
+   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
+   return(result);
+}
+
+
+/** \brief  Remove the exclusive lock
+
+    This function removes the exclusive lock which is created by LDREX.
+
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
+{
+  __ASM volatile ("clrex" ::: "memory");
+}
+
+
+/** \brief  Signed Saturate
+
+    This function saturates a signed value.
+
+    \param [in]  value  Value to be saturated
+    \param [in]    sat  Bit position to saturate to (1..32)
+    \return             Saturated value
+ */
+#define __SSAT(ARG1,ARG2) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+
+/** \brief  Unsigned Saturate
+
+    This function saturates an unsigned value.
+
+    \param [in]  value  Value to be saturated
+    \param [in]    sat  Bit position to saturate to (0..31)
+    \return             Saturated value
+ */
+#define __USAT(ARG1,ARG2) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+
+/** \brief  Count leading zeros
+
+    This function counts the number of leading zeros of a data value.
+
+    \param [in]  value  Value to count the leading zeros
+    \return             number of leading zeros in value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
+{
+   uint32_t result;
+
+  __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
+  return(result);
+}
+
+#endif /* (__CORTEX_M >= 0x03) */
+
+
+
+
+#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
+/* TASKING carm specific functions */
+
+/*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all intrinsics,
+ * Including the CMSIS ones.
+ */
+
+#endif
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+#endif /* __CORE_CMINSTR_H */
diff --git a/platform/atm2/ATM22xx-x1x/include/armgcc/compiler.h b/platform/atm2/ATM22xx-x1x/include/armgcc/compiler.h
new file mode 100644
index 0000000..25f4610
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/armgcc/compiler.h
@@ -0,0 +1,150 @@
+/**
+ *******************************************************************************
+ *
+ * @file compiler.h
+ *
+ * @brief Definitions of compiler specific directives.
+ *
+ * Copyright (C) RivieraWaves 2009-2015
+ * Copyright (C) Atmosic 2017-2023
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/**
+ * @defgroup COMPILER Compiler
+ * @ingroup ATMx2
+ * @brief GNU gcc compiler interface
+ * @{
+ */
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef __GNUC__
+#error "File only included with ARM GCC"
+#endif // __GNUC__
+
+/// define the static keyword for this compiler
+#define __STATIC static
+
+/// define the force inlining attribute for this compiler
+#define __INLINE __attribute__((__always_inline__)) static inline
+
+/// define the IRQ handler attribute for this compiler
+#define __IRQ __attribute__((__interrupt__("IRQ")))
+
+/// define the BLE IRQ handler attribute for this compiler
+#define __BTIRQ
+
+/// define the BLE IRQ handler attribute for this compiler
+#ifndef CFG_ROM
+#define __BLEIRQ __attribute__((section(".data_text")))
+#else
+#define __BLEIRQ
+#endif
+
+/// define the FIQ handler attribute for this compiler
+#define __FIQ __attribute__((__interrupt__("FIQ")))
+
+/// define size of an empty array (used to declare structure with an array size not defined)
+#define __ARRAY_EMPTY
+
+/// Function returns struct in registers (4 in rvds, var with gnuarm).
+/// With Gnuarm, feature depends on command line options and
+/// impacts ALL functions returning 2-words max structs
+/// (check -freg-struct-return and -mabi=xxx)
+#define __VIR
+
+/// function has no side effect and return depends only on arguments
+#define __PURE __attribute__((const))
+#define __PUREISH __attribute__((pure))
+
+/// Function never returns
+#define __NORETURN __attribute__((noreturn))
+
+/// Align instantiated lvalue or struct member on 4 bytes
+#define __ALIGN4 __attribute__((aligned(4)))
+
+/// __MODULE__ comes from the RVDS compiler that supports it
+#ifndef __MODULE__
+#define __MODULE__ __BASE_FILE__
+#endif
+
+/// Pack a structure field
+#define __PACKED __attribute__ ((__packed__))
+
+/// Put a variable in a memory maintained during deep sleep
+#define __LOWPOWER_SAVED
+
+#define STRINGIFY(x) #x
+#define TOSTRING(x) STRINGIFY(x)
+#define AT __MODULE__ ":" TOSTRING(__LINE__)
+
+/// Do not initialize variable at startup
+/// Create unique section header @file+line
+#define __UNINIT __attribute__((section(".uninit." AT)))
+#ifndef CFG_ROM
+#define __UNINIT_NAMED(__s) __UNINIT
+#else
+#define __UNINIT_NAMED(__s) __attribute__((section(".uninit" __s)))
+#endif
+
+/// Locate code in high performance memory
+#ifndef CFG_ROM
+/// Create unique section header @file+line
+#define __FAST __attribute__((section(".data_text." AT)))
+#else
+#define __FAST
+#endif
+
+/// Export everything for ROM
+#ifdef CFG_ROM
+#define __NR_STATIC
+#else
+#define __NR_STATIC	static
+#endif
+
+/// Compile-time assertion
+#define STATIC_ASSERT	_Static_assert
+
+/// Unused variable
+#define __UNUSED __attribute__((unused))
+
+/// Convert context pointer from const to non-const
+#define CONTEXT_VOID_P(__p) ({ \
+    __typeof__(__p) __tmp = (__p); \
+    __builtin_choose_expr( \
+	__builtin_types_compatible_p(__typeof__(__tmp), void const *), \
+	(void *)(uintptr_t)__tmp, __tmp); \
+})
+
+/// Printf-like function
+#define __PRINTF(...) __attribute__((format(printf, ##__VA_ARGS__)))
+
+/// Arguments not permitting NULL value
+#define __NONNULL_ALL __attribute__((nonnull))
+#define __NONNULL(...) __attribute__((nonnull(__VA_ARGS__)))
+
+/// Field position in compound object
+#define __OFFSET(__s, __f) offsetof(__typeof__(__s), __f)
+
+/// Constructor priority
+#define __CONSTRUCTOR_PRIO(__p) __attribute__((constructor(__p)))
+
+/// Convert structured struct with different type name
+#define TYPE_CONVERT(src_type, var, dst_type) ({ \
+    STATIC_ASSERT(__builtin_types_compatible_p(src_type, __typeof__(var)) && \
+    (sizeof(src_type) == sizeof(dst_type)), "incompatible"); \
+    *(dst_type const *)&var;})
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} COMPILER
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/att.h b/platform/atm2/ATM22xx-x1x/include/ble/att.h
new file mode 100644
index 0000000..1ab6812
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/att.h
@@ -0,0 +1,1164 @@
+/**
+ ****************************************************************************************
+ *
+ * @file att.h
+ *
+ * @brief Header file - ATT.
+ *
+ * Copyright (C) RivieraWaves 2009-2016
+ * Copyright (C) Atmosic 2023
+ *
+ ****************************************************************************************
+ */
+
+#ifndef ATT_H_
+#define ATT_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup ATT Attribute Protocol
+ * @ingroup HOST
+ * @brief Attribute Protocol.
+ *
+ * The ATT block contains the procedures for discovering, reading, writing
+ * and indicating attributes to peer device . It also defines a number of items
+ * that caters to the security aspect of the block as access to some information
+ * may require both authorization and an authenticated and encrypted physical
+ * link before an attribute can be read or written
+ *
+ * @{
+ *
+ ****************************************************************************************
+ */
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include <stdint.h>
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+/// Macro used to convert CPU integer define to LSB first 16-bits UUID
+#define ATT_UUID_16(uuid)                          (uuid)
+
+/// Invalid attribute handle
+#define ATT_INVALID_HDL                            (0x0000)
+/// Invalid attribute idx (used for profiles)
+#define ATT_INVALID_IDX                            (0xff)
+
+#define ATT_1ST_REQ_START_HDL                      0x0001
+#define ATT_1ST_REQ_END_HDL                        0xFFFF
+
+/// Maximum possible attribute handle
+#define ATT_MAX_ATTR_HDL                           ATT_1ST_REQ_END_HDL
+
+/// Offset of value in signed PDU
+#define ATT_SIGNED_PDU_VAL_OFFSET               0x03
+
+/// Attribute Features
+#define ATT_SERVER_CONFIG                       0x0001
+#define ATT_SERVICE_DISC                        0x0002
+#define ATT_RELATIONSHIP_DISC                   0x0004
+#define ATT_CHAR_DISC                           0x0008
+#define ATT_CHAR_DESC_DISC                      0x0010
+#define ATT_RD_CHAR_VALUE                       0x0020
+#define ATT_WR_CHAR_VALUE                       0x0040
+#define ATT_NOTIF_CHAR_VALUE                    0x0080
+#define ATT_IND_CHAR_VALUE                      0x0100
+#define ATT_RD_CHAR_DESC                        0x0200
+#define ATT_WR_CHAR_DESC                        0x0400
+
+/// Length, number, offset defines
+#define ATT_SVC_VALUE_MAX_LEN                   0x0030
+#define ATT_CHAR_NAME_MAX_LEN                   0x0030
+#define ATT_UUID_16_LEN                         0x0002
+#define ATT_UUID_32_LEN                         0x0004
+#define ATT_UUID_128_LEN                        0x0010
+
+/// offset - l2cap header and ATT code
+#define ATT_PDU_DATA_OFFSET                     0x05
+
+/// Characteristic Properties Bit
+#define ATT_CHAR_PROP_BCAST                     0x01
+#define ATT_CHAR_PROP_RD                        0x02
+#define ATT_CHAR_PROP_WR_NO_RESP                0x04
+#define ATT_CHAR_PROP_WR                        0x08
+#define ATT_CHAR_PROP_NTF                       0x10
+#define ATT_CHAR_PROP_IND                       0x20
+#define ATT_CHAR_PROP_AUTH                      0x40
+#define ATT_CHAR_PROP_EXT_PROP                  0x80
+/// Invalid Attribute Handle
+#define ATT_INVALID_SEARCH_HANDLE               0x0000
+#define ATT_INVALID_HANDLE                      0x0000
+/// Read Information Request
+#define ATT_UUID_FILTER_0                       0x00
+#define ATT_UUID_FILTER_2                       0x02
+#define ATT_UUID_FILTER_16                      0x10
+/// Read Information Response
+#define ATT_FORMAT_LEN                          0x0001
+#define ATT_FORMAT_16BIT_UUID                   0x01
+#define ATT_FORMAT_128BIT_UUID                  0x02
+/// For No fix length PDU
+#define ATT_HANDLE_LEN                          0x0002
+#define ATT_EACHLEN_LEN                         0x0001
+#define ATT_PROP_LEN                            0x0001
+#define ATT_CODE_LEN                            0x0001
+#define ATT_CODE_AND_DATA_LEN                   0x0002
+#define ATT_CODE_AND_HANDLE_LEN                 0x0003
+#define ATT_CODE_AND_HANDLE_LEN_AND_OFFSET      0x0005
+#define ATT_SIGNATURE_LEN                       0x0C
+
+/// extended characteristics
+#define ATT_EXT_RELIABLE_WRITE                  0x0001
+#define ATT_EXT_WRITABLE_AUX                    0x0002
+#define ATT_EXT_RFU                             0xFFFC
+
+/// PDU size for error response
+#define ATT_ERROR_RESP_LEN                      0x05
+
+/// Offset of value in signed PDU
+#define ATT_SIGNED_PDU_VAL_OFFSET               0x03
+
+/// Attribute operation code - Method (bit 5 - 0)
+#define ATT_OPCODE_METHOD_MASK                  0x3F
+#define ATT_OPCODE_METHOD_LSB                   0
+/// Attribute operation code - Command Flag (bit 6)
+#define ATT_OPCODE_CMD_FLAG_BIT                 0x40
+#define ATT_OPCODE_CMD_FLAG_POS                 6
+/// Attribute operation code - Authentication Signature Flag (bit 7)
+#define ATT_OPCODE_AUTH_SIGNATURE_FLAG_BIT      0x80
+#define ATT_OPCODE_AUTH_SIGNATURE_FLAG_POS      7
+
+#define ATT_BT_UUID_128 {0xFB, 0x34, 0x9B, 0x5F, 0x80, 0x00, 0x00, 0x80, \
+                          0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+
+
+
+/* Attribute Specification Defines */
+
+/// Common 16-bit Universal Unique Identifier
+enum {
+    ATT_INVALID_UUID                            = ATT_UUID_16(0x0000),
+    /*----------------- SERVICES ---------------------*/
+    /// Generic Access Profile
+    ATT_SVC_GENERIC_ACCESS                      = ATT_UUID_16(0x1800),
+    /// Attribute Profile
+    ATT_SVC_GENERIC_ATTRIBUTE                   = ATT_UUID_16(0x1801),
+    /// Immediate alert Service
+    ATT_SVC_IMMEDIATE_ALERT                     = ATT_UUID_16(0x1802),
+    /// Link Loss Service
+    ATT_SVC_LINK_LOSS                           = ATT_UUID_16(0x1803),
+    /// Tx Power Service
+    ATT_SVC_TX_POWER                            = ATT_UUID_16(0x1804),
+    /// Current Time Service Service
+    ATT_SVC_CURRENT_TIME                        = ATT_UUID_16(0x1805),
+    /// Reference Time Update Service
+    ATT_SVC_REF_TIME_UPDATE                     = ATT_UUID_16(0x1806),
+    /// Next DST Change Service
+    ATT_SVC_NEXT_DST_CHANGE                     = ATT_UUID_16(0x1807),
+    /// Glucose Service
+    ATT_SVC_GLUCOSE                             = ATT_UUID_16(0x1808),
+    /// Health Thermometer Service
+    ATT_SVC_HEALTH_THERMOM                      = ATT_UUID_16(0x1809),
+    /// Device Information Service
+    ATT_SVC_DEVICE_INFO                         = ATT_UUID_16(0x180A),
+    /// Heart Rate Service
+    ATT_SVC_HEART_RATE                          = ATT_UUID_16(0x180D),
+    /// Phone Alert Status Service
+    ATT_SVC_PHONE_ALERT_STATUS                  = ATT_UUID_16(0x180E),
+    /// Battery Service
+    ATT_SVC_BATTERY_SERVICE                     = ATT_UUID_16(0x180F),
+    /// Blood Pressure Service
+    ATT_SVC_BLOOD_PRESSURE                      = ATT_UUID_16(0x1810),
+    /// Alert Notification Service
+    ATT_SVC_ALERT_NTF                           = ATT_UUID_16(0x1811),
+    /// HID Service
+    ATT_SVC_HID                                 = ATT_UUID_16(0x1812),
+    /// Scan Parameters Service
+    ATT_SVC_SCAN_PARAMETERS                     = ATT_UUID_16(0x1813),
+    /// Running Speed and Cadence Service
+    ATT_SVC_RUNNING_SPEED_CADENCE               = ATT_UUID_16(0x1814),
+    /// Cycling Speed and Cadence Service
+    ATT_SVC_CYCLING_SPEED_CADENCE               = ATT_UUID_16(0x1816),
+    /// Cycling Power Service
+    ATT_SVC_CYCLING_POWER                       = ATT_UUID_16(0x1818),
+    /// Location and Navigation Service
+    ATT_SVC_LOCATION_AND_NAVIGATION             = ATT_UUID_16(0x1819),
+    /// Environmental Sensing Service
+    ATT_SVC_ENVIRONMENTAL_SENSING               = ATT_UUID_16(0x181A),
+    /// Body Composition Service
+    ATT_SVC_BODY_COMPOSITION                    = ATT_UUID_16(0x181B),
+    /// User Data Service
+    ATT_SVC_USER_DATA                           = ATT_UUID_16(0x181C),
+    /// Weight Scale Service
+    ATT_SVC_WEIGHT_SCALE                        = ATT_UUID_16(0x181D),
+    /// Bond Management Service
+    ATT_SVC_BOND_MANAGEMENT                     = ATT_UUID_16(0x181E),
+    /// Continuous Glucose Monitoring Service
+    ATT_SVC_CONTINUOUS_GLUCOSE_MONITORING       = ATT_UUID_16(0x181F),
+    /// Internet Protocol Support Service
+    ATT_SVC_IP_SUPPORT                          = ATT_UUID_16(0x1820),
+    /// Indoor Positioning Service
+    ATT_SVC_INDOOR_POSITIONING                  = ATT_UUID_16(0x1821),
+    /// Pulse Oximeter Service
+    ATT_SVC_PULSE_OXIMETER                      = ATT_UUID_16(0x1822),
+    /// HTTP Proxy Service
+    ATT_SVC_HTTP_PROXY                          = ATT_UUID_16(0x1823),
+    /// Transport Discovery Service
+    ATT_SVC_TRANSPORT_DISCOVERY                 = ATT_UUID_16(0x1824),
+    /// Object Transfer Service
+    ATT_SVC_OBJECT_TRANSFER                     = ATT_UUID_16(0x1825),
+    /// Mesh Provisioning Service
+    ATT_SVC_MESH_PROVISIONING                   = ATT_UUID_16(0x1827),
+    /// Mesh Proxy Service
+    ATT_SVC_MESH_PROXY                          = ATT_UUID_16(0x1828),
+
+    /*------------------- UNITS ---------------------*/
+    /// No defined unit
+    ATT_UNIT_UNITLESS                           = ATT_UUID_16(0x2700),
+    /// Length Unit - Metre
+    ATT_UNIT_METRE                              = ATT_UUID_16(0x2701),
+    ///Mass unit - Kilogram
+    ATT_UNIT_KG                                 = ATT_UUID_16(0x2702),
+    ///Time unit - second
+    ATT_UNIT_SECOND                             = ATT_UUID_16(0x2703),
+    ///Electric current unit - Ampere
+    ATT_UNIT_AMPERE                             = ATT_UUID_16(0x2704),
+    ///Thermodynamic Temperature unit - Kelvin
+    ATT_UNIT_KELVIN                             = ATT_UUID_16(0x2705),
+    /// Amount of substance unit - mole
+    ATT_UNIT_MOLE                               = ATT_UUID_16(0x2706),
+    ///Luminous intensity unit - candela
+    ATT_UNIT_CANDELA                            = ATT_UUID_16(0x2707),
+    ///Area unit - square metres
+    ATT_UNIT_SQ_METRE                           = ATT_UUID_16(0x2710),
+    ///Colume unit - cubic metres
+    ATT_UNIT_CUBIC_METRE                        = ATT_UUID_16(0x2710),
+    ///Velocity unit - metres per second
+    ATT_UNIT_METRE_PER_SECOND                   = ATT_UUID_16(0x2711),
+    ///Acceleration unit - metres per second squared
+    ATT_UNIT_METRES_PER_SEC_SQ                  = ATT_UUID_16(0x2712),
+    ///Wavenumber unit - reciprocal metre
+    ATT_UNIT_RECIPROCAL_METRE                   = ATT_UUID_16(0x2713),
+    ///Density unit - kilogram per cubic metre
+    ATT_UNIT_DENS_KG_PER_CUBIC_METRE            = ATT_UUID_16(0x2714),
+    ///Surface density unit - kilogram per square metre
+    ATT_UNIT_KG_PER_SQ_METRE                    = ATT_UUID_16(0x2715),
+    ///Specific volume unit - cubic metre per kilogram
+    ATT_UNIT_CUBIC_METRE_PER_KG                 = ATT_UUID_16(0x2716),
+    ///Current density unit - ampere per square metre
+    ATT_UNIT_AMPERE_PER_SQ_METRE                = ATT_UUID_16(0x2717),
+    ///Magnetic field strength unit - Ampere per metre
+    ATT_UNIT_AMPERE_PER_METRE                   = ATT_UUID_16(0x2718),
+    ///Amount concentration unit - mole per cubic metre
+    ATT_UNIT_MOLE_PER_CUBIC_METRE               = ATT_UUID_16(0x2719),
+    ///Mass Concentration unit - kilogram per cubic metre
+    ATT_UNIT_MASS_KG_PER_CUBIC_METRE            = ATT_UUID_16(0x271A),
+    ///Luminance unit - candela per square metre
+    ATT_UNIT_CANDELA_PER_SQ_METRE               = ATT_UUID_16(0x271B),
+    ///Refractive index unit
+    ATT_UNIT_REFRACTIVE_INDEX                   = ATT_UUID_16(0x271C),
+    ///Relative permeability unit
+    ATT_UNIT_RELATIVE_PERMEABILITY              = ATT_UUID_16(0x271D),
+    ///Plane angle unit - radian
+    ATT_UNIT_RADIAN                             = ATT_UUID_16(0x2720),
+    ///Solid angle unit - steradian
+    ATT_UNIT_STERADIAN                          = ATT_UUID_16(0x2721),
+    ///Frequency unit - Hertz
+    ATT_UNIT_HERTZ                              = ATT_UUID_16(0x2722),
+    ///Force unit - Newton
+    ATT_UNIT_NEWTON                             = ATT_UUID_16(0x2723),
+    ///Pressure unit - Pascal
+    ATT_UNIT_PASCAL                             = ATT_UUID_16(0x2724),
+    ///Energy unit - Joule
+    ATT_UNIT_JOULE                              = ATT_UUID_16(0x2725),
+    ///Power unit - Watt
+    ATT_UNIT_WATT                               = ATT_UUID_16(0x2726),
+    ///electric Charge unit - Coulomb
+    ATT_UNIT_COULOMB                            = ATT_UUID_16(0x2727),
+    ///Electric potential difference - Volt
+    ATT_UNIT_VOLT                               = ATT_UUID_16(0x2728),
+    ///Capacitance unit - Farad
+    ATT_UNIT_FARAD                              = ATT_UUID_16(0x2729),
+    ///electric resistance unit - Ohm
+    ATT_UNIT_OHM                                = ATT_UUID_16(0x272A),
+    ///Electric conductance - Siemens
+    ATT_UNIT_SIEMENS                            = ATT_UUID_16(0x272B),
+    ///Magnetic flux unit - Weber
+    ATT_UNIT_WEBER                              = ATT_UUID_16(0x272C),
+    ///Magnetic flux density unit - Tesla
+    ATT_UNIT_TESLA                              = ATT_UUID_16(0x272D),
+    ///Inductance unit - Henry
+    ATT_UNIT_HENRY                              = ATT_UUID_16(0x272E),
+    ///Temperature unit - degree Celsius
+    ATT_UNIT_CELSIUS                            = ATT_UUID_16(0x272F),
+    ///Luminous flux unit - lumen
+    ATT_UNIT_LUMEN                              = ATT_UUID_16(0x2730),
+    ///Illuminance unit - lux
+    ATT_UNIT_LUX                                = ATT_UUID_16(0x2731),
+    ///Activity referred to a radionuclide unit - becquerel
+    ATT_UNIT_BECQUEREL                          = ATT_UUID_16(0x2732),
+    ///Absorbed dose unit - Gray
+    ATT_UNIT_GRAY                               = ATT_UUID_16(0x2733),
+    ///Dose equivalent unit - Sievert
+    ATT_UNIT_SIEVERT                            = ATT_UUID_16(0x2734),
+    ///Catalytic activity unit - Katal
+    ATT_UNIT_KATAL                              = ATT_UUID_16(0x2735),
+    ///Synamic viscosity unit - Pascal second
+    ATT_UNIT_PASCAL_SECOND                      = ATT_UUID_16(0x2740),
+    ///Moment of force unit - Newton metre
+    ATT_UNIT_NEWTON_METRE                       = ATT_UUID_16(0x2741),
+    ///surface tension unit - Newton per metre
+    ATT_UNIT_NEWTON_PER_METRE                   = ATT_UUID_16(0x2742),
+    ///Angular velocity unit - radian per second
+    ATT_UNIT_RADIAN_PER_SECOND                  = ATT_UUID_16(0x2743),
+    ///Angular acceleration unit - radian per second squared
+    ATT_UNIT_RADIAN_PER_SECOND_SQ               = ATT_UUID_16(0x2744),
+    ///Heat flux density unit - Watt per square metre
+    ATT_UNIT_WATT_PER_SQ_METRE                  = ATT_UUID_16(0x2745),
+    ///HEat capacity unit - Joule per Kelvin
+    ATT_UNIT_JOULE_PER_KELVIN                   = ATT_UUID_16(0x2746),
+    ///Specific heat capacity unit - Joule per kilogram kelvin
+    ATT_UNIT_JOULE_PER_KG_KELVIN                = ATT_UUID_16(0x2747),
+    ///Specific Energy unit - Joule per kilogram
+    ATT_UNIT_JOULE_PER_KG                       = ATT_UUID_16(0x2748),
+    ///Thermal conductivity - Watt per metre Kelvin
+    ATT_UNIT_WATT_PER_METRE_KELVIN              = ATT_UUID_16(0x2749),
+    ///Energy Density unit - joule per cubic metre
+    ATT_UNIT_JOULE_PER_CUBIC_METRE              = ATT_UUID_16(0x274A),
+    ///Electric field strength unit - volt per metre
+    ATT_UNIT_VOLT_PER_METRE                     = ATT_UUID_16(0x274B),
+    ///Electric charge density unit - coulomb per cubic metre
+    ATT_UNIT_COULOMB_PER_CUBIC_METRE            = ATT_UUID_16(0x274C),
+    ///Surface charge density unit - coulomb per square metre
+    ATT_UNIT_SURF_COULOMB_PER_SQ_METRE          = ATT_UUID_16(0x274D),
+    ///Electric flux density unit - coulomb per square metre
+    ATT_UNIT_FLUX_COULOMB_PER_SQ_METRE          = ATT_UUID_16(0x274E),
+    ///Permittivity unit - farad per metre
+    ATT_UNIT_FARAD_PER_METRE                    = ATT_UUID_16(0x274F),
+    ///Permeability unit - henry per metre
+    ATT_UNIT_HENRY_PER_METRE                    = ATT_UUID_16(0x2750),
+    ///Molar energy unit - joule per mole
+    ATT_UNIT_JOULE_PER_MOLE                     = ATT_UUID_16(0x2751),
+    ///Molar entropy unit - joule per mole kelvin
+    ATT_UNIT_JOULE_PER_MOLE_KELVIN              = ATT_UUID_16(0x2752),
+    ///Exposure unit - coulomb per kilogram
+    ATT_UNIT_COULOMB_PER_KG                     = ATT_UUID_16(0x2753),
+    ///Absorbed dose rate unit - gray per second
+    ATT_UNIT_GRAY_PER_SECOND                    = ATT_UUID_16(0x2754),
+    ///Radiant intensity unit - watt per steradian
+    ATT_UNIT_WATT_PER_STERADIAN                 = ATT_UUID_16(0x2755),
+    ///Radiance unit - watt per square meter steradian
+    ATT_UNIT_WATT_PER_SQ_METRE_STERADIAN        = ATT_UUID_16(0x2756),
+    ///Catalytic activity concentration unit - katal per cubic metre
+    ATT_UNIT_KATAL_PER_CUBIC_METRE              = ATT_UUID_16(0x2757),
+    ///Time unit - minute
+    ATT_UNIT_MINUTE                             = ATT_UUID_16(0x2760),
+    ///Time unit - hour
+    ATT_UNIT_HOUR                               = ATT_UUID_16(0x2761),
+    ///Time unit - day
+    ATT_UNIT_DAY                                = ATT_UUID_16(0x2762),
+    ///Plane angle unit - degree
+    ATT_UNIT_ANGLE_DEGREE                       = ATT_UUID_16(0x2763),
+    ///Plane angle unit - minute
+    ATT_UNIT_ANGLE_MINUTE                       = ATT_UUID_16(0x2764),
+    ///Plane angle unit - second
+    ATT_UNIT_ANGLE_SECOND                       = ATT_UUID_16(0x2765),
+    ///Area unit - hectare
+    ATT_UNIT_HECTARE                            = ATT_UUID_16(0x2766),
+    ///Volume unit - litre
+    ATT_UNIT_LITRE                              = ATT_UUID_16(0x2767),
+    ///Mass unit - tonne
+    ATT_UNIT_TONNE                              = ATT_UUID_16(0x2768),
+    ///Pressure unit - bar
+    ATT_UNIT_BAR                                = ATT_UUID_16(0x2780),
+    ///Pressure unit - millimetre of mercury
+    ATT_UNIT_MM_MERCURY                         = ATT_UUID_16(0x2781),
+    ///Length unit - angstrom
+    ATT_UNIT_ANGSTROM                           = ATT_UUID_16(0x2782),
+    ///Length unit - nautical mile
+    ATT_UNIT_NAUTICAL_MILE                      = ATT_UUID_16(0x2783),
+    ///Area unit - barn
+    ATT_UNIT_BARN                               = ATT_UUID_16(0x2784),
+    ///Velocity unit - knot
+    ATT_UNIT_KNOT                               = ATT_UUID_16(0x2785),
+    ///Logarithmic radio quantity unit - neper
+    ATT_UNIT_NEPER                              = ATT_UUID_16(0x2786),
+    ///Logarithmic radio quantity unit - bel
+    ATT_UNIT_BEL                                = ATT_UUID_16(0x2787),
+    ///Length unit - yard
+    ATT_UNIT_YARD                               = ATT_UUID_16(0x27A0),
+    ///Length unit - parsec
+    ATT_UNIT_PARSEC                             = ATT_UUID_16(0x27A1),
+    ///length unit - inch
+    ATT_UNIT_INCH                               = ATT_UUID_16(0x27A2),
+    ///length unit - foot
+    ATT_UNIT_FOOT                               = ATT_UUID_16(0x27A3),
+    ///length unit - mile
+    ATT_UNIT_MILE                               = ATT_UUID_16(0x27A4),
+    ///pressure unit - pound-force per square inch
+    ATT_UNIT_POUND_FORCE_PER_SQ_INCH            = ATT_UUID_16(0x27A5),
+    ///velocity unit - kilometre per hour
+    ATT_UNIT_KM_PER_HOUR                        = ATT_UUID_16(0x27A6),
+    ///velocity unit - mile per hour
+    ATT_UNIT_MILE_PER_HOUR                      = ATT_UUID_16(0x27A7),
+    ///angular velocity unit - revolution per minute
+    ATT_UNIT_REVOLUTION_PER_MINUTE              = ATT_UUID_16(0x27A8),
+    ///energy unit - gram calorie
+    ATT_UNIT_GRAM_CALORIE                       = ATT_UUID_16(0x27A9),
+    ///energy unit - kilogram calorie
+    ATT_UNIT_KG_CALORIE                         = ATT_UUID_16(0x27AA),
+    /// energy unit - kilowatt hour
+    ATT_UNIT_KILOWATT_HOUR                      = ATT_UUID_16(0x27AB),
+    ///thermodynamic temperature unit - degree Fahrenheit
+    ATT_UNIT_FAHRENHEIT                         = ATT_UUID_16(0x27AC),
+    ///percentage
+    ATT_UNIT_PERCENTAGE                         = ATT_UUID_16(0x27AD),
+    ///per mille
+    ATT_UNIT_PER_MILLE                          = ATT_UUID_16(0x27AE),
+    ///period unit - beats per minute)
+    ATT_UNIT_BEATS_PER_MINUTE                   = ATT_UUID_16(0x27AF),
+    ///electric charge unit - ampere hours
+    ATT_UNIT_AMPERE_HOURS                       = ATT_UUID_16(0x27B0),
+    ///mass density unit - milligram per decilitre
+    ATT_UNIT_MILLIGRAM_PER_DECILITRE            = ATT_UUID_16(0x27B1),
+    ///mass density unit - millimole per litre
+    ATT_UNIT_MILLIMOLE_PER_LITRE                = ATT_UUID_16(0x27B2),
+    ///time unit - year
+    ATT_UNIT_YEAR                               = ATT_UUID_16(0x27B3),
+    ////time unit - month
+    ATT_UNIT_MONTH                              = ATT_UUID_16(0x27B4),
+
+
+    /*---------------- DECLARATIONS -----------------*/
+    /// Primary service Declaration
+    ATT_DECL_PRIMARY_SERVICE                     = ATT_UUID_16(0x2800),
+    /// Secondary service Declaration
+    ATT_DECL_SECONDARY_SERVICE                   = ATT_UUID_16(0x2801),
+    /// Include Declaration
+    ATT_DECL_INCLUDE                             = ATT_UUID_16(0x2802),
+    /// Characteristic Declaration
+    ATT_DECL_CHARACTERISTIC                      = ATT_UUID_16(0x2803),
+
+
+    /*----------------- DESCRIPTORS -----------------*/
+    /// Characteristic extended properties
+    ATT_DESC_CHAR_EXT_PROPERTIES                 = ATT_UUID_16(0x2900),
+    /// Characteristic user description
+    ATT_DESC_CHAR_USER_DESCRIPTION               = ATT_UUID_16(0x2901),
+    /// Client characteristic configuration
+    ATT_DESC_CLIENT_CHAR_CFG                     = ATT_UUID_16(0x2902),
+    /// Server characteristic configuration
+    ATT_DESC_SERVER_CHAR_CFG                     = ATT_UUID_16(0x2903),
+    /// Characteristic Presentation Format
+    ATT_DESC_CHAR_PRES_FORMAT                    = ATT_UUID_16(0x2904),
+    /// Characteristic Aggregate Format
+    ATT_DESC_CHAR_AGGREGATE_FORMAT               = ATT_UUID_16(0x2905),
+    /// Valid Range
+    ATT_DESC_VALID_RANGE                         = ATT_UUID_16(0x2906),
+    /// External Report Reference
+    ATT_DESC_EXT_REPORT_REF                      = ATT_UUID_16(0x2907),
+    /// Report Reference
+    ATT_DESC_REPORT_REF                          = ATT_UUID_16(0x2908),
+    /// Environmental Sensing Configuration
+    ATT_DESC_ES_CONFIGURATION                    = ATT_UUID_16(0x290B),
+    /// Environmental Sensing Measurement
+    ATT_DESC_ES_MEASUREMENT                      = ATT_UUID_16(0x290C),
+    /// Environmental Sensing Trigger Setting
+    ATT_DESC_ES_TRIGGER_SETTING                  = ATT_UUID_16(0x290D),
+
+
+    /*--------------- CHARACTERISTICS ---------------*/
+    /// Device name
+    ATT_CHAR_DEVICE_NAME                        = ATT_UUID_16(0x2A00),
+    /// Appearance
+    ATT_CHAR_APPEARANCE                         = ATT_UUID_16(0x2A01),
+    /// Privacy flag
+    ATT_CHAR_PRIVACY_FLAG                       = ATT_UUID_16(0x2A02),
+    /// Reconnection address
+    ATT_CHAR_RECONNECTION_ADDR                  = ATT_UUID_16(0x2A03),
+    /// Peripheral preferred connection parameters
+    ATT_CHAR_PERIPH_PREF_CON_PARAM              = ATT_UUID_16(0x2A04),
+    /// Service handles changed
+    ATT_CHAR_SERVICE_CHANGED                    = ATT_UUID_16(0x2A05),
+    /// Alert Level characteristic
+    ATT_CHAR_ALERT_LEVEL                        = ATT_UUID_16(0x2A06),
+    /// Tx Power Level
+    ATT_CHAR_TX_POWER_LEVEL                     = ATT_UUID_16(0x2A07),
+    /// Date Time
+    ATT_CHAR_DATE_TIME                          = ATT_UUID_16(0x2A08),
+    /// Day of Week
+    ATT_CHAR_DAY_WEEK                           = ATT_UUID_16(0x2A09),
+    /// Day Date Time
+    ATT_CHAR_DAY_DATE_TIME                      = ATT_UUID_16(0x2A0A),
+    /// Exact time 256
+    ATT_CHAR_EXACT_TIME_256                     = ATT_UUID_16(0x2A0C),
+    /// DST Offset
+    ATT_CHAR_DST_OFFSET                         = ATT_UUID_16(0x2A0D),
+    /// Time zone
+    ATT_CHAR_TIME_ZONE                          = ATT_UUID_16(0x2A0E),
+    /// Local time Information
+    ATT_CHAR_LOCAL_TIME_INFO                    = ATT_UUID_16(0x2A0F),
+    /// Time with DST
+    ATT_CHAR_TIME_WITH_DST                      = ATT_UUID_16(0x2A11),
+    /// Time Accuracy
+    ATT_CHAR_TIME_ACCURACY                      = ATT_UUID_16(0x2A12),
+    ///Time Source
+    ATT_CHAR_TIME_SOURCE                        = ATT_UUID_16(0x2A13),
+    /// Reference Time Information
+    ATT_CHAR_REFERENCE_TIME_INFO                = ATT_UUID_16(0x2A14),
+    /// Time Update Control Point
+    ATT_CHAR_TIME_UPDATE_CNTL_POINT             = ATT_UUID_16(0x2A16),
+    /// Time Update State
+    ATT_CHAR_TIME_UPDATE_STATE                  = ATT_UUID_16(0x2A17),
+    /// Glucose Measurement
+    ATT_CHAR_GLUCOSE_MEAS                       = ATT_UUID_16(0x2A18),
+    /// Battery Level
+    ATT_CHAR_BATTERY_LEVEL                      = ATT_UUID_16(0x2A19),
+    /// Temperature Measurement
+    ATT_CHAR_TEMPERATURE_MEAS                   = ATT_UUID_16(0x2A1C),
+    /// Temperature Type
+    ATT_CHAR_TEMPERATURE_TYPE                   = ATT_UUID_16(0x2A1D),
+    /// Intermediate Temperature
+    ATT_CHAR_INTERMED_TEMPERATURE               = ATT_UUID_16(0x2A1E),
+    /// Measurement Interval
+    ATT_CHAR_MEAS_INTERVAL                      = ATT_UUID_16(0x2A21),
+    /// Boot Keyboard Input Report
+    ATT_CHAR_BOOT_KB_IN_REPORT                  = ATT_UUID_16(0x2A22),
+    /// System ID
+    ATT_CHAR_SYS_ID                             = ATT_UUID_16(0x2A23),
+    /// Model Number String
+    ATT_CHAR_MODEL_NB                           = ATT_UUID_16(0x2A24),
+    /// Serial Number String
+    ATT_CHAR_SERIAL_NB                          = ATT_UUID_16(0x2A25),
+    /// Firmware Revision String
+    ATT_CHAR_FW_REV                             = ATT_UUID_16(0x2A26),
+    /// Hardware revision String
+    ATT_CHAR_HW_REV                             = ATT_UUID_16(0x2A27),
+    /// Software Revision String
+    ATT_CHAR_SW_REV                             = ATT_UUID_16(0x2A28),
+    /// Manufacturer Name String
+    ATT_CHAR_MANUF_NAME                         = ATT_UUID_16(0x2A29),
+    /// IEEE Regulatory Certification Data List
+    ATT_CHAR_IEEE_CERTIF                        = ATT_UUID_16(0x2A2A),
+    /// CT Time
+    ATT_CHAR_CT_TIME                            = ATT_UUID_16(0x2A2B),
+    /// Magnetic Declination
+    ATT_CHAR_MAGN_DECLINE                       = ATT_UUID_16(0x2A2C),
+    /// Scan Refresh
+    ATT_CHAR_SCAN_REFRESH                       = ATT_UUID_16(0x2A31),
+    /// Boot Keyboard Output Report
+    ATT_CHAR_BOOT_KB_OUT_REPORT                 = ATT_UUID_16(0x2A32),
+    /// Boot Mouse Input Report
+    ATT_CHAR_BOOT_MOUSE_IN_REPORT               = ATT_UUID_16(0x2A33),
+    /// Glucose Measurement Context
+    ATT_CHAR_GLUCOSE_MEAS_CTX                   = ATT_UUID_16(0x2A34),
+    /// Blood Pressure Measurement
+    ATT_CHAR_BLOOD_PRESSURE_MEAS                = ATT_UUID_16(0x2A35),
+    /// Intermediate Cuff Pressure
+    ATT_CHAR_INTERMEDIATE_CUFF_PRESSURE         = ATT_UUID_16(0x2A36),
+    /// Heart Rate Measurement
+    ATT_CHAR_HEART_RATE_MEAS                    = ATT_UUID_16(0x2A37),
+    /// Body Sensor Location
+    ATT_CHAR_BODY_SENSOR_LOCATION               = ATT_UUID_16(0x2A38),
+    /// Heart Rate Control Point
+    ATT_CHAR_HEART_RATE_CNTL_POINT              = ATT_UUID_16(0x2A39),
+    /// Alert Status
+    ATT_CHAR_ALERT_STATUS                       = ATT_UUID_16(0x2A3F),
+    /// Ringer Control Point
+    ATT_CHAR_RINGER_CNTL_POINT                  = ATT_UUID_16(0x2A40),
+    /// Ringer Setting
+    ATT_CHAR_RINGER_SETTING                     = ATT_UUID_16(0x2A41),
+    /// Alert Category ID Bit Mask
+    ATT_CHAR_ALERT_CAT_ID_BIT_MASK              = ATT_UUID_16(0x2A42),
+    /// Alert Category ID
+    ATT_CHAR_ALERT_CAT_ID                       = ATT_UUID_16(0x2A43),
+    /// Alert Notification Control Point
+    ATT_CHAR_ALERT_NTF_CTNL_PT                  = ATT_UUID_16(0x2A44),
+    /// Unread Alert Status
+    ATT_CHAR_UNREAD_ALERT_STATUS                = ATT_UUID_16(0x2A45),
+    /// New Alert
+    ATT_CHAR_NEW_ALERT                          = ATT_UUID_16(0x2A46),
+    /// Supported New Alert Category
+    ATT_CHAR_SUP_NEW_ALERT_CAT                  = ATT_UUID_16(0x2A47),
+    /// Supported Unread Alert Category
+    ATT_CHAR_SUP_UNREAD_ALERT_CAT               = ATT_UUID_16(0x2A48),
+    /// Blood Pressure Feature
+    ATT_CHAR_BLOOD_PRESSURE_FEATURE             = ATT_UUID_16(0x2A49),
+    /// HID Information
+    ATT_CHAR_HID_INFO                           = ATT_UUID_16(0x2A4A),
+    /// Report Map
+    ATT_CHAR_REPORT_MAP                         = ATT_UUID_16(0x2A4B),
+    /// HID Control Point
+    ATT_CHAR_HID_CTNL_PT                        = ATT_UUID_16(0x2A4C),
+    /// Report
+    ATT_CHAR_REPORT                             = ATT_UUID_16(0x2A4D),
+    /// Protocol Mode
+    ATT_CHAR_PROTOCOL_MODE                      = ATT_UUID_16(0x2A4E),
+    /// Scan Interval Window
+    ATT_CHAR_SCAN_INTV_WD                       = ATT_UUID_16(0x2A4F),
+    /// PnP ID
+    ATT_CHAR_PNP_ID                             = ATT_UUID_16(0x2A50),
+    /// Glucose Feature
+    ATT_CHAR_GLUCOSE_FEATURE                    = ATT_UUID_16(0x2A51),
+    /// Record access control point
+    ATT_CHAR_REC_ACCESS_CTRL_PT                 = ATT_UUID_16(0x2A52),
+    /// RSC Measurement
+    ATT_CHAR_RSC_MEAS                           = ATT_UUID_16(0x2A53),
+    /// RSC Feature
+    ATT_CHAR_RSC_FEAT                           = ATT_UUID_16(0x2A54),
+    /// SC Control Point
+    ATT_CHAR_SC_CNTL_PT                         = ATT_UUID_16(0x2A55),
+    /// CSC Measurement
+    ATT_CHAR_CSC_MEAS                           = ATT_UUID_16(0x2A5B),
+    /// CSC Feature
+    ATT_CHAR_CSC_FEAT                           = ATT_UUID_16(0x2A5C),
+    /// Sensor Location
+    ATT_CHAR_SENSOR_LOC                         = ATT_UUID_16(0x2A5D),
+    /// PLX Spot-Check Measurement
+    ATT_CHAR_PLX_SPOT_CHECK_MEASUREMENT_LOC     = ATT_UUID_16(0x2A5E),
+    /// PLX Continuous Measurement
+    ATT_CHAR_PLX_CONTINUOUS_MEASUREMENT_LOC     = ATT_UUID_16(0x2A5F),
+    /// PLX Features
+    ATT_CHAR_PLX_FEATURES_LOC                   = ATT_UUID_16(0x2A60),
+    /// CP Measurement
+    ATT_CHAR_CP_MEAS                            = ATT_UUID_16(0x2A63),
+    /// CP Vector
+    ATT_CHAR_CP_VECTOR                          = ATT_UUID_16(0x2A64),
+    /// CP Feature
+    ATT_CHAR_CP_FEAT                            = ATT_UUID_16(0x2A65),
+    /// CP Control Point
+    ATT_CHAR_CP_CNTL_PT                         = ATT_UUID_16(0x2A66),
+    /// Location and Speed
+    ATT_CHAR_LOC_SPEED                          = ATT_UUID_16(0x2A67),
+    /// Navigation
+    ATT_CHAR_NAVIGATION                         = ATT_UUID_16(0x2A68),
+    /// Position Quality
+    ATT_CHAR_POS_QUALITY                        = ATT_UUID_16(0x2A69),
+    /// LN Feature
+    ATT_CHAR_LN_FEAT                            = ATT_UUID_16(0x2A6A),
+    /// LN Control Point
+    ATT_CHAR_LN_CNTL_PT                         = ATT_UUID_16(0x2A6B),
+    /// Elevation
+    ATT_CHAR_ELEVATION                          = ATT_UUID_16(0x2A6C),
+    /// Pressure
+    ATT_CHAR_PRESSURE                           = ATT_UUID_16(0x2A6D),
+    /// Temperature
+    ATT_CHAR_TEMPERATURE                        = ATT_UUID_16(0x2A6E),
+    /// Humidity
+    ATT_CHAR_HUMIDITY                           = ATT_UUID_16(0x2A6F),
+    /// True Wind Speed
+    ATT_CHAR_TRUE_WIND_SPEED                    = ATT_UUID_16(0x2A70),
+    /// True Wind Direction
+    ATT_CHAR_TRUE_WIND_DIR                      = ATT_UUID_16(0x2A71),
+    /// Apparent Wind Speed
+    ATT_CHAR_APRNT_WIND_SPEED                   = ATT_UUID_16(0x2A72),
+    /// Apparent Wind Direction
+    ATT_CHAR_APRNT_WIND_DIRECTION               = ATT_UUID_16(0x2A73),
+    /// Gust Factor
+    ATT_CHAR_GUST_FACTOR                        = ATT_UUID_16(0x2A74),
+    /// Pollen Concentration
+    ATT_CHAR_POLLEN_CONC                        = ATT_UUID_16(0x2A75),
+    /// UV Index
+    ATT_CHAR_UV_INDEX                           = ATT_UUID_16(0x2A76),
+    /// Irradiance
+    ATT_CHAR_IRRADIANCE                         = ATT_UUID_16(0x2A77),
+    /// Rainfall
+    ATT_CHAR_RAINFALL                           = ATT_UUID_16(0x2A78),
+    /// Wind Chill
+    ATT_CHAR_WIND_CHILL                         = ATT_UUID_16(0x2A79),
+    /// Heat Index
+    ATT_CHAR_HEAT_INDEX                         = ATT_UUID_16(0x2A7A),
+    /// Dew Point
+    ATT_CHAR_DEW_POINT                          = ATT_UUID_16(0x2A7B),
+    /// Descriptor Value Changed
+    ATT_CHAR_DESCRIPTOR_VALUE_CHANGED           = ATT_UUID_16(0x2A7D),
+    /// Aerobic Heart Rate Lower Limit
+    ATT_CHAR_AEROBIC_HEART_RATE_LOWER_LIMIT     = ATT_UUID_16(0x2A7E),
+    /// Aerobic Threshold
+    ATT_CHAR_AEROBIC_THRESHOLD                  = ATT_UUID_16(0x2A7F),
+    /// Age
+    ATT_CHAR_AGE                                = ATT_UUID_16(0x2A80),
+    /// Anaerobic Heart Rate Lower Limit
+    ATT_CHAR_ANAEROBIC_HEART_RATE_LOWER_LIMIT   = ATT_UUID_16(0x2A81),
+    /// Anaerobic Heart Rate Upper Limit
+    ATT_CHAR_ANAEROBIC_HEART_RATE_UPPER_LIMIT   = ATT_UUID_16(0x2A82),
+    /// Anaerobic Threshold
+    ATT_CHAR_ANAEROBIC_THRESHOLD                = ATT_UUID_16(0x2A83),
+    /// Aerobic Heart Rate Upper Limit
+    ATT_CHAR_AEROBIC_HEART_RATE_UPPER_LIMIT     = ATT_UUID_16(0x2A84),
+    /// Date Of Birth
+    ATT_CHAR_DATE_OF_BIRTH                      = ATT_UUID_16(0x2A85),
+    /// Date Of Threshold Assessment
+    ATT_CHAR_DATE_OF_THRESHOLD_ASSESSMENT       = ATT_UUID_16(0x2A86),
+    /// Email Address
+    ATT_CHAR_EMAIL_ADDRESS                      = ATT_UUID_16(0x2A87),
+    /// Fat Burn Heart Rate Lower Limit
+    ATT_CHAR_FAT_BURN_HEART_RATE_LOWER_LIMIT    = ATT_UUID_16(0x2A88),
+    /// Fat Burn Heart Rate Upper Limit
+    ATT_CHAR_FAT_BURN_HEART_RATE_UPPER_LIMIT    = ATT_UUID_16(0x2A89),
+    /// First Name
+    ATT_CHAR_FIRST_NAME                         = ATT_UUID_16(0x2A8A),
+    /// Five Zone Heart Rate Limits
+    ATT_CHAR_FIVE_ZONE_HEART_RATE_LIMITS        = ATT_UUID_16(0x2A8B),
+    /// Gender
+    ATT_CHAR_GENDER                             = ATT_UUID_16(0x2A8C),
+    /// Max Heart Rate
+    ATT_CHAR_MAX_HEART_RATE                     = ATT_UUID_16(0x2A8D),
+    /// Height
+    ATT_CHAR_HEIGHT                             = ATT_UUID_16(0x2A8E),
+    /// Hip Circumference
+    ATT_CHAR_HIP_CIRCUMFERENCE                  = ATT_UUID_16(0x2A8F),
+    /// Last Name
+    ATT_CHAR_LAST_NAME                          = ATT_UUID_16(0x2A90),
+    /// Maximum Recommended Heart Rate
+    ATT_CHAR_MAXIMUM_RECOMMENDED_HEART_RATE     = ATT_UUID_16(0x2A91),
+    /// Resting Heart Rate
+    ATT_CHAR_RESTING_HEART_RATE                 = ATT_UUID_16(0x2A92),
+    /// Sport Type For Aerobic And Anaerobic Thresholds
+    ATT_CHAR_SPORT_TYPE_FOR_AEROBIC_AND_ANAEROBIC_THRESHOLDS = ATT_UUID_16(0x2A93),
+    /// Three Zone Heart Rate Limits
+    ATT_CHAR_THREE_ZONE_HEART_RATE_LIMITS       = ATT_UUID_16(0x2A94),
+    /// Two Zone Heart Rate Limit
+    ATT_CHAR_TWO_ZONE_HEART_RATE_LIMIT          = ATT_UUID_16(0x2A95),
+    /// Vo2 Max
+    ATT_CHAR_VO2_MAX                            = ATT_UUID_16(0x2A96),
+    /// Waist Circumference
+    ATT_CHAR_WAIST_CIRCUMFERENCE                = ATT_UUID_16(0x2A97),
+    /// Weight
+    ATT_CHAR_WEIGHT                             = ATT_UUID_16(0x2A98),
+    /// Database Change Increment
+    ATT_CHAR_DATABASE_CHANGE_INCREMENT          = ATT_UUID_16(0x2A99),
+    /// User Index
+    ATT_CHAR_USER_INDEX                         = ATT_UUID_16(0x2A9A),
+    /// Body Composition Feature
+    ATT_CHAR_BODY_COMPOSITION_FEATURE           = ATT_UUID_16(0x2A9B),
+    /// Body Composition Measurement
+    ATT_CHAR_BODY_COMPOSITION_MEASUREMENT       = ATT_UUID_16(0x2A9C),
+    /// Weight Measurement
+    ATT_CHAR_WEIGHT_MEASUREMENT                 = ATT_UUID_16(0x2A9D),
+    /// Weight Scale Feature
+    ATT_CHAR_WEIGHT_SCALE_FEATURE               = ATT_UUID_16(0x2A9E),
+    /// User Control Point
+    ATT_CHAR_USER_CONTROL_POINT                 = ATT_UUID_16(0x2A9F),
+    /// Flux Density - 2D
+    ATT_CHAR_MAGN_FLUX_2D                       = ATT_UUID_16(0x2AA0),
+    /// Magnetic Flux Density - 3D
+    ATT_CHAR_MAGN_FLUX_3D                       = ATT_UUID_16(0x2AA1),
+    /// Language string
+    ATT_CHAR_LANGUAGE                           = ATT_UUID_16(0x2AA2),
+    /// Barometric Pressure Trend
+    ATT_CHAR_BAR_PRES_TREND                     = ATT_UUID_16(0x2AA3),
+    /// Central Address Resolution Support
+    ATT_CHAR_CTL_ADDR_RESOL_SUPP                = ATT_UUID_16(0x2AA6),
+    /// CGM Measurement
+    ATT_CHAR_CGM_MEASUREMENT                    = ATT_UUID_16(0x2AA7),
+    /// CGM Features
+    ATT_CHAR_CGM_FEATURES                       = ATT_UUID_16(0x2AA8),
+    /// CGM Status
+    ATT_CHAR_CGM_STATUS                         = ATT_UUID_16(0x2AA9),
+    /// CGM Session Start
+    ATT_CHAR_CGM_SESSION_START                  = ATT_UUID_16(0x2AAA),
+    /// CGM Session Run
+    ATT_CHAR_CGM_SESSION_RUN                    = ATT_UUID_16(0x2AAB),
+    /// CGM Specific Ops Control Point
+    ATT_CHAR_CGM_SPECIFIC_OPS_CTRL_PT           = ATT_UUID_16(0x2AAC),
+    /// Resolvable Private Address only
+    ATT_CHAR_RSLV_PRIV_ADDR_ONLY                = ATT_UUID_16(0x2AC9),
+    /// Mesh Provisioning Data In
+    ATT_CHAR_MESH_PROV_DATA_IN                  = ATT_UUID_16(0x2ADB),
+    /// Mesh Provisioning Data Out
+    ATT_CHAR_MESH_PROV_DATA_OUT                 = ATT_UUID_16(0x2ADC),
+    /// Mesh Proxy Data In
+    ATT_CHAR_MESH_PROXY_DATA_IN                 = ATT_UUID_16(0x2ADD),
+    /// Mesh Proxy Data Out
+    ATT_CHAR_MESH_PROXY_DATA_OUT                = ATT_UUID_16(0x2ADE),
+};
+
+/// Format for Characteristic Presentation
+enum {
+    /// unsigned 1-bit: true or false
+    ATT_FORMAT_BOOL     = 0x01,
+    /// unsigned 2-bit integer
+    ATT_FORMAT_2BIT,
+    /// unsigned 4-bit integer
+    ATT_FORMAT_NIBBLE,
+    /// unsigned 8-bit integer
+    ATT_FORMAT_UINT8,
+    /// unsigned 12-bit integer
+    ATT_FORMAT_UINT12,
+    /// unsigned 16-bit integer
+    ATT_FORMAT_UINT16,
+    /// unsigned 24-bit integer
+    ATT_FORMAT_UINT24,
+    /// unsigned 32-bit integer
+    ATT_FORMAT_UINT32,
+    /// unsigned 48-bit integer
+    ATT_FORMAT_UINT48,
+    /// unsigned 64-bit integer
+    ATT_FORMAT_UINT64,
+    /// unsigned 128-bit integer
+    ATT_FORMAT_UINT128,
+    /// signed 8-bit integer
+    ATT_FORMAT_SINT8,
+    /// signed 12-bit integer
+    ATT_FORMAT_SINT12,
+    /// signed 16-bit integer
+    ATT_FORMAT_SINT16,
+    /// signed 24-bit integer
+    ATT_FORMAT_SINT24,
+    /// signed 32-bit integer
+    ATT_FORMAT_SINT32,
+    /// signed 48-bit integer
+    ATT_FORMAT_SINT48,
+    /// signed 64-bit integer
+    ATT_FORMAT_SINT64,
+    /// signed 128-bit integer
+    ATT_FORMAT_SINT128,
+    /// IEEE-754 32-bit floating point
+    ATT_FORMAT_FLOAT32,
+    /// IEEE-754 64-bit floating point
+    ATT_FORMAT_FLOAT64,
+    /// IEEE-11073 16-bit SFLOAT
+    ATT_FORMAT_SFLOAT,
+    /// IEEE-11073 32-bit FLOAT
+    ATT_FORMAT_FLOAT,
+    /// IEEE-20601 format
+    ATT_FORMAT_DUINT16,
+    /// UTF-8 string
+    ATT_FORMAT_UTF8S,
+    /// UTF-16 string
+    ATT_FORMAT_UTF16S,
+    /// Opaque structure
+    ATT_FORMAT_STRUCT,
+    /// Last format
+    ATT_FORMAT_LAST
+};
+
+
+/// Client Characteristic Configuration Codes
+enum att_ccc_val
+{
+    /// Stop notification/indication
+    ATT_CCC_STOP_NTFIND = 0x0000,
+    /// Start notification
+    ATT_CCC_START_NTF,
+    /// Start indication
+    ATT_CCC_START_IND
+};
+
+/*
+ * Type Definition
+ ****************************************************************************************
+ */
+
+/// Attribute length type
+typedef uint16_t att_size_t;
+
+
+/// UUID - 128-bit type
+struct att_uuid_128
+{
+    /// 128-bit UUID
+    uint8_t uuid[ATT_UUID_128_LEN];
+};
+
+/// UUID - 32-bit type
+struct att_uuid_32
+{
+    /// 32-bit UUID
+    uint8_t uuid[ATT_UUID_32_LEN];
+};
+
+
+
+/// Characteristic Value Descriptor
+struct att_char_desc
+{
+    /// properties
+    uint8_t prop;
+    /// attribute handle
+    uint8_t attr_hdl[ATT_HANDLE_LEN];
+    /// attribute type
+    uint8_t attr_type[ATT_UUID_16_LEN];
+};
+
+/// Characteristic Value Descriptor
+struct att_char128_desc
+{
+    /// properties
+    uint8_t prop;
+    /// attribute handle
+    uint8_t attr_hdl[ATT_HANDLE_LEN];
+    /// attribute type
+    uint8_t attr_type[ATT_UUID_128_LEN];
+};
+
+/// Service Value Descriptor - 16-bit
+typedef uint16_t att_svc_desc_t;
+
+/// include service entry element
+struct att_incl_desc
+{
+    /// start handle value of included service
+    uint16_t start_hdl;
+    /// end handle value of included service
+    uint16_t end_hdl;
+    /// attribute value UUID
+    uint16_t uuid;
+};
+
+/// include service entry element
+struct att_incl128_desc
+{
+    /// start handle value of included service
+    uint16_t start_hdl;
+    /// end handle value of included service
+    uint16_t end_hdl;
+};
+
+
+// -------------------------- PDU HANDLER Definition  --------------------------
+
+/// used to know if PDU handler has been found
+#define ATT_PDU_HANDLER_NOT_FOUND       (0xff)
+
+/// Format of a pdu handler function
+typedef int (*att_func_t)(uint8_t conidx, void *pdu);
+
+/// Element of a pdu handler table.
+struct att_pdu_handler
+{
+    /// PDU identifier of the message
+    uint8_t pdu_id;
+    /// Pointer to the handler function for the pdu above.
+    att_func_t handler;
+};
+
+
+// --------------------------- Database permissions -----------------------------
+
+/// Macro used to retrieve access permission rights
+#define PERM_GET(perm, access)\
+        (((perm) & (PERM_MASK_ ## access)) >> (PERM_POS_ ## access))
+
+/// Macro used to set a permission value
+#define PERM_SET(perm, access, value)\
+    perm = ((perm & ~(PERM_MASK_ ## access)) | ((value << (PERM_POS_ ## access)) & (PERM_MASK_ ## access)))
+
+/// Macro used to retrieve permission value from access and rights on attribute.
+#define PERM(access, right) \
+    (((PERM_RIGHT_ ## right) << (PERM_POS_ ## access)) & (PERM_MASK_ ## access))
+
+/// Macro used know if permission is set or not.
+#define PERM_IS_SET(perm, access, right) \
+    (((perm) & (((PERM_RIGHT_ ## right) << (PERM_POS_ ## access))) \
+                & (PERM_MASK_ ## access)) == PERM(access, right))
+
+/// Macro used to create permission value
+#define PERM_VAL(access, perm) \
+    ((((perm) << (PERM_POS_ ## access))) & (PERM_MASK_ ## access))
+
+
+/// Retrieve attribute security level from attribute right and service right
+#define ATT_GET_SEC_LVL(att_right, svc_right) \
+    co_max(((att_right) & PERM_RIGHT_AUTH), ((svc_right) & PERM_RIGHT_AUTH));
+
+/// Retrieve UUID LEN from UUID Length Permission
+#define ATT_UUID_LEN(uuid_len_perm) ((uuid_len_perm == 0) ? ATT_UUID_16_LEN : \
+        ((uuid_len_perm == 1) ? ATT_UUID_32_LEN  :                        \
+        ((uuid_len_perm == 2) ? ATT_UUID_128_LEN : 0)))
+
+/// Initialization of attribute element
+#define ATT_ELEMT_INIT                                   {{NULL}, false}
+
+/**
+ *   15   14   13   12   11   10    9    8    7    6    5    4    3    2    1    0
+ * +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
+ * |EXT | WS | I  | N  | WR | WC | RD | B  |    NP   |    IP   |   WP    |    RP   |
+ * +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
+ *
+ * Bit [0-1]  : Read Permission         (0 = NO_AUTH, 1 = UNAUTH, 2 = AUTH, 3 = SEC_CON)
+ * Bit [2-3]  : Write Permission        (0 = NO_AUTH, 1 = UNAUTH, 2 = AUTH, 3 = SEC_CON)
+ * Bit [4-5]  : Indication Permission   (0 = NO_AUTH, 1 = UNAUTH, 2 = AUTH, 3 = SEC_CON)
+ * Bit [6-7]  : Notification Permission (0 = NO_AUTH, 1 = UNAUTH, 2 = AUTH, 3 = SEC_CON)
+ *
+ * Bit [8]    : Extended properties present (only relevant for a characteristic value)
+ * Bit [9]    : Broadcast permission        (only relevant for a characteristic value)
+ * Bit [10]   : Write Command accepted
+ * Bit [11]   : Write Signed accepted
+ * Bit [12]   : Write Request accepted
+ * Bit [13]   : Encryption key Size must be 16 bytes
+ */
+enum attm_perm_mask
+{
+    /// retrieve all permission info
+    PERM_MASK_ALL           = 0x0000,
+    /// Read Permission Mask
+    PERM_MASK_RP            = 0x0003,
+    PERM_POS_RP             = 0,
+    /// Write Permission Mask
+    PERM_MASK_WP            = 0x000C,
+    PERM_POS_WP             = 2,
+    /// Indication Access Mask
+    PERM_MASK_IP            = 0x0030,
+    PERM_POS_IP             = 4,
+    /// Notification Access Mask
+    PERM_MASK_NP            = 0x00C0,
+    PERM_POS_NP             = 6,
+    /// Broadcast descriptor present
+    PERM_MASK_BROADCAST     = 0x0100,
+    PERM_POS_BROADCAST      = 8,
+    /// Read Access Mask
+    PERM_MASK_RD            = 0x0200,
+    PERM_POS_RD             = 9,
+    /// Write Command Enabled attribute Mask
+    PERM_MASK_WRITE_COMMAND = 0x0400,
+    PERM_POS_WRITE_COMMAND  = 10,
+    /// Write Request Enabled attribute Mask
+    PERM_MASK_WRITE_REQ     = 0x0800,
+    PERM_POS_WRITE_REQ      = 11,
+    /// Notification Access Mask
+    PERM_MASK_NTF           = 0x1000,
+    PERM_POS_NTF            = 12,
+    /// Indication Access Mask
+    PERM_MASK_IND           = 0x2000,
+    PERM_POS_IND            = 13,
+    /// Write Signed Enabled attribute Mask
+    PERM_MASK_WRITE_SIGNED  = 0x4000,
+    PERM_POS_WRITE_SIGNED   = 14,
+    /// Extended properties descriptor present
+    PERM_MASK_EXT           = 0x8000,
+    PERM_POS_EXT            = 15,
+
+    /// Properties
+    PERM_MASK_PROP          = 0xFF00,
+    PERM_POS_PROP           = 8,
+};
+
+/**
+ * Value permission bit field
+ *
+ *   15   14   13   12   11   10    9    8    7    6    5    4    3    2    1    0
+ * +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
+ * | RI |UUID_LEN |EKS |    MAX_LEN (RI = 1) / Value Offset  (RI = 0)              |
+ * +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
+ *
+ * Bit [0-11] : Maximum Attribute Length or Value Offset pointer
+ * Bit [12]   : Encryption key Size must be 16 bytes
+ * Bit [14-13]: UUID Length             (0 = 16 bits, 1 = 32 bits, 2 = 128 bits, 3 = RFU)
+ * Bit [15]   : Trigger Read Indication (0 = Value present in Database, 1 = Value not present in Database)
+ */
+enum attm_value_perm_mask
+{
+    /// Maximum Attribute Length
+    PERM_MASK_MAX_LEN     = 0x0FFF,
+    PERM_POS_MAX_LEN      = 0,
+    /// Attribute value Offset
+    PERM_MASK_VAL_OFFSET  = 0x0FFF,
+    PERM_POS_VAL_OFFSET   = 0,
+    /// Check Encryption key size Mask
+    PERM_MASK_EKS         = 0x1000,
+    PERM_POS_EKS          = 12,
+    /// UUID Length
+    PERM_MASK_UUID_LEN    = 0x6000,
+    PERM_POS_UUID_LEN     = 13,
+    /// Read trigger Indication
+    PERM_MASK_RI          = 0x8000,
+    PERM_POS_RI           = 15,
+};
+
+
+/**
+ * Service permissions
+ *
+ *    7    6    5    4    3    2    1    0
+ * +----+----+----+----+----+----+----+----+
+ * |SEC |UUID_LEN |DIS |  AUTH   |EKS | MI |
+ * +----+----+----+----+----+----+----+----+
+ *
+ * Bit [0]  : Task that manage service is multi-instantiated (Connection index is conveyed)
+ * Bit [1]  : Encryption key Size must be 16 bytes
+ * Bit [2-3]: Service Permission      (0 = NO_AUTH, 1 = UNAUTH, 2 = AUTH, 3 = Secure Connect)
+ * Bit [4]  : Disable the service
+ * Bit [5-6]: UUID Length             (0 = 16 bits, 1 = 32 bits, 2 = 128 bits, 3 = RFU)
+ * Bit [7]  : Secondary Service       (0 = Primary Service, 1 = Secondary Service)
+ */
+enum attm_svc_perm_mask
+{
+    /// Task that manage service is multi-instantiated
+    PERM_MASK_SVC_MI        = 0x01,
+    PERM_POS_SVC_MI         = 0,
+    /// Check Encryption key size for service Access
+    PERM_MASK_SVC_EKS       = 0x02,
+    PERM_POS_SVC_EKS        = 1,
+    /// Service Permission authentication
+    PERM_MASK_SVC_AUTH      = 0x0C,
+    PERM_POS_SVC_AUTH       = 2,
+    /// Disable the service
+    PERM_MASK_SVC_DIS       = 0x10,
+    PERM_POS_SVC_DIS        = 4,
+    /// Service UUID Length
+    PERM_MASK_SVC_UUID_LEN  = 0x60,
+    PERM_POS_SVC_UUID_LEN   = 5,
+    /// Service type Secondary
+    PERM_MASK_SVC_SECONDARY = 0x80,
+    PERM_POS_SVC_SECONDARY  = 7,
+};
+
+
+/// Attribute & Service access mode
+enum
+{
+    /// Disable access
+    PERM_RIGHT_DISABLE  = 0,
+    /// Enable access
+    PERM_RIGHT_ENABLE   = 1,
+};
+
+/// Attribute & Service access rights
+enum
+{
+    /// No Authentication
+    PERM_RIGHT_NO_AUTH  = 0,
+    /// Access Requires Unauthenticated link
+    PERM_RIGHT_UNAUTH   = 1,
+    /// Access Requires Authenticated link
+    PERM_RIGHT_AUTH     = 2,
+    /// Access Requires Secure Connection link
+    PERM_RIGHT_SEC_CON  = 3,
+};
+
+/// Attribute & Service UUID Length
+enum
+{
+    /// 16  bits UUID
+    PERM_UUID_16         = 0,
+    PERM_RIGHT_UUID_16   = 0,
+    /// 32  bits UUID
+    PERM_UUID_32         = 1,
+    PERM_RIGHT_UUID_32   = 1,
+    /// 128 bits UUID
+    PERM_UUID_128        = 2,
+    PERM_RIGHT_UUID_128  = 2,
+    /// Invalid
+    PERM_UUID_RFU        = 3,
+};
+
+/// execute flags
+enum
+{
+    /// Cancel All the Reliable Writes
+    ATT_CANCEL_ALL_PREPARED_WRITES = 0x00,
+    /// Write All the Reliable Writes
+    ATT_EXECUTE_ALL_PREPARED_WRITES
+};
+
+
+
+/// @} ATT
+#endif // ATT_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/co_bt.h b/platform/atm2/ATM22xx-x1x/include/ble/co_bt.h
new file mode 100644
index 0000000..716d185
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/co_bt.h
@@ -0,0 +1,63 @@
+/**
+ ****************************************************************************************
+ *
+ * @file co_bt.h
+ *
+ * @brief This file contains the common Bluetooth defines, enumerations and structures
+ *        definitions for use by all modules in RW stack.
+ *
+ * Copyright (C) RivieraWaves 2009-2015
+ *
+ *
+ ****************************************************************************************
+ */
+
+#ifndef CO_BT_H_
+#define CO_BT_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup COMMON Common SW Block
+ * @ingroup ROOT
+ * @brief The Common RW SW Block.
+ *
+ * The COMMON is the block with Bluetooth definitions and structures shared
+ * to all the protocol stack blocks. This also contain software wide error code
+ * definitions, mathematical functions, help functions, list and buffer definitions.
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+/**
+ ****************************************************************************************
+ * @addtogroup CO_BT Common Bluetooth defines
+ * @ingroup COMMON
+ * @brief Common Bluetooth definitions and structures.
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include <stdbool.h>       // standard boolean definitions
+#include <stddef.h>        // standard definitions
+#include <stdint.h>        // standard integer definitions
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+#include "co_bt_defines.h" // Bluetooth defines
+#include "co_lmp.h"        // Bluetooth LMP definitions
+#include "co_hci.h"        // Bluetooth HCI definitions
+#include "co_error.h"      // Bluetooth error codes definitions
+#include "co_dtm.h"        // Bluetooth DTM definitions
+
+/// @} CO_BT
+#endif // CO_BT_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/co_bt_defines.h b/platform/atm2/ATM22xx-x1x/include/ble/co_bt_defines.h
new file mode 100644
index 0000000..9000fa1
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/co_bt_defines.h
@@ -0,0 +1,3107 @@
+/**
+ ****************************************************************************************
+ *
+ * @file co_bt_defines.h
+ *
+ * @brief This file contains the common Bluetooth defines, enumerations and structures
+ *        definitions for use by all modules in RW stack.
+ *
+ * Copyright (C) RivieraWaves 2009-2016
+ * Copyright (C) Atmosic 2023
+ *
+ ****************************************************************************************
+ */
+
+#ifndef CO_BT_DEFINES_H_
+#define CO_BT_DEFINES_H_
+
+
+/**
+ ****************************************************************************************
+ * @addtogroup CO_BT_DEFINES Common Bluetooth defines
+ * @ingroup CO_BT
+ * @brief Common Bluetooth definitions and structures.
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+/**
+ * BD Address format (values in bytes)
+ * |      3B        |  1B |    2B    |
+ * |      LAP       | UAP |    NAP   |
+ */
+#define BD_ADDR_LEN         6
+#define BD_ADDR_LAP_POS     0
+#define BD_ADDR_LAP_LEN     3
+#define BD_ADDR_UAP_POS     BD_ADDR_LAP_LEN
+#define BD_ADDR_UAP_LEN     1
+#define BD_ADDR_NAP_POS     BD_ADDR_UAP_LEN
+#define BD_ADDR_NAP_LEN     2
+
+///Length of fields in Bluetooth messages, in number of bytes
+#define EVT_MASK_LEN        8
+#define DEV_CLASS_LEN       3
+#define ACO_LEN             12
+#define SRES_LEN            0x04
+#define ACCESS_ADDR_LEN     0x04
+#define LE_PASSKEY_LEN      0x04
+#define BD_NAME_SIZE        0xF8 // Was 0x20 for BLE HL
+#define ADV_DATA_LEN        0x1F
+#define EXT_ADV_DATA_MAX_LEN    229 // HCI:7.7.65.13
+#define PER_ADV_DATA_MAX_LEN    247 // 248 // HCI:7.7.65.16
+#define BLE_DATA_LEN        0x1B
+#define SCAN_RSP_DATA_LEN   0x1F
+#define CONNECT_REQ_DATA_LEN    0x16
+#define LE_CHNL_MAP_LEN     0x05
+#define CHNL_MAP_LEN        0x0A
+#define KEY_LEN             0x10
+#define PIN_CODE_MIN_LEN    0x01
+#define PIN_CODE_MAX_LEN    0x10
+#define PRIV_KEY_192_LEN    24
+#define PUB_KEY_192_LEN     48
+#define PRIV_KEY_256_LEN    32
+#define PUB_KEY_256_LEN     64
+#define CFM_LEN             0x10
+#define ENC_DATA_LEN        0x10
+#define RAND_VAL_LEN        0x10
+#define RAND_NB_LEN         0x08
+#define LE_FEATS_LEN        0x08
+#define SUPP_CMDS_LEN       0x40
+#define FEATS_LEN           0x08
+#define NAME_VECT_SIZE      14
+#define LMP_FEATS_LEN       0x08
+#define LE_STATES_LEN       0x08
+#define WHITE_LIST_LEN      0x0A
+#define LE_FREQ_LEN         0x28
+#define LE_DATA_FREQ_LEN    0x25
+#define CRC_INIT_LEN        0x03
+#define SESS_KEY_DIV_LEN    0x08
+#define INIT_VECT_LEN       0x04
+#define MIC_LEN             0x04
+#define IV_LEN              0x08
+#define SK_DIV_LEN          0x10
+
+// Session Key Diversifier Master or slave
+#define SKD_M_OFFSET        0x00
+#define SKD_S_OFFSET        0x08
+// Initialization Vector Master or slave
+#define IV_M_OFFSET         0x00
+#define IV_S_OFFSET         0x04
+
+// BT 4.2 - Secure Connections
+#define PUBLIC_KEY_P256_LEN 0x20
+#define DHKEY_CHECK_LEN     0x10
+
+#define DH_KEY_LEN          0x20
+
+// BT 5.0 - Slot Availability Masks
+
+#define SAM_SUBMAPS_LEN     12
+#define SAM_TYPE0_SUBMAP_LEN    14
+
+#define SAM_SLOT_NOT_AVAILABLE   0
+#define SAM_SLOT_TX_AVAILABLE    1
+#define SAM_SLOT_RX_AVAILABLE    2
+#define SAM_SLOT_TX_RX_AVAILABLE 3
+
+#define SAM_INDEX_MAX      3
+#define SAM_DISABLED       0xFF
+
+#define SAM_UPDATE_INVALIDATE_MAPS  0
+#define SAM_UPDATE_IMMEDIATE        1
+#define SAM_UPDATE_AT_SUBINTERVAL   2
+
+#define T_SAM_SM_MIN             2
+#define T_SAM_SM_MAX             56
+
+#define SAM_SLOTS_SUBMAPPED         0
+#define SAM_SLOTS_AVAILABLE         1
+#define SAM_SLOTS_UNAVAILABLE       2
+
+
+/// Maximum maskable event code
+#define EVT_MASK_CODE_MAX   EVT_MASK_LEN * 8
+
+/// Advertising and Data Channel Indices (chapter 6.B.1.4.1)
+#define DATA_CHANNEL_MIN    0
+#define DATA_CHANNEL_MAX    36
+#define DATA_CHANNEL_NB     37
+#define ADV_CHANNEL_37      37
+#define ADV_CHANNEL_38      38
+#define ADV_CHANNEL_39      39
+
+/// Minimum number of used channel in the map (chapter 6.B.4.5.8.1)
+#define DATA_CHANNEL_USED_NB_MIN    2
+
+/// Advertising interval (in 625us slot) (chapter 2.E.7.8.5)
+#define ADV_INTERVAL_MIN    0x0020 //(20 ms)
+#define ADV_INTERVAL_MAX    0x4000 //(10.24 sec)
+#define ADV_INTERVAL_DFT    0x0800 //(1.28 sec)
+
+/// Scanning interval (in 625us slot) (chapter 2.E.7.8.10)
+#define SCAN_INTERVAL_MIN   0x0004 //(2.5 ms)
+#define SCAN_INTERVAL_MAX   0x4000 //(10.24 sec)
+#define SCAN_INTERVAL_DFT   0x0010 //(10 ms)
+
+/// Scanning window (in 625us slot) (chapter 2.E.7.8.10)
+#define SCAN_WINDOW_MIN     0x0004 //(2.5 ms)
+#define SCAN_WINDOW_MAX     0x4000 //(10.24 sec)
+#define SCAN_WINDOW_DFT     0x0010 //(10 ms)
+
+/// Sync Timeout (in Time = N*10ms)
+#define SYNC_TIMEOUT_MIN    0x000A //(100 ms)
+#define SYNC_TIMEOUT_MAX    0x4000 //(163.84 s)
+
+/// Advertising SID valid Range
+#define SYNC_SID_MIN        0x00
+#define SYNC_SID_MAX        0x0F
+
+/// Periodic Adv Skip valid Range
+#define SYNC_SKIP_MIN       0x0000
+#define SYNC_SKIP_MAX       0x01F3
+
+/// Connection interval (N*1.250ms) (chapter 2.E.7.8.12)
+#define CON_INTERVAL_MIN_AUDIO 0x0002  //(2.5 msec)
+#define CON_INTERVAL_MIN    0x0006  //(7.5 msec)
+#define CON_INTERVAL_MAX    0x0C80  //(4 sec)
+/// Connection latency (N*cnx evt) (chapter 2.E.7.8.12)
+#define CON_LATENCY_MIN     0x0000
+#define CON_LATENCY_MAX     0x01F3  // (499)
+/// Supervision TO (N*10ms) (chapter 2.E.7.8.12)
+#define CON_SUP_TO_MIN      0x000A  //(100 msec)
+#define CON_SUP_TO_MAX      0x0C80  //(32 sec)
+
+/// Format of the Advertising packets
+#define ADV_ADDR_OFFSET     0
+#define ADV_ADDR_LEN        BD_ADDR_LEN
+#define ADV_DATA_OFFSET    (ADV_ADDR_OFFSET + ADV_ADDR_LEN)
+
+/// List of supported BLE Features LL:4.6
+enum ble_feature
+{
+    //byte 0
+    BLE_FEAT_ENC                       = (0),
+    BLE_FEAT_CON_PARAM_REQ_PROC        = (1),
+    BLE_FEAT_EXT_REJ_IND               = (2),
+    BLE_FEAT_SLAVE_INIT_FEAT_EXCHG     = (3),
+    BLE_FEAT_PING                      = (4),
+    BLE_FEAT_DATA_PKT_LEN_EXT          = (5),
+    BLE_FEAT_LL_PRIVACY                = (6),
+    BLE_FEAT_EXT_SCAN_FILT_POLICY      = (7),
+    //byte 1
+    BLE_FEAT_2M_PHY                    = (8),
+    BLE_FEAT_STABLE_MOD_IDX_TX         = (9),
+    BLE_FEAT_STABLE_MOD_IDX_RX         = (10),
+    BLE_FEAT_CODED_PHY                 = (11),
+    BLE_FEAT_EXT_ADV                   = (12),
+    BLE_FEAT_PER_ADV                   = (13),
+    BLE_CHAN_SEL_ALGO_2                = (14),
+    BLE_PWR_CLASS_1                    = (15),
+    //byte 2
+    MIN_NUM_USED_CHAN_PROC             = (16),
+    //byte 3
+    BLE_FEAT_PUB_KEY_VALID             = (27),
+};
+
+/// BLE supported states
+//byte 0
+#define BLE_NON_CON_ADV_STATE                       0x01
+#define BLE_DISC_ADV_STATE                          0x02
+#define BLE_CON_ADV_STATE                           0x04
+#define BLE_HDC_DIRECT_ADV_STATE                    0x08
+#define BLE_PASS_SCAN_STATE                         0x10
+#define BLE_ACTIV_SCAN_STATE                        0x20
+#define BLE_INIT_MASTER_STATE                       0x40
+#define BLE_CON_SLAVE_STATE                         0x80
+
+//byte 1
+#define BLE_NON_CON_ADV_PASS_SCAN_STATE             0x01
+#define BLE_DISC_ADV_PASS_SCAN_STATE                0x02
+#define BLE_CON_ADV_PASS_SCAN_STATE                 0x04
+#define BLE_HDC_DIRECT_ADV_PASS_SCAN_STATE          0x08
+#define BLE_NON_CON_ADV_ACTIV_SCAN_STATE            0x10
+#define BLE_DISC_ADV_ACTIV_SCAN_STATE               0x20
+#define BLE_CON_ADV_ACTIV_SCAN_STATE                0x40
+#define BLE_HDC_DIRECT_ADV_ACTIV_SCAN_STATE         0x80
+
+//byte 2
+#define BLE_NON_CON_ADV_INIT_STATE                  0x01
+#define BLE_DISC_ADV_INIT_STATE                     0x02
+#define BLE_NON_CON_ADV_MASTER_STATE                0x04
+#define BLE_DISC_ADV_MASTER_STATE                   0x08
+#define BLE_NON_CON_ADV_SLAVE_STATE                 0x10
+#define BLE_DISC_ADV_SLAVE_STATE                    0x20
+#define BLE_PASS_SCAN_INIT_STATE                    0x40
+#define BLE_ACTIV_SCAN_INIT_STATE                   0x80
+
+//byte 3
+#define BLE_PASS_SCAN_MASTER_STATE                  0x01
+#define BLE_ACTIV_SCAN_MASTER_STATE                 0x02
+#define BLE_PASS_SCAN_SLAVE_STATE                   0x04
+#define BLE_ACTIV_SCAN_SLAVE_STATE                  0x08
+#define BLE_INIT_MASTER_MASTER_STATE                0x10
+#define BLE_LDC_DIRECT_ADV_STATE                    0x20
+#define BLE_LDC_DIRECT_ADV_PASS_SCAN_STATE          0x40
+#define BLE_LDC_DIRECT_ADV_ACTIV_SCAN_STATE         0x80
+
+//byte 4
+#define BLE_CON_ADV_INIT_MASTER_SLAVE_STATE         0x01
+#define BLE_HDC_DIRECT_ADV_INIT_MASTER_SLAVE_STATE  0x02
+#define BLE_LDC_DIRECT_ADV_INIT_MASTER_SLAVE_STATE  0x04
+#define BLE_CON_ADV_MASTER_SLAVE_STATE              0x08
+#define BLE_HDC_DIRECT_ADV_MASTER_SLAVE_STATE       0x10
+#define BLE_LDC_DIRECT_ADV_MASTER_SLAVE_STATE       0x20
+#define BLE_CON_ADV_SLAVE_SLAVE_STATE               0x40
+#define BLE_HDC_DIRECT_ADV_SLAVE_SLAVE_STATE        0x80
+
+//byte 5
+#define BLE_LDC_DIRECT_ADV_SLAVE_SLAVE_STATE        0x01
+#define BLE_INIT_MASTER_SLAVE_STATE                 0x02
+
+/// BLE supported commands
+//byte0
+#define BLE_DISC_CMD                0x20
+//byte2
+#define BLE_RD_REM_VERS_CMD         0x80
+//byte5
+#define BLE_SET_EVT_MSK_CMD         0x40
+#define BLE_RESET_CMD               0x80
+//byte10
+#define BLE_RD_TX_PWR_CMD            0x04
+#define BLE_SET_CTRL_TO_HL_FCTRL_CMD 0x20
+#define BLE_HL_BUF_SIZE_CMD          0x40
+#define BLE_HL_NB_CMP_PKT_CMD        0x80
+//byte14
+#define BLE_RD_LOC_VERS_CMD         0x08
+#define BLE_RD_LOC_SUP_FEAT_CMD     0x20
+//byte15
+#define BLE_RD_BD_ADDR_CMD          0x02
+#define BLE_RD_RSSI_CMD             0x20
+//byte22
+#define BLE_SET_EVT_MSK_PG2_CMD     0x04
+//byte25
+#define BLE_LE_SET_EVT_MSK_CMD      0x01
+#define BLE_LE_RD_BUF_SIZE_CMD      0x02
+#define BLE_LE_RD_LOC_SUP_FEAT_CMD  0x04
+#define BLE_LE_SET_RAND_ADDR_CMD    0x10
+#define BLE_LE_SET_ADV_PARAM_CMD    0x20
+#define BLE_LE_RD_ADV_TX_PWR_CMD    0x40
+#define BLE_LE_SET_ADV_DATA_CMD     0x80
+//byte26
+#define BLE_LE_SET_SC_RSP_DATA_CMD  0x01
+#define BLE_LE_SET_ADV_EN_CMD       0x02
+#define BLE_LE_SET_SC_PARAM_CMD     0x04
+#define BLE_LE_SET_SC_EN_CMD        0x08
+#define BLE_LE_CREAT_CNX_CMD        0x10
+#define BLE_LE_CREAT_CNX_CNL_CMD    0x20
+#define BLE_LE_RD_WL_SIZE_CMD       0x40
+#define BLE_LE_CLEAR_WL_CMD         0x80
+//byte27
+#define BLE_LE_ADD_DEV_WL_CMD       0x01
+#define BLE_LE_REM_DEV_WL_CMD       0x02
+#define BLE_LE_CNX_UPDATE_CMD       0x04
+#define BLE_LE_SET_HL_CH_CLASS_CMD  0x08
+#define BLE_LE_RD_CH_MAP_CMD        0x10
+#define BLE_LE_RD_REM_FEAT_CMD      0x20
+#define BLE_LE_ENCRYPT_CMD          0x40
+#define BLE_LE_RAND_CMD             0x80
+//byte28
+#define BLE_LE_START_ENC_CMD        0x01
+#define BLE_LE_LTK_REQ_RPLY_CMD     0x02
+#define BLE_LE_LTK_REQ_NEG_RPLY_CMD 0x04
+#define BLE_LE_RD_SUPP_STATES_CMD   0x08
+#define BLE_LE_RX_TEST_CMD          0x10
+#define BLE_LE_TX_TEST_CMD          0x20
+#define BLE_LE_STOP_TEST_CMD        0x40
+
+//byte32
+#define BLE_RD_AUTH_PAYL_TO_CMD     0x10
+#define BLE_WR_AUTH_PAYL_TO_CMD     0x20
+
+
+//byte33
+#define BLE_LE_REM_CON_PARA_REQ_RPLY_CMD        0x10
+#define BLE_LE_REM_CON_PARA_REQ_NEG_RPLY_CMD    0x20
+#define BLE_LE_SET_DATA_LEN_CMD                 0x40
+#define BLE_LE_RD_SUGGTED_DFT_DATA_LEN_CMD      0x80
+
+//byte34
+#define BLE_LE_WR_SUGGTED_DFT_DATA_LEN_CMD      0x01
+#define BLE_LE_RD_LOC_P256_PUB_KEY_CMD          0x02
+#define BLE_LE_GEN_DH_KEY_CMD                   0x04
+#define BLE_LE_ADD_DEV_TO_RESOLV_LIST_CMD       0x08
+#define BLE_LE_REM_DEV_FROM_RESOLV_LIST_CMD     0x10
+#define BLE_LE_CLEAR_RESOLV_LIST_CMD            0x20
+#define BLE_LE_RD_RESOLV_LIST_SIZE_CMD          0x40
+#define BLE_LE_RD_PEER_RESOLV_ADDR_CMD          0x80
+
+//byte35
+#define BLE_LE_RD_LOCAL_RESOLV_ADDR_CMD         0x01
+#define BLE_LE_SET_ADDR_RESOL_CMD               0x02
+#define BLE_LE_SET_RESOLV_PRIV_ADDR_TO_CMD      0x04
+#define BLE_LE_RD_MAX_DATA_LEN_CMD              0x08
+#define BLE_LE_RD_PHY_CMD                       0x10
+#define BLE_LE_SET_DFT_PHY_CMD                  0x20
+#define BLE_LE_SET_PHY_CMD                      0x40
+#define BLE_LE_ENH_RX_TEST_CMD                  0x80
+//byte36
+#define BLE_LE_ENH_TX_TEST_CMD                  0x01
+#define BLE_LE_SET_ADV_SET_RAND_ADDR_CMD        0x02
+#define BLE_LE_SET_EXT_ADV_PARAM_CMD            0x04
+#define BLE_LE_SET_EXT_ADV_DATA_CMD             0x08
+#define BLE_LE_SET_EXT_SCAN_RSP_DATA_CMD        0x10
+#define BLE_LE_SET_EXT_ADV_EN_CMD               0x20
+#define BLE_LE_RD_MAX_ADV_DATA_LEN_CMD          0x40
+#define BLE_LE_RD_NB_SUPP_ADV_SETS_CMD          0x80
+//byte37
+#define BLE_LE_RMV_ADV_SET_CMD                  0x01
+#define BLE_LE_CLEAR_ADV_SETS_CMD               0x02
+#define BLE_LE_SET_PER_ADV_PARAM_CMD            0x04
+#define BLE_LE_SET_PER_ADV_DATA_CMD             0x08
+#define BLE_LE_SET_PER_ADV_EN_CMD               0x10
+#define BLE_LE_SET_EXT_SCAN_PARAM_CMD           0x20
+#define BLE_LE_SET_EXT_SCAN_EN_CMD              0x40
+#define BLE_LE_EXT_CREATE_CON_CMD               0x80
+//byte38
+#define BLE_LE_PER_ADV_CREATE_SYNC_CMD          0x01
+#define BLE_LE_PER_ADV_CREATE_SYNC_CANCEL_CMD   0x02
+#define BLE_LE_PER_ADV_TERM_SYNC_CMD            0x04
+#define BLE_LE_ADD_DEV_TO_PER_ADV_LIST_CMD      0x08
+#define BLE_LE_RMV_DEV_FROM_PER_ADV_LIST_CMD    0x10
+#define BLE_LE_CLEAR_PER_ADV_LIST_CMD           0x20
+#define BLE_LE_RD_PER_ADV_LIST_SIZE_CMD         0x40
+#define BLE_LE_RD_TX_PWR_CMD                    0x80
+//byte39
+#define BLE_LE_RD_RF_PATH_COMP_CMD              0x01
+#define BLE_LE_WR_RF_PATH_COMP_CMD              0x02
+#define BLE_LE_SET_PRIV_MODE_CMD                0x04
+
+// Inquiry Length HCI:7.1.1
+#define INQ_LEN_MIN      0x01
+#define INQ_LEN_MAX      0x30
+
+// Inquiry Length HCI:7.1.3
+#define INQ_MIN_PER_LEN_MIN    0x0002
+#define INQ_MIN_PER_LEN_MAX    0xFFFE
+#define INQ_MAX_PER_LEN_MIN    0x0003
+#define INQ_MAX_PER_LEN_MAX    0xFFFF
+
+// IAC support
+#define NB_IAC_MIN     0x01
+#define NB_IAC_MAX     0x40
+
+/// Most significant bit of the Bluetooth clock (in 312.5us half-slots)
+#define BT_CLOCK_MSB        (1L << 27)
+
+/// Logical Transport Addresses  BB:4.2
+#define LT_ADDR_BCST            0x00
+#define LT_ADDR_MIN             0x01
+#define LT_ADDR_MAX             0x07
+
+/// Link type             HCI:7.7.3
+#define SCO_TYPE                0
+#define ACL_TYPE                1
+#define ESCO_TYPE               2
+#define UNKNOWN_TYPE            3       // Used in LM
+#define LE_TYPE                 4
+
+
+/// Allow Role Switch     HCI:4.6.8
+#define MASTER_ROLE             0
+#define SLAVE_ROLE              1
+#define UNKNOWN_ROLE            0xFF   //Used in LC to init the links role
+
+/// Link policy HCI:4.6.9 and HCI:4.6.10
+#define POLICY_SWITCH           0x0001
+#define POLICY_HOLD             0x0002
+#define POLICY_SNIFF            0x0004
+#define POLICY_PARK             0x0008
+
+/// Allow Role Switch     HCI:4.5.5
+#define ROLE_SWITCH_NOT_ALLOWED 0
+#define ROLE_SWITCH_ALLOWED     1
+
+/// AcceptConnection Role     HCI:4.5.8
+#define ACCEPT_SWITCH_TO_MASTER 0
+#define ACCEPT_REMAIN_SLAVE     1
+
+/// Packet Type Flags     HCI:7.1.14
+#define PACKET_TYPE_EDR_MSK         0x330E
+#define PACKET_TYPE_GFSK_MSK        0xCCF8
+#define PACKET_TYPE_NO_2_DH1_FLAG   0x0002
+#define PACKET_TYPE_NO_3_DH1_FLAG   0x0004
+#define PACKET_TYPE_DM1_FLAG        0x0008
+#define PACKET_TYPE_DH1_FLAG        0x0010
+#define PACKET_TYPE_HV1_FLAG        0x0020
+#define PACKET_TYPE_HV2_FLAG        0x0040
+#define PACKET_TYPE_HV3_FLAG        0x0080
+#define PACKET_TYPE_NO_2_DH3_FLAG   0x0100
+#define PACKET_TYPE_NO_3_DH3_FLAG   0x0200
+#define PACKET_TYPE_DM3_FLAG        0x0400
+#define PACKET_TYPE_DH3_FLAG        0x0800
+#define PACKET_TYPE_NO_2_DH5_FLAG   0x1000
+#define PACKET_TYPE_NO_3_DH5_FLAG   0x2000
+#define PACKET_TYPE_DM5_FLAG        0x4000
+#define PACKET_TYPE_DH5_FLAG        0x8000
+
+/// Synchronous Packet Types     HCI:7.1.14
+#define SYNC_PACKET_TYPE_HV1_FLAG       0x0001
+#define SYNC_PACKET_TYPE_HV2_FLAG       0x0002
+#define SYNC_PACKET_TYPE_HV3_FLAG       0x0004
+#define SYNC_PACKET_TYPE_EV3_FLAG       0x0008
+#define SYNC_PACKET_TYPE_EV4_FLAG       0x0010
+#define SYNC_PACKET_TYPE_EV5_FLAG       0x0020
+
+#define SYNC_PACKET_TYPE_NO_EV3_2_FLAG  0x0040
+#define SYNC_PACKET_TYPE_NO_EV3_3_FLAG  0x0080
+#define SYNC_PACKET_TYPE_NO_EV5_2_FLAG  0x0100
+#define SYNC_PACKET_TYPE_NO_EV5_3_FLAG  0x0200
+
+#define SYNC_PACKET_TYPE_EV3_2_FLAG     0x0040
+#define SYNC_PACKET_TYPE_EV3_3_FLAG     0x0080
+#define SYNC_PACKET_TYPE_EV5_2_FLAG     0x0100
+#define SYNC_PACKET_TYPE_EV5_3_FLAG     0x0200
+
+/// RWBT 1.2
+#define SYNC_EV3_PACKET_SIZE         30
+#define SYNC_EV4_PACKET_SIZE        120
+#define SYNC_EV5_PACKET_SIZE        180
+
+/// Packet Boundary Flag   HCI:5.4.2
+#define PBF_1ST_NF_HL_FRAG          0x00    // Non-flushable packets
+#define PBF_CONT_HL_FRAG            0x01
+#define PBF_1ST_HL_FRAG             0x02
+#define PBF_CMP_PDU                 0x03
+#define PBF_MASK                    0x03
+
+/// Broadcast Flag   HCI:5.4.2
+#define BCF_P2P                     0x00
+#define BCF_ACTIVE_SLV_BCST         0x01
+#define BCF_PARK_SLV_BCST           0x02
+#define BCF_MASK                    0x03
+
+/// Synchronous Packet Status Flag   HCI:5.4.3
+#define CORRECTLY_RX_FLAG       0x00
+#define POSSIBLY_INVALID_FLAG   0x01
+#define NO_RX_DATA_FLAG         0x02
+#define PARTIALLY_LOST_FLAG     0x03
+
+/// Park mode defines LMP:3.17
+#define MACCESS_MSK             0x0F
+#define ACCSCHEM_MSK            0xF0
+
+/// Support 3 feature pages
+#define FEATURE_PAGE_MAX   3
+
+#define FEATURE_PAGE_0     0
+#define FEATURE_PAGE_1     1
+#define FEATURE_PAGE_2     2
+
+/// Feature mask definition LMP:3.3
+#define B0_3_SLOT_POS               0
+#define B0_3_SLOT_MSK               0x01
+#define B0_5_SLOT_POS               1
+#define B0_5_SLOT_MSK               0x02
+#define B0_ENC_POS                  2
+#define B0_ENC_MSK                  0x04
+#define B0_SLOT_OFF_POS             3
+#define B0_SLOT_OFF_MSK             0x08
+#define B0_TIMING_ACCU_POS          4
+#define B0_TIMING_ACCU_MSK          0x10
+#define B0_ROLE_SWITCH_POS          5
+#define B0_ROLE_SWITCH_MSK          0x20
+#define B0_HOLD_MODE_POS            6
+#define B0_HOLD_MODE_MSK            0x40
+#define B0_SNIFF_MODE_POS           7
+#define B0_SNIFF_MODE_MSK           0x80
+
+#define B1_PARK_POS                 0
+#define B1_PARK_MSK                 0x01
+#define B1_RSSI_POS                 1
+#define B1_RSSI_MSK                 0x02
+#define B1_CQDDR_POS                2
+#define B1_CQDDR_MSK                0x04
+#define B1_SCO_POS                  3
+#define B1_SCO_MSK                  0x08
+#define B1_HV2_POS                  4
+#define B1_HV2_MSK                  0x10
+#define B1_HV3_POS                  5
+#define B1_HV3_MSK                  0x20
+#define B1_MULAW_POS                6
+#define B1_MULAW_MSK                0x40
+#define B1_ALAW_POS                 7
+#define B1_ALAW_MSK                 0x80
+
+#define B2_CVSD_POS                 0
+#define B2_CVSD_MSK                 0x01
+#define B2_PAGING_PAR_NEGO_POS      1
+#define B2_PAGING_PAR_NEGO_MSK      0x02
+#define B2_PWR_CTRL_POS             2
+#define B2_PWR_CTRL_MSK             0x04
+#define B2_TRANSPARENT_SCO_POS      3
+#define B2_TRANSPARENT_SCO_MSK      0x08
+#define B2_FLOW_CTRL_LAG_POS        4
+#define B2_FLOW_CTRL_LAG_MSK        0x70
+#define B2_BCAST_ENC_POS            7
+#define B2_BCAST_ENC_MSK            0x80
+
+#define B3_EDR_2MBPS_ACL_POS        1
+#define B3_EDR_2MBPS_ACL_MSK        0x02
+#define B3_EDR_3MBPS_ACL_POS        2
+#define B3_EDR_3MBPS_ACL_MSK        0x04
+#define B3_ENH_INQSCAN_POS          3
+#define B3_ENH_INQSCAN_MSK          0x08
+#define B3_INT_INQSCAN_POS          4
+#define B3_INT_INQSCAN_MSK          0x10
+#define B3_INT_PAGESCAN_POS         5
+#define B3_INT_PAGESCAN_MSK         0x20
+#define B3_RSSI_INQ_RES_POS         6
+#define B3_RSSI_INQ_RES_MSK         0x40
+#define B3_ESCO_EV3_POS             7
+#define B3_ESCO_EV3_MSK             0x80
+
+#define B4_EV4_PKT_POS              0
+#define B4_EV4_PKT_MSK              0x01
+#define B4_EV5_PKT_POS              1
+#define B4_EV5_PKT_MSK              0x02
+#define B4_AFH_CAP_SLV_POS          3
+#define B4_AFH_CAP_SLV_MSK          0x08
+#define B4_AFH_CLASS_SLV_POS        4
+#define B4_AFH_CLASS_SLV_MSK        0x10
+#define B4_BR_EDR_NOT_SUPP_POS      5
+#define B4_BR_EDR_NOT_SUPP_MSK      0x20
+#define B4_LE_SUPP_POS              6
+#define B4_LE_SUPP_MSK              0x40
+#define B4_3_SLOT_EDR_ACL_POS       7
+#define B4_3_SLOT_EDR_ACL_MSK       0x80
+
+#define B5_5_SLOT_EDR_ACL_POS       0
+#define B5_5_SLOT_EDR_ACL_MSK       0x01
+#define B5_SSR_POS                  1
+#define B5_SSR_MSK                  0x02
+#define B5_PAUSE_ENC_POS            2
+#define B5_PAUSE_ENC_MSK            0x04
+#define B5_AFH_CAP_MST_POS          3
+#define B5_AFH_CAP_MST_MSK          0x08
+#define B5_AFH_CLASS_MST_POS        4
+#define B5_AFH_CLASS_MST_MSK        0x10
+#define B5_EDR_ESCO_2MBPS_POS       5
+#define B5_EDR_ESCO_2MBPS_MSK       0x20
+#define B5_EDR_ESCO_3MBPS_POS       6
+#define B5_EDR_ESCO_3MBPS_MSK       0x40
+#define B5_3_SLOT_EDR_ESCO_POS      7
+#define B5_3_SLOT_EDR_ESCO_MSK      0x80
+
+#define B6_EIR_POS                  0
+#define B6_EIR_MSK                  0x01
+#define B6_SIM_LE_BREDR_DEV_CAP_POS 1
+#define B6_SIM_LE_BREDR_DEV_CAP_MSK 0x02
+#define B6_SSP_POS                  3
+#define B6_SSP_MSK                  0x08
+#define B6_ENCAPS_PDU_POS           4
+#define B6_ENCAPS_PDU_MSK           0x10
+#define B6_ERR_DATA_REP_POS         5
+#define B6_ERR_DATA_REP_MSK         0x20
+#define B6_NONFLUSH_PBF_POS         6
+#define B6_NONFLUSH_PBF_MSK         0x40
+
+#define B7_LST_CHANGE_EVT_POS       0
+#define B7_LST_CHANGE_EVT_MSK       0x01
+#define B7_INQRES_TXPOW_POS         1
+#define B7_INQRES_TXPOW_MSK         0x02
+#define B7_ENH_PWR_CTRL_POS         2
+#define B7_ENH_PWR_CTRL_MSK         0x04
+#define B7_EXT_FEATS_POS            7
+#define B7_EXT_FEATS_MSK            0x80
+
+/// Extended feature mask definition page 1 LMP:3.3
+#define B0_HOST_SSP_POS             0
+#define B0_HOST_SSP_MSK             0x01
+#define B0_HOST_LE_POS              1
+#define B0_HOST_LE_MSK              0x02
+#define B0_HOST_LE_BR_EDR_POS       2
+#define B0_HOST_LE_BR_EDR_MSK       0x04
+#define B0_HOST_SECURE_CON_POS      3
+#define B0_HOST_SECURE_CON_MSK      0x08
+
+/// Extended feature mask definition page 2 LMP:3.3
+#define B0_CSB_MASTER_POS           0
+#define B0_CSB_MASTER_MSK           0x01
+#define B0_CSB_SLAVE_POS            1
+#define B0_CSB_SLAVE_MSK            0x02
+#define B0_SYNC_TRAIN_POS           2
+#define B0_SYNC_TRAIN_MSK           0x04
+#define B0_SYNC_SCAN_POS            3
+#define B0_SYNC_SCAN_MSK            0x08
+#define B0_INQ_RES_NOTIF_EVT_POS    4
+#define B0_INQ_RES_NOTIF_EVT_MSK    0x10
+#define B0_GEN_INTERL_SCAN_POS      5
+#define B0_GEN_INTERL_SCAN_MSK      0x20
+#define B0_COARSE_CLK_ADJ_POS       6
+#define B0_COARSE_CLK_ADJ_MSK       0x40
+
+#define B1_SEC_CON_CTRL_POS         0
+#define B1_SEC_CON_CTRL_MSK         0x01
+#define B1_PING_POS                 1
+#define B1_PING_MSK                 0x02
+#define B1_SAM_POS                  2
+#define B1_SAM_MSK                  0x04
+#define B1_TRAIN_NUDGING_POS        3
+#define B1_TRAIN_NUDGING_MSK        0x08
+
+/// Features definitions
+#define FEAT_3_SLOT_BIT_POS           0
+#define FEAT_5_SLOT_BIT_POS           1
+#define FEAT_ENC_BIT_POS              2
+#define FEAT_SLOT_OFFSET_BIT_POS      3
+#define FEAT_TIMING_ACC_BIT_POS       4
+#define FEAT_SWITCH_BIT_POS           5
+#define FEAT_HOLD_BIT_POS             6
+#define FEAT_SNIFF_BIT_POS            7
+
+#define FEAT_PARK_BIT_POS             8
+#define FEAT_RSSI_BIT_POS             9
+#define FEAT_QUALITY_BIT_POS          10
+#define FEAT_SCO_BIT_POS              11
+#define FEAT_HV2_BIT_POS              12
+#define FEAT_HV3_BIT_POS              13
+#define FEAT_ULAW_BIT_POS             14
+#define FEAT_ALAW_BIT_POS             15
+
+#define FEAT_CVSD_BIT_POS             16
+#define FEAT_PAGING_BIT_POS           17
+#define FEAT_POWER_BIT_POS            18
+#define FEAT_TRANSP_SCO_BIT_POS       19
+#define FEAT_BCAST_ENCRYPT_BIT_POS    23
+
+#define FEAT_EDR_2MB_BIT_POS          25
+#define FEAT_EDR_3MB_BIT_POS          26
+#define FEAT_ENH_INQSCAN_BIT_POS      27
+#define FEAT_INT_INQSCAN_BIT_POS      28
+#define FEAT_INT_PAGESCAN_BIT_POS     29
+#define FEAT_RSSI_INQRES_BIT_POS      30
+#define FEAT_EV3_BIT_POS              31
+
+#define FEAT_EV4_BIT_POS              32
+#define FEAT_EV5_BIT_POS              33
+#define FEAT_AFH_CAPABLE_S_BIT_POS    35
+#define FEAT_AFH_CLASS_S_BIT_POS      36
+#define FEAT_BR_EDR_NO_SUPP_BIT_POS   37
+#define FEAT_LE_BIT_POS               38
+#define FEAT_3_SLOT_EDR_BIT_POS       39
+#define FEAT_5_SLOT_EDR_BIT_POS       40
+#define FEAT_SNIFF_SUBRAT_BIT_POS     41
+#define FEAT_PAUSE_ENCRYPT_BIT_POS    42
+#define FEAT_AFH_CAPABLE_M_BIT_POS    43
+#define FEAT_AFH_CLASS_M_BIT_POS      44
+#define FEAT_EDR_ESCO_2MB_BIT_POS     45
+#define FEAT_EDR_ESCO_3MB_BIT_POS     46
+#define FEAT_3_SLOT_EDR_ESCO_BIT_POS  47
+#define FEAT_EIR_BIT_POS              48
+#define FEAT_LE_BR_EDR_BIT_POS        49
+#define FEAT_SSP_BIT_POS              51
+#define FEAT_ENCAP_PDU_BIT_POS        52
+#define FEAT_ERRO_DATA_REP_BIT_POS    53
+#define FEAT_NFLUSH_PBF_BIT_POS       54
+#define FEAT_LSTO_CHG_EVT_BIT_POS     56
+#define FEAT_INQ_TXPWR_BIT_POS        57
+#define FEAT_EPC_BIT_POS              58
+#define FEAT_EXT_FEATS_BIT_POS        63
+#define FEAT_SSP_HOST_BIT_POS         64
+#define FEAT_LE_HOST_BIT_POS          65
+#define FEAT_LE_BR_EDR_HOST_BIT_POS   66
+#define FEAT_SEC_CON_HOST_BIT_POS     67
+
+#define FEAT_CSB_MASTER_BIT_POS        128
+#define FEAT_CSB_SLAVE_BIT_POS         129
+#define FEAT_SYNC_TRAIN_BIT_POS        130
+#define FEAT_SYNC_SCAN_BIT_POS         131
+#define FEAT_INQ_RES_NOTIF_EVT_BIT_POS 132
+#define FEAT_GEN_INTERL_SCAN_BIT_POS   133
+#define FEAT_COARSE_CLK_ADJ_BIT_POS    134
+#define FEAT_SEC_CON_CTRL_BIT_POS      136
+#define FEAT_PING_BIT_POS              137
+#define FEAT_SAM_BIT_POS               138
+#define FEAT_TRAIN_NUDGING_BIT_POS     139
+
+/// Maximum number of feature bits per page (8 bytes x 8 bits)
+#define MAX_FEAT_BITS_PER_PAGE         64
+
+/// Poll interval defines LMP:5.2
+#define POLL_INTERVAL_MIN       0x0006
+#define POLL_INTERVAL_DFT       0x0028
+#define POLL_INTERVAL_MAX       0x1000
+
+/// Power Adjustment Request LMP:5.2
+#define PWR_ADJ_REQ_DEC_1_STEP  0x00
+#define PWR_ADJ_REQ_INC_1_STEP  0x01
+#define PWR_ADJ_REQ_INC_MAX     0x02
+
+/// Power Adjustment Response LMP:5.2
+#define PWR_ADJ_RES_GFSK_POS    0
+#define PWR_ADJ_RES_GFSK_MASK   0x03
+#define PWR_ADJ_RES_DQPSK_POS   2
+#define PWR_ADJ_RES_DQPSK_MASK  0x0C
+#define PWR_ADJ_RES_8DPSK_POS   4
+#define PWR_ADJ_RES_8DPSK_MASK  0x30
+
+#define PWR_ADJ_RES_NOT_SUPP    0x00
+#define PWR_ADJ_RES_CHG_1_STEP  0x01
+#define PWR_ADJ_RES_MAX         0x02
+#define PWR_ADJ_RES_MIN         0x03
+
+/// Nb of Broadcast retransmissions defines
+#define NB_BROADCAST_DFT        0x01
+
+/// Nb of Broadcast CLK_ADJ PDU   Baseband:4.1.14.1
+#define NB_BROADCAST_CLK_ADJ    0x06
+
+/// Min PCA clk_adj_instant (in slots) LMP:4.1.14.1
+#define PCA_INSTANT_MIN         12
+
+/// Piconet Clock Adjustment clk_adj_mode LMP:4.1.14.1
+#define CLK_ADJ_BEFORE_INSTANT   0
+#define CLK_ADJ_AFTER_INSTANT    1
+
+
+/// Different packet types BaseBand:6.7
+/* Packet and buffer sizes. These sizes do not include payload header (except for FHS
+ * packet where there is no payload header) since payload header is written or read by
+ * the RWBT in a different control structure part (TX/RXPHDR)                          */
+#define FHS_PACKET_SIZE         18
+#define DM1_PACKET_SIZE         17
+#define DH1_PACKET_SIZE         27
+#define DH1_2_PACKET_SIZE       54
+#define DH1_3_PACKET_SIZE       83
+#define DV_ACL_PACKET_SIZE      9
+#define DM3_PACKET_SIZE         121
+#define DH3_PACKET_SIZE         183
+#define DH3_2_PACKET_SIZE       367
+#define DH3_3_PACKET_SIZE       552
+#define DM5_PACKET_SIZE         224
+#define DH5_PACKET_SIZE         339
+#define DH5_2_PACKET_SIZE       679
+#define DH5_3_PACKET_SIZE       1021
+#define AUX1_PACKET_SIZE        29
+
+#define HV1_PACKET_SIZE         10
+#define HV2_PACKET_SIZE         20
+#define HV3_PACKET_SIZE         30
+#define EV3_PACKET_SIZE         30
+#define EV3_2_PACKET_SIZE       60
+#define EV3_3_PACKET_SIZE       90
+#define EV4_PACKET_SIZE        120
+#define EV5_PACKET_SIZE        180
+#define EV5_2_PACKET_SIZE      360
+#define EV5_3_PACKET_SIZE      540
+
+/// SCO Packet coding LMP:5.2
+#define SCO_PACKET_HV1          0x00
+#define SCO_PACKET_HV2          0x01
+#define SCO_PACKET_HV3          0x02
+
+/// eSCO Packet coding LMP:5.2
+#define ESCO_PACKET_NULL        0x00
+#define ESCO_PACKET_EV3         0x07
+#define ESCO_PACKET_EV4         0x0C
+#define ESCO_PACKET_EV5         0x0D
+#define ESCO_PACKET_EV3_2       0x26
+#define ESCO_PACKET_EV3_3       0x37
+#define ESCO_PACKET_EV5_2       0x2C
+#define ESCO_PACKET_EV5_3       0x3D
+
+/// Max number of HV packet BaseBand:4.4.2.1
+#define MAX_NB_HV1              1
+#define MAX_NB_HV2              2
+#define MAX_NB_HV3              3
+
+/// Tsco (ScoInterval) BaseBand:4.4.2.1
+#define TSCO_HV1                2
+#define TSCO_HV2                4
+#define TSCO_HV3                6
+
+/* Inquiry train repetition length , Baseband :Table 10.4
+ *      - 256 repetitions if no SCO
+ *      - 512 repetitions if 1 SCO
+ *      - 768 repetitions if 2 SCO  */
+#define INQ_TRAIN_LENGTH_NO_SCO 256
+#define INQ_TRAIN_LENGTH_1_SCO  512
+#define INQ_TRAIN_LENGTH_2_SCO  768
+
+/* Counter for train length, Npage (N*16 slots) depends on the slave page scan mode and
+ * the number of active SCO:
+ *    | SR mode |  no SCO  |  one SCO  |  two SCO |
+ *    |   R0    |   >=1    |    >=2    |    >=3   |
+ *    |   R1    |   >=128  |    >=256  |    >=384 |
+ *    |   R2    |   >=256  |    >=512  |    >=768 |   */
+#define PAGE_TRAIN_LENGTH_R0    1
+#define PAGE_TRAIN_LENGTH_R1    128
+#define PAGE_TRAIN_LENGTH_R2    256
+
+/// Synchronisation defines
+#define NORMAL_SYNC_POS     (64 + 4)                // End of Synchro word at bit 68 (64 + 4)
+#define SLOT_SIZE            625                    // A slot is 625 us
+#define HALF_SLOT_SIZE       625                    // A half slot is 312.5 us (in half us)
+#define HALF_SLOT_TIME_MIN  (0)                     // Minimum offset within a half-slot is 0 half-us
+#define HALF_SLOT_TIME_MAX  (HALF_SLOT_SIZE - 1)    // Maximum offset within a half-slot is 624 half-us
+
+/// Baseband timeout default value, Baseband timers: 1.1
+#define PAGE_RESP_TO_DEF        8
+#define INQ_RESP_TO_DEF         128
+#define NEW_CONNECTION_TO       32
+
+/// LMP Response Timeout (in sec)
+#define LMP_RSP_TO             30
+/// LLCP Response Timeout (in units of 10 ms)
+#define LLCP_RSP_TO            4000 // 40 secs
+
+/// Authenticated Payload Timeout (in units of 10 ms)
+#define AUTH_PAYL_TO_DFT       0x0BB8  // 30 secs
+#define AUTH_PAYL_TO_MIN       0x0001
+
+/// Voice mute pattern defines
+#define MU_LAW_MUTE             0xFF
+#define ALAW_CVSD_MUTE          0x55
+#define TRANSP_MUTE             0x00
+
+/// Air Mode  LMP:5.2
+#define MU_LAW_MODE             0
+#define A_LAW_MODE              1
+#define CVSD_MODE               2
+#define TRANS_MODE              3
+
+/// eSCO negotiation State LMP:5.2
+#define ESCO_NEGO_INIT              0
+#define ESCO_NEGO_LATEST_POSSIBLE   1
+#define ESCO_NEGO_SLOT_VIOLATION    2
+#define ESCO_NEGO_LAT_VIOLATION     3
+#define ESCO_NEGO_UNSUPPORTED       4
+
+#define SCO_BANDWIDTH               8000
+#define SYNC_BANDWIDTH_DONT_CARE    0xFFFFFFFF
+
+#define SYNC_MIN_LATENCY            0x0004
+#define SYNC_MAX_LATENCY_ESCO_S1    0x0007
+#define SYNC_MAX_LATENCY_ESCO_S2    0x0007
+#define SYNC_MAX_LATENCY_ESCO_S3    0x000A
+#define SYNC_DONT_CARE_LATENCY      0xFFFF
+
+#define SYNC_NO_RE_TX           0x00
+#define SYNC_RE_TX_POWER        0x01
+#define SYNC_RE_TX_QUALITY      0x02
+#define SYNC_RE_TX_DONT_CARE    0xFF
+
+/// Timing Control Flags  LMP:5.2
+#define TIM_CHANGE_FLAG         0x01
+#define INIT2_FLAG              0x02
+#define ACCESS_WIN_FLAG         0x04
+
+/// Sniff request parameters LMP:5.2
+#define SNIFF_INTERVAL_MIN      0x0006
+#define SNIFF_INTERVAL_MAX      0x0540
+#define SNIFF_TIMEOUT_MAX       0x0028
+
+/// Packet Type Table defines    LMP:4.1.11
+#define PACKET_TABLE_1MBPS      0x00
+#define PACKET_TABLE_2_3MBPS    0x01
+
+/// Data Rate defines    LMP:5.2
+#define FEC_RATE_MSK            0x01
+#define USE_FEC_RATE            0x00
+#define NO_FEC_RATE             0x01
+#define PREF_PACK_MSK           0x06
+#define NO_PREF_PACK_SIZE       0x00
+#define USE_1_SLOT_PACKET       0x02
+#define USE_3_SLOT_PACKET       0x04
+#define USE_5_SLOT_PACKET       0x06
+#define PREF_EDR_MSK            0x18
+#define USE_DM1_ONLY            0x00
+#define USE_2_MBPS_RATE         0x08
+#define USE_3_MBPS_RATE         0x10
+#define PREF_PACK_EDR_MSK       0x60
+#define USE_1_SLOT_EDR_PKT      0x20
+#define USE_3_SLOT_EDR_PKT      0x40
+#define USE_5_SLOT_EDR_PKT      0x60
+
+/// EIR Data Size HCI:6.24
+#define EIR_DATA_SIZE         240
+
+/// Voice setting HCI:4.7.29 & 4.7.30
+#define INPUT_COD_LIN           0x0000
+#define INPUT_COD_MULAW         0x0100
+#define INPUT_COD_ALAW          0x0200
+#define INPUT_COD_MSK           0x0300
+#define INPUT_COD_OFF           8
+#define INPUT_DATA_1COMP        0x0000
+#define INPUT_DATA_2COMP        0x0040
+#define INPUT_DATA_SMAG         0x0080
+#define INPUT_DATA_UNSIGNED     0x00C0
+#define INPUT_DATAFORM_MSK      0x00C0
+#define INPUT_DATAFORM_OFF      6
+#define INPUT_SAMP_8BIT         0x0000
+#define INPUT_SAMP_16BIT        0x0020
+#define INPUT_SAMPSIZE_MSK      0x0020
+#define INPUT_SAMPSIZE_OFF      5
+#define LIN_PCM_BIT_POS_MSK     0x001C
+#define LIN_PCM_BIT_POS_OFF     2
+#define AIR_COD_CVSD            0x0000
+#define AIR_COD_MULAW           0x0001
+#define AIR_COD_ALAW            0x0002
+#define AIR_COD_TRANS           0x0003
+#define AIR_COD_MSK             0x0003
+#define AIR_COD_OFF             0
+
+/// ScanEnable HCI:6.1
+#define BOTH_SCAN_DISABLE       0
+#define INQUIRY_SCAN_ENABLE     1
+#define PAGE_SCAN_ENABLE        2
+#define BOTH_SCAN_ENABLE        3
+
+/// PageScanInterval HCI:6.8
+#define PAGE_SCAN_INTV_MIN  0x0012
+#define PAGE_SCAN_INTV_MAX  0x1000
+#define PAGE_SCAN_INTV_DFT  0x0800
+
+/// PageScanWindow HCI:6.9
+#define PAGE_SCAN_WIN_MIN    0x0011
+#define PAGE_SCAN_WIN_MAX    0x1000
+#define PAGE_SCAN_WIN_DFT    0x0012
+
+/// InquiryScanInterval HCI:6.2
+#define INQ_SCAN_INTV_MIN  0x0012
+#define INQ_SCAN_INTV_MAX  0x1000
+#define INQ_SCAN_INTV_DFT  0x1000
+
+/// InquiryScanWindow HCI:6.3
+#define INQ_SCAN_WIN_MIN    0x0011
+#define INQ_SCAN_WIN_MAX    0x1000
+#define INQ_SCAN_WIN_DFT    0x0012
+
+/// General/Unlimited Inquiry Access Code (GIAC)
+#define GIAC_LAP_0              0x33
+#define GIAC_LAP_1              0x8B
+#define GIAC_LAP_2              0x9E
+
+/// Limited Dedicated Inquiry Access Code (LIAC)
+#define LIAC_LAP_0              0x00
+#define LIAC_LAP_1              0x8B
+#define LIAC_LAP_2              0x9E
+
+/// Maximum Dedicated Inquiry Access Code (DIAC MAX)
+#define DIAC_MAX_LAP_0          0x3F
+#define DIAC_MAX_LAP_1          0x8B
+#define DIAC_MAX_LAP_2          0x9E
+
+/// PIN Type HCI:6.13
+#define VARIABLE_PIN            0
+#define FIXED_PIN               1
+
+/// ConnectionAcceptTimeout HCI:6.7
+#define CON_ACCEPT_TO_MIN  0x00A0
+#define CON_ACCEPT_TO_MAX  0xB540
+#define CON_ACCEPT_TO_DFT  0x1FA0
+
+/// PageTimeout HCI:6.6
+#define PAGE_TO_MIN        0x0016
+#define PAGE_TO_MAX        0xFFFF
+#define PAGE_TO_DFT        0x2000
+
+/// Clock offset valid flag in clock offset field HCI:7.1.5/7.1.19
+#define CLK_OFFSET_VALID_FLAG_POS    15
+#define CLK_OFFSET_VALID_FLAG_MSK    0x8000
+
+/// AuthenticationEnable HCI:4.7.24
+#define AUTH_DISABLED           0x00        // Default
+#define AUTH_ENABLED            0x01
+
+/// EncryptionMode HCI:4.7.26
+#define ENC_DISABLED            0x00        // Default
+#define ENC_PP_ENABLED          0x01
+#define ENC_PP_BC_ENABLED       0x02
+
+/// AutomaticFlushTimeout HCI:4.7.32
+#define AUTO_FLUSH_TIMEOUT_MAX  0x07FF
+#define AUTO_FLUSH_TIMEOUT_OFF  0x0000
+#define AUTO_FLUSH_TIMEOUT_DFT  AUTO_FLUSH_TIMEOUT_OFF      // Default (no automatic flush timeout)
+
+/// Link Supervision Time Out (in slots) HCI:6.21
+#define LSTO_OFF      0x0000
+#define LSTO_MIN      0x0001
+#define LSTO_DFT      0x7D00      // Default is 20 s
+#define LSTO_MAX      0xFFFF
+
+/// PageScanRepetitionMode HCI:4.5.5
+#define R0                      0x00
+#define R1                      0x01
+#define R2                      0x02
+#define PAGESCAN_REP_DEF        R1          // Default
+
+/// PageScanPeriodMode HCI:4.7.49
+#define P0                      0x00        // Default
+#define P1                      0x01
+#define P2                      0x02
+
+/// PageScanMode HCI:4.7.51
+#define MANDATORY_PAGE_SCAN_MODE 0x00       // Default
+
+#define OPT_PAGE_SCAN_MODE_1    0x01
+#define OPT_PAGE_SCAN_MODE_2    0x02
+#define OPT_PAGE_SCAN_MODE_3    0x03
+
+/// Encryption Enable HCI:4.5.17
+#define ENCRYPTION_OFF          0x00
+#define ENCRYPTION_ON           0x01
+
+/// Country Code HCI:4.8.4
+#define NORTH_AMERICA_EUROPE    0x00
+#define FRANCE                  0x01
+#define SPAIN                   0x02
+#define JAPAN                   0x03
+
+/// Loopback mode HCI:7.6.2
+#define NO_LOOPBACK             0x00        // Default
+#define LOCAL_LOOPBACK          0x01
+#define REMOTE_LOOPBACK         0x02
+
+/// Erroneous Data Reporting HCI:7.3.65
+#define ERR_DATA_REP_DIS        0x00        // Default
+#define ERR_DATA_REP_EN         0x01
+
+/// LM modes HCI:5.2.20
+#define LM_ACTIVE_MODE          0x00
+#define LM_HOLD_MODE            0x01
+#define LM_SNIFF_MODE           0x02
+#define LM_PARK_MODE            0x03
+
+/// Key Type HCI:5.2.24
+#define COMB_KEY                0
+#define LOCAL_UNIT_KEY          1
+#define REMOTE_UNIT_KEY         2
+#define DEBUG_COMB_KEY          3
+#define UNAUTH_COMB_KEY_192     4
+#define AUTH_COMB_KEY_192       5
+#define CHANGED_COMB_KEY        6
+#define UNAUTH_COMB_KEY_256     7
+#define AUTH_COMB_KEY_256       8
+
+/// Key Flag HCI:5.4.18
+#define SEMI_PERMANENT_KEY      0x00
+#define TEMPORARY_KEY           0x01
+
+/// QOS Service Type HCI:4.6.6
+#define QOS_NO_TRAFFIC          0x00
+#define QOS_BEST_EFFORT         0x01
+#define QOS_GUARANTEED          0x02
+#define QOS_NOTSPECIFIED        0xFF
+
+#define QOS_WILD_CARD           0xFFFFFFFF
+
+/// RSSI golden range
+#define RSSI_GOLDEN_RG        0x00
+
+/// Inquiry TX power level (in dBm) HCI:7.3.62
+#define INQ_TX_PWR_DBM_MIN    -70
+#define INQ_TX_PWR_DBM_DFT    0
+#define INQ_TX_PWR_DBM_MAX    +20
+
+/// Bluetooth Test Mode defines    Bluetooth Test Mode: Table 3.2
+
+#define PAUSE_MODE              0x00
+#define TXTEST0_MODE            0x01
+#define TXTEST1_MODE            0x02
+#define TXTEST10_MODE           0x03
+#define PRAND_MODE              0x04
+#define ACLLOOP_MODE            0x05
+#define SCOLOOP_MODE            0x06
+#define ACLNOWHIT_MODE          0x07
+#define SCONOWHIT_MODE          0x08
+#define TXTEST1100_MODE         0x09
+#define EXITTEST_MODE           0xFF
+
+#define HOPSINGLE               0x00
+#define HOPUSA                  0x01
+
+#define FIXTXPOW                0x00
+#define ADAPTTXPOW              0x01
+
+/// Maximum frequency value for test mode HCI:7.8.28
+#define TEST_FREQ_MAX                        39
+/// Minimum PHY value for test mode HCI:7.8.50
+#define TEST_PHY_MIN                         0x01
+/// Maximum PHY value for the receiver test mode HCI:7.8.50
+#define RX_TEST_PHY_MAX                      0x03
+/// Maximum PHY value for the transmitter test mode HCI:7.8.51
+#define TX_TEST_PHY_MAX                      0x04
+
+/// Packet type parameter bit field of LMP_test_control
+#define LMP_TEST_CTRL_PKT_TYPE_CODE_POS  0
+#define LMP_TEST_CTRL_PKT_TYPE_CODE_MSK  0x0F
+#define LMP_TEST_CTRL_PKT_TYPE_LINK_POS  4
+#define LMP_TEST_CTRL_PKT_TYPE_LINK_MSK  0xF0
+#define TEST_ACLSCO   0
+#define TEST_ESCO     1
+#define TEST_EDRACL   2
+#define TEST_EDRESCO  3
+
+/// LMP_encapsulated_header parameters LMP:5.3
+#define LMP_ENCAPS_P192_MAJ_TYPE      1
+#define LMP_ENCAPS_P192_MIN_TYPE      1
+#define LMP_ENCAPS_P192_PAYL_LEN      48
+#define LMP_ENCAPS_P192_PAYL_NB       3
+#define LMP_ENCAPS_P256_MAJ_TYPE      1
+#define LMP_ENCAPS_P256_MIN_TYPE      2
+#define LMP_ENCAPS_P256_PAYL_LEN      64
+#define LMP_ENCAPS_P256_PAYL_NB       4
+
+/// Number of bits in the passkey code used during Secure Simple Pairing
+#define SSP_PASSKEY_NB_BITS           20
+
+// Event Filter HCI 4.7.3
+
+/// Filter type
+#define CLEAR_ALL_FILTER_TYPE   0x00
+#define INQUIRY_FILTER_TYPE     0x01
+#define CONNECTION_FILTER_TYPE  0x02
+
+/// Filter size
+#define CLEAR_ALL_FILTER_SIZE   0
+
+/// Inquiry & Connection Setup Filter Condition Type
+#define ALL_FILTER_CONDITION_TYPE       0x00
+#define CLASS_FILTER_CONDITION_TYPE     0x01
+#define BD_ADDR_FILTER_CONDITION_TYPE   0x02
+
+/// Auto Accept Flag
+#define DO_NOT_AUTO_ACCEPT_CONNECTION   0x01
+#define ACCEPT_CONNECTION_SLAVE         0x02
+#define ACCEPT_CONNECTION_MASTER        0x03
+
+/// Event Mask HCI 4.7.1
+#define NO_EVENTS_SPECIFIED_FILTER                            0x00000000
+#define INQUIRY_COMPLETE_EVENT_FILTER                         0x00000001
+#define INQUIRY_RESULT_EVENT_FILTER                           0x00000002
+#define CONNECTION_COMPLETE_EVENT_FILTER                      0x00000004
+#define CONNECTION_REQUEST_EVENT_FILTER                       0x00000008
+#define DISCONNECTION_COMPLETE_EVENT_FILTER                   0x00000010
+#define AUTHENTICATION_COMPLETE_EVENT_FILTER                  0x00000020
+#define REMOTE_NAME_REQUEST_COMPLETE_EVENT_FILTER             0x00000040
+#define ENCRYPTION_CHANGE_EVENT_FILTER                        0x00000080
+#define CHANGE_CONNECTION_LINK_KEY_COMPLETE_EVENT_FILTER      0x00000100
+#define MASTER_LINK_KEY_COMPLETE_EVENT_FILTER                 0x00000200
+#define READ_REMOTE_SUPPORTED_FEATURES_COMPLETE_EVENT_FILTER  0x00000400
+#define READ_REMOTE_VERSION_INFORMATION_COMPLETE_EVENT_FILTER 0x00000800
+#define QOS_SETUP_COMPLETE_EVENT_FILTER                       0x00001000
+#define COMMAND_COMPLETE_EVENT_FILTER                         0x00002000   // Unchecked */
+#define COMMAND_STATUS_EVENT_FILTER                           0x00004000   // Unchecked */
+#define HARDWARE_ERROR_EVENT_FILTER                           0x00008000
+#define FLUSH_OCCURRED_EVENT_FILTER                           0x00010000
+#define ROLE_CHANGE_EVENT_FILTER                              0x00020000
+#define NUMBER_OF_COMPLETED_PACKETS_EVENT_FILTER              0x00040000   // Unchecked */
+#define MODE_CHANGE_EVENT_FILTER                              0x00080000
+#define RETURN_LINK_KEYS_EVENT_FILTER                         0x00100000
+#define PIN_CODE_REQUEST_EVENT_FILTER                         0x00200000
+#define LINK_KEY_REQUEST_EVENT_FILTER                         0x00400000
+#define LINK_KEY_NOTIFICATION_EVENT_FILTER                    0x00800000
+#define LOOPBACK_COMMAND_EVENT_FILTER                         0x01000000   // Not implemented */
+#define DATA_BUFFER_OVERFLOW_EVENT_FILTER                     0x02000000
+#define MAX_SLOTS_CHANGE_EVENT_FILTER                         0x04000000
+#define READ_CLOCK_OFFSET_COMPLETE_EVENT_FILTER               0x08000000
+#define CONNECTION_PACKET_TYPE_CHANGED_EVENT_FILTER           0x10000000
+#define QOS_VIOLATION_EVENT_FILTER                            0x20000000
+#define PAGE_SCAN_MODE_CHANGE_EVENT_FILTER                    0x40000000   // Deprecated */
+#define PAGE_SCAN_REPETITION_MODE_CHANGE_EVENT_FILTER         0x80000000
+
+#define FLOW_SPECIFICATION_COMPLETE_EVENT_FILTER                0x00000001
+#define INQUIRY_RESULT_WITH_RSSI_EVENT_FILTER                   0x00000002
+#define READ_REMOTE_EXTENDED_FEATURES_COMPLETE_EVENT_FILTER     0x00000004
+#define SYNCHRONOUS_CONNECTION_COMPLETE_EVENT_FILTER            0x00000800
+#define SYNCHRONOUS_CONNECTION_CHANGE_EVENT_FILTER              0x00001000
+#define SNIFF_SUBRATING_EVENT_FILTER                            0x00002000
+#define EXTENDED_INQUIRY_RESULT_EVENT_FILTER                    0x00004000
+#define ENCRYPTION_KEY_REFRESH_COMPLETE_EVENT_FILTER            0x00008000
+#define IO_CAPABILITY_REQUEST_EVENT_FILTER                      0x00010000
+#define IO_CAPABILITY_REQUEST_REPLY_EVENT_FILTER                0x00020000
+#define USER_CONFIRMATION_REQUEST_EVENT_FILTER                  0x00040000
+#define USER_PASSKEY_REQUEST_EVENT_FILTER                       0x00080000
+#define REMOTE_OOB_DATA_REQUEST_EVENT_FILTER                    0x00100000
+#define SIMPLE_PAIRING_COMPLETE_EVENT_FILTER                    0x00200000
+#define LINK_SUPERVISION_TIMEOUT_CHANGE_EVENT_FILTER            0x00800000
+#define ENHANCED_FLUSH_COMPLETE_EVENT_FILTER                    0x01000000
+#define USER_PASSKEY_NOTIFICATION_EVENT_FILTER                  0x04000000
+#define KEYPRESS_NOTIFICATION_EVENT_FILTER                      0x08000000
+#define REM_HOST_SUPPORTED_FEATURES_NOTIFICATION_EVENT_FILTER   0x10000000
+
+/// HostControllerToHostFlowControl (ACL) HCI 7.3.40
+#define FLOW_CONTROL_OFF                0x00
+#define FLOW_CONTROL_ACL                0x01
+#define FLOW_CONTROL_SCO                0x02
+#define FLOW_CONTROL_ACL_SCO            0x03
+
+/// SynchroinousFlowControlEnable (SCO) HCI 7.3.39
+#define SYNC_FLOW_CONTROL_OFF           0x00
+#define SYNC_FLOW_CONTROL_ON            0x01
+
+/// Tx Power HCI:4.7.37
+#define CURRENT_TX_POWER                0x00
+#define MAX_TX_POWER                    0x01
+
+/// Flow_direction HCI:7.2.13
+#define FLOW_DIR_OUT                0x00
+#define FLOW_DIR_IN                 0x01
+
+/// Drift and Jitter default value LMP 5.2
+#define DRIFT_BLE_DFT                   500
+#define DRIFT_BT_DFT                    250
+#define JITTER_DFT                      10
+#define DRIFT_BT_ACTIVE_MAX             20 // BB:2.2.5
+
+/// MAX LP Clock Jitter allowed by the specification (in us) (Core 4.2 - vol 6, -B - 4.2.2)
+#define BLE_MAX_JITTER              (16)
+
+/// Read Stored Link Key HCI:4.7.8
+#define LINK_KEY_BD_ADDR                0x00
+#define LINK_KEY_ALL                    0x01
+
+/// Read/Write Hold Mode Activity HCI:4.7.35 and 4.7.36
+#define HOLD_MODE_ACTIV_DEFAULT                 0x00
+#define HOLD_MODE_ACTIV_SUSP_PAGE_SCAN          0x01
+#define HOLD_MODE_ACTIV_SUSP_INQUIRY_SCAN       0x02
+#define HOLD_MODE_ACTIV_SUSP_PERIODIC_INQ       0x04
+#define HOLD_MODE_ACTIV_NOT_MASK                0xF8
+
+/// AFH Mode
+#define AFH_DISABLED                  0x00
+#define AFH_ENABLED                   0x01
+
+/// AFH Reporting Mode
+#define AFH_REPORTING_DISABLED        0x00
+#define AFH_REPORTING_ENABLED         0x01
+
+/// AFH channel assessment Mode
+#define AFH_CH_ASS_DISABLED           0x00
+#define AFH_CH_ASS_ENABLED            0x01
+
+/// AFH MIn/Max interval, in BT slots (1s - 30s)
+#define AFH_REPORT_INTERVAL_MIN       0x0640
+#define AFH_REPORT_INTERVAL_MAX       0xBB80
+
+/// Channel classification values for frequency pairs
+#define AFH_CH_CLASS_UNKNOWN          0x0
+#define AFH_CH_CLASS_GOOD             0x1
+#define AFH_CH_CLASS_RESERVED         0x2
+#define AFH_CH_CLASS_BAD              0x3
+
+/// Maximum number of frequencies used in adapted channel hopping sequence
+#define AFH_NB_CHANNEL_MIN            20
+#define AFH_NB_CHANNEL_MAX            79
+
+/// Number of frequencies available in standard hopping sequence
+#define HOP_NB_CHANNEL                79
+
+/// Base frequency in MHz of first BT hop channel [f=2402+k MHz, k=0,...,78]
+#define HOP_CHANNEL_BASE_MHZ          2402
+
+/// Maximum number of frequencies used in synchronization train BB:2.6.4.8
+#define SYNC_TRAIN_CHANNEL_NB         3
+/// Indices of frequencies used in synchronization train
+#define SYNC_TRAIN_CHANNEL_0          0
+#define SYNC_TRAIN_CHANNEL_1          24
+#define SYNC_TRAIN_CHANNEL_2          78
+
+/// Maximum delay in synchronization train (in slots) BB:2.7.2
+#define SYNC_TRAIN_DELAY_MAX_DFT      16
+/// Maximum delay in synchronization train for Coarse clock adjustment (in slots) BB:2.7.2
+#define SYNC_TRAIN_DELAY_MAX_CLK_ADJ  4
+/// Synchronization train interval for Coarse clock adjustment (in slots) BB:2.7.2
+#define SYNC_TRAIN_INTV_CLK_ADJ       32
+
+/// Future CSB instant value offset for Coarse clock adjustment (in slots) BB: 8.11.2
+#define SYNC_TRAIN_CSB_INSTANT_OFFSET_CLK_ADJ  1600
+
+/// Minimum value for synchronization train interval (in slots) HCI:7.3.90
+#define SYNC_TRAIN_INTV_MIN           0x20
+/// Minimum value for synchronization train timeout (in slots) HCI:7.3.90
+#define SYNC_TRAIN_TO_MIN             0x00000002
+/// Maximum value for synchronization train timeout (in slots) HCI:7.3.90
+#define SYNC_TRAIN_TO_MAX             0x07FFFFFE
+
+/// Default value for synchronization train interval (in slots) HCI:6.36
+#define SYNC_TRAIN_INTV_DEFAULT       0x80
+/// Default value for synchronization train timeout (in slots) HCI:6.37
+#define SYNC_TRAIN_TO_DEFAULT         0x0002EE00
+/// Default value for synchronization scan timeout for CCA recovery mode (in slots) BB: Appendix B.1.8
+#define SYNC_TRAIN_TO_CCA_RM_DEFAULT  0x8000
+/// Default value for synchronization train service data HCI:6.39
+#define SYNC_TRAIN_SVC_DATA_DEFAULT   0x00
+
+/// Minimum value for synchronization scan timeout (in slots) HCI:7.1.52
+#define SYNC_SCAN_TO_MIN              0x22
+/// Minimum value for synchronization scan window (in slots) HCI:7.1.52
+#define SYNC_SCAN_WIN_MIN             0x22
+/// Minimum value for synchronization scan interval (in slots) HCI:7.1.52
+#define SYNC_SCAN_INTV_MIN            0x02
+
+/// Default value for synchronization scan timeout (in slots) BB: Apppendix B
+#define SYNC_SCAN_TO_DEFAULT          0x2000
+/// Default value for synchronization scan timeout for CCA recovery mode (in slots) BB: Appendix B.1.9
+#define SYNC_SCAN_TO_CCA_RM_DEFAULT   0x8000
+/// Recommended value for synchronization scan window (91.25ms) GAP: Appendix A
+#define SYNC_SCAN_WIN_DEFAULT         0x0092
+/// Recommended value for synchronization scan interval (320 ms) GAP: Appendix A
+#define SYNC_SCAN_INTV_DEFAULT        0x0200
+
+
+/// CSB receive enable HCI:7.1.50
+#define CSB_RX_MODE_DIS        0x00
+#define CSB_RX_MODE_EN         0x01
+
+///  CSB fragment HCI:7.2.88
+#define CSB_CONTINUATION_FRAGMENT     0
+#define CSB_STARTING_FRAGMENT         1
+#define CSB_ENDING_FRAGMENT           2
+#define CSB_NO_FRAGMENTATION          3
+
+/// CSB max fragment size HCI:7.2.88
+#define CSB_FRAGMENT_SIZE_MAX         0xFF
+
+/// MWS Channel_Enable
+#define MWS_CHANNEL_DISABLED             0x00
+#define MWS_CHANNEL_ENABLED              0x01
+
+/// MWS Channel_Type
+#define MWS_TDD_CHANNEL_TYPE             0x00
+#define MWS_FDD_CHANNEL_TYPE             0x01
+
+/// MWS Transport_Layer
+#define MWS_SIGNALING_ONLY               0x00
+#define MWS_WCI_1                        0x01
+#define MWS_WCI_2                        0x02
+#define MWS_TRANSPORT_TYPE_MAX           0x02
+
+/// MWS PATTERN Index
+#define MWS_PATTERN_INDEX_MAX            2
+
+/// MWS PATTERN IntervalType
+#define MWS_PATTERN_NO_TXRX              0
+#define MWS_PATTERN_TX_ALLOWED           1
+#define MWS_PATTERN_RX_ALLOWED           2
+#define MWS_PATTERN_TXRX_ALLOWED         3
+#define MWS_PATTERN_EXT_FRAME            4
+#define MWS_PATTERN_TYPE_MAX             4
+
+
+/// MWS Ext_Num_Periods
+#define MWS_EXT_NUM_PERIODS_MIN          0x01
+#define MWS_EXT_NUM_PERIODS_MAX          0x32
+
+/// MWS Period_Type
+#define MWS_PERIOD_TYPE_DOWNLINK         0x00
+#define MWS_PERIOD_TYPE_UPLINK           0x01
+#define MWS_PERIOD_TYPE_BIDIRECTIONAL    0x02
+#define MWS_PERIOD_TYPE_GUARD_PERIOD     0x03
+#define MWS_PERIOD_TYPE_RESERVED         0x04
+
+/// MWS inactivity duration 7B(WCI-1):3.1.4.
+#define MWS_INACT_DUR_INFINITE           0x1F
+
+
+/// Simple pairing mode HCI:7.3.58/HCI:7.3.59
+#define SP_MODE_DIS        0x00
+#define SP_MODE_EN         0x01
+
+/// Inquiry Scan Type and Page Scan Type HCI:6.4/HCI:6.11
+#define STANDARD_SCAN           0x00
+#define INTERLACED_SCAN         0x01
+
+/// Default interlace offset used for frequency selection during interlaced inquiry/page scan  BB:8.3.1/8.4.1
+#define INTERLACE_OFFSET_DFT    16
+
+/// Inquiry Mode
+#define STANDARD_INQUIRY        0x00
+#define RSSI_INQUIRY            0x01
+#define EXTENDED_INQUIRY        0x02
+
+/// Maximum number of link keys Host can write via HCI Write Stored Link Key Command
+#define NB_LINK_KEY             0x0B
+
+/// LMP Version
+#define BT_LMP_V1_0             0
+#define BT_LMP_V1_1             1
+#define BT_LMP_V1_2             2
+#define BT_LMP_V2_0             3
+#define BT_LMP_V2_1             4
+#define BT_LMP_V3_0             5
+#define BT_LMP_V4_0             6
+#define BT_LMP_V4_1             7
+
+/// WhichClock parameter
+#define LOCAL_CLOCK             0
+#define PICONET_CLOCK           1
+
+/// Clock Accuracy parameter
+#define CLOCK_ACCURACY_UNKNOWN  0xFFFF
+
+#define SP_PASSKEY_STARTED          0x00
+#define SP_PASSKEY_DIGIT_ENTERED    0x01
+#define SP_PASSKEY_DIGIT_ERASED     0x02
+#define SP_PASSKEY_CLEARED          0x03
+#define SP_PASSKEY_COMPLETED        0x04
+
+// Flags for ld_util_get_nb_acl function
+/// Flag for master link
+#define MASTER_FLAG       0x01
+/// Flag for slave link
+#define SLAVE_FLAG        0x02
+
+
+/// BLE packet info in bytes
+#define  BLE_PKT_HDR_LEN       (2)
+#define  BLE_PKT_CRC_LEN       (3)
+#define  BLE_PKT_ACCESS_LEN    (4)
+
+/// IFS duration in us
+#define  BLE_IFS_DUR           (150)
+
+/// MAFS duration in us
+#define  BLE_MAFS_DUR          (300)
+
+/// BLE event mask
+enum le_evt_mask
+{
+    LE_EVT_MASK_CON_CMP_EVT_BIT                     = 0,         //!< LE_EVT_MASK_CON_CMP_EVT_BIT
+    LE_EVT_MASK_CON_CMP_EVT_MSK                     = 0x00000001,//!< LE_EVT_MASK_CON_CMP_EVT_MSK
+    LE_EVT_MASK_ADV_REP_EVT_BIT                     = 1,         //!< LE_EVT_MASK_ADV_REP_EVT_BIT
+    LE_EVT_MASK_ADV_REP_EVT_MSK                     = 0x00000002,//!< LE_EVT_MASK_ADV_REP_EVT_MSK
+    LE_EVT_MASK_CON_UPD_EVT_BIT                     = 2,         //!< LE_EVT_MASK_CON_UPD_EVT_BIT
+    LE_EVT_MASK_CON_UPD_EVT_MSK                     = 0x00000004,//!< LE_EVT_MASK_CON_UPD_EVT_MSK
+    LE_EVT_MASK_CON_RD_REM_FEAT_EVT_BIT             = 3,         //!< LE_EVT_MASK_CON_RD_REM_FEAT_EVT_BIT
+    LE_EVT_MASK_CON_RD_REM_FEAT_EVT_MSK             = 0x00000008,//!< LE_EVT_MASK_CON_RD_REM_FEAT_EVT_MSK
+    LE_EVT_MASK_LG_TR_KEY_REQ_EVT_BIT               = 4,         //!< LE_EVT_MASK_LG_TR_KEY_REQ_EVT_BIT
+    LE_EVT_MASK_LG_TR_KEY_REQ_EVT_MSK               = 0x00000010,//!< LE_EVT_MASK_LG_TR_KEY_REQ_EVT_MSK
+    LE_EVT_MASK_REM_CON_PARA_REQ_EVT_BIT            = 5,         //!< LE_EVT_MASK_REM_CON_PARA_REQ_EVT_BIT
+    LE_EVT_MASK_REM_CON_PARA_REQ_EVT_MSK            = 0x00000020,//!< LE_EVT_MASK_REM_CON_PARA_REQ_EVT_MSK
+    LE_EVT_MASK_DATA_LEN_CHG_EVT_BIT                = 6,         //!< LE_EVT_MASK_DATA_LEN_CHG_EVT_BIT
+    LE_EVT_MASK_DATA_LEN_CHG_EVT_MSK                = 0x00000040,//!< LE_EVT_MASK_DATA_LEN_CHG_EVT_MSK
+    LE_EVT_MASK_RD_LOC_P256_PUB_KEY_CMP_EVT_BIT     = 7,         //!< LE_EVT_MASK_RD_LOC_P256_PUB_KEY_CMP_EVT_BIT
+    LE_EVT_MASK_RD_LOC_P256_PUB_KEY_CMP_EVT_MSK     = 0x00000080,//!< LE_EVT_MASK_RD_LOC_P256_PUB_KEY_CMP_EVT_MSK
+    LE_EVT_MASK_GEN_DHKEY_CMP_EVT_BIT               = 8,         //!< LE_EVT_MASK_GEN_DHKEY_CMP_EVT_BIT
+    LE_EVT_MASK_GEN_DHKEY_CMP_EVT_MSK               = 0x00000100,//!< LE_EVT_MASK_GEN_DHKEY_CMP_EVT_MSK
+    LE_EVT_MASK_ENH_CON_CMP_EVT_BIT                 = 9,         //!< LE_EVT_MASK_ENH_CON_CMP_EVT_BIT
+    LE_EVT_MASK_ENH_CON_CMP_EVT_MSK                 = 0x00000200,//!< LE_EVT_MASK_ENH_CON_CMP_EVT_MSK
+    LE_EVT_MASK_DIR_ADV_REP_EVT_BIT                 = 10,        //!< LE_EVT_MASK_DIR_ADV_REP_EVT_BIT
+    LE_EVT_MASK_DIR_ADV_REP_EVT_MSK                 = 0x00000400,//!< LE_EVT_MASK_DIR_ADV_REP_EVT_MSK
+    LE_EVT_MASK_PHY_UPD_CMP_EVT_BIT                 = 11,        //!< LE_EVT_MASK_PHY_UPD_CMP_EVT_BIT
+    LE_EVT_MASK_PHY_UPD_CMP_EVT_MSK                 = 0x00000800,//!< LE_EVT_MASK_PHY_UPD_CMP_EVT_MSK
+    LE_EVT_MASK_EXT_ADV_REPORT_EVT_BIT              = 12,        //!< LE_EVT_MASK_EXT_ADV_REPORT_EVT_BIT
+    LE_EVT_MASK_EXT_ADV_REPORT_EVT_MSK              = 0x00001000,//!< LE_EVT_MASK_EXT_ADV_REPORT_EVT_MSK
+    LE_EVT_MASK_PER_ADV_SYNC_EST_EVT_BIT            = 13,        //!< LE_EVT_MASK_PER_ADV_SYNC_EST_EVT_BIT
+    LE_EVT_MASK_PER_ADV_SYNC_EST_EVT_MSK            = 0x00002000,//!< LE_EVT_MASK_PER_ADV_SYNC_EST_EVT_MSK
+    LE_EVT_MASK_PER_ADV_REPORT_EVT_BIT              = 14,        //!< LE_EVT_MASK_PER_ADV_REPORT_EVT_BIT
+    LE_EVT_MASK_PER_ADV_REPORT_EVT_MSK              = 0x00004000,//!< LE_EVT_MASK_PER_ADV_REPORT_EVT_MSK
+    LE_EVT_MASK_PER_ADV_SYNC_LOST_EVT_BIT           = 15,        //!< LE_EVT_MASK_PER_ADV_SYNC_LOST_EVT_BIT
+    LE_EVT_MASK_PER_ADV_SYNC_LOST_EVT_MSK           = 0x00008000,//!< LE_EVT_MASK_PER_ADV_SYNC_LOST_EVT_MSK
+    LE_EVT_MASK_EXT_SCAN_TIMEOUT_EVT_BIT            = 16,        //!< LE_EVT_MASK_EXT_SCAN_TIMEOUT_EVT_MSK
+    LE_EVT_MASK_EXT_SCAN_TIMEOUT_EVT_MSK            = 0x00010000,//!<LE_EVT_MASK_EXT_SCAN_TIMEOUT_EVT_MSK
+    LE_EVT_MASK_EXT_ADV_SET_TERMINATED_EVT_BIT      = 17,        //!<LE_EVT_MASK_EXT_ADV_SET_TERMINATED_EVT_MSK
+    LE_EVT_MASK_EVT_ADV_SET_TERMINATED_EVT_MSK      = 0x00020000,//!<LE_EVT_MASK_EVT_ADV_SET_TERMINATED_EVT_MSK
+    LE_EVT_MASK_SCAN_REQ_RECEIVED_EVT_BIT           = 18,        //!<LE_EVT_MASK_SCAN_REQ_RECEIVED_EVT_BIT
+    LE_EVT_MASK_SCAN_REQ_RECEIVED_EVT_MSK           = 0x00040000,//!<LE_EVT_MASK_SCAN_REQ_RECEIVED_EVT_MSK
+    LE_EVT_MASK_CH_SEL_ALGO_EVT_BIT                 = 19,        //!<LE_EVT_MASK_CH_SEL_ALGO_EVT_BIT
+    LE_EVT_MASK_CH_SEL_ALGO_EVT_MSK                 = 0x00080000,//!<LE_EVT_MASK_CH_SEL_ALGO_EVT_MSK
+
+    LE_EVT_MASK_DFT                                 = 0x0000001F,//!< LE_EVT_MASK_DFT
+};
+
+/// Enhanced Synchronous Connection HCI:7.1.41 & 7.1.42
+#define    CODING_FORMAT_ULAW          0x00
+#define    CODING_FORMAT_ALAW          0x01
+#define    CODING_FORMAT_CVSD          0x02
+#define    CODING_FORMAT_TRANSP        0x03
+#define    CODING_FORMAT_LINPCM        0x04
+#define    CODING_FORMAT_MSBC          0x05
+#define    CODING_FORMAT_VENDSPEC      0xFF
+
+#define    PCM_FORMAT_NA               0x00
+#define    PCM_FORMAT_1SCOMP           0x01
+#define    PCM_FORMAT_2SCOMP           0x02
+#define    PCM_FORMAT_SIGNMAG          0x03
+#define    PCM_FORMAT_UNSIGNED         0x04
+
+#define    PCM_SAMPLE_SIZE_8BITS       8
+#define    PCM_SAMPLE_SIZE_16BITS      16
+
+#define    AUDIO_DATA_PATH_HCI               0
+#define    AUDIO_DATA_PATH_PCM               1
+
+/// Default maximum number of slots per packet
+#define MAX_SLOT_DFT   1
+
+/// Packet type code interpretation possibilities BB:6.5
+#define ID_NUL_TYPE     0x0
+#define POLL_TYPE       0x1
+#define FHS_TYPE        0x2
+#define DM1_TYPE        0x3
+#define DH1_TYPE        0x4
+#define DH1_2_TYPE      0x4
+#define DH1_3_TYPE      0x8
+#define HV1_TYPE        0x5
+#define HV2_TYPE        0x6
+#define EV3_2_TYPE      0x6
+#define HV3_TYPE        0x7
+#define EV3_TYPE        0x7
+#define EV3_3_TYPE      0x7
+#define DV_TYPE         0x8
+#define AUX1_TYPE       0x9
+#define DM3_TYPE        0xA
+#define DH3_TYPE        0xB
+#define DH3_2_TYPE      0xA
+#define DH3_3_TYPE      0xB
+#define EV4_TYPE        0xC
+#define EV5_2_TYPE      0xC
+#define EV5_TYPE        0xD
+#define EV5_3_TYPE      0xD
+#define DM5_TYPE        0xE
+#define DH5_TYPE        0xF
+#define DH5_2_TYPE      0xE
+#define DH5_3_TYPE      0xF
+
+/// Format of the FHS payload BB:6.5.1.4
+#define FHS_PAR_BITS_POS        0
+#define FHS_PAR_BITS_LEN        34
+#define FHS_PAR_BITS_END        (FHS_PAR_BITS_POS + FHS_PAR_BITS_LEN)
+#define FHS_LAP_POS             FHS_PAR_BITS_END
+#define FHS_LAP_LEN             24
+#define FHS_LAP_END             (FHS_LAP_POS + FHS_LAP_LEN)
+#define FHS_EIR_POS             FHS_LAP_END
+#define FHS_EIR_LEN             1
+#define FHS_EIR_END             (FHS_EIR_POS + FHS_EIR_LEN)
+#define FHS_UNDEF_POS           FHS_EIR_END
+#define FHS_UNDEF_LEN           1
+#define FHS_UNDEF_END           (FHS_UNDEF_POS + FHS_UNDEF_LEN)
+#define FHS_SR_POS              FHS_UNDEF_END
+#define FHS_SR_LEN              2
+#define FHS_SR_END              (FHS_SR_POS + FHS_SR_LEN)
+#define FHS_RSVD_POS            FHS_SR_END
+#define FHS_RSVD_LEN            2
+#define FHS_RSVD_END            (FHS_RSVD_POS + FHS_RSVD_LEN)
+#define FHS_UAP_POS             FHS_RSVD_END
+#define FHS_UAP_LEN             8
+#define FHS_UAP_END             (FHS_UAP_POS + FHS_UAP_LEN)
+#define FHS_NAP_POS             FHS_UAP_END
+#define FHS_NAP_LEN             16
+#define FHS_NAP_END             (FHS_NAP_POS + FHS_NAP_LEN)
+#define FHS_CLASS_OF_DEV_POS    FHS_NAP_END
+#define FHS_CLASS_OF_DEV_LEN    24
+#define FHS_CLASS_OF_DEV_END    (FHS_CLASS_OF_DEV_POS + FHS_CLASS_OF_DEV_LEN)
+#define FHS_LT_ADDR_POS         FHS_CLASS_OF_DEV_END
+#define FHS_LT_ADDR_LEN         3
+#define FHS_LT_ADDR_END         (FHS_LT_ADDR_POS + FHS_LT_ADDR_LEN)
+#define FHS_CLK_POS             FHS_LT_ADDR_END
+#define FHS_CLK_LEN             26
+#define FHS_CLK_END             (FHS_CLK_POS + FHS_CLK_LEN)
+#define FHS_PAGE_SCAN_MODE_POS  FHS_CLK_END
+#define FHS_PAGE_SCAN_MODE_LEN  3
+#define FHS_PAGE_SCAN_MODE_END  (FHS_PAGE_SCAN_MODE_POS + FHS_PAGE_SCAN_MODE_LEN)
+
+/// Format of the STP payload BB:8.11.2
+#define STP_CLK_POS             0
+#define STP_CLK_LEN             4
+#define STP_FUT_CSB_INST_POS    4
+#define STP_FUT_CSB_INST_LEN    4
+#define STP_AFH_CH_MAP_POS      8
+#define STP_AFH_CH_MAP_LEN      10
+#define STP_MST_BD_ADDR_POS     18
+#define STP_MST_BD_ADDR_LEN     6
+#define STP_CSB_INTV_POS        24
+#define STP_CSB_INTV_LEN        2
+#define STP_CSB_LT_ADDR_POS     26
+#define STP_CSB_LT_ADDR_LEN     1
+#define STP_SVC_DATA_POS        27
+#define STP_SVC_DATA_LEN        1
+#define STP_PACKET_SIZE         28
+
+/// CSB Receive status HCI:7.7.69
+#define CSB_RX_OK        0x00
+#define CSB_RX_KO        0x01
+
+/// HCI 7.8.33 LE Set Data Length Command
+/// Preferred minimum number of payload octets
+#define LE_MIN_OCTETS       (27)
+/// Preferred minimum number of microseconds
+#define LE_MIN_TIME         (328)
+/// Preferred minimum number of microseconds LL:4.5.10
+#define LE_MIN_TIME_CODED   (2704)
+/// Preferred maximum number of payload octets
+#define LE_MAX_OCTETS       (251)
+/// Preferred maximum number of microseconds
+#define LE_MAX_TIME         (2120)
+/// Preferred maximum number of microseconds LL:4.5.10
+#define LE_MAX_TIME_CODED   (17040)
+
+/// LE LL 2.1.2 Access Address
+#define LE_ADV_CH_ACC_ADDR_H        0x8E89
+#define LE_ADV_CH_ACC_ADDR_L        0xBED6
+
+/// Resolvable private address timeout (in seconds) HCI:7.8.45
+#define RPA_TO_MAX         0xA1B8 // approximately 11.5 hours
+#define RPA_TO_DFT         0x0384 // 900 seconds or 15 minutes
+#define RPA_TO_MIN         0x0001 // 1 second
+
+/// Max scanning PHYs which can be set HCI:7.8.64
+#define MAX_SCAN_PHYS     2
+
+/// Max initiating PHYs which can be set HCI:7.8.66
+#define MAX_INIT_PHYS     3
+
+/// Ext Scanning interval (in 625us slot) (chapter 2.E.7.8.64)
+#define EXT_SCAN_INTERVAL_MIN     0x0004 //(2.5 ms)
+#define EXT_SCAN_INTERVAL_MAX     0xFFFF //(40.96 sec)
+
+/// Ext Scanning window (in 625us slot) (chapter 2.E.7.8.64)
+#define EXT_SCAN_WINDOW_MIN     0x0004 //(2.5 ms)
+#define EXT_SCAN_WINDOW_MAX     0xFFFF //(40.96 sec)
+
+/// Duration of 1MBPS PDU of specified payload length in microseconds (chapter 6.B.2.1)
+#define PDU_1MBPS_LEN_US(n_bytes) ((8 + (2 + n_bytes))*8) // (1 + 4 + (2 + payload_len) + 3)*8
+
+/// Duration of 2MBPS PDU of specified payload length in microseconds (chapter 6.B.2.1)
+#define PDU_2MBPS_LEN_US(n_bytes) ((9 + (2 + n_bytes))*4) // (2 + 4 + (2 + payload_len) + 3)*4
+
+/// Duration of 500KBPS PDU of specified payload length in microseconds (chapter 6.B.2.2)
+#define PDU_500KBPS_LEN_US(n_bytes) (430 + (2 + n_bytes)*16) // 80 + 256 + 16 + 24 + (2 + payload_len)*8*2 + 24*2 + 3*2
+
+/// Duration of 125KBPS PDU of specified payload length in microseconds (chapter 6.B.2.2)
+#define PDU_125KBPS_LEN_US(n_bytes) (592 + (2 + n_bytes)*64) // 80 + 256 + 16 + 24 + (2 + payload_len)*8*8 + 24*8 + 3*8
+
+/// Maximum length of BLE advertising channel PDU payloads ((chapter 6.B.2.3))
+#define PDU_ADV_PAYLOAD_LEN_MAX     255
+
+/// SyncInfo Sync Packet Offset unspecified (chapter 6.B.2.3)
+#define PER_SYNC_OFFSET_UNSPECIFIED     0
+
+/// SyncInfo Sync Interval min in 1.25ms units (chapter 6.B.2.3)
+#define PER_SYNC_INTERVAL_MIN           6 // (7.5ms)
+
+/// Ext Adv Report  - ADV SID - Define for no ADI filed in the PDU  HCI:7.7.65.13
+#define REP_ADV_NO_ADI              0xFF
+
+/// Ext Adv Report  - Tx Power & RSSI dBm - Define for information not available    HCI:7.7.65.13
+#define REP_ADV_DBM_UNKNOWN         127
+
+/// Periodic Advertising Report - Unused parameter - mandatory value HCI:7.7.65.15
+#define PER_ADV_REPORT_TRAIL_BYTE  0xFF
+
+/// Maximum advertising handle HCI:7.8.53
+#define ADV_HDL_MAX     0xEF
+
+/// Maximum advertising Set ID HCI:7.8.53
+#define ADV_SID_MAX     0x0F
+
+/// Advertising_Tx_Power, Host has no preference HCI:7.8.53
+#define ADV_TX_PWR_NO_PREF     127
+
+/// Address type of devices sending anonymous advertisements, HCI 7.8.16
+#define ANONYMOUS_ADV_ADDR_TYPE  0xFF
+
+/// Invalid param_req offset, 2.4.2.16 LL_CONNECTION_PARAM_REQ
+#define PARAM_REQ_INVALID_OFFSET 0xFFFF
+/*
+ *  ***********************************************************
+ *           ISOCHRONOUS CHANNEL DEFINES
+ * ***********************************************************
+ */
+
+/// Maximum Payload Size value
+#define BLE_ISO_MAX_PAYLOAD_SIZE                 (0xFB)
+/// Minimum Number of Subevents value
+#define BLE_ISO_MIN_NSE                          (0x01)
+/// Maximum Number of Subevents value
+#define BLE_ISO_MAX_NSE                          (0x1F)
+/// Mask for PHY type value received from host
+#define BLE_ISO_PHY_MASK                         (0x07)
+
+/// Minimum ISO Interval value
+#define BLE_ISO_MIN_INTERVAL                     (0x0004)
+/// Maximum ISO Interval value
+#define BLE_ISO_MAX_INTERVAL                     (0x0C80)
+
+/// Maximum transport latency in ms (4s)
+#define BLE_ISO_MAX_TRANS_LATENCY                (0x0FA0)
+
+/// Maximum CIG ID value
+#define BLE_CIG_MAX_ID                           (0x07)
+/// Maximum Channel ID value
+#define BLE_CIS_MAX_ID                           (0x1F)
+/// Minimum Flush Timeout value
+#define BLE_CIS_MIN_FT                           (0x01)
+/// Maximum Flush Timeout value
+#define BLE_CIS_MAX_FT                           (0x1F)
+/// Maximum Burst Number value
+#define BLE_CIS_MAX_BN                           (0x1F)
+/// Minimum CIS offset value - 300us
+#define BLE_CIS_MIN_OFFSET                       (300)
+/// Minimum Subevent interval value - 400us
+#define BLE_CIS_MIN_SUBEVENT_INTV                (400)
+/// Maximum number of retransmission
+#define BLE_CIS_MAX_RTE                          (0x0F)
+
+/// Maximum BIG Handle value
+#define BLE_BIG_MAX_HANDLE                       (0xEF)
+/// Minimum BIS Number value
+#define BLE_BIS_MIN_NB                           (0x01)
+/// Maximum BIS Number value
+#define BLE_BIS_MAX_NB                           (0x1F)
+/// Minimum Burst Number value for BIS
+#define BLE_BIS_MIN_BN                           (0x01)
+/// Maximum Burst Number value for BIS
+#define BLE_BIS_MAX_BN                           (0x07)
+/// Minimum Number of Immediate Retransmission Count value
+#define BLE_BIS_MIN_IRC                          (0x01)
+/// Maximum Number of Immediate Retransmission Count value
+#define BLE_BIS_MAX_IRC                          (0x0F)
+/// Maximum Number of Pre-Transmission Offset value
+#define BLE_BIS_MAX_PTO                          (0x0F)
+
+
+/// Size of payload count
+#define BLE_PLD_CNT_SIZE                         (5)
+/// Invalid connection link id
+#define BLE_INVALID_LINK_ID                      (0xFF)
+/// Invalid channel handle
+#define BLE_INVALID_CHANHDL                      (0xFF)
+/// Invalid Group handle
+#define BLE_INVALID_GROUP_HDL                    (0xFF)
+/// Invalid Isochronous handle
+#define BLE_INVALID_ISOHDL                       (0xFFFF)
+
+/// Isochronous Group packing preference
+enum iso_packing
+{
+    /// Let Controller select
+    ISO_PACKING_DONT_CARE = 0,
+    /// Sequential stream packing
+    ISO_PACKING_SEQUENTIAL,
+    /// Interleaved stream packing
+    ISO_PACKING_INTERLEAVED,
+
+    ISO_PACKING_MAX,
+};
+
+/*
+ * ENUMERATIONS
+ ****************************************************************************************
+ */
+
+/// Specify if Host has no preference into all_phys parameter HCI:7.8.48 / HCI:7.8.49
+enum le_phys_preference
+{
+    /// The Host has no preference among the transmitter PHYs supported by the Controller
+    ALL_PHYS_TX_NO_PREF = (1 << 0),
+    /// The Host has no preference among the receiver PHYs supported by the Controller
+    ALL_PHYS_RX_NO_PREF = (1 << 1),
+};
+
+/// Specify what PHY the Controller has changed for TX/RX. HCI:7.7.65.12
+/*@TRACE*/
+enum le_phy_value
+{
+    PHY_UNDEF_VALUE    = 0,
+    PHY_1MBPS_VALUE    = 1,
+    PHY_2MBPS_VALUE    = 2,
+    PHY_CODED_VALUE    = 3,
+};
+
+/// Specify what PHY Host prefers to use for RX or TX HCI:7.8.48 / HCI:7.8.49
+enum le_phy_mask
+{
+    /// The Host prefers to use the LE 1M transmitter/receiver PHY (possibly among others)
+    PHY_1MBPS_BIT      = (1<<0),
+    PHY_1MBPS_POS      = (0),
+    /// The Host prefers to use the LE 2M transmitter/receiver PHY (possibly among others)
+    PHY_2MBPS_BIT      = (1<<1),
+    PHY_2MBPS_POS      = (1),
+    /// The Host prefers to use the LE Coded transmitter/receiver PHY (possibly among others)
+    PHY_CODED_BIT      = (1<<2),
+    PHY_CODED_POS      = (2),
+    /// The Host prefers to use the LE Coded transmitter/receiver PHY (possibly among others)
+    PHY_ALL        = (PHY_1MBPS_BIT | PHY_2MBPS_BIT | PHY_CODED_BIT),
+};
+
+/// Specify what rate Host prefers to use in transmission on coded PHY. HCI:7.8.49
+enum le_phy_opt
+{
+    /// The Host has no preferred coding when transmitting on the LE Coded PHY
+    PHY_OPT_NO_LE_CODED_TX_PREF,
+    /// The Host prefers that S=2 coding be used when transmitting on the LE Coded PHY
+    PHY_OPT_S2_LE_CODED_TX_PREF,
+    /// The Host prefers that S=8 coding be used when transmitting on the LE Coded PHY
+    PHY_OPT_S8_LE_CODED_TX_PREF,
+};
+
+
+enum le_phy_mode
+{
+    PHYS_MOD_STANDARD ,
+    PHYS_MOD_STABLE   ,
+    PHYS_MOD_MAX,
+};
+
+///Transmit Power level types
+enum
+{
+    ///Current Power Level
+    TX_PW_LVL_CURRENT             = 0x00,
+    ///Maximum power level
+    TX_PW_LVL_MAX,
+};
+
+///Controller to Host flow control
+enum
+{
+    /// C-> H flow control off
+    FLOW_CTRL_OFF                 = 0x00,
+    ///C->H ACL flow control on only
+    FLOW_CTRL_ON_ACL_OFF_SYNC,
+    ///C->H Sync flow control on only
+    FLOW_CTRL_OFF_ACL_ON_SYNC,
+    ///C->H ACL and Sync  flow control on
+    FLOW_CTRL_ON_ACL_ON_SYNC,
+};
+
+///LE Supported Host enable
+enum
+{
+    ///Disable LE supported Host
+    LE_SUPP_HOST_DIS              = 0x00,
+    ///Enable LE Supported Host
+    LE_SUPP_HOST_EN,
+};
+
+///Simultaneous LE Host enable
+enum
+{
+    ///Disable LE simultaneous Host disable
+    SIMULT_LE_HOST_DIS            = 0x00,
+    ///Enable LE simultaneous Host disable
+    SIMULT_LE_HOST_EN,
+};
+
+///Advertising HCI Type
+enum
+{
+    ///Connectable Undirected advertising
+    ADV_CONN_UNDIR                = 0x00,
+    ///Connectable high duty cycle directed advertising
+    ADV_CONN_DIR,
+    ///Discoverable undirected advertising
+    ADV_DISC_UNDIR,
+    ///Non-connectable undirected advertising
+    ADV_NONCONN_UNDIR,
+    ///Connectable low duty cycle directed advertising
+    ADV_CONN_DIR_LDC,
+};
+
+///Advertising event properties values for legacy PDUs
+enum
+{
+    ///Connectable and scannable undirected
+    ADV_IND                   = 0x13,
+    ///Connectable directed (low duty cycle)
+    ADV_DIRECT_LO_IND         = 0x15,
+    ///Connectable directed (high duty cycle)
+    ADV_DIRECT_HI_IND         = 0x1D,
+    ///Connectable directed (received)
+    ADV_DIRECT_IND            = 0x15,
+    ///Scannable undirected
+    ADV_SCAN_IND              = 0x12,
+    ///Non-connectable and non-scannable undirected
+    ADV_NONCONN_IND           = 0x10,
+    ///Scan response to an ADV_IND
+    SCAN_RSP_TO_ADV_IND       = 0x1B,
+    ///Scan response to an ADV_SCAN_IND
+    SCAN_RSP_TO_ADV_SCAN_IND  = 0x1A,
+};
+
+///Advertising event properties masks
+enum
+{
+    ///Connectable advertising
+    ADV_CON                = 0x01,
+    ///Scannable advertising
+    ADV_SCAN               = 0x02,
+    ///Directed advertising
+    ADV_DIRECT             = 0x04,
+    ///High duty cycle directed connectable advertising
+    ADV_DIRECT_HI          = 0x08,
+    ///Use legacy advertising PDUs
+    ADV_LEGACY             = 0x10,
+    ///Omit advertiser's address from all PDUs ("anonymous advertising")
+    ADV_ANONYMOUS          = 0x20,
+    ///Include TxPower in the extended header of the advertising PDU
+    ADV_TX_PWR             = 0x40,
+};
+
+///Scanning HCI Type
+enum
+{
+    ///Scan request
+    SCAN_REQ,
+    ///Scan response
+    SCAN_RSP,
+};
+
+///BD address type
+enum
+{
+    ///Public BD address
+    ADDR_PUBLIC                   = 0x00,
+    ///Random BD Address
+    ADDR_RAND,
+    /// Controller generates Resolvable Private Address based on the
+    /// local IRK from resolving list. If resolving list contains no matching
+    /// entry, use public address.
+    ADDR_RPA_OR_PUBLIC,
+    /// Controller generates Resolvable Private Address based on the
+    /// local IRK from resolving list. If resolving list contains no matching
+    /// entry, use random address.
+    ADDR_RPA_OR_RAND,
+    /// mask used to determine Address type in the air
+    ADDR_MASK                     = 0x01,
+    /// mask used to determine if an address is an RPA
+    ADDR_RPA_MASK                 = 0x02,
+    /// Random device address (controller unable to resolve)
+    ADDR_RAND_UNRESOLVED          = 0xFE,
+    /// No address provided (anonymous advertisement)
+    ADDR_NONE                     = 0xFF,
+};
+
+///Privacy mode type
+enum
+{
+    ///Network privacy mode
+    PRIV_TYPE_NETWORK = 0x00,
+    ///Device privacy mode
+    PRIV_TYPE_DEVICE  = 0x01,
+};
+
+/// Random Address type (2 MSB of the LE BD Address)
+enum rnd_addr_type
+{
+    /// Static random address           - 11 (MSB->LSB)
+    RND_STATIC_ADDR     = 0xC0,
+    /// Private non resolvable address  - 00 (MSB->LSB)
+    RND_NON_RSLV_ADDR   = 0x00,
+    /// Private resolvable address      - 01 (MSB->LSB)
+    RND_RSLV_ADDR       = 0x40,
+};
+
+///Advertising channels enables
+enum adv_channel_map
+{
+    ///Byte value for advertising channel map for channel 37 enable
+    ADV_CHNL_37_EN                = 0x01,
+    ///Byte value for advertising channel map for channel 38 enable
+    ADV_CHNL_38_EN                = 0x02,
+    ///Byte value for advertising channel map for channel 39 enable
+    ADV_CHNL_39_EN                = 0x04,
+    ///Byte value for advertising channel map for channel 37, 38 and 39 enable
+    ADV_ALL_CHNLS_EN              = 0x07,
+};
+
+///Advertising filter policy
+enum adv_filter_policy
+{
+    ///Allow both scan and connection requests from anyone
+    ADV_ALLOW_SCAN_ANY_CON_ANY    = 0x00,
+    ///Allow both scan req from White List devices only and connection req from anyone
+    ADV_ALLOW_SCAN_WLST_CON_ANY,
+    ///Allow both scan req from anyone and connection req from White List devices only
+    ADV_ALLOW_SCAN_ANY_CON_WLST,
+    ///Allow scan and connection requests from White List devices only
+    ADV_ALLOW_SCAN_WLST_CON_WLST,
+};
+
+///Advertising enables
+enum
+{
+    ///Disable advertising
+    ADV_DIS                       = 0x00,
+    ///Enable advertising
+    ADV_EN,
+};
+
+///LE Scan type
+enum
+{
+    ///Passive scan
+    SCAN_PASSIVE                  = 0x00,
+    ///Active scan
+    SCAN_ACTIVE,
+};
+
+///Scan filter policy
+enum scan_filter_policy
+{
+    ///Allow advertising packets from anyone
+    SCAN_ALLOW_ADV_ALL            = 0x00,
+    ///Allow advertising packets from White List devices only
+    SCAN_ALLOW_ADV_WLST,
+    ///Allow advertising packets from anyone and Direct adv using RPA in InitA
+    SCAN_ALLOW_ADV_ALL_AND_INIT_RPA,
+    ///Allow advertising packets from White List devices only and Direct adv using RPA in InitA
+    SCAN_ALLOW_ADV_WLST_AND_INIT_RPA,
+};
+
+///Le Scan enables
+enum
+{
+    ///Disable scan
+    SCAN_DIS                      = 0x00,
+    ///Enable scan
+    SCAN_EN,
+};
+
+///Filter duplicates
+enum scan_dup_filter_policy
+{
+    ///Disable filtering of duplicate packets
+    SCAN_FILT_DUPLIC_DIS          = 0x00,
+    ///Enable filtering of duplicate packets
+    SCAN_FILT_DUPLIC_EN,
+    ///Enable filtering of duplicate packets per scan period
+    SCAN_FILT_DUPLIC_EN_PER_PERIOD,
+};
+
+///Initiator Filter policy
+enum
+{
+    ///Initiator will ignore White List
+    INIT_FILT_IGNORE_WLST         = 0x00,
+    ///Initiator will use White List
+    INIT_FILT_USE_WLST,
+};
+
+///Periodic Synchronization Filter policy
+enum
+{
+    ///Use the Advertising SID, Advertising Address Type and Advertising Address parameters to determine
+    ///which advertiser to listen to
+    PER_SYNC_FILT_IGNORE_PAL        = 0x00,
+    ///Use the Periodic Advertiser List to determine which advertiser to listen to
+    PER_SYNC_FILT_USE_PAL,
+};
+
+///Transmitter test Packet Payload Type
+enum
+{
+    ///Pseudo-random 9 TX test payload type
+    PAYL_PSEUDO_RAND_9            = 0x00,
+    ///11110000 TX test payload type
+    PAYL_11110000,
+    ///10101010 TX test payload type
+    PAYL_10101010,
+    ///Pseudo-random 15 TX test payload type
+    PAYL_PSEUDO_RAND_15,
+    ///All 1s TX test payload type
+    PAYL_ALL_1,
+    ///All 0s TX test payload type
+    PAYL_ALL_0,
+    ///00001111 TX test payload type
+    PAYL_00001111,
+    ///01010101 TX test payload type
+    PAYL_01010101,
+};
+
+/// Constant defining the role
+enum
+{
+    ///Master role
+    ROLE_MASTER,
+    ///Slave role
+    ROLE_SLAVE,
+};
+
+/// Constant clock accuracy
+enum SCA
+{
+    ///Clock accuracy at 500PPM
+    SCA_500PPM,
+    ///Clock accuracy at 250PPM
+    SCA_250PPM,
+    ///Clock accuracy at 150PPM
+    SCA_150PPM,
+    ///Clock accuracy at 100PPM
+    SCA_100PPM,
+    ///Clock accuracy at 75PPM
+    SCA_75PPM,
+    ///Clock accuracy at 50PPM
+    SCA_50PPM,
+    ///Clock accuracy at 30PPM
+    SCA_30PPM,
+    ///Clock accuracy at 20PPM
+    SCA_20PPM
+};
+
+///Advertising pdu Type
+/*@TRACE*/
+enum ble_adv_type
+{
+    /// Undirected advertising
+    BLE_ADV_IND                = 0x00,
+    /// Directed advertising
+    BLE_ADV_DIRECT_IND         = 0x01,
+    /// Non Connectable advertising
+    BLE_ADV_NONCONN_IND        = 0x02,
+    /// Scan Request on primary channel
+    BLE_SCAN_REQ               = 0x03,
+    /// Scan Response on secondary channel
+    BLE_AUX_SCAN_REQ           = 0x03,
+
+    /// Scan Response
+    BLE_SCAN_RSP               = 0x04,
+    /// Connect Request on primary channel
+    BLE_CONNECT_IND            = 0x05,
+    /// Connect Request on secondary channel
+    BLE_AUX_CONNECT_REQ        = 0x05,
+
+    /// Discoverable advertising
+    BLE_ADV_SCAN_IND           = 0x06,
+
+    /// Extended Advertising indication on primary channel
+    BLE_ADV_EXT_IND            = 0x07,
+
+    /// ADV data indication on secondary channel
+    BLE_AUX_ADV_IND            = 0x07,
+    /// Scan response data on secondary channel
+    BLE_AUX_SCAN_RSP           = 0x07,
+    /// Periodic Advertising packet on secondary channel
+    BLE_AUX_SYNC_IND           = 0x07,
+    /// Continuation of advertising data on secondary channel
+    BLE_AUX_CHAIN_IND          = 0x07,
+    /// Response of the AUX_CONNECT_REQ on secondary channel to confirm that connection is accepted
+    BLE_AUX_CONNECT_RSP        = 0x08,
+
+    /// Reserved
+    BLE_RESERVED_PDU_TYPES,
+};
+
+
+/// LE Advertising Report Event Type HCI:7.7.65.2
+enum
+{
+    /// Connectable undirected advertising
+    ADV_IND_EVT = 0x00,
+    /// Connectable directed advertising
+    ADV_DIRECT_IND_EVT,
+    /// Scannable undirected advertising
+    ADV_SCAN_IND_EVT,
+    /// Non connectable undirected advertising
+    ADV_NONCONN_IND_EVT,
+    /// Scan Response
+    SCAN_RSP_EVT,
+    /// Reserved
+    RESERVED_ADV_EVT_TYPES,
+};
+
+/// LE Extended Advertising Report Event Type Bit Mask HCI:7.7.65.13
+
+/// Connectable advertising event
+#define CON_ADV_EVT_MSK            0x01
+/// Scannable advertising event
+#define SCAN_ADV_EVT_MSK           0x02
+/// Directed advertising event
+#define DIR_ADV_EVT_MSK            0x04
+/// Scan Response
+#define SCAN_RSP_EVT_MSK           0x08
+/// Legacy advertising PDUs
+#define LGCY_ADV_EVT_MSK           0x10
+
+/// Connectable undirected advertising
+#define LGCY_ADV_IND_EVT                    0x13 //LGCY_ADV_EVT_MSK|SCAN_ADV_EVT_MSK|CON_ADV_EVT_MSK
+/// Connectable directed advertising
+#define LGCY_ADV_DIRECT_IND_EVT             0x15 //LGCY_ADV_EVT_MSK|DIR_ADV_EVT_MSK|CON_ADV_EVT_MSK
+/// Scannable undirected advertising
+#define LGCY_ADV_SCAN_IND_EVT               0x12 //LGCY_ADV_EVT_MSK|SCAN_ADV_EVT_MSK
+/// Non connectable undirected advertising
+#define LGCY_ADV_NONCONN_IND_EVT            0x10 //LGCY_ADV_EVT_MSK
+/// Scan Response to ADV_IND
+#define LGCY_SCAN_RSP_TO_ADV_IND_EVT        0x1B //LGCY_ADV_EVT_MSK|SCAN_RSP_EVT_MSK|SCAN_ADV_EVT_MSK|CON_ADV_EVT_MSK
+/// Scan Response to ADV_SCAN_IND
+#define LGCY_SCAN_RSP_TO_ADV_SCAN_IND_EVT   0x1A //LGCY_ADV_EVT_MSK|SCAN_RSP_EVT_MSK|SCAN_ADV_EVT_MSK
+
+/// Offset of data status field in event type value
+#define ADV_EVT_DATA_STATUS_LSB                 5
+/// Mask for data status field in event type value
+#define ADV_EVT_DATA_STATUS_MASK                0x0060
+/// Data status of extended advertising event - Complete
+#define ADV_EVT_DATA_STATUS_COMPLETE            0
+/// Data status of extended advertising event - Incomplete, more data to come
+#define ADV_EVT_DATA_STATUS_INCOMPLETE          1
+/// Data status of extended advertising event - Incomplete, data truncated, no more to come
+#define ADV_EVT_DATA_STATUS_TRUNCATED           2
+/// Data status of extended advertising event - Reserved for future use
+#define ADV_EVT_DATA_STATUS_RESERVED            3
+
+/// Data status of periodic advertising event - Complete
+#define PER_ADV_EVT_DATA_STATUS_COMPLETE        0
+/// Data status of periodic advertising event - Incomplete, more data to come
+#define PER_ADV_EVT_DATA_STATUS_INCOMPLETE      1
+/// Data status of periodic advertising event - Incomplete, data truncated, no more to come
+#define PER_ADV_EVT_DATA_STATUS_TRUNCATED       2
+
+/// LLID packet
+enum
+{
+    /// Reserved for future use
+    LLID_ISO,
+    /// Continue
+    LLID_CONTINUE,
+    /// Start
+    LLID_START,
+    /// Control
+    LLID_CNTL
+};
+
+/// Remote OOB Data present parameter value HCI:7.1.29
+enum
+{
+    REM_OOB_DATA_NO        = 0x00,
+    REM_OOB_DATA_P192      = 0x01,
+    REM_OOB_DATA_P256      = 0x02,
+    REM_OOB_DATA_P192_P256 = 0x03,
+};
+
+/// Encryption enabled parameter in HCI_Enc_Chg_Evt HCI:7.7.8
+enum
+{
+    ENC_OFF                  = 0x00,
+    ENC_BRDER_E0_LE_AESCCM   = 0x01,
+    ENC_BREDR_AESCC          = 0x02,
+};
+
+/// Combined duration of Preamble and Access Address depending on the PHY used (in us)
+#define BLE_PREAMBLE_ACCESS_ADDR_DUR_1MBPS      (5*8)
+#define BLE_PREAMBLE_ACCESS_ADDR_DUR_2MBPS      (6*4)
+#define BLE_PREAMBLE_ACCESS_ADDR_DUR_125KBPS    (80+256)
+#define BLE_PREAMBLE_ACCESS_ADDR_DUR_500KBPS    (80+256)
+
+
+
+/// size of the Maximum Adv Extended header length
+#define BLE_EXT_MAX_HEADER_LEN               (63)
+
+/// size of the LEN & MODE info preceding the extended header
+#define BLE_EXT_ADV_PRE_HEADER_LEN           (1)
+/// size of the FLAGS info at start of the extended header
+#define BLE_EXT_ADV_HEADER_FLAGS_LEN         (1)
+/// size of the extended header in bytes (pre-header + flags)
+#define BLE_EXT_ADV_HEADER_LEN               (2)
+/// Size of supplemental info in extended header
+#define BLE_EXT_SUP_INFO_LEN                 (1)
+/// Size of ADV Data Info in extended header
+#define BLE_EXT_ADI_LEN                      (2)
+/// Size of Aux Pointer info in extended header
+#define BLE_EXT_AUX_PTR_LEN                  (3)
+/// Size of Sync PTR info in extended header
+#define BLE_EXT_SYNC_LEN                     (18)
+/// Size of TX Power info in extended header
+#define BLE_EXT_TX_PWR_LEN                   (1)
+
+/// Size of the Channel Map Update Indication in extended header
+#define BLE_EXT_CHM_UPD_IND_LEN              (9)
+/// AD Types for ACAD data
+#define BLE_EXT_ACAD_CHANNEL_MAP_UPDATE_INDICATION_AD_TYPE (0x28)
+
+/// Size of ACAD Data for BIG info - Not Encrypted
+#define BLE_EXT_ACAD_BIG_INFO_LEN            (29)
+/// Size of ACAD Data for BIG info - Encrypted
+#define BLE_EXT_ACAD_BIG_INFO_ENC_LEN        (58)
+/// AD Type reserved for Stream info ACAD data
+/// TODO [FBE] put 0x29 for the moment
+#define BLE_EXT_ACAD_BIG_INFO_AD_TYPE        (0x29)
+
+
+/// Extended Header Flags
+enum ble_ext_header_flags
+{
+    // AdvA
+    ADVA_BIT                = 0x01,
+    ADVA_POS                = 0,
+    // TargetA
+    TARGETA_BIT             = 0x02,
+    TARGETA_POS             = 1,
+    // SuppInfo
+    SUPPINFO_BIT            = 0x04,
+    SUPPINFO_POS            = 2,
+    // AdvDataInfo (ADI)
+    ADI_BIT                 = 0x08,
+    ADI_POS                 = 3,
+    // AuxPtr
+    AUXPTR_BIT              = 0x10,
+    AUXPTR_POS              = 4,
+    // SyncInfo
+    SYNCINFO_BIT            = 0x20,
+    SYNCINFO_POS            = 5,
+    // TxPower
+    TXPOWER_BIT             = 0x40,
+    TXPOWER_POS             = 6,
+};
+
+/// AUX pointer description
+enum ble_aux_ptr
+{
+    // Aux LL Channel
+    BLE_AUX_LL_CHANNEL_MASK = 0x0000003F,
+    BLE_AUX_LL_CHANNEL_LSB  = 0,
+    // Aux Clock Accuracy
+    BLE_AUX_CA_BIT          = 0x00000040,
+    BLE_AUX_CA_POS          = 6,
+    // Aux Offset Unit
+    BLE_AUX_OFFSET_UNIT_BIT = 0x00000080,
+    BLE_AUX_OFFSET_UNIT_POS = 7,
+    // Aux ADV offset
+    BLE_AUX_OFFSET_MASK     = 0x001FFF00,
+    BLE_AUX_OFFSET_LSB      = 8,
+    // Aux PHY
+    BLE_AUX_PHY_MASK        = 0x00E00000,
+    BLE_AUX_PHY_LSB         = 21,
+};
+
+/// Aux PHY values LL:2.3.4.5
+enum aux_phy
+{
+    AUX_PHY_1MBPS     = 0,
+    AUX_PHY_2MBPS     = 1,
+    AUX_PHY_CODED     = 2,
+};
+
+/// SyncInfo - Sync Offset description (13 bits)
+#define BLE_SYNC_OFFSET_MASK        0x1FFF
+#define BLE_SYNC_OFFSET_LSB         0
+
+/// SyncInfo - Offset Units description (1 bit)
+#define BLE_SYNC_OFFSET_UNITS_BIT   0x2000
+#define BLE_SYNC_OFFSET_UNITS_POS   13
+
+/// SyncInfo[8] - ChM description (5 bits of 37 bits)
+#define BLE_SYNC_CHMAP_END_MASK     0x1F
+#define BLE_SYNC_CHMAP_END_LSB      0
+
+/// SyncInfo[8] - SCA description (3 bits)
+#define BLE_SYNC_SCA_MASK           0xE0
+#define BLE_SYNC_SCA_LSB            5
+
+/// AdvDataInfo (ADI) field description
+enum ble_adi
+{
+    // Advertising Data ID (DID)
+    BLE_ADI_DID_MASK        = 0x0FFF,
+    BLE_ADI_DID_LSB         = 0,
+    // Advertising Set ID (SID)
+    BLE_ADI_SID_MASK        = 0xF000,
+    BLE_ADI_SID_LSB         = 12,
+};
+
+/// Advertising mode
+enum ble_adv_mode
+{
+    /// Non connectable and non scannable mode
+    BLE_MODE_NON_CON_SCAN   = 0,
+    /// Connectable Mode (accept connection request)
+    BLE_MODE_CONNECTABLE    = 1,
+    /// Scannable Mode (accept scan request)
+    BLE_MODE_SCANNABLE      = 2,
+    /// Reserved Advertising mode
+    BLE_MODE_RESERVED       = 3,
+};
+
+/// Advertising data operation
+enum adv_data_op
+{
+    /// Intermediate fragment of fragmented extended advertising data
+    ADV_DATA_OP_INTERMEDIATE_FRAG   = 0,
+    /// First fragment of fragmented extended advertising data
+    ADV_DATA_OP_FIRST_FRAG          = 1,
+    /// Last fragment of fragmented extended advertising data
+    ADV_DATA_OP_LAST_FRAG           = 2,
+    /// Complete extended advertising data
+    ADV_DATA_OP_COMPLETE            = 3,
+    /// Unchanged data (just update the Advertising DID)
+    ADV_DATA_OP_UNCHANGED_DATA      = 4,
+};
+
+/// Advertising data fragment preference
+enum adv_data_frag_pref
+{
+    /// The Controller may fragment all Host advertising data
+    ADV_DATA_MAY_FRAG         = 0,
+    /// The Controller should not fragment nor minimize fragmentation of Host advertising data
+    ADV_DATA_SHOULD_NOT_FRAG  = 1,
+};
+
+/*
+ * STRUCTURE DEFINITIONS
+ ****************************************************************************************
+ */
+
+///BD name structure
+struct bd_name
+{
+    ///length for name
+    uint8_t namelen;
+    ///array of bytes for name
+    uint8_t name[BD_NAME_SIZE];
+};
+
+///Structure device name
+/*@TRACE*/
+struct device_name
+{
+    ///array of bytes for name
+    uint8_t name[BD_NAME_SIZE];
+};
+
+///Structure name vector
+/*@TRACE*/
+struct name_vect
+{
+    uint8_t vect[NAME_VECT_SIZE];
+};
+
+/// lap structure
+/*@TRACE*/
+struct lap
+{
+    /// LAP
+    uint8_t A[BD_ADDR_LAP_LEN];
+};
+
+/// class structure
+/*@TRACE*/
+struct devclass
+{
+    /// class
+    uint8_t A[DEV_CLASS_LEN];
+};
+
+///Extended inquiry response structure
+/*@TRACE*/
+struct eir
+{
+    /// eir data
+    uint8_t data[EIR_DATA_SIZE];
+};
+
+///Event mask structure
+/*@TRACE*/
+struct evt_mask
+{
+    ///8-byte array for mask value
+    uint8_t mask[EVT_MASK_LEN];
+};
+
+///Host number of completed packets structure, for 1 connection handle
+struct host_cmpl_pkts
+{
+    ///Connection handle
+    uint16_t  con_hdl;
+    ///Number of completed packets
+    uint16_t  nb_cmpl_pkts;
+};
+
+///BD Address structure
+/*@TRACE*/
+struct bd_addr
+{
+    ///6-byte array address value
+    uint8_t  addr[BD_ADDR_LEN];
+};
+
+///Access Address structure
+/*@TRACE*/
+struct access_addr
+{
+    ///4-byte array access address
+    uint8_t  addr[ACCESS_ADDR_LEN];
+};
+
+///Advertising data structure
+/*@TRACE*/
+struct adv_data
+{
+    ///Maximum length data bytes array
+    uint8_t        data[ADV_DATA_LEN];
+};
+
+///Scan response data structure
+/*@TRACE*/
+struct scan_rsp_data
+{
+    ///Maximum length data bytes array
+    uint8_t        data[SCAN_RSP_DATA_LEN];
+};
+
+///Channel map structure
+/*@TRACE*/
+struct chnl_map
+{
+    ///10-bytes channel map array
+    uint8_t map[CHNL_MAP_LEN];
+};
+
+///Channel map structure
+/*@TRACE*/
+struct le_chnl_map
+{
+    ///5-byte channel map array
+    uint8_t map[LE_CHNL_MAP_LEN];
+};
+
+/// External frame period (duration & type) structure
+struct ext_fr_period
+{
+    /// Period_Duration
+    uint16_t duration;
+    /// Period_Type
+    uint8_t type;
+};
+
+/// MWS scan frequency (low & high) structure
+struct mws_scan_freq
+{
+    ///Scan_Frequency_Low
+    uint16_t low;
+    ///Scan_Frequency_High
+    uint16_t high;
+};
+
+/// MWS pattern interval (duration & type) structure
+struct mws_pattern_intv
+{
+    ///MWS_PATTERN_IntervalDuration
+    uint16_t duration;
+    ///MWS_PATTERN_IntervalType
+    uint8_t type;
+};
+
+
+/// MWS transport rates structure
+struct mws_trans_rate
+{
+    ///To_MWS_Baud_Rate
+    uint32_t to_mws_baud_rate;
+    ///From_MWS_Baud_Rate
+    uint32_t from_mws_baud_rate;
+};
+
+/// MWS transports strucutre
+struct mws_transport
+{
+    ///Transport_Layer
+    uint8_t layer_id;
+    ///Num_Baud_Rates
+    uint8_t num_baud_rates;
+    ///To/From_MWS_Baud_Rates
+    struct mws_trans_rate *rates;
+};
+
+
+/// SAM submaps structure
+struct sam_submaps
+{
+    //12-byte SAM submaps array of 2-bit fields
+    //The nth (numbering from 0) such field defines the submap type of the nth submap in the map:
+    // - SAM_SLOTS_SUBMAPPED: Each slot is individually available or unavailable as configured.
+    // - SAM_SLOTS_AVAILABLE: All slots are available for transmission and reception.
+    // - SAM_SLOTS_UNAVAILABLE: All slots are unavailable for transmission and reception.
+    // - Other: Reserved for future use.
+    uint8_t map[SAM_SUBMAPS_LEN];
+};
+
+/// SAM type0 submap structure
+struct sam_type0_submap
+{
+    //14-byte type0 submap array of 2-bit fields
+    //The nth (numbering from 0) such field defines the submap type of the nth submap in the map:
+    // - SAM_SLOT_NOT_AVAILABLE: The slot is not available for transmision or reception.
+    // - SAM_SLOT_TX_AVAILABLE: The slot is available for transmission but not reception.
+    // - SAM_SLOT_RX_AVAILABLE: The slot is available for reception but not transmission.
+    // - SAM_SLOT_TX_RX_AVAILABLE: The slot is available for both transmission and reception.
+    uint8_t map[SAM_TYPE0_SUBMAP_LEN];
+};
+
+///Long Term Key structure
+/*@TRACE*/
+struct ltk
+{
+    ///16-byte array for LTK value
+    uint8_t ltk[KEY_LEN];
+};
+
+///Identity Resolving Key structure
+/*@TRACE*/
+struct irk
+{
+    ///16-byte array for IRK value
+    uint8_t key[KEY_LEN];
+};
+
+/// Initialization vector (for AES-CCM encryption)
+/*@TRACE*/
+struct initialization_vector
+{
+    ///8-byte array
+    uint8_t vect[IV_LEN];
+};
+
+/// Bluetooth address with link key
+struct bd_addr_plus_key
+{
+    /// BD Address
+    struct bd_addr  bd_addr;
+    /// Link Key
+    struct ltk link_key;
+};
+
+///Random number structure
+/*@TRACE*/
+struct rand_nb
+{
+    ///8-byte array for random number
+    uint8_t     nb[RAND_NB_LEN];
+};
+
+///Advertising report structure
+/*@TRACE*/
+struct adv_report
+{
+    ///Event type:
+    /// - ADV_CONN_UNDIR: Connectable Undirected advertising
+    /// - ADV_CONN_DIR: Connectable directed advertising
+    /// - ADV_DISC_UNDIR: Discoverable undirected advertising
+    /// - ADV_NONCONN_UNDIR: Non-connectable undirected advertising
+    uint8_t        evt_type;
+    ///Advertising address type: public/random
+    uint8_t        adv_addr_type;
+    ///Advertising address value
+    struct bd_addr adv_addr;
+    ///Data length in advertising packet
+    uint8_t        data_len;
+    ///Data of advertising packet
+    uint8_t        data[ADV_DATA_LEN];
+    ///RSSI value for advertising packet (in dBm, between -127 and +20 dBm)
+    int8_t         rssi;
+};
+
+///Direct Advertising report structure
+/*@TRACE*/
+struct dir_adv_report
+{
+    ///Event type:
+    /// - ADV_CONN_DIR: Connectable directed advertising
+    uint8_t        evt_type;
+    ///Address type: public/random
+    uint8_t        addr_type;
+    ///Address value
+    struct bd_addr addr;
+    ///Direct address type: public/random
+    uint8_t        dir_addr_type;
+    ///Direct address value
+    struct bd_addr dir_addr;
+    ///RSSI value for advertising packet (in dBm, between -127 and +20 dBm)
+    int8_t         rssi;
+};
+
+///Exteneded Advertising report structure
+/*@TRACE*/
+struct ext_adv_report
+{
+    ///Event type
+    uint16_t       evt_type;
+    ///Advertising address type: public/random
+    uint8_t        adv_addr_type;
+    ///Advertising address value
+    struct bd_addr adv_addr;
+    ///Primary PHY
+    uint8_t        phy;
+    ///Secondary PHY
+    uint8_t        phy2;
+    ///Advertising SID
+    uint8_t        adv_sid;
+    ///Tx Power
+    uint8_t        tx_power;
+    ///RSSI value for advertising packet (in dBm, between -127 and +20 dBm)
+    int8_t         rssi;
+    ///Periodic Advertising interval (Time=N*1.25ms)
+    uint16_t       interval;
+    ///Direct address type
+    uint8_t        dir_addr_type;
+    ///Direct address value
+    struct bd_addr dir_addr;
+    ///Data length in advertising packet
+    uint8_t        data_len;
+    ///Data of advertising packet
+    uint8_t        data[EXT_ADV_DATA_MAX_LEN];
+};
+
+///Supported LE Features structure
+/*@TRACE*/
+struct le_features
+{
+    ///8-byte array for LE features
+    uint8_t feats[LE_FEATS_LEN];
+};
+
+///Simple pairing hash structure
+/*@TRACE*/
+struct hash
+{
+    ///16-byte array for LTK value
+    uint8_t C[KEY_LEN];
+};
+
+///Simple pairing randomizer structure
+/*@TRACE*/
+struct randomizer
+{
+    ///16-byte array for LTK value
+    uint8_t R[KEY_LEN];
+};
+
+///Pin code structure
+/*@TRACE*/
+struct pin_code
+{
+    ///16-byte array for PIN value
+    uint8_t pin[PIN_CODE_MAX_LEN];
+};
+
+///Sres structure
+/*@TRACE*/
+struct sres_nb
+{
+    ///8-byte array for random number
+    uint8_t  nb[SRES_LEN];
+};
+
+///aco structure
+/*@TRACE*/
+struct aco
+{
+    ///8-byte array for random number
+    uint8_t a[ACO_LEN];
+};
+
+///struct byte 16 to stay align with the sdl version
+/*@TRACE*/
+struct byte16
+{
+    uint8_t A[16];
+};
+
+///Controller number of completed packets structure
+/*@TRACE*/
+struct nb_cmpl_pk
+{
+    ///Connection handle
+    uint16_t con_hdl;
+    ///Controller number of data packets that have been completed since last time
+    uint16_t nb_hc_cmpl_pkts;
+};
+
+///Supported Features  structure
+/*@TRACE*/
+struct features
+{
+    ///8-byte array for features
+    uint8_t feats[FEATS_LEN];
+};
+
+///Supported commands structure
+/*@TRACE*/
+struct supp_cmds
+{
+    ///64-byte array for supported commands
+    uint8_t cmds[SUPP_CMDS_LEN];
+};
+
+///Supported LMP features structure
+struct lmp_features
+{
+    ///8-byte array for LMp features
+    uint8_t feats[FEATS_LEN];
+};
+
+///Simple pairing IO capabilities
+struct io_capability
+{
+    ///IO capability
+    uint8_t  io_cap;
+    /// Out Of Band Data present
+    bool  oob_data_present;
+    ///Authentication Requirement
+    uint8_t  aut_req;
+};
+
+///Public key
+struct pub_key_192
+{
+    uint8_t p_key[PUB_KEY_192_LEN/2];
+};
+
+///Public key
+struct pub_key_256
+{
+    uint8_t p_key[PUB_KEY_256_LEN/2];
+};
+
+///Simple pairing public keys 192
+struct sp_pub_key_192
+{
+    ///Public key X
+    struct pub_key_192 X;
+    ///Public key Y
+    struct pub_key_192 Y;
+};
+
+///Simple pairing public keys 256
+struct sp_pub_key_256
+{
+    ///Public key X
+    struct pub_key_256 X;
+    ///Public key Y
+    struct pub_key_256 Y;
+};
+
+///Supported LE states structure
+/*@TRACE*/
+struct le_states
+{
+    ///8-byte array for LE states
+    uint8_t  supp_states[LE_STATES_LEN];
+};
+
+///White List element structure
+struct white_list
+{
+    ///BD address of device entry
+    struct bd_addr wl_bdaddr;
+    ///BD address type of device entry
+    uint8_t wl_bdaddr_type;
+};
+
+///CRC initial value structure
+/*@TRACE*/
+struct crc_init
+{
+    ///3-byte array CRC initial value
+    uint8_t crc[CRC_INIT_LEN];
+};
+
+///Session key diversifier master or slave structure
+/*@TRACE*/
+struct sess_k_div_x
+{
+    ///8-byte array for diversifier value
+    uint8_t skdiv[SESS_KEY_DIV_LEN];
+};
+
+///Session key diversifier structure
+struct sess_k_div
+{
+    ///16-byte array for session key diversifier.
+    uint8_t skd[2*SESS_KEY_DIV_LEN];
+};
+
+///Initiator vector
+/*@TRACE*/
+struct init_vect
+{
+    ///4-byte array for vector
+    uint8_t iv[INIT_VECT_LEN];
+};
+
+/*@TRACE*/
+typedef struct t_public_key
+{
+    uint8_t x[PUBLIC_KEY_P256_LEN];
+    uint8_t y[PUBLIC_KEY_P256_LEN];
+
+} t_public_key;
+
+/// structure connection request LLData
+struct pdu_con_req_lldata
+{
+    /// Access address
+    struct access_addr  aa;
+
+    /// CRC init
+    struct crc_init     crcinit;
+
+    /// Window size (in units of 1,25 ms, i.e. 2 slots)
+    uint8_t             winsize;
+
+    /// Window offset (in units of 1,25 ms, i.e. 2 slots)
+    uint16_t            winoffset;
+
+    /// Interval (in units of 1,25 ms, i.e. 2 slots)
+    uint16_t            interval;
+
+    /// Latency
+    uint16_t            latency;
+
+    /// Timeout (in units of 10 ms, i.e. 16 slots)
+    uint16_t            timeout;
+
+    /// Channel mapping
+    struct le_chnl_map  chm;
+
+    /// Hopping
+    uint8_t             hop_sca;
+};
+
+/// structure connection request
+struct pdu_con_req
+{
+    /// Initiator address
+    struct bd_addr             inita;
+
+    /// Advertiser address
+    struct bd_addr             adva;
+
+    /// LLData
+    struct pdu_con_req_lldata  lldata;
+};
+
+/// structure advertising syncinfo field
+/*@TRACE*/
+struct sync_info
+{
+    /// sync offset
+    uint16_t sync_offset;
+
+    /// offset units
+    uint8_t offset_units;
+
+    /// interval
+    uint16_t interval;
+
+    /// channel mapping
+    struct le_chnl_map ch_map;
+
+    /// clock accuracy
+    uint8_t sca;
+
+    /// access address
+    struct access_addr  aa;
+
+    /// CRC init
+    struct crc_init crcinit;
+
+    /// event counter
+    uint16_t evt_counter;
+};
+
+/// Device specific link preferences
+typedef struct
+{
+    // **** Data Length Management ****
+    /// Suggested value for the Controller's maximum transmitted number of payload octets
+    uint16_t   suggested_max_tx_octets;
+    /// Suggested value for the Controller's maximum packet transmission time (in us)
+    uint16_t   suggested_max_tx_time;
+
+    // ****    PHY  Management     ****
+    /// Phy options indicated by Host (@see enum le_phy_opt) (by default 0 if never set by Host)
+    uint16_t   phy_opt;
+    /// Default TX preferred PHY to use (@see enum le_phy_mask)
+    uint8_t    tx_phys;
+    /// Default RX preferred PHY to use (@see enum le_phy_mask)
+    uint8_t    rx_phys;
+} link_pref_t;
+
+
+/// BIG info fields
+enum big_info_fields
+{
+    /// CHM_4 field
+    BIS_CHM_4_LSB      = 0,
+    BIS_CHM_4_MASK     = 0x1F,
+    /// SCA field
+    BIS_SCA_LSB        = 5,
+    BIS_SCA_MASK       = 0xE0,
+
+    /// NSE field
+    BIS_NSE_LSB        = 0,
+    BIS_NSE_MASK       = 0x1F,
+    /// BN field
+    BIS_BN_LSB         = 5,
+    BIS_BN_MASK        = 0xE0,
+
+    /// IRC field
+    BIS_IRC_LSB        = 0,
+    BIS_IRC_MASK       = 0x0F,
+    /// PTO field
+    BIS_PTO_LSB        = 4,
+    BIS_PTO_MASK       = 0xF0,
+};
+
+/// BIG Sync Info format
+struct big_info
+{
+    /// Time in microseconds from the start of the AUX_SYNC_IND packet containing
+    /// the BIG Info field to the next BIG anchor point
+    uint32_t big_offset;
+    /// ISO interval (1.25ms unit, range: 5ms to 4s)
+    uint16_t iso_interval;
+    /// Indicates the PHY used to transmit the Isochronous Channel PDUs.
+    uint8_t  phy;
+    /// bits[ 0:36]: Channel Map
+    /// bits[37:39]: BIS Master SCA
+    uint8_t  chm_sca[LE_CHNL_MAP_LEN];
+    ///  Number from which the Access Addresses for all Broadcast
+    uint32_t seed_access_addr;
+    ///  Number from which the CRC initialization value for all Data PDUs and Control PDUs are derived.
+    uint16_t base_crc_init;
+
+    /// Value of the event counter of the BIG event indicated by the BIS Offset
+    uint16_t big_evt_cnt;
+
+    // ** BIS Parameters
+    /// Number of BIS transmitted. (range 1 to 31)
+    uint8_t  nb_bis;
+    /// maximum size of payload in each Data PDU of each BIS in the BIG
+    uint8_t  max_pld_size;
+    /// Time in microseconds of every subevent in the BIG
+    uint32_t sub_interval;
+    /// Time in microseconds between an anchor point of a BIS and the anchor point of the next BIS
+    uint32_t bis_spacing;
+    /// bits[0:4]: Number of subevents (range 1 to 31)
+    /// bits[5:7]: BN which is the number of new payloads per BIS channel in every BIS channel interval (range 1 to 7).
+    uint8_t  nse_bn;
+    /// bits[0:3]: Immediate Repetition Count which is the number of subevents that are used for transmissions
+    ///            of the intended payload for that channel event (range 1 to 15).
+    /// bits[4:7]: PreTransmission offset numbers which is the number of Stream Interval spacing used for selecting
+    ///            payloads of events from the current channel event (range 0 to 15).
+    uint8_t  irc_pto;
+
+    // Encryption (Optional)
+    /// GSKD field is the Group Session Key Diversifier used to encrypt the BIS channel Data PDUs
+    uint8_t gskd[KEY_LEN];
+    /// GIV field is the Group Initialization Vector to be used to encrypt the BIS channel Data PDUs.
+    uint8_t giv[IV_LEN];
+    /// Payload Counter field contains 39bits payload counter of the BIS channel Data PDU.
+    /// MSB of the Payload Counter field shall be set to 0.
+    uint8_t bis_pkt_cnt[BLE_PLD_CNT_SIZE];
+};
+
+
+/// @} CO_BT_DEFINES
+#endif // CO_BT_DEFINES_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/co_dtm.h b/platform/atm2/ATM22xx-x1x/include/ble/co_dtm.h
new file mode 100644
index 0000000..a3367fd
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/co_dtm.h
@@ -0,0 +1,140 @@
+/**
+ ****************************************************************************************
+ *
+ * @file co_dtm.h
+ *
+ * @brief This file contains the Bluetooth LE DTM (Direct Test Mode) definitions
+ *
+ * Copyright (C) Atmosic 2019-2023
+ *
+ ****************************************************************************************
+ */
+
+#ifndef CO_DTM_H_
+#define CO_DTM_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup COMMON Common SW Block
+ * @{
+ ****************************************************************************************
+ */
+
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include <stdbool.h>       // standard boolean definitions
+#include <stddef.h>        // standard definitions
+#include <stdint.h>        // standard integer definitions
+#include "rwip_config.h"   // IP configuration
+#include "compiler.h"      // compiler definitions
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+// Command definitions, see: Part F 3.3
+#define DTM_MESSAGE_MAX_LEN  2
+#define DTM_CMD_SHIFT        14
+#define DTM_CMD_MASK         (0x3 << DTM_CMD_SHIFT)
+#define DTM_CMD_TEST_SETUP   0x00
+#define DTM_CMD_RX_TEST      0x01
+#define DTM_CMD_TX_TEST      0x02
+#define DTM_CMD_TEST_END     0x03
+#define DTM_GET_CMD(d)       (((d) & DTM_CMD_MASK) >> DTM_CMD_SHIFT)
+#define DTM_CTRL_SHIFT       8
+#define DTM_CTRL_MASK        (0x3F << DTM_CTRL_SHIFT)
+#define DTM_PARAM_SHIFT      0
+#define DTM_PARAM_MASK       (0xFF << DTM_PARAM_SHIFT)
+#define DTM_GET_CTRL(d)      (((d) & DTM_CTRL_MASK) >> DTM_CTRL_SHIFT)
+#define DTM_GET_PARAM(d)     (((d) & DTM_PARAM_MASK) >> DTM_PARAM_SHIFT)
+
+// Test Setup: CTRL and PARAM field definitions, see: Part F 3.3.2
+#define DTM_CTRL_RESET          0x00   // reset length extension and PHY rate settings
+#define DTM_CTRL_SET_LEN_EXT    0x01   // set length extension bits
+#define DTM_CTRL_SET_PHY_MODE   0x02   // set the test PHY rate
+#define DTM_CTRL_SET_RECV_MODE  0x03   // receiver assumption on tramsmitter modulation
+#define DTM_CTRL_READ_TEST_FEAT 0x04   // read test features
+#define DTM_CTRL_READ_PDU_SUPP  0x05   // read PDU RX/TX supported values
+
+// in the 4.2 and 5.0 spec, the param field starts at bit 2 (0..1 are don't cares)
+// but in 5.1, they reclaimed bits 0..1 but kept the param values
+// shifted by 2 bits to remain backwards compatible.
+// these definitions follow the 4.2/5.0 spec but are fully compatible with 5.1
+#define DTM_PARAM_FIELD_SHIFT   2
+#define DTM_PARAM_FIELD_MASK    (0x3F << DTM_PARAM_FIELD_SHIFT)
+#define DTM_PARAM_GET_FIELD(d)  (((d) & DTM_PARAM_FIELD_MASK) >> DTM_PARAM_FIELD_SHIFT)
+
+// CTRL : set length
+#define DTM_PARAM_GET_LEN_EXT(d)  DTM_PARAM_GET_FIELD(d)
+#define DTM_LEN_EXT_SHIFT         6
+
+// CTRL : set phy mode
+#define DTM_PARAM_GET_PHY_MODE(d) DTM_PARAM_GET_FIELD(d)
+#define DTM_PARAM_PHY_MODE_LE_1M  0x01
+#define DTM_PARAM_PHY_MODE_LE_2M  0x02
+#define DTM_PARAM_PHY_MODE_LE_S8  0x03
+#define DTM_PARAM_PHY_MODE_LE_S2  0x04
+#define DTM_PARAM_PHY_MODE_MAX    0x04
+
+// CTRL : set expected transmitter modulation
+#define DTM_PARAM_RECV_ASSUME_STD 0x00		// standard modulation
+#define DTM_PARAM_RECV_ASSUME_STABLE 0x01   // stable modulation
+
+// CTRL : read supported features
+#define DTM_PARAM_GET_READ_TEST_FEAT_TYPE(d)  DTM_PARAM_GET_FIELD(d)
+#define DTM_PARAM_READ_TEST_FEAT_TEST_CASES 0x00
+#define DTM_SUPPORT_LENGTH_EXT_MASK  		(0x1 << 0)  // note: the spec starts these at bit
+#define DTM_SUPPORT_LE_2M_PHY_MASK          (0x1 << 1)  // at 1 to jump over the status bit.
+#define DTM_SUPPORT_TX_HAS_STABLE_MOD_IDX   (0x1 << 2)  // here we are relative to bit 0.
+#define DTM_SUPPORT_TX_HAS_STD_MOD_IDX      0
+
+// CTRL :  Read PDU Supported Maximum Values
+#define DTM_PARAM_GET_PDU_SUP_TYPE(d) DTM_PARAM_GET_FIELD(d)
+#define DTM_PARAM_READ_PDU_MAX_TX_OCTETS   0x00
+#define DTM_PARAM_READ_PDU_MAX_TX_TIME     0x01
+#define DTM_PARAM_READ_PDU_MAX_RX_OCTETS   0x02
+#define DTM_PARAM_READ_PDU_MAX_RX_TIME     0x03
+
+// Test End: CTRL and PARAM field definitions
+#define DTM_END_CTRL_END          0x00
+#define DTM_END_PARAM_END         0x00
+
+// Status and Packet Report definitions, see: Part F 3.3.2
+#define DTM_EVENT_TYPE_STATUS      0
+#define DTM_EVENT_TYPE_PKT_REPORT  1
+#define DTM_EVENT_TYPE_SHIFT       15
+#define DTM_EVENT_STATUS_MASK      0x1
+#define DTM_EVENT_RESP_MASK        0x3FFF   // 14 bits
+#define DTM_EVENT_RESP_SHIFT       1
+#define DTM_EVENT_PKT_COUNT_MASK   0x7FFF   // 15 bits
+#define DTM_ASSEMBLE_STATUS_RESPONSE(status,resp)         \
+	((DTM_EVENT_TYPE_STATUS) << DTM_EVENT_TYPE_SHIFT)   | \
+	((status) & DTM_EVENT_STATUS_MASK)                  | \
+	(((resp) & DTM_EVENT_RESP_MASK) << DTM_EVENT_RESP_SHIFT)
+#define DTM_ASSEMBLE_PKT_REPORT(count)                     \
+	((DTM_EVENT_TYPE_PKT_REPORT) << DTM_EVENT_TYPE_SHIFT)| \
+	((count) & DTM_EVENT_PKT_COUNT_MASK)
+
+// Transmitter and Receiver Test Command, see: Part F 3.4
+#define DTM_TXRX_TEST_FREQ_SHIFT     8
+#define DTM_TXRX_TEST_FREQ_MASK     (0x3F  << DTM_TXRX_TEST_FREQ_SHIFT)
+#define DTM_GET_TXRX_FREQ(d)      (((d) & DTM_TXRX_TEST_FREQ_MASK ) >> DTM_TXRX_TEST_FREQ_SHIFT)
+
+#define DTM_TXRX_TEST_LEN_SHIFT      2
+#define DTM_TXRX_TEST_LEN_MASK      (0x3F  << DTM_TXRX_TEST_LEN_SHIFT)
+#define DTM_GET_TXRX_LEN(d)       (((d) & DTM_TXRX_TEST_LEN_MASK ) >> DTM_TXRX_TEST_LEN_SHIFT)
+
+#define DTM_TXRX_TEST_PKT_SHIFT      0
+#define DTM_TXRX_TEST_PKT_MASK      (0x3 << DTM_TXRX_TEST_PKT_SHIFT)
+#define DTM_GET_TXRX_PKT(d)       (((d) & DTM_TXRX_TEST_PKT_MASK) >> DTM_TXRX_TEST_PKT_SHIFT)
+
+#define DTM_PKT_TYPE_PRBS9        0x00
+#define DTM_PKT_TYPE_11110000     0x01
+#define DTM_PKT_TYPE_10101010     0x02
+#define DTM_PKT_TYPE_LEC_11111111 0x03
+
+#endif // CO_DTM_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/co_endian.h b/platform/atm2/ATM22xx-x1x/include/ble/co_endian.h
new file mode 100644
index 0000000..d2d08a9
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/co_endian.h
@@ -0,0 +1,349 @@
+/**
+ ****************************************************************************************
+ *
+ * @file co_endian.h
+ *
+ * @brief Common endianness conversion functions
+ *
+ * Copyright (C) RivieraWaves 2009-2015
+ * Copyright (C) Atmosic 2023
+ *
+ ****************************************************************************************
+ */
+
+#ifndef _CO_ENDIAN_H_
+#define _CO_ENDIAN_H_
+
+#include <stdint.h>              // standard integer definitions
+#include "rwip_config.h"         // stack configuration
+#include "arch.h"                // architectural platform definition
+
+/**
+ ****************************************************************************************
+ * @defgroup CO_ENDIAN Endianness
+ * @ingroup COMMON
+ * @brief  Endianness conversion functions.
+ *
+ * This set of functions converts values between the local system
+ * and a external one. It is inspired from the <tt>htonl</tt>-like functions
+ * from the standard C library.
+ *
+ * Example:
+ * @code
+ *  struct eth_header   *header = get_header();  // get pointer on Eth II packet header
+ *  uint16_t            eth_id;                  // will contain the type of the packet
+ *  eth_id = co_ntohs(header->eth_id);           // retrieve the type with correct endianness
+ * @endcode
+ *
+ * @{
+ * ****************************************************************************************
+ */
+
+
+/**
+ ****************************************************************************************
+ * @brief Swap bytes of an array of bytes
+ * .
+ * The swap is done in every case. Should not be called directly.
+ *
+ * @param[in] p_val_out The output value.
+ * @param[in] p_val_in  The input value.
+ *
+ * @param[in] len       number of bytes to swap
+ ****************************************************************************************
+ */
+__INLINE void co_bswap(uint8_t* p_val_out, const uint8_t* p_val_in, uint16_t len)
+{
+    while (len > 0)
+    {
+        len--;
+        *p_val_out = p_val_in[len];
+        p_val_out++;
+    }
+}
+/// @} CO_ENDIAN
+
+/**
+ ****************************************************************************************
+ * @brief Swap bytes of a 32 bits value.
+ * The swap is done in every case. Should not be called directly.
+ * @param[in] val32 The 32 bits value to swap.
+ * @return The 32 bit swapped value.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_bswap32(uint32_t val32)
+{
+    return (val32<<24) | ((val32<<8)&0xFF0000) | ((val32>>8)&0xFF00) | ((val32>>24)&0xFF);
+}
+
+/**
+ ****************************************************************************************
+ * @brief Swap bytes of a 24 bits value.
+ * The swap is done in every case. Should not be called directly.
+ * @param[in] val24 The 24 bits value to swap.
+ * @return The 24 bit swapped value.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_bswap24(uint32_t val24)
+{
+    return ((val24<<16)&0xFF0000) | ((val24)&0xFF00) | ((val24>>16)&0xFF);
+}
+
+/**
+ ****************************************************************************************
+ * @brief Swap bytes of a 16 bits value.
+ * The swap is done in every case. Should not be called directly.
+ * @param[in] val16 The 16 bit value to swap.
+ * @return The 16 bit swapped value.
+ ****************************************************************************************
+ */
+__INLINE uint16_t co_bswap16(uint16_t val16)
+{
+    return ((val16<<8)&0xFF00) | ((val16>>8)&0xFF);
+}
+/// @} CO_ENDIAN
+
+
+
+
+/**
+ * ****************************************************************************************
+ * @defgroup CO_ENDIAN_NET Endianness (Network)
+ * @ingroup CO_ENDIAN
+ * @brief Endianness conversion functions for Network data
+ *
+ *  Converts values between the local system and big-endian network data
+ *  (e.g. IP, Ethernet, but NOT WLAN).
+ *
+ *  The \b host term in the descriptions of these functions refers
+ *  to the local system, i.e. \b application or \b embedded system.
+ *  Therefore, these functions will behave differently depending on which
+ *  side they are used. The reason of this terminology is to keep the
+ *  same name than the standard C function.
+ *
+ *  Behavior will depends on the endianness of the host:
+ *  - little endian: swap bytes;
+ *  - big endian: identity function.
+ *
+ *  @{
+ * ****************************************************************************************
+ *  */
+
+/**
+ ****************************************************************************************
+ * @brief Convert host to network long word.
+ *
+ * @param[in] hostlong    Long word value to convert.
+ *
+ * @return The converted long word.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_htonl(uint32_t hostlong)
+{
+    #if (!CPU_LE)
+        return hostlong;
+    #else
+        return co_bswap32(hostlong);
+    #endif // CPU_LE
+}
+
+/**
+ ****************************************************************************************
+ * @brief Convert host to network long 24-bit value.
+ *
+ * @param[in] host24    24-bit value to convert.
+ *
+ * @return The converted 24-but value.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_hton24(uint32_t host24)
+{
+    #if (!CPU_LE)
+        return host24;
+    #else
+        return co_bswap24(host24);
+    #endif // CPU_LE
+}
+
+/**
+ ****************************************************************************************
+ * @brief Convert host to network short word.
+ *
+ * @param[in] hostshort Short word value to convert.
+ *
+ * @return The converted short word.
+ ****************************************************************************************
+ */
+__INLINE uint16_t co_htons(uint16_t hostshort)
+{
+    #if (!CPU_LE)
+        return hostshort;
+    #else
+        return co_bswap16(hostshort);
+    #endif // CPU_LE
+}
+
+/**
+ ****************************************************************************************
+ * @brief Convert network to host long word.
+ *
+ * @param[in] netlong Long word value to convert.
+ *
+ * @return The converted long word.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_ntohl(uint32_t netlong)
+{
+    return co_htonl(netlong);
+}
+
+/**
+ ****************************************************************************************
+ * @brief Convert network to host 24-bit value.
+ *
+ * @param[in] val24 24-bit to convert.
+ *
+ * @return The converted 24-bit value.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_ntoh24(uint32_t val24)
+{
+    return co_hton24(val24);
+}
+
+/**
+ ****************************************************************************************
+ * @brief Convert network to host short word.
+ *
+ * @param[in] netshort Short word value to convert.
+ *
+ * @return The converted short word.
+ ****************************************************************************************
+ */
+__INLINE uint16_t co_ntohs(uint16_t netshort)
+{
+    return co_htons(netshort);
+}
+/// @} CO_ENDIAN_NET
+
+/**
+ * ****************************************************************************************
+ * @defgroup CO_ENDIAN_BT Endianness (BT)
+ *  @ingroup CO_ENDIAN
+ *  @brief Endianness conversion functions for Bluetooth data (HCI and protocol)
+ *
+ *  Converts values between the local system and little-endian Bluetooth data.
+ *
+ *  The \b host term in the descriptions of these functions refers
+ *  to the local system (check \ref CO_ENDIAN_NET "this comment").
+ *
+ *  Behavior will depends on the endianness of the host:
+ *  - little endian: identity function;
+ *  - big endian: swap bytes.
+ *
+ *  @addtogroup CO_ENDIAN_BT
+ *  @{
+ *  ****************************************************************************************
+ *  */
+
+
+/**
+ ****************************************************************************************
+ * @brief Convert Bluetooth to host 24-bit value.
+ *
+ * @param[in] val24 24-bit to convert.
+ *
+ * @return The converted 24-bit value.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_htob24(uint32_t val24)
+{
+    #if (CPU_LE)
+        return val24;
+    #else
+        return co_hton24(val24);
+    #endif // CPU_LE
+}
+
+/**
+ ****************************************************************************************
+ * @brief Convert host to Bluetooth long word.
+ *
+ * @param[in] hostlong Long word value to convert.
+ *
+ * @return The converted long word.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_htobl(uint32_t hostlong)
+{
+    #if (CPU_LE)
+        return hostlong;
+    #else
+        return co_bswap32(hostlong);
+    #endif // CPU_LE
+}
+
+/**
+ ****************************************************************************************
+ * @brief Convert host to Bluetooth short word.
+ *
+ * @param[in] hostshort Short word value to convert.
+ *
+ * @return The converted short word.
+ ****************************************************************************************
+ */
+__INLINE uint16_t co_htobs(uint16_t hostshort)
+{
+    #if (CPU_LE)
+        return hostshort;
+    #else
+        return co_bswap16(hostshort);
+    #endif // CPU_LE
+}
+
+
+/**
+ ****************************************************************************************
+ * @brief Convert Bluetooth to host 24-bit value.
+ *
+ * @param[in] val24 24-bit to convert.
+ *
+ * @return The converted 24-bit value.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_btoh24(uint32_t val24)
+{
+    return co_htob24(val24);
+}
+
+/**
+ ****************************************************************************************
+ * @brief Convert Bluetooth to host long word.
+ *
+ * @param[in] btlong Long word value to convert.
+ *
+ * @return The converted long word.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_btohl(uint32_t btlong)
+{
+    return co_htobl(btlong);
+}
+
+
+/**
+ ****************************************************************************************
+ * @brief Convert Bluetooth to host short word.
+ *
+ * @param[in] btshort Short word value to convert.
+ *
+ * @return The converted short word.
+ ****************************************************************************************
+ */
+__INLINE uint16_t co_btohs(uint16_t btshort)
+{
+    return co_htobs(btshort);
+}
+/// @} CO_ENDIAN
+
+#endif // _CO_ENDIAN_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/co_error.h b/platform/atm2/ATM22xx-x1x/include/ble/co_error.h
new file mode 100644
index 0000000..8c592d9
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/co_error.h
@@ -0,0 +1,115 @@
+/**
+ ****************************************************************************************
+ *
+ * @file co_error.h
+ *
+ * @brief List of codes for error in RW Software.
+ *
+ * Copyright (C) RivieraWaves 2009-2015
+ *
+ *
+ ****************************************************************************************
+ */
+
+#ifndef CO_ERROR_H_
+#define CO_ERROR_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup CO_ERROR Error Codes
+ * @ingroup COMMON
+ * @brief Defines error codes in messages.
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+enum co_error
+{
+/*****************************************************
+ ***              ERROR CODES                      ***
+ *****************************************************/
+
+    CO_ERROR_NO_ERROR                        = 0x00,
+    CO_ERROR_UNKNOWN_HCI_COMMAND             = 0x01,
+    CO_ERROR_UNKNOWN_CONNECTION_ID           = 0x02,
+    CO_ERROR_HARDWARE_FAILURE                = 0x03,
+    CO_ERROR_PAGE_TIMEOUT                    = 0x04,
+    CO_ERROR_AUTH_FAILURE                    = 0x05,
+    CO_ERROR_PIN_MISSING                     = 0x06,
+    CO_ERROR_MEMORY_CAPA_EXCEED              = 0x07,
+    CO_ERROR_CON_TIMEOUT                     = 0x08,
+    CO_ERROR_CON_LIMIT_EXCEED                = 0x09,
+    CO_ERROR_SYNC_CON_LIMIT_DEV_EXCEED       = 0x0A,
+    CO_ERROR_CON_ALREADY_EXISTS              = 0x0B,
+    CO_ERROR_COMMAND_DISALLOWED              = 0x0C,
+    CO_ERROR_CONN_REJ_LIMITED_RESOURCES      = 0x0D,
+    CO_ERROR_CONN_REJ_SECURITY_REASONS       = 0x0E,
+    CO_ERROR_CONN_REJ_UNACCEPTABLE_BDADDR    = 0x0F,
+    CO_ERROR_CONN_ACCEPT_TIMEOUT_EXCEED      = 0x10,
+    CO_ERROR_UNSUPPORTED                     = 0x11,
+    CO_ERROR_INVALID_HCI_PARAM               = 0x12,
+    CO_ERROR_REMOTE_USER_TERM_CON            = 0x13,
+    CO_ERROR_REMOTE_DEV_TERM_LOW_RESOURCES   = 0x14,
+    CO_ERROR_REMOTE_DEV_POWER_OFF            = 0x15,
+    CO_ERROR_CON_TERM_BY_LOCAL_HOST          = 0x16,
+    CO_ERROR_REPEATED_ATTEMPTS               = 0x17,
+    CO_ERROR_PAIRING_NOT_ALLOWED             = 0x18,
+    CO_ERROR_UNKNOWN_LMP_PDU                 = 0x19,
+    CO_ERROR_UNSUPPORTED_REMOTE_FEATURE      = 0x1A,
+    CO_ERROR_SCO_OFFSET_REJECTED             = 0x1B,
+    CO_ERROR_SCO_INTERVAL_REJECTED           = 0x1C,
+    CO_ERROR_SCO_AIR_MODE_REJECTED           = 0x1D,
+    CO_ERROR_INVALID_LMP_PARAM               = 0x1E,
+    CO_ERROR_UNSPECIFIED_ERROR               = 0x1F,
+    CO_ERROR_UNSUPPORTED_LMP_PARAM_VALUE     = 0x20,
+    CO_ERROR_ROLE_CHANGE_NOT_ALLOWED         = 0x21,
+    CO_ERROR_LMP_RSP_TIMEOUT                 = 0x22,
+    CO_ERROR_LMP_COLLISION                   = 0x23,
+    CO_ERROR_LMP_PDU_NOT_ALLOWED             = 0x24,
+    CO_ERROR_ENC_MODE_NOT_ACCEPT             = 0x25,
+    CO_ERROR_LINK_KEY_CANT_CHANGE            = 0x26,
+    CO_ERROR_QOS_NOT_SUPPORTED               = 0x27,
+    CO_ERROR_INSTANT_PASSED                  = 0x28,
+    CO_ERROR_PAIRING_WITH_UNIT_KEY_NOT_SUP   = 0x29,
+    CO_ERROR_DIFF_TRANSACTION_COLLISION      = 0x2A,
+    CO_ERROR_QOS_UNACCEPTABLE_PARAM          = 0x2C,
+    CO_ERROR_QOS_REJECTED                    = 0x2D,
+    CO_ERROR_CHANNEL_CLASS_NOT_SUP           = 0x2E,
+    CO_ERROR_INSUFFICIENT_SECURITY           = 0x2F,
+    CO_ERROR_PARAM_OUT_OF_MAND_RANGE         = 0x30,
+    CO_ERROR_ROLE_SWITCH_PEND                = 0x32, /* LM_ROLE_SWITCH_PENDING               */
+    CO_ERROR_RESERVED_SLOT_VIOLATION         = 0x34, /* LM_RESERVED_SLOT_VIOLATION           */
+    CO_ERROR_ROLE_SWITCH_FAIL                = 0x35, /* LM_ROLE_SWITCH_FAILED                */
+    CO_ERROR_EIR_TOO_LARGE                   = 0x36, /* LM_EXTENDED_INQUIRY_RESPONSE_TOO_LARGE */
+    CO_ERROR_SP_NOT_SUPPORTED_HOST           = 0x37,
+    CO_ERROR_HOST_BUSY_PAIRING               = 0x38,
+    CO_ERROR_CONTROLLER_BUSY                 = 0x3A,
+    CO_ERROR_UNACCEPTABLE_CONN_PARAM         = 0x3B,
+    CO_ERROR_ADV_TO                          = 0x3C,
+    CO_ERROR_TERMINATED_MIC_FAILURE          = 0x3D,
+    CO_ERROR_CONN_FAILED_TO_BE_EST           = 0x3E,
+    CO_ERROR_CCA_REJ_USE_CLOCK_DRAG          = 0x40,
+    CO_ERROR_TYPE0_SUBMAP_NOT_DEFINED        = 0x41,
+    CO_ERROR_UNKNOWN_ADVERTISING_ID          = 0x42,
+    CO_ERROR_LIMIT_REACHED                   = 0x43,
+    CO_ERROR_OPERATION_CANCELED_BY_HOST      = 0x44,
+
+    CO_ERROR_UNDEFINED                       = 0xFF,
+
+
+/*****************************************************
+ ***              HW ERROR CODES                   ***
+ *****************************************************/
+
+    CO_ERROR_HW_UART_OUT_OF_SYNC            = 0x00,
+    CO_ERROR_HW_MEM_ALLOC_FAIL              = 0x01,
+};
+
+/// @} CO_ERROR
+
+#endif // CO_ERROR_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/co_hci.h b/platform/atm2/ATM22xx-x1x/include/ble/co_hci.h
new file mode 100644
index 0000000..0b70677
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/co_hci.h
@@ -0,0 +1,5518 @@
+/**
+ ****************************************************************************************
+ *
+ * @file co_hci.h
+ *
+ * @brief This file contains the HCI Bluetooth defines, enumerations and structures
+ *        definitions for use by all modules in RW stack.
+ *
+ * Copyright (C) RivieraWaves 2009-2015
+ * Copyright (C) Atmosic 2023
+ *
+ ****************************************************************************************
+ */
+
+#ifndef CO_HCI_H_
+#define CO_HCI_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup COMMON Common SW Block
+ * @{
+ ****************************************************************************************
+ */
+
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include <stdbool.h>       // standard boolean definitions
+#include <stddef.h>        // standard definitions
+#include <stdint.h>        // standard integer definitions
+
+#include "rwip_config.h"   // IP configuration
+
+#include "compiler.h"      // compiler definitions
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+
+/******************************************************************************************/
+/* -------------------------   H4TL DEFINITIONS Part IV.A    -----------------------------*/
+/******************************************************************************************/
+
+///HCI Transport Header length - change if different transport
+#define HCI_TRANSPORT_HDR_LEN                       0x01
+
+///UART header: command message type
+#define HCI_CMD_MSG_TYPE                            0x01
+
+///UART header: ACL data message type
+#define HCI_ACL_MSG_TYPE                            0x02
+
+///UART header: Synchronous data message type
+#define HCI_SYNC_MSG_TYPE                           0x03
+
+///UART header: event message type
+#define HCI_EVT_MSG_TYPE                            0x04
+
+/******************************************************************************************/
+/* -------------------------   HCI DEFINITIONS Part II.E     -----------------------------*/
+/******************************************************************************************/
+
+///HCI Command Opcode byte length
+#define HCI_CMD_OPCODE_LEN         (0x02)
+
+///HCI Event code byte length
+#define HCI_EVT_CODE_LEN           (0x01)
+
+///HCI Command/Event parameter length field byte length
+#define HCI_CMDEVT_PARLEN_LEN      (0x01)
+
+///HCI Command header length
+#define HCI_CMD_HDR_LEN            (HCI_CMD_OPCODE_LEN + HCI_CMDEVT_PARLEN_LEN)
+
+///HCI Event header length
+#define HCI_EVT_HDR_LEN            (HCI_EVT_CODE_LEN + HCI_CMDEVT_PARLEN_LEN)
+
+/// HCI ACL header: handle and flags decoding
+enum  hci_acl_hdr_fields
+{
+    /// bits[00:11]: Connection handle
+    HCI_ACL_HDR_HDL_LSB        = (0),
+    HCI_ACL_HDR_HDL_MASK       = (0x0FFF),
+    /// bits[12:13]: Packet boundary flag
+    HCI_ACL_HDR_PB_FLAG_LSB    = (12),
+    HCI_ACL_HDR_PB_FLAG_MASK   = (0x3000),
+    /// bits[14:15]: Broadcast flag
+    HCI_ACL_HDR_BC_FLAG_LSB    = (14),
+    HCI_ACL_HDR_BC_FLAG_MASK   = (0xC000),
+    /// Packet boundary and Broadcast flags
+    HCI_ACL_HDR_DATA_FLAGS_LSB  = (12),
+    HCI_ACL_HDR_DATA_FLAGS_MASK = (0xF000),
+};
+
+#define HCI_ACL_HDR_HDL_FLAGS_POS  (0)
+#define HCI_ACL_HDR_HDL_FLAGS_LEN  (2)
+/// HCI ACL header: data length field length
+#define HCI_ACL_HDR_DATA_LEN_POS   (HCI_ACL_HDR_HDL_FLAGS_LEN)
+#define HCI_ACL_HDR_DATA_LEN_LEN   (2)
+
+///HCI ACL data packet header length
+#define HCI_ACL_HDR_LEN            (HCI_ACL_HDR_HDL_FLAGS_LEN + HCI_ACL_HDR_DATA_LEN_LEN)
+
+/// HCI Synchronous header: handle and flags decoding
+enum hci_syn_hdr_fields
+{
+    /// bits[00:11]: Connection handle
+    HCI_SYNC_HDR_HDL_LSB   = (0),
+    HCI_SYNC_HDR_HDL_MASK  = (0x0FFF),
+    /// bits[12:13]: Packet status flag
+    HCI_SYNC_HDR_PSF_LSB   = (12),
+    HCI_SYNC_HDR_PSF_MASK  = (0x3000),
+    /// bits[14:15]: RFU
+    HCI_SYNC_HDR_RFU_LSB   = (14),
+    HCI_SYNC_HDR_RFU_MASK  = (0xC000),
+};
+
+#define HCI_SYNC_HDR_HDL_FLAGS_POS  (0)
+#define HCI_SYNC_HDR_HDL_FLAGS_LEN  (2)
+
+
+/// HCI Synchronous header: data length field length
+#define HCI_SYNC_HDR_DATA_LEN_POS   (HCI_SYNC_HDR_HDL_FLAGS_LEN)
+#define HCI_SYNC_HDR_DATA_LEN_LEN   (1)
+#define HCI_SYNC_MAX_DATA_SIZE      (255)
+
+///HCI sync data packet header length
+#define HCI_SYNC_HDR_LEN           (HCI_SYNC_HDR_HDL_FLAGS_LEN + HCI_SYNC_HDR_DATA_LEN_LEN)
+
+///HCI Command Complete Event minimum parameter length: 1(nb_pk)+2(opcode)
+#define HCI_CCEVT_HDR_PARLEN       (0x03)
+
+///HCI Command Complete Event header length:1(code)+1(len)+1(pk)+2(opcode)
+#define HCI_CCEVT_HDR_LEN          (HCI_EVT_HDR_LEN + HCI_CCEVT_HDR_PARLEN)
+
+///HCI Basic Command Complete Event packet length
+#define HCI_CCEVT_BASIC_LEN        (HCI_CCEVT_HDR_LEN + 1)
+
+///HCI Command Status Event parameter length - constant
+#define HCI_CSEVT_PARLEN           (0x04)
+
+///HCI Command Status Event length:1(code)+1(len)+1(st)+1(pk)+2(opcode)
+#define HCI_CSEVT_LEN              (HCI_EVT_HDR_LEN + HCI_CSEVT_PARLEN)
+
+///HCI Reset Command parameter length
+#define HCI_RESET_CMD_PARLEN       0
+
+/// Default return parameter length for HCI Command Complete Event
+#define HCI_CCEVT_BASIC_RETPAR_LEN 1
+
+/// Max HCI commands param size
+#define HCI_MAX_CMD_PARAM_SIZE    255
+
+/// Macro to extract OCF from OPCODE
+#define HCI_OP2OCF(opcode)        ((opcode) & 0x03FF)
+
+/// Macro to extract OGF from OPCODE
+#define HCI_OP2OGF(opcode)        ((opcode) >> 10 & 0x003F)
+
+/// Macro to create OPCODE from OGF and OCF
+#define HCI_OPCODE(ocf, ogf)      (((ogf) << 10) | ocf)
+
+/// Maximum length of HCI advertising data fragments
+#define HCI_ADV_DATA_FRAG_MAX_LEN        252
+
+
+/**************************************************************************************
+ **************                       HCI COMMANDS                     ****************
+ **************************************************************************************/
+
+///HCI enumeration of possible Command OGF values.
+enum
+{
+    ///HCI Link Control Commands Group OGF code
+    LK_CNTL_OGF = 0x01,
+    ///HCI Link Policy Commands Group OGF code
+    LK_POL_OGF,
+    ///HCI Controller and Baseband Commands Group OGF code
+    CNTLR_BB_OGF,
+    ///HCI Information Parameters Commands Group OGF code
+    INFO_PAR_OGF,
+    ///HCI Status Commands Group OGF code
+    STAT_PAR_OGF,
+    ///HCI Test Commands Group OGF code
+    TEST_OGF,
+    ///HCI Low Energy Commands Group OGF code
+    LE_CNTLR_OGF=0x08,
+    ///HCI Vendor Specific Group OGF code
+    VS_OGF = 0x3F,
+    MAX_OGF
+};
+
+
+///Commands Opcodes: OGF(6b) | OCF(10b)
+/* Some Abbreviation used in names:
+ *  - LK   = Link Key
+ *  - RD   = Read
+ *  - WR   = Write
+ *  - REM  = Remote
+ *  - STG  = Settings
+ *  - CON  = Connection
+ *  - CHG  = Change
+ *  - DFT  = Default
+ *  - PER  = Periodic
+ */
+
+///HCI enumeration of possible Command OP Codes.
+/*@TRACE*/
+enum hci_opcode
+{
+    HCI_NO_OPERATION_CMD_OPCODE               = 0x0000,
+
+    //Link Control Commands
+    HCI_INQ_CMD_OPCODE                        = 0x0401,
+    HCI_INQ_CANCEL_CMD_OPCODE                 = 0x0402,
+    HCI_PER_INQ_MODE_CMD_OPCODE               = 0x0403,
+    HCI_EXIT_PER_INQ_MODE_CMD_OPCODE          = 0x0404,
+    HCI_CREATE_CON_CMD_OPCODE                 = 0x0405,
+    HCI_DISCONNECT_CMD_OPCODE                 = 0x0406,
+    HCI_CREATE_CON_CANCEL_CMD_OPCODE          = 0x0408,
+    HCI_ACCEPT_CON_REQ_CMD_OPCODE             = 0x0409,
+    HCI_REJECT_CON_REQ_CMD_OPCODE             = 0x040A,
+    HCI_LK_REQ_REPLY_CMD_OPCODE               = 0x040B,
+    HCI_LK_REQ_NEG_REPLY_CMD_OPCODE           = 0x040C,
+    HCI_PIN_CODE_REQ_REPLY_CMD_OPCODE         = 0x040D,
+    HCI_PIN_CODE_REQ_NEG_REPLY_CMD_OPCODE     = 0x040E,
+    HCI_CHG_CON_PKT_TYPE_CMD_OPCODE           = 0x040F,
+    HCI_AUTH_REQ_CMD_OPCODE                   = 0x0411,
+    HCI_SET_CON_ENC_CMD_OPCODE                = 0x0413,
+    HCI_CHG_CON_LK_CMD_OPCODE                 = 0x0415,
+    HCI_MASTER_LK_CMD_OPCODE                  = 0x0417,
+    HCI_REM_NAME_REQ_CMD_OPCODE               = 0x0419,
+    HCI_REM_NAME_REQ_CANCEL_CMD_OPCODE        = 0x041A,
+    HCI_RD_REM_SUPP_FEATS_CMD_OPCODE          = 0x041B,
+    HCI_RD_REM_EXT_FEATS_CMD_OPCODE           = 0x041C,
+    HCI_RD_REM_VER_INFO_CMD_OPCODE            = 0x041D,
+    HCI_RD_CLK_OFF_CMD_OPCODE                 = 0x041F,
+    HCI_RD_LMP_HDL_CMD_OPCODE                 = 0x0420,
+    HCI_SETUP_SYNC_CON_CMD_OPCODE             = 0x0428,
+    HCI_ACCEPT_SYNC_CON_REQ_CMD_OPCODE        = 0x0429,
+    HCI_REJECT_SYNC_CON_REQ_CMD_OPCODE        = 0x042A,
+    HCI_IO_CAP_REQ_REPLY_CMD_OPCODE           = 0x042B,
+    HCI_USER_CFM_REQ_REPLY_CMD_OPCODE         = 0x042C,
+    HCI_USER_CFM_REQ_NEG_REPLY_CMD_OPCODE     = 0x042D,
+    HCI_USER_PASSKEY_REQ_REPLY_CMD_OPCODE     = 0x042E,
+    HCI_USER_PASSKEY_REQ_NEG_REPLY_CMD_OPCODE = 0x042F,
+    HCI_REM_OOB_DATA_REQ_REPLY_CMD_OPCODE     = 0x0430,
+    HCI_REM_OOB_DATA_REQ_NEG_REPLY_CMD_OPCODE = 0x0433,
+    HCI_IO_CAP_REQ_NEG_REPLY_CMD_OPCODE       = 0x0434,
+    HCI_ENH_SETUP_SYNC_CON_CMD_OPCODE         = 0x043D,
+    HCI_ENH_ACCEPT_SYNC_CON_CMD_OPCODE        = 0x043E,
+    HCI_TRUNC_PAGE_CMD_OPCODE                 = 0x043F,
+    HCI_TRUNC_PAGE_CAN_CMD_OPCODE             = 0x0440,
+    HCI_SET_CON_SLV_BCST_CMD_OPCODE           = 0x0441,
+    HCI_SET_CON_SLV_BCST_REC_CMD_OPCODE       = 0x0442,
+    HCI_START_SYNC_TRAIN_CMD_OPCODE           = 0x0443,
+    HCI_REC_SYNC_TRAIN_CMD_OPCODE             = 0x0444,
+    HCI_REM_OOB_EXT_DATA_REQ_REPLY_CMD_OPCODE = 0x0445,
+
+    //Link Policy Commands
+    HCI_HOLD_MODE_CMD_OPCODE                  = 0x0801,
+    HCI_SNIFF_MODE_CMD_OPCODE                 = 0x0803,
+    HCI_EXIT_SNIFF_MODE_CMD_OPCODE            = 0x0804,
+    HCI_PARK_STATE_CMD_OPCODE                 = 0x0805,
+    HCI_EXIT_PARK_STATE_CMD_OPCODE            = 0x0806,
+    HCI_QOS_SETUP_CMD_OPCODE                  = 0x0807,
+    HCI_ROLE_DISCOVERY_CMD_OPCODE             = 0x0809,
+    HCI_SWITCH_ROLE_CMD_OPCODE                = 0x080B,
+    HCI_RD_LINK_POL_STG_CMD_OPCODE            = 0x080C,
+    HCI_WR_LINK_POL_STG_CMD_OPCODE            = 0x080D,
+    HCI_RD_DFT_LINK_POL_STG_CMD_OPCODE        = 0x080E,
+    HCI_WR_DFT_LINK_POL_STG_CMD_OPCODE        = 0x080F,
+    HCI_FLOW_SPEC_CMD_OPCODE                  = 0x0810,
+    HCI_SNIFF_SUB_CMD_OPCODE                  = 0x0811,
+
+    //Controller and Baseband Commands
+    HCI_SET_EVT_MASK_CMD_OPCODE               = 0x0C01,
+    HCI_RESET_CMD_OPCODE                      = 0x0C03,
+    HCI_SET_EVT_FILTER_CMD_OPCODE             = 0x0C05,
+    HCI_FLUSH_CMD_OPCODE                      = 0x0C08,
+    HCI_RD_PIN_TYPE_CMD_OPCODE                = 0x0C09,
+    HCI_WR_PIN_TYPE_CMD_OPCODE                = 0x0C0A,
+    HCI_CREATE_NEW_UNIT_KEY_CMD_OPCODE        = 0x0C0B,
+    HCI_RD_STORED_LK_CMD_OPCODE               = 0x0C0D,
+    HCI_WR_STORED_LK_CMD_OPCODE               = 0x0C11,
+    HCI_DEL_STORED_LK_CMD_OPCODE              = 0x0C12,
+    HCI_WR_LOCAL_NAME_CMD_OPCODE              = 0x0C13,
+    HCI_RD_LOCAL_NAME_CMD_OPCODE              = 0x0C14,
+    HCI_RD_CON_ACCEPT_TO_CMD_OPCODE           = 0x0C15,
+    HCI_WR_CON_ACCEPT_TO_CMD_OPCODE           = 0x0C16,
+    HCI_RD_PAGE_TO_CMD_OPCODE                 = 0x0C17,
+    HCI_WR_PAGE_TO_CMD_OPCODE                 = 0x0C18,
+    HCI_RD_SCAN_EN_CMD_OPCODE                 = 0x0C19,
+    HCI_WR_SCAN_EN_CMD_OPCODE                 = 0x0C1A,
+    HCI_RD_PAGE_SCAN_ACT_CMD_OPCODE           = 0x0C1B,
+    HCI_WR_PAGE_SCAN_ACT_CMD_OPCODE           = 0x0C1C,
+    HCI_RD_INQ_SCAN_ACT_CMD_OPCODE            = 0x0C1D,
+    HCI_WR_INQ_SCAN_ACT_CMD_OPCODE            = 0x0C1E,
+    HCI_RD_AUTH_EN_CMD_OPCODE                 = 0x0C1F,
+    HCI_WR_AUTH_EN_CMD_OPCODE                 = 0x0C20,
+    HCI_RD_CLASS_OF_DEV_CMD_OPCODE            = 0x0C23,
+    HCI_WR_CLASS_OF_DEV_CMD_OPCODE            = 0x0C24,
+    HCI_RD_VOICE_STG_CMD_OPCODE               = 0x0C25,
+    HCI_WR_VOICE_STG_CMD_OPCODE               = 0x0C26,
+    HCI_RD_AUTO_FLUSH_TO_CMD_OPCODE           = 0x0C27,
+    HCI_WR_AUTO_FLUSH_TO_CMD_OPCODE           = 0x0C28,
+    HCI_RD_NB_BDCST_RETX_CMD_OPCODE           = 0x0C29,
+    HCI_WR_NB_BDCST_RETX_CMD_OPCODE           = 0x0C2A,
+    HCI_RD_HOLD_MODE_ACTIVITY_CMD_OPCODE      = 0x0C2B,
+    HCI_WR_HOLD_MODE_ACTIVITY_CMD_OPCODE      = 0x0C2C,
+    HCI_RD_TX_PWR_LVL_CMD_OPCODE              = 0x0C2D,
+    HCI_RD_SYNC_FLOW_CTRL_EN_CMD_OPCODE       = 0x0C2E,
+    HCI_WR_SYNC_FLOW_CTRL_EN_CMD_OPCODE       = 0x0C2F,
+    HCI_SET_CTRL_TO_HOST_FLOW_CTRL_CMD_OPCODE = 0x0C31,
+    HCI_HOST_BUF_SIZE_CMD_OPCODE              = 0x0C33,
+    HCI_HOST_NB_CMP_PKTS_CMD_OPCODE           = 0x0C35,
+    HCI_RD_LINK_SUPV_TO_CMD_OPCODE            = 0x0C36,
+    HCI_WR_LINK_SUPV_TO_CMD_OPCODE            = 0x0C37,
+    HCI_RD_NB_SUPP_IAC_CMD_OPCODE             = 0x0C38,
+    HCI_RD_CURR_IAC_LAP_CMD_OPCODE            = 0x0C39,
+    HCI_WR_CURR_IAC_LAP_CMD_OPCODE            = 0x0C3A,
+    HCI_SET_AFH_HOST_CH_CLASS_CMD_OPCODE      = 0x0C3F,
+    HCI_RD_INQ_SCAN_TYPE_CMD_OPCODE           = 0x0C42,
+    HCI_WR_INQ_SCAN_TYPE_CMD_OPCODE           = 0x0C43,
+    HCI_RD_INQ_MODE_CMD_OPCODE                = 0x0C44,
+    HCI_WR_INQ_MODE_CMD_OPCODE                = 0x0C45,
+    HCI_RD_PAGE_SCAN_TYPE_CMD_OPCODE          = 0x0C46,
+    HCI_WR_PAGE_SCAN_TYPE_CMD_OPCODE          = 0x0C47,
+    HCI_RD_AFH_CH_ASSESS_MODE_CMD_OPCODE      = 0x0C48,
+    HCI_WR_AFH_CH_ASSESS_MODE_CMD_OPCODE      = 0x0C49,
+    HCI_RD_EXT_INQ_RSP_CMD_OPCODE             = 0x0C51,
+    HCI_WR_EXT_INQ_RSP_CMD_OPCODE             = 0x0C52,
+    HCI_REFRESH_ENC_KEY_CMD_OPCODE            = 0x0C53,
+    HCI_RD_SP_MODE_CMD_OPCODE                 = 0x0C55,
+    HCI_WR_SP_MODE_CMD_OPCODE                 = 0x0C56,
+    HCI_RD_LOC_OOB_DATA_CMD_OPCODE            = 0x0C57,
+    HCI_RD_INQ_RSP_TX_PWR_LVL_CMD_OPCODE      = 0x0C58,
+    HCI_WR_INQ_TX_PWR_LVL_CMD_OPCODE          = 0x0C59,
+    HCI_RD_DFT_ERR_DATA_REP_CMD_OPCODE        = 0x0C5A,
+    HCI_WR_DFT_ERR_DATA_REP_CMD_OPCODE        = 0x0C5B,
+    HCI_ENH_FLUSH_CMD_OPCODE                  = 0x0C5F,
+    HCI_SEND_KEYPRESS_NOTIF_CMD_OPCODE        = 0x0C60,
+    HCI_SET_EVT_MASK_PAGE_2_CMD_OPCODE        = 0x0C63,
+    HCI_RD_FLOW_CNTL_MODE_CMD_OPCODE          = 0x0C66,
+    HCI_WR_FLOW_CNTL_MODE_CMD_OPCODE          = 0x0C67,
+    HCI_RD_ENH_TX_PWR_LVL_CMD_OPCODE          = 0x0C68,
+    HCI_RD_LE_HOST_SUPP_CMD_OPCODE            = 0x0C6C,
+    HCI_WR_LE_HOST_SUPP_CMD_OPCODE            = 0x0C6D,
+    HCI_SET_MWS_CHANNEL_PARAMS_CMD_OPCODE     = 0x0C6E,
+    HCI_SET_EXTERNAL_FRAME_CONFIG_CMD_OPCODE  = 0x0C6F,
+    HCI_SET_MWS_SIGNALING_CMD_OPCODE          = 0x0C70,
+    HCI_SET_MWS_TRANSPORT_LAYER_CMD_OPCODE    = 0x0C71,
+    HCI_SET_MWS_SCAN_FREQ_TABLE_CMD_OPCODE    = 0x0C72,
+    HCI_SET_MWS_PATTERN_CONFIG_CMD_OPCODE     = 0x0C73,
+    HCI_SET_RES_LT_ADDR_CMD_OPCODE            = 0x0C74,
+    HCI_DEL_RES_LT_ADDR_CMD_OPCODE            = 0x0C75,
+    HCI_SET_CON_SLV_BCST_DATA_CMD_OPCODE      = 0x0C76,
+    HCI_RD_SYNC_TRAIN_PARAM_CMD_OPCODE        = 0x0C77,
+    HCI_WR_SYNC_TRAIN_PARAM_CMD_OPCODE        = 0x0C78,
+    HCI_RD_SEC_CON_HOST_SUPP_CMD_OPCODE       = 0x0C79,
+    HCI_WR_SEC_CON_HOST_SUPP_CMD_OPCODE       = 0x0C7A,
+    HCI_RD_AUTH_PAYL_TO_CMD_OPCODE            = 0x0C7B,
+    HCI_WR_AUTH_PAYL_TO_CMD_OPCODE            = 0x0C7C,
+    HCI_RD_LOC_OOB_EXT_DATA_CMD_OPCODE        = 0x0C7D,
+    HCI_RD_EXT_PAGE_TO_CMD_OPCODE             = 0x0C7E,
+    HCI_WR_EXT_PAGE_TO_CMD_OPCODE             = 0x0C7F,
+    HCI_RD_EXT_INQ_LEN_CMD_OPCODE             = 0x0C80,
+    HCI_WR_EXT_INQ_LEN_CMD_OPCODE             = 0x0C81,
+
+    //Info Params
+    HCI_RD_LOCAL_VER_INFO_CMD_OPCODE               = 0x1001,
+    HCI_RD_LOCAL_SUPP_CMDS_CMD_OPCODE              = 0x1002,
+    HCI_RD_LOCAL_SUPP_FEATS_CMD_OPCODE             = 0x1003,
+    HCI_RD_LOCAL_EXT_FEATS_CMD_OPCODE              = 0x1004,
+    HCI_RD_BUFF_SIZE_CMD_OPCODE                    = 0x1005,
+    HCI_RD_BD_ADDR_CMD_OPCODE                      = 0x1009,
+    HCI_RD_LOCAL_SUPP_CODECS_CMD_OPCODE            = 0x100B,
+    HCI_RD_LOCAL_SP_OPT_CMD_OPCODE                 = 0x100C,
+
+    //Status Params
+    HCI_RD_FAIL_CONTACT_CNT_CMD_OPCODE             = 0x1401,
+    HCI_RST_FAIL_CONTACT_CNT_CMD_OPCODE            = 0x1402,
+    HCI_RD_LINK_QUAL_CMD_OPCODE                    = 0x1403,
+    HCI_RD_RSSI_CMD_OPCODE                         = 0x1405,
+    HCI_RD_AFH_CH_MAP_CMD_OPCODE                   = 0x1406,
+    HCI_RD_CLK_CMD_OPCODE                          = 0x1407,
+    HCI_RD_ENC_KEY_SIZE_CMD_OPCODE                 = 0x1408,
+    HCI_GET_MWS_TRANSPORT_LAYER_CONFIG_CMD_OPCODE  = 0x140C,
+
+    //Testing Commands
+    HCI_RD_LOOPBACK_MODE_CMD_OPCODE                = 0x1801,
+    HCI_WR_LOOPBACK_MODE_CMD_OPCODE                = 0x1802,
+    HCI_EN_DUT_MODE_CMD_OPCODE                     = 0x1803,
+    HCI_WR_SP_DBG_MODE_CMD_OPCODE                  = 0x1804,
+    HCI_WR_SEC_CON_TEST_MODE_CMD_OPCODE            = 0x180A,
+
+    /// LE Commands Opcodes
+    HCI_LE_SET_EVT_MASK_CMD_OPCODE                 = 0x2001,
+    HCI_LE_RD_BUFF_SIZE_CMD_OPCODE                 = 0x2002,
+    HCI_LE_RD_LOCAL_SUPP_FEATS_CMD_OPCODE          = 0x2003,
+    HCI_LE_SET_RAND_ADDR_CMD_OPCODE                = 0x2005,
+    HCI_LE_SET_ADV_PARAM_CMD_OPCODE                = 0x2006,
+    HCI_LE_RD_ADV_CHNL_TX_PW_CMD_OPCODE            = 0x2007,
+    HCI_LE_SET_ADV_DATA_CMD_OPCODE                 = 0x2008,
+    HCI_LE_SET_SCAN_RSP_DATA_CMD_OPCODE            = 0x2009,
+    HCI_LE_SET_ADV_EN_CMD_OPCODE                   = 0x200A,
+    HCI_LE_SET_SCAN_PARAM_CMD_OPCODE               = 0x200B,
+    HCI_LE_SET_SCAN_EN_CMD_OPCODE                  = 0x200C,
+    HCI_LE_CREATE_CON_CMD_OPCODE                   = 0x200D,
+    HCI_LE_CREATE_CON_CANCEL_CMD_OPCODE            = 0x200E,
+    HCI_LE_RD_WLST_SIZE_CMD_OPCODE                 = 0x200F,
+    HCI_LE_CLEAR_WLST_CMD_OPCODE                   = 0x2010,
+    HCI_LE_ADD_DEV_TO_WLST_CMD_OPCODE              = 0x2011,
+    HCI_LE_RMV_DEV_FROM_WLST_CMD_OPCODE            = 0x2012,
+    HCI_LE_CON_UPDATE_CMD_OPCODE                   = 0x2013,
+    HCI_LE_SET_HOST_CH_CLASS_CMD_OPCODE            = 0x2014,
+    HCI_LE_RD_CHNL_MAP_CMD_OPCODE                  = 0x2015,
+    HCI_LE_RD_REM_FEATS_CMD_OPCODE                 = 0x2016,
+    HCI_LE_ENC_CMD_OPCODE                          = 0x2017,
+    HCI_LE_RAND_CMD_OPCODE                         = 0x2018,
+    HCI_LE_START_ENC_CMD_OPCODE                    = 0x2019,
+    HCI_LE_LTK_REQ_REPLY_CMD_OPCODE                = 0x201A,
+    HCI_LE_LTK_REQ_NEG_REPLY_CMD_OPCODE            = 0x201B,
+    HCI_LE_RD_SUPP_STATES_CMD_OPCODE               = 0x201C,
+    HCI_LE_RX_TEST_CMD_OPCODE                      = 0x201D,
+    HCI_LE_TX_TEST_CMD_OPCODE                      = 0x201E,
+    HCI_LE_TEST_END_CMD_OPCODE                     = 0x201F,
+    HCI_LE_REM_CON_PARAM_REQ_REPLY_CMD_OPCODE      = 0x2020,
+    HCI_LE_REM_CON_PARAM_REQ_NEG_REPLY_CMD_OPCODE  = 0x2021,
+    HCI_LE_SET_DATA_LEN_CMD_OPCODE                 = 0x2022,
+    HCI_LE_RD_SUGGTED_DFT_DATA_LEN_CMD_OPCODE      = 0x2023,
+    HCI_LE_WR_SUGGTED_DFT_DATA_LEN_CMD_OPCODE      = 0x2024,
+    HCI_LE_RD_LOC_P256_PUB_KEY_CMD_OPCODE          = 0x2025,
+    HCI_LE_GEN_DHKEY_CMD_OPCODE                    = 0x2026,
+    HCI_LE_ADD_DEV_TO_RSLV_LIST_CMD_OPCODE         = 0x2027,
+    HCI_LE_RMV_DEV_FROM_RSLV_LIST_CMD_OPCODE       = 0x2028,
+    HCI_LE_CLEAR_RSLV_LIST_CMD_OPCODE              = 0x2029,
+    HCI_LE_RD_RSLV_LIST_SIZE_CMD_OPCODE            = 0x202A,
+    HCI_LE_RD_PEER_RSLV_ADDR_CMD_OPCODE            = 0x202B,
+    HCI_LE_RD_LOC_RSLV_ADDR_CMD_OPCODE             = 0x202C,
+    HCI_LE_SET_ADDR_RESOL_EN_CMD_OPCODE            = 0x202D,
+    HCI_LE_SET_RSLV_PRIV_ADDR_TO_CMD_OPCODE        = 0x202E,
+    HCI_LE_RD_MAX_DATA_LEN_CMD_OPCODE              = 0x202F,
+    HCI_LE_RD_PHY_CMD_OPCODE                       = 0x2030,
+    HCI_LE_SET_DFT_PHY_CMD_OPCODE                  = 0x2031,
+    HCI_LE_SET_PHY_CMD_OPCODE                      = 0x2032,
+    HCI_LE_ENH_RX_TEST_CMD_OPCODE                  = 0x2033,
+    HCI_LE_ENH_TX_TEST_CMD_OPCODE                  = 0x2034,
+    HCI_LE_SET_ADV_SET_RAND_ADDR_CMD_OPCODE        = 0x2035,
+    HCI_LE_SET_EXT_ADV_PARAM_CMD_OPCODE            = 0x2036,
+    HCI_LE_SET_EXT_ADV_DATA_CMD_OPCODE             = 0x2037,
+    HCI_LE_SET_EXT_SCAN_RSP_DATA_CMD_OPCODE        = 0x2038,
+    HCI_LE_SET_EXT_ADV_EN_CMD_OPCODE               = 0x2039,
+    HCI_LE_RD_MAX_ADV_DATA_LEN_CMD_OPCODE          = 0x203A,
+    HCI_LE_RD_NB_SUPP_ADV_SETS_CMD_OPCODE          = 0x203B,
+    HCI_LE_RMV_ADV_SET_CMD_OPCODE                  = 0x203C,
+    HCI_LE_CLEAR_ADV_SETS_CMD_OPCODE               = 0x203D,
+    HCI_LE_SET_PER_ADV_PARAM_CMD_OPCODE            = 0x203E,
+    HCI_LE_SET_PER_ADV_DATA_CMD_OPCODE             = 0x203F,
+    HCI_LE_SET_PER_ADV_EN_CMD_OPCODE               = 0x2040,
+    HCI_LE_SET_EXT_SCAN_PARAM_CMD_OPCODE           = 0x2041,
+    HCI_LE_SET_EXT_SCAN_EN_CMD_OPCODE              = 0x2042,
+    HCI_LE_EXT_CREATE_CON_CMD_OPCODE               = 0x2043,
+    HCI_LE_PER_ADV_CREATE_SYNC_CMD_OPCODE          = 0x2044,
+    HCI_LE_PER_ADV_CREATE_SYNC_CANCEL_CMD_OPCODE   = 0x2045,
+    HCI_LE_PER_ADV_TERM_SYNC_CMD_OPCODE            = 0x2046,
+    HCI_LE_ADD_DEV_TO_PER_ADV_LIST_CMD_OPCODE      = 0x2047,
+    HCI_LE_RMV_DEV_FROM_PER_ADV_LIST_CMD_OPCODE    = 0x2048,
+    HCI_LE_CLEAR_PER_ADV_LIST_CMD_OPCODE           = 0x2049,
+    HCI_LE_RD_PER_ADV_LIST_SIZE_CMD_OPCODE         = 0x204A,
+    HCI_LE_RD_TX_PWR_CMD_OPCODE                    = 0x204B,
+    HCI_LE_RD_RF_PATH_COMP_CMD_OPCODE              = 0x204C,
+    HCI_LE_WR_RF_PATH_COMP_CMD_OPCODE              = 0x204D,
+    HCI_LE_SET_PRIV_MODE_CMD_OPCODE                = 0x204E,
+
+    ///Debug commands - OGF = 0x3F (spec)
+    HCI_DBG_RD_MEM_CMD_OPCODE                      = 0xFC01,
+    HCI_DBG_WR_MEM_CMD_OPCODE                      = 0xFC02,
+    HCI_DBG_DEL_PAR_CMD_OPCODE                     = 0xFC03,
+    HCI_DBG_ID_FLASH_CMD_OPCODE                    = 0xFC05,
+    HCI_DBG_ER_FLASH_CMD_OPCODE                    = 0xFC06,
+    HCI_DBG_WR_FLASH_CMD_OPCODE                    = 0xFC07,
+    HCI_DBG_RD_FLASH_CMD_OPCODE                    = 0xFC08,
+    HCI_DBG_RD_PAR_CMD_OPCODE                      = 0xFC09,
+    HCI_DBG_WR_PAR_CMD_OPCODE                      = 0xFC0A,
+    HCI_DBG_WLAN_COEX_CMD_OPCODE                   = 0xFC0B,
+    HCI_DBG_WLAN_COEXTST_SCEN_CMD_OPCODE           = 0xFC0D,
+    HCI_DBG_BT_SEND_LMP_CMD_OPCODE                 = 0xFC0E,
+    HCI_DBG_SET_LOCAL_CLOCK_CMD_OPCODE             = 0xFC0F,
+    HCI_DBG_RD_KE_STATS_CMD_OPCODE                 = 0xFC10,
+    HCI_DBG_PLF_RESET_CMD_OPCODE                   = 0xFC11,
+    HCI_DBG_RD_MEM_INFO_CMD_OPCODE                 = 0xFC12,
+    HCI_VS_SET_PREF_SLAVE_LATENCY_CMD_OPCODE       = 0xFC13,
+    HCI_VS_SET_PREF_SLAVE_EVT_DUR_CMD_OPCODE       = 0xFC14,
+    HCI_DBG_BLE_REG_RD_CMD_OPCODE                  = 0xFC30,
+    HCI_DBG_BLE_REG_WR_CMD_OPCODE                  = 0xFC31,
+    HCI_DBG_SEND_LLCP_CMD_OPCODE                   = 0xFC35,
+    HCI_DBG_LLCP_DISCARD_CMD_OPCODE                = 0xFC36,
+    HCI_DBG_RF_REG_RD_CMD_OPCODE                   = 0xFC39,
+    HCI_DBG_RF_REG_WR_CMD_OPCODE                   = 0xFC3A,
+    HCI_DBG_RF_SWITCH_CLK_CMD_OPCODE               = 0xFC3C,
+    HCI_DBG_RF_WR_DATA_TX_CMD_OPCODE               = 0xFC3D,
+    HCI_DBG_RF_RD_DATA_RX_CMD_OPCODE               = 0xFC3E,
+    HCI_DBG_RF_CNTL_TX_CMD_OPCODE                  = 0xFC3F,
+    HCI_DBG_RF_SYNC_P_CNTL_CMD_OPCODE              = 0xFC40,
+
+    #if (RW_DEBUG && BT_EMB_PRESENT)
+    HCI_DBG_BT_DISCARD_LMP_EN_CMD_OPCODE           = 0xFC44,
+    #endif //RW_DEBUG && BT_EMB_PRESENT
+
+    HCI_DBG_MWS_COEX_CMD_OPCODE                    = 0xFC45,
+    HCI_DBG_MWS_COEXTST_SCEN_CMD_OPCODE            = 0xFC46,
+
+    #if (BLE_ISO_MODE_0)
+    /// Vendor Specific commands for ISO Mode 0
+    HCI_VS_SETUP_AM0_CHAN_CMD_OPCODE               = 0xFC54,
+    HCI_VS_REMOVE_AM0_CHAN_CMD_OPCODE              = 0xFC55,
+    HCI_VS_CONTROL_AM0_CHAN_CMD_OPCODE             = 0xFC56,
+    #endif // (BLE_ISO_MODE_0)
+
+    #if CRYPTO_UT
+    HCI_DBG_TEST_CRYPTO_FUNC_CMD_OPCODE            = 0xFC60,
+    #endif //CRYPTO_UT
+
+    #if RW_DEBUG
+    HCI_DBG_TEST_SCH_PLAN_SET_CMD_OPCODE           = 0xFC61,
+    HCI_DBG_TEST_SCH_PLAN_REM_CMD_OPCODE           = 0xFC62,
+    HCI_DBG_TEST_SCH_PLAN_CHK_CMD_OPCODE           = 0xFC63,
+    HCI_DBG_TEST_SCH_PLAN_REQ_CMD_OPCODE           = 0xFC64,
+    #endif //RW_DEBUG
+};
+
+/**************************************************************************************
+ **************                        HCI EVENTS                      ****************
+ **************************************************************************************/
+
+///Event Codes
+/*@TRACE*/
+enum hci_evt_code
+{
+    HCI_INQ_CMP_EVT_CODE                       = 0x01,
+    HCI_INQ_RES_EVT_CODE                       = 0x02,
+    HCI_CON_CMP_EVT_CODE                       = 0x03,
+    HCI_CON_REQ_EVT_CODE                       = 0x04,
+    HCI_DISC_CMP_EVT_CODE                      = 0x05,
+    HCI_AUTH_CMP_EVT_CODE                      = 0x06,
+    HCI_REM_NAME_REQ_CMP_EVT_CODE              = 0x07,
+    HCI_ENC_CHG_EVT_CODE                       = 0x08,
+    HCI_CHG_CON_LK_CMP_EVT_CODE                = 0x09,
+    HCI_MASTER_LK_CMP_EVT_CODE                 = 0x0A,
+    HCI_RD_REM_SUPP_FEATS_CMP_EVT_CODE         = 0x0B,
+    HCI_RD_REM_VER_INFO_CMP_EVT_CODE           = 0x0C,
+    HCI_QOS_SETUP_CMP_EVT_CODE                 = 0x0D,
+    HCI_CMD_CMP_EVT_CODE                       = 0x0E,
+    HCI_CMD_STATUS_EVT_CODE                    = 0x0F,
+    HCI_HW_ERR_EVT_CODE                        = 0x10,
+    HCI_FLUSH_OCCURRED_EVT_CODE                = 0x11,
+    HCI_ROLE_CHG_EVT_CODE                      = 0x12,
+    HCI_NB_CMP_PKTS_EVT_CODE                   = 0x13,
+    HCI_MODE_CHG_EVT_CODE                      = 0x14,
+    HCI_RETURN_LINK_KEYS_EVT_CODE              = 0x15,
+    HCI_PIN_CODE_REQ_EVT_CODE                  = 0x16,
+    HCI_LK_REQ_EVT_CODE                        = 0x17,
+    HCI_LK_NOTIF_EVT_CODE                      = 0x18,
+    HCI_DATA_BUF_OVFLW_EVT_CODE                = 0x1A,
+    HCI_MAX_SLOT_CHG_EVT_CODE                  = 0x1B,
+    HCI_RD_CLK_OFF_CMP_EVT_CODE                = 0x1C,
+    HCI_CON_PKT_TYPE_CHG_EVT_CODE              = 0x1D,
+    HCI_QOS_VIOL_EVT_CODE                      = 0x1E,
+    HCI_PAGE_SCAN_REPET_MODE_CHG_EVT_CODE      = 0x20,
+    HCI_FLOW_SPEC_CMP_EVT_CODE                 = 0x21,
+    HCI_INQ_RES_WITH_RSSI_EVT_CODE             = 0x22,
+    HCI_RD_REM_EXT_FEATS_CMP_EVT_CODE          = 0x23,
+    HCI_SYNC_CON_CMP_EVT_CODE                  = 0x2C,
+    HCI_SYNC_CON_CHG_EVT_CODE                  = 0x2D,
+    HCI_SNIFF_SUB_EVT_CODE                     = 0x2E,
+    HCI_EXT_INQ_RES_EVT_CODE                   = 0x2F,
+    HCI_ENC_KEY_REFRESH_CMP_EVT_CODE           = 0x30,
+    HCI_IO_CAP_REQ_EVT_CODE                    = 0x31,
+    HCI_IO_CAP_RSP_EVT_CODE                    = 0x32,
+    HCI_USER_CFM_REQ_EVT_CODE                  = 0x33,
+    HCI_USER_PASSKEY_REQ_EVT_CODE              = 0x34,
+    HCI_REM_OOB_DATA_REQ_EVT_CODE              = 0x35,
+    HCI_SP_CMP_EVT_CODE                        = 0x36,
+    HCI_LINK_SUPV_TO_CHG_EVT_CODE              = 0x38,
+    HCI_ENH_FLUSH_CMP_EVT_CODE                 = 0x39,
+    HCI_USER_PASSKEY_NOTIF_EVT_CODE            = 0x3B,
+    HCI_KEYPRESS_NOTIF_EVT_CODE                = 0x3C,
+    HCI_REM_HOST_SUPP_FEATS_NOTIF_EVT_CODE     = 0x3D,
+    HCI_LE_META_EVT_CODE                       = 0x3E,
+    HCI_MAX_EVT_MSK_PAGE_1_CODE                = 0x40,
+    HCI_SYNC_TRAIN_CMP_EVT_CODE                = 0x4F,
+    HCI_SYNC_TRAIN_REC_EVT_CODE                = 0x50,
+    HCI_CON_SLV_BCST_REC_EVT_CODE              = 0x51,
+    HCI_CON_SLV_BCST_TO_EVT_CODE               = 0x52,
+    HCI_TRUNC_PAGE_CMP_EVT_CODE                = 0x53,
+    HCI_SLV_PAGE_RSP_TO_EVT_CODE               = 0x54,
+    HCI_CON_SLV_BCST_CH_MAP_CHG_EVT_CODE       = 0x55,
+    HCI_AUTH_PAYL_TO_EXP_EVT_CODE              = 0x57,
+    HCI_SAM_STATUS_CHANGE_EVT_CODE             = 0x58,
+    HCI_MAX_EVT_MSK_PAGE_2_CODE                = 0x59,
+    HCI_DBG_META_EVT_CODE                      = 0xFF,
+};
+
+/*@TRACE*/
+enum hci_le_evt_subcode
+{
+    /// LE Events Subcodes
+    HCI_LE_CON_CMP_EVT_SUBCODE                 = 0x01,
+    HCI_LE_ADV_REPORT_EVT_SUBCODE              = 0x02,
+    HCI_LE_CON_UPDATE_CMP_EVT_SUBCODE          = 0x03,
+    HCI_LE_RD_REM_FEATS_CMP_EVT_SUBCODE        = 0x04,
+    HCI_LE_LTK_REQUEST_EVT_SUBCODE             = 0x05,
+    HCI_LE_REM_CON_PARAM_REQ_EVT_SUBCODE       = 0x06,
+    HCI_LE_DATA_LEN_CHG_EVT_SUBCODE            = 0x07,
+    HCI_LE_RD_LOC_P256_PUB_KEY_CMP_EVT_SUBCODE = 0x08,
+    HCI_LE_GEN_DHKEY_CMP_EVT_SUBCODE           = 0x09,
+    HCI_LE_ENH_CON_CMP_EVT_SUBCODE             = 0x0A,
+    HCI_LE_DIR_ADV_REP_EVT_SUBCODE             = 0x0B,
+    HCI_LE_PHY_UPD_CMP_EVT_SUBCODE             = 0x0C,
+    HCI_LE_EXT_ADV_REPORT_EVT_SUBCODE          = 0x0D,
+    HCI_LE_PER_ADV_SYNC_EST_EVT_SUBCODE        = 0x0E,
+    HCI_LE_PER_ADV_REPORT_EVT_SUBCODE          = 0x0F,
+    HCI_LE_PER_ADV_SYNC_LOST_EVT_SUBCODE       = 0x10,
+    HCI_LE_SCAN_TIMEOUT_EVT_SUBCODE            = 0x11,
+    HCI_LE_ADV_SET_TERMINATED_EVT_SUBCODE      = 0x12,
+    HCI_LE_SCAN_REQ_RCVD_EVT_SUBCODE           = 0x13,
+    HCI_LE_CH_SEL_ALGO_EVT_SUBCODE             = 0x14,
+};
+
+#if (RW_DEBUG || BLE_ISOGEN)
+/*@TRACE*/
+enum hci_vs_evt_subcode
+{
+    #if (RW_DEBUG)
+    /// DBG Events Subcodes
+    HCI_DBG_ASSERT_EVT_SUBCODE             = 0x02,
+    #endif //(RW_DEBUG)
+
+    #if (BLE_ISOGEN)
+    /// VS ISO Gen Statistics Status
+    HCI_VS_ISOGEN_STAT_EVT_SUBCODE                    = 0x03,
+    #endif // (BLE_ISOGEN)
+};
+#endif //(RW_DEBUG || BLE_ISOGEN)
+
+/// Event mask page enum
+enum hci_evt_mask_page
+{
+    /// page 0
+    HCI_PAGE_0,
+    /// page 1
+    HCI_PAGE_1,
+    /// page 2
+    HCI_PAGE_2,
+    /// Default
+    HCI_PAGE_DFT,
+    /// LE event
+    HCI_PAGE_LE,
+};
+
+#if (BLE_ISO_PRESENT)
+#if (BLE_ISO_MODE_0)
+/// Current audio mode
+enum iso_am0_ctrl
+{
+    // Stop Audio Mode 0 Stream
+    ISO_AM0_CRL_DISABLE,
+    // Start Audio Mode 0 Stream
+    ISO_AM0_CRL_ENABLE,
+};
+#endif // (BLE_ISO_MODE_0)
+
+
+/// Isochronous Channel Direction selection
+enum iso_rx_tx_select
+{
+    /// Isochronous tx buffer selection: Host to Controller
+    ISO_TX_SEL,
+    /// Isochronous rx buffer selection: Controller to Host
+    ISO_RX_SEL
+};
+
+/// Isochronous Channel data path selection
+enum iso_dp_type
+{
+    /// Data Path direction is disabled
+    ISO_DP_DISABLE                  = 0x00,
+    /// Voice over HCI Data Path
+    ISO_DP_VOHCI                    = 0x01,
+
+    // -------- VENDOR SPECIFIC --------- //
+
+    /// ISO over HCI Data Path
+    ISO_DP_ISOOHCI                  = 0xF0,
+    /// PCM Data path
+    ISO_DP_PCM                      = 0xF1,
+    /// ISO Payload Generator
+    ISO_DP_ISOGEN                   = 0xF2,
+};
+
+#endif // (BLE_ISO_PRESENT)
+
+
+
+/**************************************************************************************
+ **************                 HCI MESSAGE STRUCTURES                 ****************
+ **************************************************************************************/
+
+/// HCI ACL data packet structure
+/*@TRACE*/
+struct hci_acl_data
+{
+    /// bits[00:11]: Connection handle
+    /// bits[12:13]: Packet boundary flag
+    /// bits[14:15]: Broadcast flag
+    uint16_t  conhdl_pb_bc_flag;
+    /// length of the data
+    uint16_t  length;
+    /// Memory Pointer address
+    uint32_t  buf_ptr;
+};
+
+/// HCI Synchronous data packet structure
+/*@TRACE*/
+struct hci_sync_data
+{
+    /// bits[00:11]: Connection handle
+    /// bits[12:13]: Packet status flag
+    uint16_t  conhdl_psf;
+    /// length of the data
+    uint8_t  length;
+    /// EM buffer pointer
+    uint16_t  buf_ptr;
+};
+
+
+/*
+ * HCI COMMANDS PARAMETERS (to classify)
+ ****************************************************************************************
+ */
+
+/// HCI basic command structure with connection handle
+/*@TRACE
+ * hci_rd_rssi_cmd = hci_basic_conhdl_cmd
+ * hci_le_rd_chnl_map_cmd = hci_basic_conhdl_cmd
+ * hci_le_ltk_req_neg_reply_cmd = hci_basic_conhdl_cmd*/
+struct hci_basic_conhdl_cmd
+{
+    /// connection handle
+    uint16_t    conhdl;
+};
+
+/// HCI basic command structure with BD address
+struct hci_basic_bd_addr_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+};
+
+/// HCI Accept connection request command structure
+/*@TRACE*/
+struct hci_accept_con_req_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Page Scan Repetition Mode
+    uint8_t         role;
+};
+
+/// HCI Accept synchronous connection request command structure
+/*@TRACE*/
+struct hci_accept_sync_con_req_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Transmit bandwidth
+    uint32_t    tx_bw;
+    ///Receive bandwidth
+    uint32_t    rx_bw;
+    ///Max latency
+    uint16_t    max_lat;
+    ///Voice settings
+    uint16_t    vx_set;
+    ///Retransmission effort
+    uint8_t      retx_eff;
+    ///Packet type
+    uint16_t     pkt_type  ;
+};
+
+/// HCI Enhanced Accept synchronous connection request command structure
+/*@TRACE*/
+struct hci_enh_accept_sync_con_cmd
+{
+
+    struct bd_addr    bd_addr;            // BD address
+    uint32_t          tx_bw;              // Transmit Bandwidth (in B/sec)
+    uint32_t          rx_bw;              // Receive Bandwidth (in B/sec)
+    uint8_t           tx_cod_fmt[5];      // Transmit Coding Format
+    uint8_t           rx_cod_fmt[5];      // Receive Coding Format
+    uint16_t          tx_cod_fr_sz;       // Transmit Codec Frame Size (in B)
+    uint16_t          rx_cod_fr_sz;       // Receive Codec Frame Size (in B)
+    uint32_t          in_bw;              // Input Bandwidth (in B/sec)
+    uint32_t          out_bw;             // Output Bandwidth (in B/sec)
+    uint8_t           in_cod_fmt[5];      // Input Coding Format
+    uint8_t           out_cod_fmt[5];     // Output Coding Format
+    uint16_t          in_cod_data_sz;     // Input Coded Data Size (in bits)
+    uint16_t          out_cod_data_sz;    // Output Coded Data Size (in bits)
+    uint8_t           in_data_fmt;        // Input PCM Data Format
+    uint8_t           out_data_fmt;       // Output PCM Data Format
+    uint8_t           in_msb_pos;         // Input PCM Sample Payload MSB Position (in bits)
+    uint8_t           out_msb_pos;        // Output PCM Sample Payload MSB Position (in bits)
+    uint8_t           in_data_path;       // Input Data Path
+    uint8_t           out_data_path;      // Output Data Path
+    uint8_t           in_tr_unit_sz;      // Input Transport Unit Size (in bits)
+    uint8_t           out_tr_unit_sz;     // Output Transport Unit Size (in bits)
+    uint16_t          max_lat;            // Max Latency (in ms)
+    uint16_t          packet_type;        // Packet Type
+    uint8_t           retx_eff;           // Retransmission Effort
+
+
+};
+
+/// HCI reject connection request command structure
+/*@TRACE*/
+struct hci_reject_con_req_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Reason
+    uint8_t         reason;
+};
+
+/// HCI reject synchronous connection request command structure
+/*@TRACE*/
+struct hci_reject_sync_con_req_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Reason
+    uint8_t         reason;
+};
+
+/// HCI link key request reply command structure
+/*@TRACE*/
+struct hci_lk_req_reply_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Key
+    struct ltk         key;
+};
+
+/// HCI link key request reply command structure
+/*@TRACE*/
+struct hci_pin_code_req_reply_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Pin code length
+    uint8_t     pin_len;
+    ///Key
+    struct pin_code pin;
+};
+
+/// HCI switch role command structure
+/*@TRACE*/
+struct hci_switch_role_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Read all flag
+    uint8_t role;
+};
+
+/// HCI flow specification command parameters structure
+/*@TRACE*/
+struct hci_flow_spec_cmd
+{
+    ///Connection handle
+    uint16_t conhdl;
+    ///Flags
+    uint8_t flags;
+    ///Flow direction
+    uint8_t flow_dir;
+    ///Service type
+    uint8_t serv_type;
+    ///Token rate
+    uint32_t tk_rate;
+    ///Token buffer size
+    uint32_t tk_buf_sz;
+    ///Peak bandwidth
+    uint32_t pk_bw;
+    ///Access latency
+    uint32_t acc_lat;
+};
+
+/// HCI enhanced flush command parameters structure
+/*@TRACE*/
+struct hci_enh_flush_cmd
+{
+    ///Connection handle
+    uint16_t conhdl;
+    ///Packet Type
+    uint8_t pkt_type;
+};
+
+/// HCI command complete event structure for the read auto flush TO command
+struct hci_rd_auto_flush_to_cmd_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///Flush timeout
+    uint16_t flush_to;
+};
+
+/// HCI write flush timeout command parameters structure
+/*@TRACE*/
+struct hci_wr_auto_flush_to_cmd
+{
+    ///Connection handle
+    uint16_t conhdl;
+    ///Flush timeout
+    uint16_t flush_to;
+};
+
+/// HCI change connection packet type command parameters structure
+/*@TRACE*/
+struct hci_chg_con_pkt_type_cmd
+{
+    ///Connection handle
+    uint16_t conhdl;
+    ///Packet type
+    uint16_t pkt_type;
+};
+
+/// HCI read link policy settings command parameters structure
+/*@TRACE*/
+struct hci_rd_link_pol_stg_cmd_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///Link policy
+    uint16_t lnk_policy;
+};
+
+/// HCI read link policy settings command parameters structure
+/*@TRACE*/
+struct hci_wr_link_pol_stg_cmd
+{
+    ///Connection handle
+    uint16_t    conhdl;
+    ///Link policy
+    uint16_t lnk_policy;
+};
+
+/// HCI sniff mode request command parameters structure
+/*@TRACE*/
+struct hci_sniff_mode_cmd
+{
+    ///Connection handle
+    uint16_t    conhdl;
+    /// Maximum interval (in slots)
+    uint16_t    max_int;
+    /// Minimum interval (in slots)
+    uint16_t    min_int;
+    /// Attempts (number of receive slots) (in slots)
+    uint16_t    attempt;
+    /// Timeout (number of receive slots) (in slots)
+    uint16_t    timeout;
+};
+
+/// HCI sniff subrating mode request command parameters structure
+/*@TRACE*/
+struct hci_sniff_sub_cmd
+{
+    ///Connection handle
+    uint16_t    conhdl;
+    /// Maximum latency used to calculate the maximum sniff subrate that the remote device may use (in slots)
+    uint16_t    max_lat;
+    /// Minimum base sniff subrate timeout that the remote device may use (in slots)
+    uint16_t    min_rem_to;
+    /// Minimum base sniff subrate timeout that the local device may use (in slots)
+    uint16_t    min_loc_to;
+};
+
+/// HCI role discovery complete event parameters structure
+/*@TRACE*/
+struct hci_role_discovery_cmd_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///Role
+    uint8_t role;
+
+};
+
+/// HCI read failed contact counter command parameters structure
+/*@TRACE*/
+struct hci_rd_fail_contact_cnt_cmd_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///Fail contact counter
+    uint16_t fail_cnt;
+};
+
+/// HCI read link quality complete event parameters structure
+/*@TRACE*/
+struct hci_rd_link_qual_cmd_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///Quality type
+    uint8_t quality;
+};
+
+/// HCI read afh channel map complete event parameters structure
+/*@TRACE*/
+struct hci_rd_afh_ch_map_cmd_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    /// AFH mode
+    uint8_t afh_mode;
+    /// AFH channel map
+    struct chnl_map afh_map;
+};
+
+/// HCI read lmp handle complete event parameters structure
+/*@TRACE*/
+struct hci_rd_lmp_hdl_cmd_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///lmp handle
+    uint8_t lmp_hdl;
+    ///rsvd
+    uint32_t rsvd;
+};
+
+/// HCI read remote extended features command parameters structure
+/*@TRACE*/
+struct hci_rd_rem_ext_feats_cmd
+{
+    ///Connection handle
+    uint16_t conhdl;
+    ///page number
+    uint8_t pg_nb;
+};
+
+/// HCI read encryption key size complete event parameters structure
+/*@TRACE*/
+struct hci_rd_enc_key_size_cmd_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///Key size
+    uint8_t key_sz;
+};
+
+/// HCI read enhanced transmit power command parameters structure
+/*@TRACE*/
+struct hci_rd_enh_tx_pwr_lvl_cmd
+{
+    ///Connection handle
+    uint16_t conhdl;
+    ///Type
+    uint8_t type;
+};
+
+/// HCI read enhanced transmit power complete event parameters structure
+/*@TRACE*/
+struct hci_rd_enh_tx_pwr_lvl_cmd_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///Transmit power GFSK
+    uint8_t pw_gfsk;
+    ///Transmit power DQPSK
+    uint8_t pw_dqpsk;
+    ///Transmit power 8DPSK
+    uint8_t pw_8dpsk;
+};
+
+
+/*
+ * HCI LINK CONTROL COMMANDS PARAMETERS
+ ****************************************************************************************
+ */
+
+/// Format of the message of the Group: LINK_CONTROL_COMMANDS
+/// HCI Inquiry command parameters structure
+/*@TRACE*/
+struct hci_inq_cmd
+{
+    ///Lap
+    struct lap  lap;
+    ///Inquiry Length in units of 1.28 s
+    uint8_t     inq_len;
+    ///Number of response
+    uint8_t     nb_rsp;
+};
+/*@TRACE*/
+struct hci_per_inq_mode_cmd
+{
+    ///Maximum period length
+    uint16_t max_per_len;
+    ///Minimum period length
+    uint16_t min_per_len;
+    ///lap
+    struct lap lap;
+    ///Inquiry length in units of 1.28 s
+    uint8_t inq_len;
+    ///Number of response
+    uint8_t nb_rsp;
+};
+/*@TRACE*/
+struct hci_create_con_cmd
+{
+    /// BdAddr
+    struct bd_addr  bd_addr;
+    /// Packet Type
+    uint16_t        pkt_type;
+    /// Page Scan Repetition Mode
+    uint8_t         page_scan_rep_mode;
+    /// Reserved
+    uint8_t         rsvd;
+    /**
+     * Clock Offset
+     *
+     * Bits 14-0 : Bits 16-2 of CLKNslave-CLK
+     * Bit 15 : Clock_Offset_Valid_Flag
+     *   Invalid Clock Offset = 0
+     *   Valid Clock Offset = 1
+     */
+    uint16_t        clk_off;
+    /// Allow Switch
+    uint8_t         switch_en;
+};
+
+/// HCI disconnect command structure
+/*@TRACE*/
+struct hci_disconnect_cmd
+{
+    /// connection handle
+    uint16_t    conhdl;
+    /// reason
+    uint8_t     reason;
+};
+
+/// HCI master link key command structure
+/*@TRACE*/
+struct hci_master_lk_cmd
+{
+    ///Key flag
+    uint8_t key_flag;
+};
+
+/// HCI authentication request command parameters structure
+/*@TRACE*/
+struct hci_set_con_enc_cmd
+{
+    ///Connection handle
+    uint16_t conhdl;
+    ///Encryption mode
+    uint8_t enc_en;
+};
+
+/*@TRACE*/
+struct hci_rem_name_req_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Page Scan Repetition Mode
+    uint8_t         page_scan_rep_mode;
+    ///Reserved
+    uint8_t         rsvd;
+    /**
+     * Clock Offset
+     *
+     * Bits 14-0 : Bits 16-2 of CLKNslave-CLK
+     * Bit 15 : Clock_Offset_Valid_Flag
+     *   Invalid Clock Offset = 0
+     *   Valid Clock Offset = 1
+     */
+    uint16_t        clk_off;
+};
+
+/// HCI remote name request complete event structure
+/*@TRACE*/
+struct hci_rem_name_req_cmp_evt
+{
+    /// Status
+    uint8_t status;
+    /// BD Addr
+    struct bd_addr bd_addr;
+    /// Name
+    struct device_name name;
+};
+
+/// HCI setup synchronous connection command structure
+/*@TRACE*/
+struct hci_setup_sync_con_cmd
+{
+    ///Connection handle
+    uint16_t conhdl;
+    ///Transmit bandwidth
+    uint32_t tx_bw;
+    ///Receive bandwidth
+    uint32_t rx_bw;
+    ///Max latency
+    uint16_t max_lat;
+    ///Voice setting
+    uint16_t vx_set;
+    ///Retransmission effort
+    uint8_t retx_eff;
+    ///Packet type
+    uint16_t pkt_type;
+};
+
+/// HCI setup synchronous connection command structure
+/*@TRACE*/
+struct hci_enh_setup_sync_con_cmd
+{
+    uint16_t      conhdl;               // Connection Handle
+    uint32_t      tx_bw;                // Transmit Bandwidth (in B/sec)
+    uint32_t      rx_bw;                // Receive Bandwidth (in B/sec)
+    uint8_t       tx_cod_fmt[5];        // Transmit Coding Format
+    uint8_t       rx_cod_fmt[5];        // Receive Coding Format
+    uint16_t      tx_cod_fr_sz;         // Transmit Codec Frame Size (in B)
+    uint16_t      rx_cod_fr_sz;         // Receive Codec Frame Size (in B)
+    uint32_t      in_bw;                // Input Bandwidth (in B/sec)
+    uint32_t      out_bw;               // Output Bandwidth (in B/sec)
+    uint8_t       in_cod_fmt[5];        // Input Coding Format
+    uint8_t       out_cod_fmt[5];       // Output Coding Format
+    uint16_t      in_cod_data_sz;       // Input Coded Data Size (in bits)
+    uint16_t      out_cod_data_sz;      // Output Coded Data Size (in bits)
+    uint8_t       in_data_fmt;          // Input PCM Data Format
+    uint8_t       out_data_fmt;         // Output PCM Data Format
+    uint8_t       in_msb_pos;           // Input PCM Sample Payload MSB Position (in bits)
+    uint8_t       out_msb_pos;          // Output PCM Sample Payload MSB Position (in bits)
+    uint8_t       in_data_path;         // Input Data Path
+    uint8_t       out_data_path;        // Output Data Path
+    uint8_t       in_tr_unit_sz;        // Input Transport Unit Size (in bits)
+    uint8_t       out_tr_unit_sz;       // Output Transport Unit Size (in bits)
+    uint16_t      max_lat;              // Max Latency (in ms)
+    uint16_t      packet_type;          // Packet Type
+    uint8_t       retx_eff;             // Retransmission Effort
+};
+
+/// HCI io capability request reply command structure
+/*@TRACE*/
+struct hci_io_cap_req_reply_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///IO capability
+    uint8_t io_capa;
+    ///OOB data present
+    uint8_t oob_data_pres;
+    ///Authentication requirements
+    uint8_t auth_req;
+
+};
+
+/// HCI io capability request negative reply command structure
+/*@TRACE*/
+struct hci_io_cap_req_neg_reply_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Reason
+    uint8_t reason;
+};
+
+/// HCI user pass key request reply command structure
+/*@TRACE*/
+struct hci_user_passkey_req_reply_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Numeric value
+    uint32_t num_val;
+};
+
+/// HCI remote oob data request reply command structure
+/*@TRACE*/
+struct hci_rem_oob_data_req_reply_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///hash part
+    struct hash oob_c;
+    ///random part
+    struct randomizer oob_r;
+};
+
+/// HCI send key press notification command structure
+/*@TRACE*/
+struct hci_send_keypress_notif_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Notification type
+    uint8_t notif_type;
+};
+
+/// HCI truncated page command structure
+/*@TRACE*/
+struct hci_trunc_page_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    /// Page Scan Repetition Mode
+    uint8_t         page_scan_rep_mode;
+    /**
+     * Clock Offset
+     *
+     * Bits 14-0 : Bits 16-2 of CLKNslave-CLK
+     * Bit 15 : Clock_Offset_Valid_Flag
+     *   Invalid Clock Offset = 0
+     *   Valid Clock Offset = 1
+     */
+    uint16_t        clk_off;
+};
+
+/// HCI truncated page cancel command structure
+/*@TRACE*/
+struct hci_trunc_page_can_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+};
+
+/// HCI set connectionless slave broadcast command structure
+/*@TRACE*/
+struct hci_set_con_slv_bcst_cmd
+{
+    /// Enable
+    uint8_t enable;
+    /// LT_ADDR
+    uint8_t lt_addr;
+    /// LPO_Allowed
+    uint8_t lpo_allowed;
+    /// Packet_Type
+    uint16_t packet_type;
+    /// Interval_Min (in slots)
+    uint16_t interval_min;
+    /// Interval_Max (in slots)
+    uint16_t interval_max;
+    /// CSB_supervisionTO (in slots)
+    uint16_t csb_supv_to;
+};
+
+/// HCI set connectionless slave broadcast command complete event structure
+/*@TRACE*/
+struct hci_set_con_slv_bcst_cmd_cmp_evt
+{
+    /// Status
+    uint8_t status;
+    /// LT_ADDR
+    uint8_t lt_addr;
+    /// Interval (in slots)
+    uint16_t interval;
+};
+
+/// HCI set connectionless slave broadcast receive command structure
+/*@TRACE*/
+struct hci_set_con_slv_bcst_rec_cmd
+{
+    /// Enable
+    uint8_t enable;
+    /// BD_ADDR
+    struct bd_addr  bd_addr;
+    /// LT_ADDR
+    uint8_t lt_addr;
+    /// Interval (in slots)
+    uint16_t interval;
+    /// Clock_Offset (28 bits) - (CLKNslave � CLK) modulo 2^28
+    uint32_t clock_offset;
+    /// Next_Connectionless_Slave_Broadcast_Clock (28 bits)
+    uint32_t next_csb_clock;
+    /// CSB_supervisionTO (in slots)
+    uint16_t csb_supv_to;
+    /// Remote_Timing_Accuracy (in ppm)
+    uint8_t remote_timing_accuracy;
+    /// Skip
+    uint8_t skip;
+    /// Packet_Type
+    uint16_t packet_type;
+    /// AFH_Channel_Map
+    struct chnl_map afh_ch_map;
+};
+
+/// HCI set connectionless slave broadcast receive command complete event structure
+/*@TRACE*/
+struct hci_set_con_slv_bcst_rec_cmd_cmp_evt
+{
+    /// Status
+    uint8_t status;
+    /// BD_ADDR
+    struct bd_addr  bd_addr;
+    /// LT_ADDR
+    uint8_t lt_addr;
+};
+
+/// HCI Receive Synchronization Train command structure
+/*@TRACE*/
+struct hci_rec_sync_train_cmd
+{
+    /// BD_ADDR
+    struct bd_addr  bd_addr;
+    /// Synchronization_scanTO (in slots)
+    uint16_t sync_scan_to;
+    /// Sync_Scan_Window (in slots)
+     uint16_t sync_scan_win;
+    /// Sync_Scan_Interval (in slots)
+     uint16_t sync_scan_int;
+};
+
+/// HCI remote oob extended data request reply command structure
+/*@TRACE*/
+struct hci_rem_oob_ext_data_req_reply_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///hash part
+    struct hash oob_c_192;
+    ///random part
+    struct randomizer oob_r_192;
+    ///hash part
+    struct hash oob_c_256;
+    ///random part
+    struct randomizer oob_r_256;
+};
+
+/*@TRACE
+ * hci_le_gen_dhkey = hci_le_generate_dh_key_cmd*/
+struct hci_le_generate_dh_key_cmd
+{
+    uint8_t public_key[64];
+};
+/*
+ * HCI LINK POLICY COMMANDS PARAMETERS
+ ****************************************************************************************
+ */
+
+/// HCI setup quality of service command structure
+/*@TRACE*/
+struct hci_qos_setup_cmd
+{
+    ///Connection handle
+    uint16_t conhdl;
+    ///Flags
+    uint8_t flags;
+    ///Service type
+    uint8_t serv_type;
+    ///Token rate
+    uint32_t tok_rate;
+    ///Peak bandwidth
+    uint32_t pk_bw;
+    ///Latency
+    uint32_t lat;
+    ///Delay variation
+    uint32_t del_var;
+};
+
+/// HCI command complete event structure for read default link policy command structure
+/*@TRACE*/
+struct hci_rd_dft_link_pol_stg_cmd_cmp_evt
+{
+    ///Status of the command reception
+    uint8_t     status;
+    ///Link policy
+    uint16_t    link_pol_stg;
+};
+
+/*@TRACE*/
+struct hci_wr_dft_link_pol_stg_cmd
+{
+    ///Link policy
+    uint16_t    link_pol_stg;
+};
+
+/*
+ * HCI CONTROL & BASEBAND COMMANDS PARAMETERS
+ ****************************************************************************************
+ */
+
+/// HCI set event mask command structure
+/*@TRACE*/
+struct hci_set_evt_mask_cmd
+{
+    ///Event Mask
+    struct evt_mask    event_mask;
+};
+
+/// HCI set event filter command structure
+/*@TRACE*/
+struct hci_set_evt_filter_cmd
+{
+    /// Filter type
+    uint8_t filter_type;
+
+    /// Filters
+    union hci_filter
+    {
+        uint8_t clear_all_filter_reserved;
+
+        /// Inquiry Result Filter
+        struct inq_res_filter
+        {
+            /// Filter Condition type
+            uint8_t cond_type;
+
+            /// Filter conditions
+            union hci_inq_filter_cond
+            {
+                /// Reserved value (Inquiry Result Filter - condition type 0x00 has no condition)
+                uint8_t cond_0_reserved;
+
+                /// Inquiry Result Filter Condition - condition type 0x01
+                struct inq_res_filter_cond_1
+                {
+                    /// Class_of_Device
+                    struct devclass class_of_dev;
+                    /// Class_of_Device_Mask
+                    struct devclass class_of_dev_msk;
+                } cond_1;
+
+                /// Inquiry Result Filter Condition - condition type 0x02
+                struct inq_res_filter_cond_2
+                {
+                    /// BD Address
+                    struct bd_addr bd_addr;
+                } cond_2;
+            } cond;
+        } inq_res;
+
+        /// Connection Setup Filter
+        struct con_set_filter
+        {
+            /// Filter Condition type
+            uint8_t cond_type;
+
+            /// Filter conditions
+            union hci_con_filter_cond
+            {
+                /// Connection Setup Filter Condition - condition type 0x00
+                struct con_set_filter_cond_0
+                {
+                    /// Auto_Accept_Flag
+                    uint8_t auto_accept;
+                } cond_0;
+
+                /// Connection Setup Filter Condition - condition type 0x01
+                struct con_set_filter_cond_1
+                {
+                    /// Class_of_Device
+                    struct devclass class_of_dev;
+                    /// Class_of_Device_Mask
+                    struct devclass class_of_dev_msk;
+                    /// Auto_Accept_Flag
+                    uint8_t auto_accept;
+                } cond_1;
+
+                /// Connection Setup Filter Condition - condition type 0x02
+                struct con_set_filter_cond_2
+                {
+                    /// BD Address
+                    struct bd_addr bd_addr;
+                    /// Auto_Accept_Flag
+                    uint8_t auto_accept;
+                } cond_2;
+            } cond;
+
+        } con_set;
+
+    } filter;
+};
+
+/// HCI command completed event structure for the flush command
+/*@TRACE*/
+struct hci_flush_cmd_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+};
+
+/// HCI command complete event structure for the Read pin type command
+/*@TRACE*/
+struct hci_rd_pin_type_cmd_cmp_evt
+{
+    ///Status of the command
+    uint8_t     status;
+    ///PIN type
+    uint8_t   pin_type;
+};
+
+/*@TRACE*/
+struct hci_wr_pin_type_cmd
+{
+    ///PIN type
+    uint8_t pin_type;
+};
+
+/*@TRACE*/
+struct hci_rd_stored_lk_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Read all flag
+    uint8_t rd_all_flag;
+};
+
+/// HCI command complete event structure for read stored link key command
+/*@TRACE*/
+struct hci_rd_stored_lk_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    ///Maximum number of key
+    uint16_t num_key_max;
+    ///Read number of key
+    uint16_t num_key_rd;
+};
+
+#if BT_EMB_PRESENT
+/*@TRACE*/
+struct hci_wr_stored_lk_cmd
+{
+    /// Number of key to write
+    uint8_t num_key_wr;
+
+    /// BD Address + Key table
+    struct bd_addr_plus_key link_keys[HCI_MAX_CMD_PARAM_SIZE / sizeof(struct bd_addr_plus_key)];
+};
+#endif //BT_EMB_PRESENT
+
+/// HCI command complete event structure for write stored link key command
+/*@TRACE*/
+struct hci_wr_stored_lk_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    ///number of key written
+    uint8_t    num_key_wr;
+};
+
+/*@TRACE*/
+struct hci_del_stored_lk_cmd
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Delete all flag
+    uint8_t del_all_flag;
+};
+
+/// HCI command complete event structure for delete stored link key command
+/*@TRACE*/
+struct hci_del_stored_lk_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    ///Read number of key
+    uint16_t num_key_del;
+};
+
+/*@TRACE*/
+struct hci_wr_local_name_cmd
+{
+    ///Name
+    struct device_name  name;
+};
+
+/// HCI command complete event structure for the read local name command
+/*@TRACE*/
+struct hci_rd_local_name_cmd_cmp_evt
+{
+    ///Status of the command
+    uint8_t     status;
+    ///Name
+    uint8_t  name[BD_NAME_SIZE];
+};
+
+/// HCI command complete event structure for the Read connection accept to command
+/*@TRACE*/
+struct hci_rd_con_accept_to_cmd_cmp_evt
+{
+    ///Status of the command
+    uint8_t     status;
+    /// Connection accept timeout (in slots)
+    uint16_t    con_acc_to;
+};
+
+/*@TRACE*/
+struct hci_wr_con_accept_to_cmd
+{
+    /// Connection accept timeout (in slots)
+    uint16_t    con_acc_to;
+};
+
+/// HCI command complete event structure for the Read page to command
+/*@TRACE*/
+struct hci_rd_page_to_cmd_cmp_evt
+{
+    ///Status of the command
+    uint8_t     status;
+    /// Page timeout (in slots)
+    uint16_t    page_to;
+};
+
+/*@TRACE*/
+struct hci_wr_page_to_cmd
+{
+    /// Page timeout (in slots)
+    uint16_t    page_to;
+};
+
+/// HCI command complete event structure for the Read scan enable command
+/*@TRACE*/
+struct hci_rd_scan_en_cmd_cmp_evt
+{
+    ///Status of the command
+    uint8_t     status;
+    ///Status of the scan enable
+    uint8_t     scan_en;
+};
+
+/*@TRACE*/
+struct hci_wr_scan_en_cmd
+{
+    ///Status of the scan enable
+    uint8_t scan_en;
+};
+
+/// HCI command complete event structure for the Read scan activity command
+/*@TRACE*/
+struct hci_rd_page_scan_act_cmd_cmp_evt
+{
+    ///Status of the command
+    uint8_t     status;
+    /// Page scan interval (in slots)
+    uint16_t page_scan_intv;
+    /// Page scan window (in slots)
+    uint16_t page_scan_win;
+};
+
+/*@TRACE*/
+struct hci_wr_page_scan_act_cmd
+{
+    /// Page scan interval (in slots)
+    uint16_t page_scan_intv;
+    /// Page scan window (in slots)
+    uint16_t page_scan_win;
+};
+
+/// HCI command complete event structure for the Read inquiry scan activity command
+/*@TRACE*/
+struct hci_rd_inq_scan_act_cmd_cmp_evt
+{
+    /// Status of the command
+    uint8_t  status;
+    /// Inquiry scan interval (in slots)
+    uint16_t inq_scan_intv;
+    /// Inquiry scan window (in slots)
+    uint16_t inq_scan_win;
+};
+
+/*@TRACE*/
+struct hci_wr_inq_scan_act_cmd
+{
+    /// Inquiry scan interval (in slots)
+    uint16_t inq_scan_intv;
+    /// Inquiry scan window (in slots)
+    uint16_t inq_scan_win;
+};
+
+/// HCI command complete event structure for the Read authentication command
+/*@TRACE*/
+struct hci_rd_auth_en_cmd_cmp_evt
+{
+    ///Status of the command
+    uint8_t     status;
+    ///Value of the authentication
+    uint8_t    auth_en;
+};
+
+/*@TRACE*/
+struct hci_wr_auth_en_cmd
+{
+    ///Value of the authentication
+    uint8_t auth_en;
+};
+
+/// HCI command complete event structure for the read class of device command
+/*@TRACE*/
+struct hci_rd_class_of_dev_cmd_cmp_evt
+{
+    ///Status of the command
+    uint8_t     status;
+    ///Class of device
+    struct devclass class_of_dev;
+};
+
+/*@TRACE*/
+struct hci_wr_class_of_dev_cmd
+{
+    ///Class of device
+    struct devclass class_of_dev;
+};
+
+/// HCI read voice settings complete event
+/*@TRACE*/
+struct hci_rd_voice_stg_cmd_cmp_evt
+{
+    ///Status of the command reception
+    uint8_t     status;
+    /// Voice setting
+    uint16_t voice_stg;
+};
+
+/*@TRACE*/
+struct hci_wr_voice_stg_cmd
+{
+    /// voice setting
+    uint16_t voice_stg;
+};
+
+/// HCI command complete event structure for read number of broadcast retrans command
+/*@TRACE*/
+struct hci_rd_nb_bdcst_retx_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    ///Read number of broadcast retransmission
+    uint8_t num_bcst_ret;
+};
+
+/*@TRACE*/
+struct hci_wr_nb_bdcst_retx_cmd
+{
+    ///Read number of broadcast retransmission
+    uint8_t num_bcst_ret;
+};
+
+/// HCI command complete event structure for the Read Synchronous Flow Control command
+/*@TRACE*/
+struct hci_rd_sync_flow_ctrl_en_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    ///Synchronous flow control enable
+    uint8_t     sync_flow_ctrl_en;
+};
+
+/*@TRACE*/
+struct hci_wr_sync_flow_ctrl_en_cmd
+{
+    /// Synchronous Flow Control enable
+    uint8_t   sync_flow_ctrl_en;
+};
+
+///HCI set controller to host flow control command
+/*@TRACE*/
+struct hci_set_ctrl_to_host_flow_ctrl_cmd
+{
+    ///Flow control enable for controller
+    uint8_t flow_cntl;
+};
+
+///HCI host buffer size command
+/*@TRACE*/
+struct hci_host_buf_size_cmd
+{
+    ///Host ACL packet length
+    uint16_t    acl_pkt_len;
+    ///Host synchronous packet length
+    uint8_t     sync_pkt_len;
+    ///Host Total number of ACL packets allowed
+    uint16_t    nb_acl_pkts;
+    ///Host total number of synchronous packets allowed
+    uint16_t    nb_sync_pkts;
+};
+
+#if BT_EMB_PRESENT
+///HCI host number of completed packets command
+/*@TRACE*/
+struct hci_host_nb_cmp_pkts_cmd
+{
+    ///Number of handles for which the completed packets number is given
+    uint8_t     nb_of_hdl;
+    ///Array of connection handles
+    uint16_t    con_hdl[MAX_NB_ACTIVE_ACL];
+    ///Array of number of completed packets values for connection handles.
+    uint16_t    nb_comp_pkt[MAX_NB_ACTIVE_ACL];
+};
+#elif BLE_EMB_PRESENT || BLE_HOST_PRESENT
+///HCI host number of completed packets command
+/*@TRACE*/
+struct hci_host_nb_cmp_pkts_cmd
+{
+    ///Number of handles for which the completed packets number is given
+    uint8_t     nb_of_hdl;
+    ///Array of connection handles
+    uint16_t    con_hdl[BLE_ACTIVITY_MAX+1];     // ensure that at least 1 element is present
+    ///Array of number of completed packets values for connection handles.
+    uint16_t    nb_comp_pkt[BLE_ACTIVITY_MAX+1]; // ensure that at least 1 element is present
+};
+#endif //BLE_EMB_PRESENT || BLE_HOST_PRESENT
+
+/// HCI read link supervision timeout command parameters structure
+struct hci_rd_link_supv_to_cmd_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///Link supervision timeout
+    uint16_t lsto_val;
+};
+
+/// HCI write link supervision timeout command parameters structure
+/*@TRACE*/
+struct hci_wr_link_supv_to_cmd
+{
+    ///Connection handle
+    uint16_t conhdl;
+    ///Link supervision timeout
+    uint16_t lsto_val;
+};
+
+/// HCI command complete event structure for the nb of supported IAC command
+/*@TRACE*/
+struct hci_rd_nb_supp_iac_cmd_cmp_evt
+{
+    ///Status of the command
+    uint8_t     status;
+    ///nb_of iac
+    uint8_t  nb_iac;
+};
+
+/// HCI command complete event structure for read current IAC LAP command
+/*@TRACE*/
+struct hci_rd_curr_iac_lap_cmd_cmp_evt
+{
+    ///Status of the command
+    uint8_t     status;
+    ///nb of current iac
+    uint8_t  nb_curr_iac;
+    ///lap
+    struct lap iac_lap;
+};
+
+/// HCI write current IAC LAP command structure
+/*@TRACE*/
+struct hci_wr_curr_iac_lap_cmd
+{
+    /// Number of current iac laps
+    uint8_t  nb_curr_iac;
+    ///lap
+    struct lap iac_lap[(HCI_MAX_CMD_PARAM_SIZE / BD_ADDR_LAP_LEN) - 1];
+};
+
+/*@TRACE*/
+struct hci_set_afh_host_ch_class_cmd
+{
+    ///AFH channel map
+    struct chnl_map   afh_ch;
+};
+
+/// HCI command complete event structure for write inquiry scan type command structure
+/*@TRACE*/
+struct hci_rd_inq_scan_type_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    /// Inquiry scan type
+    uint8_t     inq_scan_type;
+};
+
+/*@TRACE*/
+struct hci_wr_inq_scan_type_cmd
+{
+    /// Inquiry scan type
+    uint8_t     inq_scan_type;
+};
+
+/// HCI command complete event structure for read inquiry mode command structure
+/*@TRACE*/
+struct hci_rd_inq_mode_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    /// Inquiry mode
+    uint8_t     inq_mode;
+};
+
+/*@TRACE*/
+struct hci_wr_inq_mode_cmd
+{
+    /// Inquiry mode
+    uint8_t     inq_mode;
+};
+
+/// HCI command complete event structure for write page scan type command structure
+/*@TRACE*/
+struct hci_rd_page_scan_type_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    /// Page scan type
+    uint8_t     page_scan_type;
+};
+
+/*@TRACE*/
+struct hci_wr_page_scan_type_cmd
+{
+    /// Page scan type
+    uint8_t     page_scan_type;
+};
+
+/// HCI command complete event structure for read assessment mode command structure
+/*@TRACE*/
+struct hci_rd_afh_ch_assess_mode_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    ///AFH channel assessment mode
+    uint8_t     afh_ch_ass_mode;
+};
+
+/*@TRACE*/
+struct hci_wr_afh_ch_assess_mode_cmd
+{
+    ///AFH channel assessment mode
+    uint8_t     afh_ch_ass_mode;
+};
+
+/// HCI command complete event structure for remote name request cancel command
+/*@TRACE*/
+struct hci_rd_ext_inq_rsp_cmd_cmp_evt
+{
+    ///status
+    uint8_t     status;
+    ///FEC required
+    uint8_t     fec_req;
+    ///Extended inquiry response
+    struct eir  eir;
+};
+
+/*@TRACE*/
+struct hci_wr_ext_inq_rsp_cmd
+{
+    ///FEC required
+    uint8_t     fec_req;
+    ///Extended inquiry response
+    struct eir  eir;
+};
+
+/// HCI command complete event structure for remote name request cancel command
+/*@TRACE*/
+struct hci_rd_sp_mode_cmd_cmp_evt
+{
+    ///status
+    uint8_t     status;
+    ///Simple pairing mode
+    uint8_t     sp_mode;
+};
+
+/*@TRACE*/
+struct hci_wr_sp_mode_cmd
+{
+    ///Simple pairing mode
+    uint8_t     sp_mode;
+};
+
+/// HCI command complete event structure for read oob data command
+/*@TRACE*/
+struct hci_rd_loc_oob_data_cmd_cmp_evt
+{
+    ///status
+    uint8_t     status;
+    ///hash part
+    struct hash oob_c;
+    ///random part
+    struct randomizer oob_r;
+};
+
+/// HCI command complete event structure for read inquiry response transmit power command
+/*@TRACE*/
+struct hci_rd_inq_rsp_tx_pwr_lvl_cmd_cmp_evt
+{
+    ///status
+    uint8_t status;
+    ///TX power
+    uint8_t tx_pwr;
+};
+
+/*@TRACE*/
+struct hci_wr_inq_tx_pwr_lvl_cmd
+{
+    ///TX power
+    int8_t tx_pwr;
+};
+
+/// HCI command complete event structure for read erroneous data reporting command
+/*@TRACE*/
+struct hci_rd_dft_err_data_rep_cmd_cmp_evt
+{
+    ///status
+    uint8_t     status;
+    ///Erroneous data reporting
+    uint8_t     err_data_rep;
+};
+
+/*@TRACE*/
+struct hci_wr_dft_err_data_rep_cmd
+{
+    ///Erroneous data reporting
+    uint8_t err_data_rep;
+};
+
+/// HCI read LE Host Supported complete event
+/*@TRACE*/
+struct  hci_rd_le_host_supp_cmd_cmp_evt
+{
+    ///Status
+    uint8_t status;
+    ///LE_Supported_Host
+    uint8_t le_supported_host;
+    ///Simultaneous_LE_Host
+    uint8_t simultaneous_le_host;
+};
+
+/// HCI write LE Host Supported command
+/*@TRACE*/
+struct  hci_wr_le_host_supp_cmd
+{
+    ///LE_Supported_Host
+    uint8_t le_supported_host;
+    ///Simultaneous_LE_Host
+    uint8_t simultaneous_le_host;
+};
+
+/// HCI Set MWS Channel Parameters command
+/*@TRACE*/
+struct hci_set_mws_channel_params_cmd
+{
+    ///MWS_Channel_Enable
+    uint8_t mws_channel_enable;
+    ///MWS_RX_Center_Frequency
+    uint16_t mws_rx_center_frequency;
+    ///MWS_TX_Center_Frequency
+    uint16_t mws_tx_center_frequency;
+    ///MWS_RX_Channel_Bandwidth
+    uint16_t mws_rx_channel_bandwidth;
+    ///MWS_TX_Channel_Bandwidth
+    uint16_t mws_tx_channel_bandwidth;
+    ///MWS_Channel_Type
+    uint8_t mws_channel_type;
+};
+
+/// HCI Set External Frame Configuration command
+/*@TRACE*/
+struct hci_set_external_frame_config_cmd
+{
+    /// Ext_Frame_Duration
+    uint16_t ext_fr_duration;
+    /// Ext_Frame_Sync_Assert_Offset
+    int16_t ext_fr_sync_assert_offset;
+    /// Ext_Frame_Sync_Assert_Jitter
+    uint16_t ext_fr_sync_assert_jitter;
+    /// Ext_Frame_Num_Periods
+    uint8_t ext_fr_num_periods;
+    /// Period Durations & Types
+    struct ext_fr_period period[1/*__ARRAY_EMPTY*/];
+};
+
+/// HCI Set MWS Signaling command
+/*@TRACE*/
+struct hci_set_mws_signaling_cmd
+{
+    ///MWS_RX_Assert_Offset
+    int16_t mws_rx_assert_offset;
+    ///MWS_RX_Assert_Jitter
+    uint16_t mws_rx_assert_jitter;
+    ///MWS_RX_Deassert_Offset
+    int16_t mws_rx_deassert_offset;
+    ///MWS_RX_Deassert_Jitter
+    uint16_t mws_rx_deassert_jitter;
+    ///MWS_TX_Assert_Offset
+    int16_t mws_tx_assert_offset;
+    ///MWS_TX_Assert_Jitter
+    uint16_t mws_tx_assert_jitter;
+    ///MWS_TX_Deassert_Offset
+    int16_t mws_tx_deassert_offset;
+    ///MWS_TX_Deassert_Jitter
+    uint16_t mws_tx_deassert_jitter;
+    ///MWS_Pattern_Assert_Offset
+    int16_t mws_pattern_assert_offset;
+    ///MWS_Pattern_Assert_Jitter
+    uint16_t mws_pattern_assert_jitter;
+    ///MWS_Inactivity_Duration_Assert_Offset
+    int16_t mws_inactivity_duration_assert_offset;
+    ///MWS_Inactivity_Duration_Assert_Jitter
+    uint16_t mws_inactivity_duration_assert_jitter;
+    ///MWS_Scan_Frequency_Assert_Offset
+    int16_t mws_scan_frequency_assert_offset;
+    ///MWS_Scan_Frequency_Assert_Jitter
+    uint16_t mws_scan_frequency_assert_jitter;
+    ///MWS_Priority_Assert_Offset_Request
+    uint16_t mws_priority_assert_offset_request;
+};
+
+/// HCI Set MWS Signaling command complete event
+/*@TRACE*/
+struct hci_set_mws_signaling_cmd_cmp_evt
+{
+    ///Status
+    uint8_t status;
+    ///Bluetooth_Rx_Priority_Assert_Offset
+    int16_t bt_rx_prio_assert_offset;
+    ///Bluetooth_Rx_Priority_Assert_Jitter
+    uint16_t bt_rx_prio_assert_jitter;
+    ///Bluetooth_Rx_Priority_Deassert_Offset
+    int16_t bt_rx_prio_deassert_offset;
+    ///Bluetooth_Rx_Priority_Deassert_Jitter
+    uint16_t bt_rx_prio_deassert_jitter;
+    ///802_Rx_Priority_Assert_Offset
+    int16_t _802_rx_prio_assert_offset;
+    ///802_Rx_Priority_Assert_Jitter
+    uint16_t _802_rx_prio_assert_jitter;
+    ///802_Rx_Priority_Deassert_Offset
+    int16_t _802_rx_prio_deasssert_offset;
+    ///802_Rx_Priority_Deassert_Jitter
+    uint16_t _802_rx_prio_deassert_jitter;
+    ///Bluetooth_Tx_On_Assert_Offset
+    int16_t bt_tx_on_assert_offset;
+    ///Bluetooth_Tx_On_Assert_Jitter
+    uint16_t bt_tx_on_assert_jitter;
+    ///Bluetooth_Tx_On_Deassert_Offset
+    int16_t bt_tx_on_deassert_offset;
+    ///Bluetooth_Tx_On_Deassert_Jitter
+    uint16_t bt_tx_on_deassert_jitter;
+    ///802_Tx_On_Assert_Offset
+    int16_t _802_tx_on_assert_offset;
+    ///802_Tx_On_Assert_Jitter
+    uint16_t _802_tx_on_assert_jitter;
+    ///802_Tx_On_Deassert_Offset
+    int16_t _802_tx_on_deassert_offset;
+    ///802_Tx_On_Deassert_Jitter
+    uint16_t _802_tx_on_deassert_jitter;
+};
+
+/// HCI Set MWS Transport Layer command
+/*@TRACE*/
+struct hci_set_mws_transport_layer_cmd
+{
+    ///Transport_Layer
+    uint8_t transport_layer;
+    ///To_MWS_Baud_Rate
+    uint32_t to_mws_baud_rate;
+    ///From_MWS_Baud_Rate
+    uint32_t from_mws_baud_rate;
+};
+
+/// HCI Set MWS Scan Frequency Table command
+/*@TRACE*/
+struct hci_set_mws_scan_freq_table_cmd
+{
+    ///Num_Scan_Frequencies
+    uint8_t num_scan_frequencies;
+    ///Scan_Frequencys Low & High
+    struct mws_scan_freq scan_freq[1/*__ARRAY_EMPTY*/];
+};
+
+/// HCI Set MWS Pattern Configuration command
+/*@TRACE*/
+struct hci_set_mws_pattern_config_cmd
+{
+    ///MWS_PATTERN_Index
+    uint8_t mws_pattern_index;
+    ///MWS_PATTERN_NumIntervals
+    uint8_t num_intervals;
+    ///MWS_PATTERN_Interval Duration & Type
+    struct mws_pattern_intv intv[1/*__ARRAY_EMPTY*/];
+};
+
+/// Hci Get MWS Transport Layer Configuration command complete event
+/*@TRACE*/
+struct hci_get_mws_transport_layer_config_cmd_cmp_evt
+{
+    ///Status
+    uint8_t status;
+    ///Num_Transports
+    uint8_t num_transports;
+    ///Transport_Layers
+    struct mws_transport tran[1/*__ARRAY_EMPTY*/];
+};
+
+/// HCI read Secure Connections Host Support complete event
+/*@TRACE*/
+struct  hci_rd_sec_con_host_supp_cmd_cmp_evt
+{
+    ///Status
+    uint8_t status;
+    /// Secure Connections Host Support
+    uint8_t sec_con_host_supp;
+};
+
+/// HCI write Secure Connections Host Support command
+/*@TRACE*/
+struct  hci_wr_sec_con_host_supp_cmd
+{
+    /// Secure Connections Host Support
+    uint8_t sec_con_host_supp;
+};
+
+/// HCI write Secure Connections Test Mode command
+struct  hci_wr_sec_con_test_mode_cmd
+{
+    /// Connection handle
+    uint16_t conhdl;
+    /// DM1 ACL-U mode
+    uint8_t dm1_acl_u_mode;
+    /// eSCO loopback mode
+    uint8_t esco_loopback_mode;
+};
+
+/// HCI write Secure Connections Test Mode complete event
+struct  hci_wr_sec_con_test_mode_cmd_cmp_evt
+{
+    ///Status
+    uint8_t status;
+    /// Connection handle
+    uint16_t conhdl;
+};
+
+/// HCI Set Reserved LT_ADDR command
+/*@TRACE*/
+struct hci_set_res_lt_addr_cmd
+{
+    /// LT_ADDR
+    uint8_t lt_addr;
+};
+
+/// HCI Set Reserved LT_ADDR command complete event
+/*@TRACE*/
+struct hci_set_res_lt_addr_cmd_cmp_evt
+{
+    /// Status
+    uint8_t  status;
+    /// LT_ADDR
+    uint8_t lt_addr;
+};
+
+/// HCI Delete Reserved LT_ADDR command
+/*@TRACE*/
+struct hci_del_res_lt_addr_cmd
+{
+    /// LT_ADDR
+    uint8_t lt_addr;
+};
+
+/// HCI Delete Reserved LT_ADDR command complete event
+/*@TRACE*/
+struct hci_del_res_lt_addr_cmd_cmp_evt
+{
+    /// Status
+    uint8_t  status;
+    /// LT_ADDR
+    uint8_t lt_addr;
+};
+
+/// HCI Set Connectionless Slave Broadcast Data command
+/*@TRACE*/
+struct hci_set_con_slv_bcst_data_cmd
+{
+    /// LT_ADDR
+    uint8_t lt_addr;
+    /// Fragment
+    uint8_t fragment;
+    /// Data_Length (in bytes)
+    uint8_t data_length;
+    /// Data
+    uint8_t data[__ARRAY_EMPTY];
+};
+
+/// HCI Set Connectionless Slave Broadcast Data command complete event
+/*@TRACE*/
+struct hci_set_con_slv_bcst_data_cmd_cmp_evt
+{
+    /// Status
+    uint8_t  status;
+    /// LT_ADDR
+    uint8_t lt_addr;
+};
+
+/// HCI Read Synchronization Train Parameters command complete event
+/*@TRACE*/
+struct hci_rd_sync_train_param_cmd_cmp_evt
+{
+    /// Status
+    uint8_t  status;
+    /// Sync_Train_Interval (in slots)
+    uint16_t sync_train_int;
+    /// synchronization_trainTO (in slots)
+    uint32_t sync_train_to;
+    /// Service_Data
+    uint8_t service_data;
+};
+
+/// HCI Write Synchronization Train Parameters command
+/*@TRACE*/
+struct hci_wr_sync_train_param_cmd
+{
+    /// Interval_Min (in slots)
+    uint16_t int_min;
+    /// Interval_Max (in slots)
+    uint16_t int_max;
+    /// synchronization_trainTO (in slots)
+    uint32_t sync_train_to;
+    /// Service_Data
+    uint8_t service_data;
+};
+
+/// HCI Write Synchronization Train Parameters command complete event
+/*@TRACE*/
+struct hci_wr_sync_train_param_cmd_cmp_evt
+{
+    /// Status
+    uint8_t  status;
+    /// Sync_Train_Interval (in slots)
+    uint16_t sync_train_int;
+};
+
+// HCI Synchronization Train Complete event
+struct hci_sync_train_cmp_evt
+{
+    /// Status
+    uint8_t  status;
+};
+
+/// HCI read authenticated payload timeout command
+/*@TRACE*/
+struct hci_rd_auth_payl_to_cmd
+{
+    ///Connection handle
+    uint16_t     conhdl;
+};
+
+/// HCI command complete event structure for the Read Authenticated Payload Timeout Command
+/*@TRACE*/
+struct hci_rd_auth_payl_to_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    ///Connection handle
+    uint16_t     conhdl;
+    ///Authenticated payload timeout
+    uint16_t     auth_payl_to;
+};
+
+/// HCI command complete event structure for read oob extended data command
+/*@TRACE*/
+struct hci_rd_loc_oob_ext_data_cmd_cmp_evt
+{
+    ///status
+    uint8_t     status;
+    ///hash part
+    struct hash oob_c_192;
+    ///random part
+    struct randomizer oob_r_192;
+    ///hash part
+    struct hash oob_c_256;
+    ///random part
+    struct randomizer oob_r_256;
+};
+
+/// HCI read Extended Page Timeout CC event
+/*@TRACE*/
+struct hci_rd_ext_page_to_cmd_cmp_evt
+{
+    /// Status
+    uint8_t  status;
+    /**
+     * Extended Page Timeout measured in Number of Baseband slots. Interval Length = N * 0.625 msec (1 Baseband slot)
+     * Range for N: 0x0000 (default) - 0xFFFF
+     * Time Range: 0 - 40.9 Seconds
+     */
+    uint16_t ext_page_to;
+};
+
+/// HCI write Extended Page Timeout
+/*@TRACE*/
+struct hci_wr_ext_page_to_cmd
+{
+    /**
+     * Extended Page Timeout measured in Number of Baseband slots. Interval Length = N * 0.625 msec (1 Baseband slot)
+     * Range for N: 0x0000 (default) - 0xFFFF
+     * Time Range: 0 - 40.9 Seconds
+     */
+    uint16_t ext_page_to;
+};
+
+/// HCI read Extended Inquiry Length CC event
+/*@TRACE*/
+struct hci_rd_ext_inq_len_cmd_cmp_evt
+{
+    /// Status
+    uint8_t  status;
+    /// Extended Inquiry Length
+    uint16_t ext_inq_len;
+};
+
+/// HCI write Extended Inquiry Length
+/*@TRACE*/
+struct hci_wr_ext_inq_len_cmd
+{
+    /// Extended Inquiry Length
+    uint16_t ext_inq_len;
+};
+
+/*
+ * HCI INFORMATIONAL PARAMETERS COMMANDS PARAMETERS
+ ****************************************************************************************
+ */
+
+///HCI command complete event structure for read local version information
+/*@TRACE*/
+struct hci_rd_local_ver_info_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    ///HCI version number
+    uint8_t     hci_ver;
+    ///HCI revision number
+    uint16_t    hci_rev;
+    ///LMP version
+    uint8_t     lmp_ver;
+    ///manufacturer name
+    uint16_t    manuf_name;
+    ///LMP Subversion
+    uint16_t    lmp_subver;
+};
+
+///HCI command complete event structure for read local supported commands
+/*@TRACE*/
+struct hci_rd_local_supp_cmds_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t             status;
+    ///Supported Commands structure
+    struct supp_cmds    local_cmds;
+};
+
+/// HCI command complete event structure for read local supported features command
+/*@TRACE*/
+struct hci_rd_local_supp_feats_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t         status;
+    ///Local  supported features
+    struct features feats;
+};
+
+/*@TRACE*/
+struct hci_rd_local_ext_feats_cmd
+{
+    ///Page number
+    uint8_t page_nb;
+};
+
+/// HCI command complete event structure for read local extended features command
+/*@TRACE*/
+struct hci_rd_local_ext_feats_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    ///Page number
+    uint8_t     page_nb;
+    ///Maximum page number
+    uint8_t     page_nb_max;
+    ///Extended LMP features
+    struct features ext_feats;
+};
+
+///HCI command complete event structure for the Read Buffer Size Command
+/*@TRACE*/
+struct hci_rd_buff_size_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    ///ACL data packet length controller can receive from host
+    uint16_t     hc_data_pk_len;
+    ///Synchronous data packet length controller can receive from host
+    uint8_t      hc_sync_pk_len;
+    ///Total number of ACL data packets controller can receive from host
+    uint16_t     hc_tot_nb_data_pkts;
+    ///Total number of synchronous data packets controller can receive from host
+    uint16_t     hc_tot_nb_sync_pkts;
+};
+
+///HCI command complete event structure for read bd address
+/*@TRACE*/
+struct hci_rd_bd_addr_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t             status;
+    ///BD address
+    struct bd_addr      local_addr;
+};
+
+/// HCI command complete event structure for read local supported codecs
+/*@TRACE*/
+struct hci_rd_local_supp_codecs_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t               status;
+    uint8_t               nb_supp_codecs;
+    uint8_t               nb_supp_vendor_specific_codecs;
+
+//    ///Supported Codecs structure
+//    struct supp_codecs    local_codecs;
+};
+
+/// HCI command complete event structure for read local simple pairing options
+/*@TRACE*/
+struct hci_rd_local_sp_opt_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t status;
+    /// Simple Pairing options (bit 0: Remote public key validation)
+    uint8_t sp_opt;
+    /// Maximum Encryption Key Size (in octets)
+    uint8_t max_enc_key_size;
+};
+
+
+/*
+ * HCI STATUS PARAMETERS COMMANDS PARAMETERS
+ ****************************************************************************************
+ */
+
+/// HCI command complete event structure for read rssi
+/*@TRACE*/
+struct hci_rd_rssi_cmd_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///RSSI value
+    uint8_t rssi;
+};
+
+/*@TRACE*/
+struct hci_rd_clk_cmd
+{
+    ///Connection handle
+    uint16_t conhdl;
+    ///Which clock
+    uint8_t clk_type;
+};
+
+/// HCI read clock command structure
+/*@TRACE*/
+struct hci_rd_clk_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///clock
+    uint32_t clk;
+    ///Accuracy
+    uint16_t clk_acc;
+};
+
+
+/*
+ * HCI TESTING COMMANDS PARAMETERS
+ ****************************************************************************************
+ */
+
+/// HCI command complete event structure for read loop back mode command
+/*@TRACE*/
+struct hci_rd_loopback_mode_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    ///Local  supported features
+    uint8_t     lb_mode;
+};
+
+/*@TRACE*/
+struct hci_wr_loopback_mode_cmd
+{
+    ///Local  supported features
+    uint8_t     lb_mode;
+};
+
+/*@TRACE*/
+struct hci_wr_sp_dbg_mode_cmd
+{
+    ///Simple pairing mode
+    uint8_t     sp_mode;
+};
+
+
+/*
+ * HCI LE CONTROLLER COMMANDS PARAMETERS
+ ****************************************************************************************
+ */
+
+///HCI LE Set Event Mask Command parameters structure
+/*@TRACE*/
+struct hci_le_set_evt_mask_cmd
+{
+    ///LE Event Mask
+    struct evt_mask le_mask;
+};
+
+///HCI LE Set Random Address Command parameters structure
+/*@TRACE*/
+struct hci_le_set_rand_addr_cmd
+{
+    ///Random address to set
+    struct bd_addr rand_addr;
+};
+
+///HCI LE Set Advertising Parameters Command parameters structure
+/*@TRACE*/
+struct hci_le_set_adv_param_cmd
+{
+    ///Minimum interval for advertising
+    uint16_t       adv_intv_min;
+    ///Maximum interval for advertising
+    uint16_t       adv_intv_max;
+    ///Advertising type
+    uint8_t        adv_type;
+    ///Own address type:  public=0 / random=1 / rpa_or_pub=2 / rpa_or_rnd=3
+    uint8_t        own_addr_type;
+    ///Peer address type: public=0 / random=1
+    uint8_t        peer_addr_type;
+    ///Peer Bluetooth device address
+    struct bd_addr peer_addr;
+    ///Advertising channel map
+    uint8_t        adv_chnl_map;
+    ///Advertising filter policy
+    uint8_t        adv_filt_policy;
+};
+
+///HCI LE Set Advertising Data Command parameters structure
+/*@TRACE*/
+struct hci_le_set_adv_data_cmd
+{
+    ///Advertising data length
+    uint8_t         adv_data_len;
+    ///Advertising data - maximum 31 bytes
+    struct adv_data data;
+};
+
+///HCI LE Set Scan Response Data Command parameters structure
+/*@TRACE*/
+struct hci_le_set_scan_rsp_data_cmd
+{
+    ///Scan response data length
+    uint8_t              scan_rsp_data_len;
+    ///Scan response data - maximum 31 bytes
+    struct scan_rsp_data data;
+};
+
+///HCI LE Set Advertise Enable Command parameters structure
+/*@TRACE*/
+struct hci_le_set_adv_en_cmd
+{
+    ///Advertising enable - 0=disabled, 1=enabled
+    uint8_t        adv_en;
+};
+
+///HCI LE Set Scan Parameters Command parameters structure
+/*@TRACE*/
+struct hci_le_set_scan_param_cmd
+{
+    ///Scan type - 0=passive / 1=active
+    uint8_t        scan_type;
+    ///Scan interval
+    uint16_t       scan_intv;
+    ///Scan window size
+    uint16_t       scan_window;
+    ///Own address type - public=0 / random=1 / rpa_or_pub=2 / rpa_or_rnd=3
+    uint8_t        own_addr_type;
+    ///Scan filter policy
+    uint8_t        scan_filt_policy;
+};
+
+///HCI LE Set Scan Enable Command parameters structure
+/*@TRACE*/
+struct hci_le_set_scan_en_cmd
+{
+    ///Scan enable - 0=disabled, 1=enabled
+    uint8_t        scan_en;
+    ///Enable for duplicates filtering - 0 =disabled/ 1=enabled
+    uint8_t        filter_duplic_en;
+};
+
+///HCI LE Create Connection Command parameters structure
+/*@TRACE*/
+struct hci_le_create_con_cmd
+{
+    ///Scan interval (N * 0.625 ms)
+    uint16_t       scan_intv;
+    ///Scan window size (N * 0.625 ms)
+    uint16_t       scan_window;
+    ///Initiator filter policy
+    uint8_t        init_filt_policy;
+    ///Peer address type - public=0 / random=1 / rpa_or_pub=2 / rpa_or_rnd=3
+    uint8_t        peer_addr_type;
+    ///Peer BD address
+    struct bd_addr peer_addr;
+    ///Own address type - public=0 / random=1 / rpa_or_pub=2 / rpa_or_rnd=3
+    uint8_t        own_addr_type;
+    ///Minimum of connection interval (N * 1.25 ms)
+    uint16_t       con_intv_min;
+    ///Maximum of connection interval (N * 1.25 ms)
+    uint16_t       con_intv_max;
+    ///Connection latency
+    uint16_t       con_latency;
+    ///Link supervision timeout
+    uint16_t       superv_to;
+    ///Minimum CE length (N * 0.625 ms)
+    uint16_t       ce_len_min;
+    ///Maximum CE length (N * 0.625 ms)
+    uint16_t       ce_len_max;
+};
+
+///HCI LE Add Device to White List Command parameters structure
+/*@TRACE*/
+struct hci_le_add_dev_to_wlst_cmd
+{
+    ///Type of address of the device to be added to the White List - 0=public/1=random
+    uint8_t        dev_addr_type;
+    ///Address of device to be added to White List
+    struct bd_addr dev_addr;
+};
+
+///HCI LE Remove Device from White List Command parameters structure
+/*@TRACE*/
+struct hci_le_rmv_dev_from_wlst_cmd
+{
+    ///Type of address of the device to be removed from the White List - 0=public/1=random
+    uint8_t        dev_addr_type;
+    ///Address of device to be removed from White List
+    struct bd_addr dev_addr;
+};
+
+///HCI LE Set Extended Scan Parameters Command parameters structure
+/*@TRACE*/
+struct hci_le_set_ext_scan_param_cmd
+{
+    ///Own address type public/random/rpa
+    uint8_t         own_addr_type;
+    ///Scanning filter policy
+    uint8_t         scan_filt_policy;
+    ///Indicates the PHY(s) on which the advertising packets should be received
+    uint8_t         scan_phys;
+    ///Parameters for PHY(s)
+    struct scan_phy_param
+    {
+        ///Scaning Type: passive/active
+        uint8_t         scan_type;
+        ///Scan interval (slots)
+        uint16_t        scan_intv;
+        ///Scan window size (slots)
+        uint16_t        scan_window;
+    } phy[MAX_SCAN_PHYS];
+};
+
+///HCI LE Set Extended Scan Enable Command parameters structure
+/*@TRACE*/
+struct hci_le_set_ext_scan_en_cmd
+{
+    ///Scan enable - 0=disabled, 1=enabled
+    uint8_t             scan_en;
+    ///Filter duplicates - 0=disabled, 1=enabled, 2=enabled & reset each scan period
+    uint8_t             filter_duplic_en;
+    ///Scan duration (Time=N*10ms)
+    uint16_t            duration;
+    ///Scan period (Time=N*1.28sec)
+    uint16_t            period;
+};
+
+/*@TRACE*/
+struct init_phy_param
+{
+    ///Scan interval (N * 0.625 ms)
+    uint16_t        scan_interval;
+    ///Scan window size (N * 0.625 ms)
+    uint16_t        scan_window;
+    ///Minimum of connection interval (N * 1.25 ms)
+    uint16_t       con_intv_min;
+    ///Maximum of connection interval (N * 1.25 ms)
+    uint16_t       con_intv_max;
+    ///Connection latency
+    uint16_t       con_latency;
+    ///Link supervision timeout
+    uint16_t       superv_to;
+    ///Minimum CE length (N * 0.625 ms)
+    uint16_t       ce_len_min;
+    ///Maximum CE length (N * 0.625 ms)
+    uint16_t       ce_len_max;
+};
+
+///HCI LE Extended Create Connection Command parameters structure
+/*@TRACE*/
+struct hci_le_ext_create_con_cmd
+{
+    ///Initiator filter policy
+    uint8_t         init_filter_policy;
+    ///Own address type public/random/rpa
+    uint8_t         own_addr_type;
+    ///Peer address type public/random/rpa
+    uint8_t         peer_addr_type;
+    ///Peer address
+    struct bd_addr  peer_addr;
+    ///Indicates the PHY(s) on which the advertising packets should be received
+    uint8_t         init_phys;
+    ///Parameters for PHY(s)
+    struct init_phy_param phy[MAX_INIT_PHYS];
+};
+
+///HCI LE Periodic Advertising Create Sync Command parameters structure
+/*@TRACE*/
+struct hci_le_per_adv_create_sync_cmd
+{
+    ///Filter policy
+    uint8_t         filter_policy;
+    ///Advertising SID
+    uint8_t         adv_sid;
+    ///Advertising address type
+    uint8_t         adv_addr_type;
+    ///Advertiser address
+    struct bd_addr  adv_addr;
+    ///max Skip after receive
+    uint16_t        skip;
+    ///Sync timeout (Time=N*10ms)
+    uint16_t        sync_to;
+    ///Unused (supplemental type)
+    uint8_t         unused;
+};
+
+///HCI LE Periodic Advertising Terminate Sync Command parameters structure
+/*@TRACE*/
+struct hci_le_per_adv_term_sync_cmd
+{
+    ///Sync handle
+    uint16_t        sync_handle;
+};
+
+///HCI LE Add Device to Periodic Advertiser List Command parameters structure
+/*@TRACE*/
+struct hci_le_add_dev_to_per_adv_list_cmd
+{
+     ///Advertiser address type
+    uint8_t         adv_addr_type;
+    ///Advertiser address
+    struct bd_addr  adv_addr;
+    ///Advertising SID
+    uint8_t         adv_sid;
+};
+
+///HCI LE Remove Device from Periodic Advertiser List Command parameters structure
+/*@TRACE*/
+struct hci_le_rmv_dev_from_per_adv_list_cmd
+{
+     ///Advertiser address type
+    uint8_t         adv_addr_type;
+    ///Advertiser address
+    struct bd_addr  adv_addr;
+    ///Advertising SID
+    uint8_t         adv_sid;
+};
+
+///HCI LE Set Privacy Mode Command parameters structure
+/*@TRACE*/
+struct hci_le_set_priv_mode_cmd
+{
+    ///Peer identity address type
+    uint8_t         peer_addr_type;
+    ///Peer identity address
+    struct bd_addr  peer_addr;
+    ///Privacy mode
+    uint8_t         priv_mode;
+};
+
+///HCI LE Set Host Channel Classification Command parameters structure
+/*@TRACE*/
+struct hci_le_set_host_ch_class_cmd
+{
+    ///Channel map
+    struct le_chnl_map chmap;
+};
+
+
+///HCI LE Receiver Test Command parameters structure
+/*@TRACE*/
+struct hci_le_rx_test_cmd
+{
+    ///RX frequency for Rx test
+    uint8_t        rx_freq;
+};
+
+///HCI LE Transmitter Test Command parameters structure
+/*@TRACE*/
+struct hci_le_tx_test_cmd
+{
+    ///TX frequency for Tx test
+    uint8_t        tx_freq;
+    ///TX test data length
+    uint8_t        test_data_len;
+    ///TX test payload type - see enum
+    uint8_t        pk_payload_type;
+};
+
+///HCI LE Encrypt Command parameters structure
+/*@TRACE*/
+struct hci_le_enc_cmd
+{
+    ///Long term key structure
+    struct ltk     key;
+    ///Pointer to buffer with plain data to encrypt - 16 bytes
+    uint8_t        plain_data[16];
+};
+
+/// HCI LE Connection Update Command parameters structure
+/*@TRACE*/
+struct hci_le_con_update_cmd
+{
+    ///Connection Handle
+    uint16_t       conhdl;
+    ///Minimum of connection interval (units of 1.25 ms)
+    uint16_t       con_intv_min;
+    ///Maximum of connection interval (units of 1.25 ms)
+    uint16_t       con_intv_max;
+    ///Connection latency (units of connection event)
+    uint16_t       con_latency;
+    ///Link supervision timeout (units of 10 ms)
+    uint16_t       superv_to;
+    ///Minimum of CE length (units of 0.625 ms)
+    uint16_t       ce_len_min;
+    ///Maximum of CE length (units of 0.625 ms)
+    uint16_t       ce_len_max;
+};
+
+/// HCI LE Start Encryption Command parameters structure
+/*@TRACE*/
+struct hci_le_start_enc_cmd
+{
+    ///Connection handle
+    uint16_t        conhdl;
+    ///Random number - 8B
+    struct rand_nb  nb;
+    ///Encryption Diversifier
+    uint16_t       enc_div;
+    ///Long term key
+    struct ltk     ltk;
+};
+
+/// HCI long term key request reply command parameters structure
+/*@TRACE*/
+struct hci_le_ltk_req_reply_cmd
+{
+    ///Connection handle
+    uint16_t        conhdl;
+    ///Long term key
+    struct ltk      ltk;
+};
+
+/// HCI long term key request negative reply command parameters structure
+/*@TRACE*/
+struct hci_le_ltk_req_neg_reply_cmd
+{
+    ///Connection handle
+    uint16_t        conhdl;
+};
+
+/// HCI LE remote connection parameter request reply command parameters structure
+/*@TRACE*/
+struct hci_le_rem_con_param_req_reply_cmd
+{
+    ///Connection handle
+    uint16_t        conhdl;
+    ///Interval_Min
+    uint16_t        interval_min;
+    ///Interval_Max
+    uint16_t        interval_max;
+    ///Latency
+    uint16_t        latency;
+    ///Timeout
+    uint16_t        timeout;
+    ///Minimum_CE_Length (N * 0.625 ms)
+    uint16_t        min_ce_len;
+    ///Maximum_CE_Length (N * 0.625 ms)
+    uint16_t        max_ce_len;
+};
+
+/// HCI LE remote connection parameter request negative reply command parameters structure
+/*@TRACE*/
+struct hci_le_rem_con_param_req_neg_reply_cmd
+{
+    ///Connection handle
+    uint16_t        conhdl;
+    ///Reason
+    uint8_t         reason;
+};
+
+
+/// HCI LE Set Data Length  Command parameters structure
+/*@TRACE*/
+struct hci_le_set_data_len_cmd
+{
+    ///Connection Handle
+    uint16_t       conhdl;
+    ///Preferred maximum number of payload octets that the local Controller should include
+    ///in a single Link Layer Data Channel PDU.
+    uint16_t       tx_octets;
+    ///Preferred maximum number of microseconds that the local Controller should use to transmit
+    ///a single Link Layer Data Channel PDU
+    uint16_t       tx_time;
+};
+
+/// HCI LE Read Suggested Default Data Length Command
+/*@TRACE*/
+struct hci_le_wr_suggted_dft_data_len_cmd
+{
+    ///Suggested value for the Controller's maximum transmitted number of payload octets to be used
+    uint16_t       suggted_max_tx_octets;
+    ///Suggested value for the Controller's maximum packet transmission time to be used
+    uint16_t       suggted_max_tx_time;
+};
+
+/// HCI LE Add Device to Resolving List Command
+/*@TRACE*/
+struct hci_le_add_dev_to_rslv_list_cmd
+{
+    /// Peer Identity Address Type
+    uint8_t             peer_id_addr_type;
+    /// Peer Identity Address
+    struct bd_addr      peer_id_addr;
+    /// Peer IRK
+    struct irk          peer_irk;
+    /// Local IRK
+    struct irk          local_irk;
+};
+
+/// HCI LE Remove Device From Resolving List Command
+/*@TRACE*/
+struct hci_le_rmv_dev_from_rslv_list_cmd
+{
+    /// Peer Identity Address Type
+    uint8_t             peer_id_addr_type;
+    /// Peer Identity Address
+    struct bd_addr      peer_id_addr;
+};
+
+/// HCI LE Read Peer Resolvable Address Command
+/*@TRACE*/
+struct hci_le_rd_peer_rslv_addr_cmd
+{
+    /// Peer Identity Address Type
+    uint8_t             peer_id_addr_type;
+    /// Peer Identity Address
+    struct bd_addr      peer_id_addr;
+};
+
+/// HCI LE Read Local Resolvable Address Command
+/*@TRACE*/
+struct hci_le_rd_loc_rslv_addr_cmd
+{
+    /// Peer Identity Address Type
+    uint8_t             peer_id_addr_type;
+    /// Peer Identity Address
+    struct bd_addr      peer_id_addr;
+};
+
+/// HCI LE Set Address Resolution Enable Command
+/*@TRACE*/
+struct hci_le_set_addr_resol_en_cmd
+{
+    /// Address Resolution Enable
+    uint8_t             enable;
+};
+
+/// HCI LE Set Resolvable Private Address Timeout Command
+/*@TRACE*/
+struct hci_le_set_rslv_priv_addr_to_cmd
+{
+    /// RPA Timeout
+    uint16_t            rpa_timeout;
+};
+
+/*
+ * HCI EVENTS PARAMETERS
+ ****************************************************************************************
+ */
+
+/// HCI inquiry complete event structure
+/*@TRACE*/
+struct hci_inq_cmp_evt
+{
+    ///Status of the procedure
+    uint8_t status;
+};
+
+
+/// HCI Inquiry result event structure (with only 1 result)
+/*@TRACE*/
+struct hci_inq_res_evt
+{
+
+    ///Number of response
+    uint8_t     nb_rsp;
+    ///BdAddr
+    struct bd_addr bd_addr;
+    ///Page Scan Repetition Mode
+    uint8_t     page_scan_rep_mode;
+    ///Reserved
+    uint8_t     reserved1;
+    ///Reserved
+    uint8_t     reserved2;
+    ///class of device
+    struct devclass class_of_dev;
+    ///Clock Offset
+    uint16_t        clk_off;
+
+};
+
+/// HCI Inquiry result with rssi event structure (with only 1 result)
+/*@TRACE*/
+struct hci_inq_res_with_rssi_evt
+{
+    ///Number of response
+    uint8_t     nb_rsp;
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Page Scan Repetition Mode
+    uint8_t     page_scan_rep_mode;
+    ///Reserved
+    uint8_t     reserved1;
+    ///class of device
+    struct devclass class_of_dev;
+    ///Clock Offset
+    uint16_t     clk_off;
+    ///Rssi
+    uint8_t      rssi;
+
+};
+
+/// HCI Extended inquiry result indication structure (with only 1 result)
+/*@TRACE*/
+struct hci_ext_inq_res_evt
+{
+    ///Number of response
+    uint8_t     nb_rsp;
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Page Scan Repetition Mode
+    uint8_t     page_scan_rep_mode;
+    ///Reserved
+    uint8_t     reserved1;
+    ///class of device
+    struct devclass class_of_dev;
+    ///Clock Offset
+    uint16_t        clk_off;
+    ///RSSi
+    uint8_t         rssi;
+    ///Extended inquiry response data
+    struct eir      eir;
+};
+
+/// HCI disconnect complete event structure
+/*@TRACE*/
+struct hci_disc_cmp_evt
+{
+    ///Status of received command
+    uint8_t     status;
+    ///Connection Handle
+    uint16_t    conhdl;
+    ///Reason for disconnection
+    uint8_t     reason;
+};
+
+/// HCI basic command complete event structure
+/*@TRACE
+ * hci_dbg_wr_par_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_dbg_llcp_discard_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_reset_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_set_evt_mask_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_set_per_adv_en_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_create_con_cancel_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_set_evt_mask_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_set_host_ch_class_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_wr_suggted_dft_data_len_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_set_dft_phy_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_rmv_dev_from_wlst_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_set_adv_param_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_set_adv_data_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_set_scan_rsp_data_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_set_adv_en_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_set_scan_param_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_set_scan_en_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_set_rand_addr_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_set_addr_resol_en_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_set_rslv_priv_addr_to_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_rmv_dev_from_rslv_list_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_create_con_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_dbg_plf_reset_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ * hci_le_wr_rf_path_comp_cmd_cmp_evt = hci_basic_cmd_cmp_evt
+ */
+struct hci_basic_cmd_cmp_evt
+{
+    ///Status of the command reception
+    uint8_t status;
+};
+
+/// HCI basic command complete event structure with connection handle
+/*@TRACE*/
+struct hci_basic_conhdl_cmd_cmp_evt
+{
+    /// status
+    uint8_t     status;
+    /// connection handle
+    uint16_t    conhdl;
+};
+
+/// HCI basic command complete event structure with BD address
+struct hci_basic_bd_addr_cmd_cmp_evt
+{
+    ///status
+   uint8_t         status;
+   ///BdAddr
+    struct bd_addr bd_addr;
+};
+
+/// HCI basic event structure with status and BD address
+struct hci_basic_stat_bd_addr_evt
+{
+    ///status
+   uint8_t         status;
+   ///BdAddr
+    struct bd_addr bd_addr;
+};
+
+/// HCI basic event including a connection handle as parameter
+struct hci_basic_conhdl_evt
+{
+    ///Connection handle
+    uint16_t     conhdl;
+};
+
+/// HCI complete event with status only.
+/*@TRACE*/
+struct hci_cmd_stat_event
+{
+    /// Status of the command reception
+    uint8_t status;
+};
+
+/// HCI number of packet complete event structure
+/*@TRACE*/
+struct hci_nb_cmp_pkts_evt
+{
+    /// number of handles
+    uint8_t     nb_of_hdl;
+    /// connection handle
+    uint16_t    conhdl[1];
+    /// number of completed packets
+    uint16_t    nb_comp_pkt[1];
+};
+
+/// HCI data buffer overflow event structure
+/*@TRACE*/
+struct hci_data_buf_ovflw_evt
+{
+    ///Link type
+    uint8_t link_type;
+};
+
+/// HCI Hardware Error Event parameters structure
+/*@TRACE*/
+struct hci_hw_err_evt
+{
+    /// HW error code
+    uint8_t hw_code;
+};
+
+/// HCI encryption change event structure
+struct hci_enc_change_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///Encryption enabled information
+    uint8_t     enc_stat;
+};
+
+/// HCI encryption key refresh complete event structure
+/*@TRACE
+ * hci_enc_key_refresh_evt = hci_enc_key_ref_cmp_evt */
+struct hci_enc_key_ref_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+};
+
+/// HCI Authenticated Payload Timeout Expired Event structure
+/*@TRACE*/
+struct hci_auth_payl_to_exp_evt
+{
+    ///Connection handle
+    uint16_t     conhdl;
+};
+
+/// HCI command complete event structure for create connection
+/*@TRACE*/
+struct hci_con_cmp_evt
+{
+    /// Status
+    uint8_t             status;
+    ///Connection handle
+    uint16_t            conhdl;
+    ///Bluetooth Device address
+    struct bd_addr      bd_addr;
+    ///Link type
+    uint8_t             link_type;
+    ///Encryption state
+    uint8_t             enc_en;
+};
+
+/// HCI command complete event structure for qos setup
+/*@TRACE*/
+struct hci_qos_setup_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///Flags
+    uint8_t flags;
+    ///Service type
+    uint8_t serv_type;
+    ///Token rate
+    uint32_t tok_rate;
+    ///Peak bandwidth
+    uint32_t pk_bw;
+    ///Latency
+    uint32_t lat;
+    ///Delay variation
+    uint32_t del_var;
+};
+
+/// HCI flow specification complete event parameters structure
+/*@TRACE*/
+struct hci_flow_spec_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///Flags
+    uint8_t flags;
+    ///Flow direction
+    uint8_t flow_dir;
+    ///Service type
+    uint8_t serv_type;
+    ///Token rate
+    uint32_t tk_rate;
+    ///Token buffer size
+    uint32_t tk_buf_sz;
+    ///Peak bandwidth
+    uint32_t pk_bw;
+    ///Access latency
+    uint32_t acc_lat;
+};
+
+/// HCI role change event parameters structure
+/*@TRACE*/
+struct hci_role_chg_evt
+{
+    ///Status
+    uint8_t status;
+    ///BD address
+    struct bd_addr bd_addr;
+    ///New role
+    uint8_t new_role;
+};
+
+/// HCI complete event structure for the read clock offset command
+/*@TRACE*/
+struct hci_rd_clk_off_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///Clock offset
+    uint16_t clk_off_val;
+};
+
+/// HCI event structure for the flush occurred event
+/*@TRACE*/
+struct hci_flush_occurred_evt
+{
+    ///Connection handle
+    uint16_t conhdl;
+};
+
+/// HCI max slot change event structure
+/*@TRACE*/
+struct hci_max_slot_chg_evt
+{
+    ///Connection handle
+    uint16_t conhdl;
+    ///Max slot
+    uint8_t max_slot;
+};
+
+/// HCI sniff subrating event parameters structure
+/*@TRACE*/
+struct hci_sniff_sub_evt
+{
+    ///Status.
+    uint8_t     status;
+    ///Connection handle
+    uint16_t    conhdl;
+    ///Maximum transmit latency
+    uint16_t    max_lat_tx;
+    ///Maximum receive latency
+    uint16_t    max_lat_rx;
+    ///Minimum remote TO
+    uint16_t    min_rem_to;
+    ///Minimum local TO
+    uint16_t    min_loc_to;
+};
+
+/// HCI read remote extended features complete event parameters structure
+/*@TRACE*/
+struct hci_rd_rem_ext_feats_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///page number
+    uint8_t pg_nb;
+    ///page number max
+    uint8_t pg_nb_max;
+    ///ext LMP features
+    struct features ext_feats;
+};
+
+/// HCI read remote extended features complete event parameters structure
+/*@TRACE*/
+struct hci_rem_host_supp_feats_notif_evt
+{
+    ///BD address
+    struct bd_addr bd_addr;
+    ///ext lmp features
+    struct features ext_feats;
+};
+
+/// HCI command complete event structure for the read remote supported features command
+/*@TRACE*/
+struct hci_rd_rem_supp_feats_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///Remote features
+    struct features rem_feats;
+};
+
+/// HCI command complete event structure for the read remote information version command
+/*@TRACE*/
+struct hci_rd_rem_ver_info_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///LMP version
+    uint8_t     vers;
+    ///Manufacturer name
+    uint16_t    compid;
+    ///LMP subversion
+    uint16_t    subvers;
+};
+
+/// HCI encryption change event structure
+/*@TRACE*/
+struct hci_enc_chg_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///Encryption enabled information
+    uint8_t     enc_stat;
+};
+
+/// HCI mode change event structure
+/*@TRACE*/
+struct hci_mode_chg_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t    conhdl;
+    ///Current mode
+    uint8_t    cur_mode;
+    /// Interval
+    uint16_t    interv;
+};
+
+/// HCI simple pairing complete event structure
+/*@TRACE*/
+struct hci_sp_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Bluetooth Device address
+    struct bd_addr      bd_addr;
+};
+
+/// HCI Authentication complete event structure
+/*@TRACE*/
+struct hci_auth_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t    conhdl;
+};
+
+/// HCI change connection link key complete event structure
+/*@TRACE*/
+struct hci_chg_con_lk_cmp_evt
+{
+    ///Status
+    uint8_t status;
+    ///Connection handle
+    uint16_t    conhdl;
+};
+
+/// HCI encryption key refresh complete event structure
+/*@TRACE*/
+struct hci_enc_key_refresh_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t    conhdl;
+};
+
+/// HCI master link key complete event structure
+/*@TRACE*/
+struct hci_master_lk_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t    conhdl;
+    ///Key flag
+    uint8_t key_flag;
+};
+/// HCI synchronous link connection complete event structure
+/*@TRACE*/
+struct hci_sync_con_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t    conhdl;
+    ///BD address
+    struct bd_addr bd_addr;
+    ///Link type
+    uint8_t lk_type;
+    ///Transmit interval
+    uint8_t tx_int;
+    ///Retransmission window
+    uint8_t ret_win;
+    ///rx packet length
+    uint16_t rx_pkt_len;
+    ///tx packet length
+    uint16_t tx_pkt_len;
+    ///Air mode
+    uint8_t air_mode;
+
+};
+
+/// HCI synchronous connection change event structure
+/*@TRACE*/
+struct hci_sync_con_chg_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Synchronous Connection handle
+    uint16_t    sync_conhdl;
+    ///Transmit interval
+    uint8_t tx_int;
+    ///Retransmission window
+    uint8_t ret_win;
+    ///rx packet length
+    uint16_t rx_pkt_len;
+    ///tx packet length
+    uint16_t tx_pkt_len;
+};
+
+/// HCI connection packet type change event structure
+/*@TRACE*/
+struct hci_con_pkt_type_chg_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Synchronous Connection handle
+    uint16_t    sync_conhdl;
+    ///Synchronous packet type
+    uint16_t    pkt_type;
+};
+
+/// HCI link supervision timeout change event structure
+/*@TRACE*/
+struct hci_link_supv_to_chg_evt
+{
+    ///Connection handle
+    uint16_t    conhdl;
+    ///Link supervision timeout
+    uint16_t    lsto_val;
+};
+
+/// HCI link key request event structure
+/*@TRACE*/
+struct hci_lk_req_evt
+{
+    ///BD address
+    struct bd_addr bd_addr;
+};
+
+/// HCI encryption key refresh event structure
+/*@TRACE*/
+struct hci_enc_key_refresh_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t    conhdl;
+};
+
+/// HCI connection request event structure
+/*@TRACE*/
+struct hci_con_req_evt
+{
+    ///BD address
+    struct bd_addr bd_addr;
+    ///Class of device
+    struct devclass classofdev;
+    ///link type
+    uint8_t lk_type;
+};
+
+/// HCI quality of service violation event structure
+/*@TRACE*/
+struct hci_qos_viol_evt
+{
+    ///Connection handle
+    uint16_t conhdl;
+};
+
+/// HCI io capability response event structure
+/*@TRACE*/
+struct hci_io_cap_rsp_evt
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///IO capability
+    uint8_t io_capa;
+    ///OOB data present
+    uint8_t oob_data_pres;
+    ///Authentication requirements
+    uint8_t auth_req;
+
+};
+
+/// HCI IO capability response event structure
+/*@TRACE*/
+struct hci_io_cap_req_evt
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+};
+
+/// HCI Return link keys event structure
+/*@TRACE*/
+struct hci_return_link_keys_evt
+{
+    ///Number of Keys
+    uint8_t num_keys;
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Key
+    struct ltk      key;
+};
+
+/// HCI pin code request event structure
+/*@TRACE*/
+struct hci_pin_code_req_evt
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+};
+
+/// HCI user passkey request event structure
+/*@TRACE*/
+struct hci_user_passkey_req_evt
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+};
+
+/// HCI user passkey notification event structure
+/*@TRACE*/
+struct hci_user_passkey_notif_evt
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Passkey
+    uint32_t passkey;
+};
+
+/// HCI remote OOB data request event structure
+/*@TRACE*/
+struct hci_rem_oob_data_req_evt
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+};
+
+/// HCI user confirmation request event structure
+/*@TRACE*/
+struct hci_user_cfm_req_evt
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Passkey
+    uint32_t passkey;
+};
+
+/// HCI keypress notification event structure
+/*@TRACE*/
+struct hci_keypress_notif_evt
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///type
+    uint8_t type;
+};
+
+/// HCI link key notification event structure
+/*@TRACE*/
+struct hci_lk_notif_evt
+{
+    ///BdAddr
+    struct bd_addr  bd_addr;
+    ///Key
+    struct ltk  key;
+    ///type
+    uint8_t key_type;
+};
+
+/// HCI SAM status change event strucutre
+struct hci_sam_status_change_evt
+{
+    ///Connection handle
+    uint16_t    conhdl;
+    ///Local SAM index
+    uint8_t     loc_idx;
+    ///Local SAM TX availability
+    uint8_t     loc_tx_av;
+    ///Local SAM RX availability
+    uint8_t     loc_rx_av;
+    ///Remote SAM index
+    uint8_t     rem_idx;
+    ///Remote SAM TX availability
+    uint8_t     rem_tx_av;
+    ///Remote SAM RX availability
+    uint8_t     rem_rx_av;
+};
+
+
+/*
+ * HCI LE META EVENTS PARAMETERS
+ ****************************************************************************************
+ */
+
+
+// LE event structures
+
+/// HCI command complete event structure for the Read Local Supported Features
+/*@TRACE*/
+struct hci_le_rd_local_supp_feats_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t             status;
+    ///Local LE supported features
+    struct le_features  feats;
+};
+
+/// HCI command complete event structure for the Read Advertising Channel Tx Power Command
+/*@TRACE
+ * hci_le_rd_adv_chnl_tx_pw_cmd_cmp_evt = hci_rd_adv_chnl_tx_pw_cmd_cmp_evt*/
+struct hci_rd_adv_chnl_tx_pw_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    ///Advertising channel Tx power level
+    int8_t     adv_tx_pw_lvl;
+};
+
+///HCI command complete event structure for the Read White List Size Command
+/*@TRACE*/
+struct hci_le_rd_wlst_size_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    ///White List size
+    uint8_t     wlst_size;
+};
+
+///HCI command complete event structure for the Read Buffer Size Command
+/*@TRACE*/
+struct hci_le_rd_buff_size_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    ///ACL data packet length that can be sent from host to controller
+    uint16_t    hc_data_pk_len;
+    ///Total number of ACL data packets that can be sent from host to controller.
+    uint8_t     hc_tot_nb_data_pkts;
+};
+
+///HCI command complete event structure for LE Rand Command
+/*@TRACE*/
+struct hci_le_rand_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t             status;
+    ///Random number
+    struct rand_nb      nb;
+};
+
+///HCI command complete event structure for Read Supported States Command
+/*@TRACE*/
+struct hci_le_rd_supp_states_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t             status;
+    ///LE supported states response
+    struct le_states    states;
+};
+
+///HCI command complete event structure for Test End
+/*@TRACE
+ *  * hci_le_test_end_cmd_cmp_evt = hci_test_end_cmd_cmp_evt*/
+struct hci_test_end_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t             status;
+    ///Number of RX packets - null if TX test was the ended one
+    uint16_t            nb_packet_received;
+};
+
+///HCI LE Encrypt complete event structure
+/*@TRACE*/
+struct hci_le_enc_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t status;
+    ///Encrypted data to return to command source.
+    uint8_t encrypted_data[ENC_DATA_LEN];
+};
+
+#if BLE_EMB_PRESENT || BLE_HOST_PRESENT
+///HCI LE advertising report event structure
+/*@TRACE*/
+struct hci_le_adv_report_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+    ///Number of advertising reports in this event
+    uint8_t             nb_reports;
+    ///Advertising reports structures array
+    struct adv_report   adv_rep[BLE_ADV_REPORTS_MAX];
+};
+
+///HCI LE extended advertising report event structure
+/*@TRACE*/
+struct hci_le_ext_adv_report_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+    ///Number of advertising reports in this event
+    uint8_t             nb_reports;
+    ///Parameters for each report
+    struct ext_adv_report adv_rep[BLE_ADV_REPORTS_MAX];
+};
+
+///HCI LE periodic advertising sync established event structure
+/*@TRACE
+ * hci_le_periodic_adv_sync_est_evt = hci_le_per_adv_sync_est_evt*/
+struct hci_le_per_adv_sync_est_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+    /// Status of the advertising sync
+    uint8_t             status;
+    /// Sync Handle to be used
+    uint16_t            sync_handle;
+    /// Advertising SID
+    uint8_t             adv_sid;
+    ///Advertising address type: public/random
+    uint8_t             adv_addr_type;
+    ///Advertising address value
+    struct bd_addr      adv_addr;
+    /// Advertiser PHY
+    uint8_t             phy;
+    /// Advertising interval (Time=N*1.25ms)
+    uint16_t            interval;
+    /// Advertiser clock accuracy
+    uint8_t             adv_ca;
+};
+
+///HCI LE periodic advertising report event structure
+/*@TRACE
+ * hci_le_periodic_adv_report_evt = hci_le_per_adv_report_evt*/
+struct hci_le_per_adv_report_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+    /// Sync Handle to be used
+    uint16_t            sync_handle;
+    /// Tx Power
+    uint8_t             tx_power;
+    /// RSSI
+    uint8_t             rssi;
+    ///Unused
+    uint8_t             unused;
+    /// Data Status
+    uint8_t             status;
+    ///Data length in advertising packet
+    uint8_t             data_len;
+    ///Data of advertising packet
+    uint8_t             data[PER_ADV_DATA_MAX_LEN];
+};
+
+///HCI LE periodic advertising sync lost event structure
+/*@TRACE
+ * hci_le_periodic_adv_sync_lost_evt = hci_le_per_adv_sync_lost_evt*/
+struct hci_le_per_adv_sync_lost_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+    /// Sync Handle to be used
+    uint16_t            sync_handle;
+};
+
+///HCI LE scan timeout event structure
+/*@TRACE*/
+struct hci_le_scan_timeout_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+};
+
+#endif //BLE_EMB_PRESENT || BLE_HOST_PRESENT
+
+/// HCI command complete event structure for Read Channel Map Command
+/*@TRACE*/
+struct hci_le_rd_chnl_map_cmd_cmp_evt
+{
+    ///Status of command reception
+    uint8_t            status;
+    ///Connection handle
+    uint16_t           conhdl;
+    ///Channel map
+    struct le_chnl_map ch_map;
+};
+
+/// HCI command complete event structure for Long Term Key Request Reply Command
+/*@TRACE*/
+struct hci_le_ltk_req_reply_cmd_cmp_evt
+{
+    ///Status of command reception
+    uint8_t        status;
+    ///Connection handle
+    uint16_t       conhdl;
+};
+
+/// HCI command complete event structure for Long Term Key Request Negative Reply Command
+/*@TRACE*/
+struct hci_le_ltk_req_neg_reply_cmd_cmp_evt
+{
+    ///Status of command reception
+    uint8_t        status;
+    ///Connection handle
+    uint16_t       conhdl;
+};
+
+/// HCI command complete event structure for LE Read Suggested Default Data Length Command
+/*@TRACE*/
+struct hci_le_rd_suggted_dft_data_len_cmd_cmp_evt
+{
+    ///Status of command reception
+    uint8_t        status;
+    ///Host's suggested value for the Controller's maximum transmitted number of payload octets
+    uint16_t       suggted_max_tx_octets;
+    ///Host's suggested value for the Controller's maximum packet transmission time
+    uint16_t       suggted_max_tx_time;
+};
+/// HCI command complete event structure for LE Read Maximum Data Length Command
+/*@TRACE*/
+struct hci_le_rd_max_data_len_cmd_cmp_evt
+{
+    ///Status of command reception
+    uint8_t        status;
+    ///Maximum number of payload octets that the local Controller supports for transmission
+    uint16_t       suppted_max_tx_octets;
+    ///Maximum time, in microseconds, that the local Controller supports for transmission
+    uint16_t       suppted_max_tx_time;
+    ///Maximum number of payload octets that the local Controller supports for reception
+    uint16_t       suppted_max_rx_octets;
+    ///Maximum time, in microseconds, that the local Controller supports for reception
+    uint16_t       suppted_max_rx_time;
+};
+
+/// HCI LE Read Peer Resolvable Address Command Complete Event
+/*@TRACE*/
+struct hci_le_rd_peer_rslv_addr_cmd_cmp_evt
+{
+    ///Status
+    uint8_t status;
+    /// Peer Resolvable Address
+    struct bd_addr      peer_rslv_addr;
+};
+
+/// HCI LE Read Local Resolvable Address Command Complete Event
+/*@TRACE*/
+struct hci_le_rd_loc_rslv_addr_cmd_cmp_evt
+{
+    ///Status
+    uint8_t status;
+    /// Local Resolvable Address
+    struct bd_addr      loc_rslv_addr;
+};
+
+/// HCI LE Read Resolving List Size Command Complete Event
+/*@TRACE*/
+struct hci_le_rd_rslv_list_size_cmd_cmp_evt
+{
+    ///Status
+    uint8_t status;
+    /// Resolving List Size
+    uint8_t             size;
+};
+
+
+/// HCI write authenticated payload timeout command
+/*@TRACE*/
+struct hci_wr_auth_payl_to_cmd
+{
+    ///Connection handle
+    uint16_t     conhdl;
+    ///Authenticated payload timeout (N*10ms)
+    uint16_t     auth_payl_to;
+};
+
+/// HCI command complete event structure for the Write Authenticated Payload Timeout Command
+/*@TRACE*/
+struct hci_wr_auth_payl_to_cmd_cmp_evt
+{
+    /// Status of the command reception
+    uint8_t     status;
+    ///Connection handle
+    uint16_t     conhdl;
+};
+
+/// HCI command complete event structure for HCI LE Connection Update Command
+/*@TRACE*/
+struct hci_le_con_update_cmp_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+    ///Status of received command
+    uint8_t             status;
+    ///Connection handle
+    uint16_t            conhdl;
+    ///Connection interval value
+    uint16_t            con_interval;
+    ///Connection latency value
+    uint16_t            con_latency;
+    ///Supervision timeout
+    uint16_t            sup_to;
+};
+
+/// HCI command complete event structure for create connection
+/*@TRACE*/
+struct hci_le_con_cmp_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+    ///Status of received command
+    uint8_t             status;
+    ///Connection handle
+    uint16_t            conhdl;
+    ///Device role - 0=Master/ 1=Slave
+    uint8_t             role;
+    ///Peer address type - 0=public/1=random
+    uint8_t             peer_addr_type;
+    ///Peer address
+    struct bd_addr      peer_addr;
+    ///Connection interval
+    uint16_t            con_interval;
+    ///Connection latency
+    uint16_t            con_latency;
+    ///Link supervision timeout
+    uint16_t            sup_to;
+    ///Master clock accuracy
+    uint8_t             clk_accuracy;
+};
+
+/// HCI LE read remote used feature command parameters structure
+/*@TRACE*/
+struct hci_le_rd_rem_feats_cmd
+{
+    ///Connection handle
+    uint16_t            conhdl;
+};
+
+/// HCI command complete event structure for HCI LE read remote feature Command
+/*@TRACE*/
+struct hci_le_rd_rem_feats_cmd_cmp_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+    ///Status of received command
+    uint8_t             status;
+    ///Connection handle
+    uint16_t            conhdl;
+    ///Le Features
+    struct le_features  le_feats;
+};
+
+/// HCI command structure for the read transmit power level command
+/*@TRACE*/
+struct hci_rd_tx_pwr_lvl_cmd
+{
+    ///Connection handle
+    uint16_t    conhdl;
+    ///Power Level type: current or maximum
+    uint8_t     type;
+};
+
+/// HCI command complete event structure for the read transmit power level command
+/*@TRACE*/
+struct hci_rd_tx_pwr_lvl_cmd_cmp_evt
+{
+    ///Status for command reception
+    uint8_t status;
+    ///Connection handle
+    uint16_t conhdl;
+    ///Value of TX power level
+    uint8_t     tx_pow_lvl;
+};
+
+/// HCI read remote information version command parameters structure
+/*@TRACE*/
+struct hci_rd_rem_ver_info_cmd
+{
+    ///Connection handle
+    uint16_t    conhdl;
+};
+
+/// HCI LE remote connection parameter request event
+/*@TRACE*/
+struct hci_le_rem_con_param_req_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+    ///Connection handle
+    uint16_t            conhdl;
+    ///Interval_Min
+    uint16_t            interval_min;
+    ///Interval_Max
+    uint16_t            interval_max;
+    ///Latency
+    uint16_t            latency;
+    ///Timeout
+    uint16_t            timeout;
+};
+
+
+/// HCI command complete event structure for enhance create connection
+/*@TRACE*/
+struct hci_le_enh_con_cmp_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+    ///Status of received command
+    uint8_t             status;
+    ///Connection handle
+    uint16_t            conhdl;
+    ///Device role - 0=Master/ 1=Slave
+    uint8_t             role;
+    ///Peer address type - 0=public/1=random
+    uint8_t             peer_addr_type;
+    ///Peer address
+    struct bd_addr      peer_addr;
+    ///Local Resolvable Private Address
+    struct bd_addr      loc_rslv_priv_addr;
+    ///Peer Resolvable Private Address
+    struct bd_addr      peer_rslv_priv_addr;
+    ///Connection interval
+    uint16_t            con_interval;
+    ///Connection latency
+    uint16_t            con_latency;
+    ///Link supervision timeout
+    uint16_t            sup_to;
+    ///Master clock accuracy
+    uint8_t             clk_accuracy;
+};
+
+struct hci_generate_dhkey_cmp_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+    ///Status of received command
+    uint8_t             status;
+    /// The 32 byte Diffie Helman Key
+    uint8_t             dh_key[32];
+};
+
+struct hci_rd_local_p256_public_key_cmp_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+    ///Status of received command
+    uint8_t             status;
+    /// The 32 byte Diffie Helman Key
+    uint8_t             public_key[64];
+
+};
+
+#if BLE_EMB_PRESENT || BLE_HOST_PRESENT
+/// HCI LE Direct Advertising Report Event
+/*@TRACE*/
+struct hci_le_dir_adv_rep_evt
+{
+    ///LE Subevent code
+    uint8_t                 subcode;
+    ///Number of reports
+    uint8_t                 nb_reports;
+    ///Direct Advertising reports structures array
+    struct dir_adv_report   adv_rep[BLE_ADV_REPORTS_MAX];
+};
+#endif //BLE_EMB_PRESENT || BLE_HOST_PRESENT
+
+/// Connected LE event
+struct hci_le_con_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+    ///Connection handle
+    uint16_t            conhdl;
+};
+
+/// HCI command complete event structure for HCI LE read remote used feature Command
+/*@TRACE*/
+struct hci_le_ltk_request_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+    ///Connection handle
+    uint16_t            conhdl;
+    ///Random number
+    struct rand_nb      rand;
+    ///Encryption diversifier
+    uint16_t            ediv;
+};
+
+/// HCI LE META event LE Data Length Change Event
+/*@TRACE*/
+struct hci_le_data_len_chg_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+    ///Connection handle
+    uint16_t            conhdl;
+    ///The maximum number of payload octets in TX
+    uint16_t            max_tx_octets;
+    ///The maximum time that the local Controller will take to TX
+    uint16_t            max_tx_time;
+    ///The maximum number of payload octets in RX
+    uint16_t            max_rx_octets;
+    ///The maximum time that the local Controller will take to RX
+    uint16_t            max_rx_time;
+};
+
+
+/// HCI Synchronization Train Received Event
+/*@TRACE*/
+struct hci_sync_train_rec_evt
+{
+    /// Status
+    uint8_t            status;
+    /// BD_ADDR
+    struct bd_addr     bd_addr;
+    /// Clock_Offset (28 bits) - (CLKNslave - CLK) modulo 2^28
+    uint32_t           clock_offset;
+    /// AFH_Channel_Map
+    struct chnl_map    afh_ch_map;
+    /// LT_ADDR
+    uint8_t            lt_addr;
+    /// Next_Broadcast_Instant (28 bits)
+    uint32_t next_bcst_instant;
+    /// Connectionless_Slave_Broadcast_Interval (in slots)
+    uint16_t csb_int;
+    /// Service_Data
+    uint8_t service_data;
+};
+
+/// HCI Connectionless Slave Broadcast Receive Event
+/*@TRACE*/
+struct hci_con_slv_bcst_rec_evt
+{
+    /// BD_ADDR
+    struct bd_addr     bd_addr;
+    /// LT_ADDR
+    uint8_t            lt_addr;
+    /// CLK (28 bits)
+    uint32_t           clk;
+    /// Offset (28 bits) - (CLKNslave - CLK) modulo 2^28
+    uint32_t           offset;
+    /// Receive Status
+    uint8_t            receive_status;
+    /// Fragment
+    uint8_t fragment;
+    /// Data_Length (in bytes)
+    uint8_t data_length;
+    /// Data
+    uint8_t data[__ARRAY_EMPTY];
+};
+
+/// HCI Connectionless Slave Broadcast Timeout Event
+/*@TRACE*/
+struct hci_con_slv_bcst_to_evt
+{
+    /// BD_ADDR
+    struct bd_addr     bd_addr;
+    /// LT_ADDR
+    uint8_t            lt_addr;
+};
+
+/// HCI Connectionless Slave Broadcast Channel Map Change Event
+/*@TRACE*/
+struct hci_con_slv_bcst_ch_map_chg_evt
+{
+    /// Channel_Map
+    struct chnl_map    ch_map;
+};
+
+/*@TRACE
+ * hci_le_gen_dhkey_cmp_evt = hci_le_generate_dhkey_cmp_evt*/
+struct hci_le_generate_dhkey_cmp_evt
+{
+    ///LE Subevent code
+    uint8_t      subcode;
+    uint8_t      status;
+    uint8_t      dh_key[32];
+};
+
+/*@TRACE
+ * hci_le_rd_loc_p256_pub_key_cmp_evt = hci_le_generate_p256_public_key_cmp_evt*/
+struct hci_le_generate_p256_public_key_cmp_evt
+{
+    ///LE Subevent code
+    uint8_t       subcode;
+    uint8_t       status;
+    t_public_key  public_key;
+};
+
+/*
+ * HCI VENDOR SPECIFIC COMMANDS PARAMETERS
+ ****************************************************************************************
+ */
+
+/// Buffer structure
+/*@TRACE*/
+struct buffer_tag
+{
+    /// length of buffer
+    uint8_t length;
+    /// data of 128 bytes length
+    uint8_t data[128];
+};
+
+/// Common structure for Command Complete Event of HCI Debug Read Memory/Flash/Param complete event parameters - vendor specific
+/*@TRACE
+ * hci_dbg_rd_mem_cmd_cmp_evt = hci_dbg_basic_rd_data_cmd_cmp_evt
+ * hci_dbg_rd_flash_cmd_cmp_evt = hci_dbg_basic_rd_data_cmd_cmp_evt
+ * hci_dbg_rd_par_cmd_cmp_evt = hci_dbg_basic_rd_data_cmd_cmp_evt
+ */
+struct hci_dbg_basic_rd_data_cmd_cmp_evt
+{
+    ///Status
+    uint8_t status;
+    ///buffer structure to return
+    struct buffer_tag buf;
+};
+
+///HCI Debug read memory variable command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_rd_mem_cmd
+{
+    ///Start address to read
+    uint32_t start_addr;
+    ///Access size
+    uint8_t type;
+    ///Length to read
+    uint8_t length;
+};
+
+///HCI Debug write memory variable command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_wr_mem_cmd
+{
+    ///Start address to read
+    uint32_t start_addr;
+    ///Access size
+    uint8_t type;
+    ///buffer structure to return
+    struct buffer_tag buf;
+};
+
+///HCI Debug delete parameter command parameters - vendor specific
+/*@TRACE
+ * hci_dbg_del_par_cmd = hci_dbg_del_param_cmd*/
+struct hci_dbg_del_param_cmd
+{
+    ///Parameter tag
+    uint16_t param_tag;
+};
+
+///HCI Debug erase flash command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_er_flash_cmd
+{
+    ///Flash type
+    uint8_t flashtype;
+    ///Start offset address
+    uint32_t startoffset;
+    ///Size to erase
+    uint32_t size;
+};
+
+///HCI Debug write flash command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_wr_flash_cmd
+{
+    ///Flash type
+    uint8_t flashtype;
+    ///Start offset address
+    uint32_t startoffset;
+    ///buffer structure
+    struct buffer_tag buf;
+};
+
+///HCI Debug read flash command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_rd_flash_cmd
+{
+    ///Flash type
+    uint8_t flashtype;
+    ///Start offset address
+    uint32_t startoffset;
+    ///Size to read
+    uint8_t size;
+};
+
+///HCI Debug read parameter command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_rd_par_cmd
+{
+    ///Parameter tag
+    uint16_t param_tag;
+};
+
+///HCI Debug read parameters command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_wr_par_cmd
+{
+    ///Parameter tag
+    uint16_t param_tag;
+    ///Structure buffer
+    struct buffer_tag buf;
+};
+
+#if CRYPTO_UT
+///HCI Debug Test cryptographic functions command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_test_crypto_func_cmd
+{
+    /// Id of Function to be tested
+    uint8_t function;
+    /// Structure buffer
+    struct buffer_tag buf;
+};
+#endif //CRYPTO_UT
+
+#if RW_DEBUG
+///HCI Debug Test scheduling planner set function command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_test_sch_plan_set_cmd
+{
+    /// Activity identifier
+    uint32_t id;
+    /// Interval (in slots)
+    uint32_t interval;
+    /// Offset (in slots)
+    uint32_t offset;
+    /// Minimum duration (in slots)
+    uint32_t duration_min;
+    /// Maximum duration (in slots)
+    uint32_t duration_max;
+    /// Indicate activity is movable
+    bool mobility_level;
+};
+
+///HCI Debug Test scheduling planner set function command complete event parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_test_sch_plan_set_cmd_cmp_evt
+{
+    /// Status
+    uint8_t status;
+    /// Activity identifier
+    uint32_t moved_id;
+};
+
+///HCI Debug Test scheduling planner remove function command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_test_sch_plan_rem_cmd
+{
+    /// Activity identifier
+    uint32_t id;
+};
+
+///HCI Debug Test scheduling planner check function command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_test_sch_plan_chk_cmd
+{
+    /// Activity identifier
+    uint32_t id;
+    /// Interval (in slots)
+    uint32_t interval;
+    /// Offset (in slots)
+    uint32_t offset;
+    /// Minimum duration (in slots)
+    uint32_t duration_min;
+};
+
+///HCI Debug Test scheduling planner request function command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_test_sch_plan_req_cmd
+{
+    /// Activity identifier
+    uint32_t id;
+    /// Minimum interval (in slots)
+    uint32_t interval_min;
+    /// Maximum interval (in slots)
+    uint32_t interval_max;
+    /// Minimum duration (in slots)
+    uint32_t duration_min;
+    /// Maximum duration (in slots)
+    uint32_t duration_max;
+    /// Period (in slots)
+    uint8_t period;
+};
+
+///HCI Debug Test scheduling planner request function command complete event parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_test_sch_plan_req_cmd_cmp_evt
+{
+    /// Status
+    uint8_t status;
+    /// Interval (in slots)
+    uint32_t interval;
+    /// Minimum offset (in slots)
+    uint32_t offset_min;
+    /// Maximum offset (in slots)
+    uint32_t offset_max;
+};
+#endif //RW_DEBUG
+
+///HCI Debug Read Kernel Statistics complete event parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_rd_ke_stats_cmd_cmp_evt
+{
+    ///Status
+    uint8_t status;
+    ///Max message sent
+    uint8_t max_msg_sent;
+    ///Max message saved
+    uint8_t max_msg_saved;
+    ///Max timer used
+    uint8_t max_timer_used;
+    ///Max heap used
+    uint16_t max_heap_used;
+    ///Max stack used
+    uint16_t max_stack_used;
+};
+
+
+/// HCI Debug Read information about memory usage. - vendor specific
+/*@TRACE*/
+struct hci_dbg_rd_mem_info_cmd_cmp_evt
+{
+    ///Status
+    uint8_t status;
+    /// memory size currently used into each heaps.
+    uint16_t mem_used[KE_MEM_BLOCK_MAX];
+    /// peak of memory usage measured
+    uint32_t max_mem_used;
+};
+
+///HCI Debug identify Flash command complete event parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_id_flash_cmd_cmp_evt
+{
+    ///Status
+    uint8_t status;
+    ///Flash identity
+    uint8_t flash_id;
+};
+
+///HCI Debug RF Register read command
+/*@TRACE*/
+struct hci_dbg_rf_reg_rd_cmd
+{
+    /// register address
+    uint16_t addr;
+};
+
+///HCI Debug RF Register read command complete event
+/*@TRACE*/
+struct hci_dbg_rf_reg_rd_cmd_cmp_evt
+{
+    /// status
+    uint8_t status;
+    /// register address
+    uint16_t addr;
+    /// register value
+    uint32_t value;
+};
+
+///HCI Debug RF Register write command
+/*@TRACE*/
+struct hci_dbg_rf_reg_wr_cmd
+{
+    /// register address
+    uint16_t addr;
+    /// register value
+    uint32_t value;
+};
+
+///HCI Debug RF Register write command complete event
+/*@TRACE*/
+struct hci_dbg_rf_reg_wr_cmd_cmp_evt
+{
+    /// status
+    uint8_t status;
+    /// address
+    uint16_t addr;
+};
+
+///HCI Debug platform reset command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_plf_reset_cmd
+{
+    /// reason
+    uint8_t reason;
+};
+
+#if (RW_DEBUG && BT_EMB_PRESENT)
+/// Send LMP Packets
+/*@TRACE*/
+struct hci_dbg_bt_send_lmp_cmd
+{
+    /// Connection handle
+    uint16_t conhdl;
+    ///buffer structure to return
+    struct buffer_tag buf;
+};
+
+/// Discard LMP Packets
+/*@TRACE*/
+struct hci_dbg_bt_discard_lmp_en_cmd
+{
+    /// Connection handle
+    uint16_t conhdl;
+    /// Enable/Disable LMP discard (0: disable / 1: enable)
+    uint8_t enable;
+};
+
+/// Set local clock
+/*@TRACE*/
+struct hci_dbg_set_local_clock_cmd
+{
+    /// Clock (in half-slots)
+    uint32_t clock;
+};
+#endif //(RW_DEBUG && BT_EMB_PRESENT)
+
+#if (RW_WLAN_COEX)
+///HCI Debug wlan coexistence command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_wlan_coex_cmd
+{
+    /// State
+    uint8_t state;
+};
+#if (RW_WLAN_COEX_TEST)
+///HCI Debug wlan coexistence test scenario command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_wlan_coextst_scen_cmd
+{
+    /// Scenario
+    uint32_t scenario;
+};
+#endif //RW_WLAN_COEX_TEST
+#endif //RW_WLAN_COEX
+
+#if (RW_MWS_COEX)
+///HCI Debug mws coexistence command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_mws_coex_cmd
+{
+    /// State
+    uint8_t state;
+};
+#if (RW_MWS_COEX_TEST)
+///HCI Debug mws coexistence test scenario command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_mws_coextst_scen_cmd
+{
+    /// Scenario
+    uint32_t scenario;
+};
+#endif //RW_MWS_COEX_TEST
+#endif //RW_MWS_COEX
+
+#if (BLE_ISO_MODE_0)
+/// HCI VS Setup Audio Mode 0 channel command parameters
+/*@TRACE*/
+struct hci_vs_setup_am0_chan_cmd
+{
+    /// Handle that identify an ACL link between a Master and a Slave device that is requesting
+    /// an Audio Mode 0 Channel (range 0x0000-0x0EFF)
+    uint16_t    conhdl;
+
+    // *** Data path settings ***
+    /// Host to Controller nominal data rate in octets per second
+    uint32_t    tx_bandwidth;
+    /// Controller to Host nominal data rate in octets per second
+    uint32_t    rx_bandwidth;
+    /// Host to Controller Data path type
+    /// 0x00       Disabled
+    /// 0x01       HCI
+    /// 0x02-0xFE  Logical_Channel_Number. The meaning of the logical channels will be vendor specific.
+    /// 0xFF       Test Mode
+    uint8_t     tx_data_path;
+    /// Controller to Host Data path type
+    /// 0x00       Disabled
+    /// 0x01       HCI
+    /// 0x02-0xFE  Logical_Channel_Number. The meaning of the logical channels will be vendor specific.
+    /// 0xFF       Test Mode
+    uint8_t     rx_data_path;
+    /// The number of bits in each unit of data received from the Host over the data transport. (Range 0x01 - 0xFB)
+    uint8_t     tx_size;
+    /// The number of bits in each unit of data sent to the Host over the data transport. (Range 0x01 - 0xFB)
+    uint8_t     rx_size;
+};
+
+/// Used to read the maximum size of the data portion of isochronous packets
+/// no parameter on command, only need to specify returned parameters
+struct hci_vs_setup_am0_chan_cmd_cmp_evt
+{
+    /// 0x00 - Request succeed ; 0x01-0xFF Failed reason
+    uint8_t  status;
+    /// Handle that identify an ACL link between a Master and a Slave device that is requesting
+    /// an Audio Mode 0 Channel (range 0x0000-0x0EFF)
+    uint16_t conhdl;
+    /// Channel_Handle to be used to identify an Audio Mode 0 Channel (range 0x0000-0x0EFF)
+    uint16_t am0_hdl;
+};
+
+
+/// Removes existing Audio Mode 0 channel command parameters
+/*@TRACE*/
+struct hci_vs_remove_am0_chan_cmd
+{
+    /// Channel_Handles used to identify Audio Mode 0 Channel (range 0x0000-0x0EFF)
+    uint16_t am0_hdl;
+};
+
+
+/// Used to Control the channel that will b.e part of an Audio Mode 0 Connection
+/*@TRACE*/
+struct hci_vs_control_am0_chan_cmd
+{
+    /// Channel_Handles used to identify Audio Mode 0 Channel (range 0x0000-0x0EFF)
+    uint16_t am0_hdl;
+    /// Control if the stream should be Enabled (0x01) or Disabled (0x00)
+    uint8_t  enable;
+    /// Control if slave audio source is enabled or not
+    uint8_t  slv_src_enable;
+};
+
+/// HCI basic command complete event structure with AM0 Channel handle
+/*@TRACE*/
+struct hci_vs_basic_am0_cmd_cmp_evt
+{
+    /// status
+    uint8_t     status;
+    /// Channel_Handles used to identify Audio Mode 0 Channel (range 0x0000-0x0EFF)
+    uint16_t    am0_hdl;
+};
+#endif // (BLE_ISO_MODE_0)
+
+
+///HCI Debug HW Register Read command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_ble_reg_rd_cmd
+{
+    /// register address
+    uint16_t reg_addr;
+};
+
+///HCI Debug HW Register write command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_ble_reg_wr_cmd
+{
+    /// register address
+    uint16_t reg_addr;
+    /// extra parameter
+    uint16_t reserved;
+    /// register value
+    uint32_t reg_value;
+};
+
+///HCI Debug HW Register Read Complete event parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_ble_reg_rd_cmd_cmp_evt
+{
+    /// status
+    uint8_t  status;
+    /// register address
+    uint16_t reg_addr;
+    /// register value
+    uint32_t reg_value;
+};
+
+///HCI Debug HW Register Write Complete event parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_ble_reg_wr_cmd_cmp_evt
+{
+    /// status
+    uint8_t  status;
+    /// register address
+    uint16_t reg_addr;
+};
+
+#if (BLE_EMB_PRESENT)
+///HCI Vendor Specific Set Preferred Slave Latency command parameters
+/*@TRACE*/
+struct hci_vs_set_pref_slave_latency_cmd
+{
+    /// Connection handle
+    uint16_t conhdl;
+    /// Preferred latency (in number of connection events)
+    uint16_t latency;
+};
+
+///HCI Vendor Specific Set Preferred Slave event duration command parameters
+/*@TRACE*/
+struct hci_vs_set_pref_slave_evt_dur_cmd
+{
+    /// Connection handle
+    uint16_t conhdl;
+    /// Preferred event duration (N * 0.625 ms)
+    uint16_t duration;
+    /// Slave transmits a single packet per connection event (False/True)
+    uint8_t single_tx;
+};
+
+/// Send LLCP Packets
+/*@TRACE*/
+struct hci_dbg_send_llcp_cmd
+{
+    /// Connection handle
+    uint16_t conhdl;
+    ///buffer structure to return
+    struct buffer_tag buf;
+};
+
+///HCI Debug LLC discard command parameters - vendor specific
+/*@TRACE*/
+struct hci_dbg_llcp_discard_cmd
+{
+    /// Handle pointing to the connection for which LLCP commands have to be discarded
+    uint16_t conhdl;
+    /// Flag indicating if the discarding has to be enabled or disabled
+    uint8_t enable;
+};
+#endif //BLE_EMB_PRESENT
+
+#if (RW_DEBUG)
+/// HCI DBG Meta Event indicating a SW assertion
+//TODO[AAL] exception (associated to HCI_DBG_EVT)
+/*@TRACE*/
+struct hci_dbg_assert_evt
+{
+    ///DBG Subevent code
+    uint8_t             subcode;
+    /// Assert type (warning/error)
+    //@trc_ref assert_type
+    uint8_t             type;
+    /// Line number
+    uint32_t line;
+    /// Param0
+    uint32_t param0;
+    /// Param1
+    uint32_t param1;
+    /// File name
+    uint8_t file[__ARRAY_EMPTY];
+};
+#endif //(RW_DEBUG)
+
+#if(BLE_ISOGEN)
+/// Event is used to provide statistics about ISO Gen
+/*@TRACE*/
+struct hci_vs_isogen_stat_evt
+{
+    /// VS Subevent code
+    uint8_t  subcode;
+
+    /// ISO Handle of the isochronous channel (Range 0x0000-0x0EFF)
+    uint16_t iso_hdl;
+
+    /// Statistics - Number of transmission attempts
+    uint32_t nb_tx;
+    /// Statistics - Number of transmission attempts that succeed
+    uint32_t nb_tx_ok;
+    /// Statistics - Number of Not granted packet packets
+    uint32_t nb_tx_not_granted;
+
+    /// Statistics - Number of reception attempt
+    uint32_t nb_rx;
+    /// Statistics - Number of reception attempts that succeed
+    uint32_t nb_rx_ok;
+    /// Statistics - Number of Not granted packet packets
+    uint32_t nb_rx_not_granted;
+    /// Statistics - Number of wrongly received packet (invalid data)
+    uint32_t nb_rx_data_err;
+    /// Statistics - Number of CRC Errors
+    uint32_t nb_rx_crc_err;
+    /// Statistics - Number of SYNC Errors
+    uint32_t nb_rx_sync_err;
+    /// Statistics - Number of received empty packets
+    uint32_t nb_rx_empty;
+};
+#endif // (BLE_ISOGEN)
+
+
+/// HCI LE Read PHY command
+/*@TRACE*/
+struct hci_le_rd_phy_cmd
+{
+    /// Connection Handle
+    uint16_t            conhdl;
+};
+
+/// HCI LE Set Default PHY Command
+/*@TRACE*/
+struct hci_le_set_dft_phy_cmd
+{
+    /// Preferred PHYS selection
+    uint8_t            all_phys;
+    /// Preferred PHYS for TX
+    uint8_t            tx_phys;
+    /// Preferred PHYS for RX
+    uint8_t            rx_phys;
+};
+
+/// HCI LE Set PHY Command
+/*@TRACE*/
+struct hci_le_set_phy_cmd
+{
+    /// Connection Handle
+    uint16_t           conhdl;
+    /// Preferred PHYS selection
+    uint8_t            all_phys;
+    /// Preferred PHYS for TX
+    uint8_t            tx_phys;
+    /// Preferred PHYS for RX
+    uint8_t            rx_phys;
+    /// PHY options
+    uint16_t           phy_opt;
+};
+
+/// HCI LE Set Extended Advertising Parameters Command Complete Event
+/*@TRACE*/
+struct hci_le_set_ext_adv_param_cmd_cmp_evt
+{
+    /// Status
+    uint8_t            status;
+    /// Selected Tx power
+    int8_t             sel_tx_pwr;
+};
+
+/// HCI LE Enhanced Receiver Test Command
+/*@TRACE*/
+struct hci_le_enh_rx_test_cmd
+{
+    /// Reception channel value
+    uint8_t            channel;
+    /// Reception PHY rate
+    uint8_t            phys;
+    /// Modulation index
+    uint8_t            modulation_idx;
+};
+
+/// HCI LE Enhanced Transmitter Test Command
+/*@TRACE*/
+struct hci_le_enh_tx_test_cmd
+{
+    /// Transmit channel value
+    uint8_t            channel;
+    /// Length of the data to be transmitted in a packet
+    uint8_t            payload_length;
+    /// Type of the data contained in a packet
+    uint8_t            payload_type;
+    /// Transmit PHY rate
+    uint8_t            phys;
+};
+
+///HCI LE Set Advertising Set Random Address Command parameters structure
+/*@TRACE*/
+struct hci_le_set_adv_set_rand_addr_cmd
+{
+    /// Advertising handle
+    uint8_t adv_hdl;
+    /// Advertising random address
+    struct bd_addr rand_addr;
+};
+
+///HCI LE Set Extended Advertising Parameters Command parameters structure
+/*@TRACE*/
+struct hci_le_set_ext_adv_param_cmd
+{
+    /// Advertising handle
+    uint8_t adv_hdl;
+    /// Advertising event properties
+    uint16_t adv_evt_properties;
+    /// Primary advertising minimum interval
+    uint8_t prim_adv_intv_min[3];
+    /// Primary advertising maximum interval
+    uint8_t prim_adv_intv_max[3];
+    /// Primary advertising channel map
+    uint8_t prim_adv_chnl_map;
+    /// Own address type:  public=0 / random=1 / rpa_or_pub=2 / rpa_or_rnd=3
+    uint8_t own_addr_type;
+    /// Peer address type: public=0 / random=1
+    uint8_t peer_addr_type;
+    /// Peer Bluetooth device address
+    struct bd_addr peer_addr;
+    /// Advertising filter policy
+    uint8_t adv_filt_policy;
+    /// Advertising Tx power
+    int8_t adv_tx_pwr;
+    /// Primary advertising PHY
+    uint8_t prim_adv_phy;
+    /// Secondary advertising max skip
+    uint8_t sec_adv_max_skip;
+    /// Secondary advertising PHY
+    uint8_t sec_adv_phy;
+    /// Advertising SID
+    uint8_t adv_sid;
+    /// Scan request notification enable
+    uint8_t scan_req_notif_en;
+};
+
+///HCI LE Set Extended Advertising Data Command parameters structure
+/*@TRACE*/
+struct hci_le_set_ext_adv_data_cmd
+{
+    /// Advertising handle
+    uint8_t adv_hdl;
+    /**
+     *  Operation
+     *  0x00 Intermediate fragment of fragmented extended advertising data
+     *  0x01 First fragment of fragmented extended advertising data
+     *  0x02 Last fragment of fragmented extended advertising data
+     *  0x03 Complete extended advertising data
+     *  0x04 [ID7300_r06] Unchanged data (just update the Advertising DID)
+     *  All other values Reserved for future use
+     */
+    uint8_t operation;
+    /**
+     *  Fragment preference
+     *  0x00 The Controller may fragment all Host advertising data
+     *  0x01 The Controller should not fragment nor minimize fragmentation of Host advertising data
+     *  All other values Reserved for future use
+     */
+    uint8_t frag_pref;
+    /// Advertising Data Length (0-252 bytes)
+    uint8_t data_len;
+    /// Advertising data
+    uint8_t data[__ARRAY_EMPTY];
+};
+
+///HCI LE Set Extended Scan Response Data Command parameters structure
+/*@TRACE*/
+struct hci_le_set_ext_scan_rsp_data_cmd
+{
+    /// Advertising handle
+    uint8_t adv_hdl;
+    /**
+     *  Operation
+     *  0x00 Intermediate fragment of fragmented extended advertising data
+     *  0x01 First fragment of fragmented extended advertising data
+     *  0x02 Last fragment of fragmented extended advertising data
+     *  0x03 Complete extended advertising data
+     *  0x04 [ID7300_r06] Unchanged data (just update the Advertising DID)
+     *  All other values Reserved for future use
+     */
+    uint8_t operation;
+    /**
+     *  Fragment preference
+     *  0x00 The Controller may fragment all Host advertising data
+     *  0x01 The Controller should not fragment nor minimize fragmentation of Host advertising data
+     *  All other values Reserved for future use
+     */
+    uint8_t frag_pref;
+    /// Scan Response Data Length (0-252 bytes)
+    uint8_t data_len;
+    /// Advertising data
+    uint8_t data[__ARRAY_EMPTY];
+};
+
+#if BLE_EMB_PRESENT || BLE_HOST_PRESENT
+///HCI LE Set Extended Advertising Enable Command parameters structure
+/*@TRACE*/
+struct hci_le_set_ext_adv_en_cmd
+{
+    /// Enable
+    uint8_t enable;
+    /// Number of sets (1 - 0x3F)
+    uint8_t nb_sets;
+    /// Advertising handle
+    uint8_t adv_hdl[BLE_ACTIVITY_MAX];
+    /// Duration (N * 10 ms), 0x0000 No advertising duration. Advertising to continue until the Host disables it.
+    uint16_t duration[BLE_ACTIVITY_MAX];
+    /// Maximum number of extended advertising events
+    uint8_t max_ext_adv_evt[BLE_ACTIVITY_MAX];
+};
+#endif //BLE_EMB_PRESENT || BLE_HOST_PRESENT
+
+///HCI LE Read Maximum Advertising Data Length Command complete event
+/*@TRACE*/
+struct hci_le_rd_max_adv_data_len_cmd_cmp_evt
+{
+    /// Status
+    uint8_t status;
+    /// Maximum advertising data length
+    uint16_t max_adv_data_len;
+};
+
+///HCI LE Remove Advertising Set Command parameters structure
+/*@TRACE
+ * hci_le_rmv_adv_set_cmd = hci_le_rem_adv_set_cmd*/
+struct hci_le_rem_adv_set_cmd
+{
+    /// Advertising handle
+    uint8_t adv_hdl;
+};
+
+///HCI LE Read Number of Supported Advertising Sets Command complete event
+/*@TRACE*/
+struct hci_le_rd_nb_supp_adv_sets_cmd_cmp_evt
+{
+    /// Status
+    uint8_t status;
+    /// Number of supported advertising sets
+    uint8_t nb_supp_adv_sets;
+};
+
+///HCI LE Read Transmit Power Command complete event
+/*@TRACE*/
+struct hci_le_rd_tx_pwr_cmd_cmp_evt
+{
+    /// Status
+    uint8_t status;
+    /// Minimum TX Power
+    uint8_t min_tx_pwr;
+    /// Maximum TX Power
+    uint8_t max_tx_pwr;
+};
+
+///HCI LE Read RF Path Compensation Command complete event
+/*@TRACE*/
+struct hci_le_rd_rf_path_comp_cmd_cmp_evt
+{
+    /// Status
+    uint8_t status;
+    /// RF TX Path Compensation
+    int16_t tx_path_comp;
+    /// RF RX Path Compensation
+    int16_t rx_path_comp;
+};
+
+///HCI LE Write RF Path Compensation Command complete event
+/*@TRACE*/
+struct hci_le_wr_rf_path_comp_cmd
+{
+    /// RF TX Path Compensation
+    int16_t tx_path_comp;
+    /// RF RX Path Compensation
+    int16_t rx_path_comp;
+};
+
+///HCI LE Set Periodic Advertising Parameters Command parameters structure
+/*@TRACE*/
+struct hci_le_set_per_adv_param_cmd
+{
+    /// Advertising handle
+    uint8_t adv_hdl;
+    /// Minimum advertising interval for periodic advertising
+    uint16_t adv_intv_min;
+    /// Maximum advertising interval for periodic advertising
+    uint16_t adv_intv_max;
+    /// Advertising properties
+    uint16_t adv_prop;
+};
+
+///HCI LE Set Periodic Advertising Data Command parameters structure
+/*@TRACE*/
+struct hci_le_set_per_adv_data_cmd
+{
+    /// Advertising handle
+    uint8_t adv_hdl;
+    /**
+     *  Operation
+     *  0x00 Intermediate fragment of fragmented periodic advertising data
+     *  0x01 First fragment of fragmented periodic advertising data
+     *  0x02 Last fragment of fragmented periodic advertising data
+     *  0x03 Complete periodic advertising data
+     *  All other values Reserved for future use
+     */
+    uint8_t operation;
+    /// Advertising Data Length (0-252 bytes)
+    uint8_t data_len;
+    /// Advertising data
+    uint8_t data[__ARRAY_EMPTY];
+};
+
+///HCI LE Set Periodic Advertising Enable Command parameters structure
+/*@TRACE*/
+struct hci_le_set_per_adv_en_cmd
+{
+    /// Enable
+    uint8_t enable;
+    /// Advertising handle
+    uint8_t adv_hdl;
+};
+
+///HCI LE Advertising Set Terminated event
+/*@TRACE
+ * hci_le_adv_set_terminated_evt = hci_le_adv_set_term_evt*/
+struct hci_le_adv_set_term_evt
+{
+    /// LE Subevent code
+    uint8_t  subcode;
+    /// Status
+    uint8_t  status;
+    /// Advertising handle
+    uint8_t  adv_hdl;
+    /// Connection handle
+    uint16_t conhdl;
+    /// Num_Completed_Extended_Advertising_Events
+    uint8_t  nb_cmp_ext_adv_evt;
+};
+
+///HCI LE Scan Request Received event
+/*@TRACE*/
+struct hci_le_scan_req_rcvd_evt
+{
+    /// LE Subevent code
+    uint8_t  subcode;
+    /// Advertising handle
+    uint8_t  adv_hdl;
+    /// Scanner address type:  public=0 / random=1 / rpa_or_pub=2 / rpa_or_rnd=3
+    uint8_t scan_addr_type;
+    /// Scanner address
+    struct bd_addr scan_addr;
+};
+
+///HCI LE Read Periodic Advertiser List Size Command complete event
+/*@TRACE*/
+struct hci_le_rd_per_adv_list_size_cmd_cmp_evt
+{
+    ///Status
+    uint8_t status;
+    /// Periodic Advertiser List Size
+    uint8_t size;
+};
+
+///HCI LE Channel Selection Algorithm event
+/*@TRACE*/
+struct hci_le_ch_sel_algo_evt
+{
+    /// LE Subevent code
+    uint8_t  subcode;
+    /// Connection handle
+    uint16_t  conhdl;
+    /// Channel selection algorithm
+    uint8_t ch_sel_algo;
+};
+
+/// HCI LE read PHY Command complete event
+/*@TRACE*/
+struct hci_le_rd_phy_cmd_cmp_evt
+{
+    ///Status of received command
+    uint8_t             status;
+    /// Connection Handle
+    uint16_t            conhdl;
+    /// Current configured PHY for TX
+    //@trc_ref le_phy_value
+    uint8_t             tx_phy;
+    /// Current configured PHY for RX
+    //@trc_ref le_phy_value
+    uint8_t             rx_phy;
+};
+
+/// HCI LE PHY Update Complete event
+/*@TRACE*/
+struct hci_le_phy_upd_cmp_evt
+{
+    ///LE Subevent code
+    uint8_t             subcode;
+    ///Status of received command
+    uint8_t             status;
+    ///Connection handle
+    uint16_t            conhdl;
+    ///TX phy chosen
+    //@trc_ref le_phy_value
+    uint8_t             tx_phy;
+    ///RX phy chosen
+    //@trc_ref le_phy_value
+    uint8_t             rx_phy;
+};
+
+#if (BLE_ISO_PRESENT && BLE_HW_50_ISO)
+// HCI ISO definitions for CIS and BIS
+#include "co_hci_iso.h"
+#endif // (BLE_ISO_PRESENT && BLE_HW_50_ISO)
+
+/// @} CO_BT
+#endif // CO_HCI_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/co_list.h b/platform/atm2/ATM22xx-x1x/include/ble/co_list.h
new file mode 100644
index 0000000..fa54154
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/co_list.h
@@ -0,0 +1,303 @@
+/**
+ ****************************************************************************************
+ *
+ * @file co_list.h
+ *
+ * @brief Common list structures definitions
+ *
+ * Copyright (C) RivieraWaves 2009-2015
+ *
+ *
+ ****************************************************************************************
+ */
+
+#ifndef _CO_LIST_H_
+#define _CO_LIST_H_
+
+/**
+ *****************************************************************************************
+ * @defgroup CO_LIST List management
+ * @ingroup COMMON
+ *
+ * @brief  List management.
+ *
+ * This module contains the list structures and handling functions.
+ * @{
+ *****************************************************************************************
+ */
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include <stdint.h>         // standard definition
+#include <stdbool.h>        // boolean definition
+#include <stddef.h>         // for NULL and size_t
+#include "rwip_config.h"    // stack configuration
+#include "compiler.h"       // for __INLINE
+
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+/// structure of a list element header
+/*@TRACE*/
+struct co_list_hdr
+{
+    /// Pointer to next co_list_hdr
+    struct co_list_hdr *next;
+};
+
+/// simplify type name of list element header
+typedef struct co_list_hdr co_list_hdr_t;
+
+/// structure of a list
+struct co_list
+{
+    /// pointer to first element of the list
+    struct co_list_hdr *first;
+    /// pointer to the last element
+    struct co_list_hdr *last;
+
+    #if (KE_PROFILING)
+    /// number of element in the list
+    uint32_t cnt;
+    /// max number of element in the list
+    uint32_t maxcnt;
+    /// min number of element in the list
+    uint32_t mincnt;
+    #endif //KE_PROFILING
+};
+
+/// simplify type name of list
+typedef struct co_list co_list_t;
+
+/*
+ * MACROS
+ ****************************************************************************************
+ */
+/// pop a specific element from the list
+#define CO_LIST_POP_ELT(list, elt) co_list_extract(&(list), &(elt->hdr));
+
+/*
+ * FUNCTION DECLARATIONS
+ ****************************************************************************************
+ */
+/**
+ ****************************************************************************************
+ * @brief Initialize a list to defaults values.
+ *
+ * @param list           Pointer to the list structure.
+ ****************************************************************************************
+ */
+void co_list_init(struct co_list *list);
+
+/**
+ ****************************************************************************************
+ * @brief Construct a list of free elements representing a pool
+ *
+ * @param list           Pointer to the list structure
+ * @param pool           Pointer to the pool to be initialized
+ * @param elmt_size      Size of one element of the pool
+ * @param elmt_cnt       Nb of elements available in the pool
+ *
+ ****************************************************************************************
+ */
+void co_list_pool_init(struct co_list *list,
+                       void *pool,
+                       size_t elmt_size,
+                       uint32_t elmt_cnt);
+
+/**
+ ****************************************************************************************
+ * @brief Add an element as last on the list.
+ *
+ * @param list           Pointer to the list structure
+ * @param list_hdr       Pointer to the header to add at the end of the list
+ *
+ ****************************************************************************************
+ */
+void co_list_push_back(struct co_list *list, struct co_list_hdr *list_hdr);
+
+/**
+ ****************************************************************************************
+ * @brief Append a sequence of elements at the end of a list.
+ *
+ * Note: the elements to append shall be linked together
+ *
+ * @param list           Pointer to the list structure
+ * @param first_hdr      Pointer to the first element to append
+ * @param last_hdr       Pointer to the last element to append
+ ****************************************************************************************
+ */
+void co_list_push_back_sublist(struct co_list *list, struct co_list_hdr *first_hdr, struct co_list_hdr *last_hdr);
+
+/**
+ ****************************************************************************************
+ * @brief Add an element as first on the list.
+ *
+ * @param list           Pointer to the list structure
+ * @param list_hdr       Pointer to the header to add at the beginning of the list
+ ****************************************************************************************
+ */
+void co_list_push_front(struct co_list *list, struct co_list_hdr *list_hdr);
+
+/**
+ ****************************************************************************************
+ * @brief Extract the first element of the list.
+ * @param list           Pointer to the list structure
+ * @return The pointer to the element extracted, and NULL if the list is empty.
+ ****************************************************************************************
+ */
+struct co_list_hdr *co_list_pop_front(struct co_list *list);
+
+/**
+ ****************************************************************************************
+ * @brief Search for a given element in the list, and extract it if found.
+ *
+ * @param list           Pointer to the list structure
+ * @param list_hdr       Element to extract
+ *
+ * @return true if the element is found in the list, false otherwise
+ ****************************************************************************************
+ */
+bool co_list_extract(struct co_list *list, struct co_list_hdr *list_hdr);
+
+/**
+ ****************************************************************************************
+ * @brief Extract an element when the previous element is known
+ *
+ * Note: the element to remove shall follow immediately the reference within the list
+ *
+ * @param list           Pointer to the list structure
+ * @param elt_ref_hdr    Pointer to the referenced element (NULL if element to extract is the first in the list)
+ * @param elt_to_rem_hdr Pointer to the element to be extracted
+ ****************************************************************************************
+ */
+void co_list_extract_after(struct co_list *list, struct co_list_hdr *elt_ref_hdr, struct co_list_hdr *elt_to_rem_hdr);
+
+/**
+ ****************************************************************************************
+ * @brief Extract a sub-list when the previous element is known
+ *
+ * Note: the elements to remove shall be linked together and  follow immediately the reference element
+ *
+ * @param[in]  list           Pointer to the list structure
+ * @param[in]  ref_hdr        Pointer to the referenced element (NULL if first element to extract is first in the list)
+ * @param[in]  last_hdr       Pointer to the last element to extract ()
+ ****************************************************************************************
+ */
+void co_list_extract_sublist(struct co_list *list, struct co_list_hdr *ref_hdr, struct co_list_hdr *last_hdr);
+
+/**
+ ****************************************************************************************
+ * @brief Searched a given element in the list.
+ *
+ * @param list           Pointer to the list structure
+ * @param list_hdr       Pointer to the searched element
+ *
+ * @return true if the element is found in the list, false otherwise
+ ****************************************************************************************
+ */
+bool co_list_find(struct co_list *list, struct co_list_hdr *list_hdr);
+
+/**
+ ****************************************************************************************
+ * @brief Merge two lists in a single one.
+ *
+ * This function appends the list pointed by list2 to the list pointed by list1. Once the
+ * merge is done, it empties list2.
+ *
+ * @param list1    Pointer to the destination list
+ * @param list2    Pointer to the list to append to list1
+ ****************************************************************************************
+ */
+void co_list_merge(struct co_list *list1, struct co_list *list2);
+
+/**
+ ****************************************************************************************
+ * @brief Insert a given element in the list before the referenced element.
+ *
+ * @param list           Pointer to the list structure
+ * @param elt_ref_hdr    Pointer to the referenced element
+ * @param elt_to_add_hdr Pointer to the element to be inserted
+ *
+ * @return true if the element is found in the list, false otherwise
+ ****************************************************************************************
+ */
+void co_list_insert_before(struct co_list *list,
+                        struct co_list_hdr *elt_ref_hdr, struct co_list_hdr *elt_to_add_hdr);
+
+/**
+ ****************************************************************************************
+ * @brief Insert a given element in the list after the referenced element.
+ *
+ * @param list           Pointer to the list structure
+ * @param elt_ref_hdr    Pointer to the referenced element
+ * @param elt_to_add_hdr Pointer to the element to be inserted
+ *
+ * @return true if the element is found in the list, false otherwise
+ ****************************************************************************************
+ */
+void co_list_insert_after(struct co_list *list,
+                        struct co_list_hdr *elt_ref_hdr, struct co_list_hdr *elt_to_add_hdr);
+
+
+/**
+ ****************************************************************************************
+ * @brief Count number of elements present in the list
+ *
+ * @param list           Pointer to the list structure
+ *
+ * @return Number of elements present in the list
+ ****************************************************************************************
+ */
+uint16_t co_list_size(struct co_list *list);
+
+/**
+ ****************************************************************************************
+ * @brief Test if the list is empty.
+ * @param list           Pointer to the list structure.
+ * @return true if the list is empty, false else otherwise.
+ ****************************************************************************************
+ */
+__INLINE bool co_list_is_empty(const struct co_list *const list)
+{
+    bool listempty;
+    listempty = (list->first == NULL);
+    return (listempty);
+}
+
+/**
+ ****************************************************************************************
+ * @brief Pick the first element from the list without removing it.
+ *
+ * @param list           Pointer to the list structure.
+ *
+ * @return First element address. Returns NULL pointer if the list is empty.
+ ****************************************************************************************
+ */
+__INLINE struct co_list_hdr *co_list_pick(const struct co_list *const list)
+{
+    return(list->first);
+}
+
+
+/**
+ ****************************************************************************************
+ * @brief Return following element of a list element.
+ *
+ * @param list_hdr     Pointer to the list element.
+ *
+ * @return The pointer to the next element.
+ ****************************************************************************************
+ */
+__INLINE struct co_list_hdr *co_list_next(const struct co_list_hdr *const list_hdr)
+{
+    return(list_hdr->next);
+}
+
+/// @} CO_LIST
+#endif // _CO_LIST_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/co_lmp.h b/platform/atm2/ATM22xx-x1x/include/ble/co_lmp.h
new file mode 100644
index 0000000..2eac206
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/co_lmp.h
@@ -0,0 +1,1555 @@
+/**
+ ****************************************************************************************
+ *
+ * @file co_lmp.h
+ *
+ * @brief This file contains the HCI Bluetooth defines, enumerations and structures
+ *        definitions for use by all modules in RW stack.
+ *
+ * Copyright (C) RivieraWaves 2009-2015
+ *
+ ****************************************************************************************
+ */
+
+#ifndef CO_LMP_H_
+#define CO_LMP_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup CO_BT
+ * @{
+ ****************************************************************************************
+ */
+
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include "co_bt.h"
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+/// LMP Opcodes
+/*@TRACE*/
+enum co_lmp_opcode
+{
+    LMP_NAME_REQ_OPCODE               =  1 ,
+    LMP_NAME_RES_OPCODE               =  2 ,
+    LMP_ACCEPTED_OPCODE               =  3 ,
+    LMP_NOT_ACCEPTED_OPCODE           =  4 ,
+    LMP_CLK_OFF_REQ_OPCODE            =  5 ,
+    LMP_CLK_OFF_RES_OPCODE            =  6 ,
+    LMP_DETACH_OPCODE                 =  7 ,
+    LMP_INRAND_OPCODE                 =  8 ,
+    LMP_COMBKEY_OPCODE                =  9 ,
+    LMP_UNITKEY_OPCODE                = 10 ,
+    LMP_AURAND_OPCODE                 = 11 ,
+    LMP_SRES_OPCODE                   = 12 ,
+    LMP_TEMPRAND_OPCODE               = 13 ,
+    LMP_TEMPKEY_OPCODE                = 14 ,
+    LMP_ENC_MODE_REQ_OPCODE           = 15 ,
+    LMP_ENC_KEY_SIZE_REQ_OPCODE       = 16 ,
+    LMP_START_ENC_REQ_OPCODE          = 17 ,
+    LMP_STOP_ENC_REQ_OPCODE           = 18 ,
+    LMP_SWITCH_REQ_OPCODE             = 19 ,
+    LMP_HOLD_OPCODE                   = 20 ,
+    LMP_HOLD_REQ_OPCODE               = 21 ,
+    LMP_SNIFF_REQ_OPCODE              = 23 ,
+    LMP_UNSNIFF_REQ_OPCODE            = 24 ,
+    LMP_PARK_REQ_OPCODE               = 25 ,
+    LMP_SET_BSWIN_OPCODE              = 27 ,
+    LMP_MODIF_BEACON_OPCODE           = 28 ,
+    LMP_UNPARK_BD_REQ_OPCODE          = 29 ,
+    LMP_UNPARK_PM_REQ_OPCODE          = 30 ,
+    LMP_INCR_PWR_REQ_OPCODE           = 31 ,
+    LMP_DECR_PWR_REQ_OPCODE           = 32 ,
+    LMP_MAX_PWR_OPCODE                = 33 ,
+    LMP_MIN_PWR_OPCODE                = 34 ,
+    LMP_AUTO_RATE_OPCODE              = 35 ,
+    LMP_PREF_RATE_OPCODE              = 36 ,
+    LMP_VER_REQ_OPCODE                = 37 ,
+    LMP_VER_RES_OPCODE                = 38 ,
+    LMP_FEATS_REQ_OPCODE              = 39 ,
+    LMP_FEATS_RES_OPCODE              = 40 ,
+    LMP_QOS_OPCODE                    = 41 ,
+    LMP_QOS_REQ_OPCODE                = 42 ,
+    LMP_SCO_LINK_REQ_OPCODE           = 43 ,
+    LMP_RMV_SCO_LINK_REQ_OPCODE       = 44 ,
+    LMP_MAX_SLOT_OPCODE               = 45 ,
+    LMP_MAX_SLOT_REQ_OPCODE           = 46 ,
+    LMP_TIMING_ACCU_REQ_OPCODE        = 47 ,
+    LMP_TIMING_ACCU_RES_OPCODE        = 48 ,
+    LMP_SETUP_CMP_OPCODE              = 49 ,
+    LMP_USE_SEMI_PERM_KEY_OPCODE      = 50 ,
+    LMP_HOST_CON_REQ_OPCODE           = 51 ,
+    LMP_SLOT_OFF_OPCODE               = 52 ,
+    LMP_PAGE_MODE_REQ_OPCODE          = 53 ,
+    LMP_PAGE_SCAN_MODE_REQ_OPCODE     = 54 ,
+    LMP_SUPV_TO_OPCODE                = 55 ,
+    LMP_TEST_ACTIVATE_OPCODE          = 56 ,
+    LMP_TEST_CTRL_OPCODE              = 57 ,
+    LMP_ENC_KEY_SIZE_MASK_REQ_OPCODE  = 58 ,
+    LMP_ENC_KEY_SIZE_MASK_RES_OPCODE  = 59 ,
+    LMP_SET_AFH_OPCODE                = 60 ,
+    LMP_ENCAPS_HDR_OPCODE             = 61 ,
+    LMP_ENCAPS_PAYL_OPCODE            = 62 ,
+    LMP_SP_CFM_OPCODE                 = 63 ,
+    LMP_SP_NB_OPCODE                  = 64 ,
+    LMP_DHKEY_CHK_OPCODE              = 65 ,
+    LMP_PAUSE_ENC_AES_REQ_OPCODE      = 66 ,
+    LMP_ESC1_OPCODE                   = 124,
+    LMP_ESC2_OPCODE                   = 125,
+    LMP_ESC3_OPCODE                   = 126,
+    LMP_ESC4_OPCODE                   = 127,
+};
+
+/// LMP Escape 4 Extended Opcodes
+enum co_lmp_ext_opcode
+{
+    LMP_ACCEPTED_EXT_EXTOPCODE        =  1,
+    LMP_NOT_ACCEPTED_EXT_EXTOPCODE    =  2,
+    LMP_FEATS_REQ_EXT_EXTOPCODE       =  3,
+    LMP_FEATS_RES_EXT_EXTOPCODE       =  4,
+    LMP_CLK_ADJ_EXTOPCODE             =  5,
+    LMP_CLK_ADJ_ACK_EXTOPCODE         =  6,
+    LMP_CLK_ADJ_REQ_EXTOPCODE         =  7,
+    LMP_PKT_TYPE_TBL_REQ_EXTOPCODE    = 11,
+    LMP_ESCO_LINK_REQ_EXTOPCODE       = 12,
+    LMP_RMV_ESCO_LINK_REQ_EXTOPCODE   = 13,
+    LMP_CH_CLASS_REQ_EXTOPCODE        = 16,
+    LMP_CH_CLASS_EXTOPCODE            = 17,
+    LMP_SSR_REQ_EXTOPCODE             = 21,
+    LMP_SSR_RES_EXTOPCODE             = 22,
+    LMP_PAUSE_ENC_REQ_EXTOPCODE       = 23,
+    LMP_RESUME_ENC_REQ_EXTOPCODE      = 24,
+    LMP_IO_CAP_REQ_EXTOPCODE          = 25,
+    LMP_IO_CAP_RES_EXTOPCODE          = 26,
+    LMP_NUM_COMPARISON_FAIL_EXTOPCODE = 27,
+    LMP_PASSKEY_FAIL_EXTOPCODE        = 28,
+    LMP_OOB_FAIL_EXTOPCODE            = 29,
+    LMP_KEYPRESS_NOTIF_EXTOPCODE      = 30,
+    LMP_PWR_CTRL_REQ_EXTOPCODE        = 31,
+    LMP_PWR_CTRL_RES_EXTOPCODE        = 32,
+    LMP_PING_REQ_EXTOPCODE            = 33,
+    LMP_PING_RES_EXTOPCODE            = 34,
+    LMP_SAM_SET_TYPE0_EXTOPCODE       = 35,
+    LMP_SAM_DEFINE_MAP_EXTOPCODE      = 36,
+    LMP_SAM_SWITCH_EXTOPCODE          = 37,
+};
+
+/// PDU lengths (including opcode)
+enum co_lmp_pdu_length
+{
+    LMP_NAME_REQ_LEN              = 2 ,
+    LMP_NAME_RES_LEN              = 17,
+    LMP_ACCEPTED_LEN              = 2 ,
+    LMP_NOT_ACCEPTED_LEN          = 3 ,
+    LMP_CLK_OFF_REQ_LEN           = 1 ,
+    LMP_CLK_OFF_RES_LEN           = 3 ,
+    LMP_DETACH_LEN                = 2 ,
+    LMP_INRAND_LEN                = 17,
+    LMP_COMBKEY_LEN               = 17,
+    LMP_UNITKEY_LEN               = 17,
+    LMP_AURAND_LEN                = 17,
+    LMP_SRES_LEN                  = 5 ,
+    LMP_TEMPRAND_LEN              = 17,
+    LMP_TEMPKEY_LEN               = 17,
+    LMP_ENC_MODE_REQ_LEN          = 2 ,
+    LMP_ENC_KEY_SIZE_REQ_LEN      = 2 ,
+    LMP_START_ENC_REQ_LEN         = 17,
+    LMP_STOP_ENC_REQ_LEN          = 1 ,
+    LMP_SWITCH_REQ_LEN            = 5 ,
+    LMP_HOLD_LEN                  = 7 ,
+    LMP_HOLD_REQ_LEN              = 7 ,
+    LMP_SNIFF_REQ_LEN             = 10,
+    LMP_UNSNIFF_REQ_LEN           = 1 ,
+    LMP_PARK_REQ_LEN              = 17,
+    LMP_INCR_PWR_REQ_LEN          = 2 ,
+    LMP_DECR_PWR_REQ_LEN          = 2 ,
+    LMP_MAX_PWR_LEN               = 1 ,
+    LMP_MIN_PWR_LEN               = 1 ,
+    LMP_AUTO_RATE_LEN             = 1 ,
+    LMP_PREF_RATE_LEN             = 2 ,
+    LMP_VER_REQ_LEN               = 6 ,
+    LMP_VER_RES_LEN               = 6 ,
+    LMP_FEATS_REQ_LEN             = 9 ,
+    LMP_FEATS_RES_LEN             = 9 ,
+    LMP_QOS_LEN                   = 4 ,
+    LMP_QOS_REQ_LEN               = 4 ,
+    LMP_SCO_LINK_REQ_LEN          = 7 ,
+    LMP_RMV_SCO_LINK_REQ_LEN      = 3 ,
+    LMP_MAX_SLOT_LEN              = 2 ,
+    LMP_MAX_SLOT_REQ_LEN          = 2 ,
+    LMP_TIMING_ACCU_REQ_LEN       = 1 ,
+    LMP_TIMING_ACCU_RES_LEN       = 3 ,
+    LMP_SETUP_CMP_LEN             = 1 ,
+    LMP_USE_SEMI_PERM_KEY_LEN     = 1 ,
+    LMP_HOST_CON_REQ_LEN          = 1 ,
+    LMP_SLOT_OFF_LEN              = 9 ,
+    LMP_PAGE_MODE_REQ_LEN         = 3 ,
+    LMP_PAGE_SCAN_MODE_REQ_LEN    = 3 ,
+    LMP_SUPV_TO_LEN               = 3 ,
+    LMP_TEST_ACTIVATE_LEN         = 1 ,
+    LMP_TEST_CTRL_LEN             = 10,
+    LMP_ENC_KEY_SIZE_MASK_REQ_LEN = 1 ,
+    LMP_ENC_KEY_SIZE_MASK_RES_LEN = 3 ,
+    LMP_SET_AFH_LEN               = 16,
+    LMP_ENCAPS_HDR_LEN            = 4 ,
+    LMP_ENCAPS_PAYL_LEN           = 17,
+    LMP_SP_CFM_LEN                = 17,
+    LMP_SP_NB_LEN                 = 17,
+    LMP_DHKEY_CHK_LEN             = 17,
+    LMP_PAUSE_ENC_AES_REQ_LEN     = 17,
+};
+
+/// LMP Escape 4 Extended PDU length (including opcode and ext opcode)
+enum co_lmp_ext_pdu_length
+{
+    LMP_ACCEPTED_EXT_LEN        = 4 ,
+    LMP_NOT_ACCEPTED_EXT_LEN    = 5 ,
+    LMP_FEATS_REQ_EXT_LEN       = 12,
+    LMP_FEATS_RES_EXT_LEN       = 12,
+    LMP_CLK_ADJ_LEN             = 15,
+    LMP_CLK_ADJ_ACK_LEN         = 3 ,
+    LMP_CLK_ADJ_REQ_LEN         = 6 ,
+    LMP_PKT_TYPE_TBL_REQ_LEN    = 3 ,
+    LMP_ESCO_LINK_REQ_LEN       = 16,
+    LMP_RMV_ESCO_LINK_REQ_LEN   = 4 ,
+    LMP_CH_CLASS_REQ_LEN        = 7 ,
+    LMP_CH_CLASS_LEN            = 12,
+    LMP_SSR_REQ_LEN             = 9 ,
+    LMP_SSR_RES_LEN             = 9 ,
+    LMP_PAUSE_ENC_REQ_LEN       = 2 ,
+    LMP_RESUME_ENC_REQ_LEN      = 2 ,
+    LMP_IO_CAP_REQ_LEN          = 5 ,
+    LMP_IO_CAP_RES_LEN          = 5 ,
+    LMP_NUM_COMPARISON_FAIL_LEN = 2 ,
+    LMP_PASSKEY_FAIL_LEN        = 2 ,
+    LMP_OOB_FAIL_LEN            = 2 ,
+    LMP_KEYPRESS_NOTIF_LEN      = 3 ,
+    LMP_PWR_CTRL_REQ_LEN        = 3 ,
+    LMP_PWR_CTRL_RES_LEN        = 3 ,
+    LMP_PING_REQ_LEN            = 2 ,
+    LMP_PING_RES_LEN            = 2 ,
+    LMP_SAM_SET_TYPE0_LEN       = 17,
+    LMP_SAM_DEFINE_MAP_LEN      = 17,
+    LMP_SAN_SWITCH_LEN          = 9,
+};
+
+/// Maximum LMP PDU size (including opcode and ext opcode)
+#define LMP_MAX_PDU_SIZE         DM1_PACKET_SIZE
+
+/// Position of transaction ID in 1st byte
+#define LMP_TR_ID_POS        0
+#define LMP_TR_ID_MASK       0x01
+/// Position of opcode in 1st byte
+#define LMP_OPCODE_POS       1
+#define LMP_OPCODE_MASK      0xFE
+
+#define LMP_OPCODE(opcode, tr_id) (((opcode << LMP_OPCODE_POS) & LMP_OPCODE_MASK) | ((tr_id << LMP_TR_ID_POS) & LMP_TR_ID_MASK))
+/*
+ * MESSAGES
+ ****************************************************************************************
+ */
+
+///LMP_name_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_name_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Offset
+    uint8_t  offset;
+};
+
+///LMP_name_res PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_name_res
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Offset
+    uint8_t  offset;
+    ///Name Length
+    uint8_t  length;
+    ///Name Fragment
+    struct name_vect name_frag;
+};
+
+///LMP_accepted PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_accepted
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Opcode of the original LMP
+    uint8_t  orig_opcode;
+};
+
+///LMP_not_accepted PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_not_accepted
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Opcode of the original LMP
+    uint8_t  orig_opcode;
+    ///Reason for not accepting the PDU (error code)
+    uint8_t  reason;
+};
+
+///LMP_clkoffset_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_clk_off_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+};
+
+///LMP_clkoffset_res PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_clk_off_res
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Clock Offset value
+    uint16_t clk_offset ;
+};
+
+///LMP_detach PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_detach
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Reason to detach
+    uint8_t  reason;
+};
+
+///LMP_in_rand PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_inrand
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Random number
+    struct ltk random;
+};
+
+///LMP_comb_key PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_combkey
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Random number
+    struct ltk random;
+};
+
+///LMP_unit_key PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_unitkey
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Key
+    struct ltk key;
+};
+
+///LMP_au_rand PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_aurand
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Random number
+    struct ltk random;
+};
+
+///LMP_sres PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_sres
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Authentication Response
+    struct sres_nb Sres;
+};
+
+///LMP_temp_rand PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_temprand
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Random number
+    struct ltk random;
+};
+
+///LMP_temp_key PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_tempkey
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Key
+    struct ltk key;
+};
+
+///LMP_encryption_mode_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_enc_mode_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Encryption Mode
+    uint8_t  enc_mode;
+};
+
+///LMP_encryption_key_size_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_enc_key_size_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Key Size
+    uint8_t  key_size;
+};
+
+///LMP_start_encryption_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_start_enc_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Random number
+    struct ltk random;
+};
+
+///LMP_stop_encryption_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_stop_enc_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+};
+
+///LMP_switch_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_switch_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Switch Instant
+    uint32_t switch_inst;
+};
+
+///LMP_sniff_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_sniff_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    /// Timing Control Flags (bit 1: initialization method 1 or 2)
+    uint8_t  flags;
+    /// Offset (in slots)
+    uint16_t d_sniff;
+    /// Interval (in slots)
+    uint16_t t_sniff;
+    /// Attempts (number of receive slots) (in slots)
+    uint16_t sniff_attempt;
+    /// Timeout (number of receive slots) (in slots)
+    uint16_t sniff_to;
+};
+
+///LMP_unsniff_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_unsniff_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+};
+
+///LMP_incr_power_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_incr_pwr_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///For future use
+    uint8_t  reserved;
+};
+
+///LMP_decr_power_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_decr_pwr_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///For future use
+    uint8_t  reserved;
+};
+
+///LMP_max_power PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_max_pwr
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+};
+
+///LMP_min_power PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_min_pwr
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+};
+
+///LMP_auto_rate PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_auto_rate
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+};
+
+///LMP_preferred_rate PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_pref_rate
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Data Rate
+    uint8_t  rate;
+};
+
+///LMP_version_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_ver_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Version number
+    uint8_t  ver;
+    ///Company ID
+    uint16_t co_id;
+    ///Subversion number
+    uint16_t subver;
+};
+
+///LMP_version_res PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_ver_res
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Version number
+    uint8_t  ver;
+    ///Company ID
+    uint16_t co_id;
+    ///Subversion number
+    uint16_t subver;
+};
+
+///LMP_features_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_feats_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Features
+    struct features feats;
+};
+
+///LMP_features_res PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_feats_res
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Features
+    struct features feats;
+};
+
+///LMP_quality_of_service PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_qos
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Poll interval
+    uint16_t poll_intv;
+    ///Nbc
+    uint8_t  nbc;
+};
+
+
+///LMP_quality_of_service_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_qos_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Poll interval
+    uint16_t poll_intv;
+    ///Nbc
+    uint8_t  nbc;
+};
+
+///LMP_SCO_link_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_sco_link_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///SCO handle
+    uint8_t  sco_hdl;
+    ///timing control flags
+    uint8_t  flags;
+    ///Dsco
+    uint8_t  d_sco;
+    ///Tsco
+    uint8_t  t_sco;
+    ///SCO packet
+    uint8_t  sco_pkt;
+    ///Air mode
+    uint8_t  air_mode;
+};
+
+///LMP_remove_SCO_link_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_rmv_sco_link_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///SCO handle
+    uint8_t  sco_hdl;
+    ///Reason for its removal(error code)
+    uint8_t  reason;
+};
+
+///LMP_max_slot PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_max_slot
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Max slots
+    uint8_t  max_slots;
+};
+
+
+///LMP_max_slot_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_max_slot_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Max slots
+    uint8_t  max_slots;
+};
+
+///LMP_timing_accuracy_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_timing_accu_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+};
+
+///LMP_timing_accuracy_res PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_timing_accu_res
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Drift
+    uint8_t  drift;
+    ///Jitter
+    uint8_t  jitter;
+};
+
+///LMP_setup_complete PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_setup_cmp
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+};
+
+///LMP_use_semi_permanent_key PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_use_semi_perm_key
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+};
+
+///LMP_host_connection_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_host_con_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+};
+
+///LMP_slot_offset PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_slot_off
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Slot Offset
+    uint16_t       slot_off;
+    ///BD Address
+    struct bd_addr addr;
+};
+
+///LMP_page_mode_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_page_mode_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Paging scheme
+    uint8_t  page_scheme;
+    ///Paging scheme settings
+    uint8_t  page_stg;
+};
+
+///LMP_page_scan_mode_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_page_scan_mode_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Paging scheme
+    uint8_t  page_scheme;
+    ///Paging scheme settings
+    uint8_t  page_stg;
+};
+
+///LMP_supervision_timeout PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_supv_to
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    /// Supervision Timeout (in slots, 0 means infinite timeout)
+    uint16_t supv_to;
+};
+
+///LMP_test_activate PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_test_activate
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+};
+
+///LMP_test_control PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_test_ctrl
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Test Scenario
+    uint8_t  scenario;
+    ///Hopping Mode
+    uint8_t  hop;
+    ///Tx frequency
+    uint8_t  tx_freq;
+    ///Rx Frequency
+    uint8_t  rx_freq;
+    ///Power Control Mode
+    uint8_t  pwr_ctrl;
+    ///Poll period
+    uint8_t  poll_period;
+    ///Packet type
+    uint8_t  pkt_type;
+    ///length of test data
+    uint16_t data_len;
+};
+
+///LMP_encryption_key_size_mask_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_enc_key_size_mask_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+};
+
+///LMP_encryption_key_size_mask_res PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_enc_key_size_mask_res
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Encryption Key Size Mask
+    uint16_t mask;
+};
+
+///LMP_set_AFH PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_set_afh
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///AFH Instant
+    uint32_t        instant;
+    ///AFH Mode
+    uint8_t         mode;
+    ///AFH channel map
+    struct chnl_map map;
+};
+
+///LMP_encapsulated_header PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_encaps_hdr
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Encapsulated major type
+    uint8_t  maj_type;
+    ///Encapsulated minor type
+    uint8_t  min_type;
+    ///Encapsulated Payload Length
+    uint8_t  payl_len;
+};
+
+///LMP_encapsulated_payload PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_encaps_payl
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Encapsulated data
+    struct byte16 data;
+};
+
+///LMP_Simple_Pairing_Confirm PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_sp_cfm
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Commitment Value
+    struct byte16 commitment_val ;
+};
+
+///LMP_Simple_Pairing_Number PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_sp_nb
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///nonce Value
+    struct byte16 nonce;
+};
+
+///LMP_DHkey_check PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_dhkey_chk
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Confirmation Value
+    struct ltk cfm_val;
+};
+
+///LMP_pause_encryption_aes_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_pause_enc_aes_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    /// Random Number
+    struct ltk rand;
+};
+
+/*
+ * Extended PDUs parameter structures - Escape 4
+ ****************************************************************************************/
+
+///LMP_accepted_ext PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_accepted_ext
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///Escape opcode of the original LMP
+    uint8_t  orig_esc_opcode;
+    ///Extended opcode of the original LMP
+    uint8_t  orig_ext_opcode;
+};
+
+///LMP_not_accepted_ext PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_not_accepted_ext
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///Escape opcode of the original LMP
+    uint8_t  orig_esc_opcode;
+    ///Extended opcode of the original LMP
+    uint8_t  orig_ext_opcode;
+    ///Reason
+    uint8_t  reason;
+};
+
+///LMP_features_req_ext PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_feats_req_ext
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///Features page
+    uint8_t        page;
+    ///Max supported page
+    uint8_t        max_page;
+    ///Extended features
+    struct features ext_feats;
+};
+
+///LMP_features_res_ext PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_feats_res_ext
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///Features page
+    uint8_t        page;
+    ///Max supported page
+    uint8_t        max_page;
+    ///Extended features
+    struct features ext_feats;
+};
+
+///LMP_clk_adj PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_clk_adj
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///Coarse clock adjustment Event ID
+    uint8_t  clk_adj_id;
+    ///Coarse clock adjustment instant
+    uint32_t clk_adj_instant;
+    ///Coarse clock adjustment intraslot alignment offset
+    int16_t clk_adj_us;
+    ///Coarse clock adjustment slot offset
+    uint8_t  clk_adj_slots;
+    ///Coarse clock adjustment mode (before/after instant)
+    uint8_t  clk_adj_mode;
+    ///Coarse clock adjustment PDU CLK instant
+    uint32_t clk_adj_clk;
+};
+
+///LMP_clk_adj_ack PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_clk_adj_ack
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///Coarse clock adjustment Event ID
+    uint8_t  clk_adj_id;
+};
+
+///LMP_clk_adj_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_clk_adj_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///Coarse clock adjustment intraslot alignment offset
+    int16_t clk_adj_us;
+    ///Coarse clock adjustment slot offset
+    uint8_t  clk_adj_slots;
+    ///Corase clock adjustment period
+    uint8_t  clk_adj_period;
+};
+
+///LMP_packet_type_table_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_pkt_type_tbl_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///Packet Type table
+    uint8_t  pkt_type_tbl;
+};
+
+///LMP_SAM_define_map PDU structure
+struct lmp_sam_define_map
+{
+    ///Opcode (including transaction ID)
+    uint8_t opcode;
+    ///Extended opcode
+    uint8_t ext_opcode;
+    ///SAM Index
+    uint8_t index;
+    ///Tsam-sm
+    uint8_t t_sam_sm;
+    ///Nsam-sm
+    uint8_t n_sam_sm;
+    ///SAM Submaps
+    struct sam_submaps submaps;
+};
+
+///LMP_SAM_set_type0 PDU structure
+struct lmp_sam_set_type0
+{
+    ///Opcode (including transaction ID)
+    uint8_t opcode;
+    ///Extended opcode
+    uint8_t ext_opcode;
+    ///Update mode
+    uint8_t update_mode;
+    ///SAM Type0 submap
+    struct sam_type0_submap submap;
+};
+
+///LMP_SAM_switch PDU structure
+struct lmp_sam_switch
+{
+    ///Opcode (including transaction ID)
+    uint8_t opcode;
+    ///Extended opcode
+    uint8_t ext_opcode;
+    ///SAM Index
+    uint8_t index;
+    ///timing control flags
+    uint8_t flags;
+    ///Dsam
+    uint8_t d_sam;
+    ///SAM instant
+    uint32_t instant;
+};
+
+///LMP_eSCO_link_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_esco_link_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///eSCO handle
+    uint8_t  esco_hdl;
+    ///eSCo LT Address
+    uint8_t  esco_lt_addr;
+    ///timing control flags
+    uint8_t  flags;
+    ///Desco
+    uint8_t  d_esco;
+    ///t_esco
+    uint8_t  t_esco;
+    ///Wesco
+    uint8_t  w_esco;
+    ///eSCO packet type M2S
+    uint8_t  m2s_pkt_type;
+    ///eSCO packet type S2M
+    uint8_t  s2m_pkt_type;
+    ///Packet Length M2S
+    uint16_t m2s_pkt_len;
+    ///Packet Length S2m
+    uint16_t s2m_pkt_len;
+    ///Air Mode
+    uint8_t  air_mode;
+    ///Negotiation state
+    uint8_t  negt_st;
+};
+
+///LMP_remove_eSCO_link_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_rmv_esco_link_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///eSCO handle
+    uint8_t  esco_hdl;
+    ///Reason
+    uint8_t  reason;
+};
+
+///LMP_channel_classification_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_ch_class_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///AFH reporting mode
+    uint8_t  rep_mode;
+    ///AFH min interval
+    uint16_t min_intv;
+    ///AFH max interval
+    uint16_t max_intv;
+};
+
+///LMP_channel_classification PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_ch_class
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///AFh channel classification
+    struct chnl_map ch_class;
+};
+
+///LMP_sniff_subrating_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_ssr_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    /// Maximum sniff sub-rate (in number of sniff events)
+    uint8_t  max_subrate;
+    /// Minimum sniff mode timeout (in slots)
+    uint16_t min_to;
+    /// Sniff sub-rating instant (in slots, master clock value)
+    uint32_t instant;
+};
+
+///LMP_sniff_subrating_res PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_ssr_res
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    /// Maximum sniff sub-rate (in number of sniff events)
+    uint8_t  max_subrate;
+    /// Minimum sniff mode timeout (in slots)
+    uint16_t min_to;
+    /// Sniff sub-rating instant (in slots, master clock value)
+    uint32_t instant;
+};
+
+///LMP_pause_encryption_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_pause_enc_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+};
+
+///LMP_resume_encryption_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_resume_enc_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+};
+
+///LMP_IO_capability_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_io_cap_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///IO Capabilities
+    uint8_t  io_cap;
+    /// OOB Authentication data
+    uint8_t  oob_auth_data;
+    ///Authentication requirements
+    uint8_t  auth_req;
+};
+
+
+///LMP_IO_capability_res PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_io_cap_res
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///IO Capabilities
+    uint8_t  io_cap;
+    /// OOB Authentication data
+    uint8_t  oob_auth_data;
+    ///Authentication requirements
+    uint8_t  auth_req;
+};
+
+///LMP_numeric_comparison_failed PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_num_comparison_fail
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+};
+
+///LMP_passkey_failed PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_passkey_fail
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+};
+
+///LMP_oob_failed PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_oob_fail
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+};
+
+///LMP_keypress_notification PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_keypress_notif
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///Notification Type
+    uint8_t  type;
+};
+
+///LMP_power_control_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_pwr_ctrl_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///Power adjustment request
+    uint8_t pwr_adj;
+
+};
+
+///LMP_power_control_res PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_pwr_ctrl_res
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+    ///Power adjustment response
+    uint8_t pwr_adj;
+};
+
+/// LMP_ping_req PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_ping_req
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+};
+
+/// LMP_ping_res PDU structure
+/*@TRACE
+ * @NO_PAD
+*/
+struct lmp_ping_res
+{
+    ///Opcode (including transaction ID)
+    uint8_t  opcode;
+    ///Extended opcode
+    uint8_t  ext_opcode;
+};
+
+/// Union of all the LMP message structures
+union lmp_pdu
+{
+    struct lmp_name_req                name_req              ;
+    struct lmp_name_res                name_res              ;
+    struct lmp_accepted                accepted              ;
+    struct lmp_not_accepted            not_accepted          ;
+    struct lmp_clk_off_req             clk_off_req           ;
+    struct lmp_clk_off_res             clk_off_res           ;
+    struct lmp_detach                  detach                ;
+    struct lmp_inrand                  inrand                ;
+    struct lmp_combkey                 combkey               ;
+    struct lmp_unitkey                 unitkey               ;
+    struct lmp_aurand                  aurand                ;
+    struct lmp_sres                    sres                  ;
+    struct lmp_temprand                temprand              ;
+    struct lmp_tempkey                 tempkey               ;
+    struct lmp_enc_mode_req            enc_mode_req          ;
+    struct lmp_enc_key_size_req        enc_key_size_req      ;
+    struct lmp_start_enc_req           start_enc_req         ;
+    struct lmp_stop_enc_req            stop_enc_req          ;
+    struct lmp_switch_req              switch_req            ;
+    struct lmp_sniff_req               sniff_req             ;
+    struct lmp_unsniff_req             unsniff_req           ;
+    struct lmp_incr_pwr_req            incr_pwr_req          ;
+    struct lmp_decr_pwr_req            decr_pwr_req          ;
+    struct lmp_max_pwr                 max_pwr               ;
+    struct lmp_min_pwr                 min_pwr               ;
+    struct lmp_auto_rate               auto_rate             ;
+    struct lmp_pref_rate               pref_rate             ;
+    struct lmp_ver_req                 ver_req               ;
+    struct lmp_ver_res                 ver_res               ;
+    struct lmp_feats_req               feats_req             ;
+    struct lmp_feats_res               feats_res             ;
+    struct lmp_clk_adj                 clk_adj               ;
+    struct lmp_clk_adj_ack             clk_adj_ack           ;
+    struct lmp_clk_adj_req             clk_adj_req           ;
+    struct lmp_qos                     qos                   ;
+    struct lmp_qos_req                 qos_req               ;
+    struct lmp_sco_link_req            sco_link_req          ;
+    struct lmp_rmv_sco_link_req        rmv_sco_link_req      ;
+    struct lmp_max_slot                max_slot              ;
+    struct lmp_max_slot_req            max_slot_req          ;
+    struct lmp_timing_accu_req         timing_accu_req       ;
+    struct lmp_timing_accu_res         timing_accu_res       ;
+    struct lmp_setup_cmp               setup_cmp             ;
+    struct lmp_use_semi_perm_key       use_semi_perm_key     ;
+    struct lmp_host_con_req            host_con_req          ;
+    struct lmp_slot_off                slot_off              ;
+    struct lmp_page_mode_req           page_mode_req         ;
+    struct lmp_page_scan_mode_req      page_scan_mode_req    ;
+    struct lmp_supv_to                 supv_to               ;
+    struct lmp_test_activate           test_activate         ;
+    struct lmp_test_ctrl               test_ctrl             ;
+    struct lmp_enc_key_size_mask_req   enc_key_size_mask_req ;
+    struct lmp_enc_key_size_mask_res   enc_key_size_mask_res ;
+    struct lmp_set_afh                 set_afh               ;
+    struct lmp_encaps_hdr              encaps_hdr            ;
+    struct lmp_encaps_payl             encaps_payl           ;
+    struct lmp_sp_cfm                  sp_cfm                ;
+    struct lmp_sp_nb                   sp_nb                 ;
+    struct lmp_dhkey_chk               dhkey_chk             ;
+    struct lmp_accepted_ext            accepted_ext          ;
+    struct lmp_not_accepted_ext        not_accepted_ext      ;
+    struct lmp_feats_req_ext           feats_req_ext         ;
+    struct lmp_feats_res_ext           feats_res_ext         ;
+    struct lmp_pkt_type_tbl_req        pkt_type_tbl_req      ;
+    struct lmp_sam_define_map          sam_define_map        ;
+    struct lmp_sam_set_type0           sam_set_type0         ;
+    struct lmp_sam_switch              sam_switch            ;
+    struct lmp_esco_link_req           esco_link_req         ;
+    struct lmp_rmv_esco_link_req       rmv_esco_link_req     ;
+    struct lmp_ch_class_req            ch_class_req          ;
+    struct lmp_ch_class                ch_class              ;
+    struct lmp_ssr_req                 ssr_req               ;
+    struct lmp_ssr_res                 ssr_res               ;
+    struct lmp_pause_enc_req           pause_enc_req         ;
+    struct lmp_resume_enc_req          resume_enc_req        ;
+    struct lmp_io_cap_req              io_cap_req            ;
+    struct lmp_io_cap_res              io_cap_res            ;
+    struct lmp_num_comparison_fail     num_comparison_fail   ;
+    struct lmp_passkey_fail            passkey_fail          ;
+    struct lmp_oob_fail                oob_fail              ;
+    struct lmp_keypress_notif          keypress_notif        ;
+    struct lmp_pwr_ctrl_req            pwr_ctrl_req          ;
+    struct lmp_pwr_ctrl_res            pwr_ctrl_res          ;
+    struct lmp_ping_req                ping_req              ;
+    struct lmp_ping_res                ping_res              ;
+};
+
+
+/// @} CO_BT
+#endif // CO_LMP_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/co_math.h b/platform/atm2/ATM22xx-x1x/include/ble/co_math.h
new file mode 100644
index 0000000..ddec586
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/co_math.h
@@ -0,0 +1,284 @@
+/**
+ ****************************************************************************************
+ *
+ * @file co_math.h
+ *
+ * @brief Common optimized math functions
+ *
+ * Copyright (C) RivieraWaves 2009-2015
+ * Copyright (C) Atmosic 2023
+ *
+ ****************************************************************************************
+ */
+
+#ifndef _CO_MATH_H_
+#define _CO_MATH_H_
+
+/**
+ *****************************************************************************************
+ * @defgroup CO_MATH Math functions
+ * @ingroup COMMON
+ * @brief  Optimized math functions and other computations.
+ *
+ * @{
+ *****************************************************************************************
+ */
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include <stdint.h>        // standard integer definitions
+#include <stdbool.h>       // boolean definitions
+#include <stdlib.h>        // standard library
+#include "compiler.h"      // for __INLINE
+#include "arch.h"          // for ASSERT_ERR
+
+extern void srand (unsigned int seed);
+extern int rand (void);
+
+/*
+ * MACROS
+ ****************************************************************************************
+ */
+/**
+ ****************************************************************************************
+ * @brief Return value with one bit set.
+ *
+ * @param[in] pos Position of the bit to set.
+ *
+ * @return Value with one bit set.  There is no return type since this is a macro and this
+ * will be resolved by the compiler upon assignment to an l-value.
+ ****************************************************************************************
+ */
+#define CO_BIT(pos) (1UL<<(pos))
+
+/**
+ ****************************************************************************************
+ * @brief Align val on the multiple of 4 equal or nearest higher.
+ * @param[in] val Value to align.
+ * @return Value aligned.
+ ****************************************************************************************
+ */
+#define CO_ALIGN4_HI(val) (((val)+3)&~3)
+
+
+/**
+ ****************************************************************************************
+ * @brief Align val on the multiple of 4 equal or nearest lower.
+ * @param[in] val Value to align.
+ * @return Value aligned.
+ ****************************************************************************************
+ */
+#define CO_ALIGN4_LO(val) ((val)&~3)
+
+/**
+ ****************************************************************************************
+ * @brief Align val on the multiple of 2 equal or nearest higher.
+ * @param[in] val Value to align.
+ * @return Value aligned.
+ ****************************************************************************************
+ */
+#define CO_ALIGN2_HI(val) (((val)+1)&~1)
+
+
+/**
+ ****************************************************************************************
+ * @brief Align val on the multiple of 2 equal or nearest lower.
+ * @param[in] val Value to align.
+ * @return Value aligned.
+ ****************************************************************************************
+ */
+#define CO_ALIGN2_LO(val) ((val)&~1)
+
+/**
+ ****************************************************************************************
+ * Perform a division and ceil up the result
+ *
+ * @param[in] val Value to divide
+ * @param[in] div Divide value
+ * @return ceil(val/div)
+ ****************************************************************************************
+ */
+#define CO_DIVIDE_CEIL(val, div) (((val) + ((div) - 1))/ (div))
+
+/**
+ ****************************************************************************************
+ * Perform a division and round the result
+ *
+ * @param[in] val Value to divide
+ * @param[in] div Divide value
+ * @return round(val/div)
+ ****************************************************************************************
+ */
+#define CO_DIVIDE_ROUND(val, div) (((val) + ((div) >> 1))/ (div))
+
+/**
+ ****************************************************************************************
+ * Perform a modulo operation
+ *
+ * @param[in] val    Dividend
+ * @param[in] div    Divisor
+ * @return  val/div)
+ ****************************************************************************************
+ */
+//#define CO_MOD(val, div) ((val) % (div))
+__INLINE uint32_t co_mod(uint32_t val, uint32_t div)
+{
+    ASSERT_ERR(div);
+    return ((val) % (div));
+}
+#define CO_MOD(val, div) co_mod(val, div)
+
+/*
+ * FUNCTION DEFINITIONS
+ ****************************************************************************************
+ */
+/**
+ ****************************************************************************************
+ * @brief Count leading zeros.
+ * @param[in] val Value to count the number of leading zeros on.
+ * @return Number of leading zeros when value is written as 32 bits.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_clz(uint32_t val)
+{
+    #if defined(__ICCARM__)
+    return __CLZ(val);
+    #elif defined(__arm__)
+    return __builtin_clz(val);
+    #elif defined(__GNUC__)
+    if (val == 0)
+    {
+        return 32;
+    }
+    return __builtin_clz(val);
+    #else
+    uint32_t i;
+    for (i = 0; i < 32; i++)
+    {
+        if (val & CO_BIT(31 - i))
+            break;
+    }
+    return i;
+    #endif // defined(__arm__)
+}
+
+/**
+ ****************************************************************************************
+ * @brief Count trailing zeros.
+ * @param[in] val Value to count the number of trailing zeros on.
+ * @return Number of trailing zeros when value is written as 32 bits.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_ctz(uint32_t val)
+{
+    #if defined(__arm__) && defined(CFG_ROM)
+    return __builtin_ctz(val);
+    #elif defined(__GNUC__)
+    if (val == 0)
+    {
+        return 32;
+    }
+    return __builtin_ctz(val);
+    #else
+    uint32_t i;
+    for (i = 0; i < 32; i++)
+    {
+        if (val & CO_BIT(i))
+            break;
+    }
+    return i;
+    #endif // defined(__arm__)
+}
+/**
+ ****************************************************************************************
+ * @brief Function to initialize the random seed.
+ * @param[in] seed The seed number to use to generate the random sequence.
+ ****************************************************************************************
+ */
+extern void co_random_init(uint32_t seed);
+
+/**
+ ****************************************************************************************
+ * @brief Function to get an 8 bit random number.
+ * @return Random byte value.
+ ****************************************************************************************
+ */
+__INLINE uint8_t co_rand_byte(void)
+{
+    return (uint8_t)(rand() & 0xFF);
+}
+
+/**
+ ****************************************************************************************
+ * @brief Function to get an 16 bit random number.
+ * @return Random half word value.
+ ****************************************************************************************
+ */
+__INLINE uint16_t co_rand_hword(void)
+{
+    return (uint16_t)(rand() & 0xFFFF);
+}
+
+/**
+ ****************************************************************************************
+ * @brief Function to get an 32 bit random number.
+ * @return Random word value.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_rand_word(void)
+{
+    return (uint32_t)rand();
+}
+
+extern uint32_t co_secure_rand_word(void);
+
+/**
+ ****************************************************************************************
+ * @brief Function to return the smallest of 2 unsigned 32 bits words.
+ * @return The smallest value.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_min(uint32_t a, uint32_t b)
+{
+    return a < b ? a : b;
+}
+
+/**
+ ****************************************************************************************
+ * @brief Function to return the smallest of 2 signed 32 bits words.
+ * @return The smallest value.
+ ****************************************************************************************
+ */
+__INLINE int32_t co_min_s(int32_t a, int32_t b)
+{
+    return a < b ? a : b;
+}
+
+/**
+ ****************************************************************************************
+ * @brief Function to return the greatest of 2 unsigned 32 bits words.
+ * @return The greatest value.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_max(uint32_t a, uint32_t b)
+{
+    return a > b ? a : b;
+}
+
+/**
+ ****************************************************************************************
+ * @brief Function to return the absolute value of a signed integer.
+ * @return The absolute value.
+ ****************************************************************************************
+ */
+__INLINE int co_abs(int val)
+{
+    return val < 0 ? val*(-1) : val;
+}
+
+/// @} CO_MATH
+
+
+#endif // _CO_MATH_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/co_utils.h b/platform/atm2/ATM22xx-x1x/include/ble/co_utils.h
new file mode 100644
index 0000000..28c7dce
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/co_utils.h
@@ -0,0 +1,689 @@
+/**
+ ****************************************************************************************
+ *
+ * @file co_utils.h
+ *
+ * @brief Common utilities definitions
+ *
+ * Copyright (C) RivieraWaves 2009-2015
+ * Copyright (C) Atmosic 2023
+ *
+ ****************************************************************************************
+ */
+#ifndef _CO_UTILS_H_
+#define _CO_UTILS_H_
+
+/**
+ ****************************************************************************************
+ * @defgroup CO_UTILS Utilities
+ * @ingroup COMMON
+ * @brief  Common utilities
+ *
+ * This module contains the common utilities functions and macros.
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+
+#include <stdint.h>       // standard definitions
+#include <stddef.h>       // standard definitions
+#include "co_bt.h"        // common bt definitions
+#include "rwip_config.h"  // SW configuration
+#include "rwip.h"         // SW configuration
+#include "compiler.h"     // for inline functions
+
+
+/*
+ * MACRO DEFINITIONS
+ ****************************************************************************************
+ */
+
+/// Common constants - bit field definitions
+#define BIT0  0x0001
+#define BIT1  0x0002
+#define BIT2  0x0004
+#define BIT3  0x0008
+#define BIT4  0x0010
+#define BIT5  0x0020
+#define BIT6  0x0040
+#define BIT7  0x0080
+#define BIT8  0x0100
+#define BIT9  0x0200
+#define BIT10 0x0400
+#define BIT11 0x0800
+#define BIT12 0x1000
+#define BIT13 0x2000
+#define BIT14 0x4000
+#define BIT15 0x8000
+
+/// Number of '1' bits in a byte
+#define NB_ONE_BITS(byte)   (one_bits[byte & 0x0F] + one_bits[byte >> 4])
+
+/// Get the number of elements within an array, give also number of rows in a 2-D array
+#define ARRAY_LEN(array)   (sizeof((array))/sizeof((array)[0]))
+
+/// Get the number of columns within a 2-D array
+#define ARRAY_NB_COLUMNS(array)  (sizeof((array[0]))/sizeof((array)[0][0]))
+
+
+/// Macro for LMP message handler function declaration or definition
+#define LMP_MSG_HANDLER(msg_name)   __STATIC int lmp_##msg_name##_handler(struct lmp_##msg_name const *param,  \
+                                                                                ke_task_id_t const dest_id)
+/// Macro for LMP message handler function declaration or definition
+#define LLCP_MSG_HANDLER(msg_name)   __STATIC int llcp_##msg_name##_handler(struct llcp_##msg_name const *param,  \
+                                                                                ke_task_id_t const dest_id)
+
+/// Macro for HCI message handler function declaration or definition (for multi-instantiated tasks)
+#define HCI_CMD_HANDLER_C(cmd_name, param_struct)   __STATIC int hci_##cmd_name##_cmd_handler(param_struct const *param,  \
+                                                                                ke_task_id_t const dest_id,  \
+                                                                                uint16_t opcode)
+
+/// Macro for HCI message handler function declaration or definition (with parameters)
+#define HCI_CMD_HANDLER(cmd_name, param_struct)   __STATIC int hci_##cmd_name##_cmd_handler(param_struct const *param,  \
+                                                                                uint16_t opcode)
+
+/// Macro for HCI message handler function declaration or definition (with parameters)
+#define HCI_CMD_HANDLER_TAB(task)   __STATIC const struct task##_hci_cmd_handler task##_hci_command_handler_tab[] =
+
+
+/// MACRO to build a subversion field from the Minor and Release fields
+#define CO_SUBVERSION_BUILD(minor, release)     (((minor) << 8) | (release))
+
+
+/// Macro to get a structure from one of its structure field
+#define CONTAINER_OF(ptr, type, member)    ((type *)( (char *)ptr - offsetof(type,member) ))
+
+
+/// Increment value and make sure it's never greater or equals max (else wrap to 0)
+#define CO_VAL_INC(_val, _max)      \
+    (_val) = (_val) + 1;            \
+    if((_val) >= (_max)) (_val) = 0
+
+/*
+ * ENUMERATIONS DEFINITIONS
+ ****************************************************************************************
+ */
+
+/// Status returned by generic packer-unpacker
+enum CO_UTIL_PACK_STATUS
+{
+    CO_UTIL_PACK_OK,
+    CO_UTIL_PACK_IN_BUF_OVFLW,
+    CO_UTIL_PACK_OUT_BUF_OVFLW,
+    CO_UTIL_PACK_WRONG_FORMAT,
+    CO_UTIL_PACK_ERROR,
+};
+
+
+/// Rate information
+/*@TRACE*/
+enum phy_rate
+{
+    /// 1 Mbits/s Rate
+    CO_RATE_1MBPS   = 0,
+    /// 2 Mbits/s Rate
+    CO_RATE_2MBPS   = 1,
+    /// 125 Kbits/s Rate
+    CO_RATE_125KBPS = 2,
+    /// 500 Kbits/s Rate
+    CO_RATE_500KBPS = 3,
+    /// Undefined rate (used for reporting when no packet is received)
+    CO_RATE_UNDEF   = 4,
+
+    CO_RATE_MAX     = 4,
+};
+
+
+/*
+ * FUNCTION DECLARATIONS
+ ****************************************************************************************
+ */
+
+/*
+ * TYPE DEFINITIONS
+ ****************************************************************************************
+ */
+
+
+/*
+ * CONSTANT DECLARATIONS
+ ****************************************************************************************
+ */
+
+/// Number of '1' bits in values from 0 to 15, used to fasten bit counting
+extern const unsigned char one_bits[16];
+
+/// Conversion table Sleep Clock Accuracy to PPM
+extern const uint16_t co_sca2ppm[];
+
+/// NULL BD address
+extern const struct bd_addr co_null_bdaddr;
+
+/// Default BD address
+extern const struct bd_addr co_default_bdaddr;
+
+/// Table for converting rate to PHY
+extern const uint8_t co_rate_to_phy[];
+
+/// Table for converting PHY to rate (Warning: the coded PHY is converted to 125K by default)
+extern const uint8_t co_phy_to_rate[];
+
+/// Convert PHY mask (with one single bit set) to a value
+extern const uint8_t co_phy_mask_to_value[];
+
+/// Convert PHY a value to the corresponding mask bit
+extern const uint8_t co_phy_value_to_mask[];
+
+/// Convert Rate value to the corresponding PHY mask bit
+extern const uint8_t co_rate_to_phy_mask[];
+
+/// Convert Rate value to byte duration in us
+extern const uint8_t co_rate_to_byte_dur_us[];
+
+/*
+ * OPERATIONS ON BT CLOCK
+ ****************************************************************************************
+ */
+
+/**
+ ****************************************************************************************
+ * @brief Clocks addition with 2 operands
+ *
+ * @param[in]   clock_a   1st operand value (in BT half-slots)
+ * @param[in]   clock_b   2nd operand value (in BT half-slots)
+ * @return      result    operation result (in BT half-slots)
+ ****************************************************************************************
+ */
+#define CLK_ADD_2(clock_a, clock_b)     ((uint32_t)(((clock_a) + (clock_b)) & RWIP_MAX_CLOCK_TIME))
+
+/**
+ ****************************************************************************************
+ * @brief Clocks addition with 3 operands
+ *
+ * @param[in]   clock_a   1st operand value (in BT half-slots)
+ * @param[in]   clock_b   2nd operand value (in BT half-slots)
+ * @param[in]   clock_c   3rd operand value (in BT half-slots)
+ * @return      result    operation result (in BT half-slots)
+ ****************************************************************************************
+ */
+#define CLK_ADD_3(clock_a, clock_b, clock_c)     ((uint32_t)(((clock_a) + (clock_b) + (clock_c)) & RWIP_MAX_CLOCK_TIME))
+
+/**
+ ****************************************************************************************
+ * @brief Clocks subtraction
+ *
+ * @param[in]   clock_a   1st operand value (in BT half-slots)
+ * @param[in]   clock_b   2nd operand value (in BT half-slots)
+ * @return      result    operation result (in BT half-slots)
+ ****************************************************************************************
+ */
+#define CLK_SUB(clock_a, clock_b)     ((uint32_t)(((clock_a) - (clock_b)) & RWIP_MAX_CLOCK_TIME))
+
+/**
+ ****************************************************************************************
+ * @brief Clocks time difference
+ *
+ * @param[in]   clock_a   1st operand value (in BT half-slots)
+ * @param[in]   clock_b   2nd operand value (in BT half-slots)
+ * @return      result    return the time difference from clock A to clock B
+ *                           - result < 0  => clock_b is in the past
+ *                           - result == 0 => clock_a is equal to clock_b
+ *                           - result > 0  => clock_b is in the future
+ ****************************************************************************************
+ */
+#define CLK_DIFF(clock_a, clock_b)     ( (CLK_SUB((clock_b), (clock_a)) > ((RWIP_MAX_CLOCK_TIME+1) >> 1)) ?                      \
+                          ((int32_t)((-CLK_SUB((clock_a), (clock_b))))) : ((int32_t)((CLK_SUB((clock_b), (clock_a))))) )
+
+
+
+/// macro to extract a field from a value containing several fields
+/// @param[in] __r bit field value
+/// @param[in] __f field name
+/// @return the value of the register masked and shifted
+#define GETF(__r, __f)                                                           \
+    (( (__r) & (__f##_MASK) ) >> (__f##_LSB))
+
+/// macro to set a field value into a value  containing several fields.
+/// @param[in] __r bit field value
+/// @param[in] __f field name
+/// @param[in] __v value to put in field
+#define SETF(__r, __f, __v)                                                      \
+    do {                                                                         \
+        ASSERT_INFO( ( ( ( (__v) << (__f##_LSB) ) & ( ~(__f##_MASK) ) ) ) == 0 ,(__f##_MASK), (__v)); \
+        __r = (((__r) & ~(__f##_MASK)) | (__v) << (__f##_LSB));                  \
+    } while (0)
+
+
+
+/// macro to extract a bit field from a value containing several fields
+/// @param[in] __r bit field value
+/// @param[in] __b bit field name
+/// @return the value of the register masked and shifted
+#define GETB(__r, __b)                                                           \
+    (( (__r) & (__b##_BIT) ) >> (__b##_POS))
+
+/// macro to set a bit field value into a value containing several fields.
+/// @param[in] __r bit field value
+/// @param[in] __b bit field name
+/// @param[in] __v value to put in field
+#define SETB(__r, __b, __v)                                                      \
+    do {                                                                         \
+        ASSERT_ERR( ( ( ( (__v) << (__b##_POS) ) & ( ~(__b##_BIT) ) ) ) == 0 ); \
+        __r = (((__r) & ~(__b##_BIT)) | (__v) << (__b##_POS));                  \
+    } while (0)
+
+/// macro to toggle a bit into a value containing several bits.
+/// @param[in] __r bit field value
+/// @param[in] __b bit field name
+#define TOGB(__r, __b)                                                           \
+    do {                                                                         \
+        __r = ((__r) ^ (__b##_BIT));                                             \
+    } while (0)
+
+/**
+ ****************************************************************************************
+ * @brief Check if clock_a is equal to clock_b
+ *
+ * @param[in]   clock_a   Clock A value (in BT half-slots)
+ * @param[in]   clock_b   Clock B value (in BT half-slots)
+ * @return      result    True: clock_a lower than or equal to clock_b | False: else
+ ****************************************************************************************
+ */
+#define CLK_EQ(clock_a, clock_b)      (clock_b == clock_a)
+
+/**
+ ****************************************************************************************
+ * @brief Check if clock_a is lower than or equal to clock_b
+ *
+ * @param[in]   clock_a   Clock A value (in BT half-slots)
+ * @param[in]   clock_b   Clock B value (in BT half-slots)
+ * @return      result    True: clock_a lower than or equal to clock_b | False: else
+ ****************************************************************************************
+ */
+#define CLK_LOWER_EQ(clock_a, clock_b)      (CLK_SUB(clock_b, clock_a) < (RWIP_MAX_CLOCK_TIME >> 1))
+
+/**
+ ****************************************************************************************
+ * @brief Check if clock A is lower than or equal to clock B (with half-us precision)
+ *
+ * @param[in]   int_a     Integer part of clock A (in BT half-slots)
+ * @param[in]   fract_a   Fractional part of clock A (in half-us) (range: 0 to 624)
+ * @param[in]   int_b     Integer part of clock B (in BT half-slots)
+ * @param[in]   fract_b   Fractional part of clock B (in half-us) (range: 0 to 624)
+ * @return      result    True: clock A lower than or equal to clock B | False: else
+ ****************************************************************************************
+ */
+#define CLK_LOWER_EQ_HUS(int_a, fract_a, int_b, fract_b)      (  CLK_GREATER_THAN(int_b, int_a)  \
+                                                                 || (   CLK_EQ(int_a, int_b)     \
+                                                                     && (fract_a <= fract_b) ) ) \
+
+/**
+ ****************************************************************************************
+ * @brief Check if clock_a is greater than clock_b
+ *
+ * @param[in]   clock_a   Clock A value (in BT half-slots)
+ * @param[in]   clock_b   Clock B value (in BT half-slots)
+ * @return      result    True: clock_a is greater than clock_b | False: else
+ ****************************************************************************************
+ */
+#define CLK_GREATER_THAN(clock_a, clock_b)    !(CLK_LOWER_EQ(clock_a, clock_b))
+
+/**
+ ****************************************************************************************
+ * @brief Check if clock A is greater than clock B (with half-us precision)
+ *
+ * @param[in]   int_a     Integer part of clock A (in BT half-slots)
+ * @param[in]   fract_a   Fractional part of clock A (in half-us) (range: 0 to 624)
+ * @param[in]   int_b     Integer part of clock B (in BT half-slots)
+ * @param[in]   fract_b   Fractional part of clock B (in half-us) (range: 0 to 624)
+ * @return      result    True: clock A greater than clock B | False: else
+ ****************************************************************************************
+ */
+#define CLK_GREATER_THAN_HUS(int_a, fract_a, int_b, fract_b)      (  CLK_GREATER_THAN(int_a, int_b)  \
+                                                                     || (   CLK_EQ(int_a, int_b)     \
+                                                                         && (fract_a > fract_b) ) )  \
+
+#if (BLE_EMB_PRESENT)
+/**
+ ******************************************************************************
+ * @brief Compare 2 BLE instants (connection event counter)
+ * @param[in]   instant_a   1st operand value (connection event counter)
+ * @param[in]   instant_b   2nd operand value (connection event counter)
+ * @return      result      True: B is greater or equal to A | False: B is smaller than A
+ ******************************************************************************
+ */
+#define CO_BLE_INSTANT_PASSED(instant_a, instant_b)    ((uint16_t)(instant_b - instant_a) < 32767)
+
+/**
+ ******************************************************************************
+ * @brief Compute difference between two event counter
+ * @param[in]   evt_cnt_a   1st operand value (connection event counter)
+ * @param[in]   evt_cnt_b   2nd operand value (connection event counter)
+ * @return      result    return the time difference from evt_cnt_a to evt_cnt_b
+ *                           - result < 0  => evt_cnt_b is in the past
+ *                           - result == 0 => evt_cnt_a is equal to evt_cnt_b
+ *                           - result > 0  => evt_cnt_b is in the future
+ ******************************************************************************
+ */
+#define CO_BLE_EVT_CNT_DIFF(evt_cnt_a, evt_cnt_b)    ((((uint16_t) (evt_cnt_b)) - ((uint16_t) (evt_cnt_a)) > 32768) \
+                                                   ? ((int16_t)(-(((uint16_t) (evt_cnt_a)) - ((uint16_t) (evt_cnt_b))))) \
+                                                   : ((int16_t)(-(((uint16_t) (evt_cnt_b)) - ((uint16_t) (evt_cnt_a))))))
+
+#endif //BLE_EMB_PRESENT
+
+/*
+ * FUNCTION DECLARATIONS
+ ****************************************************************************************
+ */
+
+/**
+ ****************************************************************************************
+ * @brief Read an aligned 32 bit word.
+ * @param[in] ptr32 The address of the first byte of the 32 bit word.
+ * @return The 32 bit value.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_read32(void const *ptr32)
+{
+    return *((uint32_t const *)ptr32);
+}
+
+/**
+ ****************************************************************************************
+ * @brief Read an aligned 16 bits word.
+ * @param[in] ptr16 The address of the first byte of the 16 bits word.
+ * @return The 16 bits value.
+ ****************************************************************************************
+ */
+__INLINE uint16_t co_read16(void const *ptr16)
+{
+    return *((uint16_t const *)ptr16);
+}
+
+/**
+ ****************************************************************************************
+ * @brief Write an aligned 32 bits word.
+ * @param[in] ptr32 The address of the first byte of the 32 bits word.
+ * @param[in] value The value to write.
+ ****************************************************************************************
+ */
+__INLINE void co_write32(void *ptr32, uint32_t value)
+{
+    *(uint32_t*)ptr32 = value;
+}
+
+/**
+ ****************************************************************************************
+ * @brief Write an aligned 16 bits word.
+ * @param[in] ptr16 The address of the first byte of the 16 bits word.
+ * @param[in] value The value to write.
+ ****************************************************************************************
+ */
+__INLINE void co_write16(void *ptr16, uint32_t value)
+{
+    *(uint16_t*)ptr16 = value;
+}
+
+/**
+ ****************************************************************************************
+ * @brief Write a 8 bits word.
+ * @param[in] ptr8 The address of the first byte of the 8 bits word.
+ * @param[in] value The value to write.
+ ****************************************************************************************
+ */
+__INLINE void co_write8(void *ptr8, uint32_t value)
+{
+    *(uint8_t*)ptr8 = value;
+}
+
+/**
+ ****************************************************************************************
+ * @brief Read a packed 16 bits word.
+ * @param[in] ptr16 The address of the first byte of the 16 bits word.
+ * @return The 16 bits value.
+ ****************************************************************************************
+ */
+__INLINE uint16_t co_read16p(void const *ptr16)
+{
+    uint16_t value = ((uint8_t const *)ptr16)[0] | ((uint8_t const *)ptr16)[1] << 8;
+    return value;
+}
+
+/**
+ ****************************************************************************************
+ * @brief Read a packed 24 bits word.
+ * @param[in] ptr24 The address of the first byte of the 24 bits word.
+ * @return The 24 bits value.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_read24p(void const *ptr24)
+{
+    uint16_t addr_l, addr_h;
+    addr_l = co_read16p(ptr24);
+    addr_h = *((uint8_t const *)ptr24 + 2) & 0x00FF;
+    return ((uint32_t)addr_l | (uint32_t)addr_h << 16);
+}
+
+/**
+ ****************************************************************************************
+ * @brief Write a packed 24 bits word.
+ * @param[in] ptr24 The address of the first byte of the 24 bits word.
+ * @param[in] value The value to write.
+ ****************************************************************************************
+ */
+__INLINE void co_write24p(void *ptr24, uint32_t value)
+{
+    uint8_t *ptr=(uint8_t*)ptr24;
+
+    *ptr++ = (uint8_t)(value&0xff);
+    *ptr++ = (uint8_t)((value&0xff00)>>8);
+    *ptr++ = (uint8_t)((value&0xff0000)>>16);
+}
+
+/**
+ ****************************************************************************************
+ * @brief Read a packed 32 bits word.
+ * @param[in] ptr32 The address of the first byte of the 32 bits word.
+ * @return The 32 bits value.
+ ****************************************************************************************
+ */
+__INLINE uint32_t co_read32p(void const *ptr32)
+{
+    uint16_t addr_l, addr_h;
+    addr_l = co_read16p(ptr32);
+    addr_h = co_read16p((uint8_t const *)ptr32 + 2);
+    return ((uint32_t)addr_l | (uint32_t)addr_h << 16);
+}
+/**
+ ****************************************************************************************
+ * @brief Write a packed 32 bits word.
+ * @param[in] ptr32 The address of the first byte of the 32 bits word.
+ * @param[in] value The value to write.
+ ****************************************************************************************
+ */
+__INLINE void co_write32p(void *ptr32, uint32_t value)
+{
+    uint8_t *ptr=(uint8_t*)ptr32;
+
+    *ptr++ = (uint8_t)(value&0xff);
+    *ptr++ = (uint8_t)((value&0xff00)>>8);
+    *ptr++ = (uint8_t)((value&0xff0000)>>16);
+    *ptr = (uint8_t)((value&0xff000000)>>24);
+}
+
+/**
+ ****************************************************************************************
+ * @brief Write a packed 16 bits word.
+ * @param[in] ptr16 The address of the first byte of the 16 bits word.
+ * @param[in] value The value to write.
+ ****************************************************************************************
+ */
+__INLINE void co_write16p(void *ptr16, uint16_t value)
+{
+    uint8_t *ptr=(uint8_t*)ptr16;
+
+    *ptr++ = value&0xff;
+    *ptr = (value&0xff00)>>8;
+}
+
+#if (RW_DEBUG || DISPLAY_SUPPORT)
+
+/**
+ ****************************************************************************************
+ * @brief Convert bytes to hexadecimal string
+ *
+ * @param[out] dest      Pointer to the destination string (must be 2x longer than input table)
+ * @param[in]  src       Pointer to the bytes table
+ * @param[in]  nb_bytes  Number of bytes to display in the string
+ ****************************************************************************************
+ */
+void co_bytes_to_string(char* dest, uint8_t* src, uint8_t nb_bytes);
+#endif //(RW_DEBUG || DISPLAY_SUPPORT)
+
+/**
+ ****************************************************************************************
+ * @brief Compares two Bluetooth device addresses
+ *
+ * This function checks if the two bd address are equal.
+ *
+ * @param[in] bd_address1        Pointer on the first bd address to be compared.
+ * @param[in] bd_address2        Pointer on the second bd address to be compared.
+ *
+ * @return result of the comparison (true: equal | false: different).
+ ****************************************************************************************
+ */
+bool co_bdaddr_compare(struct bd_addr const *bd_address1, struct bd_addr const *bd_address2);
+
+#if (BLE_EMB_PRESENT)
+/**
+ ******************************************************************************
+ * @brief Count the number of good channels in a LE map
+ * @param[in]  map  Channel Map (bit fields for the 40 BT RF channels)
+ * @return  Number of good channels
+ ******************************************************************************
+ */
+uint8_t co_nb_good_le_channels(const struct le_chnl_map* map);
+#endif //BLE_EMB_PRESENT
+
+#if (BT_EMB_PRESENT)
+
+/**
+ ******************************************************************************
+ * @brief Convert a duration in baseband slot to a duration in number of ticks.
+ * @param[in]  slot_cnt  Duration in number of baseband slot
+ * @return  Duration (in number of ticks).
+ ******************************************************************************
+ */
+uint32_t co_slot_to_duration(uint32_t slot_cnt);
+
+/**
+ ******************************************************************************
+ * @brief Count the number of good channels in a map
+ * @param[in]  map  Channel Map (bit fields for the 79 BT RF channels)
+ * @return  Number of good channels
+ ******************************************************************************
+ */
+uint8_t co_nb_good_channels(const struct chnl_map* map);
+
+#endif //BT_EMB_PRESENT
+
+/**
+ ****************************************************************************************
+ * @brief Pack parameters from a C structure to a packed buffer
+ *
+ * This function packs parameters according to a specific format. It takes care of the
+ * endianess, padding, required by the compiler.
+ *
+ * By default output format is LSB but it can be changed with first character of format string
+ *     - <  : LSB output format
+ *     - >  : MSB output format
+ *
+ * Format strings are the mechanism used to specify the expected layout when packing and unpacking data. They are built
+ * up from Format Characters, which specify the type of data being packed/unpacked.
+ *     - B  : byte - 8bits value
+ *     - H  : word - 16bits value
+ *     - L  : long - 32-bits value
+ *     - D  : 24 bits value
+ *     - XXB: table of several bytes, where XX is the byte number, in decimal
+ *     - XXG: Number of several bytes, where XX is the byte number, in decimal - subject to be swapped according to endianess
+ *     - nB : table size over 1 byte, followed by the table of bytes
+ *     - NB : table size over 2 bytes, followed by the table of bytes
+ *
+ * Example:   "BBLH12BLnB" => 1 byte | 1 byte | 1 long | 1 short | 12-bytes table | 1 long | table size over 1 byte | n-bytes table
+ *
+ * Note: the function works in the same buffer
+ *
+ * @param[out]     out         Output Data Buffer
+ * @param[in]      in          Input Data Buffer
+ * @param[out]     out_len     Output size of packed data (in bytes)
+ * @param[in]      in_len      Input buffer size (in bytes)
+ * @param[in]      format      Parameters format
+ *
+ * @return  Status of the packing operation
+ *****************************************************************************************
+ */
+uint8_t co_util_pack(uint8_t* out, uint8_t* in, uint16_t* out_len, uint16_t in_len, const char* format);
+
+/**
+ ****************************************************************************************
+ * @brief Unpack parameters from an unpacked buffer to a C structure
+ *
+ * This function unpacks parameters according to a specific format. It takes care of the
+ * endianess, padding, required by the compiler.
+ *
+ * By default input format is LSB but it can be changed with first character of format string
+ *     - <  : LSB input format
+ *     - >  : MSB input format
+ *
+ * Format strings are the mechanism used to specify the expected layout when packing and unpacking data. They are built
+ * up from Format Characters, which specify the type of data being packed/unpacked.
+ *     - B  : byte - 8bits value
+ *     - H  : word - 16bits value
+ *     - L  : long - 32-bits value
+ *     - D  : 24 bits value
+ *     - XXB: table of several bytes, where XX is the byte number, in decimal
+ *     - XXG: Number of several bytes, where XX is the byte number, in decimal - subject to be swapped according to endianess
+ *     - nB : table size over 1 byte, followed by the table of bytes
+ *     - NB : table size over 2 bytes, followed by the table of bytes
+ *
+ * Example:   "BBLH12BLnB" => 1 byte | 1 byte | 1 long | 1 short | 12-bytes table | 1 long | table size over 1 byte | n-bytes table
+ *
+ * Note: the output buffer provided must be large enough to contain the unpacked data.
+ * Note2: if a NULL output buffer is provided, the function does not copy the unpacked parameters. It still parses the
+ *  format string and input buffer to return the number of unpacked bytes. Can be used to compute the expected unpacked
+ *  buffer size.
+ *
+ * @param[out]    out         Unpacked parameters buffer
+ * @param[in]     in          Packed parameters buffer
+ * @param[inout]  out_len     Input: buffer size / Output: size of unpacked data (in bytes)
+ * @param[in]     in_len      Size of the packed data (in bytes)
+ * @param[in]     format      Parameters format
+ *
+ * @return  Status of the unpacking operation
+ *****************************************************************************************
+ */
+uint8_t co_util_unpack(uint8_t* out, uint8_t* in, uint16_t* out_len, uint16_t in_len, const char* format);
+
+
+#if (BLE_EMB_PRESENT)
+
+/**
+ *****************************************************************************************
+ * @brief Get BLE packet duration in us according to PHY and packet size
+ *
+ * @param[in] len PDU size in octets
+ * @param[in] rate PHY Rate (@see enum lld_phy)
+ *
+ * @return packet duration in us.
+ *****************************************************************************************
+ */
+uint16_t co_ble_pkt_dur_in_us(uint8_t len, uint8_t rate);
+#endif // (BLE_EMB_PRESENT)
+/// @} CO_UTILS
+
+#endif // _CO_UTILS_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/gap.h b/platform/atm2/ATM22xx-x1x/include/ble/gap.h
new file mode 100644
index 0000000..1cc01f7
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/gap.h
@@ -0,0 +1,664 @@
+/**
+ ****************************************************************************************
+ *
+ * @file gap.h
+ *
+ * @brief Header file - GAP.
+ *
+ * Copyright (C) RivieraWaves 2009-2016
+ *
+ *
+ ****************************************************************************************
+ */
+#ifndef GAP_H_
+#define GAP_H_
+/**
+ ****************************************************************************************
+ * @addtogroup HOST
+ * @ingroup ROOT
+ * @brief Bluetooth Low Energy Host
+ *
+ * The HOST layer of the stack contains the higher layer protocols (@ref ATT "ATT",
+ * @ref SMP "SMP") and transport module (@ref L2C "L2C"). It also includes the Generic
+ * Access Profile (@ref GAP "GAP"), used for scanning/connection operations.
+ ****************************************************************************************
+ */
+/**
+ ****************************************************************************************
+ * @addtogroup GAP Generic Access Profile
+ * @ingroup HOST
+ * @brief Generic Access Profile.
+ *
+ * The GAP module is responsible for providing an API to the application in order to
+ * configure the device in the desired mode (discoverable, connectable, etc.) and perform
+ * required actions (scanning, connection, pairing, etc.). To achieve this, the GAP
+ * interfaces with both the @ref SMP "SMP", @ref L2C "L2C" and the @ref CONTROLLER "CONTROLLER"
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+#include <stdint.h>
+#include "compiler.h"
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+/// BD address length
+#define GAP_BD_ADDR_LEN       (6)
+/// LE Channel map length
+#define GAP_LE_CHNL_MAP_LEN   (0x05)
+/// LE Feature Flags Length
+#define GAP_LE_FEATS_LEN      (0x08)
+/// ADV Data and Scan Response length
+#define GAP_ADV_DATA_LEN      (0x1F)
+#define GAP_SCAN_RSP_DATA_LEN (0x1F)
+/// Random number length
+#define GAP_RAND_NB_LEN       (0x08)
+/// Key length
+#define GAP_KEY_LEN           (16)
+/// P256 Key Len
+#define GAP_P256_KEY_LEN      (0x20)
+
+
+///***** AD Type Flag - Bit set *******/
+/// Limited discovery flag - AD Flag
+#define GAP_LE_LIM_DISCOVERABLE_FLG             0x01
+/// General discovery flag - AD Flag
+#define GAP_LE_GEN_DISCOVERABLE_FLG             0x02
+/// Legacy BT not supported - AD Flag
+#define GAP_BR_EDR_NOT_SUPPORTED                0x04
+/// Dual mode for controller supported (BR/EDR/LE) - AD Flag
+#define GAP_SIMUL_BR_EDR_LE_CONTROLLER          0x08
+/// Dual mode for host supported (BR/EDR/LE) - AD Flag
+#define GAP_SIMUL_BR_EDR_LE_HOST                0x10
+
+/*********** GAP Miscellaneous Defines *************/
+/// Invalid connection index
+#define GAP_INVALID_CONIDX                      0xFF
+
+/// Invalid connection handle
+#define GAP_INVALID_CONHDL                      0xFFFF
+
+/// Connection interval min (N*1.250ms)
+#define GAP_CNX_INTERVAL_MIN            6       //(0x06)
+/// Connection interval Max (N*1.250ms)
+#define GAP_CNX_INTERVAL_MAX            3200    //(0xC80)
+/// Connection latency min (N*cnx evt)
+#define GAP_CNX_LATENCY_MIN             0       //(0x00)
+/// Connection latency Max (N*cnx evt
+#define GAP_CNX_LATENCY_MAX             499     //(0x1F3)
+/// Supervision TO min (N*10ms)
+#define GAP_CNX_SUP_TO_MIN              10      //(0x0A)
+/// Supervision TO Max (N*10ms)
+#define GAP_CNX_SUP_TO_MAX              3200    //(0xC80)
+
+
+
+/// Length of resolvable random address prand part
+#define GAP_ADDR_PRAND_LEN            (3)
+/// Length of resolvable random address hash part
+#define GAP_ADDR_HASH_LEN             (3)
+
+/// Number of bytes needed for a bit field indicated presence of a given Advertising Flag value
+/// in the Advertising or the Scan Response data
+/// Advertising Flags is a 8-bit value, hence 256 value are possible
+/// -> 256 / 8 bytes = 32 bytes are needed
+#define GAP_AD_TYPE_BITFIELD_BYTES                          (32)
+
+/*
+ * DEFINES - Optional for BLE application usage
+ ****************************************************************************************
+ */
+
+/// Central idle timer
+/// TGAP(conn_pause_central)
+/// recommended value: 1 s: (100 for ke timer)
+#define GAP_TMR_CONN_PAUSE_CT                               0x0064
+
+/// Minimum time upon connection establishment before the peripheral
+/// starts a connection update procedure: TGAP(conn_pause_peripheral)
+/// recommended value: 5 s: (500 for ke timer)
+#define GAP_TMR_CONN_PAUSE_PH                               0x01F4
+
+/// Minimum time to perform scanning when user initiated
+/// TGAP(scan_fast_period)
+/// recommended value: 30.72 s: (3072 for ke timer)
+#define GAP_TMR_SCAN_FAST_PERIOD                            0x0C00
+
+/// Minimum time to perform advertising when user initiated
+/// TGAP(adv_fast_period)
+/// recommended value: 30 s: (3000 for ke timer)
+#define GAP_TMR_ADV_FAST_PERIOD                             0x0BB8
+
+/// Scan interval used during Link Layer Scanning State when
+/// performing the Limited Discovery procedure
+/// TGAP(lim_disc_scan_int)
+/// recommended value: 11.25ms; (18 decimal)
+#define GAP_LIM_DISC_SCAN_INT                               0x0012
+
+/// Scan interval in any discovery or connection establishment
+/// procedure when user initiated: TGAP(scan_fast_interval)
+/// recommended value: 30 to 60 ms; N * 0.625
+#define GAP_SCAN_FAST_INTV                                  0x0030
+
+/// Scan window in any discovery or connection establishment
+/// procedure when user initiated: TGAP(scan_fast_window)
+/// recommended value: 30 ms; N * 0.625
+#define GAP_SCAN_FAST_WIND                                  0x0030
+
+/// Scan interval in any discovery or connection establishment
+/// procedure when background scanning: TGAP(scan_slow_interval1)
+/// recommended value: 1.28 s : 0x00CD (205); N * 0.625
+#define GAP_SCAN_SLOW_INTV1                                 0x00CD
+
+/// Scan interval in any discovery or connection establishment
+/// procedure when background scanning: TGAP(scan_slow_interval2)
+/// recommended value: 2.56 s : 0x019A (410); N * 0.625
+#define GAP_SCAN_SLOW_INTV2                                 0x019A
+
+/// Scan window in any discovery or connection establishment
+/// procedure when background scanning: TGAP(scan_slow_window1)
+/// recommended value: 11.25 ms : 0x0012 (18); N * 0.625
+#define GAP_SCAN_SLOW_WIND1                                 0x0012
+
+/// Scan window in any discovery or connection establishment
+/// procedure when background scanning: TGAP(scan_slow_window2)
+/// recommended value: 22.5 ms : 0x0024 (36); N * 0.625
+#define GAP_SCAN_SLOW_WIND2                                 0x0024
+
+/// Minimum to maximum advertisement interval in any discoverable
+/// or connectable mode when user initiated: TGAP(adv_fast_interval1)
+/// recommended value: 30 to 60 ms; N * 0.625
+#define GAP_ADV_FAST_INTV1                                  0x0030
+
+/// Minimum to maximum advertisement interval in any discoverable
+/// or connectable mode when user initiated: TGAP(adv_fast_interval2)
+/// recommended value: 100 to 150 ms; N * 0.625
+#define GAP_ADV_FAST_INTV2                                  0x0064
+
+/// Minimum to maximum advertisement interval in any discoverable or
+/// connectable mode when background advertising: TGAP(adv_slow_interval)
+/// recommended value: 1 to 1.2 s : 0x00B0 (176); N * 0.625
+#define GAP_ADV_SLOW_INTV                                   0x00B0
+
+/// Minimum to maximum connection interval upon any connection
+/// establishment: TGAP(initial_conn_interval)
+/// recommended value: 30 to 50 ms ; N * 1.25 ms
+#define GAP_INIT_CONN_MIN_INTV                              0x0018
+#define GAP_INIT_CONN_MAX_INTV                              0x0028
+
+/// RW Defines
+#define GAP_INQ_SCAN_INTV                                   0x0012
+#define GAP_INQ_SCAN_WIND                                   0x0012
+
+/// Connection supervision timeout
+/// recommended value: 20s
+#define GAP_CONN_SUPERV_TIMEOUT                             0x07D0
+
+/// Minimum connection event
+/// default value: 0x0000
+#define GAP_CONN_MIN_CE                                     0x0000
+
+/// Maximum connection event
+/// default value: 0xFFFF
+#define GAP_CONN_MAX_CE                                     0xFFFF
+
+/// Connection latency
+/// default value: 0x0000
+#define GAP_CONN_LATENCY                                    0x0000
+
+/// GAP Device name Characteristic
+/// Default device name
+#define GAP_DEV_NAME                                        "RIVIERAWAVES-BLE"
+
+/// GAP Appearance or Icon Characteristic - 2 octets
+/// Current appearance value is 0x0000 (unknown appearance)
+/// Description:
+/// http://developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml
+#define GAP_APPEARANCE                                      0x0000
+
+///GAP Peripheral Preferred Connection Parameter - 8 octets
+#define GAP_PPCP_CONN_INTV_MAX                              0x0064
+#define GAP_PPCP_CONN_INTV_MIN                              0x00C8
+#define GAP_PPCP_SLAVE_LATENCY                              0x0000
+#define GAP_PPCP_STO_MULT                                   0x07D0
+
+/*
+ * Macros
+ ****************************************************************************************
+ */
+
+#define GAP_AD_TYPE_SET_BIT(bitfield, adv_flag)                             \
+                bitfield[adv_flag / 8] |= CO_BIT(adv_flag % 8)
+
+#define GAP_AD_TYPE_CHECK_BIT(bitfield, adv_flag)                           \
+                (bitfield[adv_flag / 8] & CO_BIT(adv_flag % 8))
+
+/*
+ * Enumerations
+ ****************************************************************************************
+ */
+/// GAP Advertising Flags
+enum gap_ad_type
+{
+    /// Flag
+    GAP_AD_TYPE_FLAGS                      = 0x01,//!< GAP_AD_TYPE_FLAGS
+    /// Use of more than 16 bits UUID
+    GAP_AD_TYPE_MORE_16_BIT_UUID           = 0x02,//!< GAP_AD_TYPE_MORE_16_BIT_UUID
+    /// Complete list of 16 bit UUID
+    GAP_AD_TYPE_COMPLETE_LIST_16_BIT_UUID  = 0x03,//!< GAP_AD_TYPE_COMPLETE_LIST_16_BIT_UUID
+    /// Use of more than 32 bit UUD
+    GAP_AD_TYPE_MORE_32_BIT_UUID           = 0x04,//!< GAP_AD_TYPE_MORE_32_BIT_UUID
+    /// Complete list of 32 bit UUID
+    GAP_AD_TYPE_COMPLETE_LIST_32_BIT_UUID  = 0x05,//!< GAP_AD_TYPE_COMPLETE_LIST_32_BIT_UUID
+    /// Use of more than 128 bit UUID
+    GAP_AD_TYPE_MORE_128_BIT_UUID          = 0x06,//!< GAP_AD_TYPE_MORE_128_BIT_UUID
+    /// Complete list of 128 bit UUID
+    GAP_AD_TYPE_COMPLETE_LIST_128_BIT_UUID = 0x07,//!< GAP_AD_TYPE_COMPLETE_LIST_128_BIT_UUID
+    /// Shortened device name
+    GAP_AD_TYPE_SHORTENED_NAME             = 0x08,//!< GAP_AD_TYPE_SHORTENED_NAME
+    /// Complete device name
+    GAP_AD_TYPE_COMPLETE_NAME              = 0x09,//!< GAP_AD_TYPE_COMPLETE_NAME
+    /// Transmit power
+    GAP_AD_TYPE_TRANSMIT_POWER             = 0x0A,//!< GAP_AD_TYPE_TRANSMIT_POWER
+    /// Class of device
+    GAP_AD_TYPE_CLASS_OF_DEVICE            = 0x0D,//!< GAP_AD_TYPE_CLASS_OF_DEVICE
+    /// Simple Pairing Hash C
+    GAP_AD_TYPE_SP_HASH_C                  = 0x0E,//!< GAP_AD_TYPE_SP_HASH_C
+    /// Simple Pairing Randomizer
+    GAP_AD_TYPE_SP_RANDOMIZER_R            = 0x0F,//!< GAP_AD_TYPE_SP_RANDOMIZER_R
+    /// Temporary key value
+    GAP_AD_TYPE_TK_VALUE                   = 0x10,//!< GAP_AD_TYPE_TK_VALUE
+    /// Out of Band Flag
+    GAP_AD_TYPE_OOB_FLAGS                  = 0x11,//!< GAP_AD_TYPE_OOB_FLAGS
+    /// Slave connection interval range
+    GAP_AD_TYPE_SLAVE_CONN_INT_RANGE       = 0x12,//!< GAP_AD_TYPE_SLAVE_CONN_INT_RANGE
+    /// Require 16 bit service UUID
+    GAP_AD_TYPE_RQRD_16_BIT_SVC_UUID       = 0x14,//!< GAP_AD_TYPE_RQRD_16_BIT_SVC_UUID
+    /// Require 32 bit service UUID
+    GAP_AD_TYPE_RQRD_32_BIT_SVC_UUID       = 0x1F,//!< GAP_AD_TYPE_RQRD_32_BIT_SVC_UUID
+    /// Require 128 bit service UUID
+    GAP_AD_TYPE_RQRD_128_BIT_SVC_UUID      = 0x15,//!< GAP_AD_TYPE_RQRD_128_BIT_SVC_UUID
+    /// Service data 16-bit UUID
+    GAP_AD_TYPE_SERVICE_16_BIT_DATA        = 0x16,//!< GAP_AD_TYPE_SERVICE_16_BIT_DATA
+    /// Service data 32-bit UUID
+    GAP_AD_TYPE_SERVICE_32_BIT_DATA        = 0x20,//!< GAP_AD_TYPE_SERVICE_32_BIT_DATA
+    /// Service data 128-bit UUID
+    GAP_AD_TYPE_SERVICE_128_BIT_DATA       = 0x21,//!< GAP_AD_TYPE_SERVICE_128_BIT_DATA
+    /// Public Target Address
+    GAP_AD_TYPE_PUB_TGT_ADDR               = 0x17,//!< GAP_AD_TYPE_PUB_TGT_ADDR
+    /// Random Target Address
+    GAP_AD_TYPE_RAND_TGT_ADDR              = 0x18,//!< GAP_AD_TYPE_RAND_TGT_ADDR
+    /// Appearance
+    GAP_AD_TYPE_APPEARANCE                 = 0x19,//!< GAP_AD_TYPE_APPEARANCE
+    /// Advertising Interval
+    GAP_AD_TYPE_ADV_INTV                   = 0x1A,//!< GAP_AD_TYPE_ADV_INTV
+    /// LE Bluetooth Device Address
+    GAP_AD_TYPE_LE_BT_ADDR                 = 0x1B,//!< GAP_AD_TYPE_LE_BT_ADDR
+    /// LE Role
+    GAP_AD_TYPE_LE_ROLE                    = 0x1C,//!< GAP_AD_TYPE_LE_ROLE
+    /// Simple Pairing Hash C-256
+    GAP_AD_TYPE_SPAIR_HASH                 = 0x1D,//!< GAP_AD_TYPE_SPAIR_HASH
+    /// Simple Pairing Randomizer R-256
+    GAP_AD_TYPE_SPAIR_RAND                 = 0x1E,//!< GAP_AD_TYPE_SPAIR_RAND
+    /// 3D Information Data
+    GAP_AD_TYPE_3D_INFO                    = 0x3D,//!< GAP_AD_TYPE_3D_INFO
+
+    /// Manufacturer specific data
+    GAP_AD_TYPE_MANU_SPECIFIC_DATA         = 0xFF,//!< GAP_AD_TYPE_MANU_SPECIFIC_DATA
+};
+
+
+/// Random Address type
+enum gap_rnd_addr_type
+{
+    /// Static random address           - 11 (MSB->LSB)
+    GAP_STATIC_ADDR     = 0xC0,
+    /// Private non resolvable address  - 01 (MSB->LSB)
+    GAP_NON_RSLV_ADDR   = 0x00,
+    /// Private resolvable address      - 01 (MSB->LSB)
+    GAP_RSLV_ADDR       = 0x40,
+};
+
+/// Boolean value set
+enum
+{
+    /// Disable
+    GAP_DISABLE = 0x00,
+    /// Enable
+    GAP_ENABLE
+};
+
+
+/// GAP Attribute database handles
+/// Generic Access Profile Service
+enum
+{
+    GAP_IDX_PRIM_SVC,
+    GAP_IDX_CHAR_DEVNAME,
+    GAP_IDX_DEVNAME,
+    GAP_IDX_CHAR_ICON,
+    GAP_IDX_ICON,
+    GAP_IDX_CHAR_SLAVE_PREF_PARAM,
+    GAP_IDX_SLAVE_PREF_PARAM,
+    GAP_IDX_CHAR_CNT_ADDR_RESOL,
+    GAP_IDX_CNT_ADDR_RESOL,
+    GAP_IDX_CHAR_RSLV_PRIV_ADDR_ONLY,
+    GAP_IDX_RSLV_PRIV_ADDR_ONLY,
+    GAP_IDX_NUMBER
+};
+
+
+
+/****************** GAP Role **********************/
+enum gap_role
+{
+    /// No role set yet
+    GAP_ROLE_NONE        = 0x00,
+
+    /// Observer role
+    GAP_ROLE_OBSERVER    = 0x01,
+
+    /// Broadcaster role
+    GAP_ROLE_BROADCASTER = 0x02,
+
+    /// Master/Central role
+    GAP_ROLE_CENTRAL     = (0x04 | GAP_ROLE_OBSERVER),
+
+    /// Peripheral/Slave role
+    GAP_ROLE_PERIPHERAL  = (0x08 | GAP_ROLE_BROADCASTER),
+
+    /// Device has all role, both peripheral and central
+    GAP_ROLE_ALL         = (GAP_ROLE_CENTRAL | GAP_ROLE_PERIPHERAL),
+};
+
+/// IO Capability Values
+enum gap_io_cap
+{
+    /// Display Only
+    GAP_IO_CAP_DISPLAY_ONLY = 0x00,
+    /// Display Yes No
+    GAP_IO_CAP_DISPLAY_YES_NO,
+    /// Keyboard Only
+    GAP_IO_CAP_KB_ONLY,
+    /// No Input No Output
+    GAP_IO_CAP_NO_INPUT_NO_OUTPUT,
+    /// Keyboard Display
+    GAP_IO_CAP_KB_DISPLAY,
+    GAP_IO_CAP_LAST
+};
+
+/// TK Type
+enum gap_tk_type
+{
+    ///  TK get from out of band method
+    GAP_TK_OOB         = 0x00,
+    /// TK generated and shall be displayed by local device
+    GAP_TK_DISPLAY,
+    /// TK shall be entered by user using device keyboard
+    GAP_TK_KEY_ENTRY
+};
+
+/// OOB Data Present Flag Values
+enum gap_oob
+{
+    /// OOB Data not present
+    GAP_OOB_AUTH_DATA_NOT_PRESENT = 0x00,
+    /// OOB data present
+    GAP_OOB_AUTH_DATA_PRESENT,
+    GAP_OOB_AUTH_DATA_LAST
+};
+
+/// Authentication mask
+enum gap_auth_mask
+{
+    /// No Flag set
+    GAP_AUTH_NONE    = 0,
+    /// Bond authentication
+    GAP_AUTH_BOND    = (1 << 0),
+    /// Man In the middle protection
+    GAP_AUTH_MITM    = (1 << 2),
+    /// Secure Connection
+    GAP_AUTH_SEC_CON = (1 << 3),
+    /// Key Notification
+    GAP_AUTH_KEY_NOTIF = (1 << 4)
+};
+
+/// Security Link Level
+enum gap_lk_sec_lvl
+{
+    /// No authentication
+    GAP_LK_NO_AUTH             = 0,
+    /// Unauthenticated link
+    GAP_LK_UNAUTH,
+    /// Authenticated link
+    GAP_LK_AUTH,
+    /// Secure Connection link
+    GAP_LK_SEC_CON,
+};
+
+/// Authentication Requirements
+enum gap_auth
+{
+    /// No MITM No Bonding
+    GAP_AUTH_REQ_NO_MITM_NO_BOND  = (GAP_AUTH_NONE),
+    /// No MITM Bonding
+    GAP_AUTH_REQ_NO_MITM_BOND     = (GAP_AUTH_BOND),
+    /// MITM No Bonding
+    GAP_AUTH_REQ_MITM_NO_BOND     = (GAP_AUTH_MITM),
+    /// MITM and Bonding
+    GAP_AUTH_REQ_MITM_BOND        = (GAP_AUTH_MITM | GAP_AUTH_BOND),
+    /// SEC_CON and No Bonding
+    GAP_AUTH_REQ_SEC_CON_NO_BOND  = (GAP_AUTH_SEC_CON),
+    /// SEC_CON and Bonding
+    GAP_AUTH_REQ_SEC_CON_BOND     = (GAP_AUTH_SEC_CON | GAP_AUTH_BOND),
+
+    GAP_AUTH_REQ_LAST,
+
+    /// Mask of  authentication features without reserved flag
+    GAP_AUTH_REQ_MASK             = 0x1F,
+};
+
+/// Key Distribution Flags
+enum gap_kdist
+{
+    /// No Keys to distribute
+    GAP_KDIST_NONE = 0x00,
+    /// Encryption key in distribution
+    GAP_KDIST_ENCKEY = (1 << 0),
+    /// IRK (ID key)in distribution
+    GAP_KDIST_IDKEY  = (1 << 1),
+    /// CSRK(Signature key) in distribution
+    GAP_KDIST_SIGNKEY= (1 << 2),
+    /// LTK in distribution
+    GAP_KDIST_LINKKEY=   (1 << 3),
+
+    GAP_KDIST_LAST =   (1 << 4)
+};
+
+/// Security Defines
+enum gap_sec_req
+{
+    /// No security (no authentication and encryption)
+    GAP_NO_SEC = 0x00,
+    /// Unauthenticated pairing with encryption
+    GAP_SEC1_NOAUTH_PAIR_ENC,
+    /// Authenticated pairing with encryption
+    GAP_SEC1_AUTH_PAIR_ENC,
+    /// Unauthenticated pairing with data signing
+    GAP_SEC2_NOAUTH_DATA_SGN,
+    /// Authentication pairing with data signing
+    GAP_SEC2_AUTH_DATA_SGN,
+    /// Secure Connection pairing with encryption
+    GAP_SEC1_SEC_CON_PAIR_ENC,
+};
+
+/// Bit field use to select the preferred TX or RX LE PHY. 0 means no preferences
+enum gap_phy
+{
+    /// No preferred PHY
+    GAP_PHY_ANY               = 0x00,
+    /// LE 1M PHY preferred for an active link
+    GAP_PHY_LE_1MBPS          = (1 << 0),
+    /// LE 2M PHY preferred for an active link
+    GAP_PHY_LE_2MBPS          = (1 << 1),
+    /// LE Coded PHY preferred for an active link
+    GAP_PHY_LE_CODED          = (1 << 2),
+};
+
+/// Enumeration of TX/RX PHY used for Test Mode
+enum gap_test_phy
+{
+    /// LE 1M PHY (TX or RX)
+    GAP_TEST_PHY_1MBPS        = 1,
+    /// LE 2M PHY (TX or RX)
+    GAP_TEST_PHY_2MBPS        = 2,
+    /// LE Coded PHY (RX Only)
+    GAP_TEST_PHY_CODED        = 3,
+    /// LE Coded PHY with S=8 data coding (TX Only)
+    GAP_TEST_PHY_125KBPS      = 3,
+    /// LE Coded PHY with S=2 data coding (TX Only)
+    GAP_TEST_PHY_500KBPS      = 4,
+};
+
+/// Enumeration of TX/RX PHY values
+enum gap_phy_val
+{
+    /// LE 1M PHY (TX or RX)
+    GAP_PHY_1MBPS        = 1,
+    /// LE 2M PHY (TX or RX)
+    GAP_PHY_2MBPS        = 2,
+    /// LE Coded PHY (RX Only)
+    GAP_PHY_CODED        = 3,
+    /// LE Coded PHY with S=8 data coding (TX Only)
+    GAP_PHY_125KBPS      = 3,
+    /// LE Coded PHY with S=2 data coding (TX Only)
+    GAP_PHY_500KBPS      = 4,
+};
+
+/// Modulation index
+enum gap_modulation_idx
+{
+    /// Assume transmitter will have a standard modulation index
+    GAP_MODULATION_STANDARD,
+    /// Assume transmitter will have a stable modulation index
+    GAP_MODULATION_STABLE,
+};
+
+/// Packet Payload type for test mode
+enum gap_pkt_pld_type
+{
+    /// PRBS9 sequence "11111111100000111101..." (in transmission order)
+    GAP_PKT_PLD_PRBS9,
+    /// Repeated "11110000" (in transmission order)
+    GAP_PKT_PLD_REPEATED_11110000,
+    /// Repeated "10101010" (in transmission order)
+    GAP_PKT_PLD_REPEATED_10101010,
+    /// PRBS15 sequence
+    GAP_PKT_PLD_PRBS15,
+    /// Repeated "11111111" (in transmission order) sequence
+    GAP_PKT_PLD_REPEATED_11111111,
+    /// Repeated "00000000" (in transmission order) sequence
+    GAP_PKT_PLD_REPEATED_00000000,
+    /// Repeated "00001111" (in transmission order) sequence
+    GAP_PKT_PLD_REPEATED_00001111,
+    /// Repeated "01010101" (in transmission order) sequence
+    GAP_PKT_PLD_REPEATED_01010101,
+};
+/*************** GAP Structures ********************/
+
+/// Device name
+/*@TRACE*/
+struct gap_dev_name
+{
+    /// name length
+    uint16_t length;
+    /// name value
+    uint8_t value[__ARRAY_EMPTY];
+};
+
+/// Slave preferred connection parameters
+/*@TRACE*/
+struct gap_slv_pref
+{
+    /// Connection interval minimum
+    uint16_t con_intv_min;
+    /// Connection interval maximum
+    uint16_t con_intv_max;
+    /// Slave latency
+    uint16_t slave_latency;
+    /// Connection supervision timeout multiplier
+    uint16_t conn_timeout;
+};
+
+///BD Address structure
+/*@TRACE*/
+typedef struct
+{
+    ///6-byte array address value
+    uint8_t  addr[GAP_BD_ADDR_LEN];
+} bd_addr_t;
+
+///Channel map structure
+/*@TRACE*/
+typedef struct
+{
+    ///5-byte channel map array
+    uint8_t map[GAP_LE_CHNL_MAP_LEN];
+} le_chnl_map_t;
+
+
+///Random number structure
+/*@TRACE*/
+typedef struct
+{
+    ///8-byte array for random number
+    uint8_t     nb[GAP_RAND_NB_LEN];
+} rand_nb_t;
+
+/// P256 Public key data format
+typedef struct
+{
+    /// X Coordinate of the key
+    uint8_t x[GAP_P256_KEY_LEN];
+    /// X Coordinate of the key
+    uint8_t y[GAP_P256_KEY_LEN];
+} public_key_t;
+
+/// Address information about a device address
+/*@TRACE*/
+struct gap_bdaddr
+{
+    /// BD Address of device
+    bd_addr_t addr;
+    /// Address type of the device 0=public/1=private random
+    uint8_t addr_type;
+};
+
+/// Resolving list device information
+/*@TRACE*/
+struct gap_ral_dev_info
+{
+    /// Device identity
+    struct gap_bdaddr addr;
+    /// Privacy Mode
+    uint8_t priv_mode;
+    /// Peer IRK
+    uint8_t peer_irk[GAP_KEY_LEN];
+    /// Local IRK
+    uint8_t local_irk[GAP_KEY_LEN];
+};
+
+/// Generic Security key structure
+/*@TRACE*/
+struct gap_sec_key
+{
+    /// Key value MSB -> LSB
+    uint8_t key[GAP_KEY_LEN];
+};
+
+/// @} GAP
+#endif // GAP_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/gapc.h b/platform/atm2/ATM22xx-x1x/include/ble/gapc.h
new file mode 100644
index 0000000..90a98e2
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/gapc.h
@@ -0,0 +1,291 @@
+/**
+ ****************************************************************************************
+ *
+ * @file gapc.h
+ *
+ * @brief Generic Access Profile Controller Header.
+ *
+ * Copyright (C) RivieraWaves 2009-2016
+ * Copyright (C) Atmosic 2023
+ *
+ ****************************************************************************************
+ */
+
+
+#ifndef _GAPC_H_
+#define _GAPC_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup GAPC Generic Access Profile Controller
+ * @ingroup GAP
+ * @brief  Generic Access Profile Controller.
+ *
+ * The GAP Controller module is responsible for providing an API to the application in
+ * to perform GAP action related to a BLE connection (pairing, update parameters,
+ * disconnect ...). GAP controller is multi-instantiated, one task instance per BLE
+ * connection.
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include "rwip_config.h"
+
+#if (BLE_GAPC)
+
+#include "ke_task.h"
+#include "gap.h"
+#include "smpc.h"
+
+
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+
+/// Operation type
+enum gapc_op_type
+{
+    /// Operation used to manage Link (update params, get peer info)
+    GAPC_OP_LINK_INFO    = 0x00,
+
+    /// Operation used to manage SMP
+    GAPC_OP_SMP          = 0x01,
+
+    /// Operation used to manage connection update
+    GAPC_OP_LINK_UPD     = 0x02,
+
+    /// Max number of operations
+    GAPC_OP_MAX
+};
+
+/// Link security status. This status represents the authentication/authorization/bonding levels of the connection
+enum gapc_lk_sec_req
+{
+    /// Link is bonded
+    GAPC_LK_BONDED,
+    /// Link is Encrypted
+    GAPC_LK_ENCRYPTED,
+    /// Link LTK Exchanged during pairing
+    GAPC_LK_LTK_PRESENT,
+};
+
+/*
+ * TYPE DEFINITIONS
+ ****************************************************************************************
+ */
+
+#ifndef CFG_ROM // CEVA_CASE_14550
+/// Connection update responder data
+typedef struct gapc_le_con_up_rsp_data
+{
+    /// Connection interval minimum
+    uint16_t         intv_min;
+    /// Connection interval maximum
+    uint16_t         intv_max;
+    /// Latency
+    uint16_t         latency;
+    /// Supervision timeout
+    uint16_t         time_out;
+    /// SIG Packet identifier
+    uint8_t          pkt_id;
+    /// True for an L2CAP negotiation, False otherwise
+    bool             l2cap_nego;
+} gapc_le_con_up_rsp_data_t;
+#endif
+/// GAP controller environment variable structure.
+struct gapc_env_tag
+{
+    /// Request operation Kernel message
+    void* operation[GAPC_OP_MAX];
+#ifndef CFG_ROM // CEVA_CASE_14550
+    /// Pointer to parameters used to handle LE Connection update request initiated by peer
+    gapc_le_con_up_rsp_data_t*  p_le_con_up_rsp_data;
+#endif
+    /// Source task id of requested disconnection
+    ke_task_id_t disc_requester;
+    /// Destination task ID for asynchronous events not linked to an operation
+    ke_task_id_t dest_task_id;
+
+    /* Connection parameters to keep */
+
+    /// Security Management Protocol environment variables
+    struct smpc_env smpc;
+
+    /// connection handle
+    uint16_t conhdl;
+
+    /// Configuration fields (@see enum gapc_fields)
+    uint8_t fields;
+
+    /// BD Address used for the link that should be kept
+    struct gap_bdaddr src[SMPC_INFO_MAX];
+
+    /// Relevant information of peer LE features 8-byte array
+    uint8_t features;
+    /// Channel Selection Algorithm
+    uint8_t chan_sel_algo;
+};
+
+
+
+/*
+ * MACROS
+ ****************************************************************************************
+ */
+
+/*
+ * FUNCTION DECLARATIONS
+ ****************************************************************************************
+ */
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve connection index from connection handle.
+ *
+ * @param[in] conhdl Connection handle
+ *
+ * @return Return found connection index, GAP_INVALID_CONIDX if not found.
+ ****************************************************************************************
+ */
+uint8_t gapc_get_conidx(uint16_t conhdl);
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve connection handle from connection index.
+ *
+ * @param[in] conidx Connection index
+ *
+ * @return Return found connection handle, GAP_INVALID_CONHDL if not found.
+ ****************************************************************************************
+ */
+uint16_t gapc_get_conhdl(uint8_t conidx);
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve connection role from connection index.
+ *
+ * @param[in] conidx Connection index
+ *
+ * @return Return found connection role
+ ****************************************************************************************
+ */
+uint8_t gapc_get_role(uint8_t conidx);
+
+/**
+ ****************************************************************************************
+ * @brief Set resolvable address used for connection establishment as local address.
+ *
+ * @brief conidx    Connection index
+ * @brief p_addr    Pointer to the resolvable address used by either advertising activity or
+ * resolvable activity.
+ ****************************************************************************************
+ */
+void gapc_set_local_addr(uint8_t conidx, uint8_t *p_addr);
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve connection address information on current link.
+ *
+ * @param[in] conidx Connection index
+ * @param[in] src    Connection information source
+ *
+ * @return Return found connection address
+ ****************************************************************************************
+ */
+struct gap_bdaddr* gapc_get_bdaddr(uint8_t conidx, uint8_t src);
+
+/**
+ ****************************************************************************************
+ * @brief Get destination task id for asynchronous event, meaning events that are not
+ * linked to an operation.
+ * Note the provided connection index shall be valid (gapc_env[conidx] is not NULL)
+ *
+ * @param[in] conidx        Connection Index
+ *
+ * @return ID of the destination task.
+ ****************************************************************************************
+ */
+ke_task_id_t gapc_get_dest_task(uint8_t conidx);
+
+/**
+ ****************************************************************************************
+ * @brief Check if current link support security requirements.
+ *
+ * @param[in] conidx  Connection index
+ * @param[in] sec_req Link security requirement to test
+ *
+ * @return True if link requirement is supported, False else.
+ ****************************************************************************************
+ */
+bool gapc_is_sec_set(uint8_t conidx, uint8_t sec_req);
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve Link Security level
+ *
+ * @param[in] conidx  Connection index
+ *
+ * @return Link Security level.
+ ****************************************************************************************
+ */
+uint8_t gapc_lk_sec_lvl_get(uint8_t conidx);
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve the encryption key size of the connection
+ *
+ * @param[in] conidx Connection index
+ *
+ * @return encryption key size (size is 7 - 16 byte range)
+ *
+ ****************************************************************************************
+ */
+uint8_t gapc_enc_keysize_get(uint8_t conidx);
+
+/**
+ ****************************************************************************************
+ * @brief Get Service Change Client Configuration
+ *
+ * @param[in] conidx Connection index
+ *
+ * @return Service Change Client Configuration
+ ****************************************************************************************
+ */
+bool gapc_svc_chg_ccc_get(uint8_t conidx);
+
+/**
+ ****************************************************************************************
+ * @brief Set Service Change Client Configuration
+ *
+ * @param[in] conidx Connection index
+ * @param[in] enable True if CCC is enabled, False else
+ *
+ ****************************************************************************************
+ */
+void gapc_svc_chg_ccc_set(uint8_t conidx, bool enable);
+
+/**
+ ****************************************************************************************
+ * Retrieve if current connection index is used for a discovery purpose such as
+ * Name discovery
+ *
+ * @param conidx Index of the specific connection
+ *
+ * @return true if connection has a discovery purpose, False else
+ ****************************************************************************************
+ */
+bool gapc_is_disc_connection(uint8_t conidx);
+
+#endif // (BLE_GAPC)
+/// @} GAPC
+
+#endif /* _GAPC_H_ */
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/gapc_task.h b/platform/atm2/ATM22xx-x1x/include/ble/gapc_task.h
new file mode 100644
index 0000000..0bef806
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/gapc_task.h
@@ -0,0 +1,1130 @@
+/**
+ ****************************************************************************************
+ *
+ * @file gapc_task.h
+ *
+ * @brief Generic Access Profile Controller Task Header.
+ *
+ * Copyright (C) RivieraWaves 2009-2016
+ *
+ ****************************************************************************************
+ */
+#ifndef _GAPC_TASK_H_
+#define _GAPC_TASK_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup GAPC_TASK Generic Access Profile Controller Task
+ * @ingroup GAPC
+ * @brief Handles ALL messages to/from GAP Controller block.
+ *
+ * It handles messages from lower and higher layers related to an ongoing connection.
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include "rwip_task.h" // Task definitions
+#include "gap.h"
+#include <stdbool.h>
+#include "ke_msg.h"
+
+/*
+ * MACROS
+ ****************************************************************************************
+ */
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+
+/// GAP Controller Task messages
+/*@TRACE*/
+enum gapc_msg_id
+{
+    /* Default event */
+    /// Command Complete event
+    GAPC_CMP_EVT = TASK_FIRST_MSG(TASK_ID_GAPC),//!< GAPC_CMP_EVT
+
+    /* Connection state information */
+    /// Indicate that a connection has been established
+    GAPC_CONNECTION_REQ_IND,                    //!< GAPC_CONNECTION_REQ_IND
+    /// Set specific link data configuration.
+    GAPC_CONNECTION_CFM,                        //!< GAPC_CONNECTION_CFM
+
+    /// Indicate that a link has been disconnected
+    GAPC_DISCONNECT_IND,                        //!< GAPC_DISCONNECT_IND
+
+    /* Link management command */
+    /// Request disconnection of current link command.
+    GAPC_DISCONNECT_CMD,                        //!< GAPC_DISCONNECT_CMD
+
+    /* Peer device info */
+    /// Retrieve information command
+    GAPC_GET_INFO_CMD,                          //!< GAPC_GET_INFO_CMD
+    /// Peer device attribute DB info such as Device Name, Appearance or Slave Preferred Parameters
+    GAPC_PEER_ATT_INFO_IND,                     //!< GAPC_PEER_ATT_INFO_IND
+    /// Indication of peer version info
+    GAPC_PEER_VERSION_IND,                      //!< GAPC_PEER_VERSION_IND
+    /// Indication of peer features info
+    GAPC_PEER_FEATURES_IND,                     //!< GAPC_PEER_FEATURES_IND
+    /// Indication of ongoing connection RSSI
+    GAPC_CON_RSSI_IND,                          //!< GAPC_CON_RSSI_IND
+
+    /* Device Name Management */
+    /// Peer device request local device info such as name, appearance or slave preferred parameters
+    GAPC_GET_DEV_INFO_REQ_IND,                  //!< GAPC_GET_DEV_INFO_REQ_IND
+    /// Send requested info to peer device
+    GAPC_GET_DEV_INFO_CFM,                      //!< GAPC_GET_DEV_INFO_CFM
+    /// Peer device request to modify local device info such as name or appearance
+    GAPC_SET_DEV_INFO_REQ_IND,                  //!< GAPC_SET_DEV_INFO_REQ_IND
+    /// Local device accept or reject device info modification
+    GAPC_SET_DEV_INFO_CFM,                      //!< GAPC_SET_DEV_INFO_CFM
+
+    /* Connection parameters update */
+    /// Perform update of connection parameters command
+    GAPC_PARAM_UPDATE_CMD,                      //!< GAPC_PARAM_UPDATE_CMD
+    /// Request of updating connection parameters indication
+    GAPC_PARAM_UPDATE_REQ_IND,                  //!< GAPC_PARAM_UPDATE_REQ_IND
+    /// Master confirm or not that parameters proposed by slave are accepted or not
+    GAPC_PARAM_UPDATE_CFM,                      //!< GAPC_PARAM_UPDATE_CFM
+    /// Connection parameters updated indication
+    GAPC_PARAM_UPDATED_IND,                     //!< GAPC_PARAM_UPDATED_IND
+
+    /* Bonding procedure */
+    /// Start Bonding command procedure
+    GAPC_BOND_CMD,                              //!< GAPC_BOND_CMD
+    /// Bonding requested by peer device indication message.
+    GAPC_BOND_REQ_IND,                          //!< GAPC_BOND_REQ_IND
+    /// Confirm requested bond information.
+    GAPC_BOND_CFM,                              //!< GAPC_BOND_CFM
+    /// Bonding information indication message
+    GAPC_BOND_IND,                              //!< GAPC_BOND_IND
+
+    /* Encryption procedure */
+    /// Start Encryption command procedure
+    GAPC_ENCRYPT_CMD,                           //!< GAPC_ENCRYPT_CMD
+    /// Encryption requested by peer device indication message.
+    GAPC_ENCRYPT_REQ_IND,                       //!< GAPC_ENCRYPT_REQ_IND
+    /// Confirm requested Encryption information.
+    GAPC_ENCRYPT_CFM,                           //!< GAPC_ENCRYPT_CFM
+    /// Encryption information indication message
+    GAPC_ENCRYPT_IND,                           //!< GAPC_ENCRYPT_IND
+
+    /* Security request procedure */
+    /// Start Security Request command procedure
+    GAPC_SECURITY_CMD,                          //!< GAPC_SECURITY_CMD
+    /// Security requested by peer device indication message
+    GAPC_SECURITY_IND,                          //!< GAPC_SECURITY_IND
+
+    /* Signature procedure */
+    /// Indicate the current sign counters to the application
+    GAPC_SIGN_COUNTER_IND,                      //!< GAPC_SIGN_COUNTER_IND
+
+    /* Device information */
+    /// Indication of ongoing connection Channel Map
+    GAPC_CON_CHANNEL_MAP_IND,                   //!< GAPC_CON_CHANNEL_MAP_IND
+
+    /* Deprecated */
+    /// Deprecated messages
+    GAPC_DEPRECATED_0,                          //!< GAPC_DEPRECATED_0
+    GAPC_DEPRECATED_1,                          //!< GAPC_DEPRECATED_1
+    GAPC_DEPRECATED_2,                          //!< GAPC_DEPRECATED_2
+    GAPC_DEPRECATED_3,                          //!< GAPC_DEPRECATED_3
+    GAPC_DEPRECATED_4,                          //!< GAPC_DEPRECATED_4
+    GAPC_DEPRECATED_5,                          //!< GAPC_DEPRECATED_5
+    GAPC_DEPRECATED_6,                          //!< GAPC_DEPRECATED_6
+    GAPC_DEPRECATED_7,                          //!< GAPC_DEPRECATED_7
+    GAPC_DEPRECATED_8,                          //!< GAPC_DEPRECATED_8
+    GAPC_DEPRECATED_9,                          //!< GAPC_DEPRECATED_9
+
+    /* LE Ping */
+    /// Update LE Ping timeout value
+    GAPC_SET_LE_PING_TO_CMD,                    //!< GAPC_SET_LE_PING_TO_CMD
+    /// LE Ping timeout indication
+    GAPC_LE_PING_TO_VAL_IND,                    //!< GAPC_LE_PING_TO_VAL_IND
+    /// LE Ping timeout expires indication
+    GAPC_LE_PING_TO_IND,                        //!< GAPC_LE_PING_TO_IND
+
+    /* LE Data Length extension*/
+    /// LE Set Data Length Command
+    GAPC_SET_LE_PKT_SIZE_CMD,                   //!< GAPC_SET_LE_PKT_SIZE_CMD
+    /// LE Set Data Length Indication
+    GAPC_LE_PKT_SIZE_IND,                       //!< GAPC_LE_PKT_SIZE_IND
+
+    /* Secure Connections */
+    /// Request to inform the remote device when keys have been entered or erased
+    GAPC_KEY_PRESS_NOTIFICATION_CMD,            //!< GAPC_KEY_PRESS_NOTIFICATION_CMD
+    /// Indication that a KeyPress has been performed on the peer device.
+    GAPC_KEY_PRESS_NOTIFICATION_IND,            //!< GAPC_KEY_PRESS_NOTIFICATION_IND
+
+    /* PHY Management */
+    /// Set the PHY configuration for current active link
+    GAPC_SET_PHY_CMD,                           //!< GAPC_SET_PHY_CMD
+    /// Active link PHY configuration. Triggered when configuration is read or during an update.
+    GAPC_LE_PHY_IND,                            //!< GAPC_LE_PHY_IND
+
+    /* Channel Selection Algorithm */
+    /// Indication of currently used channel selection algorithm
+    /// @see struct gapc_chan_sel_algo_ind
+    GAPC_CHAN_SEL_ALGO_IND,                     //!< GAPC_CHAN_SEL_ALGO_IND
+
+    /* Preferred Slave Latency */
+    /// Set the preferred slave latency (for slave only, with RW controller)
+    GAPC_SET_PREF_SLAVE_LATENCY_CMD,            //!< GAPC_SET_PREF_SLAVE_LATENCY_CMD
+    /// Set the preferred slave event duration (for slave only, with RW controller)
+    GAPC_SET_PREF_SLAVE_EVT_DUR_CMD,            //!< GAPC_SET_PREF_SLAVE_EVT_DUR_CMD
+
+    /// Indication to the task that sends the unknown message
+    GAPC_UNKNOWN_MSG_IND,                       //!< GAPC_UNKNOWN_MSG_IND
+    // ---------------------- INTERNAL API ------------------------
+    /* Internal messages for timer events, not part of API*/
+    /// Signature procedure
+    GAPC_SIGN_CMD,                              //!< GAPC_SIGN_CMD
+    /// Signature result
+    GAPC_SIGN_IND,                              //!< GAPC_SIGN_IND
+
+    /// Parameter update procedure timeout indication
+    GAPC_PARAM_UPDATE_TO_IND,                   //!< GAPC_PARAM_UPDATE_TO_IND
+    /// Pairing procedure timeout indication
+    GAPC_SMP_TIMEOUT_TIMER_IND,                 //!< GAPC_SMP_TIMEOUT_TIMER_IND
+    /// Pairing repeated attempts procedure timeout indication
+    GAPC_SMP_REP_ATTEMPTS_TIMER_IND,            //!< GAPC_SMP_REP_ATTEMPTS_TIMER_IND
+};
+
+
+
+
+/// request operation type - application interface
+/*@TRACE*/
+enum gapc_operation
+{
+    /*                 Operation Flags                  */
+    /* No Operation (if nothing has been requested)     */
+    /* ************************************************ */
+    /// No operation
+    GAPC_NO_OP                                    = 0x00,
+
+    /* Connection management */
+    /// Disconnect link
+    GAPC_DISCONNECT,
+
+    /* Connection information */
+    /// Retrieve name of peer device.
+    GAPC_GET_PEER_NAME,
+    /// Retrieve peer device version info.
+    GAPC_GET_PEER_VERSION,
+    /// Retrieve peer device features.
+    GAPC_GET_PEER_FEATURES,
+    /// Get Peer device appearance
+    GAPC_GET_PEER_APPEARANCE,
+    /// Get Peer device Slaved Preferred Parameters
+    GAPC_GET_PEER_SLV_PREF_PARAMS,
+    /// Retrieve connection RSSI.
+    GAPC_GET_CON_RSSI,
+    /// Retrieve Connection Channel MAP.
+    GAPC_GET_CON_CHANNEL_MAP,
+
+    /* Connection parameters update */
+    /// Perform update of connection parameters.
+    GAPC_UPDATE_PARAMS,
+
+    /* Security procedures */
+    /// Start bonding procedure.
+    GAPC_BOND,
+    /// Start encryption procedure.
+    GAPC_ENCRYPT,
+    /// Start security request procedure
+    GAPC_SECURITY_REQ,
+
+    /* Deprecated */
+    /// Deprecated operation
+    GAPC_OP_DEPRECATED_0,
+    GAPC_OP_DEPRECATED_1,
+    GAPC_OP_DEPRECATED_2,
+    GAPC_OP_DEPRECATED_3,
+    GAPC_OP_DEPRECATED_4,
+
+    /* LE Ping*/
+    /// get timer timeout value
+    GAPC_GET_LE_PING_TO,
+    /// set timer timeout value
+    GAPC_SET_LE_PING_TO,
+
+    /* LE Data Length extension*/
+    /// LE Set Data Length
+    GAPC_SET_LE_PKT_SIZE,
+
+    /* Central Address resolution supported*/
+    GAPC_GET_ADDR_RESOL_SUPP,
+
+    /* Secure Connections */
+    /// Request to inform the remote device when keys have been entered or erased
+    GAPC_KEY_PRESS_NOTIFICATION,
+
+    /* PHY Management */
+    /// Set the PHY configuration for current active link
+    GAPC_SET_PHY,
+    /// Retrieve PHY configuration of active link
+    GAPC_GET_PHY,
+
+    /* Channel Selection Algorithm */
+    /// Retrieve Channel Selection Algorithm
+    GAPC_GET_CHAN_SEL_ALGO,
+
+    /* Preferred slave latency */
+    /// Set the preferred slave latency (for slave only, with RW controller)
+    GAPC_SET_PREF_SLAVE_LATENCY,
+    /// Set the preferred slave event duration (for slave only, with RW controller)
+    GAPC_SET_PREF_SLAVE_EVT_DUR,
+
+    // ---------------------- INTERNAL API ------------------------
+    /* Packet signature */
+    /// sign an attribute packet
+    GAPC_SIGN_PACKET,
+    /// Verify signature or an attribute packet
+    GAPC_SIGN_CHECK,
+};
+
+/// Bond event type.
+/*@TRACE*/
+enum gapc_bond
+{
+    /// Bond Pairing request
+    GAPC_PAIRING_REQ,
+    /// Respond to Pairing request
+    GAPC_PAIRING_RSP,
+
+    /// Pairing Finished information
+    GAPC_PAIRING_SUCCEED,
+    /// Pairing Failed information
+    GAPC_PAIRING_FAILED,
+
+    /// Used to retrieve pairing Temporary Key
+    GAPC_TK_EXCH,
+    /// Used for Identity Resolving Key exchange
+    GAPC_IRK_EXCH,
+    /// Used for Connection Signature Resolving Key exchange
+    GAPC_CSRK_EXCH,
+    /// Used for Long Term Key exchange
+    GAPC_LTK_EXCH,
+
+    /// Bond Pairing request issue, Repeated attempt
+    GAPC_REPEATED_ATTEMPT,
+
+    /// Out of Band - exchange of confirm and rand.
+    GAPC_OOB_EXCH,
+
+    /// Numeric Comparison - Exchange of Numeric Value -
+    GAPC_NC_EXCH
+};
+
+/// List of device info that should be provided by application
+/*@TRACE*/
+enum gapc_dev_info
+{
+    /// Device Name
+    GAPC_DEV_NAME,
+    /// Device Appearance Icon
+    GAPC_DEV_APPEARANCE,
+    /// Device Slave preferred parameters
+    GAPC_DEV_SLV_PREF_PARAMS,
+    /// Device Central address resolution
+    GAPC_DEV_CTL_ADDR_RESOL,
+    /// maximum device info parameter
+    GAPC_DEV_INFO_MAX,
+};
+
+/// List of features available on a device
+enum gapc_features_list
+{
+    /// LE encryption
+    GAPC_ENCRYPT_FEAT_MASK              = (1 << 0),
+    /// Connection Parameters Request Procedure
+    GAPC_CONN_PARAM_REQ_FEAT_MASK       = (1 << 1),
+    /// Extended Reject Indication
+    GAPC_EXT_REJECT_IND_FEAT_MASK       = (1 << 2),
+    /// Slave-initiated Features Exchange
+    GAPC_SLAVE_FEAT_EXCH_FEAT_MASK      = (1 << 3),
+    /// LE ping
+    GAPC_LE_PING_FEAT_MASK              = (1 << 4)
+};
+
+/// Option for PHY configuration
+enum gapc_phy_option
+{
+    /// No preference for rate used when transmitting on the LE Coded PHY
+    GAPC_PHY_OPT_LE_CODED_ALL_RATES     = (1 << 0),
+    /// 500kbps rate preferred when transmitting on the LE Coded PHY
+    GAPC_PHY_OPT_LE_CODED_500K_RATE     = (1 << 1),
+    /// 125kbps  when transmitting on the LE Coded PHY
+    GAPC_PHY_OPT_LE_CODED_125K_RATE     = (1 << 2),
+};
+
+/*
+ * TYPE DEFINITIONS
+ ****************************************************************************************
+ */
+
+/// Operation command structure in order to keep requested operation.
+struct gapc_operation_cmd
+{
+    /// GAP request type
+    uint8_t operation;
+};
+
+
+/// Command complete event data structure
+/*@TRACE*/
+struct gapc_cmp_evt
+{
+    /// GAP request type
+    uint8_t operation;
+    /// Status of the request
+    uint8_t status;
+};
+
+/// Indicate that an unknown message has been received
+/*@TRACE*/
+struct gapc_unknown_msg_ind
+{
+    /// Unknown message id
+    ke_msg_id_t unknown_msg_id;
+};
+
+/// Indicate that a connection has been established
+/*@TRACE*/
+struct gapc_connection_req_ind
+{
+    /// Connection handle
+    uint16_t conhdl;
+    /// Connection interval
+    uint16_t con_interval;
+    /// Connection latency
+    uint16_t con_latency;
+    /// Link supervision timeout
+    uint16_t sup_to;
+    /// Clock accuracy
+    uint8_t clk_accuracy;
+    /// Peer address type
+    uint8_t peer_addr_type;
+    /// Peer BT address
+    bd_addr_t peer_addr;
+    /// Role of device in connection (0 = Master / 1 = Slave)
+    uint8_t role;
+};
+
+
+/// Set specific link data configuration.
+/*@TRACE*/
+struct gapc_connection_cfm
+{
+    /// Local CSRK value
+    struct gap_sec_key lcsrk;
+    /// Local signature counter value
+    uint32_t lsign_counter;
+
+    /// Remote CSRK value
+    struct gap_sec_key rcsrk;
+    /// Remote signature counter value
+    uint32_t rsign_counter;
+
+    /// Authentication (@see gap_auth)
+    uint8_t auth;
+    /// Service Changed Indication enabled
+    uint8_t svc_changed_ind_enable;
+    /// LTK exchanged during pairing.
+    bool ltk_present;
+};
+
+
+/// Request disconnection of current link command.
+/*@TRACE*/
+struct gapc_disconnect_cmd
+{
+    /// GAP request type:
+    /// - GAPC_DISCONNECT: Disconnect link.
+    uint8_t operation;
+
+    /// Reason of disconnection
+    uint8_t reason;
+};
+
+
+/// Indicate that a link has been disconnected
+/*@TRACE*/
+struct gapc_disconnect_ind
+{
+    /// Connection handle
+    uint16_t conhdl;
+    /// Reason of disconnection
+    uint8_t reason;
+};
+
+
+/// Retrieve information command
+/*@TRACE*/
+struct gapc_get_info_cmd
+{
+    /// GAP request type:
+    /// - GAPC_GET_PEER_NAME: Retrieve name of peer device.
+    /// - GAPC_GET_PEER_VERSION: Retrieve peer device version info.
+    /// - GAPC_GET_PEER_FEATURES: Retrieve peer device features.
+    /// - GAPC_GET_CON_RSSI: Retrieve connection RSSI.
+    /// - GAPC_GET_CON_CHANNEL_MAP: Retrieve Connection Channel MAP.
+    /// - GAPC_GET_PEER_APPEARANCE: Get Peer device appearance
+    /// - GAPC_GET_PEER_SLV_PREF_PARAMS: Get Peer device Slaved Preferred Parameters
+    /// - GAPC_GET_ADDR_RESOL_SUPP: Address Resolution Supported
+    /// - GAPC_GET_LE_PING_TIMEOUT: Retrieve LE Ping Timeout Value
+    uint8_t operation;
+};
+
+/// device information data
+/*@TRACE
+ @trc_ref gapc_dev_info*/
+union gapc_dev_info_val
+{
+    /// Device name
+    //@trc_union parent.req == GAPC_DEV_NAME
+    struct gap_dev_name name;
+    /// Appearance Icon
+    //@trc_union parent.req == GAPC_DEV_APPEARANCE
+    uint16_t appearance;
+    /// Slave preferred parameters
+    //@trc_union parent.req == GAPC_DEV_SLV_PREF_PARAMS
+    struct gap_slv_pref slv_pref_params;
+    /// Central address resolution
+    //@trc_union parent.req == GAPC_DEV_CTL_ADDR_RESOL
+    uint8_t ctl_addr_resol;
+};
+
+/// Peer device attribute DB info such as Device Name, Appearance or Slave Preferred Parameters
+/*@TRACE*/
+struct gapc_peer_att_info_ind
+{
+    /// Requested information
+    /// - GAPC_DEV_NAME: Device Name
+    /// - GAPC_DEV_APPEARANCE: Device Appearance Icon
+    /// - GAPC_DEV_SLV_PREF_PARAMS: Device Slave preferred parameters
+    /// - GAPC_GET_ADDR_RESOL_SUPP: Address resolution supported
+    uint8_t  req;
+    /// Attribute handle
+    uint16_t handle;
+
+    /// device information data
+    union gapc_dev_info_val info;
+};
+
+/// Indication of peer version info
+/*@TRACE*/
+struct gapc_peer_version_ind
+{
+    /// Manufacturer name
+    uint16_t compid;
+    /// LMP subversion
+    uint16_t lmp_subvers;
+    /// LMP version
+    uint8_t  lmp_vers;
+};
+
+/// Indication of peer features info
+/*@TRACE*/
+struct gapc_peer_features_ind
+{
+    /// 8-byte array for LE features
+    uint8_t features[GAP_LE_FEATS_LEN];
+};
+
+/// Indication of ongoing connection RSSI
+/*@TRACE*/
+struct gapc_con_rssi_ind
+{
+    /// RSSI value
+    int8_t rssi;
+};
+
+/// Indication of ongoing connection Channel Map
+/*@TRACE*/
+struct gapc_con_channel_map_ind
+{
+    /// channel map value
+    le_chnl_map_t ch_map;
+};
+
+/// Sign counter value changed due to packet signing or signature verification.
+struct gapc_sign_counter_updated_ind
+{
+    /// New Local signature counter value
+    uint32_t lsign_counter;
+    /// New Remote signature counter value
+    uint32_t rsign_counter;
+};
+
+/// Indication of LE Ping
+/*@TRACE*/
+struct gapc_le_ping_to_val_ind
+{
+    ///Authenticated payload timeout
+    uint16_t timeout;
+};
+
+
+/// Peer device request local device info such as name, appearance or slave preferred parameters
+/*@TRACE*/
+struct gapc_get_dev_info_req_ind
+{
+    /// Requested information
+    /// - GAPC_DEV_NAME: Device Name
+    /// - GAPC_DEV_APPEARANCE: Device Appearance Icon
+    /// - GAPC_DEV_SLV_PREF_PARAMS: Device Slave preferred parameters
+    uint8_t req;
+};
+
+
+
+/// Send requested info to peer device
+/*@TRACE*/
+struct gapc_get_dev_info_cfm
+{
+    /// Requested information
+    /// - GAPC_DEV_NAME: Device Name
+    /// - GAPC_DEV_APPEARANCE: Device Appearance Icon
+    /// - GAPC_DEV_SLV_PREF_PARAMS: Device Slave preferred parameters
+    uint8_t req;
+
+    /// Peer device information data
+    union gapc_dev_info_val info;
+};
+
+/// device information data
+/*@TRACE
+ @trc_ref gapc_dev_info*/
+union gapc_set_dev_info
+{
+    /// Device name
+    //@trc_union parent.req == GAPC_DEV_NAME
+    struct gap_dev_name name;
+    /// Appearance Icon
+    //@trc_union parent.req == GAPC_DEV_APPEARANCE
+    uint16_t appearance;
+};
+
+/// Peer device request to modify local device info such as name or appearance
+/*@TRACE*/
+struct gapc_set_dev_info_req_ind
+{
+    /// Requested information
+    /// - GAPC_DEV_NAME: Device Name
+    /// - GAPC_DEV_APPEARANCE: Device Appearance Icon
+    uint8_t req;
+
+    /// device information data
+    union gapc_set_dev_info info;
+};
+
+/// Local device accept or reject device info modification
+/*@TRACE*/
+struct gapc_set_dev_info_cfm
+{
+    /// Requested information
+    /// - GAPC_DEV_NAME: Device Name
+    /// - GAPC_DEV_APPEARANCE: Device Appearance Icon
+    uint8_t req;
+
+    /// Status code used to know if requested has been accepted or not
+    uint8_t status;
+};
+
+/// Connection Parameter used to update connection parameters
+struct gapc_conn_param
+{
+    /// Connection interval minimum
+    uint16_t intv_min;
+    /// Connection interval maximum
+    uint16_t intv_max;
+    /// Latency
+    uint16_t latency;
+    /// Supervision timeout
+    uint16_t time_out;
+};
+
+/// Perform update of connection parameters command
+/*@TRACE*/
+struct gapc_param_update_cmd
+{
+    /// GAP request type:
+    /// - GAPC_UPDATE_PARAMS: Perform update of connection parameters.
+    uint8_t operation;
+    /// Internal parameter used to manage internally l2cap packet identifier for signaling
+    uint8_t pkt_id;
+    /// Connection interval minimum
+    uint16_t intv_min;
+    /// Connection interval maximum
+    uint16_t intv_max;
+    /// Latency
+    uint16_t latency;
+    /// Supervision timeout
+    uint16_t time_out;
+    /// Minimum Connection Event Duration
+    uint16_t ce_len_min;
+    /// Maximum Connection Event Duration
+    uint16_t ce_len_max;
+};
+
+/// Request of updating connection parameters indication
+/*@TRACE*/
+struct gapc_param_update_req_ind
+{
+    /// Connection interval minimum
+    uint16_t intv_min;
+    /// Connection interval maximum
+    uint16_t intv_max;
+    /// Latency
+    uint16_t latency;
+    /// Supervision timeout
+    uint16_t time_out;
+};
+
+/// Connection parameters updated indication
+/*@TRACE*/
+struct gapc_param_updated_ind
+{
+    ///Connection interval value
+    uint16_t            con_interval;
+    ///Connection latency value
+    uint16_t            con_latency;
+    ///Supervision timeout
+    uint16_t            sup_to;
+};
+
+/// Master confirm or not that parameters proposed by slave are accepted or not
+/*@TRACE*/
+struct gapc_param_update_cfm
+{
+    /// True to accept slave connection parameters, False else.
+    bool accept;
+    /// Minimum Connection Event Duration
+    uint16_t ce_len_min;
+    /// Maximum Connection Event Duration
+    uint16_t ce_len_max;
+};
+
+/// Parameters of the @ref GAPC_SET_PREF_SLAVE_LATENCY_CMD message
+/*@TRACE*/
+struct gapc_set_pref_slave_latency_cmd
+{
+    /// GAP request type:
+    /// - GAPC_SET_PREF_SLAVE_LATENCY_CMD : Set preferred slave latency
+    uint8_t operation;
+    /// Preferred latency that the controller should use on a connection (in number of connection events)
+    uint16_t latency;
+};
+
+/// Parameters of the @ref GAPC_SET_PREF_SLAVE_EVT_DUR_CMD message
+/*@TRACE*/
+struct gapc_set_pref_slave_evt_dur_cmd
+{
+    /// GAP request type:
+    /// - GAPC_SET_PREF_SLAVE_EVT_DUR_CMD : Set preferred slave event duration
+    uint8_t operation;
+    /// Preferred event duration that the controller should use on a connection (N * 0.625 ms)
+    uint16_t duration;
+    /// Slave transmits a single packet per connection event (False/True)
+    uint8_t single_tx;
+};
+
+/// Pairing parameters
+/*@TRACE*/
+struct gapc_pairing
+{
+    /// IO capabilities (@see gap_io_cap)
+    uint8_t iocap;
+    /// OOB information (@see gap_oob)
+    uint8_t oob;
+    /// Authentication (@see gap_auth)
+    /// Note in BT 4.1 the Auth Field is extended to include 'Key Notification' and
+    /// and 'Secure Connections'.
+    uint8_t auth;
+    /// Encryption key size (7 to 16)
+    uint8_t key_size;
+    ///Initiator key distribution (@see gap_kdist)
+    uint8_t ikey_dist;
+    ///Responder key distribution (@see gap_kdist)
+    uint8_t rkey_dist;
+
+    /// Device security requirements (minimum security level). (@see gap_sec_req)
+    uint8_t sec_req;
+};
+
+/// Long Term Key information
+/*@TRACE*/
+struct gapc_ltk
+{
+    /// Long Term Key
+    struct gap_sec_key ltk;
+    /// Encryption Diversifier
+    uint16_t ediv;
+    /// Random Number
+    rand_nb_t randnb;
+    /// Encryption key size (7 to 16)
+    uint8_t key_size;
+};
+/// Out of Band Information
+/*@TRACE*/
+struct gapc_oob
+{
+    /// Confirm Value
+    uint8_t conf[GAP_KEY_LEN];
+    /// Random Number
+    uint8_t rand[GAP_KEY_LEN];
+};
+
+/*@TRACE*/
+struct gapc_nc
+{
+    uint8_t value[4];
+};
+
+/// Identity Resolving Key information
+/*@TRACE*/
+struct gapc_irk
+{
+    /// Identity Resolving Key
+    struct gap_sec_key irk;
+    /// Device BD Identity Address
+    struct gap_bdaddr addr;
+};
+
+
+/// Start Bonding command procedure
+/*@TRACE*/
+struct gapc_bond_cmd
+{
+    /// GAP request type:
+    /// - GAPC_BOND:  Start bonding procedure.
+    uint8_t operation;
+    /// Pairing information
+    struct gapc_pairing pairing;
+};
+
+/// Bond procedure requested information data
+/*@TRACE
+ @trc_ref gapc_bond*/
+union gapc_bond_req_data
+{
+    /// Authentication level (@see gap_auth) (if request = GAPC_PAIRING_REQ)
+    //@trc_union parent.request == GAPC_PAIRING_REQ
+    uint8_t auth_req;
+    /// LTK Key Size (if request = GAPC_LTK_EXCH)
+    //@trc_union parent.request == GAPC_LTK_EXCH
+    uint8_t key_size;
+    /// Device IO used to get TK: (if request = GAPC_TK_EXCH)
+    ///  - GAP_TK_OOB:       TK get from out of band method
+    ///  - GAP_TK_DISPLAY:   TK generated and shall be displayed by local device
+    ///  - GAP_TK_KEY_ENTRY: TK shall be entered by user using device keyboard
+    //@trc_union parent.request == GAPC_TK_EXCH
+    uint8_t tk_type;
+
+    /// Addition OOB Data for the OOB Conf and Rand values
+    //@trc_union parent.request == GAPC_OOB_EXCH
+    struct gapc_oob  oob_data;
+    /// Numeric Comparison Data
+    //@trc_union parent.request == GAPC_NC_EXCH
+    struct gapc_nc   nc_data;
+};
+
+/// Bonding requested by peer device indication message.
+/*@TRACE*/
+struct gapc_bond_req_ind
+{
+    /// Bond request type (@see gapc_bond)
+    uint8_t request;
+
+    /// Bond procedure requested information data
+    union gapc_bond_req_data data;
+};
+
+/*@TRACE
+ @trc_ref gapc_bond
+*/
+union gapc_bond_cfm_data
+{
+    /// Pairing Features (request = GAPC_PAIRING_RSP)
+    //@trc_union parent.request == GAPC_PAIRING_RSP
+    struct gapc_pairing pairing_feat;
+    /// LTK (request = GAPC_LTK_EXCH)
+    //@trc_union parent.request == GAPC_LTK_EXCH
+    struct gapc_ltk ltk;
+    /// CSRK (request = GAPC_CSRK_EXCH)
+    //@trc_union parent.request == GAPC_CSRK_EXCH
+    struct gap_sec_key csrk;
+    /// TK (request = GAPC_TK_EXCH)
+    //@trc_union parent.request == GAPC_TK_EXCH
+    struct gap_sec_key tk;
+    /// IRK (request = GAPC_IRK_EXCH)
+    //@trc_union parent.request == GAPC_IRK_EXCH
+    struct gapc_irk irk;
+    /// OOB Confirm and Random from the peer (request = GAPC_OOB_EXCH)
+    //@trc_union parent.request == GAPC_OOB_EXCH
+    struct gapc_oob oob;
+};
+
+/// Confirm requested bond information.
+/*@TRACE*/
+struct gapc_bond_cfm
+{
+    /// Bond request type (@see gapc_bond)
+    uint8_t request;
+    /// Request accepted
+    uint8_t accept;
+
+    /// Bond procedure information data
+    union gapc_bond_cfm_data data;
+};
+
+/**
+ *  Authentication information
+ */
+/*@TRACE*/
+struct gapc_bond_auth
+{
+    /// Authentication information (@see gap_auth)
+    uint8_t info;
+
+    /// LTK exchanged during pairing.
+    bool ltk_present;
+};
+
+/// Bond procedure information data
+/*@TRACE
+ @trc_ref gapc_bond*/
+union gapc_bond_data
+{
+    /// Authentication information (@see gap_auth)
+    /// (if info = GAPC_PAIRING_SUCCEED)
+    //@trc_union parent.info == GAPC_PAIRING_SUCCEED
+    struct gapc_bond_auth auth;
+    /// Pairing failed reason  (if info = GAPC_PAIRING_FAILED)
+    //@trc_union parent.info == GAPC_PAIRING_FAILED
+    uint8_t reason;
+    /// Long Term Key information (if info = GAPC_LTK_EXCH)
+    //@trc_union parent.info == GAPC_LTK_EXCH
+    struct gapc_ltk ltk;
+    /// Identity Resolving Key information (if info = GAPC_IRK_EXCH)
+    //@trc_union parent.info == GAPC_IRK_EXCH
+    struct gapc_irk irk;
+    /// Connection Signature Resolving Key information (if info = GAPC_CSRK_EXCH)
+    //@trc_union parent.info == GAPC_CSRK_EXCH
+    struct gap_sec_key csrk;
+};
+
+/// Bonding information indication message
+/*@TRACE*/
+struct gapc_bond_ind
+{
+    /// Bond information type (@see gapc_bond)
+    uint8_t info;
+
+    /// Bond procedure information data
+    union gapc_bond_data data;
+};
+
+/// Start Encryption command procedure
+/*@TRACE*/
+struct gapc_encrypt_cmd
+{
+    /// GAP request type:
+    /// - GAPC_ENCRYPT:  Start encryption procedure.
+    uint8_t operation;
+    /// Long Term Key information
+    struct gapc_ltk ltk;
+};
+
+/// Encryption requested by peer device indication message.
+/*@TRACE*/
+struct gapc_encrypt_req_ind
+{
+    /// Encryption Diversifier
+    uint16_t ediv;
+    /// Random Number
+    rand_nb_t rand_nb;
+};
+
+/// Confirm requested Encryption information.
+/*@TRACE*/
+struct gapc_encrypt_cfm
+{
+    /// Indicate if a LTK has been found for the peer device
+    uint8_t found;
+    /// Long Term Key
+    struct gap_sec_key ltk;
+    /// LTK Key Size
+    uint8_t key_size;
+};
+
+/// Encryption information indication message
+/*@TRACE*/
+struct gapc_encrypt_ind
+{
+    /// Authentication  level (@see gap_auth)
+    uint8_t auth;
+};
+
+/// Start Security Request command procedure
+/*@TRACE*/
+struct gapc_security_cmd
+{
+    /// GAP request type:
+    /// - GAPC_SECURITY_REQ: Start security request procedure
+    uint8_t operation;
+    /// Authentication level (@see gap_auth)
+    uint8_t auth;
+};
+/// Security requested by peer device indication message
+/*@TRACE*/
+struct gapc_security_ind
+{
+    /// Authentication level (@see gap_auth)
+    uint8_t auth;
+};
+
+/// Parameters of the @ref GAPC_SIGN_COUNTER_IND message
+/*@TRACE*/
+struct gapc_sign_counter_ind
+{
+    /// Local SignCounter value
+    uint32_t local_sign_counter;
+    /// Peer SignCounter value
+    uint32_t peer_sign_counter;
+};
+
+
+/// Parameters of the @ref GAPC_SET_LE_PING_TO_CMD message
+/*@TRACE*/
+struct gapc_set_le_ping_to_cmd
+{
+    /// GAP request type:
+    /// - GAPC_SET_LE_PING_TO : Set the LE Ping timeout value
+    uint8_t operation;
+    /// Authenticated payload timeout
+    uint16_t timeout;
+};
+
+/// Parameters of the @ref GAPC_SET_LE_PKT_SIZE_CMD message
+/*@TRACE*/
+struct gapc_set_le_pkt_size_cmd
+{
+    /// GAP request type:
+    /// - GAPC_SET_LE_PKT_SIZE : Set the LE Data length value
+    uint8_t operation;
+    ///Preferred maximum number of payload octets that the local Controller should include
+    ///in a single Link Layer Data Channel PDU.
+    uint16_t tx_octets;
+    ///Preferred maximum number of microseconds that the local Controller should use to transmit
+    ///a single Link Layer Data Channel PDU
+    uint16_t tx_time;
+};
+
+/// Parameters of the @ref GAPC_LE_PKT_SIZE_IND message
+/*@TRACE*/
+struct gapc_le_pkt_size_ind
+{
+    ///The maximum number of payload octets in TX
+    uint16_t max_tx_octets;
+    ///The maximum time that the local Controller will take to TX
+    uint16_t max_tx_time;
+    ///The maximum number of payload octets in RX
+    uint16_t max_rx_octets;
+    ///The maximum time that the local Controller will take to RX
+    uint16_t max_rx_time;
+};
+
+/// Parameters of the @ref GAPC_KEY_PRESS_NOTIFICATION_CMD message
+/*@TRACE*/
+struct gapc_key_press_notif_cmd
+{
+    /// GAP request type:
+    /// - GAPC_KEY_PRESS_NOTIFICATION_CMD : Inform the remote device when keys have been entered or erased
+    uint8_t operation;
+    /// notification type
+    uint8_t notification_type;
+};
+
+/// Parameters of the @ref GAPC_KEY_PRESS_NOTIFICATION_IND message
+/*@TRACE*/
+struct gapc_key_press_notif_ind
+{
+    /// notification type
+    uint8_t notification_type;
+};
+
+/// Set the PHY configuration for current active link
+/*@TRACE*/
+struct gapc_set_phy_cmd
+{
+    /// GAP request type:
+    /// - GAPC_SET_PHY : Set the PHY configuration for current active link
+    uint8_t operation;
+    /// Supported LE PHY for data transmission (@see enum gap_phy)
+    uint8_t tx_phy;
+    /// Supported LE PHY for data reception (@see enum gap_phy)
+    uint8_t rx_phy;
+    /// PHY options (@see enum gapc_phy_option)
+    uint8_t phy_opt;
+};
+
+/// Active link PHY configuration. Triggered when configuration is read or during an update.
+/*@TRACE*/
+struct gapc_le_phy_ind
+{
+    /// LE PHY for data transmission (@see enum gap_phy_val)
+    uint8_t tx_phy;
+    /// LE PHY for data reception (@see enum gap_phy_val)
+    uint8_t rx_phy;
+};
+
+/// Parameters of the @ref GAPC_SIGN_CMD message
+/*@TRACE*/
+struct gapc_sign_cmd
+{
+    /// GAP request type:
+    /// - GAPC_SIGN_PACKET: Sign an attribute packet
+    /// - GAPC_SIGN_CHECK:  Verify signature or an attribute packet
+    uint8_t operation;
+    /// Data PDU length (Bytes)
+    uint16_t byte_len;
+    /// Data PDU + SignCounter if generation, Data PDU + SignCounter + MAC if verification
+    uint8_t msg[__ARRAY_EMPTY];
+};
+
+/// Parameters of the @ref GAPC_SIGN_IND message
+/*@TRACE*/
+struct gapc_sign_ind
+{
+    /// GAP request type:
+    /// - GAPC_SIGN_PACKET: Sign an attribute packet
+    /// - GAPC_SIGN_CHECK:  Verify signature or an attribute packet
+    uint8_t operation;
+    /// Data PDU length (Bytes)
+    uint16_t byte_len;
+    /// Data PDU + SignCounter + MAC
+    uint8_t signed_msg[__ARRAY_EMPTY];
+};
+
+/// Parameters of the @ref GAPC_CHAN_SEL_ALGO_IND
+/*@TRACE*/
+struct gapc_chan_sel_algo_ind
+{
+    /// Used channel selection algorithm
+    uint8_t chan_sel_algo;
+};
+
+/// @} GAPC_TASK
+
+#endif /* _GAPC_TASK_H_ */
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/gapm.h b/platform/atm2/ATM22xx-x1x/include/ble/gapm.h
new file mode 100644
index 0000000..5979978
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/gapm.h
@@ -0,0 +1,451 @@
+/**
+ ****************************************************************************************
+ *
+ * @file gapm.h
+ *
+ * @brief Generic Access Profile Manager Header.
+ *
+ * Copyright (C) RivieraWaves 2009-2016
+ *
+ ****************************************************************************************
+ */
+
+
+#ifndef _GAPM_H_
+#define _GAPM_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup GAPM Generic Access Profile Manager
+ * @ingroup GAP
+ * @brief Generic Access Profile Manager.
+ *
+ * The GAP Manager module is responsible for providing an API to the application in order
+ * to manage all non connected stuff such as configuring device to go in desired mode
+ * (discoverable, connectable, etc.) and perform required actions (scanning, connection,
+ * etc.). GAP Manager is also responsible of managing GAP Controller state according to
+ * corresponding BLE connection states.
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include "rwip_config.h"
+#include "ke_task.h"
+#include "gap.h"
+#include "gapm_task.h"
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+/// Bit checking
+#define GAPM_ISBITSET(flag, mask)     (((flag)&(mask)) == mask)
+/// Maximum number of advertising reports from different advertisers that can be reassembled in parallel
+#define GAPM_REPORT_NB_MAX            (5)
+
+/*
+ * STRUCTURE DEFINITION
+ ****************************************************************************************
+ */
+
+/// Contain a received fragment of advertising or scan response report
+struct gapm_report_elem
+{
+    /// List Header
+    struct co_list_hdr list_hdr;
+    /// Data length
+    uint8_t data_len;
+    /// Data
+    uint8_t data[];
+};
+
+/// Contain a list of fragments received for an advertising or scan response report sent
+/// by a given advertiser
+struct gapm_report_list
+{
+    // List of received reports (@see struct gapm_report_elem)
+    struct co_list report_list;
+    // Advertiser address
+    struct gap_bdaddr adv_addr;
+    // Received length
+    uint16_t length;
+};
+
+/// GAP Manager activity structure (common part for advertising, scanning,
+/// initiating and periodic synchronization activities)
+struct gapm_actv_tag
+{
+    /// Function to be called for activity start
+    uint8_t (*cb_actv_start)(struct gapm_actv_tag *, struct gapm_activity_start_cmd *);
+    /// Function to be called for activity stop
+    void (*cb_actv_stop)(struct gapm_actv_tag *);
+    /// Function to be called for activity delete
+    void (*cb_actv_delete)(struct gapm_actv_tag *);
+
+    /// Identifier
+    uint8_t idx;
+    /// Type (@see enum gapm_actv_type)
+    uint8_t type;
+    /// Subtype - meaning depends on activity type
+    ///  - Advertising activity: @see enum gap_adv_subtype
+    ///  - Scanning activity: @see enum gap_scan_subtype
+    ///  - Initiating activity: @see enum gap_init_subtype
+    ///  - Periodic Synchronization activity: @see enum gap_period_sync_subtype
+    uint8_t subtype;
+    /// State (@see enum gapm_actv_state)
+    uint8_t state;
+    /// Information bit field, meaning depends on activity type
+    uint8_t info;
+    /// Own address type
+    uint8_t own_addr_type;
+    /// Next expected HCI event opcode
+    uint16_t next_exp_opcode;
+    /// Task ID of task that has requested creation of the activity
+    ke_task_id_t requester;
+    /// BD Address used by the activity (can be different if controller privacy is used and
+    /// application chose to use a resolvable private address)
+    bd_addr_t addr;
+};
+
+/// GAP Manager activity structure for advertising activity
+struct gapm_actv_adv_tag
+{
+    /// Common activity parameters
+    struct gapm_actv_tag common;
+    /// Data offset for the set advertising data procedure
+    uint16_t data_offset;
+    /// Advertising mode (@see enum gapm_adv_disc_mode)
+    uint8_t mode;
+    /// Stored status
+    uint8_t kept_status;
+    /// Selected TX power
+    uint8_t tx_pwr;
+};
+
+/// GAP Manager activity structure for scanning activity
+struct gapm_actv_scan_tag
+{
+    /// Common activity parameters
+    struct gapm_actv_tag common;
+    /// Lists containing fragments for GAPM_REPORT_NB_MAX reports that can be received in parallel
+    struct gapm_report_list report_lists[GAPM_REPORT_NB_MAX];
+    /// Scan filtering Array
+    struct gap_bdaddr *p_scan_filter;
+};
+
+/// GAP Manager activity structure for initiating activity
+struct gapm_actv_init_tag
+{
+    /// Common activity parameters
+    struct gapm_actv_tag common;
+    /// Initiating parameters
+    struct gapm_init_param init_param;
+    /// Number of connection to be established for automatic connection
+    ///    -> Number of devices in the white list when GAPM_ACTIVITY_START_CMD is received
+    uint8_t nb_auto_conn;
+    /// Stored status
+    uint8_t kept_status;
+};
+
+/// GAP Manager activity structure for periodic synchronization activity
+struct gapm_actv_per_sync_tag
+{
+    /// Common activity parameters
+    struct gapm_actv_tag common;
+    // List of received reports fragment (@see struct gapm_report_elem)
+    struct co_list report_list;
+    // Received length
+    uint16_t length;
+    /// Synchronization Handle
+    uint16_t sync_hdl;
+};
+
+/*
+ * FUNCTION DECLARATIONS
+ ****************************************************************************************
+ */
+
+/**
+ ****************************************************************************************
+ * @brief Initialize Generic Access Profile Manager Module.
+ *
+ * @param[in] reset  true if it's requested by a reset; false if it's boot initialization
+ *
+ ****************************************************************************************
+ */
+void gapm_init(bool reset);
+
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve Task Identifier from Task number
+ * (automatically update index of task in returned task id)
+ *
+ * @param task Task number
+ * @return Task Identifier
+ ****************************************************************************************
+ */
+ke_task_id_t gapm_get_id_from_task(ke_msg_id_t task);
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve Task Number from Task Identifier
+ * (automatically update index of task in returned task id)
+ *
+ * @param id Task Identifier
+ * @return Task Number
+ ****************************************************************************************
+ */
+ke_task_id_t gapm_get_task_from_id(ke_msg_id_t id);
+
+
+
+#if (BLE_GAPC)
+/**
+ ****************************************************************************************
+ * @brief Created link connection parameters (from bond data) has been set, connection
+ * ready to be used.
+ *
+ * @param[in] conidx     Connection Index
+ *
+ ****************************************************************************************
+ */
+void gapm_con_enable(uint8_t conidx);
+
+
+/**
+ ****************************************************************************************
+ * @brief A link has been disconnected, clean-up host stack for this connection.
+ *
+ * @param[in] conidx     Connection Index
+ * @param[in] conhdl     Connection Handle
+ * @param[in] reason     Reason of the disconnection
+ *
+ ****************************************************************************************
+ */
+void gapm_con_cleanup(uint8_t conidx, uint16_t conhdl, uint8_t reason);
+
+#endif // (BLE_GAPC)
+
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve device identity key.
+ *
+ * @return Device Identity Key
+ ****************************************************************************************
+ */
+struct gap_sec_key* gapm_get_irk(void);
+
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve local public address.
+ *
+ * @return Return local public address
+ ****************************************************************************************
+ */
+bd_addr_t* gapm_get_bdaddr(void);
+
+
+
+#if (BLE_ISO_MODE_0_PROTOCOL)
+/**
+ ****************************************************************************************
+ * @brief Return if LE Audio Mode 0 is supported or not
+ *
+ * @return True if supported, False else
+ ****************************************************************************************
+ */
+bool gapm_is_audio_am0_sup(void);
+#endif // (BLE_ISO_MODE_0_PROTOCOL)
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve the device address type (@see enum gapm_addr_type)
+ *
+ * @return address type
+ ****************************************************************************************
+ */
+uint8_t gapm_get_address_type(void);
+
+
+#if (BLE_ATTS)
+
+/**
+ ****************************************************************************************
+ * @brief Get if preferred connection parameters present in GAP ATT database
+ *
+ * @return True if referred connection parameters present in GAP ATT database, False else
+ ****************************************************************************************
+ */
+bool gapm_is_pref_con_param_pres(void);
+
+/**
+ ****************************************************************************************
+ * @brief retrieve gap attribute handle from attribute index.
+ *
+ * @param[in] att_idx Attribute index
+ *
+ * @return Attribute handle
+ ****************************************************************************************
+ */
+uint16_t gapm_get_att_handle(uint8_t att_idx);
+
+#endif // (BLE_ATTS)
+
+#if (SECURE_CONNECTIONS)
+/**
+ ****************************************************************************************
+ * @brief Returns the local Public Key
+ *
+ * @return pointer to the local Public Key
+ ****************************************************************************************
+ */
+public_key_t* gapm_get_local_public_key(void);
+#endif // (SECURE_CONNECTIONS)
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve if Legacy pairing is supported on local device
+ *
+ * @return True if legacy pairing is supported
+ ****************************************************************************************
+ */
+bool gapm_is_legacy_pairing_supp(void);
+
+
+/**
+ ****************************************************************************************
+  * @brief Retrieve if Secure Connection pairing is supported on local device
+ *
+ * @return True if Secure Connection pairing is supported
+ ****************************************************************************************
+ */
+bool gapm_is_sec_con_pairing_supp(void);
+
+
+#if (BLE_LECB)
+/**
+ ****************************************************************************************
+ * @brief Check if LECB connection can be registered (established)
+ *
+ * @param[in]  le_psm        LE Protocol/Service Multiplexer
+ * @param[in]  conidx        Connection index for app_task computation
+ * @param[out] app_task      Destination application/profile task
+ * @param[out] sec_lvl       Security level requirements
+ *
+ *
+ * @return GAP_ERR_NOT_FOUND if LE_PSM not register, GAP_ERR_NO_ERROR else
+ ****************************************************************************************
+ */
+uint8_t gapm_le_psm_get_info(uint16_t le_psm, uint8_t conidx, ke_task_id_t *app_task, uint8_t *sec_lvl);
+
+
+/**
+ ****************************************************************************************
+ * @brief Check if LECB connection can be registered (established)
+ *
+ * @param[in] le_psm        LE Protocol/Service Multiplexer
+ * @param[in] peer_con_init Info to know if connection is initiated by peer device
+ *
+ * @return L2C_ERR_NO_RES_AVAIL if all LECB link are established, GAP_ERR_NO_ERROR else
+ ****************************************************************************************
+ */
+uint8_t gapm_lecb_register(uint16_t le_psm, bool peer_con_init);
+
+
+/**
+ ****************************************************************************************
+ * @brief Unregister an existing LECB connection
+ *
+ * @param[in] le_psm        LE Protocol/Service Multiplexer
+ * @param[in] peer_con_init Info to know if connection is initiated by peer device
+ *
+ * @return GAP_ERR_NO_ERROR
+ ****************************************************************************************
+ */
+uint8_t gapm_lecb_unregister(uint16_t le_psm, bool peer_con_init);
+
+#endif // (BLE_LECB)
+
+/**
+ ****************************************************************************************
+ * @brief Return the maximal MTU value
+ *
+ * @param[out] Maximal MTU value
+ ****************************************************************************************
+ */
+uint16_t gapm_get_max_mtu(void);
+
+/**
+ ****************************************************************************************
+ * @brief Return the maximal MPS value
+ *
+ * @param[out] Maximal MPS value
+ ****************************************************************************************
+ */
+uint16_t gapm_get_max_mps(void);
+
+
+
+/**
+ ****************************************************************************************
+ * @brief Check If Service changed feature is enabled or not
+ *
+ * @return true if enabled, false else.
+ *
+ ****************************************************************************************
+ */
+bool gapm_svc_chg_en(void);
+
+#if (RW_DEBUG)
+/**
+ ****************************************************************************************
+ * @brief Check If Debug mode feature is enabled or not
+ *
+ * @return true if enabled, false else.
+ *
+ ****************************************************************************************
+ */
+bool gapm_dbg_mode_en(void);
+
+/**
+ ****************************************************************************************
+ * @brief Check If received L2CAP packet must be forwarded to the application
+ *
+ * @return true if enabled, false else.
+ *
+ ****************************************************************************************
+ */
+bool gapm_dbg_fwd_traffic(void);
+
+/**
+ ****************************************************************************************
+ * @brief Force the GAP service start handle
+ ****************************************************************************************
+ */
+void gapm_set_svc_start_hdl(uint16_t start_hdl);
+#endif // (RW_DEBUG)
+
+/**
+ ****************************************************************************************
+ * Retrieve if current connection index is used for a discovery purpose such as
+ * Name discovery
+ *
+ * @param conidx Index of the specific connection
+ *
+ * @return true if connection has a discovery purpose, False else
+ ****************************************************************************************
+ */
+bool gapm_is_disc_connection(uint8_t conidx);
+
+/// @} GAPM
+
+#endif /* _GAPM_H_ */
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/gapm_task.h b/platform/atm2/ATM22xx-x1x/include/ble/gapm_task.h
new file mode 100644
index 0000000..b2b523e
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/gapm_task.h
@@ -0,0 +1,1819 @@
+/**
+ ****************************************************************************************
+ *
+ * @file gapm_task.h
+ *
+ * @brief Generic Access Profile Manager Task Header.
+ *
+ * Copyright (C) RivieraWaves 2009-2016
+ * Copyright (C) Atmosic 2023
+ *
+ ****************************************************************************************
+ */
+
+
+#ifndef _GAPM_TASK_H_
+#define _GAPM_TASK_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup GAPM_TASK Generic Access Profile Manager Task
+ * @ingroup GAPM
+ * @brief  Handles ALL messages to/from GAP Manager block.
+ *
+ * It handles messages from lower and higher layers not related to an ongoing connection.
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include "rwip_task.h" // Task definitions
+#include "gap.h"
+#include "co_math.h"
+#include "ke_msg.h"
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+/// Offset for List Management Operation Codes
+#define GAPM_OP_OFFSET_LIST_MGMT  (0x90)
+/// Offset for Extended Air Operation Codes
+#define GAPM_OP_OFFSET_EXT_AIR    (0xA0)
+
+/*
+ * ENUMERATIONS
+ ****************************************************************************************
+ */
+
+/// GAP Manager Message Interface
+/*@TRACE*/
+enum gapm_msg_id
+{
+    /* Default event */
+    /// Command Complete event
+    GAPM_CMP_EVT = TASK_FIRST_MSG(TASK_ID_GAPM),
+
+    /* Default commands */
+    /// Reset link layer and the host command
+    GAPM_RESET_CMD = GAPM_CMP_EVT + 2,
+
+    /* Device Configuration */
+    /// Set device configuration command
+    GAPM_SET_DEV_CONFIG_CMD = GAPM_RESET_CMD + 2,
+    /// Set device channel map
+    GAPM_SET_CHANNEL_MAP_CMD,
+
+    /* Local device information */
+    /// Get local device info command
+    GAPM_GET_DEV_INFO_CMD,
+    /// Local device version indication event
+    GAPM_DEV_VERSION_IND,
+    /// Local device BD Address indication event
+    GAPM_DEV_BDADDR_IND,
+    /// Advertising channel Tx power level
+    GAPM_DEV_ADV_TX_POWER_IND,
+    /// Indication containing information about memory usage.
+    GAPM_DBG_MEM_INFO_IND,
+
+    /// Name of peer device indication
+    GAPM_PEER_NAME_IND = GAPM_DBG_MEM_INFO_IND + 8,
+
+    /* Security / Encryption Toolbox */
+    /// Resolve address command
+    GAPM_RESOLV_ADDR_CMD = GAPM_PEER_NAME_IND + 2,
+    /// Indicate that resolvable random address has been solved
+    GAPM_ADDR_SOLVED_IND,
+    /// Generate a random address.
+    GAPM_GEN_RAND_ADDR_CMD,
+    /// Use the AES-128 block in the controller
+    GAPM_USE_ENC_BLOCK_CMD,
+    ///  AES-128 block result indication
+    GAPM_USE_ENC_BLOCK_IND,
+    /// Generate a 8-byte random number
+    GAPM_GEN_RAND_NB_CMD,
+    /// Random Number Indication
+    GAPM_GEN_RAND_NB_IND,
+
+    /* Profile Management */
+    /// Create new task for specific profile
+    GAPM_PROFILE_TASK_ADD_CMD,
+    /// Inform that profile task has been added.
+    GAPM_PROFILE_ADDED_IND,
+
+    /// Indicate that a message has been received on an unknown task
+    GAPM_UNKNOWN_TASK_IND,
+
+    /* Data Length Extension */
+    /// Suggested Default Data Length indication
+    GAPM_SUGG_DFLT_DATA_LEN_IND,
+    /// Maximum Data Length indication
+    GAPM_MAX_DATA_LEN_IND,
+
+    /* Resolving list for controller-based privacy*/
+    /// Resolving address list address indication
+    GAPM_RAL_ADDR_IND = GAPM_MAX_DATA_LEN_IND + 3,
+
+    /* Set new IRK */
+    /// Modify current IRK
+    GAPM_SET_IRK_CMD,
+
+    /* LE Protocol/Service Multiplexer Management */
+    /// Register a LE Protocol/Service Multiplexer command
+    GAPM_LEPSM_REGISTER_CMD,
+    /// Unregister a LE Protocol/Service Multiplexer command
+    GAPM_LEPSM_UNREGISTER_CMD,
+
+    /* LE Test Mode */
+    /// Control of the test mode command
+    GAPM_LE_TEST_MODE_CTRL_CMD,
+    /// Indicate end of test mode
+    GAPM_LE_TEST_END_IND,
+
+    /// Provide statistic information about ISO exchange
+    GAPM_ISO_STAT_IND,
+
+    /* Secure Connections */
+    /// Request to provide DH Key
+    GAPM_GEN_DH_KEY_CMD,
+    /// Indicates the DH Key computation is complete and available
+    GAPM_GEN_DH_KEY_IND,
+    /// Retrieve Public Key
+    GAPM_GET_PUB_KEY_CMD,
+    /// Indicates the Public Key Pair value
+    GAPM_PUB_KEY_IND,
+
+    /* ************************************************ */
+    /* ------------ NEW COMMANDS FOR BLE 5 ------------ */
+    /* ************************************************ */
+
+    /* List Management Operations */
+    /// Get local or peer address
+    /// @see struct gapm_get_ral_addr_cmd
+    GAPM_GET_RAL_ADDR_CMD = TASK_FIRST_MSG(TASK_ID_GAPM) + GAPM_OP_OFFSET_LIST_MGMT,
+    /// Set content of either white list or resolving list or periodic advertiser list
+    /// @see struct gapm_list_set_wl_cmd
+    /// @see struct gapm_list_set_ral_cmd
+    /// @see struct gapm_list_set_pal_cmd
+    GAPM_LIST_SET_CMD,
+    /// Indicate size of list indicated in GAPM_GET_DEV_CONFIG_CMD message
+    /// @see struct gapm_list_size_ind
+    GAPM_LIST_SIZE_IND,
+
+    /* Extended Air Operations */
+    /// Create an advertising, a scanning, an initiating or a periodic synchronization activity
+    /// @see struct gapm_activity_create_cmd
+    /// @see struct gapm_activity_create_adv_cmd
+    GAPM_ACTIVITY_CREATE_CMD = TASK_FIRST_MSG(TASK_ID_GAPM) + GAPM_OP_OFFSET_EXT_AIR,
+    /// Start a previously created activity
+    /// @see struct gapm_activity_start_cmd
+    GAPM_ACTIVITY_START_CMD,
+    /// Stop either a given activity or all existing activities
+    /// @see struct gapm_activity_stop_cmd
+    GAPM_ACTIVITY_STOP_CMD,
+    /// Delete either a given activity or all existing activities
+    /// @see struct gapm_activity_delete_cmd
+    GAPM_ACTIVITY_DELETE_CMD,
+    /// Indicate that an activity has well been created
+    /// @see struct gapm_activity_create_ind
+    GAPM_ACTIVITY_CREATED_IND,
+    /// Indicate that an activity has been stopped and can be restarted
+    /// @see struct gapm_activity_stopped_ind
+    GAPM_ACTIVITY_STOPPED_IND,
+    /// Set either advertising data or scan response data or periodic advertising data
+    /// @see struct gapm_set_adv_data_cmd
+    GAPM_SET_ADV_DATA_CMD,
+    /// Indicate reception of an advertising report (periodic or not), a scan response report
+    /// @see struct gapm_ext_adv_report_ind
+    GAPM_EXT_ADV_REPORT_IND,
+    /// Indicate reception of a scan request
+    /// @see struct gapm_scan_request_ind
+    GAPM_SCAN_REQUEST_IND,
+    /// Indicate that synchronization has been successfully established with a periodic advertiser
+    /// @see struct gapm_sync_established_ind
+    GAPM_SYNC_ESTABLISHED_IND,
+    /// Indicate maximum advertising data length supported by controller
+    /// @see struct gapm_max_adv_data_len_ind
+    GAPM_MAX_ADV_DATA_LEN_IND,
+    /// Indicate number of available advertising sets
+    /// @see struct gapm_nb_adv_sets_ind
+    GAPM_NB_ADV_SETS_IND,
+    /// Indicate the transmit powers supported by the controller
+    /// @see struct gapm_dev_tx_power_ind
+    GAPM_DEV_TX_PWR_IND,
+    /// Indicate the RF path compensation values
+    /// @see struct gapm_dev_rf_path_comp_ind
+    GAPM_DEV_RF_PATH_COMP_IND,
+    /// Indication to the task that sends the unknown message
+    /// @see struct gapm_unknown_msg_ind
+    GAPM_UNKNOWN_MSG_IND,
+    /* ************************************************ */
+    /* -------------- Internal usage only ------------- */
+    /* ************************************************ */
+    /// Message received to unknown task received
+    GAPM_UNKNOWN_TASK_MSG,
+
+    /* Internal messages for timer events, not part of API */
+    /// Address renewal timeout indication
+    GAPM_ADDR_RENEW_TO_IND,
+    /// Automatic connection establishment timeout indication
+    GAPM_AUTO_CONN_TO_IND,
+
+    /* Addresses Management */
+    /// Renew random private addresses
+    /// @see struct gapm_addr_renew_cmd
+    GAPM_ADDR_RENEW_CMD,
+};
+
+
+/// GAP Manager operation type - application interface
+/*@TRACE*/
+enum gapm_operation
+{
+    /* No Operation (if nothing has been requested)     */
+    /* ************************************************ */
+    /// No operation.
+    GAPM_NO_OP                                     = 0x00,
+
+    /* Default operations                               */
+    /* ************************************************ */
+    /// Reset BLE subsystem: LL and HL.
+    GAPM_RESET,
+
+    /* Configuration operations                         */
+    /* ************************************************ */
+    /// Set device configuration
+    GAPM_SET_DEV_CONFIG = GAPM_RESET + 2,
+    /// Set device channel map
+    GAPM_SET_CHANNEL_MAP,
+
+    /* Retrieve device information                      */
+    /* ************************************************ */
+    /// Get Local device version
+    GAPM_GET_DEV_VERSION,
+    /// Get Local device BD Address
+    GAPM_GET_DEV_BDADDR,
+    /// Get device advertising power level
+    GAPM_GET_DEV_ADV_TX_POWER,
+    /// Get White List Size.
+    GAPM_GET_WLIST_SIZE,
+
+    /* Security / Encryption Toolbox                    */
+    /* ************************************************ */
+    /// Resolve device address
+    GAPM_RESOLV_ADDR = GAPM_GET_WLIST_SIZE + 15,
+    /// Generate a random address
+    GAPM_GEN_RAND_ADDR,
+    /// Use the controller's AES-128 block
+    GAPM_USE_ENC_BLOCK,
+    /// Generate a 8-byte random number
+    GAPM_GEN_RAND_NB,
+
+    /* Profile Management                               */
+    /* ************************************************ */
+    /// Create new task for specific profile
+    GAPM_PROFILE_TASK_ADD,
+
+    /* DEBUG                                            */
+    /* ************************************************ */
+    /// Get memory usage
+    GAPM_DBG_GET_MEM_INFO,
+    /// Perform a platform reset
+    GAPM_PLF_RESET,
+
+    /* Data Length Extension                            */
+    /* ************************************************ */
+    /// Set Suggested Default LE Data Length
+    GAPM_SET_SUGGESTED_DFLT_LE_DATA_LEN,
+    /// Get Suggested Default LE Data Length
+    GAPM_GET_SUGGESTED_DFLT_LE_DATA_LEN,
+    /// Get Maximum LE Data Length
+    GAPM_GET_MAX_LE_DATA_LEN,
+
+    /* Operation on Resolving List                      */
+    /* ************************************************ */
+    /// Get resolving address list size
+    GAPM_GET_RAL_SIZE,
+    /// Get resolving local address
+    GAPM_GET_RAL_LOC_ADDR,
+    /// Get resolving peer address
+    GAPM_GET_RAL_PEER_ADDR,
+
+    /* Change current IRK                               */
+    /* ************************************************ */
+    /// Set IRK
+    GAPM_SET_IRK = GAPM_GET_RAL_PEER_ADDR + 5,
+
+    /* LE Protocol/Service Multiplexer management       */
+    /* ************************************************ */
+    /// Register a LE Protocol/Service Multiplexer
+    GAPM_LEPSM_REG,
+    /// Unregister a LE Protocol/Service Multiplexer
+    GAPM_LEPSM_UNREG,
+
+    /* LE Direct Test Mode                              */
+    /* ************************************************ */
+    /// Stop the test mode
+    GAPM_LE_TEST_STOP,
+    /// Start RX Test Mode
+    GAPM_LE_TEST_RX_START,
+    /// Start TX Test Mode
+    GAPM_LE_TEST_TX_START,
+
+    /* Secure Connection                                */
+    /* ************************************************ */
+    /// Generate DH_Key
+    GAPM_GEN_DH_KEY,
+    /// Retrieve Public Key
+    GAPM_GET_PUB_KEY,
+
+    /* List Management                                  */
+    /* ************************************************ */
+    /// Set content of white list
+    GAPM_SET_WL = GAPM_NO_OP + GAPM_OP_OFFSET_LIST_MGMT,
+    /// Set content of resolving list
+    GAPM_SET_RAL,
+    /// Set content of periodic advertiser list
+    GAPM_SET_PAL,
+    /// Get white list size
+    //GAPM_GET_WHITE_LIST_SIZE,
+    /// Get resolving list size
+    //GAPM_GET_RAL_SIZE,
+    /// Get periodic advertiser list size
+    GAPM_GET_PAL_SIZE = GAPM_SET_PAL + 3,
+
+    /* Air Operations                                   */
+    /* ************************************************ */
+    /// Create advertising activity
+    GAPM_CREATE_ADV_ACTIVITY = GAPM_NO_OP + GAPM_OP_OFFSET_EXT_AIR,
+    /// Create scanning activity
+    GAPM_CREATE_SCAN_ACTIVITY,
+    /// Create initiating activity
+    GAPM_CREATE_INIT_ACTIVITY,
+    /// Create periodic synchronization activity
+    GAPM_CREATE_PERIOD_SYNC_ACTIVITY,
+    /// Start an activity
+    GAPM_START_ACTIVITY,
+    /// Stop an activity
+    GAPM_STOP_ACTIVITY,
+    /// Stop all activities
+    GAPM_STOP_ALL_ACTIVITIES,
+    /// Delete an activity
+    GAPM_DELETE_ACTIVITY,
+    /// Delete all activities
+    GAPM_DELETE_ALL_ACTIVITIES,
+    /// Set advertising data
+    GAPM_SET_ADV_DATA,
+    /// Set scan response data
+    GAPM_SET_SCAN_RSP_DATA,
+    /// Set periodic advertising data
+    GAPM_SET_PERIOD_ADV_DATA,
+    /// Get number of available advertising sets
+    GAPM_GET_NB_ADV_SETS,
+    /// Get maximum advertising data length supported by the controller
+    GAPM_GET_MAX_LE_ADV_DATA_LEN,
+    /// Get minimum and maximum transmit powers supported by the controller
+    GAPM_GET_DEV_TX_PWR,
+    /// Get the RF Path Compensation values used in the TX Power Level and RSSI calculation
+    GAPM_GET_DEV_RF_PATH_COMP,
+    /// INTERNAL OPERATION - Renew random addresses
+    GAPM_RENEW_ADDR,
+};
+
+/// Own BD address source of the device
+enum gapm_own_addr
+{
+   /// Public or Private Static Address according to device address configuration
+   GAPM_STATIC_ADDR,
+   /// Generated resolvable private random address
+   GAPM_GEN_RSLV_ADDR,
+   /// Generated non-resolvable private random address
+   GAPM_GEN_NON_RSLV_ADDR,
+};
+
+/// Device Attribute write permission requirement
+enum gapm_write_att_perm
+{
+    /// Disable write access
+    GAPM_WRITE_DISABLE     = 0,
+    /// Enable write access - no authentication required
+    GAPM_WRITE_NO_AUTH     = 1,
+    /// Write access requires unauthenticated link
+    GAPM_WRITE_UNAUTH      = 2,
+    /// Write access requires authenticated link
+    GAPM_WRITE_AUTH        = 3,
+    /// Write access requires secure connected link
+    GAPM_WRITE_SEC_CON     = 4
+};
+
+/// Attribute database configuration
+///   15   14   13   12   11   10    9    8    7    6    5    4    3    2    1    0
+/// +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
+/// | DBG|DBGT|          RFU                | SC |PCP |   APP_PERM   |   NAME_PERM  |
+/// +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
+/// - Bit [0-2] : Device Name write permission requirements for peer device (@see gapm_write_att_perm)
+/// - Bit [3-5] : Device Appearance write permission requirements for peer device (@see gapm_write_att_perm)
+/// - Bit [6]   : Slave Preferred Connection Parameters present
+/// - Bit [7]   : Service change feature present in GATT attribute database.
+/// - Bit [8-13]: Reserved
+/// - Bit [14]  : if Debug Mode enabled, forward all L2cap traffic to application
+/// - Bit [15]  : Enable Debug Mode
+enum gapm_att_cfg_flag
+{
+    /// Device Name write permission requirements for peer device (@see gapm_write_att_perm)
+    GAPM_MASK_ATT_NAME_PERM            = 0x0007,
+    GAPM_POS_ATT_NAME_PERM             = 0x00,
+    /// Device Appearance write permission requirements for peer device (@see gapm_write_att_perm)
+    GAPM_MASK_ATT_APPEARENCE_PERM      = 0x0038,
+    GAPM_POS_ATT_APPEARENCE_PERM       = 0x03,
+    /// Slave Preferred Connection Parameters present in GAP attribute database.
+    GAPM_MASK_ATT_SLV_PREF_CON_PAR_EN  = 0x0040,
+    GAPM_POS_ATT_SLV_PREF_CON_PAR_EN   = 0x06,
+    /// Service change feature present in GATT attribute database.
+    GAPM_MASK_ATT_SVC_CHG_EN           = 0x0080,
+    GAPM_POS_ATT_SVC_CHG_EN            = 0x07,
+    /// if Debug Mode enabled, forward all L2cap traffic to application
+    GAPM_MASK_ATT_DBG_L2CAP_TRAFFIC_EN = 0x4000,
+    GAPM_POS_ATT_DBG_L2CAP_TRAFFIC_EN  = 0x0E,
+    /// Enable Debug Mode
+    GAPM_MASK_ATT_DBG_MODE_EN          = 0x8000,
+    GAPM_POS_ATT_DBG_MODE_EN           = 0x0F,
+};
+
+/// Pairing mode authorized on the device
+///    7    6    5    4    3    2    1    0
+/// +----+----+----+----+----+----+----+----+
+/// |KGEN|          RFU           | SCP| LP |
+/// +----+----+----+----+----+----+----+----+
+enum gapm_pairing_mode
+{
+    /// No pairing authorized
+    GAPM_PAIRING_DISABLE  = 0,
+    /// Legacy pairing Authorized
+    GAPM_PAIRING_LEGACY   = (1 << 0),
+    /// Secure Connection pairing Authorized
+    GAPM_PAIRING_SEC_CON  = (1 << 1),
+
+
+    /// Force re-generation of P256 private and public keys
+    GAPM_PAIRING_FORCE_P256_KEY_GEN = (1<<7),
+};
+
+/// LE Audio Mode Configuration
+///   15   14   13   12   11   10    9    8    7    6    5    4    3    2    1    0
+/// +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
+/// |                                 RFU                                      | AM0|
+/// +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
+enum gapm_audio_cfg_flag
+{
+    /// LE Audio Mode 0 Supported
+    GAPM_MASK_AUDIO_AM0_SUP           = 0x0001,
+    GAPM_POS_AUDIO_AM0_SUP            = 0x00,
+};
+
+/// Security level
+///   7   6   5   4   3   2   1   0
+/// +---+---+---+---+---+---+---+---+
+/// |MI |      RFU      |EKS|SEC_LVL|
+/// +---+---+---+---+---+---+---+---+
+/// bit[0-1]: Security level requirement (0=NO_AUTH, 1=UNAUTH, 2=AUTH, 3=SEC_CON)
+/// bit[2]  : Encryption Key Size length must have 16 bytes
+/// bit[7]  : Multi-instantiated task
+enum gapm_le_psm_sec_mask
+{
+    /// bit[0-1]: Security level requirement (0=NO_AUTH, 1=UNAUTH, 2=AUTH, 3=SEC_CON)
+    /// bit[2]  : Encryption Key Size length must have 16 bytes
+    GAPM_LE_PSM_SEC_LVL_MASK  = 0x07,
+    /// bit[7]  : Multi-instantiated task
+    GAPM_LE_PSM_MI_TASK_MASK  = 0x80,
+};
+
+/// Type of activities that can be created
+/*@TRACE*/
+enum gapm_actv_type
+{
+    /// Advertising activity
+    GAPM_ACTV_TYPE_ADV = 0,
+    /// Scanning activity
+    GAPM_ACTV_TYPE_SCAN,
+    /// Initiating activity
+    GAPM_ACTV_TYPE_INIT,
+    /// Periodic synchronization activity
+    GAPM_ACTV_TYPE_PER_SYNC,
+};
+
+/// Type of advertising that can be created
+enum gapm_adv_type
+{
+    /// Legacy advertising
+    GAPM_ADV_TYPE_LEGACY = 0,
+    /// Extended advertising
+    GAPM_ADV_TYPE_EXTENDED,
+    /// Periodic advertising
+    GAPM_ADV_TYPE_PERIODIC,
+};
+
+/// Advertising report type
+enum gapm_adv_report_type
+{
+    /// Extended advertising report
+    GAPM_REPORT_TYPE_ADV_EXT = 0,
+    /// Legacy advertising report
+    GAPM_REPORT_TYPE_ADV_LEG,
+    /// Extended scan response report
+    GAPM_REPORT_TYPE_SCAN_RSP_EXT,
+    /// Legacy scan response report
+    GAPM_REPORT_TYPE_SCAN_RSP_LEG,
+    /// Periodic advertising report
+    GAPM_REPORT_TYPE_PER_ADV,
+};
+
+/// Advertising properties bit field bit positions
+enum gapm_adv_prop_pos
+{
+    /// Indicate that advertising is connectable, reception of CONNECT_REQ or AUX_CONNECT_REQ
+    /// PDUs is accepted. Not applicable for periodic advertising.
+    GAPM_ADV_PROP_CONNECTABLE_POS     = 0,
+    /// Indicate that advertising is scannable, reception of SCAN_REQ or AUX_SCAN_REQ PDUs is
+    /// accepted
+    GAPM_ADV_PROP_SCANNABLE_POS,
+    /// Indicate that advertising targets a specific device. Only apply in following cases:
+    ///   - Legacy advertising: if connectable
+    ///   - Extended advertising: connectable or (non connectable and non discoverable)
+    GAPM_ADV_PROP_DIRECTED_POS,
+    /// Indicate that High Duty Cycle has to be used for advertising on primary channel
+    /// Apply only if created advertising is not an extended advertising
+    GAPM_ADV_PROP_HDC_POS,
+    /// Bit 4 is reserved
+    GAPM_ADV_PROP_RESERVED_4_POS,
+    /// Enable anonymous mode. Device address won't appear in send PDUs
+    /// Valid only if created advertising is an extended advertising
+    GAPM_ADV_PROP_ANONYMOUS_POS,
+    /// Include TX Power in the extended header of the advertising PDU.
+    /// Valid only if created advertising is not a legacy advertising
+    GAPM_ADV_PROP_TX_PWR_POS,
+    /// Include TX Power in the periodic advertising PDU.
+    /// Valid only if created advertising is a periodic advertising
+    GAPM_ADV_PROP_PER_TX_PWR_POS,
+    /// Indicate if application must be informed about received scan requests PDUs
+    GAPM_ADV_PROP_SCAN_REQ_NTF_EN_POS,
+};
+
+/// Advertising properties bit field bit value
+enum gapm_adv_prop
+{
+    /// Indicate that advertising is connectable, reception of CONNECT_REQ or AUX_CONNECT_REQ
+    /// PDUs is accepted. Not applicable for periodic advertising.
+    GAPM_ADV_PROP_CONNECTABLE_BIT     = CO_BIT(GAPM_ADV_PROP_CONNECTABLE_POS),
+    /// Indicate that advertising is scannable, reception of SCAN_REQ or AUX_SCAN_REQ PDUs is
+    /// accepted
+    GAPM_ADV_PROP_SCANNABLE_BIT       = CO_BIT(GAPM_ADV_PROP_SCANNABLE_POS),
+    /// Indicate that advertising targets a specific device. Only apply in following cases:
+    ///   - Legacy advertising: if connectable
+    ///   - Extended advertising: connectable or (non connectable and non discoverable)
+    GAPM_ADV_PROP_DIRECTED_BIT        = CO_BIT(GAPM_ADV_PROP_DIRECTED_POS),
+    /// Indicate that High Duty Cycle has to be used for advertising on primary channel
+    /// Apply only if created advertising is not an extended advertising
+    GAPM_ADV_PROP_HDC_BIT             = CO_BIT(GAPM_ADV_PROP_HDC_POS),
+    /// Bit 4 is reserved
+    GAPM_ADV_PROP_RESERVED_4_BIT      = CO_BIT(GAPM_ADV_PROP_RESERVED_4_POS),
+    /// Enable anonymous mode. Device address won't appear in send PDUs
+    /// Valid only if created advertising is an extended advertising
+    GAPM_ADV_PROP_ANONYMOUS_BIT       = CO_BIT(GAPM_ADV_PROP_ANONYMOUS_POS),
+    /// Include TX Power in the extended header of the advertising PDU.
+    /// Valid only if created advertising is not a legacy advertising
+    GAPM_ADV_PROP_TX_PWR_BIT          = CO_BIT(GAPM_ADV_PROP_TX_PWR_POS),
+    /// Include TX Power in the periodic advertising PDU.
+    /// Valid only if created advertising is a periodic advertising
+    GAPM_ADV_PROP_PER_TX_PWR_BIT      = CO_BIT(GAPM_ADV_PROP_PER_TX_PWR_POS),
+    /// Indicate if application must be informed about received scan requests PDUs
+    GAPM_ADV_PROP_SCAN_REQ_NTF_EN_BIT = CO_BIT(GAPM_ADV_PROP_SCAN_REQ_NTF_EN_POS),
+};
+
+/// Advertising discovery mode
+enum gapm_adv_disc_mode
+{
+    /// Mode in non-discoverable
+    GAPM_ADV_MODE_NON_DISC = 0,
+    /// Mode in general discoverable
+    GAPM_ADV_MODE_GEN_DISC,
+    /// Mode in limited discoverable
+    GAPM_ADV_MODE_LIM_DISC,
+    /// Broadcast mode without presence of AD_TYPE_FLAG in advertising data
+    GAPM_ADV_MODE_BEACON,
+    GAPM_ADV_MODE_MAX,
+};
+
+/// Scanning Types
+enum gapm_scan_type
+{
+    /// General discovery
+    GAPM_SCAN_TYPE_GEN_DISC = 0,
+    /// Limited discovery
+    GAPM_SCAN_TYPE_LIM_DISC,
+    /// Observer
+    GAPM_SCAN_TYPE_OBSERVER,
+    /// Selective observer
+    GAPM_SCAN_TYPE_SEL_OBSERVER,
+    /// Connectable discovery
+    GAPM_SCAN_TYPE_CONN_DISC,
+    /// Selective connectable discovery
+    GAPM_SCAN_TYPE_SEL_CONN_DISC,
+};
+
+/// Scanning properties bit field bit value
+enum gapm_scan_prop
+{
+    /// Scan advertisement on the LE 1M PHY
+    GAPM_SCAN_PROP_PHY_1M_BIT       = (1 << 0),
+    /// Scan advertisement on the LE Coded PHY
+    GAPM_SCAN_PROP_PHY_CODED_BIT    = (1 << 1),
+    /// Active scan on LE 1M PHY (Scan Request PDUs may be sent)
+    GAPM_SCAN_PROP_ACTIVE_1M_BIT    = (1 << 2),
+    /// Active scan on LE Coded PHY (Scan Request PDUs may be sent)
+    GAPM_SCAN_PROP_ACTIVE_CODED_BIT = (1 << 3),
+    /// Accept directed advertising packets if we use a RPA and target address cannot be solved by the
+    /// controller
+    GAPM_SCAN_PROP_ACCEPT_RPA_BIT   = (1 << 4),
+    /// Filter truncated advertising or scan response reports
+    GAPM_SCAN_PROP_FILT_TRUNC_BIT   = (1 << 5),
+};
+
+/// Initiating Types
+enum gapm_init_type
+{
+    /// Direct connection establishment, establish a connection with an indicated device
+    GAPM_INIT_TYPE_DIRECT_CONN_EST = 0,
+    /// Automatic connection establishment, establish a connection with all devices whose address is
+    /// present in the white list
+    GAPM_INIT_TYPE_AUTO_CONN_EST,
+    /// Name discovery, Establish a connection with an indicated device in order to read content of its
+    /// Device Name characteristic. Connection is closed once this operation is stopped.
+    GAPM_INIT_TYPE_NAME_DISC,
+};
+
+/// Initiating Properties
+enum gapm_init_prop
+{
+    /// Scan connectable advertisements on the LE 1M PHY. Connection parameters for the LE 1M PHY are provided
+    GAPM_INIT_PROP_1M_BIT       = (1 << 0),
+    /// Connection parameters for the LE 2M PHY are provided
+    GAPM_INIT_PROP_2M_BIT       = (1 << 1),
+    /// Scan connectable advertisements on the LE Coded PHY. Connection parameters for the LE Coded PHY are provided
+    GAPM_INIT_PROP_CODED_BIT    = (1 << 2),
+};
+
+/// Advertising report information
+enum gapm_adv_report_info
+{
+    /// Report Type
+    GAPM_REPORT_INFO_REPORT_TYPE_MASK    = 0x07,
+    /// Report is complete
+    GAPM_REPORT_INFO_COMPLETE_BIT        = (1 << 3),
+    /// Connectable advertising
+    GAPM_REPORT_INFO_CONN_ADV_BIT        = (1 << 4),
+    /// Scannable advertising
+    GAPM_REPORT_INFO_SCAN_ADV_BIT        = (1 << 5),
+    /// Directed advertising
+    GAPM_REPORT_INFO_DIR_ADV_BIT         = (1 << 6),
+};
+
+/// Filtering policy for duplicated packets
+enum gapm_dup_filter_pol
+{
+    /// Disable filtering of duplicated packets
+    GAPM_DUP_FILT_DIS = 0,
+    /// Enable filtering of duplicated packets
+    GAPM_DUP_FILT_EN,
+    /// Enable filtering of duplicated packets, reset for each scan period
+    GAPM_DUP_FILT_EN_PERIOD,
+};
+
+/// Periodic synchronization types
+enum gapm_per_sync_type
+{
+    /// Do not use periodic advertiser list for synchronization. Use advertiser information provided
+    /// in the GAPM_ACTIVITY_START_CMD.
+    GAPM_PER_SYNC_TYPE_GENERAL = 0,
+    /// Use periodic advertiser list for synchronization
+    GAPM_PER_SYNC_TYPE_SELECTIVE,
+};
+
+/// PHY Type
+enum gapm_phy_type
+{
+    /// LE 1M
+    GAPM_PHY_TYPE_LE_1M = 0,
+    /// LE 2M
+    GAPM_PHY_TYPE_LE_2M,
+    /// LE Coded
+    GAPM_PHY_TYPE_LE_CODED,
+};
+
+/// -------------------------------------------------------------------------------------
+/// Masks for advertising properties
+/// -------------------------------------------------------------------------------------
+
+/// Advertising properties configurations for legacy advertising
+enum gapm_leg_adv_prop
+{
+    /// Non connectable non scannable advertising
+    GAPM_ADV_PROP_NON_CONN_NON_SCAN_MASK  = 0x0000,
+    /// Broadcast non scannable advertising - Discovery mode must be Non Discoverable
+    GAPM_ADV_PROP_BROADCAST_NON_SCAN_MASK = GAPM_ADV_PROP_NON_CONN_NON_SCAN_MASK,
+    /// Non connectable scannable advertising
+    GAPM_ADV_PROP_NON_CONN_SCAN_MASK      = GAPM_ADV_PROP_SCANNABLE_BIT,
+    /// Broadcast non scannable advertising - Discovery mode must be Non Discoverable
+    GAPM_ADV_PROP_BROADCAST_SCAN_MASK     = GAPM_ADV_PROP_NON_CONN_SCAN_MASK,
+    /// Undirected connectable advertising
+    GAPM_ADV_PROP_UNDIR_CONN_MASK         = GAPM_ADV_PROP_CONNECTABLE_BIT | GAPM_ADV_PROP_SCANNABLE_BIT,
+    /// Directed connectable advertising
+    GAPM_ADV_PROP_DIR_CONN_MASK           = GAPM_ADV_PROP_DIRECTED_BIT | GAPM_ADV_PROP_CONNECTABLE_BIT,
+    /// Directed connectable with Low Duty Cycle
+    GAPM_ADV_PROP_DIR_CONN_LDC_MASK       = GAPM_ADV_PROP_DIR_CONN_MASK,
+    /// Directed connectable with High Duty Cycle
+    GAPM_ADV_PROP_DIR_CONN_HDC_MASK       = GAPM_ADV_PROP_DIR_CONN_MASK | GAPM_ADV_PROP_HDC_BIT,
+};
+
+/// Advertising properties configurations for extended advertising
+enum gapm_ext_adv_prop
+{
+    /// Non connectable non scannable extended advertising
+    GAPM_EXT_ADV_PROP_NON_CONN_NON_SCAN_MASK = 0x0000,
+    /// Non connectable scannable extended advertising
+    GAPM_EXT_ADV_PROP_NON_CONN_SCAN_MASK     = GAPM_ADV_PROP_SCANNABLE_BIT,
+    /// Non connectable scannable directed extended advertising
+    GAPM_EXT_ADV_PROP_NON_CONN_SCAN_DIR_MASK = GAPM_ADV_PROP_SCANNABLE_BIT | GAPM_ADV_PROP_DIRECTED_BIT,
+    /// Non connectable anonymous directed extended advertising
+    GAPM_EXT_ADV_PROP_ANONYM_DIR_MASK        = GAPM_ADV_PROP_ANONYMOUS_BIT | GAPM_ADV_PROP_DIRECTED_BIT,
+    /// Undirected connectable extended advertising
+    GAPM_EXT_ADV_PROP_UNDIR_CONN_MASK        = GAPM_ADV_PROP_CONNECTABLE_BIT,
+    /// Directed connectable extended advertising
+    GAPM_EXT_ADV_PROP_DIR_CONN_MASK          = GAPM_ADV_PROP_CONNECTABLE_BIT | GAPM_ADV_PROP_DIRECTED_BIT,
+};
+
+/// Advertising properties configurations for periodic advertising
+enum gapm_per_adv_prop
+{
+    /// Undirected periodic advertising
+    GAPM_PER_ADV_PROP_UNDIR_MASK = 0x0000,
+    /// Directed periodic advertising
+    GAPM_PER_ADV_PROP_DIR_MASK   = GAPM_ADV_PROP_DIRECTED_BIT,
+};
+
+/// Clock accuracy values
+enum gapm_clk_acc
+{
+    /// 500 ppm
+    GAPM_CLK_ACC_500 = 0,
+    /// 250 ppm
+    GAPM_CLK_ACC_250,
+    /// 150 ppm
+    GAPM_CLK_ACC_150,
+    /// 100 ppm
+    GAPM_CLK_ACC_100,
+    /// 75 ppm
+    GAPM_CLK_ACC_75,
+    /// 50 ppm
+    GAPM_CLK_ACC_50,
+    /// 30 ppm
+    GAPM_CLK_ACC_30,
+    /// 20 ppm
+    GAPM_CLK_ACC_20,
+};
+
+/// Privacy configuration
+enum gapm_priv_cfg
+{
+    /// Indicate if identity address is a public (0) or static private random (1) address
+    GAPM_PRIV_CFG_PRIV_ADDR_BIT = (1 << 0),
+    /// Reserved
+    GAPM_PRIV_CFG_RSVD          = (1 << 1),
+    /// Indicate if controller privacy is enabled
+    GAPM_PRIV_CFG_PRIV_EN_BIT   = (1 << 2),
+};
+
+/*
+ * TYPE DEFINITIONS
+ ****************************************************************************************
+ */
+
+/// Configuration for advertising on primary channel
+/*@TRACE*/
+struct gapm_adv_prim_cfg
+{
+    /// Minimum advertising interval (in unit of 625us). Must be greater than 20ms
+    uint32_t adv_intv_min;
+    /// Maximum advertising interval (in unit of 625us). Must be greater than 20ms
+    uint32_t adv_intv_max;
+    /// Bit field indicating the channel mapping
+    uint8_t chnl_map;
+    /// Indicate on which PHY primary advertising has to be performed (@see enum gapm_phy_type)
+    /// Note that LE 2M PHY is not allowed and that legacy advertising only support LE 1M PHY
+    uint8_t phy;
+};
+
+/// Configuration for advertising on secondary channel
+struct gapm_adv_second_cfg
+{
+    /// Maximum number of advertising events the controller can skip before sending the
+    /// AUX_ADV_IND packets. 0 means that AUX_ADV_IND PDUs shall be sent prior each
+    /// advertising events
+    uint8_t max_skip;
+    /// Indicate on which PHY secondary advertising has to be performed (@see enum gapm_phy_type)
+    uint8_t phy;
+    /// Advertising SID
+    uint8_t adv_sid;
+};
+
+/// Configuration for periodic advertising
+struct gapm_adv_period_cfg
+{
+    /// Minimum advertising interval (in unit of 1.25ms). Must be greater than 20ms
+    uint16_t adv_intv_min;
+    /// Maximum advertising interval (in unit of 1.25ms). Must be greater than 20ms
+    uint16_t adv_intv_max;
+};
+
+/// Advertising parameters for advertising creation
+struct gapm_adv_create_param
+{
+    /// Advertising type (@see enum gapm_adv_type)
+    uint8_t type;
+    /// Discovery mode (@see enum gapm_adv_disc_mode)
+    uint8_t disc_mode;
+    /// Bit field value provided advertising properties (@see enum gapm_adv_prop for bit signification)
+    uint16_t prop;
+    /// Maximum power level at which the advertising packets have to be transmitted
+    /// (between -127 and 126 dBm)
+    int8_t max_tx_pwr;
+    /// Advertising filtering policy (@see enum adv_filter_policy)
+    uint8_t filter_pol;
+    /// Peer address configuration (only used in case of directed advertising)
+    struct gap_bdaddr peer_addr;
+    /// Configuration for primary advertising
+    struct gapm_adv_prim_cfg prim_cfg;
+    /// Configuration for secondary advertising (valid only if advertising type is
+    /// GAPM_ADV_TYPE_EXTENDED or GAPM_ADV_TYPE_PERIODIC)
+    struct gapm_adv_second_cfg second_cfg;
+    /// Configuration for periodic advertising (valid only if advertising type os
+    /// GAPM_ADV_TYPE_PERIODIC)
+    struct gapm_adv_period_cfg period_cfg;
+};
+
+/// Additional advertising parameters
+/*@TRACE*/
+struct gapm_adv_param
+{
+    /// Advertising duration (in unit of 10ms). 0 means that advertising continues
+    /// until the host disable it
+    uint16_t duration;
+    /// Maximum number of extended advertising events the controller shall attempt to send prior to
+    /// terminating the extending advertising
+    /// Valid only if extended advertising
+    uint8_t max_adv_evt;
+};
+
+/// Scan Window operation parameters
+/*@TRACE*/
+struct gapm_scan_wd_op_param
+{
+    /// Scan interval
+    uint16_t scan_intv;
+    /// Scan window
+    uint16_t scan_wd;
+};
+
+/// Scanning parameters
+/*@TRACE*/
+struct gapm_scan_param
+{
+    /// Type of scanning to be started (@see enum gapm_scan_type)
+    uint8_t type;
+    /// Properties for the scan procedure (@see enum gapm_scan_prop for bit signification)
+    uint8_t prop;
+    /// Duplicate packet filtering policy
+    uint8_t dup_filt_pol;
+    /// Reserved for future use
+    uint8_t rsvd;
+    /// Scan window opening parameters for LE 1M PHY
+    struct gapm_scan_wd_op_param scan_param_1m;
+    /// Scan window opening parameters for LE Coded PHY
+    struct gapm_scan_wd_op_param scan_param_coded;
+    /// Scan duration (in unit of 10ms). 0 means that the controller will scan continuously until
+    /// reception of a stop command from the application
+    uint16_t duration;
+    /// Scan period (in unit of 1.28s). Time interval between two consequent starts of a scan duration
+    /// by the controller. 0 means that the scan procedure is not periodic
+    uint16_t period;
+};
+
+/// Connection parameters
+/*@TRACE*/
+struct gapm_conn_param
+{
+    /// Minimum value for the connection interval (in unit of 1.25ms). Shall be less than or equal to
+    /// conn_intv_max value. Allowed range is 7.5ms to 4s.
+    uint16_t conn_intv_min;
+    /// Maximum value for the connection interval (in unit of 1.25ms). Shall be greater than or equal to
+    /// conn_intv_min value. Allowed range is 7.5ms to 4s.
+    uint16_t conn_intv_max;
+    /// Slave latency. Number of events that can be missed by a connected slave device
+    uint16_t conn_latency;
+    /// Link supervision timeout (in unit of 10ms). Allowed range is 100ms to 32s
+    uint16_t supervision_to;
+    /// Recommended minimum duration of connection events (in unit of 625us)
+    uint16_t ce_len_min;
+    /// Recommended maximum duration of connection events (in unit of 625us)
+    uint16_t ce_len_max;
+};
+
+/// Initiating parameters
+/*@TRACE*/
+struct gapm_init_param
+{
+    /// Initiating type (@see enum gapm_init_type)
+    uint8_t type;
+    /// Properties for the initiating procedure (@see enum gapm_init_prop for bit signification)
+    uint8_t prop;
+    /// Timeout for automatic connection establishment (in unit of 10ms). Cancel the procedure if not all
+    /// indicated devices have been connected when the timeout occurs. 0 means there is no timeout
+    uint16_t conn_to;
+    /// Scan window opening parameters for LE 1M PHY
+    struct gapm_scan_wd_op_param scan_param_1m;
+    /// Scan window opening parameters for LE Coded PHY
+    struct gapm_scan_wd_op_param scan_param_coded;
+    /// Connection parameters for LE 1M PHY
+    struct gapm_conn_param conn_param_1m;
+    /// Connection parameters for LE 2M PHY
+    struct gapm_conn_param conn_param_2m;
+    /// Connection parameters for LE Coded PHY
+    struct gapm_conn_param conn_param_coded;
+    /// Address of peer device in case white list is not used for connection
+    struct gap_bdaddr peer_addr;
+};
+
+/// Periodic advertising information
+/*@TRACE*/
+struct gapm_period_adv_addr_cfg
+{
+    /// Advertiser address information
+    struct gap_bdaddr addr;
+    /// Advertising SID
+    uint8_t adv_sid;
+};
+
+/// Periodic synchronization parameters
+/*@TRACE*/
+struct gapm_per_sync_param
+{
+    /// Number of periodic advertising that can be skipped after a successful receive. Maximum authorized
+    /// value is 499
+    uint16_t skip;
+    /// Synchronization timeout for the periodic advertising (in unit of 10ms between 100ms and 163.84s)
+    uint16_t sync_to;
+    /// Periodic synchronization type (@see enum gapm_per_sync_type)
+    uint8_t type;
+    /// Reserved for future use
+    uint8_t rsvd;
+    /// Address of advertiser with which synchronization has to be established (used only if use_pal is false)
+    struct gapm_period_adv_addr_cfg adv_addr;
+};
+
+/// Operation command structure in order to keep requested operation.
+struct gapm_operation_cmd
+{
+    /// GAP request type
+    uint8_t operation;
+};
+
+/// Command complete event data structure
+/*@TRACE*/
+struct gapm_cmp_evt
+{
+    /// GAP requested operation
+    uint8_t operation;
+    /// Status of the request
+    uint8_t status;
+};
+
+///  Reset link layer and the host command
+/*@TRACE*/
+struct gapm_reset_cmd
+{
+    /// GAPM requested operation:
+    /// - GAPM_RESET: Reset BLE subsystem: LL and HL.
+    uint8_t operation;
+};
+
+/// Set device configuration command
+/*@TRACE*/
+struct gapm_set_dev_config_cmd
+{
+    /// GAPM requested operation:
+    ///  - GAPM_SET_DEV_CONFIG: Set device configuration
+    uint8_t operation;
+    /// Device Role: Central, Peripheral, Observer, Broadcaster or All roles.
+    uint8_t role;
+
+    /// -------------- Privacy Config -----------------------
+    /// Duration before regenerate device address when privacy is enabled. - in seconds
+    uint16_t renew_dur;
+    /// Provided own static private random address
+    bd_addr_t addr;
+    /// Device IRK used for resolvable random BD address generation (LSB first)
+    struct gap_sec_key irk;
+    /// Privacy configuration bit field (@see enum gapm_priv_cfg for bit signification)
+    uint8_t privacy_cfg;
+
+    /// -------------- Security Config -----------------------
+
+    /// Pairing mode authorized (@see enum gapm_pairing_mode)
+    uint8_t pairing_mode;
+
+    /// -------------- ATT Database Config -----------------------
+
+    /// GAP service start handle
+    uint16_t gap_start_hdl;
+    /// GATT service start handle
+    uint16_t gatt_start_hdl;
+
+    /// Attribute database configuration (@see enum gapm_att_cfg_flag)
+    uint16_t  att_cfg;
+
+    /// -------------- LE Data Length Extension -----------------------
+    ///Suggested value for the Controller's maximum transmitted number of payload octets to be used
+    uint16_t sugg_max_tx_octets;
+    ///Suggested value for the Controller's maximum packet transmission time to be used
+    uint16_t sugg_max_tx_time;
+
+    /// --------------- L2CAP Configuration ---------------------------
+    /// Maximal MTU acceptable for device
+    uint16_t max_mtu;
+    /// Maximal MPS Packet size acceptable for device
+    uint16_t max_mps;
+    /// Maximum number of LE Credit based connection that can be established
+    uint8_t  max_nb_lecb;
+
+    /// --------------- LE Audio Mode Supported -----------------------
+    ///
+    /// LE Audio Mode Configuration (@see gapm_audio_cfg_flag)
+    uint16_t  audio_cfg;
+
+    /// ------------------ LE PHY Management  -------------------------
+    /// Preferred LE PHY for data transmission (@see enum gap_phy)
+    uint8_t tx_pref_phy;
+    /// Preferred LE PHY for data reception (@see enum gap_phy)
+    uint8_t rx_pref_phy;
+
+    /// ------------------ Miscellaneous 2 ----------------------------
+    /// RF TX Path Compensation value (from -128dB to 128dB, unit is 0.1dB)
+    uint16_t tx_path_comp;
+    /// RF RX Path Compensation value (from -128dB to 128dB, unit is 0.1dB)
+    uint16_t rx_path_comp;
+};
+
+/// Set new IRK
+/*@TRACE*/
+struct gapm_set_irk_cmd
+{
+    /// GAPM requested operation:
+    ///  - GAPM_SET_IRK: Set device configuration
+    uint8_t operation;
+    /// Device IRK used for resolvable random BD address generation (LSB first)
+    struct gap_sec_key irk;
+};
+
+/// Set device channel map
+/*@TRACE*/
+struct gapm_set_channel_map_cmd
+{
+    /// GAPM requested operation:
+    ///  - GAPM_SET_CHANNEL_MAP: Set device channel map.
+    uint8_t operation;
+    /// Channel map
+    le_chnl_map_t chmap;
+};
+
+/// Get local device info command
+/*@TRACE*/
+struct gapm_get_dev_info_cmd
+{
+    /// GAPM requested operation:
+    ///  - GAPM_GET_DEV_VERSION: Get Local device version
+    ///  - GAPM_GET_DEV_BDADDR: Get Local device BD Address
+    ///  - GAPM_GET_DEV_ADV_TX_POWER: Get device advertising power level
+    ///  - GAPM_DBG_GET_MEM_INFO: Get memory usage (debug only)
+    uint8_t operation;
+};
+
+/// Local device version indication event
+/*@TRACE*/
+struct gapm_dev_version_ind
+{
+    /// HCI version
+    uint8_t hci_ver;
+    /// LMP version
+    uint8_t lmp_ver;
+    /// Host version
+    uint8_t host_ver;
+    /// HCI revision
+    uint16_t hci_subver;
+    /// LMP subversion
+    uint16_t lmp_subver;
+    /// Host revision
+    uint16_t host_subver;
+    /// Manufacturer name
+    uint16_t manuf_name;
+};
+
+/// Local device BD Address indication event
+/*@TRACE*/
+struct gapm_dev_bdaddr_ind
+{
+    /// Local device address information
+    struct gap_bdaddr addr;
+    /// Activity index
+    uint8_t actv_idx;
+};
+
+/// Advertising channel Tx power level indication event
+/*@TRACE*/
+struct gapm_dev_adv_tx_power_ind
+{
+    /// Advertising channel Tx power level
+    int8_t     power_lvl;
+};
+
+/// Resolving Address indication event
+/*@TRACE*/
+struct gapm_ral_addr_ind
+{
+    /// Peer or local read operation
+    uint8_t operation;
+    /// Resolving List address
+    struct gap_bdaddr addr;
+};
+
+/// Resolve Address command
+/*@TRACE*/
+struct gapm_resolv_addr_cmd
+{
+    /// GAPM requested operation:
+    ///  - GAPM_RESOLV_ADDR: Resolve device address
+    uint8_t operation;
+    /// Number of provided IRK (sahlle be > 0)
+    uint8_t nb_key;
+    /// Resolvable random address to solve
+    bd_addr_t addr;
+    /// Array of IRK used for address resolution (MSB -> LSB)
+    struct gap_sec_key irk[__ARRAY_EMPTY];
+};
+
+/// Indicate that resolvable random address has been solved
+/*@TRACE*/
+struct gapm_addr_solved_ind
+{
+    /// Resolvable random address solved
+    bd_addr_t addr;
+    /// IRK that correctly solved the random address
+    struct gap_sec_key irk;
+};
+
+/// Name of peer device indication
+/*@TRACE*/
+struct gapm_peer_name_ind
+{
+    /// peer device bd address
+    bd_addr_t addr;
+    /// peer device address type
+    uint8_t addr_type;
+    /// peer device name length
+    uint8_t name_len;
+    /// peer device name
+    uint8_t name[__ARRAY_EMPTY];
+};
+
+/// Generate a random address.
+/*@TRACE*/
+struct gapm_gen_rand_addr_cmd
+{
+    /// GAPM requested operation:
+    ///  - GAPM_GEN_RAND_ADDR: Generate a random address
+    uint8_t  operation;
+    /// Dummy parameter used to store the prand part of the address
+    uint8_t  prand[GAP_ADDR_PRAND_LEN];
+    /// Random address type @see gap_rnd_addr_type
+    ///  - GAP_STATIC_ADDR: Static random address
+    ///  - GAP_NON_RSLV_ADDR: Private non resolvable address
+    ///  - GAP_RSLV_ADDR: Private resolvable address
+    uint8_t rnd_type;
+};
+
+/// Parameters of the @ref GAPM_USE_ENC_BLOCK_CMD message
+/*@TRACE*/
+struct gapm_use_enc_block_cmd
+{
+    /// Command Operation Code (shall be GAPM_USE_ENC_BLOCK)
+    uint8_t operation;
+    /// Operand 1
+    uint8_t operand_1[GAP_KEY_LEN];
+    /// Operand 2
+    uint8_t operand_2[GAP_KEY_LEN];
+};
+
+/// Parameters of the @ref GAPM_USE_ENC_BLOCK_IND message
+/*@TRACE*/
+struct gapm_use_enc_block_ind
+{
+    /// Result (16 bytes)
+    uint8_t result[GAP_KEY_LEN];
+};
+
+/// Parameters of the @ref GAPM_GEN_DH_KEY_CMD message
+/*@TRACE*/
+struct gapm_gen_dh_key_cmd
+{
+    /// Command Operation Code (shall be GAPM_GEN_DH_KEY)
+    uint8_t operation;
+    /// X coordinate
+    uint8_t operand_1[GAP_P256_KEY_LEN];
+    /// Y coordinate
+    uint8_t operand_2[GAP_P256_KEY_LEN];
+};
+
+/// Parameters of the @ref GAPM_GEN_DH_KEY_IND message
+/*@TRACE*/
+struct gapm_gen_dh_key_ind
+{
+    /// Result (32 bytes)
+    uint8_t result[GAP_P256_KEY_LEN];
+};
+
+/// Parameters of the @ref GAPM_GET_PUB_KEY_CMD message
+/*@TRACE*/
+struct gapm_get_pub_key_cmd
+{
+    /// Command Operation Code (shall be GAPM_GET_PUB_KEY)
+    uint8_t operation;
+    /// 1 to renew, 0 to read current value
+    uint8_t renew;
+};
+
+/// Parameters of the @ref GAPM_PUB_KEY_IND message
+/*@TRACE*/
+struct gapm_pub_key_ind
+{
+    /// X coordinate
+    uint8_t pub_key_x[GAP_P256_KEY_LEN];
+    /// Y coordinate
+    uint8_t pub_key_y[GAP_P256_KEY_LEN];
+};
+
+/// Parameters of the @ref GAPM_GEN_RAND_NB_CMD message
+/*@TRACE*/
+struct gapm_gen_rand_nb_cmd
+{
+    /// Command Operation Code (shall be GAPM_GEN_RAND_NB)
+    uint8_t operation;
+};
+
+/// Parameters of the @ref GAPM_GEN_RAND_NB_IND message
+/*@TRACE*/
+struct gapm_gen_rand_nb_ind
+{
+    /// Generation Random Number (8 bytes)
+    rand_nb_t randnb;
+};
+
+/// Create new task for specific profile
+/*@TRACE*/
+struct gapm_profile_task_add_cmd
+{
+    /// GAPM requested operation:
+    ///  - GAPM_PROFILE_TASK_ADD: Add new profile task
+    uint8_t  operation;
+    /// Security Level :
+    ///  7    6    5    4    3    2    1    0
+    /// +----+----+----+----+----+----+----+----+
+    /// |   Reserved   |DIS |  AUTH   |EKS | MI |
+    /// +----+----+----+----+----+----+----+----+
+    ///
+    /// - MI: 1 - Application task is a Multi-Instantiated task, 0 - Mono-Instantiated
+    /// Only applies for service - Ignored by collectors:
+    /// - EKS: Service needs a 16 bytes encryption key
+    /// - AUTH: 0 - Disable, 1 - Enable, 2 - Unauth, 3 - Auth
+    /// - DIS: Disable the service
+    uint8_t  sec_lvl;
+    /// Profile task identifier
+    uint16_t prf_task_id;
+    /// Application task number
+    uint16_t app_task;
+    /// Service start handle
+    /// Only applies for services - Ignored by collectors
+    /// 0: dynamically allocated in Attribute database
+    uint16_t start_hdl;
+    /// 32 bits value that contains value to initialize profile (database parameters, etc...)
+    uint32_t param[__ARRAY_EMPTY];
+};
+
+/// Inform that profile task has been added.
+/*@TRACE*/
+struct gapm_profile_added_ind
+{
+    /// Profile task identifier
+    uint16_t prf_task_id;
+    /// Profile task number allocated
+    uint16_t prf_task_nb;
+    /// Service start handle
+    /// Only applies for services - Ignored by collectors
+    uint16_t start_hdl;
+};
+
+/// Indicate that a message has been received on an unknown task
+/*@TRACE*/
+struct gapm_unknown_task_ind
+{
+    /// Message identifier
+    uint16_t msg_id;
+    /// Task identifier
+    uint16_t task_id;
+};
+
+/// Indicates suggested default data length
+/*@TRACE*/
+struct gapm_sugg_dflt_data_len_ind
+{
+    ///Host's suggested value for the Controller's maximum transmitted number of payload octets
+    uint16_t suggted_max_tx_octets;
+    ///Host's suggested value for the Controller's maximum packet transmission time
+    uint16_t suggted_max_tx_time;
+};
+
+/// Indicates maximum data length
+/*@TRACE*/
+struct gapm_max_data_len_ind
+{
+    ///Maximum number of payload octets that the local Controller supports for transmission
+    uint16_t suppted_max_tx_octets;
+    ///Maximum time, in microseconds, that the local Controller supports for transmission
+    uint16_t suppted_max_tx_time;
+    ///Maximum number of payload octets that the local Controller supports for reception
+    uint16_t suppted_max_rx_octets;
+    ///Maximum time, in microseconds, that the local Controller supports for reception
+    uint16_t suppted_max_rx_time;
+};
+
+/// Register a LE Protocol/Service Multiplexer command
+/*@TRACE*/
+struct gapm_lepsm_register_cmd
+{
+    /// GAPM requested operation:
+    ///  - GAPM_LEPSM_REG: Register a LE Protocol/Service Multiplexer
+    uint8_t  operation;
+    /// LE Protocol/Service Multiplexer
+    uint16_t le_psm;
+    /// Application task number
+    uint16_t app_task;
+    /// Security level
+    ///   7   6   5   4   3   2   1   0
+    /// +---+---+---+---+---+---+---+---+
+    /// |MI |      RFU      |EKS|SEC_LVL|
+    /// +---+---+---+---+---+---+---+---+
+    /// bit[0-1]: Security level requirement (0=NO_AUTH, 1=UNAUTH, 2=AUTH, 3=SEC_CON)
+    /// bit[2]  : Encryption Key Size length must have 16 bytes
+    /// bit[7]  : Does the application task is multi-instantiated or not
+    uint8_t sec_lvl;
+};
+
+/// Unregister a LE Protocol/Service Multiplexer command
+/*@TRACE*/
+struct gapm_lepsm_unregister_cmd
+{
+    /// GAPM requested operation:
+    ///  - GAPM_LEPSM_UNREG: Unregister a LE Protocol/Service Multiplexer
+    uint8_t  operation;
+    /// LE Protocol/Service Multiplexer
+    uint16_t le_psm;
+};
+
+/// Control LE Test Mode command
+struct gapm_le_test_mode_ctrl_cmd
+{
+    /// GAPM requested operation:
+    ///  - GAPM_LE_TEST_STOP: Unregister a LE Protocol/Service Multiplexer
+    ///  - GAPM_LE_TEST_RX_START: Start RX Test Mode
+    ///  - GAPM_LE_TEST_TX_START: Start TX Test Mode
+    uint8_t operation;
+    /// Tx or Rx Channel (Range 0x00 to 0x27)
+    uint8_t channel;
+    /// Length in bytes of payload data in each packet (only valid for TX mode, range 0x00-0xFF)
+    uint8_t tx_data_length;
+    /// Packet Payload type (only valid for TX mode @see enum gap_pkt_pld_type)
+    uint8_t tx_pkt_payload;
+    /// Test PHY rate (@see enum gap_test_phy)
+    uint8_t phy;
+    /// Modulation Index (only valid for RX mode @see enum gap_modulation_idx)
+    uint8_t modulation_idx;
+};
+
+/// Indicate end of test mode event
+struct gapm_le_test_end_ind
+{
+    /// Number of received packets
+    uint16_t nb_packet_received;
+};
+
+/// Provide statistic information about ISO exchange
+struct gapm_iso_stat_ind
+{
+    /// ISO Handle of the isochronous channel (Range 0x0000-0x0EFF)
+    uint16_t iso_hdl;
+
+    /// Statistics - Number of transmission attempts
+    uint32_t nb_tx;
+    /// Statistics - Number of transmission attempts that succeed
+    uint32_t nb_tx_ok;
+    /// Statistics - Number of Not granted packet packets
+    uint32_t nb_tx_not_granted;
+
+    /// Statistics - Number of reception attempt
+    uint32_t nb_rx;
+    /// Statistics - Number of reception attempts that succeed
+    uint32_t nb_rx_ok;
+    /// Statistics - Number of Not granted packet packets
+    uint32_t nb_rx_not_granted;
+    /// Statistics - Number of wrongly received packet (invalid data)
+    uint32_t nb_rx_data_err;
+    /// Statistics - Number of CRC Errors
+    uint32_t nb_rx_crc_err;
+    /// Statistics - Number of SYNC Errors
+    uint32_t nb_rx_sync_err;
+    /// Statistics - Number of received empty packets
+    uint32_t nb_rx_empty;
+};
+
+/// Create an advertising, a scanning, an initiating, a periodic synchronization activity command (common)
+/*@TRACE*/
+struct gapm_activity_create_cmd
+{
+    /// GAPM request operation:
+    ///  - GAPM_CREATE_ADV_ACTIVITY: Create advertising activity
+    ///  - GAPM_CREATE_SCAN_ACTIVITY: Create scanning activity
+    ///  - GAPM_CREATE_INIT_ACTIVITY: Create initiating activity
+    ///  - GAPM_CREATE_PERIOD_SYNC_ACTIVITY: Create periodic synchronization activity
+    uint8_t operation;
+    /// Own address type (@see enum gapm_own_addr)
+    uint8_t own_addr_type;
+};
+
+/// Create an advertising activity command
+struct gapm_activity_create_adv_cmd
+{
+    /// GAPM request operation:
+    ///  - GAPM_CREATE_ADV_ACTIVITY: Create advertising activity
+    uint8_t operation;
+    /// Own address type (@see enum gapm_own_addr)
+    uint8_t own_addr_type;
+    /// Advertising parameters (optional, shall be present only if operation is GAPM_CREATE_ADV_ACTIVITY)
+    /// For prop parameter, @see enum gapm_leg_adv_prop, @see enum gapm_ext_adv_prop and @see enum gapm_per_adv_prop for help
+    struct gapm_adv_create_param adv_param;
+};
+
+/// Activity parameters
+/*@TRACE
+ @trc_ref gapm_actv_type
+ */
+union gapm_u_param
+{
+    /// Additional advertising parameters (for advertising activity)
+    //@trc_union @activity_map[$parent.actv_idx] == GAPM_ACTV_TYPE_ADV
+    struct gapm_adv_param adv_add_param;
+    /// Scan parameters (for scanning activity)
+    //@trc_union @activity_map[$parent.actv_idx] == GAPM_ACTV_TYPE_SCAN
+    struct gapm_scan_param scan_param;
+    /// Initiating parameters (for initiating activity)
+    //@trc_union @activity_map[$parent.actv_idx] == GAPM_ACTV_TYPE_INIT
+    struct gapm_init_param init_param;
+    /// Periodic synchronization parameters (for periodic synchronization activity)
+    //@trc_union @activity_map[$parent.actv_idx] == GAPM_ACTV_TYPE_PER_SYNC
+    struct gapm_per_sync_param per_sync_param;
+};
+
+/// Start a given activity command
+/*@TRACE*/
+struct gapm_activity_start_cmd
+{
+    /// GAPM request operation:
+    ///  - GAPM_START_ACTIVITY: Start a given activity
+    uint8_t operation;
+    /// Activity identifier
+    uint8_t actv_idx;
+    /// Activity parameters
+    union gapm_u_param u_param;
+};
+
+/// Stop one or all activity(ies) command
+/*@TRACE*/
+struct gapm_activity_stop_cmd
+{
+    /// GAPM request operation:
+    ///  - GAPM_STOP_ACTIVITY: Stop a given activity
+    ///  - GAPM_STOP_ALL_ACTIVITIES: Stop all existing activities
+    uint8_t operation;
+    /// Activity identifier - used only if operation is GAPM_STOP_ACTIVITY
+    uint8_t actv_idx;
+};
+
+/// Delete one or all activity(ies) command
+/*@TRACE*/
+struct gapm_activity_delete_cmd
+{
+    /// GAPM request operation:
+    ///  - GAPM_DELETE_ACTIVITY: Delete a given activity
+    ///  - GAPM_DELETE_ALL_ACTIVITIES: Delete all existing activities
+    uint8_t operation;
+    /// Activity identifier - used only if operation is GAPM_STOP_ACTIVITY
+    uint8_t actv_idx;
+};
+
+/// Indicate creation of an activity
+/*@TRACE
+ @trc_exec activity_map[$actv_idx] = $actv_type
+ activity_map = {}*/
+struct gapm_activity_created_ind
+{
+    /// Activity identifier
+    uint8_t actv_idx;
+    /// Activity type (@see enum gapm_actv_type)
+    uint8_t actv_type;
+    /// Selected TX power for advertising activity
+    int8_t  tx_pwr;
+};
+
+/// Indicate that an activity has been stopped
+/*@TRACE*/
+struct gapm_activity_stopped_ind
+{
+    /// Activity identifier
+    uint8_t actv_idx;
+    /// Activity type (@see enum gapm_actv_type)
+    uint8_t actv_type;
+    /// Activity stop reason
+    uint8_t reason;
+    /// In case of periodic advertising, indicate if periodic advertising has been stopped
+    uint8_t per_adv_stop;
+};
+
+/// Set advertising, scan response or periodic advertising data command
+/*@TRACE*/
+struct gapm_set_adv_data_cmd
+{
+    /// GAPM request operation:
+    ///  - GAPM_SET_ADV_DATA: Set advertising data
+    ///  - GAPM_SET_SCAN_RSP_DATA: Set scan response data
+    ///  - GAPM_SET_PERIOD_ADV_DATA: Set periodic advertising data
+    uint8_t operation;
+    /// Activity identifier
+    uint8_t actv_idx;
+    /// Data length
+    uint16_t length;
+    /// Data
+    uint8_t data[__ARRAY_EMPTY];
+};
+
+/// Indicate reception of scan request
+/*@TRACE*/
+struct gapm_scan_request_ind
+{
+    /// Activity identifier
+    uint8_t actv_idx;
+    /// Transmitter device address
+    struct gap_bdaddr trans_addr;
+};
+
+/// Indicate reception of advertising, scan response or periodic advertising data
+/*@TRACE*/
+struct gapm_ext_adv_report_ind
+{
+    /// Activity identifier
+    uint8_t actv_idx;
+    /// Bit field providing information about the received report (@see enum gapm_adv_report_info)
+    uint8_t info;
+    /// Transmitter device address
+    struct gap_bdaddr trans_addr;
+    /// Target address (in case of a directed advertising report)
+    struct gap_bdaddr target_addr;
+    /// TX power (in dBm)
+    int8_t tx_pwr;
+    /// RSSI (between -127 and +20 dBm)
+    int8_t rssi;
+    /// Primary PHY on which advertising report has been received
+    uint8_t phy_prim;
+    /// Secondary PHY on which advertising report has been received
+    uint8_t phy_second;
+    /// Advertising SID
+    /// Valid only for periodic advertising report
+    uint8_t adv_sid;
+    /// Periodic advertising interval (in unit of 1.25ms, min is 7.5ms)
+    /// Valid only for periodic advertising report
+    uint16_t period_adv_intv;
+    /// Report length
+    uint16_t length;
+    /// Report
+    uint8_t data[__ARRAY_EMPTY];
+};
+
+/// Indicate that synchronization has been established with a periodic advertiser
+/*@TRACE*/
+struct gapm_sync_established_ind
+{
+    /// Activity identifier
+    uint8_t actv_idx;
+    /// PHY on which synchronization has been established (@see gap_phy_type)
+    uint8_t phy;
+    /// Periodic advertising interval (in unit of 1.25ms, min is 7.5ms)
+    uint16_t intv;
+    /// Advertising SID
+    uint8_t adv_sid;
+    /// Advertiser clock accuracy (@see enum gapm_clk_acc)
+    uint8_t clk_acc;
+    /// Advertiser address
+    struct gap_bdaddr addr;
+};
+
+/// Read local or peer address
+/*@TRACE*/
+struct gapm_get_ral_addr_cmd
+{
+    /// GAPM request operation:
+    ///  - GAPM_GET_RAL_LOC_ADDR: Set white list content
+    ///  - GAPM_GET_RAL_PEER_ADDR: Set resolving list content
+    uint8_t operation;
+    /// Peer device identity
+    struct gap_bdaddr peer_identity;
+};
+
+/// Set content of either white list or resolving list or periodic advertiser list command (common part)
+struct gapm_list_set_cmd
+{
+    /// GAPM request operation:
+    ///  - GAPM_SET_WHITE_LIST: Set white list content
+    ///  - GAPM_SET_RAL: Set resolving list content
+    ///  - GAPM_SET_PAL: Set periodic advertiser list content
+    uint8_t operation;
+    /// Number of entries to be added in the list. 0 means that list content has to be cleared
+    uint8_t size;
+};
+
+/// Set content of white list
+/*@TRACE*/
+struct gapm_list_set_wl_cmd
+{
+    /// GAPM request operation:
+    ///  - GAPM_SET_WHITE_LIST: Set white list content
+    uint8_t operation;
+    /// Number of entries to be added in the list. 0 means that list content has to be cleared
+    uint8_t size;
+    /// List of entries to be added in the list
+    struct gap_bdaddr wl_info[__ARRAY_EMPTY];
+};
+
+/// Set content of resolving list command
+/*@TRACE*/
+struct gapm_list_set_ral_cmd
+{
+    /// GAPM request operation:
+    ///  - GAPM_SET_RAL: Set resolving list content
+    uint8_t operation;
+    /// Number of entries to be added in the list. 0 means that list content has to be cleared
+    uint8_t size;
+    /// List of entries to be added in the list
+    struct gap_ral_dev_info ral_info[__ARRAY_EMPTY];
+};
+
+/// Set content of periodic advertiser list command
+/*@TRACE*/
+struct gapm_list_set_pal_cmd
+{
+    /// GAPM request operation:
+    ///  - GAPM_SET_PAL: Set periodic advertiser list content
+    uint8_t operation;
+    /// Number of entries to be added in the list. 0 means that list content has to be cleared
+    uint8_t size;
+    /// List of entries to be added in the list
+    struct gapm_period_adv_addr_cfg pal_info[__ARRAY_EMPTY];
+};
+
+/*@TRACE
+ @trc_ref gapm_operation
+ gapm_list_set_cmd = gapm_u_list_set
+*/
+union gapm_u_list_set
+{
+    uint8_t operation;
+
+    //@trc_union operation == GAPM_SET_WL
+    struct gapm_list_set_wl_cmd list_set_wl_cmd;
+    //@trc_union operation == GAPM_SET_RAL
+    struct gapm_list_set_ral_cmd list_set_ral_cmd;
+    //@trc_union operation == GAPM_SET_PAL
+    struct gapm_list_set_pal_cmd list_set_pal_cmd;
+};
+
+/// List Size indication event
+/*@TRACE*/
+struct gapm_list_size_ind
+{
+    /// Operation code, indicate list for which size has been read
+    ///     - GAPM_SET_WHITE_LIST
+    ///     - GAPM_SET_RAL
+    ///     - GAPM_SET_PAL
+    uint8_t operation;
+    /// List size
+    uint8_t size;
+};
+
+/// Maximum advertising data length indication event
+/*@TRACE*/
+struct gapm_max_adv_data_len_ind
+{
+    /// Maximum advertising data length supported by controller
+    uint16_t length;
+};
+
+/// Number of available advertising sets indication event
+/*@TRACE*/
+struct gapm_nb_adv_sets_ind
+{
+    /// Number of available advertising sets
+    uint8_t nb_adv_sets;
+};
+
+/// Indicate the transmit powers supported by the controller
+/*@TRACE*/
+struct gapm_dev_tx_pwr_ind
+{
+    /// Minimum TX power
+    int8_t min_tx_pwr;
+    /// Maximum TX power
+    int8_t max_tx_pwr;
+};
+
+/// Indicate the RF path compensation values
+/*@TRACE*/
+struct gapm_dev_rf_path_comp_ind
+{
+    /// RF TX path compensation
+    uint16_t tx_path_comp;
+    /// RF RX path compensation
+    uint16_t rx_path_comp;
+};
+
+/// Request to renew all currently used random private addresses (non-resolvable or resolvable)
+/// For internal use only
+/*@TRACE*/
+struct gapm_addr_renew_cmd
+{
+    /// GAPM request operation:
+    ///  - GAPM_RENEW_ADDR: Renew random private addresses
+    uint8_t operation;
+    /// Activity index, used by GAPM ADDR state machine in order to remind for which activity
+    /// a new address has been generated
+    uint8_t actv_idx;
+    /// Index of first created initiating/scanning for which address has been renewed,
+    /// any initiating/scanning met after shall use the same address if it uses a random
+    /// address
+    uint8_t init_scan_actv_idx;
+};
+
+/// Indicate that an unknown message has been received
+/*@TRACE*/
+struct gapm_unknown_msg_ind
+{
+    /// Unknown message id
+    ke_msg_id_t unknown_msg_id;
+};
+
+/*
+ * MACROS
+ ****************************************************************************************
+ */
+
+/*
+ * GLOBAL VARIABLE DECLARATIONS
+ ****************************************************************************************
+ */
+
+/*
+ * FUNCTION DECLARATIONS
+ ****************************************************************************************
+ */
+
+/// @} GAPM_TASK
+
+#endif /* _GAPM_TASK_H_ */
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/gattc.h b/platform/atm2/ATM22xx-x1x/include/ble/gattc.h
new file mode 100644
index 0000000..2716808
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/gattc.h
@@ -0,0 +1,178 @@
+/**
+ ****************************************************************************************
+ *
+ * @file gattc.h
+ *
+ * @brief Header file - GATT Controller.
+ *
+ * Copyright (C) RivieraWaves 2009-2016
+ *
+ *
+ ****************************************************************************************
+ */
+
+#ifndef GATTC_H_
+#define GATTC_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup GATTC Generic Attribute Profile Controller
+ * @ingroup GATT
+ * @brief Generic Attribute Profile Controller.
+ *
+ * This GATT module is responsible for providing an API for all attribute related operations
+ * related to a BLE connection.
+ * It is responsible for all the service framework activities using the Attribute protocol
+ * for discovering services and for reading and writing characteristic values on a peer device.
+ * To achieve this, the GATT interfaces with @ref ATTC "ATTC" and the @ref ATTS "ATTS".
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+/* kernel task */
+#include "rwip_config.h"
+#if (BLE_GATTC)
+
+#include "co_list.h"
+
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+/// Operation type
+enum gattc_op_type
+{
+    #if (BLE_ATTS)
+    /// Operation used to Server Request operations
+    GATTC_OP_SERVER,
+    #endif // (BLE_ATTS)
+
+    #if (BLE_ATTC)
+    /// Operation used to Client Request operations
+    GATTC_OP_CLIENT,
+    /// Service Discovery Procedure operation
+    GATTC_OP_SDP,
+    #endif // (BLE_ATTC)
+
+    /// Max number of operations
+    GATTC_OP_MAX
+};
+
+/*
+ * TYPES DEFINITIONS
+ ****************************************************************************************
+ */
+
+#if (BLE_ATTC)
+/// Attribute Client environment variable requirements
+struct attc_env
+{
+    /// List of ATT message used to aggregate long value in a single buffer.
+    struct co_list rsp_list;
+    /// List that contains peer device event registration
+    struct co_list reg_evt;
+    /// List that contains data for service discovery
+    struct co_list sdp_data;
+};
+#endif // (BLE_ATTC)
+
+#if (BLE_ATTS)
+/// Attribute server environment variables
+struct atts_env
+{
+    /// This is used to merge save all the prepare write request received ,
+    /// before receiving the execute or cancel or disconnection.
+    struct co_list             prep_wr_req_list;
+    /// This list is used to put any data in order to send a response to peer device
+    struct co_list             rsp;
+    /// List of PDU to process
+    struct co_list             pdu_queue;
+    /// This structure is used to store in cache latest attribute read value
+    struct gattc_read_cfm*     read_cache;
+};
+#endif // (BLE_ATTS)
+
+/// GATT controller environment variable structure.
+struct gattc_env_tag
+{
+    /// Request operation Kernel message
+    void* operation[GATTC_OP_MAX];
+
+    #if (BLE_ATTC)
+    struct attc_env client;
+    #endif // (BLE_ATTC)
+
+    #if (BLE_ATTS)
+    struct atts_env server;
+    #endif // (BLE_ATTS)
+
+    /// Current MTU Size
+    uint16_t mtu_size;
+
+    /// A transaction timeout occurs, reject next attribute commands
+    bool     trans_timeout;
+    /// Used to know if MTU exchange already done.
+    bool     mtu_exch;
+};
+/*
+ * MACRO DEFINITIONS
+ ****************************************************************************************
+ */
+
+
+/*
+ * FUNCTION DECLARATIONS
+ ****************************************************************************************
+ */
+
+
+/**
+ ****************************************************************************************
+ * @brief Created link connection parameters (from bond data) has been set, connection
+ * ready to be used.
+ *
+ * @param[in] conidx     Connection Index
+ *
+ ****************************************************************************************
+ */
+void gattc_con_enable(uint8_t conidx);
+
+
+/**
+ ****************************************************************************************
+ * @brief Gets the negotiated MTU. This function gets the negotiated MTU.
+ *
+ * @param[in] idx   connection record index
+ *
+ * @return MTU negotiated
+ *
+ ****************************************************************************************
+ */
+uint16_t gattc_get_mtu(uint8_t idx);
+
+/**
+ ****************************************************************************************
+ * @brief Sets the negotiated MTU This function stores the negotiated MTU.
+ *
+ * @param[in] idx   connection record index
+ * @param[in] mtu   negotiated MTU
+ *
+ * @return status   indicates if the MTU setting operation is successful
+ *
+ ****************************************************************************************
+ */
+void gattc_set_mtu(uint8_t idx, uint16_t mtu);
+
+
+
+#endif /* (BLE_GATTC) */
+
+/// @} GATTC
+#endif // GATTC_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/gattc_task.h b/platform/atm2/ATM22xx-x1x/include/ble/gattc_task.h
new file mode 100644
index 0000000..c016a6d
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/gattc_task.h
@@ -0,0 +1,784 @@
+/**
+ ****************************************************************************************
+ *
+ * @file gattc_task.h
+ *
+ * @brief Header file - GATTCTASK.
+ *
+ * Copyright (C) RivieraWaves 2009-2016
+ *
+ *
+ ****************************************************************************************
+ */
+
+#ifndef GATTC_TASK_H_
+#define GATTC_TASK_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup GATTCTASK Task
+ * @ingroup GATTC
+ * @brief Handles ALL messages to/from GATT Controller block.
+ *
+ * The GATTCTASK is responsible for managing the messages coming from
+ * the attribute layer and host-level layers for dedicated connection.
+ * The task includes services and characteristic discovery, configuration exchanges
+ * and attribute value access operations (reading, writing, notification and indication).
+ *
+ * Messages may originate from @ref ATTC "ATTC", @ref ATTS "ATTS", @ref GAP "GAP"
+ * and Application.
+ *
+ * @{
+ ****************************************************************************************
+ */
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include "att.h"
+#include "rwip_task.h" // Task definitions
+#include "compiler.h"
+#include <stdbool.h>
+#include "ke_msg.h"
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+/// GATT Task messages
+/*@TRACE*/
+enum gattc_msg_id
+{
+    /* Default event */
+    /// Command Complete event
+    GATTC_CMP_EVT = TASK_FIRST_MSG(TASK_ID_GATTC),
+
+    /* ATTRIBUTE CLIENT */
+    /// Server configuration request
+    GATTC_EXC_MTU_CMD,
+    /// Indicate that the ATT MTU has been updated (negotiated)
+    GATTC_MTU_CHANGED_IND,
+
+    /*Discover All Services */
+    /*Discover Services by Service UUID*/
+    /*Find Included Services*/
+    /*Discover Characteristics by UUID*/
+    /*Discover All Characteristics of a Service*/
+    /*Discover All Characteristic Descriptors*/
+    /// Discovery command
+    GATTC_DISC_CMD,
+    /* GATT -> HL: Events to Upper layer */
+    /*Discover All Services*/
+    /// Discovery services indication
+    GATTC_DISC_SVC_IND,
+    /*Find Included Services*/
+    /// Discover included services indication
+    GATTC_DISC_SVC_INCL_IND,
+    /*Discover All Characteristics of a Service*/
+    /// Discover characteristic indication
+    GATTC_DISC_CHAR_IND,
+    /*Discover All Characteristic Descriptors*/
+    /// Discovery characteristic descriptor indication
+    GATTC_DISC_CHAR_DESC_IND,
+
+    /*Read Value*/
+    /*Read Using UUID*/
+    /*Read Long Value*/
+    /*Read Multiple Values*/
+    /// Read command
+    GATTC_READ_CMD,
+    /// Read response
+    GATTC_READ_IND,
+
+    /*Write without response*/
+    /*Write without response with Authentication*/
+    /*Write Characteristic Value*/
+    /*Signed Write Characteristic Value*/
+    /*Write Long Characteristic Value*/
+    /*Characteristic Value Reliable Write*/
+    /*Write Characteristic Descriptors*/
+    /*Write Long Characteristic Descriptors*/
+    /*Characteristic Value Reliable Write*/
+    /// Write command request
+    GATTC_WRITE_CMD,
+
+    /* Cancel / Execute pending write operations */
+    /// Execute write characteristic request
+    GATTC_EXECUTE_WRITE_CMD,
+
+    /* Reception of an indication or notification from peer device. */
+    /// peer device triggers an event (notification)
+    GATTC_EVENT_IND,
+    /// peer device triggers an event that requires a confirmation (indication)
+    GATTC_EVENT_REQ_IND,
+    /// Confirm reception of event (trigger a confirmation message)
+    GATTC_EVENT_CFM,
+
+    /// Registration to peer device events (Indication/Notification).
+    GATTC_REG_TO_PEER_EVT_CMD,
+
+    /* -------------------------- ATTRIBUTE SERVER ------------------------------- */
+    /*Notify Characteristic*/
+    /*Indicate Characteristic*/
+    /// send an event to peer device
+    GATTC_SEND_EVT_CMD,
+
+    /* Service Changed Characteristic Indication */
+    /**
+     * Send a Service Changed indication to a device
+     * (message structure is struct gattm_svc_changed_ind_req)
+     */
+    GATTC_SEND_SVC_CHANGED_CMD,
+    /**
+     * Inform the application when sending of Service Changed indications has been
+     * enabled or disabled
+     */
+    GATTC_SVC_CHANGED_CFG_IND,
+
+    /* Indicate that read operation is requested. */
+    /// Read command indicated to upper layers.
+    GATTC_READ_REQ_IND,
+    /// REad command confirmation from upper layers.
+    GATTC_READ_CFM,
+
+    /* Indicate that write operation is requested. */
+    /// Write command indicated to upper layers.
+    GATTC_WRITE_REQ_IND,
+    /// Write command confirmation from upper layers.
+    GATTC_WRITE_CFM,
+
+    /* Indicate that write operation is requested. */
+    /// Request Attribute info to upper layer - could be trigger during prepare write
+    GATTC_ATT_INFO_REQ_IND,
+    /// Attribute info from upper layer confirmation
+    GATTC_ATT_INFO_CFM,
+
+    /* ----------------------- SERVICE DISCOVERY PROCEDURE  --------------------------- */
+    /// Service Discovery command
+    GATTC_SDP_SVC_DISC_CMD,
+    /// Service Discovery indicate that a service has been found.
+    GATTC_SDP_SVC_IND,
+
+    /* -------------------------- TRANSACTION ERROR EVENT ----------------------------- */
+    /// Transaction Timeout Error Event no more transaction will be accepted
+    GATTC_TRANSACTION_TO_ERROR_IND,
+
+    /// Indication to the task that sends the unknown message
+    GATTC_UNKNOWN_MSG_IND,
+
+    /* ------------------------------- Internal API ----------------------------------- */
+    /// Client Response timeout indication
+    GATTC_CLIENT_RTX_IND,
+    /// Server indication confirmation timeout indication
+    GATTC_SERVER_RTX_IND,
+};
+
+
+/// request operation type - application interface
+/*@TRACE*/
+enum gattc_operation
+{
+    /*              Attribute Client Flags              */
+    /* No Operation (if nothing has been requested)     */
+    /* ************************************************ */
+    /// No operation
+    GATTC_NO_OP                                    = 0x00,
+
+    /* Operation flags for MTU Exchange                 */
+    /* ************************************************ */
+    /// Perform MTU exchange
+    GATTC_MTU_EXCH,
+
+    /*      Operation flags for discovery operation     */
+    /* ************************************************ */
+    /// Discover all services
+    GATTC_DISC_ALL_SVC,
+    /// Discover services by UUID
+    GATTC_DISC_BY_UUID_SVC,
+    /// Discover included services
+    GATTC_DISC_INCLUDED_SVC,
+    /// Discover all characteristics
+    GATTC_DISC_ALL_CHAR,
+    /// Discover characteristic by UUID
+    GATTC_DISC_BY_UUID_CHAR,
+    /// Discover characteristic descriptor
+    GATTC_DISC_DESC_CHAR,
+
+    /* Operation flags for reading attributes           */
+    /* ************************************************ */
+    /// Read attribute
+    GATTC_READ,
+    /// Read long attribute
+    GATTC_READ_LONG,
+    /// Read attribute by UUID
+    GATTC_READ_BY_UUID,
+    /// Read multiple attribute
+    GATTC_READ_MULTIPLE,
+
+    /* Operation flags for writing/modifying attributes */
+    /* ************************************************ */
+    /// Write attribute
+    GATTC_WRITE,
+    /// Write no response
+    GATTC_WRITE_NO_RESPONSE,
+    /// Write signed
+    GATTC_WRITE_SIGNED,
+    /// Execute write
+    GATTC_EXEC_WRITE,
+
+    /* Operation flags for registering to peer device   */
+    /* events                                           */
+    /* ************************************************ */
+    /// Register to peer device events
+    GATTC_REGISTER,
+    /// Unregister from peer device events
+    GATTC_UNREGISTER,
+
+    /* Operation flags for sending events to peer device*/
+    /* ************************************************ */
+    /// Send an attribute notification
+    GATTC_NOTIFY,
+    /// Send an attribute indication
+    GATTC_INDICATE,
+    /// Send a service changed indication
+    GATTC_SVC_CHANGED,
+
+    /* Service Discovery Procedure                      */
+    /* ************************************************ */
+    /// Search specific service
+    GATTC_SDP_DISC_SVC,
+    /// Search for all services
+    GATTC_SDP_DISC_SVC_ALL,
+    /// Cancel Service Discovery Procedure
+    GATTC_SDP_DISC_CANCEL,
+};
+
+/// Service Discovery Attribute type
+/*@TRACE*/
+enum gattc_sdp_att_type
+{
+    /// No Attribute Information
+    GATTC_SDP_NONE,
+    /// Included Service Information
+    GATTC_SDP_INC_SVC,
+    /// Characteristic Declaration
+    GATTC_SDP_ATT_CHAR,
+    /// Attribute Value
+    GATTC_SDP_ATT_VAL,
+    /// Attribute Descriptor
+    GATTC_SDP_ATT_DESC,
+};
+
+/// Command complete event data structure
+struct gattc_op_cmd
+{
+    /// GATT request type
+    uint8_t operation;
+    /// operation sequence number
+    uint16_t seq_num;
+};
+
+/// Command complete event data structure
+/*@TRACE*/
+struct gattc_cmp_evt
+{
+    /// GATT request type
+    uint8_t operation;
+    /// Status of the request
+    uint8_t status;
+    /// operation sequence number - provided when operation is started
+    uint16_t seq_num;
+};
+
+/// Service Discovery Command Structure
+/*@TRACE*/
+struct gattc_exc_mtu_cmd
+{
+    /// GATT request type
+    uint8_t operation;
+    /// operation sequence number
+    uint16_t seq_num;
+};
+
+/// Indicate that the ATT MTU has been updated (negotiated)
+/*@TRACE*/
+struct gattc_mtu_changed_ind
+{
+    /// Exchanged MTU value
+    uint16_t mtu;
+    /// operation sequence number
+    uint16_t seq_num;
+};
+
+/// Service Discovery Command Structure
+/*@TRACE*/
+struct gattc_disc_cmd
+{
+    /// GATT request type
+    uint8_t  operation;
+    /// UUID length
+    uint8_t  uuid_len;
+    /// operation sequence number
+    uint16_t seq_num;
+    /// start handle range
+    uint16_t start_hdl;
+    /// start handle range
+    uint16_t end_hdl;
+    /// UUID
+    uint8_t  uuid[__ARRAY_EMPTY];
+};
+
+
+/// Discover Service indication Structure
+/*@TRACE*/
+struct gattc_disc_svc_ind
+{
+    /// start handle
+    uint16_t start_hdl;
+    /// end handle
+    uint16_t end_hdl;
+    /// UUID length
+    uint8_t  uuid_len;
+    /// service UUID
+    uint8_t  uuid[__ARRAY_EMPTY];
+};
+
+/// Discover Service indication Structure
+/*@TRACE*/
+struct gattc_disc_svc_incl_ind
+{
+    /// element handle
+    uint16_t attr_hdl;
+    /// start handle
+    uint16_t start_hdl;
+    /// end handle
+    uint16_t end_hdl;
+    /// UUID length
+    uint8_t uuid_len;
+    /// included service UUID
+    uint8_t uuid[__ARRAY_EMPTY];
+};
+
+/// Discovery All Characteristic indication Structure
+/*@TRACE*/
+struct gattc_disc_char_ind
+{
+    /// database element handle
+    uint16_t attr_hdl;
+    /// pointer attribute handle to UUID
+    uint16_t pointer_hdl;
+    /// properties
+    uint8_t prop;
+    /// UUID length
+    uint8_t uuid_len;
+    /// characteristic UUID
+    uint8_t uuid[__ARRAY_EMPTY];
+};
+
+/// Discovery Characteristic Descriptor indication Structure
+/*@TRACE*/
+struct gattc_disc_char_desc_ind
+{
+    /// database element handle
+    uint16_t attr_hdl;
+    /// UUID length
+    uint8_t uuid_len;
+    /// Descriptor UUID
+    uint8_t uuid[__ARRAY_EMPTY];
+};
+
+
+/// Simple Read (GATTC_READ or GATTC_READ_LONG)
+/*@TRACE
+ gattc_read = gattc_read_simple
+ gattc_read_long = gattc_read_simple*/
+struct gattc_read_simple
+{
+    /// attribute handle
+    uint16_t handle;
+    /// start offset in data payload
+    uint16_t offset;
+    /// Length of data to read (0 = read all)
+    uint16_t length;
+};
+
+/// Read by UUID: search UUID and read it's characteristic value (GATTC_READ_BY_UUID)
+/// Note: it doesn't perform an automatic read long.
+/*@TRACE*/
+struct gattc_read_by_uuid
+{
+    /// Start handle
+    uint16_t start_hdl;
+    /// End handle
+    uint16_t end_hdl;
+    /// Size of UUID
+    uint8_t uuid_len;
+    /// UUID value
+    uint8_t uuid[__ARRAY_EMPTY];
+};
+
+/// Read Multiple short characteristic (GATTC_READ_MULTIPLE)
+/*@TRACE*/
+struct gattc_read_multiple
+{
+    /// attribute handle
+    uint16_t handle;
+    /// Known Handle length (shall be != 0)
+    uint16_t len;
+};
+
+/// request union according to read type
+/*@TRACE
+ @trc_ref gattc_operation
+ */
+union gattc_read_req
+{
+    /// Simple Read (GATTC_READ or GATTC_READ_LONG)
+    //@trc_union parent.operation == GATTC_READ or parent.operation == GATTC_READ_LONG
+    struct gattc_read_simple simple;
+    /// Read by UUID (GATTC_READ_BY_UUID)
+    //@trc_union parent.operation == GATTC_READ_BY_UUID
+    struct gattc_read_by_uuid by_uuid;
+    /// Read Multiple short characteristic (GATTC_READ_MULTIPLE)
+    //@trc_union parent.operation == GATTC_READ_MULTIPLE
+    struct gattc_read_multiple multiple[1];
+};
+
+/// Read command (Simple, Long, Multiple, or by UUID)
+/*@TRACE*/
+struct gattc_read_cmd
+{
+    /// request type
+    uint8_t operation;
+    /// number of read (only used for multiple read)
+    uint8_t nb;
+    /// operation sequence number
+    uint16_t seq_num;
+    /// request union according to read type
+    union gattc_read_req req;
+};
+
+/// Attribute value read indication
+/*@TRACE*/
+struct gattc_read_ind
+{
+    /// Attribute handle
+    uint16_t handle;
+    /// Read offset
+    uint16_t offset;
+    /// Read length
+    uint16_t length;
+    /// Handle value
+    uint8_t value[__ARRAY_EMPTY];
+};
+
+/// Write peer attribute value command
+/*@TRACE*/
+struct gattc_write_cmd
+{
+    /// Request type
+    uint8_t operation;
+    /// Perform automatic execution
+    /// (if false, an ATT Prepare Write will be used this shall be use for reliable write)
+    bool auto_execute;
+    /// operation sequence number
+    uint16_t seq_num;
+    /// Attribute handle
+    uint16_t handle;
+    /// Write offset
+    uint16_t offset;
+    /// Write length
+    uint16_t length;
+    /// Internal write cursor shall be initialized to 0
+    uint16_t cursor;
+    /// Value to write
+    uint8_t value[__ARRAY_EMPTY];
+};
+
+/// Write peer attribute value command
+/*@TRACE*/
+struct gattc_execute_write_cmd
+{
+    /// Request type
+    uint8_t operation;
+
+    /// [True = perform/False cancel] pending write operations
+    bool execute;
+    /// operation sequence number
+    uint16_t seq_num;
+};
+/// peer device triggers an event (notification)
+/*@TRACE*/
+struct gattc_event_ind
+{
+    /// Event Type
+    uint8_t type;
+    /// Data length
+    uint16_t length;
+    /// Attribute handle
+    uint16_t handle;
+    /// Event Value
+    uint8_t value[__ARRAY_EMPTY];
+};
+
+/// peer device triggers an event that requires a confirmation (indication)
+/*@TRACE*/
+struct gattc_event_req_ind
+{
+    /// Event Type
+    uint8_t type;
+    /// Data length
+    uint16_t length;
+    /// Attribute handle
+    uint16_t handle;
+    /// Event Value
+    uint8_t value[__ARRAY_EMPTY];
+};
+
+/// Confirm reception of event (trigger a confirmation message)
+/*@TRACE*/
+struct gattc_event_cfm
+{
+    /// Attribute handle
+    uint16_t handle;
+};
+
+/// Register to peer device events command
+/*@TRACE*/
+struct gattc_reg_to_peer_evt_cmd
+{
+    /// Request type
+    uint8_t operation;
+    /// operation sequence number
+    uint16_t seq_num;
+    /// attribute start handle
+    uint16_t start_hdl;
+    /// attribute end handle
+    uint16_t end_hdl;
+};
+
+/// Send an event to peer device
+/*@TRACE*/
+struct gattc_send_evt_cmd
+{
+    /// Request type (notification / indication)
+    uint8_t operation;
+    /// operation sequence number
+    uint16_t seq_num;
+    /// characteristic handle
+    uint16_t handle;
+    /// length of packet to send
+    uint16_t length;
+    /// data value
+    uint8_t  value[__ARRAY_EMPTY];
+};
+
+/// Inform that attribute value is requested by lower layers.
+/*@TRACE*/
+struct gattc_read_req_ind
+{
+    /// Handle of the attribute that has to be read
+    uint16_t handle;
+};
+
+/// Confirm Read Request requested by GATT to profile
+/*@TRACE*/
+struct gattc_read_cfm
+{
+    /// Handle of the attribute read
+    uint16_t handle;
+    /// Data length read
+    uint16_t length;
+    /// Status of read command execution by upper layers
+    uint8_t status;
+    /// attribute data value
+    uint8_t  value[__ARRAY_EMPTY];
+};
+
+/// Inform that a modification of database has been requested by peer device.
+/*@TRACE*/
+struct gattc_write_req_ind
+{
+    /// Handle of the attribute that has to be written
+    uint16_t handle;
+    /// offset at which the data has to be written
+    uint16_t offset;
+    /// Data length to be written
+    uint16_t length;
+    /// Data to be written in attribute database
+    uint8_t  value[__ARRAY_EMPTY];
+};
+
+/// Confirm modification of database from upper layer when requested by peer device.
+/*@TRACE*/
+struct gattc_write_cfm
+{
+    /// Handle of the attribute written
+    uint16_t handle;
+    /// Status of write command execution by upper layers
+    uint8_t status;
+};
+
+/// Parameters for @ref GATTC_SEND_SVC_CHANGED_CMD message
+/*@TRACE*/
+struct gattc_send_svc_changed_cmd
+{
+    /// Request Type
+    uint8_t operation;
+    /// operation sequence number
+    uint16_t seq_num;
+    /// Start of Affected Attribute Handle Range
+    uint16_t svc_shdl;
+    /// End of Affected Attribute Handle Range
+    uint16_t svc_ehdl;
+};
+
+/// Parameters for @ref GATTC_SVC_CHANGED_CFG_IND and @ref GATTC_SVC_CHANGED_SET_CFG_REQ message
+/*@TRACE*/
+struct gattc_svc_changed_cfg
+{
+    /**
+     * Current value of the Client Characteristic Configuration descriptor for the Service
+     * Changed characteristic
+     */
+    uint16_t ind_cfg;
+};
+
+
+/// Request Attribute info to upper layer - could be trigger during prepare write
+/*@TRACE*/
+struct gattc_att_info_req_ind
+{
+    /// Handle of the attribute for which info are requested
+    uint16_t handle;
+};
+
+/// Attribute info from upper layer confirmation
+/*@TRACE*/
+struct gattc_att_info_cfm
+{
+    /// Handle of the attribute
+    uint16_t handle;
+    /// Current length of the attribute
+    uint16_t length;
+    /// use to know if it's possible to modify the attribute
+    /// can contains authorization or application error code.
+    uint8_t  status;
+};
+
+
+/// Service Discovery command
+/*@TRACE*/
+struct gattc_sdp_svc_disc_cmd
+{
+    /// GATT Request Type
+    /// - GATTC_SDP_DISC_SVC Search specific service
+    /// - GATTC_SDP_DISC_SVC_ALL Search for all services
+    /// - GATTC_SDP_DISC_CANCEL Cancel Service Discovery Procedure
+    uint8_t operation;
+    /// Service UUID Length
+    uint8_t  uuid_len;
+    /// operation sequence number
+    uint16_t seq_num;
+    /// Search start handle
+    uint16_t start_hdl;
+    /// Search end handle
+    uint16_t end_hdl;
+    /// Service UUID
+    uint8_t  uuid[ATT_UUID_128_LEN];
+};
+
+
+/// Information about included service
+/*@TRACE*/
+struct gattc_sdp_include_svc
+{
+    /// Attribute Type
+    /// - GATTC_SDP_INC_SVC: Included Service Information
+    uint8_t att_type;
+    /// Included service UUID Length
+    uint8_t uuid_len;
+    /// Included Service UUID
+    uint8_t  uuid[ATT_UUID_128_LEN];
+    /// Included service Start Handle
+    uint16_t start_hdl;
+    /// Included service End Handle
+    uint16_t end_hdl;
+};
+
+/// Information about attribute characteristic
+/*@TRACE*/
+struct gattc_sdp_att_char
+{
+    /// Attribute Type
+    /// - GATTC_SDP_ATT_CHAR: Characteristic Declaration
+    uint8_t att_type;
+    /// Value property
+    uint8_t prop;
+    /// Value Handle
+    uint16_t handle;
+};
+
+/// Information about attribute
+/*@TRACE*/
+struct gattc_sdp_att
+{
+    /// Attribute Type
+    /// - GATTC_SDP_ATT_VAL: Attribute Value
+    /// - GATTC_SDP_ATT_DESC: Attribute Descriptor
+    uint8_t  att_type;
+    /// Attribute UUID Length
+    uint8_t  uuid_len;
+    /// Attribute UUID
+    uint8_t  uuid[ATT_UUID_128_LEN];
+};
+
+/// Attribute information
+/*@TRACE
+ @trc_ref gattc_sdp_att_type
+ */
+union gattc_sdp_att_info
+{
+    /// Attribute Type
+    uint8_t att_type;
+    /// Information about attribute characteristic
+    //@trc_union att_type == GATTC_SDP_ATT_CHAR
+    struct gattc_sdp_att_char att_char;
+    /// Information about included service
+    //@trc_union att_type == GATTC_SDP_INC_SVC
+    struct gattc_sdp_include_svc inc_svc;
+    /// Information about attribute
+    //@trc_union att_type == GATTC_SDP_ATT_VAL or att_type == GATTC_SDP_ATT_DESC
+    struct gattc_sdp_att att;
+};
+
+
+/// Service Discovery indicate that a service has been found.
+/*@TRACE
+ @trc_arr info $end_hdl - $start_hdl
+ */
+struct gattc_sdp_svc_ind
+{
+    /// Service UUID Length
+    uint8_t  uuid_len;
+    /// Service UUID
+    uint8_t  uuid[ATT_UUID_128_LEN];
+    /// Service start handle
+    uint16_t start_hdl;
+    /// Service end handle
+    uint16_t end_hdl;
+    /// attribute information present in the service
+    /// (length = end_hdl - start_hdl)
+    union gattc_sdp_att_info info[__ARRAY_EMPTY];
+};
+
+/// Indicate that an unknown message has been received
+/*@TRACE*/
+struct gattc_unknown_msg_ind
+{
+    /// Unknown message id
+    ke_msg_id_t unknown_msg_id;
+};
+
+/// @} GATTCTASK
+#endif // GATTC_TASK_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/ke_mem.h b/platform/atm2/ATM22xx-x1x/include/ble/ke_mem.h
new file mode 100644
index 0000000..e399508
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/ke_mem.h
@@ -0,0 +1,153 @@
+/**
+ ****************************************************************************************
+ *
+ * @file ke_mem.h
+ *
+ * @brief API for the heap management module.
+ *
+ * Copyright (C) RivieraWaves 2009-2015
+ *
+ *
+ ****************************************************************************************
+ */
+
+#ifndef _KE_MEM_H_
+#define _KE_MEM_H_
+
+#include "rwip_config.h"     // IP configuration
+#include <stdint.h>          // standard integer
+#include <stdbool.h>         // standard includes
+
+/**
+ ****************************************************************************************
+ * @defgroup MEM Memory
+ * @ingroup KERNEL
+ * @brief Heap management module.
+ *
+ * This module implements heap management functions that allow initializing heap,
+ * allocating and freeing memory.
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+// forward declarations
+struct mblock_free;
+
+/**
+ ****************************************************************************************
+ * @brief Heap initialization.
+ *
+ * This function performs the following operations:
+ * - sanity checks
+ * - check memory allocated is at least large enough to hold two block descriptors to hold
+ * start and end
+ * - initialize the first and last descriptors
+ * - save heap into kernel environment variable.
+ *
+ * @param[in]     type      Memory type.
+ * @param[in|out] heap      Heap pointer
+ * @param[in]     heap_size Size of the heap
+ *
+ *
+ ****************************************************************************************
+ */
+void ke_mem_init(uint8_t type, uint8_t* heap, uint16_t heap_size);
+
+/**
+ ****************************************************************************************
+ * @brief Allocation of a block of memory.
+ *
+ * Allocates a memory block whose size is size; if no memory is available return NULL
+ *
+ * @param[in] size Size of the memory area that need to be allocated.
+ * @param[in] type Type of memory block
+ *
+ * @return A pointer to the allocated memory area.
+ *
+ ****************************************************************************************
+ */
+void *ke_malloc(uint32_t size, uint8_t type);
+
+
+/**
+ ****************************************************************************************
+ * @brief Check if it's possible to allocate a block of memory with a specific size.
+ *
+ * @param[in] size Size of the memory area that need to be allocated.
+ * @param[in] type Type of memory block
+ *
+ * @return True if memory block can be allocated, False else.
+ *
+ ****************************************************************************************
+ */
+bool ke_check_malloc(uint32_t size, uint8_t type);
+
+/**
+ ****************************************************************************************
+ * @brief Freeing of a block of memory.
+ *
+ * Free the memory area pointed by mem_ptr : mark the block as free and insert it in
+ * the pool of free block.
+ *
+ * @param[in] mem_ptr Pointer to the memory area that need to be freed.
+ *
+ ****************************************************************************************
+ */
+void ke_free(void *mem_ptr);
+
+
+/**
+ ****************************************************************************************
+ * @brief Check if current heap is empty or not (not used)
+ *
+ * @param[in] type Type of memory heap block
+ *
+ * @return true if heap not used, false else.
+ ****************************************************************************************
+ */
+bool ke_mem_is_empty(uint8_t type);
+
+
+
+/**
+ ****************************************************************************************
+ * @brief Check if current pointer is free or not
+ *
+ * @param[in] mem_ptr pointer to a memory block
+ *
+ * @return true if already free, false else.
+ ****************************************************************************************
+ */
+bool ke_is_free(void* mem_ptr);
+
+#if (KE_PROFILING)
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve memory usage of selected heap.
+ *
+ * @param[in] type Type of memory heap block
+ *
+ * @return current memory usage of current heap.
+ ****************************************************************************************
+ */
+uint16_t ke_get_mem_usage(uint8_t type);
+
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve max memory usage of all heap.
+ * This command also resets max measured value.
+ *
+ * @return max memory usage of all heap.
+ ****************************************************************************************
+ */
+uint32_t ke_get_max_mem_usage(void);
+
+#endif // (KE_PROFILING)
+
+///@} MEM
+
+#endif // _KE_MEM_H_
+
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/ke_msg.h b/platform/atm2/ATM22xx-x1x/include/ble/ke_msg.h
new file mode 100644
index 0000000..be46827
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/ke_msg.h
@@ -0,0 +1,329 @@
+/**
+ ****************************************************************************************
+ *
+ * @file ke_msg.h
+ *
+ * @brief This file contains the definition related to message scheduling.
+ *
+ * Copyright (C) RivieraWaves 2009-2015
+ *
+ *
+ ****************************************************************************************
+ */
+
+#ifndef _KE_MSG_H_
+#define _KE_MSG_H_
+
+/**
+ ****************************************************************************************
+ * @defgroup MSG Message Exchange
+ * @ingroup KERNEL
+ * @brief Message scheduling module.
+ *
+ * The MSG module implements message scheduling functions.
+
+ * A kernel message has an ID, a receiver task ID and a source task ID.
+ * In most cases, it also has parameters which are defined in
+ * a structure dynamically embedded in the message structure,
+ * so the whole message will be managed internally as one block.
+ *
+ * A message can also have one extra parameter which is referenced
+ * in the normal parameter structure. This extra block is assumed
+ * to be large by the kernel and will be moved by DMA if needed.
+ * This feature allows moving MMPDU from LMAC to UMAC.
+ *
+ * In order to send a message, a function first have to allocate
+ * the memory for this message. It can be done with the wrapper
+ * macro KE_MSG_ALLOC() (which will call ke_msg_alloc()).
+
+ * The message can then be sent with ke_msg_send(). The kernel
+ * will take care of freeing the allocated memory.
+
+ * If the message has no parameters, the ke_msg_send_basic() function
+ * can be used.
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+#include <stddef.h>          // standard definition
+#include <stdint.h>          // standard integer
+#include <stdbool.h>         // standard boolean
+#include "arch.h"            // architectural definition
+#include "compiler.h"        // compiler definition
+#include "co_list.h"         // list definition
+
+/// Task Identifier. Composed by the task type and the task index.
+typedef uint16_t ke_task_id_t;
+
+/// Builds the task identifier from the type and the index of that task.
+#define KE_BUILD_ID(type, index) ( (ke_task_id_t)(((index) << 8)|(type)) )
+
+/// Retrieves task type from task id.
+#define KE_TYPE_GET(ke_task_id) ((ke_task_id) & 0xFF)
+
+/// Retrieves task index number from task id.
+#define KE_IDX_GET(ke_task_id) (((ke_task_id) >> 8) & 0xFF)
+
+/// Task State
+typedef uint8_t ke_state_t;
+
+/// Message Identifier. The number of messages is limited to 0xFFFF.
+/// The message ID is divided in two parts:
+/// bits[15~8]: task index (no more than 255 tasks support)
+/// bits[7~0]: message index(no more than 255 messages per task)
+/*@TRACE*/
+typedef uint16_t ke_msg_id_t;
+
+/// Message structure.
+struct ke_msg
+{
+    struct co_list_hdr hdr;     ///< List header for chaining
+
+    ke_msg_id_t     id;         ///< Message id.
+    ke_task_id_t    dest_id;    ///< Destination kernel identifier.
+    ke_task_id_t    src_id;     ///< Source kernel identifier.
+    uint16_t        param_len;  ///< Parameter embedded struct length.
+    uint32_t        param[__ARRAY_EMPTY];   ///< Parameter embedded struct. Must be word-aligned.
+};
+
+
+/// Status returned by a task when handling a message
+/*@TRACE*/
+enum ke_msg_status_tag
+{
+    KE_MSG_CONSUMED = 0, ///< consumed, msg and ext are freed by the kernel
+    KE_MSG_NO_FREE,      ///< consumed, nothing is freed by the kernel
+    KE_MSG_SAVED,        ///< not consumed, will be pushed in the saved queue
+    KE_MSG_NEXT,         ///< Continue processing this message in the next matching message handler
+};
+
+/**
+ ****************************************************************************************
+ * @brief Convert a parameter pointer to a message pointer
+ *
+ * @param[in]  param_ptr Pointer to the parameter member of a ke_msg
+ *                       Usually retrieved by a ke_msg_alloc()
+ *
+ * @return The pointer to the ke_msg
+ ****************************************************************************************
+ */
+__INLINE struct ke_msg * ke_param2msg(void const *param_ptr)
+{
+#ifdef CFG_ROM
+    return (struct ke_msg*) (((uint8_t*)param_ptr) - offsetof(struct ke_msg, param));
+#else
+    return (struct ke_msg*) (((uintptr_t)param_ptr) - offsetof(struct ke_msg, param));
+#endif
+}
+
+/**
+ ****************************************************************************************
+ * @brief Convert a message pointer to a parameter pointer
+ *
+ * @param[in]  msg Pointer to the ke_msg.
+ *
+ * @return The pointer to the param member
+ ****************************************************************************************
+ */
+__INLINE void * ke_msg2param(struct ke_msg const *msg)
+{
+#ifdef CFG_ROM
+    return (void*) (((uint8_t*) msg) + offsetof(struct ke_msg, param));
+#else
+    return (void*) (((uintptr_t)msg) + offsetof(struct ke_msg, param));
+#endif
+}
+
+/**
+ ****************************************************************************************
+ * @brief Convenient wrapper to ke_msg_alloc()
+ *
+ * This macro calls ke_msg_alloc() and cast the returned pointer to the
+ * appropriate structure. Can only be used if a parameter structure exists
+ * for this message (otherwise, use ke_msg_send_basic()).
+ *
+ * @param[in] id        Message identifier
+ * @param[in] dest      Destination Identifier
+ * @param[in] src       Source Identifier
+ * @param[in] param_str parameter structure tag
+ *
+ * @return Pointer to the parameter member of the ke_msg.
+ ****************************************************************************************
+ */
+#define KE_MSG_ALLOC(id, dest, src, param_str) \
+    (struct param_str*) ke_msg_alloc(id, dest, src, sizeof(struct param_str))
+
+/**
+ ****************************************************************************************
+ * @brief Convenient wrapper to ke_msg_free()
+ *
+ * This macro calls ke_msg_free() with the appropriate msg pointer as parameter, according
+ * to the message parameter pointer passed.
+ *
+ * @param[in] param_ptr parameter structure pointer
+ ****************************************************************************************
+ */
+#define KE_MSG_FREE(param_ptr) ke_msg_free(ke_param2msg((param_ptr)))
+
+/**
+ ****************************************************************************************
+ * @brief Convenient wrapper to ke_msg_alloc()
+ *
+ * This macro calls ke_msg_alloc() and cast the returned pointer to the
+ * appropriate structure with a variable length. Can only be used if a parameter structure exists
+ * for this message (otherwise, use ke_msg_send_basic()).Can only be used if the data array is
+ * located at the end of the structure.
+ *
+ * @param[in] id        Message identifier
+ * @param[in] dest      Destination Identifier
+ * @param[in] src       Source Identifier
+ * @param[in] param_str parameter structure tag
+ * @param[in] length    length for the data
+ *
+ * @return Pointer to the parameter member of the ke_msg.
+ ****************************************************************************************
+ */
+#define KE_MSG_ALLOC_DYN(id, dest, src, param_str,length)  (struct param_str*)ke_msg_alloc(id, dest, src, \
+    (sizeof(struct param_str) + (length)));
+
+/**
+ ****************************************************************************************
+ * @brief Allocate memory for a message
+ *
+ * This primitive allocates memory for a message that has to be sent. The memory
+ * is allocated dynamically on the heap and the length of the variable parameter
+ * structure has to be provided in order to allocate the correct size.
+ *
+ * Several additional parameters are provided which will be preset in the message
+ * and which may be used internally to choose the kind of memory to allocate.
+ *
+ * The memory allocated will be automatically freed by the kernel, after the
+ * pointer has been sent to ke_msg_send(). If the message is not sent, it must
+ * be freed explicitly with ke_msg_free().
+ *
+ * Allocation failure is considered critical and should not happen.
+ *
+ * @param[in] id        Message identifier
+ * @param[in] dest_id   Destination Task Identifier
+ * @param[in] src_id    Source Task Identifier
+ * @param[in] param_len Size of the message parameters to be allocated
+ *
+ * @return Pointer to the parameter member of the ke_msg. If the parameter
+ *         structure is empty, the pointer will point to the end of the message
+ *         and should not be used (except to retrieve the message pointer or to
+ *         send the message)
+ ****************************************************************************************
+ */
+void *ke_msg_alloc(ke_msg_id_t const id, ke_task_id_t const dest_id,
+                   ke_task_id_t const src_id, uint16_t const param_len);
+
+/**
+ ****************************************************************************************
+ * @brief Message sending.
+ *
+ * Send a message previously allocated with any ke_msg_alloc()-like functions.
+ *
+ * The kernel will take care of freeing the message memory.
+ *
+ * Once the function have been called, it is not possible to access its data
+ * anymore as the kernel may have copied the message and freed the original
+ * memory.
+ *
+ * @param[in] param_ptr  Pointer to the parameter member of the message that
+ *                       should be sent.
+ ****************************************************************************************
+ */
+
+void ke_msg_send(void const *param_ptr);
+
+/**
+ ****************************************************************************************
+ * @brief Basic message sending.
+ *
+ * Send a message that has a zero length parameter member. No allocation is
+ * required as it will be done internally.
+ *
+ * @param[in] id        Message identifier
+ * @param[in] dest_id   Destination Identifier
+ * @param[in] src_id    Source Identifier
+ ****************************************************************************************
+ */
+void ke_msg_send_basic(ke_msg_id_t const id, ke_task_id_t const dest_id, ke_task_id_t const src_id);
+
+/**
+ ****************************************************************************************
+ * @brief Message forwarding.
+ *
+ * Forward a message to another task by changing its destination and source tasks IDs.
+ *
+ * @param[in] param_ptr  Pointer to the parameter member of the message that
+ *                       should be sent.
+ * @param[in] dest_id New destination task of the message.
+ * @param[in] src_id New source task of the message.
+ ****************************************************************************************
+ */
+void ke_msg_forward(void const *param_ptr, ke_task_id_t const dest_id, ke_task_id_t const src_id);
+
+/**
+ ****************************************************************************************
+ * @brief Message forwarding.
+ *
+ * Forward a message to another task by changing its message ID and its destination and source tasks IDs.
+ *
+ * @param[in] param_ptr  Pointer to the parameter member of the message that
+ *                       should be sent.
+ * @param[in] msg_id  New ID of the message.
+ * @param[in] dest_id New destination task of the message.
+ * @param[in] src_id  New source task of the message.
+ ****************************************************************************************
+ */
+void ke_msg_forward_new_id(void const *param_ptr,
+                           ke_msg_id_t const msg_id, ke_task_id_t const dest_id, ke_task_id_t const src_id);
+
+/**
+ ****************************************************************************************
+ * @brief Free allocated message
+ *
+ * @param[in] msg   Pointer to the message to be freed (not the parameter member!)
+ ****************************************************************************************
+ */
+void ke_msg_free(struct ke_msg const *param);
+
+
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve destination task identifier of a kernel message
+ *
+ * @param[in] param_ptr  Pointer to the parameter member of the message.
+ *
+ * @return message destination task
+ ****************************************************************************************
+ */
+ke_msg_id_t ke_msg_dest_id_get(void const *param_ptr);
+
+
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve source task identifier of a kernel message
+ *
+ * @param[in] param_ptr  Pointer to the parameter member of the message.
+ *
+ * @return message source task
+ ****************************************************************************************
+ */
+ke_msg_id_t ke_msg_src_id_get(void const *param_ptr);
+
+/**
+ * Used to know if message is present in kernel queue or not.
+ *
+ * @param[in]  param_ptr  Pointer to the parameter member of the message.
+ *
+ * @return True if message is present in Kernel Queue, False else.
+ */
+bool ke_msg_in_queue(void const *param_ptr);
+/// @} MSG
+
+#endif // _KE_MSG_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/ke_task.h b/platform/atm2/ATM22xx-x1x/include/ble/ke_task.h
new file mode 100644
index 0000000..6e1259d
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/ke_task.h
@@ -0,0 +1,221 @@
+/**
+ ****************************************************************************************
+ *
+ * @file ke_task.h
+ *
+ * @brief This file contains the definition related to kernel task management.
+ *
+ * Copyright (C) RivieraWaves 2009-2015
+ * Copyright (C) Atmosic 2023
+ *
+ ****************************************************************************************
+ */
+
+#ifndef _KE_TASK_H_
+#define _KE_TASK_H_
+
+/**
+ ****************************************************************************************
+ * @defgroup TASK Task and Process
+ * @ingroup KERNEL
+ * @brief Task management module.
+ *
+ * This module implements the functions used for managing tasks.
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include <stdint.h>          // standard integer
+#include <stdbool.h>         // standard boolean
+
+#include "rwip_config.h"     // stack configuration
+#include "compiler.h"        // compiler defines, INLINE
+#include "ke_msg.h"          // kernel message defines
+
+/* Default Message handler code to handle several message type in same handler. */
+#define KE_MSG_DEFAULT_HANDLER  (0xFFFF)
+/* Invalid task */
+#define KE_TASK_INVALID         (0xFFFF)
+/* Used to know if a message is not present in kernel queue */
+#define KE_MSG_NOT_IN_QUEUE     ((struct co_list_hdr *) 0xFFFFFFFF)
+
+/// Status of ke_task API functions
+enum KE_TASK_STATUS
+{
+    KE_TASK_OK = 0,
+    KE_TASK_FAIL,
+    KE_TASK_UNKNOWN,
+    KE_TASK_CAPA_EXCEEDED,
+    KE_TASK_ALREADY_EXISTS,
+};
+
+
+#define MSG_T(msg)         ((ke_task_id_t)((msg) >> 8))
+#define MSG_I(msg)         ((msg) & ((1<<8)-1))
+
+/// Format of a task message handler function
+typedef int (*ke_msg_func_t)(ke_msg_id_t const msgid, void const *param,
+                             ke_task_id_t const dest_id, ke_task_id_t const src_id);
+
+/// Macro for message handler function declaration or definition
+#define KE_MSG_HANDLER(msg_name, param_struct)   __STATIC int msg_name##_handler(ke_msg_id_t const msgid,     \
+                                                                                param_struct const *param,  \
+                                                                                ke_task_id_t const dest_id, \
+                                                                                ke_task_id_t const src_id)
+
+#define KE_MSG_HANDLER_NO_STATIC(msg_name, param_struct)   int msg_name##_handler(ke_msg_id_t const msgid,     \
+                                                                                param_struct const *param,  \
+                                                                                ke_task_id_t const dest_id, \
+                                                                                ke_task_id_t const src_id)
+
+/// Macro for message handlers table declaration or definition
+#define KE_MSG_HANDLER_TAB(task)   __STATIC const struct ke_msg_handler task##_msg_handler_tab[] =
+
+/// Element of a message handler table.
+struct ke_msg_handler
+{
+    /// Id of the handled message.
+    ke_msg_id_t id;
+    /// Pointer to the handler function for the msgid above.
+    ke_msg_func_t func;
+};
+
+/// Task descriptor grouping all information required by the kernel for the scheduling.
+struct ke_task_desc
+{
+    /// Pointer to the message handler table
+    const struct ke_msg_handler* msg_handler_tab;
+    /// Pointer to the state table (one element for each instance).
+    ke_state_t* state;
+    /// Maximum index of supported instances of the task.
+    uint16_t idx_max;
+    /// Number of messages handled
+    uint16_t msg_cnt;
+};
+
+/*
+ * FUNCTION PROTOTYPES
+ ****************************************************************************************
+ */
+
+
+/**
+ ****************************************************************************************
+ * @brief Initialize Kernel task module.
+ ****************************************************************************************
+ */
+void ke_task_init(void);
+
+/**
+ ****************************************************************************************
+ * @brief Create a task.
+ *
+ * @param[in]  task_type       Task type.
+ * @param[in]  p_task_desc     Pointer to task descriptor.
+ *
+ * @return                     Status
+ ****************************************************************************************
+ */
+uint8_t ke_task_create(uint8_t task_type, struct ke_task_desc const * p_task_desc);
+
+/**
+ ****************************************************************************************
+ * @brief Delete a task.
+ *
+ * @param[in]  task_type       Task type.
+ *
+ * @return                     Status
+ ****************************************************************************************
+ */
+uint8_t ke_task_delete(uint8_t task_type);
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve the state of a task.
+ *
+ * @param[in]  id   Task id.
+ *
+ * @return          Current state of the task
+ ****************************************************************************************
+ */
+ke_state_t ke_state_get(ke_task_id_t const id);
+
+/**
+ ****************************************************************************************
+ * @brief Set the state of the task identified by its Task Id.
+ *
+ * In this function we also handle the SAVE service: when a task state changes we
+ * try to activate all the messages currently saved in the save queue for the given
+ * task identifier.
+ *
+ * @param[in]  id          Identifier of the task instance whose state is going to be modified
+ * @param[in]  state_id    New State
+ *
+ ****************************************************************************************
+ */
+void ke_state_set(ke_task_id_t const id, ke_state_t const state_id);
+
+/**
+ ****************************************************************************************
+ * @brief Generic message handler to consume message without handling it in the task.
+ *
+ * @param[in] msgid Id of the message received (probably unused)
+ * @param[in] param Pointer to the parameters of the message.
+ * @param[in] dest_id TaskId of the receiving task.
+ * @param[in] src_id TaskId of the sending task.
+ *
+ * @return KE_MSG_CONSUMED
+ ****************************************************************************************
+ */
+int ke_msg_discard(ke_msg_id_t const msgid, void const *param,
+                   ke_task_id_t const dest_id, ke_task_id_t const src_id);
+
+/**
+ ****************************************************************************************
+ * @brief Generic message handler to consume message without handling it in the task.
+ *
+ * @param[in] msgid Id of the message received (probably unused)
+ * @param[in] param Pointer to the parameters of the message.
+ * @param[in] dest_id TaskId of the receiving task.
+ * @param[in] src_id TaskId of the sending task.
+ *
+ * @return KE_MSG_CONSUMED
+ ****************************************************************************************
+ */
+int ke_msg_save(ke_msg_id_t const msgid, void const *param,
+                ke_task_id_t const dest_id, ke_task_id_t const src_id);
+
+
+
+/**
+ ****************************************************************************************
+ * @brief This function flushes all messages, currently pending in the kernel for a
+ * specific task.
+ *
+ * @param[in] task The Task Identifier that shall be flushed.
+ ****************************************************************************************
+ */
+void ke_task_msg_flush(ke_task_id_t task);
+
+
+/**
+ ****************************************************************************************
+ * @brief Check validity of a task. If task type or task instance does not exist,
+ * return invalid task
+ *
+ * @param[in] task Task Identifier to check.
+ *
+ * @return Task identifier if valid, invalid identifier else.
+ ****************************************************************************************
+ */
+ke_task_id_t ke_task_check(ke_task_id_t task);
+
+/// @} TASK
+
+#endif // _KE_TASK_H_
+
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/nvds.h b/platform/atm2/ATM22xx-x1x/include/ble/nvds.h
new file mode 100644
index 0000000..129aa75
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/nvds.h
@@ -0,0 +1,248 @@
+/**
+ ****************************************************************************************
+ *
+ * @file nvds.h
+ *
+ * @brief Non Volatile Data Storage (NVDS) driver
+ *
+ * Copyright (C) RivieraWaves 2009-2015
+ *
+ ****************************************************************************************
+ */
+#ifndef _NVDS_H_
+#define _NVDS_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup NVDS
+ * @ingroup COMMON
+ * @brief Non Volatile Data Storage (NVDS)
+ *
+ *   Parameters management
+ *   there are two compilation options:
+ *     + NVDS_8BIT_TAGLENGTH :
+ *       if set, each TAG has a maximum length of 256 bytes
+ *       if not set, each TAG has a maximum length of 65536 bytes
+ *     + NVDS_PACKED :
+ *       if not set, all the TAG header structures and TAG data contents are stored with an
+ *       alignment on 32 bit boundary
+ *       if set, all the TAG header structures and TAG data contents are stored
+ *       consecutively without gaps (as would be a structure with pragma packed)
+ *     + NVDS_READ_WRITE :
+ *       if not set, only GET action on TAGs is provided.
+ *       if set, PUT/DEL/LOCK actions are provided in addition of GET action.
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include <stdbool.h>           // boolean definition
+#include <stdint.h>            // integer definition
+#ifndef NVDS_TOOL
+#include "ke_msg.h"
+#endif // NVDS_TOOL
+
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+/// NVDS is defined as read-write
+#define NVDS_READ_WRITE          1
+
+/// NVDS is defined as packed
+#define NVDS_PACKED              1
+
+/// NVDS has 8-bit length tags
+#define NVDS_8BIT_TAGLENGTH      0
+
+/// Type of the tag length (8 or 16 bits)
+#if (NVDS_8BIT_TAGLENGTH)
+typedef uint8_t  nvds_tag_len_t;
+#else
+typedef uint16_t nvds_tag_len_t;
+#endif // NVDS_8BIT_TAGLENGTH
+
+#if (NVDS_PACKED && !NVDS_8BIT_TAGLENGTH)
+/// Variable tag length type (7 or 15 bits)
+#define NVDS_COMPRESS_TAGLENGTH	1
+#endif
+
+/*
+ * ENUMERATION DEFINITIONS
+ ****************************************************************************************
+ */
+
+/// Possible Returned Status
+enum NVDS_STATUS
+{
+    /// NVDS status OK
+    NVDS_OK,
+    /// generic NVDS status KO
+    NVDS_FAIL,
+    /// NVDS TAG unrecognized
+    NVDS_TAG_NOT_DEFINED,
+    /// No space for NVDS
+    NVDS_NO_SPACE_AVAILABLE,
+    /// Length violation
+    NVDS_LENGTH_OUT_OF_RANGE,
+    /// NVDS parameter locked
+    NVDS_PARAM_LOCKED,
+    /// NVDS corrupted
+    NVDS_CORRUPT
+};
+
+/*
+ * FUNCTION DECLARATIONS
+ ****************************************************************************************
+ */
+
+/**
+ ****************************************************************************************
+ * @brief Initialize NVDS.
+ * @return NVDS_OK
+ ****************************************************************************************
+ */
+uint8_t nvds_init(uint8_t *base, uint32_t len);
+
+/**
+ ****************************************************************************************
+ * @brief Look for a specific tag and return, if found and matching (in length), the
+ *        DATA part of the TAG.
+ *
+ * If the length does not match, the TAG header structure is still filled, in order for
+ * the caller to be able to check the actual length of the TAG.
+ *
+ * @param[in]  tag     TAG to look for whose DATA is to be retrieved
+ * @param[in]  length  Expected length of the TAG
+ * @param[out] buf     A pointer to the buffer allocated by the caller to be filled with
+ *                     the DATA part of the TAG
+ *
+ * @return  NVDS_OK                  The read operation was performed
+ *          NVDS_LENGTH_OUT_OF_RANGE The length passed in parameter is different than the TAG's
+ ****************************************************************************************
+ */
+uint8_t nvds_get(uint8_t tag, nvds_tag_len_t * lengthPtr, uint8_t *buf);
+uint8_t nvds_get8(uint8_t tag, uint8_t *lengthPtr, uint8_t *buf);
+
+/**
+ * @brief Look for a specific tag and return, if found and matching in length,
+ *        a portion of the DATA part of the TAG.
+ *
+ * @param[in] tag            TAG to look for whose DATA is to be retrieved
+ * @param[in] get_offset     Offset to first byte of DATA to be retrieved
+ * @param[in] get_size       Number of bytes of DATA to be retrieved, or all of
+ *                           DATA when zero
+ * @param[in,out] lengthPtr  In:  Length of buf in bytes
+ *                           Out: Number of bytes copied into buf
+ * @param[out] buf           A pointer to the buffer allocated by the caller
+ *                           to be filled with the DATA part of the TAG
+ *
+ * @return  NVDS_OK                  The read operation was performed
+ *          NVDS_LENGTH_OUT_OF_RANGE Buffer too small for requested DATA
+ */
+uint8_t nvds_get_partial(uint8_t tag, nvds_tag_len_t get_offset,
+    nvds_tag_len_t get_size, nvds_tag_len_t *lengthPtr, uint8_t *buf);
+
+#ifndef NVDS_TOOL
+void *
+nvds_get_ke_msg(uint8_t tag, uint8_t *statusPtr,
+                ke_msg_id_t id, ke_task_id_t dest_id, ke_task_id_t src_id,
+                nvds_tag_len_t *lengthPtr, size_t offset);
+#endif // NVDS_TOOL
+
+typedef int (*nvds_walk_callback)(uint8_t tag,
+    uint32_t addr, nvds_tag_len_t len,
+    void (*nvds_read)(uint32_t addr, uint32_t len, uint8_t *buf),
+    void *ctx);
+void
+nvds_walk(nvds_walk_callback callback, void *ctx);
+
+#if (NVDS_READ_WRITE == 1)
+
+/**
+ ****************************************************************************************
+ * @brief Look for a specific tag and delete it (Status set to invalid)
+ *
+ * Implementation notes
+ * 1. The write function call return status is not handled
+ *
+ * @param[in]  tag    TAG to mark as deleted
+ *
+ * @return NVDS_OK                TAG found and deleted
+ *         NVDS_PARAM_LOCKED    TAG found but can not be deleted because it is locked
+ *         (others)        return values from function call @ref nvds_browse_tag
+ ****************************************************************************************
+ */
+uint8_t nvds_del(uint8_t tag);
+
+#ifdef NVDS_TOOL
+/**
+ ****************************************************************************************
+ * @brief Delete all unlocked occurrences of a specific workaround tag (status set to invalid), if any
+ *
+ * @param[in]  tag    workaround TAG group to mark as deleted
+ *
+ * @return NVDS_OK         All unlocked tags in TAG group, if any, found and deleted
+ *         NVDS_FAIL       If TAG is not a workaround tag or if @ref nvds_browse_tag returns NVDS_FAIL
+ *         (others)        return values from function call @ref nvds_browse_tag
+ ****************************************************************************************
+ */
+uint8_t nvds_del_all_unlocked_workarounds(uint8_t tag);
+#endif
+
+/**
+ ****************************************************************************************
+ * @brief Look for a specific tag and lock it (Status lock bit set to LOCK).
+ *
+ * The write function call return status is not handled
+ *
+ * @param[in]  tag    TAG to mark as locked
+ *
+ * @return NVDS_OK    TAG found and locked
+ *         (others)        return values from function call @ref nvds_browse_tag
+ ****************************************************************************************
+ */
+uint8_t nvds_lock(uint8_t tag);
+
+/**
+ ****************************************************************************************
+ * @brief This function adds a specific TAG to the NVDS.
+ *
+ * Steps:
+ * 1) parse all the TAGs to:
+ * 1.1) calculate the total size of all the valid TAGs
+ * 1.2) erase the existing TAGs that have the same ID
+ * 1.3) check if we can use the same TAG area in case of an EEPROM
+ * 1.4) check that the TAG is not locked
+ * 2) if we have to add the new TAG at the end fo the NVDS (cant use same area):
+ * 2.1) allocate the appropriate amount of memory
+ * 2.2) purge the NVDS
+ * 2.3) free the memory allocated
+ * 2.4) check that there is now enough room for the new TAG or return
+ *      NO_SPACE_AVAILABLE
+ * 3) add the new TAG
+ *
+ * @param[in]  tag     TAG to look for whose DATA is to be retrieved
+ * @param[in]  length  Expected length of the TAG
+ * @param[in]  buf     Pointer to the buffer containing the DATA part of the TAG to add to
+ *                     the NVDS
+ *
+ * @return NVDS_OK                  New TAG correctly written to the NVDS
+ *         NVDS_PARAM_LOCKED        New TAG is trying to overwrite a TAG that is locked
+ *         NO_SPACE_AVAILABLE       New TAG can not fit in the available space in the NVDS
+ ****************************************************************************************
+ */
+uint8_t nvds_put(uint8_t tag, nvds_tag_len_t length, const uint8_t *buf);
+uint8_t nvds_put8(uint8_t tag, uint8_t length, const uint8_t *buf);
+
+#endif //(NVDS_READ_WRITE == 1)
+
+/// @} NVDS
+
+#endif // _NVDS_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/prf.h b/platform/atm2/ATM22xx-x1x/include/ble/prf.h
new file mode 100644
index 0000000..ae28b56
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/prf.h
@@ -0,0 +1,309 @@
+/**
+ ****************************************************************************************
+ *
+ * @file prf.h
+ *
+ * @brief Entry point of profile header file.
+ *
+ * Used to manage life cycle of profiles
+ *
+ * Copyright (C) RivieraWaves 2009-2016
+ *
+ ****************************************************************************************
+ */
+
+
+#ifndef _PRF_H_
+#define _PRF_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup PROFILE PROFILES
+ * @ingroup ROOT
+ * @brief Bluetooth Low Energy Host Profiles
+ *
+ * The PROFILE of the stack contains the profile layers (@ref PROX "PROXIMITY",
+ * @ref HTP "HTP",@ref FIND "FIND ME" @ref BPS "Blood Pressure").
+ ****************************************************************************************
+ */
+
+/**
+ ****************************************************************************************
+ * @addtogroup PRF
+ * @ingroup PROFILE
+ * @brief Definitions of Profile management API
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include "rwip_config.h"
+
+#if (BLE_PROFILES)
+
+#include "ke_task.h"
+#include "gapm_task.h"
+#include "prf_get_proto.h"
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+/**
+ * Profile task fields
+ *
+ *  15   14   13   12   11   10   9    8    7    6    5    4    3    2    1    0
+ * +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
+ * | MI |                               TASK Number                                |
+ * +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
+ *
+ * Bit [0-14] : Task number value
+ * Bit [15]   : Task is multi-instantiated (Connection index is conveyed)
+ */
+enum prf_perm_mask
+{
+    /// Task number value
+    PERM_MASK_PRF_TASK      = 0x7FFF,
+    PERM_POS_PRF_TASK       = 0,
+    /// Task is multi-instantiated
+    PERM_MASK_PRF_MI        = 0x8000,
+    PERM_POS_PRF_MI         = 15,
+};
+/*
+ * TYPE DEFINITIONS
+ ****************************************************************************************
+ */
+
+
+/// Profile Environment Data
+typedef struct prf_env
+{
+    /// Application Task Number - if MSB bit set, Multi-Instantiated task
+    ke_task_id_t app_task;
+    /// Profile Task  Number    - if MSB bit set, Multi-Instantiated task
+    ke_task_id_t prf_task;
+} prf_env_t;
+
+
+
+/// Profile task environment variable definition to dynamically allocate a Task.
+struct prf_task_env
+{
+    /// Profile Task description
+    struct ke_task_desc desc;
+    /// pointer to the allocated memory used by profile during runtime.
+    prf_env_t*          env;
+    /// Profile Task Number
+    ke_task_id_t        task;
+    /// Profile Task Identifier
+    ke_task_id_t        id;
+};
+
+/**
+ ****************************************************************************************
+ * @brief Initialization of the Profile module.
+ * This function performs all the initializations of the Profile module.
+ *  - Creation of database (if it's a service)
+ *  - Allocation of profile required memory
+ *  - Initialization of task descriptor to register application
+ *      - Task State array
+ *      - Number of tasks
+ *      - Default task handler
+ *
+ * @param[out]    env        Collector or Service allocated environment data.
+ * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated), only applies for services.
+ * @param[in]     app_task   Application task number.
+ * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum attm_value_perm_mask)
+ * @param[in]     param      Configuration parameters of profile collector or service (32 bits aligned)
+ *
+ * @return status code to know if profile initialization succeed or not.
+ ****************************************************************************************
+ */
+typedef uint8_t (*prf_init_fnct)    (struct prf_task_env* env, uint16_t* start_hdl, uint16_t app_task, uint8_t sec_lvl,  void* params);
+
+/**
+ ****************************************************************************************
+ * @brief Destruction of the Profile module - due to a reset for instance.
+ * This function clean-up allocated memory (attribute database is destroyed by another
+ * procedure)
+ *
+ * @param[in|out]    env        Collector or Service allocated environment data.
+ ****************************************************************************************
+ */
+typedef void    (*prf_destroy_fnct) (struct prf_task_env* env);
+
+/**
+ ****************************************************************************************
+ * @brief Handles Connection creation
+ *
+ * @param[in|out]    env        Collector or Service allocated environment data.
+ * @param[in]        conidx     Connection index
+ ****************************************************************************************
+ */
+typedef void    (*prf_create_fnct)  (struct prf_task_env* env, uint8_t conidx);
+
+/**
+ ****************************************************************************************
+ * @brief Handles Disconnection
+ *
+ * @param[in|out]    env        Collector or Service allocated environment data.
+ * @param[in]        conidx     Connection index
+ * @param[in]        reason     Detach reason
+ ****************************************************************************************
+ */
+typedef void    (*prf_cleanup_fnct) (struct prf_task_env* env, uint8_t conidx, uint8_t reason);
+
+/// Profile task callbacks.
+struct prf_task_cbs
+{
+    /// Initialization callback
+    prf_init_fnct    init;
+    /// Destroy profile callback
+    prf_destroy_fnct destroy;
+    /// Connection callback
+    prf_create_fnct  create;
+    /// Disconnection callback
+    prf_cleanup_fnct cleanup;
+};
+
+
+/// Profile Manager environment structure
+struct prf_env_tag
+{
+    /// Array of profile tasks that can be managed by Profile manager.
+    struct prf_task_env prf[BLE_NB_PROFILES];
+};
+
+/*
+ * MACROS
+ ****************************************************************************************
+ */
+
+
+/*
+ * GLOBAL VARIABLE DECLARATIONS
+ ****************************************************************************************
+ */
+extern struct prf_env_tag prf_env;
+
+/*
+ * FUNCTION DECLARATIONS
+ ****************************************************************************************
+ */
+
+/**
+ ****************************************************************************************
+ * @brief Perform Profile initialization
+ *
+ * @param[in] reset        Reset requested or basic initialization
+ ****************************************************************************************
+ */
+void prf_init(bool reset);
+
+
+/**
+ ****************************************************************************************
+ * @brief Create Profile (collector or service) task creation and initialize it.
+ *
+ * @param[in|out] params   Collector or Service parameter used for profile task creation
+ * @param[out]    prf_task Allocated Task number
+ *
+ * @return status of adding profile task
+ ****************************************************************************************
+ */
+uint8_t prf_add_profile(struct gapm_profile_task_add_cmd * params, ke_task_id_t *prf_task);
+
+
+/**
+ ****************************************************************************************
+ * @brief Link creation event, update profiles states.
+ *
+ * @param[in] conidx        connection index
+ *
+ ****************************************************************************************
+ */
+void prf_create(uint8_t conidx);
+
+/**
+ ****************************************************************************************
+ * @brief Link disconnection event, clean-up profiles.
+ *
+ * @param[in] conidx        connection index
+ * @param[in] reason        detach reason
+ *
+ ****************************************************************************************
+ */
+void prf_cleanup(uint8_t conidx, uint8_t reason);
+
+
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve environment variable allocated for a profile
+ *
+ * @param[in] prf_id        Profile Task Identifier
+ *
+ * @return Environment variable allocated for a profile
+ ****************************************************************************************
+ */
+prf_env_t* prf_env_get(uint16_t prf_id);
+
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve source profile task number value
+ *
+ * @param[in] env     Profile Environment
+ * @param[in] conidx  Connection index
+ *
+ * @return Source profile task number value
+ ****************************************************************************************
+ */
+ke_task_id_t prf_src_task_get(prf_env_t* env, uint8_t conidx);
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve destination application task number value
+ *
+ * @param[in] env     Profile Environment
+ * @param[in] conidx  Connection index
+ *
+ * @return Destination application task number value
+ ****************************************************************************************
+ */
+ke_task_id_t prf_dst_task_get(prf_env_t* env, uint8_t conidx);
+
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve Task Identifier from Task number
+ * (automatically update index of task in returned task id)
+ *
+ * @param task Task number
+ * @return Task Identifier
+ ****************************************************************************************
+ */
+ke_task_id_t prf_get_id_from_task(ke_msg_id_t task);
+
+/**
+ ****************************************************************************************
+ * @brief Retrieve Task Number from Task Identifier
+ * (automatically update index of task in returned task id)
+ *
+ * @param id Task Identifier
+ * @return Task Number
+ ****************************************************************************************
+ */
+ke_task_id_t prf_get_task_from_id(ke_msg_id_t id);
+
+#endif // (BLE_PROFILES)
+
+/// @} PRF
+
+#endif /* _PRF_H_ */
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/prf_get_proto.h b/platform/atm2/ATM22xx-x1x/include/ble/prf_get_proto.h
new file mode 100644
index 0000000..f8925ab
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/prf_get_proto.h
@@ -0,0 +1,252 @@
+#ifndef __PRF_GET_PROTO_H__
+#define __PRF_GET_PROTO_H__
+
+#if (BLE_HT_THERMOM)
+extern const struct prf_task_cbs* htpt_prf_itf_get(void);
+#endif // (BLE_HT_THERMOM)
+
+#if (BLE_HT_COLLECTOR)
+extern const struct prf_task_cbs* htpc_prf_itf_get(void);
+#endif // (BLE_HT_COLLECTOR)
+
+#if (BLE_DIS_SERVER)
+extern const struct prf_task_cbs* diss_prf_itf_get(void);
+#endif // (BLE_HT_THERMOM)
+
+#if (BLE_DIS_CLIENT)
+extern const struct prf_task_cbs* disc_prf_itf_get(void);
+#endif // (BLE_DIS_CLIENT)
+
+#if (BLE_BP_SENSOR)
+extern const struct prf_task_cbs* blps_prf_itf_get(void);
+#endif // (BLE_BP_SENSOR)
+
+#if (BLE_BP_COLLECTOR)
+extern const struct prf_task_cbs* blpc_prf_itf_get(void);
+#endif // (BLE_BP_COLLECTOR)
+
+#if (BLE_TIP_SERVER)
+extern const struct prf_task_cbs* tips_prf_itf_get(void);
+#endif // (BLE_TIP_SERVER)
+
+#if (BLE_TIP_CLIENT)
+extern const struct prf_task_cbs* tipc_prf_itf_get(void);
+#endif // (BLE_TIP_CLIENT)
+
+#if (BLE_HR_SENSOR)
+extern const struct prf_task_cbs* hrps_prf_itf_get(void);
+#endif // (BLE_HR_SENSOR)
+
+#if (BLE_HR_COLLECTOR)
+extern const struct prf_task_cbs* hrpc_prf_itf_get(void);
+#endif // (BLE_HR_COLLECTOR)
+
+#if (BLE_FINDME_LOCATOR)
+extern const struct prf_task_cbs* findl_prf_itf_get(void);
+#endif // (BLE_FINDME_LOCATOR)
+
+#if (BLE_FINDME_TARGET)
+extern const struct prf_task_cbs* findt_prf_itf_get(void);
+#endif // (BLE_FINDME_TARGET)
+
+#if (BLE_PROX_MONITOR)
+extern const struct prf_task_cbs* proxm_prf_itf_get(void);
+#endif // (BLE_PROX_MONITOR)
+
+#if (BLE_PROX_REPORTER)
+extern const struct prf_task_cbs* proxr_prf_itf_get(void);
+#endif // (BLE_PROX_REPORTER)
+
+#if (BLE_SP_CLIENT)
+extern const struct prf_task_cbs* scppc_prf_itf_get(void);
+#endif // (BLE_SP_CLENT)
+
+#if (BLE_SP_SERVER)
+extern const struct prf_task_cbs* scpps_prf_itf_get(void);
+#endif // (BLE_SP_SERVER)
+
+#if (BLE_BATT_CLIENT)
+extern const struct prf_task_cbs* basc_prf_itf_get(void);
+#endif // (BLE_BATT_CLIENT)
+
+#if (BLE_BATT_SERVER)
+extern const struct prf_task_cbs* bass_prf_itf_get(void);
+#endif // (BLE_BATT_SERVER)
+
+#if (BLE_HID_DEVICE)
+extern const struct prf_task_cbs* hogpd_prf_itf_get(void);
+#endif // (BLE_HID_DEVICE)
+
+#if (BLE_HID_BOOT_HOST)
+extern const struct prf_task_cbs* hogpbh_prf_itf_get(void);
+#endif // (BLE_HID_BOOT_HOST)
+
+#if (BLE_HID_REPORT_HOST)
+extern const struct prf_task_cbs* hogprh_prf_itf_get(void);
+#endif // (BLE_HID_REPORT_HOST)
+
+#if (BLE_GL_COLLECTOR)
+extern const struct prf_task_cbs* glpc_prf_itf_get(void);
+#endif // (BLE_GL_COLLECTOR)
+
+#if (BLE_GL_SENSOR)
+extern const struct prf_task_cbs* glps_prf_itf_get(void);
+#endif // (BLE_GL_SENSOR)
+
+#if (BLE_RSC_COLLECTOR)
+extern const struct prf_task_cbs* rscpc_prf_itf_get(void);
+#endif // (BLE_RSC_COLLECTOR)
+
+#if (BLE_RSC_SENSOR)
+extern const struct prf_task_cbs* rscps_prf_itf_get(void);
+#endif // (BLE_RSC_COLLECTOR)
+
+#if (BLE_CSC_COLLECTOR)
+extern const struct prf_task_cbs* cscpc_prf_itf_get(void);
+#endif // (BLE_CSC_COLLECTOR)
+
+#if (BLE_CSC_SENSOR)
+extern const struct prf_task_cbs* cscps_prf_itf_get(void);
+#endif // (BLE_CSC_COLLECTOR)
+
+#if (BLE_AN_CLIENT)
+extern const struct prf_task_cbs* anpc_prf_itf_get(void);
+#endif // (BLE_AN_CLIENT)
+
+#if (BLE_AN_SERVER)
+extern const struct prf_task_cbs* anps_prf_itf_get(void);
+#endif // (BLE_AN_SERVER)
+
+#if (BLE_PAS_CLIENT)
+extern const struct prf_task_cbs* paspc_prf_itf_get(void);
+#endif // (BLE_PAS_CLIENT)
+
+#if (BLE_PAS_SERVER)
+extern const struct prf_task_cbs* pasps_prf_itf_get(void);
+#endif // (BLE_PAS_SERVER)
+
+#if (BLE_CP_COLLECTOR)
+extern const struct prf_task_cbs* cppc_prf_itf_get(void);
+#endif //(BLE_CP_COLLECTOR)
+
+#if (BLE_CP_SENSOR)
+extern const struct prf_task_cbs* cpps_prf_itf_get(void);
+#endif //(BLE_CP_SENSOR)
+
+#if (BLE_LN_COLLECTOR)
+extern const struct prf_task_cbs* lanc_prf_itf_get(void);
+#endif //(BLE_CP_COLLECTOR)
+
+#if (BLE_LN_SENSOR)
+extern const struct prf_task_cbs* lans_prf_itf_get(void);
+#endif //(BLE_CP_SENSOR)
+
+#if (BLE_IPS_SERVER)
+extern const struct prf_task_cbs* ipss_prf_itf_get(void);
+#endif //(BLE_IPS_SERVER)
+
+#if (BLE_IPS_CLIENT)
+extern const struct prf_task_cbs* ipsc_prf_itf_get(void);
+#endif //(BLE_IPS_CLIENT)
+
+#if (BLE_ENV_SERVER)
+extern const struct prf_task_cbs* envs_prf_itf_get(void);
+#endif //(BLE_ENV_SERVER)
+
+#if (BLE_ENV_CLIENT)
+extern const struct prf_task_cbs* envc_prf_itf_get(void);
+#endif //(BLE_ENV_CLIENT
+
+#if (BLE_WSC_SERVER)
+extern const struct prf_task_cbs* wscs_prf_itf_get(void);
+#endif //(BLE_WSC_SERVER)
+
+#if (BLE_WSC_CLIENT)
+extern const struct prf_task_cbs* wscc_prf_itf_get(void);
+#endif //(BLE_WSC_CLIENT
+
+#if (BLE_BCS_SERVER)
+extern const struct prf_task_cbs* bcss_prf_itf_get(void);
+#endif //(BLE_BCS_SERVER)
+
+#if (BLE_BCS_CLIENT)
+extern const struct prf_task_cbs* bcsc_prf_itf_get(void);
+#endif //(BLE_BCS_CLIENT)
+
+#if (BLE_WPT_SERVER)
+extern const struct prf_task_cbs* wpts_prf_itf_get(void);
+#endif //(BLE_WPT_SERVER)
+
+#if (BLE_WPT_CLIENT)
+extern const struct prf_task_cbs* wptc_prf_itf_get(void);
+#endif //(BLE_WPT_CLIENT
+
+#if (BLE_PLX_SERVER)
+extern const struct prf_task_cbs* plxs_prf_itf_get(void);
+#endif //(BLE_PLX_SERVER)
+
+#if (BLE_PLX_CLIENT)
+extern const struct prf_task_cbs* plxc_prf_itf_get(void);
+#endif //(BLE_PLX_CLIENT
+
+#if (BLE_CGM_SERVER)
+extern const struct prf_task_cbs* cgms_prf_itf_get(void);
+#endif //(BLE_CGM_SERVER)
+
+#if (BLE_CGM_CLIENT)
+extern const struct prf_task_cbs* cgmc_prf_itf_get(void);
+#endif //(BLE_CGM_CLIENT
+
+#if (BLE_ISO_MODE_0_PROFILE)
+extern const struct prf_task_cbs* am0_has_prf_itf_get(void);
+#endif // (BLE_ISO_MODE_0_PROFILE)
+
+#if (BLE_UDS_SERVER)
+extern const struct prf_task_cbs* udss_prf_itf_get(void);
+#endif //(BLE_UDS_SERVER)
+
+#if (BLE_UDS_CLIENT)
+extern const struct prf_task_cbs* udsc_prf_itf_get(void);
+#endif //(BLE_UDS_SERVER)
+
+#if (BLE_DBG_THPP)
+extern const struct prf_task_cbs* thpp_prf_itf_get(void);
+#endif //(BLE_DBG_THPP)
+
+#if (BLE_MESH)
+extern const struct prf_task_cbs* mal_prf_itf_get(void);
+#endif // (BLE_MESH)
+
+#if (BLE_ANCS_CLIENT)
+extern const struct prf_task_cbs* ancsc_prf_itf_get(void);
+#endif // (BLE_ANCS_CLIENT)
+
+#if (BLE_AGP_SERVER)
+extern const struct prf_task_cbs* agps_prf_itf_get(void);
+#endif // (BLE_AGP_SERVER)
+
+#if (BLE_AGP_CLIENT)
+extern const struct prf_task_cbs* agpc_prf_itf_get(void);
+#endif // (BLE_AGP_CLIENT)
+
+#if (BLE_TPUTP_SERVER)
+extern const struct prf_task_cbs* tputps_prf_itf_get(void);
+#endif //(BLE_TPUTP_SERVER)
+
+#if (BLE_TPUTP_CLIENT)
+extern const struct prf_task_cbs* tputpc_prf_itf_get(void);
+#endif //(BLE_TPUTP_CLIENT)
+
+#if (BLE_OTAP_SERVER)
+extern const struct prf_task_cbs* otaps_prf_itf_get(void);
+#endif //(BLE_OTAP_SERVER)
+
+#if (BLE_DTP_SERVER)
+extern const struct prf_task_cbs* dtps_prf_itf_get(void);
+#endif //(BLE_DTP_SERVER)
+
+#if (BLE_ATVV_SERVER)
+extern const struct prf_task_cbs *atvvs_prf_itf_get(void);
+#endif // (BLE_ATVV_SERVER)
+
+#endif // __PRF_GET_PROTO_H__
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/rwble_config.h b/platform/atm2/ATM22xx-x1x/include/ble/rwble_config.h
new file mode 100644
index 0000000..39b7191
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/rwble_config.h
@@ -0,0 +1,415 @@
+/**
+ ****************************************************************************************
+ *
+ * @file rwble_config.h
+ *
+ * @brief Configuration of the BLE lower layer stack
+ *
+ * Copyright (C) RivieraWaves 2009-2016
+ *
+ ****************************************************************************************
+ */
+
+#ifndef RWBLE_CONFIG_H_
+#define RWBLE_CONFIG_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup ROOT
+ * @{
+ * @name BLE LL stack configuration
+ * @{
+ ****************************************************************************************
+ */
+/******************************************************************************************/
+/* --------------------------   FEATURE SETUP       --------------------------------------*/
+/******************************************************************************************/
+
+/// Features byte 0
+#define BLE_FEATURES_BYTE0  (  (1 << BLE_FEAT_ENC                   ) \
+                             | (1 << BLE_FEAT_CON_PARAM_REQ_PROC    ) \
+                             | (1 << BLE_FEAT_EXT_REJ_IND           ) \
+                             | (1 << BLE_FEAT_SLAVE_INIT_FEAT_EXCHG ) \
+                             | (1 << BLE_FEAT_PING                  ) \
+                             | (1 << BLE_FEAT_DATA_PKT_LEN_EXT      ) \
+                             | (1 << BLE_FEAT_LL_PRIVACY            ) \
+                             | (1 << BLE_FEAT_EXT_SCAN_FILT_POLICY  ) )
+
+/// Features byte 1
+#define BLE_FEATURES_BYTE1  (  (BLE_PHY_2MBPS_SUPPORT         << (BLE_FEAT_2M_PHY            - 8) ) \
+                             | (BLE_STABLE_MOD_IDX_TX_SUPPORT << (BLE_FEAT_STABLE_MOD_IDX_TX - 8) ) \
+                             | (BLE_STABLE_MOD_IDX_RX_SUPPORT << (BLE_FEAT_STABLE_MOD_IDX_RX - 8) ) \
+                             | (BLE_PHY_CODED_SUPPORT         << (BLE_FEAT_CODED_PHY         - 8) ) \
+                             | (1                             << (BLE_FEAT_EXT_ADV           - 8) ) \
+                             | (1                             << (BLE_FEAT_PER_ADV           - 8) ) \
+                             | (1                             << (BLE_CHAN_SEL_ALGO_2        - 8) ) \
+                             | (1                             << (BLE_PWR_CLASS_1            - 8) ) )
+
+/// Features byte 2
+#define BLE_FEATURES_BYTE2  (  (1 << (MIN_NUM_USED_CHAN_PROC - 16) ) )
+
+/// Features byte 3
+#define BLE_FEATURES_BYTE3  (  (1 << (BLE_FEAT_PUB_KEY_VALID - 24) ) )
+
+/// Features byte 4
+#define BLE_FEATURES_BYTE4  (0)
+
+/// Features byte 5
+#define BLE_FEATURES_BYTE5  (0)
+
+/// Features byte 6
+#define BLE_FEATURES_BYTE6  (0)
+
+/// Features byte 7
+#define BLE_FEATURES_BYTE7  (0)
+
+/// States byte 0
+#define BLE_STATES_BYTE0    ( BLE_NON_CON_ADV_STATE | BLE_DISC_ADV_STATE\
+                            | BLE_CON_ADV_STATE | BLE_HDC_DIRECT_ADV_STATE\
+                            | BLE_PASS_SCAN_STATE | BLE_ACTIV_SCAN_STATE\
+                            | BLE_INIT_MASTER_STATE | BLE_CON_SLAVE_STATE)
+
+/// States byte 1
+#define BLE_STATES_BYTE1    ( BLE_NON_CON_ADV_PASS_SCAN_STATE | BLE_DISC_ADV_PASS_SCAN_STATE\
+                            | BLE_CON_ADV_PASS_SCAN_STATE | BLE_HDC_DIRECT_ADV_PASS_SCAN_STATE\
+                            | BLE_NON_CON_ADV_ACTIV_SCAN_STATE | BLE_DISC_ADV_ACTIV_SCAN_STATE\
+                            | BLE_CON_ADV_ACTIV_SCAN_STATE | BLE_HDC_DIRECT_ADV_ACTIV_SCAN_STATE)
+
+/// States byte 2
+#define BLE_STATES_BYTE2    ( BLE_NON_CON_ADV_INIT_STATE | BLE_DISC_ADV_INIT_STATE\
+                            | BLE_NON_CON_ADV_MASTER_STATE | BLE_DISC_ADV_MASTER_STATE\
+                            | BLE_NON_CON_ADV_SLAVE_STATE | BLE_DISC_ADV_SLAVE_STATE\
+                            | BLE_PASS_SCAN_INIT_STATE | BLE_ACTIV_SCAN_INIT_STATE)
+
+/// States byte 3
+#define BLE_STATES_BYTE3    ( BLE_PASS_SCAN_MASTER_STATE | BLE_ACTIV_SCAN_MASTER_STATE\
+                            | BLE_PASS_SCAN_SLAVE_STATE | BLE_ACTIV_SCAN_SLAVE_STATE\
+                            | BLE_INIT_MASTER_MASTER_STATE | BLE_LDC_DIRECT_ADV_STATE\
+                            | BLE_LDC_DIRECT_ADV_PASS_SCAN_STATE | BLE_LDC_DIRECT_ADV_ACTIV_SCAN_STATE)
+
+/// States byte 4
+#define BLE_STATES_BYTE4    ( BLE_CON_ADV_INIT_MASTER_SLAVE_STATE | BLE_HDC_DIRECT_ADV_INIT_MASTER_SLAVE_STATE\
+                            | BLE_LDC_DIRECT_ADV_INIT_MASTER_SLAVE_STATE | BLE_CON_ADV_MASTER_SLAVE_STATE\
+                            | BLE_HDC_DIRECT_ADV_MASTER_SLAVE_STATE | BLE_LDC_DIRECT_ADV_MASTER_SLAVE_STATE\
+                            | BLE_CON_ADV_SLAVE_SLAVE_STATE | BLE_HDC_DIRECT_ADV_SLAVE_SLAVE_STATE)
+
+/// States byte 5
+#define BLE_STATES_BYTE5    ( BLE_LDC_DIRECT_ADV_SLAVE_SLAVE_STATE |  BLE_INIT_MASTER_SLAVE_STATE)
+
+/// States byte 6
+#define BLE_STATES_BYTE6    0x0
+/// States byte 7
+#define BLE_STATES_BYTE7    0x0
+
+
+/******************************************************************************************/
+/* --------------------------   GENERAL SETUP       --------------------------------------*/
+/******************************************************************************************/
+
+/************************************
+ * KE message heap                  *
+ ************************************
+ *
+ * LLD->LLC/LLM messages:
+ *      - connection      < 6
+ *      - advertising     adv end 56
+ *      - scan            max adv chain 1650
+ *      - initiating      init end 56
+ *      - per adv tx      2
+ *      - per adv rx      max adv chain 1650
+ *      - encryption      16
+ *      => 1650 + 16 + (N-1) x 56
+ *
+ * HCI params stored by LLM:
+ *      - advertising     26
+ *      - scan            16
+ *      - initiating      58
+ *      - per adv tx      8
+ *      - per adv rx      14
+ *      => 58 + (N-1) x 26
+ *
+ * LLCP TX queue:
+ *      - Max 3 LLCP in the queue per link
+ *      - Average 10 bytes per PDU
+ *      - N x 3 x (12 + 10) = N x 66
+ *
+ * HCI commands reception:
+ *      - N commands of max 255 bytes
+ *      - N x 255
+ *
+ * HCI events:
+ *      - Max advertising reports in TX queue: N x 255
+ *      - + 1 100-bytes event per activity: N x 100
+ *
+ * Kernel timers:
+ *     - 1 timer per connection
+ *     - N x 12
+ *
+ * Due to high probability of fragmentation, and sizes of the Kernel message headers, the total of above additions is
+ * doubled.
+ */
+
+#define BLE_HEAP_MSG_SIZE  ( 2 * ( (1650*BLE_OBSERVER)                                           \
+                                    + (16 + (BLE_ACTIVITY_MAX-1) * 56)                         \
+                                    + (58 + (BLE_ACTIVITY_MAX-1) * 26)                         \
+                                    + (BLE_ACTIVITY_MAX * 66)                                  \
+                                    + (HCI_NB_CMD_PKTS * 255)                                  \
+                                    + (BLE_OBSERVER * BLE_MAX_NB_ADV_REP_FRAG * 255 + BLE_ACTIVITY_MAX * 100) \
+                                    + (BLE_ACTIVITY_MAX * 12)                                  \
+                                   ) )
+
+/************************************
+ * Environments heap                *
+ ************************************
+ *
+ * Max env usage per activity:
+ *    - connection     84 (LLC) + 144          228
+ *    - advertising    140                     140
+ *    - scan           32 + 2 x 108 + 16       264
+ *    - initiating     84 + 3 x 80             324
+ *    - per adv tx     80                      80
+ *    - per adv rx     96                      96
+ *
+ * It is possible to have one initiating + 1 scan + (N-2) other activities.
+ * Add 2 activities to consider Heap fragmentation.
+ *
+ * Heap size = 330 + 270 + (N-2 x 230) + 2 x 230 = 600 + N x 230
+ */
+#define BLE_HEAP_ENV_SIZE               (330*BLE_CENTRAL + 270*BLE_OBSERVER + BLE_ACTIVITY_MAX * 230)
+
+/// Normal Rx window size (in us)
+#define BLE_NORMAL_WIN_SIZE              14
+/// Normal Rx window size for coded phy (in us)
+// In Long Range, the symbol for the Access Address is 8 times longer than the symbol for 1Mbps.
+#define BLE_PHY_CODED_NORMAL_WIN_SIZE   (BLE_NORMAL_WIN_SIZE * 8)
+
+
+/// Number of devices in the white list
+#define BLE_WHITELIST_MAX           (BLE_ACTIVITY_MAX + 2)
+
+/// Number of devices in the Resolution Address List
+/// This have to be tuned according to the core frequency. Worst case is having in scan mode
+/// all IRK and valid in resolving list and device receive a Direct Adv Report that contains
+/// RPAs for InitA and AdvA
+#define BLE_RESOL_ADDR_LIST_MAX     (BLE_RAL_MAX)
+
+/// Number of RX data buffers (common for all activities)
+#define BLE_DATA_BUF_NB_RX           (BLE_RX_DESC_NB + 3)
+
+/// Number of TX ACL data buffers
+#define BLE_ACL_BUF_NB_TX            (BLE_ACTIVITY_MAX + 2)
+
+/// Number of advertising data buffers
+#define BLE_ADV_BUF_NB_TX            (BLE_ACTIVITY_MAX)
+/// Number of advertising or scan response data fragments in extended advertising PDU chain
+#define BLE_ADV_FRAG_NB_TX           (5)
+/// Size of advertising or scan response data fragments in extended advertising PDU chain
+#define BLE_ADV_FRAG_SIZE_TX         (254)
+
+
+/// Data packet transmission size and duration
+/// These values represent what the device supports
+#define BLE_MIN_OCTETS  (27) // number of octets
+#define BLE_MIN_TIME    (328) // in us
+#define BLE_MAX_OCTETS  (251) // number of octets
+#define BLE_MAX_TIME    (17040) // in us
+
+/// Number of devices capacity for the scan duplicate filtering
+#if (BLE_OBSERVER)
+#define BLE_DUPLICATE_FILTER_MAX    (10)
+#endif //(BLE_OBSERVER)
+
+/// Number of TX descriptors per BLE connection [2|3|4]
+#define BLE_NB_TX_DESC_PER_CON          2
+
+/// Number of TX descriptors per advertising set
+#define BLE_NB_TX_DESC_PER_ADV          (2+BLE_ADV_FRAG_NB_TX)
+
+/// Number of TX descriptors per BLE activity (maximum needed for connection or advertising)
+#if (BLE_NB_TX_DESC_PER_CON > BLE_NB_TX_DESC_PER_ADV)
+#define BLE_NB_TX_DESC_PER_ACT          (BLE_NB_TX_DESC_PER_CON)
+#else //(BLE_NB_TX_DESC_PER_CON > BLE_NB_TX_DESC_PER_ADV)
+#define BLE_NB_TX_DESC_PER_ACT          (BLE_NB_TX_DESC_PER_ADV)
+#endif //(BLE_NB_TX_DESC_PER_CON > BLE_NB_TX_DESC_PER_ADV)
+
+/// Number of RX descriptors
+#define BLE_RX_DESC_NB               (6)
+/// Number of TX descriptors
+#define BLE_TX_DESC_NB               (BLE_NB_TX_DESC_PER_ACT * BLE_ACTIVITY_MAX)
+
+/// Legacy advertising HCI interface
+#define BLE_ADV_LEGACY_ITF           (HCI_TL_SUPPORT)
+
+
+/******************************************************************************************/
+/* --------------------------   DEBUG SETUP       ----------------------------------------*/
+/******************************************************************************************/
+
+#define BLE_TEST_MODE_SUPPORT       (1)
+
+/******************************************************************************************/
+/* --------------------        CHANNEL ASSESSMENT SETUP         --------------------------*/
+/******************************************************************************************/
+
+/// RSSI threshold for interference detection (in dBm)
+#define BLE_CH_ASSESS_RSSI_INTERF_THR   (-70)
+
+/// Channel map update period (in sec)
+#define BLE_CH_MAP_UPDATE_PERIOD         4
+
+/// Maximum duration without receiving a packet before considering a channel quality unknown  (in slots) (2 secs)
+#define BLE_CH_ASSESS_VALID_TO       0x1900
+
+/// Maximum duration without receiving a packet before reintroducing a channel to the map (in slots) (20 secs)
+#define BLE_CH_REASSESS_TO           0x7D00
+
+/// Maximum counter value for channel assessment
+#define BLE_CH_ASSESS_COUNT_MAX      4
+/// Counter threshold to consider a channel good
+#define BLE_CH_ASSESS_COUNT_THR_GOOD 2
+/// Counter threshold to consider a channel bad
+#define BLE_CH_ASSESS_COUNT_THR_BAD  -2
+/// Minimum counter value for channel assessment
+#define BLE_CH_ASSESS_COUNT_MIN      -4
+
+
+/******************************************************************************************/
+/* -----------------------   SUPPORTED HCI COMMANDS       --------------------------------*/
+/******************************************************************************************/
+
+//byte0
+#define BLE_CMDS_BYTE0      BLE_DISC_CMD
+//byte2
+#define BLE_CMDS_BYTE2      BLE_RD_REM_VERS_CMD
+//byte5
+#define BLE_CMDS_BYTE5      (BLE_SET_EVT_MSK_CMD | BLE_RESET_CMD)
+//byte10
+#define BLE_CMDS_BYTE10     (BLE_HL_NB_CMP_PKT_CMD | BLE_RD_TX_PWR_CMD\
+                            |BLE_HL_BUF_SIZE_CMD | BLE_SET_CTRL_TO_HL_FCTRL_CMD)
+//byte14
+#define BLE_CMDS_BYTE14     (BLE_RD_LOC_VERS_CMD | BLE_RD_LOC_SUP_FEAT_CMD)
+//byte15
+#define BLE_CMDS_BYTE15     (BLE_RD_BD_ADDR_CMD | BLE_RD_RSSI_CMD)
+//byte22
+#define BLE_CMDS_BYTE22     (BLE_SET_EVT_MSK_PG2_CMD)
+//byte25
+#define BLE_CMDS_BYTE25     (BLE_LE_SET_EVT_MSK_CMD | BLE_LE_RD_BUF_SIZE_CMD\
+                            |BLE_LE_RD_LOC_SUP_FEAT_CMD | BLE_LE_SET_RAND_ADDR_CMD\
+                            |BLE_LE_SET_ADV_PARAM_CMD | BLE_LE_RD_ADV_TX_PWR_CMD\
+                            |BLE_LE_SET_ADV_DATA_CMD)
+//byte26
+#define BLE_CMDS_BYTE26     (BLE_LE_SET_SC_RSP_DATA_CMD | BLE_LE_SET_ADV_EN_CMD\
+                            |BLE_LE_SET_SC_PARAM_CMD | BLE_LE_SET_SC_EN_CMD\
+                            |BLE_LE_CREAT_CNX_CMD | BLE_LE_CREAT_CNX_CNL_CMD\
+                            |BLE_LE_RD_WL_SIZE_CMD | BLE_LE_CLEAR_WL_CMD)
+//byte27
+#define BLE_CMDS_BYTE27     (BLE_LE_ADD_DEV_WL_CMD | BLE_LE_REM_DEV_WL_CMD\
+                            |BLE_LE_CNX_UPDATE_CMD | BLE_LE_SET_HL_CH_CLASS_CMD\
+                            |BLE_LE_RD_CH_MAP_CMD | BLE_LE_RD_REM_FEAT_CMD\
+                            |BLE_LE_ENCRYPT_CMD | BLE_LE_RAND_CMD)
+//byte28
+#define BLE_CMDS_BYTE28     (BLE_LE_START_ENC_CMD | BLE_LE_LTK_REQ_RPLY_CMD\
+                            |BLE_LE_LTK_REQ_NEG_RPLY_CMD | BLE_LE_RD_SUPP_STATES_CMD\
+                            |BLE_LE_RX_TEST_CMD | BLE_LE_TX_TEST_CMD\
+                            |BLE_LE_STOP_TEST_CMD)
+//byte32
+#define BLE_CMDS_BYTE32     (BLE_RD_AUTH_PAYL_TO_CMD | BLE_WR_AUTH_PAYL_TO_CMD)
+//byte33
+#define BLE_CMDS_BYTE33     (BLE_LE_REM_CON_PARA_REQ_RPLY_CMD | BLE_LE_REM_CON_PARA_REQ_NEG_RPLY_CMD\
+                            | BLE_LE_SET_DATA_LEN_CMD | BLE_LE_RD_SUGGTED_DFT_DATA_LEN_CMD)
+//byte34
+#define BLE_CMDS_BYTE34     (  BLE_LE_WR_SUGGTED_DFT_DATA_LEN_CMD   \
+                             | BLE_LE_RD_LOC_P256_PUB_KEY_CMD       \
+                             | BLE_LE_GEN_DH_KEY_CMD                \
+                             | BLE_LE_ADD_DEV_TO_RESOLV_LIST_CMD    \
+                             | BLE_LE_REM_DEV_FROM_RESOLV_LIST_CMD  \
+                             | BLE_LE_CLEAR_RESOLV_LIST_CMD         \
+                             | BLE_LE_RD_RESOLV_LIST_SIZE_CMD       \
+                             | BLE_LE_RD_PEER_RESOLV_ADDR_CMD        )
+//byte35
+#define BLE_CMDS_BYTE35     (  BLE_LE_RD_LOCAL_RESOLV_ADDR_CMD      \
+                             | BLE_LE_SET_ADDR_RESOL_CMD            \
+                             | BLE_LE_SET_RESOLV_PRIV_ADDR_TO_CMD   \
+                             | BLE_LE_RD_MAX_DATA_LEN_CMD           \
+                             | BLE_LE_RD_PHY_CMD                    \
+                             | BLE_LE_SET_DFT_PHY_CMD               \
+                             | BLE_LE_SET_PHY_CMD                   \
+                             | BLE_LE_ENH_RX_TEST_CMD                )
+//byte36
+#define BLE_CMDS_BYTE36     (  BLE_LE_ENH_TX_TEST_CMD               \
+                             | BLE_LE_SET_ADV_SET_RAND_ADDR_CMD     \
+                             | BLE_LE_SET_EXT_ADV_PARAM_CMD         \
+                             | BLE_LE_SET_EXT_ADV_DATA_CMD          \
+                             | BLE_LE_SET_EXT_SCAN_RSP_DATA_CMD     \
+                             | BLE_LE_SET_EXT_ADV_EN_CMD            \
+                             | BLE_LE_RD_MAX_ADV_DATA_LEN_CMD       \
+                             | BLE_LE_RD_NB_SUPP_ADV_SETS_CMD        )
+//byte37
+#define BLE_CMDS_BYTE37     (  BLE_LE_RMV_ADV_SET_CMD               \
+                             | BLE_LE_CLEAR_ADV_SETS_CMD            \
+                             | BLE_LE_SET_PER_ADV_PARAM_CMD         \
+                             | BLE_LE_SET_PER_ADV_DATA_CMD          \
+                             | BLE_LE_SET_PER_ADV_EN_CMD            \
+                             | BLE_LE_SET_EXT_SCAN_PARAM_CMD        \
+                             | BLE_LE_SET_EXT_SCAN_EN_CMD           \
+                             | BLE_LE_EXT_CREATE_CON_CMD             )
+//byte38
+#define BLE_CMDS_BYTE38     (  BLE_LE_PER_ADV_CREATE_SYNC_CMD        \
+                             | BLE_LE_PER_ADV_CREATE_SYNC_CANCEL_CMD \
+                             | BLE_LE_PER_ADV_TERM_SYNC_CMD          \
+                             | BLE_LE_ADD_DEV_TO_PER_ADV_LIST_CMD    \
+                             | BLE_LE_RMV_DEV_FROM_PER_ADV_LIST_CMD  \
+                             | BLE_LE_CLEAR_PER_ADV_LIST_CMD         \
+                             | BLE_LE_RD_PER_ADV_LIST_SIZE_CMD       \
+                             | BLE_LE_RD_TX_PWR_CMD                   )
+//byte39
+#define BLE_CMDS_BYTE39     (  BLE_LE_RD_RF_PATH_COMP_CMD            \
+                             | BLE_LE_WR_RF_PATH_COMP_CMD            \
+                             | BLE_LE_SET_PRIV_MODE_CMD               )
+
+
+/******************************************************************************************/
+/* ------------------------   CONNECTION HANDLE   ----------------------------------------*/
+/******************************************************************************************/
+
+/// Bit set for BLE connection handles
+#define BLE_CONHDL_MIN                 (0)
+#define BLE_CONHDL_MAX                 (BLE_CONHDL_MIN + BLE_ACTIVITY_MAX - 1)
+#define BLE_LINKID_TO_CONHDL(link_id)  ((uint16_t) (BLE_CONHDL_MIN + (link_id)))
+#define BLE_CONHDL_TO_LINKID(conhdl)   ((uint8_t) ((conhdl) - BLE_CONHDL_MIN))
+
+/// Bit set for BLE sync handles (used in periodic advertising receiver mode)
+#define BLE_SYNCHDL_MIN                (0)
+#define BLE_SYNCHDL_MAX                (BLE_SYNCHDL_MIN + BLE_ACTIVITY_MAX - 1)
+#define BLE_ACTID_TO_SYNCHDL(act_id)   ((uint16_t) (BLE_SYNCHDL_MIN + (act_id)))
+#define BLE_SYNCHDL_TO_ACTID(synchdl)  ((uint8_t) ((synchdl) - BLE_SYNCHDL_MIN))
+
+/// CIS Channel handle mapping
+#define BLE_CISHDL_MIN                  (0x100)
+#define BLE_CHANHDL_TO_CISHDL(chanhdl)  ((uint16_t) (BLE_CISHDL_MIN + (chanhdl)))
+#define BLE_CISHDL_TO_CHANHDL(cishdl)   ((uint8_t) ((cishdl) - BLE_CISHDL_MIN))
+
+/// BIS Channel handle mapping
+#define BLE_BISHDL_MIN                  (0x200)
+#define BLE_CHANHDL_TO_BISHDL(chanhdl)  ((uint16_t) (BLE_BISHDL_MIN + (chanhdl)))
+#define BLE_BISHDL_TO_CHANHDL(bishdl)   ((uint8_t) ((bishdl) - BLE_BISHDL_MIN))
+
+
+/// AM0 Channel handle mapping
+#define BLE_AM0HDL_MIN                  (0x300)
+#define BLE_CHANHDL_TO_AM0HDL(chanhdl)  ((uint16_t) (BLE_AM0HDL_MIN + (chanhdl)))
+#define BLE_AM0HDL_TO_CHANHDL(am0)      ((uint8_t) ((am0) - BLE_AM0HDL_MIN))
+
+/// ISO Channel handle mapping
+#define BLE_CHANHDL_TO_ISOHDL(chanhdl)     lli_chanhdl_to_isohdl(chanhdl)
+#define BLE_ISOHDL_TO_CHANHDL(isohdl)      ((isohdl > BLE_AM0HDL_MIN) \
+                                               ? BLE_AM0HDL_TO_CHANHDL(isohdl) \
+                                               : ((isohdl > BLE_BISHDL_MIN) \
+                                                    ? BLE_BISHDL_TO_CHANHDL(isohdl) \
+                                                    : BLE_CISHDL_TO_CHANHDL(isohdl)))
+
+
+/// @} BLE stack configuration
+/// @} ROOT
+
+#endif // RWBLE_CONFIG_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/rwble_hl_config.h b/platform/atm2/ATM22xx-x1x/include/ble/rwble_hl_config.h
new file mode 100644
index 0000000..57afc58
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/rwble_hl_config.h
@@ -0,0 +1,289 @@
+/**
+ ****************************************************************************************
+ *
+ * @file rwble_hl_config.h
+ *
+ * @brief Configuration of the BLE protocol stack (max number of supported connections,
+ * type of partitioning, etc.)
+ *
+ * Copyright (C) RivieraWaves 2009-2016
+ *
+ *
+ ****************************************************************************************
+ */
+
+#ifndef RWBLE_HL_CONFIG_H_
+#define RWBLE_HL_CONFIG_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup ROOT
+ * @{
+ * @name BLE stack configuration
+ * @{
+ ****************************************************************************************
+ */
+
+#include "rwble_hl_error.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * DEFINES - Mandatory for BLE Host Layers
+ ****************************************************************************************
+ */
+
+/// Maximum time to remain advertising when in the Limited
+/// Discover able mode: TGAP(lim_adv_timeout)
+/// required value: 180s: (18000 for ke timer)
+#define GAP_TMR_LIM_ADV_TIMEOUT                             0x4650
+
+/// Minimum time to perform scanning when performing
+/// the General Discovery procedure: TGAP(gen_disc_scan_min)
+/// recommended value: 10.24s: (1024 for ke timer)
+#define GAP_TMR_GEN_DISC_SCAN                               0x0400
+
+/// Minimum time to perform scanning when performing the
+/// Limited Discovery procedure: TGAP(lim_disc_scan_min)
+/// recommended value: 10.24s: (1024 for ke timer)
+#define GAP_TMR_LIM_DISC_SCAN                               0x0400
+
+/// Minimum time interval between private address change
+/// TGAP(private_addr_int)
+/// recommended value: 15 minutes
+/// Minimum value 150s
+#define GAP_TMR_PRIV_ADDR_MIN                                (150)
+/// Maximum time interval between private address change
+/// 0xA1B8 (approximately 11.5 hours)
+#define GAP_TMR_PRIV_ADDR_MAX                             (0xA1B8)
+
+
+/// Timer used in connection parameter update procedure
+/// TGAP(conn_param_timeout)
+/// recommended value: 30 s: (3000 for ke timer)
+#define GAP_TMR_CONN_PARAM_TIMEOUT                          0x0BB8
+
+/// Timer used in LE credit based connection procedure
+/// TGAP(lecb_conn_timeout)
+/// recommended value: 30 s: (3000 for ke timer)
+#define GAP_TMR_LECB_CONN_TIMEOUT                           0x0BB8
+
+/// Timer used in LE credit based disconnection procedure
+/// TGAP(lecb_disconn_timeout)
+/// recommended value: 30 s: (3000 for ke timer)
+#define GAP_TMR_LECB_DISCONN_TIMEOUT                        0x0BB8
+
+/// Maximal authorized MTU value - Implementation supports up to (2^12 -1) = 4095 bytes
+#define GAP_MAX_LE_MTU                                     (2048)
+
+/// Maximum GAP device name size
+#define GAP_MAX_NAME_SIZE                                  (0x20)
+
+
+
+
+/// Maximum Transmission Unit
+#define ATT_DEFAULT_MTU                                 (23)
+/// 30 seconds transaction timer
+#define ATT_TRANS_RTX                                   (0x0BB8)
+/// Acceptable encryption key size - strict access
+#define ATT_SEC_ENC_KEY_SIZE                            (0x10)
+
+
+/// Maximum attribute value length
+#define ATT_MAX_VALUE                                   (GAP_MAX_LE_MTU)
+
+
+/******************************************************************************************/
+/* -------------------------   BLE PARTITIONING      -------------------------------------*/
+/******************************************************************************************/
+
+
+/******************************************************************************************/
+/* --------------------------   INTERFACES        ----------------------------------------*/
+/******************************************************************************************/
+
+
+#define APP_MAIN_TASK       rwble_hl_app_main_task
+
+// Host Controller Interface (Host side)
+#define BLEHL_HCIH_ITF            HCIH_ITF
+
+/******************************************************************************************/
+/* --------------------------   COEX SETUP        ----------------------------------------*/
+/******************************************************************************************/
+
+///WLAN coex
+#define BLEHL_WLAN_COEX          RW_WLAN_COEX
+///WLAN test mode
+#define BLEHL_WLAN_COEX_TEST     RW_WLAN_COEX_TEST
+
+/******************************************************************************************/
+/* --------------------------   HOST MODULES      ----------------------------------------*/
+/******************************************************************************************/
+
+#define BLE_GAPM                    1
+#if (BLE_OBSERVER)
+#define BLE_GAPM_HEAP_ENV_SIZE      (sizeof(struct gapm_actv_scan_tag) + KE_HEAP_MEM_RESERVED)
+#elif (BLE_PERIPHERAL)
+#define BLE_GAPM_HEAP_ENV_SIZE      (sizeof(struct gapm_actv_adv_tag)  + KE_HEAP_MEM_RESERVED)
+#else //(BLE_PERIPHERAL)
+#define BLE_GAPM_HEAP_ENV_SIZE      0
+#endif //(BLE_PERIPHERAL)
+
+#if (BLE_CENTRAL || BLE_PERIPHERAL)
+#define BLE_GAPC                    1
+#define BLE_GAPC_HEAP_ENV_SIZE      (sizeof(struct gapc_env_tag)  + KE_HEAP_MEM_RESERVED)
+#else //(BLE_CENTRAL || BLE_PERIPHERAL)
+#define BLE_GAPC                    0
+#define BLE_GAPC_HEAP_ENV_SIZE      0
+#endif //(BLE_CENTRAL || BLE_PERIPHERAL)
+
+#if (BLE_CENTRAL || BLE_PERIPHERAL)
+#define BLE_L2CM                    1
+#define BLE_L2CC                    1
+#define BLE_ATTM                    1
+#define BLE_GATTM                   1
+#define BLE_GATTC                   1
+#define BLE_GATTC_HEAP_ENV_SIZE     (sizeof(struct gattc_env_tag)  + KE_HEAP_MEM_RESERVED)
+#define BLE_L2CC_HEAP_ENV_SIZE      (sizeof(struct l2cc_env_tag)   + KE_HEAP_MEM_RESERVED)
+#else //(BLE_CENTRAL || BLE_PERIPHERAL)
+#define BLE_L2CM                    0
+#define BLE_L2CC                    0
+#define BLE_ATTC                    0
+#define BLE_ATTS                    0
+#define BLE_ATTM                    0
+#define BLE_GATTM                   0
+#define BLE_GATTC                   0
+#define BLE_GATTC_HEAP_ENV_SIZE     0
+#define BLE_L2CC_HEAP_ENV_SIZE      0
+#endif //(BLE_CENTRAL || BLE_PERIPHERAL)
+
+#define BLE_SMPM                    1
+#if (BLE_CENTRAL || BLE_PERIPHERAL)
+#define BLE_SMPC                    1
+#else //(BLE_CENTRAL || BLE_PERIPHERAL)
+#define BLE_SMPC                    0
+#endif //(BLE_CENTRAL || BLE_PERIPHERAL)
+
+
+/******************************************************************************************/
+/* --------------------------   ATT DB            ----------------------------------------*/
+/******************************************************************************************/
+
+//ATT DB,Testing and Qualification related flags
+#if (BLE_CENTRAL || BLE_PERIPHERAL)
+    /// Support of External DB Management
+    #if defined(CFG_EXT_DB)
+        #define BLE_EXT_ATT_DB         1
+    #else
+        #define BLE_EXT_ATT_DB         0
+    #endif // defined(CFG_EXT_DB)
+#else
+    #define BLE_EXT_ATT_DB         0
+#endif // (BLE_CENTRAL || BLE_PERIPHERAL)
+/******************************************************************************************/
+/* --------------------------   PROFILES          ----------------------------------------*/
+/******************************************************************************************/
+#ifdef CFG_PRF
+#define BLE_PROFILES      (1)
+/// Number of Profile tasks managed by GAP manager.
+#define BLE_NB_PROFILES   (CFG_NB_PRF)
+#include "rwprf_config.h"
+#else
+#define BLE_PROFILES      (0)
+#define BLE_NB_PROFILES   (0)
+#endif // CFG_PRF
+
+
+#ifndef   BLE_ATTS
+#if (BLE_CENTRAL || BLE_PERIPHERAL || defined(CFG_ATTS))
+#define BLE_ATTS                    1
+#else
+#define BLE_ATTS                    0
+#endif // (BLE_CENTRAL || BLE_PERIPHERAL || defined(CFG_ATTS))
+#endif // BLE_ATTS
+
+
+#ifndef   BLE_ATTC
+#if (BLE_CENTRAL || defined(CFG_ATTC))
+#define BLE_ATTC                    1
+#else
+#define BLE_ATTC                    0
+#endif // (BLE_CENTRAL || defined(CFG_ATTC))
+#endif // BLE_ATTC
+
+#ifndef   BLE_LECB
+#if (BLE_CENTRAL || BLE_PERIPHERAL)
+#define BLE_LECB                    1
+#else
+#define BLE_LECB                    0
+#endif // (BLE_CENTRAL || defined(CFG_ATTC))
+#endif // BLE_ATTC
+
+
+/// Attribute Server
+#if (BLE_ATTS)
+#define BLE_ATTS                    1
+#else
+#define BLE_ATTS                    0
+#endif //(BLE_ATTS)
+
+
+/// Size of the heap
+#if (BLE_CENTRAL || BLE_PERIPHERAL)
+    /// some heap must be reserved for attribute database
+    #if (BLE_ATTS || BLE_ATTC)
+        /// Can be tuned based on supported profiles
+        #define BLEHL_HEAP_DB_SIZE                 (3072)
+    #else
+        #define BLEHL_HEAP_DB_SIZE                 (0)
+    #endif /* (BLE_ATTS || BLE_ATTC) */
+
+    #if (BLE_EMB_PRESENT)
+    /// Needed "security" heap size for reception of max supported MTU through prepare write procedure
+    /// If retention memory is used, this additionnal heap can be part of the size allocated for the retention memory
+    #define BLEHL_HEAP_DATA_THP_SIZE               (3 * GAP_MAX_LE_MTU)
+    #else // !(BLE_EMB_PRESENT)
+    #define BLEHL_HEAP_DATA_THP_SIZE               (4 * GAP_MAX_LE_MTU)
+    #endif // (BLE_EMB_PRESENT)
+    #if (SECURE_CONNECTIONS)
+    /// Need more heap because of structure allocated for secure connection
+    #define BLEHL_HEAP_MSG_SIZE_PER_CON            (400)
+    #else
+    #define BLEHL_HEAP_MSG_SIZE_PER_CON            (256)
+    #endif //(SECURE_CONNECTIONS)
+
+    #define BLEHL_HEAP_MSG_SIZE                    (((BLEHL_HEAP_MSG_SIZE_PER_CON * BLE_CONNECTION_MAX) > BLEHL_HEAP_DATA_THP_SIZE) \
+                                                        ? (BLEHL_HEAP_MSG_SIZE_PER_CON * BLE_CONNECTION_MAX) : BLEHL_HEAP_DATA_THP_SIZE)
+#elif (BLE_MESH)
+    #define BLEHL_HEAP_MSG_SIZE                    (1024)
+    #define BLEHL_HEAP_DB_SIZE                     (3072)
+#else
+    #define BLEHL_HEAP_MSG_SIZE                    (256)
+    #define BLEHL_HEAP_DB_SIZE                     (0)
+#endif /* #if (BLE_CENTRAL || BLE_PERIPHERAL) */
+
+
+
+
+/// Number of BLE HL tasks
+#define BLEHL_TASK_SIZE       BLE_HOST_TASK_SIZE + BLE_PRF_TASK_SIZE
+
+/// Size of environment variable needed on BLE Host Stack for one link
+#define BLEHL_HEAP_ENV_SIZE  ( BLE_CONNECTION_MAX * ( BLE_GAPC_HEAP_ENV_SIZE       \
+                                                    + BLE_GATTC_HEAP_ENV_SIZE      \
+                                                    + BLE_L2CC_HEAP_ENV_SIZE )     \
+                             + BLE_ACTIVITY_MAX * BLE_GAPM_HEAP_ENV_SIZE )
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} BLE stack configuration
+/// @} ROOT
+
+#endif // RWBLE_HL_CONFIG_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/rwble_hl_error.h b/platform/atm2/ATM22xx-x1x/include/ble/rwble_hl_error.h
new file mode 100644
index 0000000..f6f7b67
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/rwble_hl_error.h
@@ -0,0 +1,440 @@
+/**
+ ****************************************************************************************
+ *
+ * @file rwble_hl_error.h
+ *
+ * @brief File that contains all error codes.
+ *
+ * Copyright (C) RivieraWaves 2009-2016
+ *
+ *
+ ****************************************************************************************
+ */
+
+#ifndef RWBLE_HL_ERROR_H_
+#define RWBLE_HL_ERROR_H_
+
+
+/**
+ ****************************************************************************************
+ * @addtogroup ROOT
+ * @brief High layer error codes
+ *
+ * This module contains the primitives that allow an application accessing and running the
+ * BLE protocol stack
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+
+
+/// Error code from HCI TO HL Range - from 0x90 to 0xD0
+#define RW_ERR_HCI_TO_HL(err)     (((err) != 0) ? ((err) + 0x90) : (0))
+
+
+/// Error code from HL TO HCI Range - from 0x90 to 0xD0
+#define RW_ERR_HL_TO_HCI(err)     (((err) > 0x90) ? ((err) - 0x90) : (0))
+
+/**
+ * List all HL error codes
+ */
+enum hl_err
+{
+    /// No error
+    GAP_ERR_NO_ERROR                                                               = 0x00,
+
+    // ----------------------------------------------------------------------------------
+    // -------------------------  ATT Specific Error ------------------------------------
+    // ----------------------------------------------------------------------------------
+    /// No error
+    ATT_ERR_NO_ERROR                                                               = 0x00,
+    /// 0x01: Handle is invalid
+    ATT_ERR_INVALID_HANDLE                                                         = 0x01,
+    /// 0x02: Read permission disabled
+    ATT_ERR_READ_NOT_PERMITTED                                                     = 0x02,
+    /// 0x03: Write permission disabled
+    ATT_ERR_WRITE_NOT_PERMITTED                                                    = 0x03,
+    /// 0x04: Incorrect PDU
+    ATT_ERR_INVALID_PDU                                                            = 0x04,
+    /// 0x05: Authentication privilege not enough
+    ATT_ERR_INSUFF_AUTHEN                                                          = 0x05,
+    /// 0x06: Request not supported or not understood
+    ATT_ERR_REQUEST_NOT_SUPPORTED                                                  = 0x06,
+    /// 0x07: Incorrect offset value
+    ATT_ERR_INVALID_OFFSET                                                         = 0x07,
+    /// 0x08: Authorization privilege not enough
+    ATT_ERR_INSUFF_AUTHOR                                                          = 0x08,
+    /// 0x09: Capacity queue for reliable write reached
+    ATT_ERR_PREPARE_QUEUE_FULL                                                     = 0x09,
+    /// 0x0A: Attribute requested not existing
+    ATT_ERR_ATTRIBUTE_NOT_FOUND                                                    = 0x0A,
+    /// 0x0B: Attribute requested not long
+    ATT_ERR_ATTRIBUTE_NOT_LONG                                                     = 0x0B,
+    /// 0x0C: Encryption size not sufficient
+    ATT_ERR_INSUFF_ENC_KEY_SIZE                                                    = 0x0C,
+    /// 0x0D: Invalid length of the attribute value
+    ATT_ERR_INVALID_ATTRIBUTE_VAL_LEN                                              = 0x0D,
+    /// 0x0E: Operation not fit to condition
+    ATT_ERR_UNLIKELY_ERR                                                           = 0x0E,
+    /// 0x0F: Attribute requires encryption before operation
+    ATT_ERR_INSUFF_ENC                                                             = 0x0F,
+    /// 0x10: Attribute grouping not supported
+    ATT_ERR_UNSUPP_GRP_TYPE                                                        = 0x10,
+    /// 0x11: Resources not sufficient to complete the request
+    ATT_ERR_INSUFF_RESOURCE                                                        = 0x11,
+    /// 0x80: Application error (also used in PRF Errors)
+    ATT_ERR_APP_ERROR                                                              = 0x80,
+
+    // ----------------------------------------------------------------------------------
+    // -------------------------- L2C Specific Error ------------------------------------
+    // ----------------------------------------------------------------------------------
+    /// Message cannot be sent because connection lost. (disconnected)
+    L2C_ERR_CONNECTION_LOST                                                        = 0x30,
+    /// Invalid PDU length exceed MTU
+    L2C_ERR_INVALID_MTU_EXCEED                                                     = 0x31,
+    /// Invalid PDU length exceed MPS
+    L2C_ERR_INVALID_MPS_EXCEED                                                     = 0x32,
+    /// Invalid Channel ID
+    L2C_ERR_INVALID_CID                                                            = 0x33,
+    /// Invalid PDU
+    L2C_ERR_INVALID_PDU                                                            = 0x34,
+    /// Connection refused - no resources available
+    L2C_ERR_NO_RES_AVAIL                                                           = 0x35,
+    /// Connection refused - insufficient authentication
+    L2C_ERR_INSUFF_AUTHEN                                                          = 0x36,
+    /// Connection refused - insufficient authorization
+    L2C_ERR_INSUFF_AUTHOR                                                          = 0x37,
+    /// Connection refused - insufficient encryption key size
+    L2C_ERR_INSUFF_ENC_KEY_SIZE                                                    = 0x38,
+    /// Connection Refused - insufficient encryption
+    L2C_ERR_INSUFF_ENC                                                             = 0x39,
+    /// Connection refused - LE_PSM not supported
+    L2C_ERR_LEPSM_NOT_SUPP                                                         = 0x3A,
+    /// No more credit
+    L2C_ERR_INSUFF_CREDIT                                                          = 0x3B,
+    /// Command not understood by peer device
+    L2C_ERR_NOT_UNDERSTOOD                                                         = 0x3C,
+    /// Credit error, invalid number of credit received
+    L2C_ERR_CREDIT_ERROR                                                           = 0x3D,
+    /// Channel identifier already allocated
+    L2C_ERR_CID_ALREADY_ALLOC                                                      = 0x3E,
+    /// Unknown PDU
+    L2C_ERR_UNKNOWN_PDU                                                            = 0x3F,
+
+
+    // ----------------------------------------------------------------------------------
+    // -------------------------- GAP Specific Error ------------------------------------
+    // ----------------------------------------------------------------------------------
+    /// Invalid parameters set
+    GAP_ERR_INVALID_PARAM                                                          = 0x40,
+    /// Problem with protocol exchange, get unexpected response
+    GAP_ERR_PROTOCOL_PROBLEM                                                       = 0x41,
+    /// Request not supported by software configuration
+    GAP_ERR_NOT_SUPPORTED                                                          = 0x42,
+    /// Request not allowed in current state.
+    GAP_ERR_COMMAND_DISALLOWED                                                     = 0x43,
+    /// Requested operation canceled.
+    GAP_ERR_CANCELED                                                               = 0x44,
+    /// Requested operation timeout.
+    GAP_ERR_TIMEOUT                                                                = 0x45,
+    /// Link connection lost during operation.
+    GAP_ERR_DISCONNECTED                                                           = 0x46,
+    /// Search algorithm finished, but no result found
+    GAP_ERR_NOT_FOUND                                                              = 0x47,
+    /// Request rejected by peer device
+    GAP_ERR_REJECTED                                                               = 0x48,
+    /// Problem with privacy configuration
+    GAP_ERR_PRIVACY_CFG_PB                                                         = 0x49,
+    /// Duplicate or invalid advertising data
+    GAP_ERR_ADV_DATA_INVALID                                                       = 0x4A,
+    /// Insufficient resources
+    GAP_ERR_INSUFF_RESOURCES                                                       = 0x4B,
+    /// Unexpected Error
+    GAP_ERR_UNEXPECTED                                                             = 0x4C,
+    /// Feature mismatch
+    GAP_ERR_MISMATCH                                                               = 0x4D,
+
+    // ----------------------------------------------------------------------------------
+    // ------------------------- GATT Specific Error ------------------------------------
+    // ----------------------------------------------------------------------------------
+    /// Problem with ATTC protocol response
+    GATT_ERR_INVALID_ATT_LEN                                                       = 0x50,
+    /// Error in service search
+    GATT_ERR_INVALID_TYPE_IN_SVC_SEARCH                                            = 0x51,
+    /// Invalid write data
+    GATT_ERR_WRITE                                                                 = 0x52,
+    /// Signed write error
+    GATT_ERR_SIGNED_WRITE                                                          = 0x53,
+    /// No attribute client defined
+    GATT_ERR_ATTRIBUTE_CLIENT_MISSING                                              = 0x54,
+    /// No attribute server defined
+    GATT_ERR_ATTRIBUTE_SERVER_MISSING                                              = 0x55,
+    /// Permission set in service/attribute are invalid
+    GATT_ERR_INVALID_PERM                                                          = 0x56,
+
+    // ----------------------------------------------------------------------------------
+    // ------------------------- SMP Specific Error -------------------------------------
+    // ----------------------------------------------------------------------------------
+    // SMP Protocol Errors detected on local device
+    /// The user input of pass key failed, for example, the user canceled the operation.
+    SMP_ERROR_LOC_PASSKEY_ENTRY_FAILED                                             = 0x61,
+    /// The OOB Data is not available.
+    SMP_ERROR_LOC_OOB_NOT_AVAILABLE                                                = 0x62,
+    /// The pairing procedure cannot be performed as authentication requirements cannot be met
+    /// due to IO capabilities of one or both devices.
+    SMP_ERROR_LOC_AUTH_REQ                                                         = 0x63,
+    /// The confirm value does not match the calculated confirm value.
+    SMP_ERROR_LOC_CONF_VAL_FAILED                                                  = 0x64,
+    /// Pairing is not supported by the device.
+    SMP_ERROR_LOC_PAIRING_NOT_SUPP                                                 = 0x65,
+    /// The resultant encryption key size is insufficient for the security requirements of
+    /// this device.
+    SMP_ERROR_LOC_ENC_KEY_SIZE                                                     = 0x66,
+    /// The SMP command received is not supported on this device.
+    SMP_ERROR_LOC_CMD_NOT_SUPPORTED                                                = 0x67,
+    /// Pairing failed due to an unspecified reason.
+    SMP_ERROR_LOC_UNSPECIFIED_REASON                                               = 0x68,
+    /// Pairing or Authentication procedure is disallowed because too little time has elapsed
+    /// since last pairing request or security request.
+    SMP_ERROR_LOC_REPEATED_ATTEMPTS                                                = 0x69,
+    /// The command length is invalid or a parameter is outside of the specified range.
+    SMP_ERROR_LOC_INVALID_PARAM                                                    = 0x6A,
+    /// Indicates to the remote device that the DHKey Check value received doesn't
+    /// match the one calculated by the local device.
+    SMP_ERROR_LOC_DHKEY_CHECK_FAILED                                               = 0x6B,
+    /// Indicates that the confirm values in the numeric comparison protocol do not match.
+    SMP_ERROR_LOC_NUMERIC_COMPARISON_FAILED                                        = 0x6C,
+    /// Indicates that the pairing over the LE transport failed due to a Pairing Request sent
+    /// over the BR/EDR transport in process.
+    SMP_ERROR_LOC_BREDR_PAIRING_IN_PROGRESS                                        = 0x6D,
+    /// Indicates that the BR/EDR Link Key generated on the BR/EDR transport cannot be
+    /// used to derive and distribute keys for the LE transport.
+    SMP_ERROR_LOC_CROSS_TRANSPORT_KEY_GENERATION_NOT_ALLOWED                       = 0x6E,
+    // SMP Protocol Errors detected by remote device
+    /// The user input of passkey failed, for example, the user canceled the operation.
+    SMP_ERROR_REM_PASSKEY_ENTRY_FAILED                                             = 0x71,
+    /// The OOB Data is not available.
+    SMP_ERROR_REM_OOB_NOT_AVAILABLE                                                = 0x72,
+    /// The pairing procedure cannot be performed as authentication requirements cannot be
+    /// met due to IO capabilities of one or both devices.
+    SMP_ERROR_REM_AUTH_REQ                                                         = 0x73,
+    /// The confirm value does not match the calculated confirm value.
+    SMP_ERROR_REM_CONF_VAL_FAILED                                                  = 0x74,
+    /// Pairing is not supported by the device.
+    SMP_ERROR_REM_PAIRING_NOT_SUPP                                                 = 0x75,
+    /// The resultant encryption key size is insufficient for the security requirements of
+    /// this device.
+    SMP_ERROR_REM_ENC_KEY_SIZE                                                     = 0x76,
+    /// The SMP command received is not supported on this device.
+    SMP_ERROR_REM_CMD_NOT_SUPPORTED                                                = 0x77,
+    /// Pairing failed due to an unspecified reason.
+    SMP_ERROR_REM_UNSPECIFIED_REASON                                               = 0x78,
+    /// Pairing or Authentication procedure is disallowed because too little time has elapsed
+    /// since last pairing request or security request.
+    SMP_ERROR_REM_REPEATED_ATTEMPTS                                                = 0x79,
+    /// The command length is invalid or a parameter is outside of the specified range.
+    SMP_ERROR_REM_INVALID_PARAM                                                    = 0x7A,
+    /// Indicates to the remote device that the DHKey Check value received doesn't
+    /// match the one calculated by the local device.
+    SMP_ERROR_REM_DHKEY_CHECK_FAILED                                               = 0x7B,
+    /// Indicates that the confirm values in the numeric comparison protocol do not match.
+    SMP_ERROR_REM_NUMERIC_COMPARISON_FAILED                                        = 0x7C,
+    /// Indicates that the pairing over the LE transport failed due to a Pairing Request sent
+    /// over the BR/EDR transport in process.
+    SMP_ERROR_REM_BREDR_PAIRING_IN_PROGRESS                                        = 0x7D,
+    /// Indicates that the BR/EDR Link Key generated on the BR/EDR transport cannot be
+    /// used to derive and distribute keys for the LE transport.
+    SMP_ERROR_REM_CROSS_TRANSPORT_KEY_GENERATION_NOT_ALLOWED                       = 0x7E,
+    // SMP Errors triggered by local device
+    /// The provided resolvable address has not been resolved.
+    SMP_ERROR_ADDR_RESOLV_FAIL                                                     = 0x20,
+    /// The Signature Verification Failed
+    SMP_ERROR_SIGN_VERIF_FAIL                                                      = 0x21,
+    /// The encryption procedure failed because the slave device didn't find the LTK
+    /// needed to start an encryption session.
+    SMP_ERROR_ENC_KEY_MISSING                                                      = 0x22,
+    /// The encryption procedure failed because the slave device doesn't support the
+    /// encryption feature.
+    SMP_ERROR_ENC_NOT_SUPPORTED                                                    = 0x23,
+    /// A timeout has occurred during the start encryption session.
+    SMP_ERROR_ENC_TIMEOUT                                                          = 0x24,
+
+    // ----------------------------------------------------------------------------------
+    //------------------------ Profiles specific error codes ----------------------------
+    // ----------------------------------------------------------------------------------
+    /// Application Error
+    PRF_APP_ERROR                                                                  = 0x80,
+    /// Invalid parameter in request
+    PRF_ERR_INVALID_PARAM                                                          = 0x81,
+    /// Inexistent handle for sending a read/write characteristic request
+    PRF_ERR_INEXISTENT_HDL                                                         = 0x82,
+    /// Discovery stopped due to missing attribute according to specification
+    PRF_ERR_STOP_DISC_CHAR_MISSING                                                 = 0x83,
+    /// Too many SVC instances found -> protocol violation
+    PRF_ERR_MULTIPLE_SVC                                                           = 0x84,
+    /// Discovery stopped due to found attribute with incorrect properties
+    PRF_ERR_STOP_DISC_WRONG_CHAR_PROP                                              = 0x85,
+    /// Too many Char. instances found-> protocol violation
+    PRF_ERR_MULTIPLE_CHAR                                                          = 0x86,
+    /// Attribute write not allowed
+    PRF_ERR_NOT_WRITABLE                                                           = 0x87,
+    /// Attribute read not allowed
+    PRF_ERR_NOT_READABLE                                                           = 0x88,
+    /// Request not allowed
+    PRF_ERR_REQ_DISALLOWED                                                         = 0x89,
+    /// Notification Not Enabled
+    PRF_ERR_NTF_DISABLED                                                           = 0x8A,
+    /// Indication Not Enabled
+    PRF_ERR_IND_DISABLED                                                           = 0x8B,
+    /// Feature not supported by profile
+    PRF_ERR_FEATURE_NOT_SUPPORTED                                                  = 0x8C,
+    /// Read value has an unexpected length
+    PRF_ERR_UNEXPECTED_LEN                                                         = 0x8D,
+    /// Disconnection occurs
+    PRF_ERR_DISCONNECTED                                                           = 0x8E,
+    /// Procedure Timeout
+    PRF_ERR_PROC_TIMEOUT                                                           = 0x8F,
+    /// Client characteristic configuration improperly configured
+    PRF_CCCD_IMPR_CONFIGURED                                                       = 0xFD,
+    /// Procedure already in progress
+    PRF_PROC_IN_PROGRESS                                                           = 0xFE,
+    /// Out of Range
+    PRF_OUT_OF_RANGE                                                               = 0xFF,
+
+    // ----------------------------------------------------------------------------------
+    //-------------------- LL Error codes conveyed to upper layer -----------------------
+    // ----------------------------------------------------------------------------------
+    /// Unknown HCI Command
+    LL_ERR_UNKNOWN_HCI_COMMAND                                                     = 0x91,
+    /// Unknown Connection Identifier
+    LL_ERR_UNKNOWN_CONNECTION_ID                                                   = 0x92,
+    /// Hardware Failure
+    LL_ERR_HARDWARE_FAILURE                                                        = 0x93,
+    /// BT Page Timeout
+    LL_ERR_PAGE_TIMEOUT                                                            = 0x94,
+    /// Authentication failure
+    LL_ERR_AUTH_FAILURE                                                            = 0x95,
+    /// Pin code missing
+    LL_ERR_PIN_MISSING                                                             = 0x96,
+    /// Memory capacity exceed
+    LL_ERR_MEMORY_CAPA_EXCEED                                                      = 0x97,
+    /// Connection Timeout
+    LL_ERR_CON_TIMEOUT                                                             = 0x98,
+    /// Connection limit Exceed
+    LL_ERR_CON_LIMIT_EXCEED                                                        = 0x99,
+    /// Synchronous Connection limit exceed
+    LL_ERR_SYNC_CON_LIMIT_DEV_EXCEED                                               = 0x9A,
+    /// ACL Connection exits
+    LL_ERR_ACL_CON_EXISTS                                                          = 0x9B,
+    /// Command Disallowed
+    LL_ERR_COMMAND_DISALLOWED                                                      = 0x9C,
+    /// Connection rejected due to limited resources
+    LL_ERR_CONN_REJ_LIMITED_RESOURCES                                              = 0x9D,
+    /// Connection rejected due to security reason
+    LL_ERR_CONN_REJ_SECURITY_REASONS                                               = 0x9E,
+    /// Connection rejected due to unacceptable BD Addr
+    LL_ERR_CONN_REJ_UNACCEPTABLE_BDADDR                                            = 0x9F,
+    /// Connection rejected due to Accept connection timeout
+    LL_ERR_CONN_ACCEPT_TIMEOUT_EXCEED                                              = 0xA0,
+    /// Not Supported
+    LL_ERR_UNSUPPORTED                                                             = 0xA1,
+    /// invalid parameters
+    LL_ERR_INVALID_HCI_PARAM                                                       = 0xA2,
+    /// Remote user terminate connection
+    LL_ERR_REMOTE_USER_TERM_CON                                                    = 0xA3,
+    /// Remote device terminate connection due to low resources
+    LL_ERR_REMOTE_DEV_TERM_LOW_RESOURCES                                           = 0xA4,
+    /// Remote device terminate connection due to power off
+    LL_ERR_REMOTE_DEV_POWER_OFF                                                    = 0xA5,
+    /// Connection terminated by local host
+    LL_ERR_CON_TERM_BY_LOCAL_HOST                                                  = 0xA6,
+    /// Repeated attempts
+    LL_ERR_REPEATED_ATTEMPTS                                                       = 0xA7,
+    /// Pairing not Allowed
+    LL_ERR_PAIRING_NOT_ALLOWED                                                     = 0xA8,
+    /// Unknown PDU Error
+    LL_ERR_UNKNOWN_LMP_PDU                                                         = 0xA9,
+    /// Unsupported remote feature
+    LL_ERR_UNSUPPORTED_REMOTE_FEATURE                                              = 0xAA,
+    /// Sco Offset rejected
+    LL_ERR_SCO_OFFSET_REJECTED                                                     = 0xAB,
+    /// SCO Interval Rejected
+    LL_ERR_SCO_INTERVAL_REJECTED                                                   = 0xAC,
+    /// SCO air mode Rejected
+    LL_ERR_SCO_AIR_MODE_REJECTED                                                   = 0xAD,
+    /// Invalid LMP parameters
+    LL_ERR_INVALID_LMP_PARAM                                                       = 0xAE,
+    /// Unspecified error
+    LL_ERR_UNSPECIFIED_ERROR                                                       = 0xAF,
+    /// Unsupported LMP Parameter value
+    LL_ERR_UNSUPPORTED_LMP_PARAM_VALUE                                             = 0xB0,
+    /// Role Change Not allowed
+    LL_ERR_ROLE_CHANGE_NOT_ALLOWED                                                 = 0xB1,
+    /// LMP Response timeout
+    LL_ERR_LMP_RSP_TIMEOUT                                                         = 0xB2,
+    /// LMP Collision
+    LL_ERR_LMP_COLLISION                                                           = 0xB3,
+    /// LMP Pdu not allowed
+    LL_ERR_LMP_PDU_NOT_ALLOWED                                                     = 0xB4,
+    /// Encryption mode not accepted
+    LL_ERR_ENC_MODE_NOT_ACCEPT                                                     = 0xB5,
+    /// Link Key Cannot be changed
+    LL_ERR_LINK_KEY_CANT_CHANGE                                                    = 0xB6,
+    /// Quality of Service not supported
+    LL_ERR_QOS_NOT_SUPPORTED                                                       = 0xB7,
+    /// Error, instant passed
+    LL_ERR_INSTANT_PASSED                                                          = 0xB8,
+    /// Pairing with unit key not supported
+    LL_ERR_PAIRING_WITH_UNIT_KEY_NOT_SUP                                           = 0xB9,
+    /// Transaction collision
+    LL_ERR_DIFF_TRANSACTION_COLLISION                                              = 0xBA,
+    /// Unacceptable parameters
+    LL_ERR_QOS_UNACCEPTABLE_PARAM                                                  = 0xBC,
+    /// Quality of Service rejected
+    LL_ERR_QOS_REJECTED                                                            = 0xBD,
+    /// Channel class not supported
+    LL_ERR_CHANNEL_CLASS_NOT_SUP                                                   = 0xBE,
+    /// Insufficient security
+    LL_ERR_INSUFFICIENT_SECURITY                                                   = 0xBF,
+    /// Parameters out of mandatory range
+    LL_ERR_PARAM_OUT_OF_MAND_RANGE                                                 = 0xC0,
+    /// Role switch pending
+    LL_ERR_ROLE_SWITCH_PEND                                                        = 0xC2,
+    /// Reserved slot violation
+    LL_ERR_RESERVED_SLOT_VIOLATION                                                 = 0xC4,
+    /// Role Switch fail
+    LL_ERR_ROLE_SWITCH_FAIL                                                        = 0xC5,
+    /// Error, EIR too large
+    LL_ERR_EIR_TOO_LARGE                                                           = 0xC6,
+    /// Simple pairing not supported by host
+    LL_ERR_SP_NOT_SUPPORTED_HOST                                                   = 0xC7,
+    /// Host pairing is busy
+    LL_ERR_HOST_BUSY_PAIRING                                                       = 0xC8,
+    /// Controller is busy
+    LL_ERR_CONTROLLER_BUSY                                                         = 0xCA,
+    /// Unacceptable connection initialization
+    LL_ERR_UNACCEPTABLE_CONN_INT                                                   = 0xCB,
+    /// Direct Advertising Timeout
+    LL_ERR_DIRECT_ADV_TO                                                           = 0xCC,
+    /// Connection Terminated due to a MIC failure
+    LL_ERR_TERMINATED_MIC_FAILURE                                                  = 0xCD,
+    /// Connection failed to be established
+    LL_ERR_CONN_FAILED_TO_BE_EST                                                   = 0xCE,
+    /// MAC Connection Failed
+    LL_ERR_MAC_CONN_FAILED                                                         = 0xCF,
+    /// Coarse Clock Adjustment Rejected but Will Try to Adjust Using Clock Dragging
+    LL_ERR_CCA_REJ_USE_CLOCK_DRAG                                                  = 0xD0,
+    /// Type0 Submap Not Defined
+    LL_ERR_TYPE0_SUBMAP_NOT_DEFINED                                                = 0xD1,
+    /// Unknown Advertising Identifier
+    LL_ERR_UNKNOWN_ADVERTISING_ID                                                  = 0xD2,
+    /// Limit Reached
+    LL_ERR_LIMIT_REACHED                                                           = 0xD3,
+    /// Operation Cancelled by Host
+    LL_ERR_OPERATION_CANCELED_BY_HOST                                              = 0xD4,
+};
+
+/// @} RWBLE_HL_ERROR_H
+
+#endif // RWBLE_HL_ERROR_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/rwip.h b/platform/atm2/ATM22xx-x1x/include/ble/rwip.h
new file mode 100644
index 0000000..b32274c
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/rwip.h
@@ -0,0 +1,625 @@
+/**
+****************************************************************************************
+*
+* @file rwip.h
+*
+* @brief RW IP SW main module
+*
+* Copyright (C) RivieraWaves 2009-2015
+* Copyright (C) Atmosic 2023
+*
+****************************************************************************************
+*/
+#ifndef _RWIP_H_
+#define _RWIP_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup ROOT
+ * @brief Entry points of the RW IP stacks/modules
+ *
+ * This module contains the primitives that allow an application accessing and running the
+ * RW IP protocol stacks / modules.
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include "rwip_config.h"          // stack configuration
+
+#include <stdint.h>               // standard integer definitions
+#include <stdbool.h>              // standard boolean definitions
+
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+/// Maximum value of a Bluetooth clock (in 312.5us half slots)
+#define RWIP_MAX_CLOCK_TIME              ((1L<<28) - 1)
+/// Maximum value of a 10ms Bluetooth clock
+#define RWIP_MAX_10MS_TIME               ((1L<<23) - 1)
+/// retrieve 10ms time according to clock time
+#define RWIP_CLOCK_TO_10MS_TIME(clock)   ((clock) >> 5)
+/// retrieve clock time according to 10ms time
+#define RWIP_10MS_TIME_TO_CLOCK(time)    ((time)  << 5)
+/// Invalid target time
+#define RWIP_INVALID_TARGET_TIME         (0xFFFFFFFFL)
+
+
+/// result of sleep state.
+enum rwip_sleep_state
+{
+    /// Some activity pending, can not enter in sleep state
+    RWIP_ACTIVE    = 0,
+    /// CPU can be put in sleep state
+    RWIP_CPU_SLEEP,
+    /// IP could enter in deep sleep
+    RWIP_DEEP_SLEEP,
+};
+
+
+/// Definition of the bits preventing the system from sleeping
+enum prevent_sleep
+{
+    /// Flag indicating that the wake up process is ongoing
+    RW_WAKE_UP_ONGOING                 = 0x0001,
+    /// Flag indicating that an TX transfer is ongoing on Transport Layer
+    RW_TL_TX_ONGOING                   = 0x0002,
+    /// Flag indicating that an RX transfer is ongoing on Transport Layer
+    RW_TL_RX_ONGOING                   = 0x0004,
+    /// Flag indicating HCI timeout is ongoing
+    RW_AHI_TIMEOUT                     = 0x0008,
+    /// Flag indicating that an encryption is ongoing
+    RW_CRYPT_ONGOING                   = 0x0010,
+    /// Flag indicating that controller shall not sleep due to not CSB LPO_Allowed
+    RW_CSB_NOT_LPO_ALLOWED             = 0x0040,
+    /// Flag indicating the MWS/WLAN Event Generator is in operation
+    RW_MWS_WLAN_EVENT_GENERATOR_ACTIVE = 0x0080,
+    /// Flag to indicate that platform does not support deep sleep
+    RW_PLF_DEEP_SLEEP_DISABLED         = 0x0100,
+    /// Flag to indicate that a baseband frame is ongoing
+    RW_BB_FRAME_ONGOING                = 0x0200,
+    /// Flag to indicate that BLE Hopping computation on-going
+    RW_HOP_CALC_ONGOING                = 0x0400,
+    /// Flag to indicate that BT is in active mode (ACL, SCO)
+    RW_BT_ACTIVE_MODE                  = 0x0800,
+    /// Flag to indicate that platform action is ongoing
+    RW_PLF_ONGOING                     = 0x1000,
+    /// Flag indicating that DTM mode is preventing sleep
+    RW_DTM_MODE                        = 0x2000,
+};
+
+/// Parameters - Possible Returned Status
+enum PARAM_STATUS
+{
+    /// PARAM status OK
+    PARAM_OK,
+    /// generic PARAM status KO
+    PARAM_FAIL,
+    /// PARAM ID unrecognized
+    PARAM_ID_NOT_DEFINED,
+    /// No space for PARAM
+    PARAM_NO_SPACE_AVAILABLE,
+    /// Length violation
+    PARAM_LENGTH_OUT_OF_RANGE,
+    /// PARAM parameter locked
+    PARAM_PARAM_LOCKED,
+    /// PARAM corrupted
+    PARAM_CORRUPT
+};
+
+/**
+ * External interface type types.
+ */
+enum rwip_eif_types
+{
+    /// Host Controller Interface - Controller part
+    RWIP_EIF_HCIC,
+
+    /// Host Controller Interface - Host part
+    RWIP_EIF_HCIH,
+
+    /// Application Host interface
+    RWIP_EIF_AHI,
+};
+
+
+/// Enumeration of External Interface status codes
+enum rwip_eif_status
+{
+    /// EIF status OK
+    RWIP_EIF_STATUS_OK,
+    /// EIF status KO
+    RWIP_EIF_STATUS_ERROR,
+
+#if (BLE_EMB_PRESENT == 0)
+    /// External interface detached
+    RWIP_EIF_STATUS_DETACHED,
+    /// External interface attached
+    RWIP_EIF_STATUS_ATTACHED,
+#endif // (BLE_EMB_PRESENT == 0)
+};
+
+/// Enumeration of RF modulations
+enum rwip_rf_mod
+{
+    MOD_GFSK  = 0x01,
+    MOD_DQPSK = 0x02,
+    MOD_8DPSK = 0x03,
+};
+
+#if RW_DEBUG
+/// Assert type
+/*@TRACE*/
+enum assert_type
+{
+    ASSERT_TYPE_WARNING = 0,
+    ASSERT_TYPE_ERROR   = 1,
+};
+#endif //RW_DEBUG
+
+enum rwip_extif_iocodes
+{
+    RWIP_EXTIF_IO_2WIRE_MODE = 0,  // enable 2 wire mode, default is 4 wire mode with full flow control
+};
+
+
+/*
+ * TYPE DEFINITIONS
+ ****************************************************************************************
+ */
+
+/// Time information
+/*@TRACE*/
+typedef struct
+{
+    /// Integer part of the time (in half-slot)
+    uint32_t hs;
+    /// Fractional part of the time (in half-us) (range: 0-624)
+    uint32_t hus;
+} rwip_time_t;
+
+/// API functions of the RF driver that are used by the BLE or BT software
+struct rwip_rf_api
+{
+    /// Function called upon HCI reset command reception
+    void (*reset)(void);
+    /// Function called to enable/disable force AGC mechanism (true: en / false : dis)
+    void (*force_agc_enable)(bool);
+    /// Function called when TX power has to be decreased for a specific link id
+    bool (*txpwr_dec)(uint8_t);
+    /// Function called when TX power has to be increased for a specific link id
+    bool (*txpwr_inc)(uint8_t);
+    /// Function called when TX power has to be set to max for a specific link id
+    void (*txpwr_max_set)(uint8_t);
+    /// Function called to convert a TX power CS power field into the corresponding value in dBm
+    uint8_t (*txpwr_dbm_get)(uint8_t, uint8_t);
+    /// Function called to convert a power in dBm into a control structure tx power field
+    uint8_t (*txpwr_cs_get)(int8_t, bool);
+    /// Function called to convert the RSSI read from the control structure into a real RSSI
+    int8_t (*rssi_convert)(uint8_t, uint8_t);
+    /// Function used to read a RF register
+    uint32_t (*reg_rd)(uint32_t);
+    /// Function used to write a RF register
+    void (*reg_wr)(uint32_t, uint32_t);
+    /// Function called to put the RF in deep sleep mode
+    void (*sleep)(void);
+    /// Index of minimum TX power
+    uint8_t txpwr_min;
+    /// Index of maximum TX power
+    uint8_t txpwr_max;
+    /// RSSI high threshold ('real' signed value in dBm)
+    int8_t rssi_high_thr;
+    /// RSSI low threshold ('real' signed value in dBm)
+    int8_t rssi_low_thr;
+    /// interferer threshold ('real' signed value in dBm)
+    int8_t rssi_interf_thr;
+    /// RF wakeup delay (in slots)
+    uint8_t wakeup_delay;
+};
+
+/// API functions of the parameters that are used by the BLE or BT software
+struct rwip_param_api
+{
+    /**
+     * Get a parameter value
+     * @param[in]      param_id     Parameter identifier
+     * @param[in/out]  lengthPtr    Pointer to the length of the parameter (input: contain max length, output contain the effective param length)
+     * @param[out]     buf          Pointer to the buffer be filled with the parameter value
+     * @return  status              0: success | >0 : error
+     */
+    uint8_t (*get) (uint8_t param_id, uint8_t * lengthPtr, uint8_t *buf);
+
+    /**
+     * Set a parameter value
+     * @param[in]      param_id     Parameter identifier
+     * @param[in/out]  length       Length of the parameter
+     * @param[out]     buf          Pointer to the buffer containing the parameter value
+     * @return  status              0: success | >0 : error
+     */
+    uint8_t (*set) (uint8_t param_id, uint8_t length, const uint8_t *buf);
+
+    /**
+     * Delete a parameter
+     * @param[in]      param_id     Parameter identifier
+     * @return  status              0: success | >0 : error
+     */
+    uint8_t (*del) (uint8_t param_id);
+};
+
+/// Internal API for priority
+struct rwip_prio
+{
+    ///value
+    uint8_t value;
+    ///Increment
+    uint8_t increment;
+};
+/**
+ ****************************************************************************************
+ * @brief Function called when packet transmission/reception is finished.
+
+ * @param[in]  dummy  Dummy data pointer returned to callback when operation is over.
+ * @param[in]  status Ok if action correctly performed, else reason status code.
+ *****************************************************************************************
+ */
+typedef void (*rwip_eif_callback) (void*, uint8_t);
+
+/**
+ * Transport layer communication interface.
+ */
+struct rwip_eif_api
+{
+    /**
+     *************************************************************************************
+     * @brief Starts a data reception.
+     *
+     * @param[out] bufptr      Pointer to the RX buffer
+     * @param[in]  size        Size of the expected reception
+     * @param[in]  callback    Pointer to the function called back when transfer finished
+     * @param[in]  dummy       Dummy data pointer returned to callback when reception is finished
+     *************************************************************************************
+     */
+    void (*read) (uint8_t *bufptr, uint32_t size, rwip_eif_callback callback, void* dummy);
+
+    /**
+     *************************************************************************************
+     * @brief Starts a data transmission.
+     *
+     * @param[in]  bufptr      Pointer to the TX buffer
+     * @param[in]  size        Size of the transmission
+     * @param[in]  callback    Pointer to the function called back when transfer finished
+     * @param[in]  dummy       Dummy data pointer returned to callback when transmission is finished
+     *************************************************************************************
+     */
+    void (*write)(uint8_t *bufptr, uint32_t size, rwip_eif_callback callback, void* dummy);
+
+    /**
+     *************************************************************************************
+     * @brief Enable Interface flow.
+     *************************************************************************************
+     */
+    void (*flow_on)(void);
+
+    /**
+     *************************************************************************************
+     * @brief Disable Interface flow.
+     *
+     * @return True if flow has been disabled, False else.
+     *************************************************************************************
+     */
+    bool (*flow_off)(void);
+
+    /**
+     *************************************************************************************
+     * @brief ioctl
+     * @param[in]  code      I/O control code
+     * @param[in]  param     I/O control code value
+     * @return status code
+     *************************************************************************************
+     */
+    uint8_t (*ioctl)(uint8_t code, uint32_t param);
+
+};
+
+/*
+ * VARIABLE DECLARATION
+*****************************************************************************************
+ */
+
+/// API for RF driver
+extern struct rwip_rf_api rwip_rf;
+/// API for parameters
+extern struct rwip_param_api rwip_param;
+#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)
+/// API for dual mode priority
+extern const struct rwip_prio rwip_priority[RWIP_PRIO_IDX_MAX];
+
+extern uint8_t sleep_enable;
+#if (RW_WLAN_COEX || RW_MWS_COEX)
+/// API for COEX configuration
+extern const uint8_t rwip_coex_cfg[RWIP_COEX_CFG_MAX];
+#endif //(RW_WLAN_COEX || RW_MWS_COEX)
+/// Programming delay, margin for programming the baseband in advance of each activity (in half-slots)
+extern uint8_t rwip_prog_delay;
+#endif //(BT_EMB_PRESENT || BLE_EMB_PRESENT)
+
+/*
+ * MACROS
+ ****************************************************************************************
+ */
+
+/// Get Event status flag
+#if (BT_EMB_PRESENT || BLE_EMB_PRESENT)
+#if (RW_WLAN_COEX || RW_MWS_COEX)
+#define RWIP_COEX_GET(coex_cfg_idx, bit_field) \
+                (uint8_t)(((rwip_coex_cfg[RWIP_COEX_ ## coex_cfg_idx ##_IDX]) >> RWIP_ ## bit_field ## _POS ) & RWIP_COEX_BIT_MASK)
+#else //!(RW_WLAN_COEX || RW_MWS_COEX)
+#define RWIP_COEX_GET(coex_cfg_idx, bit_field) 0
+#endif //(RW_WLAN_COEX || RW_MWS_COEX)
+#endif //(BT_EMB_PRESENT || BLE_EMB_PRESENT)
+
+/*
+ * FUNCTION DECLARATION
+*****************************************************************************************
+ */
+
+/**
+ ****************************************************************************************
+ * @brief Initializes the RW BT SW.
+ *
+ ****************************************************************************************
+ */
+void rwip_init(uint32_t error);
+
+/**
+ ****************************************************************************************
+ * @brief Reset the RW BT SW.
+ *
+ ****************************************************************************************
+ */
+void rwip_reset(void);
+
+
+
+#if (BT_EMB_PRESENT)
+
+#if PCA_SUPPORT
+/**
+ ****************************************************************************************
+ * @brief Check if clock dragging limitation
+ *
+ * @return    true if clock dragging must be used
+ ****************************************************************************************
+ */
+bool rwip_pca_clock_dragging_only(void);
+#endif //PCA_SUPPORT
+#endif // (BT_EMB_PRESENT)
+
+#if (BT_EMB_PRESENT || BLE_EMB_PRESENT)
+#if (RW_MWS_COEX)
+/**
+ ****************************************************************************************
+ * @brief Enable/Disable the MWS coexistence interface.
+ *
+ * @param[in]   CoexSetting     Coexistence value
+ *
+ ****************************************************************************************
+ */
+void rwip_mwscoex_set(bool state);
+#endif //RW_MWS_COEX
+
+#if (RW_WLAN_COEX)
+/**
+ ****************************************************************************************
+ * @brief Enable/Disable the Wireless LAN coexistence interface.
+ *
+ * @param[in]   CoexSetting     Coexistence value
+ *
+ ****************************************************************************************
+ */
+void rwip_wlcoex_set(bool state);
+#endif //RW_WLAN_COEX
+#endif //(BT_EMB_PRESENT || BLE_EMB_PRESENT)
+
+/**
+ ****************************************************************************************
+ * @brief Function to implement in platform in order to retrieve each external interface API
+ *
+ * @param[in] idx External interface index
+ *
+ * @return External interface api structure
+ ****************************************************************************************
+ */
+extern const struct rwip_eif_api* rwip_eif_get(uint8_t idx);
+
+#if RW_DEBUG
+/**
+ ****************************************************************************************
+ * @brief Raises an assertion message to the control interface (if present)
+ *
+ * @param[in] file    File name
+ * @param[in] line    Line number
+ * @param[in] param0  Parameter 0 (custom value given by the assert instruction)
+ * @param[in] param1  Parameter 1 (custom value given by the assert instruction)
+ * @param[in] type    0: warning / 1: error
+ ****************************************************************************************
+ */
+void rwip_assert(const char * file, int line, int param0, int param1, uint8_t type);
+#endif //RW_DEBUG
+
+
+/* **************************************************************************************
+ * Driver functions
+ * **************************************************************************************
+ */
+
+/**
+ ****************************************************************************************
+ * @brief Retrieved sampled time
+ *
+ * @note Shall be called within a critical section
+ *
+ * @return current time sampled (@see rwip_time_t)
+ ****************************************************************************************
+ */
+rwip_time_t rwip_time_get(void);
+
+
+#if (BT_EMB_PRESENT)
+/**
+ ****************************************************************************************
+ * @brief Set current time
+ *
+ * @param clock value in half-slots
+ ****************************************************************************************
+ */
+void rwip_time_set(uint32_t clock);
+#endif // (BT_EMB_PRESENT)
+
+/**
+ ****************************************************************************************
+ * @brief Set the a 10 ms target timer
+ *
+ * @note if target is RWIP_INVALID_TARGET_TIME, not timer are programmed
+ *
+ * @param[in] target       10ms Timer target value
+ ****************************************************************************************
+ */
+void rwip_timer_10ms_set(uint32_t target);
+
+#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)
+/**
+ ****************************************************************************************
+ * @brief Set the a half slot target timer
+ *
+ * @note if target is RWIP_INVALID_TARGET_TIME, not timer are programmed
+ *
+ * @param[in] target      Half Slot Timer target value
+ ****************************************************************************************
+ */
+void rwip_timer_hs_set(uint32_t target);
+
+/**
+ ****************************************************************************************
+ * @brief Set the a half slot target timer
+ *
+ * @note if target is RWIP_INVALID_TARGET_TIME, not timer are programmed
+ *
+ * @param[in] target         Half Slot Timer target value
+ * @param[in] half_us_delay  Half us timer delay in corresponding half slot (range [0:624])
+ ****************************************************************************************
+ */
+void rwip_timer_hus_set(uint32_t target, uint32_t half_us_delay);
+#endif // (BLE_EMB_PRESENT || BT_EMB_PRESENT)
+
+/**
+ ****************************************************************************************
+ * @brief Start AES encryption
+ *
+ * The exchange memory must be filled before calling this function.
+ * This function expect to be called from a BLE Module
+ *
+ * @param[in] key           AES Encryption key must be 16 bytes
+ * @param[in] val           16 bytes value array to encrypt using AES
+ ****************************************************************************************
+ */
+void rwip_aes_encrypt(const uint8_t *key, const uint8_t* val);
+
+#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)
+
+/**
+ ****************************************************************************************
+ * @brief Request a Software interrupt to be triggered
+ ****************************************************************************************
+ */
+void rwip_sw_int_req(void);
+#endif // (BLE_EMB_PRESENT || BT_EMB_PRESENT)
+/**
+ ****************************************************************************************
+ * @brief Invoke the sleep function.
+ *
+ * @return  sleep status (@see enum rwip_sleep_state)
+ ****************************************************************************************
+ */
+uint8_t rwip_sleep(bool *already_asleep, int32_t *deep_duration);
+#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)
+
+/**
+ ****************************************************************************************
+ * @brief Handle the common core interrupts.
+ ****************************************************************************************
+ */
+void rwip_isr(void);
+
+#endif // (BLE_EMB_PRESENT || BT_EMB_PRESENT)
+/**
+ ****************************************************************************************
+ * @brief Set a bit in the prevent sleep bit field, in order to prevent the system from
+ *        going to sleep
+ *
+ * @param[in] prv_slp_bit   Bit to be set in the prevent sleep bit field
+ ****************************************************************************************
+ */
+void rwip_prevent_sleep_set(uint16_t prv_slp_bit);
+
+/**
+ ****************************************************************************************
+ * @brief Clears a bit in the prevent sleep bit field, in order to allow the system
+ *        going to sleep
+ *
+ * @param[in] prv_slp_bit   Bit to be cleared in the prevent sleep bit field
+ ****************************************************************************************
+ */
+void rwip_prevent_sleep_clear(uint16_t prv_slp_bit);
+
+#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)
+/**
+ ****************************************************************************************
+ * @brief Check if the system is permanently active (e.g. for BT ACL connection)
+ *
+ * @return  false: system might sleep | true: system stays active
+ ****************************************************************************************
+ */
+bool rwip_active_check(void);
+
+/**
+ * @brief Fetch LP clock frequency from previous rwip_set_lp_hz()
+ *
+ * @return Value in Hz, or 0 when using a xtal
+ */
+uint32_t rwip_get_lp_hz(void);
+
+/**
+ * @brief Report measured LP clock frequency
+ *
+ * @param[in] lp_hz  Value in Hz, or 0 when using a xtal
+ */
+void rwip_set_lp_hz(uint32_t lp_hz);
+
+/**
+ * @brief Possibly raise volatile sleep_algo_dur setting
+ *        (above PARAM_ID_SLEEP_ALGO_DUR)
+ *
+ * @param[in] sleep_algo_dur  New value in half us, if greater than current
+ */
+void rwip_raise_sleep_algo_dur(uint16_t sleep_algo_dur);
+
+#endif // (BLE_EMB_PRESENT || BT_EMB_PRESENT)
+
+/**
+ ****************************************************************************************
+ * @brief Schedule all pending events.
+ *
+ ****************************************************************************************
+ */
+void rwip_schedule(void);
+
+///@} ROOT
+
+#endif // _RWIP_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/rwip_config.h b/platform/atm2/ATM22xx-x1x/include/ble/rwip_config.h
new file mode 100644
index 0000000..4a9d7aa
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/rwip_config.h
@@ -0,0 +1,1344 @@
+/**
+ ****************************************************************************************
+ *
+ * @file rwip_config.h
+ *
+ * @brief Configuration of the RW IP SW
+ *
+ * Copyright (C) RivieraWaves 2009-2015
+ * Copyright (C) Atmosic 2023
+ *
+ ****************************************************************************************
+ */
+
+#ifndef RWIP_CONFIG_H_
+#define RWIP_CONFIG_H_
+
+/// Default programming delay, margin for programming the baseband in advance of each activity (in half-slots)
+#define IP_PROG_DELAY_DFT  (4)
+
+/**
+ ****************************************************************************************
+ * @addtogroup ROOT
+ * @{
+ *
+ *  Information about RW SW IP options and flags
+ *
+ *        BT_DUAL_MODE             BT/BLE Dual Mode
+ *        BT_STD_MODE              BT Only
+ *        BLE_STD_MODE             BLE Only
+ *
+ *        BT_EMB_PRESENT           BT controller exists
+ *        BLE_EMB_PRESENT          BLE controller exists
+ *        BLE_HOST_PRESENT         BLE host exists
+ *
+ * @name RW Stack Configuration
+ * @{
+ ****************************************************************************************
+ */
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+/******************************************************************************************/
+/* --------------------------   GENERAL SETUP       --------------------------------------*/
+/******************************************************************************************/
+
+/// Check if compilation is performed for BLE HW 5.0 + ISO target
+#if (defined(CFG_HW_50_ISO))
+#define BLE_HW_50_ISO        1
+#else
+#define BLE_HW_50_ISO        0
+#endif // (defined(CFG_HW_50_ISO))
+
+/// Flag indicating if stack is compiled in dual or single mode
+#if defined(CFG_BT)
+    #define BLE_STD_MODE                     0
+    #if defined(CFG_BLE)
+        #define BT_DUAL_MODE                 1
+        #define BT_STD_MODE                  0
+    #else // CFG_BLE
+        #define BT_DUAL_MODE                 0
+        #define BT_STD_MODE                  1
+    #endif // CFG_BLE
+#elif defined(CFG_BLE)
+    #define BT_DUAL_MODE                     0
+    #define BT_STD_MODE                      0
+    #define BLE_STD_MODE                     1
+#endif // CFG_BT
+
+/******************************************************************************************/
+/* -------------------------   STACK PARTITIONING      -----------------------------------*/
+/******************************************************************************************/
+
+#if (BT_DUAL_MODE)
+    #define BT_EMB_PRESENT              1
+    #define BLE_EMB_PRESENT             1
+    #define HCI_PRESENT                 1
+    #define BLE_HOST_PRESENT            0
+    #define BLE_APP_PRESENT             0
+#elif (BT_STD_MODE)
+    #define BT_EMB_PRESENT              1
+    #define BLE_EMB_PRESENT             0
+    #define HCI_PRESENT                 1
+    #define BLE_HOST_PRESENT            0
+    #define BLE_APP_PRESENT             0
+#elif (BLE_STD_MODE)
+    #define BT_EMB_PRESENT              0
+    #define HCI_PRESENT                 1
+    #if defined(CFG_EMB)
+        #define BLE_EMB_PRESENT         1
+    #else
+        #define BLE_EMB_PRESENT         0
+    #endif //CFG_EMB
+    #if defined(CFG_HOST)
+        #define BLE_HOST_PRESENT        1
+    #else
+        #define BLE_HOST_PRESENT        0
+    #endif //CFG_HOST
+    #if defined(CFG_APP)
+        #define BLE_APP_PRESENT         1
+    #else
+        #define BLE_APP_PRESENT         0
+    #endif //CFG_APP
+#endif // BT_DUAL_MODE / BT_STD_MODE / BLE_STD_MODE
+
+/// Flag indicating that Mesh is supported
+#if defined(CFG_BLE_MESH)
+#define BLE_MESH      1
+#else  // !defined(CFG_BLE_MESH)
+#define BLE_MESH      0
+#endif // defined(CFG_BLE_MESH)
+
+/******************************************************************************************/
+/* -------------------------   INTERFACES DEFINITIONS      -------------------------------*/
+/******************************************************************************************/
+
+/// Application Host Interface
+#if defined(CFG_AHITL)
+#define AHI_TL_SUPPORT       1
+#else // defined(CFG_AHITL)
+#define AHI_TL_SUPPORT       0
+#endif // defined(CFG_AHITL)
+
+
+/// Host Controller Interface Support (defines if HCI parser is present or not)
+#if defined(CFG_HCITL)
+#define HCI_TL_SUPPORT      1
+#else //defined(CFG_HCITL)
+#define HCI_TL_SUPPORT      0
+#endif //defined(CFG_HCITL)
+
+
+#if BLE_HOST_PRESENT
+#define H4TL_SUPPORT      ((AHI_TL_SUPPORT) + (HCI_TL_SUPPORT))
+#else // !BLE_HOST_PRESENT
+#define H4TL_SUPPORT      (HCI_TL_SUPPORT)
+#endif // BLE_HOST_PRESENT
+
+/// Number of HCI commands the stack can handle simultaneously
+#define HCI_NB_CMD_PKTS   (5 * HCI_TL_SUPPORT)
+
+/// Direct Test Mode Host Interface support
+#if defined(CFG_BLE_DTM)
+#define BLE_DTM_SUPPORT  1
+#else
+#define BLE_DTM_SUPPORT  0
+#endif // CFG_BLE_DTM
+
+#if defined(CFG_BLE_DTM_OVERRIDE)
+#define BLE_DTM_OVERRIDE  1
+#else
+#define BLE_DTM_OVERRIDE  0
+#endif // CFG_BLE_DTM_OVERRIDE
+
+#define EXIF_UART_VIRT_IDX_H4TL      0  // default virtual serial port index for H4 transport
+#define EXIF_UART_VIRT_IDX_H4TL_ALT  1  // alternate for H4TL
+#define EXIF_UART_VIRT_IDX_DTM       3  // virtual serial port index for DTM
+#define EXIF_UART_VIRT_IDX_DUMMY     4  // virtual serial port index for the dummy interface
+#define EXIF_UART_VIRT_IDX_TESTING   5  // UART testing application
+
+/******************************************************************************************/
+/* --------------------------   BLE COMMON DEFINITIONS      ------------------------------*/
+/******************************************************************************************/
+/// Kernel Heap memory sized reserved for allocate dynamically connection environment
+#define KE_HEAP_MEM_RESERVED        (4)
+
+#if defined(CFG_BLE)
+
+/// Broadcaster
+#if (defined(CFG_BROADCASTER) || defined(CFG_PERIPHERAL) || defined(CFG_ALLROLES))
+#define BLE_BROADCASTER      1
+#else
+#define BLE_BROADCASTER      0
+#endif // (defined(CFG_BROADCASTER) || defined(CFG_PERIPHERAL) || defined(CFG_ALLROLES))
+
+/// Observer
+#if (defined(CFG_OBSERVER) || defined(CFG_CENTRAL) || defined(CFG_ALLROLES))
+#define BLE_OBSERVER      1
+#else
+#define BLE_OBSERVER      0
+#endif // (defined(CFG_OBSERVER) || defined(CFG_CENTRAL) || defined(CFG_ALLROLES))
+
+/// Central
+#if (defined(CFG_CENTRAL) || defined(CFG_ALLROLES))
+#define BLE_CENTRAL      1
+#else
+#define BLE_CENTRAL      0
+#endif // (defined(CFG_CENTRAL) || defined(CFG_ALLROLES))
+
+/// Peripheral
+#if (defined(CFG_PERIPHERAL) || defined(CFG_ALLROLES))
+#define BLE_PERIPHERAL      1
+#else
+#define BLE_PERIPHERAL      0
+#endif // (defined(CFG_PERIPHERAL) || defined(CFG_ALLROLES))
+
+#if ((BLE_BROADCASTER+BLE_OBSERVER+BLE_PERIPHERAL+BLE_CENTRAL) == 0)
+    #error "No application role defined"
+#endif // ((BLE_BROADCASTER+BLE_OBSERVER+BLE_PERIPHERAL+BLE_CENTRAL) == 0)
+
+/// Maximum number of devices in RAL
+#define BLE_RAL_MAX          (CFG_RAL)
+
+/// Maximum number of simultaneous BLE activities (scan, connection, advertising, initiating)
+#define BLE_ACTIVITY_MAX          (CFG_ACT)
+
+#if (BLE_HOST_PRESENT)
+/// Maximum number of simultaneous connections
+#if (BLE_CENTRAL || BLE_PERIPHERAL)
+    #define BLE_CONNECTION_MAX      (CFG_CON)
+#else
+    #define BLE_CONNECTION_MAX      (0)
+#endif /* #if (BLE_CENTRAL || BLE_PERIPHERAL) */
+
+#if (BLE_CONNECTION_MAX >= BLE_ACTIVITY_MAX)
+    #error "Number of connections must be strictly less than number of activities"
+#endif // (BLE_CONNECTION_MAX >= BLE_ACTIVITY_MAX)
+#endif // (BLE_HOST_PRESENT)
+
+/// Max advertising reports before sending the info to the host
+#define BLE_ADV_REPORTS_MAX              (1)
+
+#if (BLE_EMB_PRESENT)
+/// Maximum number of ADV reports in the HCI queue to Host
+#define BLE_MAX_NB_ADV_REP_FRAG       (4 * HCI_TL_SUPPORT)
+#endif // (BLE_EMB_PRESENT)
+#endif //defined(CFG_BLE)
+
+
+
+/******************************************************************************************/
+/* --------------------------   ISOCHRONOUS CONFIGURATION        -------------------------*/
+/******************************************************************************************/
+
+// check if isochronous is enabled or not
+#if  (defined(CFG_ISO_CON) && (CFG_ISO_CON > 0) && (defined(CFG_ISO_MODE_0) || defined(CFG_CIS) || defined(CFG_BIS)))
+    #define BLE_ISO_PRESENT                (1)
+#else // !(defined(CFG_ISO_CON) && (CFG_ISO_CON > 0))
+    #define BLE_ISO_PRESENT                (0)
+#endif // (defined(CFG_ISO_CON) && (CFG_ISO_CON > 0))
+
+//  *** Definition of supported isochronous mode ***
+
+// Isochronous Mode 0 - Proprietary mode
+#if  (BLE_ISO_PRESENT && defined(CFG_ISO_MODE_0))
+    #define BLE_ISO_MODE_0                (BLE_CENTRAL | BLE_PERIPHERAL)
+    #define BLE_ISO_MODE_0_PROTOCOL       (BLE_ISO_MODE_0 & BLE_HOST_PRESENT)
+    #define BLE_ISO_MODE_0_PROFILE        (BLE_ISO_MODE_0 & BLE_HOST_PRESENT)
+    #define BLE_RSA                       (BLE_ISO_MODE_0_PROFILE)
+#else
+    #define BLE_ISO_MODE_0                (0)
+    #define BLE_ISO_MODE_0_PROTOCOL       (0)
+    #define BLE_ISO_MODE_0_PROFILE        (0)
+    #define BLE_RSA                       (0)
+#endif // (BLE_ISO_PRESENT && defined(CFG_AUDIO))
+
+// Connected Isochronous Stream
+#if  (BLE_ISO_PRESENT && defined(CFG_CIS) && BLE_HW_50_ISO)
+#define BLE_CIS                           (BLE_CENTRAL | BLE_PERIPHERAL)
+#else
+#define BLE_CIS                           (0)
+#endif // (BLE_ISO_PRESENT && defined(CFG_CIS) && BLE_HW_50_ISO)
+
+// Broadcast Isochronous Stream
+#if  (BLE_ISO_PRESENT && defined(CFG_BIS) && BLE_HW_50_ISO)
+#define BLE_BIS                           (BLE_BROADCASTER | BLE_OBSERVER)
+#else
+#define BLE_BIS                           (0)
+#endif // (BLE_ISO_PRESENT && defined(CFG_BIS) && BLE_HW_50_ISO)
+
+// sanity check for ISO presence
+#if !(BLE_ISO_MODE_0 | BLE_BIS | BLE_CIS)
+#undef  BLE_ISO_PRESENT
+#define BLE_ISO_PRESENT                   (0)
+#endif // !(BLE_ISO_MODE_0 | BLE_BIS | BLE_CIS)
+
+#if (BLE_ISO_PRESENT)
+    // Ensure that maximum number of audio channels is not reached
+    #if ((BLE_HW_50_ISO == 0) && (CFG_ISO_CON > 3))
+    #error "HW supports a maximum number of 3 audio channels"
+    #endif // ((BLE_HW_50_ISO == 0) && (CFG_ISO_CON > 3))
+
+    /// Maximum number of ISO channel / group
+    #define BLE_ISO_CHANNEL_MAX      (CFG_ISO_CON)
+    #define BLE_ISO_GROUP_MAX        (CFG_ISO_CON)
+
+    /// Maximum number of octets that can be received/transmitted over Isochronous channels
+    #define BLE_MAX_ISO_OCTETS  (251) // number of octets
+
+    /// Define number of ISO TX/RX buffers per isochronous channel
+    #define BLE_NB_ISO_BUFF_PER_CHAN            (4)
+
+    /// Define number of ISO descriptors per isochronous channel
+    /// Must be equal to max(BLE_NB_ISODESC_PER_BIS_CHAN, BLE_NB_RX_ISODESC_PER_CIS_CHAN + BLE_NB_TX_ISODESC_PER_CIS_CHAN)
+    #define BLE_NB_ISODESC_PER_CHAN             (4)
+
+    /// Number of ISO Descriptors - one descriptor required for update sub-event: 1 per stream
+    #define BLE_ISO_DESC_NB                     ((BLE_ISO_CHANNEL_MAX * (BLE_NB_ISODESC_PER_CHAN)) + BLE_ISO_GROUP_MAX)
+    /// Number of ISO buffers
+    #define BLE_ISO_BUF_NB                      (BLE_ISO_CHANNEL_MAX * BLE_NB_ISO_BUFF_PER_CHAN)
+
+    #if (BLE_CIS)
+    /// Define number of ISO TX/RX descriptors per CIS channel
+    #define BLE_NB_RXTX_ISODESC_PER_CIS_CHAN      (2)
+    #endif // (BLE_CIS)
+
+    #if (BLE_BIS)
+    /// Define number of ISO RX or TX descriptors per BIS channel
+    #define BLE_NB_ISODESC_PER_BIS_CHAN         (4)
+    #endif // (BLE_BIS)
+
+    #if (BLE_CIS | BLE_BIS)
+        /// Number of hopping sequence per channel
+        #define BLE_ISO_HOP_SEQ_PER_CHAN   (2)
+        #define BLE_ISO_HOP_SEQ_SIZE       (0x20) // Depends on max number of sub-event supported
+
+        /// Number of RX ISO buffers (add one more buffer for fake reception/transmit)
+        #define BLE_ISO_HOP_SEQ_NB         (BLE_ISO_CHANNEL_MAX * BLE_ISO_HOP_SEQ_PER_CHAN)
+    #endif // (BLE_CIS | BLE_BIS)
+#endif // (BLE_ISO_PRESENT)
+
+
+/// Check status of Isochronous Data path drivers
+
+/// Proprietary ISO over HCI
+#if defined(CFG_ISOOHCI)
+    #define BLE_ISOOHCI                  (BLE_ISO_PRESENT)
+#else
+    #define BLE_ISOOHCI                  (0)
+#endif
+
+/// Internal ISO generator for validation purpose
+#if defined(CFG_ISOGEN)
+    #define BLE_ISOGEN                   (BLE_ISO_PRESENT)
+#else
+    #define BLE_ISOGEN                   (0)
+#endif
+
+/// Platform PCM
+#if defined(CFG_PCM)
+    #define BLE_ISO_PCM                  (BLE_ISO_PRESENT)
+#else // !defined(CFG_PCM)
+    #define BLE_ISO_PCM                  (0)
+#endif // defined(CFG_PCM)
+
+/******************************************************************************************/
+/* --------------------------   DISPLAY SETUP        -------------------------------------*/
+/******************************************************************************************/
+
+/// Display controller enable/disable
+#if defined(CFG_DISPLAY)
+#define DISPLAY_SUPPORT      1
+#else
+#define DISPLAY_SUPPORT      0
+#endif //CFG_DISPLAY
+
+
+/******************************************************************************************/
+/* --------------------------      RTC SETUP         -------------------------------------*/
+/******************************************************************************************/
+
+/// RTC enable/disable
+#if defined(CFG_RTC)
+#define RTC_SUPPORT      1
+#else
+#define RTC_SUPPORT      0
+#endif //CFG_DISPLAY
+
+/******************************************************************************************/
+/* --------------------------      PS2 SETUP         -------------------------------------*/
+/******************************************************************************************/
+
+/// PS2 enable/disable
+#if defined(CFG_PS2)
+#define PS2_SUPPORT      1
+#else
+#define PS2_SUPPORT      0
+#endif //CFG_PS2
+
+/******************************************************************************************/
+/* --------------------------      TRACER SETUP      -------------------------------------*/
+/******************************************************************************************/
+
+/// tracer enable/disable
+#if defined(CFG_TRC_EN)
+    #define TRACER_PRESENT                   1
+    #include "dbg_trc_config.h"
+#else
+    #define TRACER_PRESENT                   0
+#endif // CFG_TRC_EN
+
+/******************************************************************************************/
+/* -------------------------   DEEP SLEEP SETUP      -------------------------------------*/
+/******************************************************************************************/
+
+/// Use 32K Hz Clock if set to 1 else 32,768k is used
+#define HZ32000                                     0
+
+/// Time to wake-up Radio Module (in us)
+#define SLEEP_RM_WAKEUP_DELAY                       625
+
+#if defined(CFG_RF_SYDNEY)
+/// Time for stabilization of the high frequency oscillator following a sleep-timer expiry (in us)
+#define SLEEP_OSC_NORMAL_WAKEUP_DELAY               2000
+/// Time for stabilization of the high frequency oscillator following an external wake-up request (in us)
+#define SLEEP_OSC_EXT_WAKEUP_DELAY                  2000
+#else
+/// Time for stabilization of the high frequency oscillator following a sleep-timer expiry (in us)
+#define SLEEP_OSC_NORMAL_WAKEUP_DELAY               5000
+/// Time for stabilization of the high frequency oscillator following an external wake-up request (in us)
+#define SLEEP_OSC_EXT_WAKEUP_DELAY                  5000
+#endif
+
+/******************************************************************************************/
+/* --------------------------   RADIO SETUP       ----------------------------------------*/
+/******************************************************************************************/
+
+/// Power control features
+#define RF_TXPWR                            1
+/// Class of device
+#define RF_CLASS1                           0
+
+/******************************************************************************************/
+/* -------------------------   SUPPORTED RADIO PHY    ------------------------------------*/
+/******************************************************************************************/
+
+#if defined(CFG_RF_ATLAS)
+#define BLE_PHY_1MBPS_SUPPORT                       1
+#define BLE_PHY_2MBPS_SUPPORT                       1
+#define BLE_PHY_CODED_SUPPORT                       1
+#define BLE_STABLE_MOD_IDX_TX_SUPPORT               0
+#define BLE_STABLE_MOD_IDX_RX_SUPPORT               0
+#elif defined(CFG_RF_BTIPT)
+#define BLE_PHY_1MBPS_SUPPORT                       1
+#define BLE_PHY_2MBPS_SUPPORT                       1
+#define BLE_PHY_CODED_SUPPORT                       1
+#define BLE_STABLE_MOD_IDX_TX_SUPPORT               0
+#define BLE_STABLE_MOD_IDX_RX_SUPPORT               0
+#elif defined(CFG_RF_SIMU)
+#define BLE_PHY_1MBPS_SUPPORT                       1
+#define BLE_PHY_2MBPS_SUPPORT                       1
+#define BLE_PHY_CODED_SUPPORT                       1
+#define BLE_STABLE_MOD_IDX_TX_SUPPORT               0
+#define BLE_STABLE_MOD_IDX_RX_SUPPORT               0
+#elif defined(CFG_RF_SYDNEY)
+#define BLE_PHY_1MBPS_SUPPORT                       1
+#define BLE_PHY_2MBPS_SUPPORT                       1
+#define BLE_PHY_CODED_SUPPORT                       1
+#define BLE_STABLE_MOD_IDX_TX_SUPPORT               0
+#define BLE_STABLE_MOD_IDX_RX_SUPPORT               0
+#else // RIPPLE
+#define BLE_PHY_1MBPS_SUPPORT                       1
+#define BLE_PHY_2MBPS_SUPPORT                       0
+#define BLE_PHY_CODED_SUPPORT                       1
+#define BLE_STABLE_MOD_IDX_TX_SUPPORT               0
+#define BLE_STABLE_MOD_IDX_RX_SUPPORT               0
+#endif
+
+/******************************************************************************************/
+/* -------------------------   COEXISTENCE SETUP      ------------------------------------*/
+/******************************************************************************************/
+
+/// WLAN Coexistence
+#if defined(CFG_WLAN_COEX)
+    #define RW_WLAN_COEX                 1
+    #define RW_WLAN_COEX_TEST            (defined(CFG_WLAN_COEX_TEST))
+#else
+    #define RW_WLAN_COEX                 0
+    #define RW_WLAN_COEX_TEST            0
+#endif // defined(CFG_WLAN_COEX)
+
+/// MWS Coexistence
+#if defined(CFG_MWS_COEX)
+    #define RW_MWS_COEX                 1
+    #define RW_MWS_COEX_TEST            (defined(CFG_MWS_COEX_TEST))
+#else
+    #define RW_MWS_COEX                 0
+    #define RW_MWS_COEX_TEST            0
+#endif // defined(CFG_MWS_COEX)
+
+/******************************************************************************************/
+/* -----------------------   SLOT AVAILABILITY MASKS   -----------------------------------*/
+/******************************************************************************************/
+
+/// Maximum support peer SAM map size
+#define RW_MAX_PEER_SAM_MAP_SLOTS      (256)
+#define RW_PEER_SAM_MAP_LEN      (RW_MAX_PEER_SAM_MAP_SLOTS/4) // 2-bit field per slot
+
+/******************************************************************************************/
+/* --------------------   SECURE CONNECTIONS SETUP  --------------------------------------*/
+/******************************************************************************************/
+#if defined(CFG_SEC_CON)
+#define SECURE_CONNECTIONS        (1)
+#if defined(CFG_ECC_16_BITS_ALGO)
+#define ECC_MULT_ALGO_TYPE        (16)
+#else // !defined(CFG_ECC_16_BITS_ALGO)
+#define ECC_MULT_ALGO_TYPE        (32)
+#endif // defined(CFG_ECC_16_BITS_ALGO)
+#if defined(CFG_CRYPTO_UT)
+#define CRYPTO_UT                 (1)
+#else //defined(CFG_CRYPTO_UT)
+#define CRYPTO_UT                 (0)
+#endif //defined(CFG_CRYPTO_UT)
+#else // !defined(CFG_SEC_CON)
+#define SECURE_CONNECTIONS        (0)
+#define CRYPTO_UT                 (0)
+#endif // defined(CFG_SEC_CON)
+
+
+/******************************************************************************************/
+/* --------------------------   DEBUG SETUP       ----------------------------------------*/
+/******************************************************************************************/
+
+/// Flag indicating if debug mode is activated or not
+#if (defined(CFG_DBG) || defined(CFG_ROM) || defined(CFG_USER))
+    #define RW_DEBUG                        ((BLE_EMB_PRESENT) || (BT_EMB_PRESENT) || (BLE_HOST_PRESENT))
+#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)
+    #define RW_SWDIAG                       1
+#else
+    #define RW_SWDIAG                       0
+#endif
+    #define KE_PROFILING                    1
+#else
+    #define RW_DEBUG                        0
+    #define RW_SWDIAG                       0
+    #define KE_PROFILING                    0
+#endif /* CFG_DBG */
+
+/// Flag indicating if Read/Write memory commands are supported or not
+#if defined(CFG_DBG_MEM)
+    #define RW_DEBUG_MEM               1
+#else //CFG_DBG_MEM
+    #define RW_DEBUG_MEM               0
+#endif //CFG_DBG_MEM
+
+/// Flag indicating if Flash debug commands are supported or not
+#if defined(CFG_DBG_FLASH)
+    #define RW_DEBUG_FLASH                  1
+#else //CFG_DBG_FLASH
+    #define RW_DEBUG_FLASH                  0
+#endif //CFG_DBG_FLASH
+
+/// Flag indicating if CPU stack profiling commands are supported or not
+#if defined(CFG_DBG_STACK_PROF)
+    #define RW_DEBUG_STACK_PROF             1
+#else
+    #define RW_DEBUG_STACK_PROF             0
+#endif // defined (CFG_DBG_STACK_PROF)
+
+/// Scheduling Planner unit test (HCI debug commands to test scheduling planner functions)
+#define SCH_PLAN_UT                 (1)
+
+/******************************************************************************************/
+/* --------------------------      NVDS SETUP       --------------------------------------*/
+/******************************************************************************************/
+
+/// Flag indicating if NVDS feature is supported or not
+#if defined(CFG_NVDS)
+    #define NVDS_SUPPORT                    1
+#else //CFG_NVDS
+    #define NVDS_SUPPORT                    0
+#endif //CFG_NVDS
+
+/******************************************************************************************/
+/* --------------------------      MISC SETUP       --------------------------------------*/
+/******************************************************************************************/
+/// Manufacturer: RivieraWaves SAS
+#define RW_COMP_ID                           0x0060
+
+/// Bluetooth technologies version
+#define RW_BT40_VERSION                      (6)
+#define RW_BT41_VERSION                      (7)
+#define RW_BT42_VERSION                      (8)
+#define RW_BT50_VERSION                      (9)
+
+/******************************************************************************************/
+/* -------------------------   BT / BLE / BLE HL CONFIG    -------------------------------*/
+/******************************************************************************************/
+
+#if (BT_EMB_PRESENT)
+#include "rwbt_config.h"    // bt stack configuration
+#endif //BT_EMB_PRESENT
+
+#if (BLE_EMB_PRESENT)
+#include "rwble_config.h"   // ble stack configuration
+#endif //BLE_EMB_PRESENT
+
+#if (BLE_HOST_PRESENT)
+#include "rwble_hl_config.h"  // ble Host stack configuration
+#endif //BLE_HOST_PRESENT
+
+#if defined(CFG_APP)
+#include "rwapp_config.h"     // Application configuration
+#endif // defined(CFG_APP)
+
+
+
+/******************************************************************************************/
+/* -------------------------   KERNEL SETUP          -------------------------------------*/
+/******************************************************************************************/
+
+/// Event types definition
+/*@TRACE*/
+enum KE_EVENT_TYPE
+{
+    #if defined(CFG_ROM) || defined(CFG_USER) || DISPLAY_SUPPORT
+    KE_EVENT_DISPLAY,           //!< KE_EVENT_DISPLAY
+    #endif //DISPLAY_SUPPORT
+
+    #if RTC_SUPPORT
+    KE_EVENT_RTC_1S_TICK,
+    #endif //RTC_SUPPORT
+
+    #if BLE_RSA
+    KE_EVENT_RSA_SIGN,
+    #endif //BLE_RSA
+
+    #if SECURE_CONNECTIONS
+    KE_EVENT_ECC_MULTIPLICATION,//!< KE_EVENT_ECC_MULTIPLICATION
+    #endif // SECURE_CONNECTIONS
+
+    #if BT_EMB_PRESENT
+    KE_EVENT_P192_PUB_KEY_GEN,//!< KE_EVENT_P192_PUB_KEY_GEN
+    #endif // BT_EMB_PRESENT
+
+    #if (BLE_MESH)
+    KE_EVENT_BLE_MESH_DJOB ,
+    #endif // (BLE_MESH)
+
+    #if (BLE_EMB_PRESENT || BT_EMB_PRESENT)
+    KE_EVENT_AES_END,           //!< KE_EVENT_AES_END
+    #endif // (BLE_EMB_PRESENT || BT_EMB_PRESENT)
+
+    KE_EVENT_KE_MESSAGE,        //!< KE_EVENT_KE_MESSAGE
+    KE_EVENT_KE_TIMER,          //!< KE_EVENT_KE_TIMER
+
+    #if (TRACER_PRESENT)
+    KE_EVENT_TRC,               //!< KE_EVENT_TRC
+    #endif /*(TRACER_PRESENT)*/
+
+    #if H4TL_SUPPORT
+    KE_EVENT_H4TL_TX,           //!< KE_EVENT_H4TL_TX
+    #if (BLE_EMB_PRESENT || BT_EMB_PRESENT)
+    KE_EVENT_H4TL_CMD_HDR_RX,   //!< KE_EVENT_H4TL_CMD_HDR_RX
+    KE_EVENT_H4TL_CMD_PLD_RX,   //!< KE_EVENT_H4TL_CMD_PLD_RX
+    #endif //(BLE_EMB_PRESENT || BT_EMB_PRESENT)
+    #if (((BLE_EMB_PRESENT || BLE_HOST_PRESENT) && (BLE_CENTRAL || BLE_PERIPHERAL)) || BT_EMB_PRESENT)
+    KE_EVENT_H4TL_ACL_HDR_RX,   //!< KE_EVENT_H4TL_ACL_HDR_RX
+    #endif //(((BLE_EMB_PRESENT || BLE_HOST_PRESENT) && (BLE_CENTRAL || BLE_PERIPHERAL)) || BT_EMB_PRESENT)
+    #endif //H4TL_SUPPORT
+
+    #if (BLE_HOST_PRESENT)
+    #if (BLE_L2CC)
+    KE_EVENT_L2CAP_TX,
+    #endif //(BLE_L2CC)
+    #endif// (BLE_HOST_PRESENT)
+
+    #if BT_EMB_PRESENT
+    KE_EVENT_BT_PSCAN_PROC,
+    #endif //BT_EMB_PRESENT
+
+    #if (BLE_ISOOHCI)
+    KE_EVENT_ISOOHCI_IN_DEFER,  //!< KE_EVENT_ISOOHCI_IN_DEFER
+    KE_EVENT_ISOOHCI_OUT_DEFER, //!< KE_EVENT_ISOOHCI_OUT_DEFER
+    #endif //(BLE_ISOOHCI)
+
+    KE_EVENT_UART,
+    KE_EVENT_WAKE_STATUS,
+    KE_EVENT_USER1,
+    KE_EVENT_USER2,
+    KE_EVENT_USER3,
+    KE_EVENT_USER4,
+
+    KE_EVENT_MAX,               //!< KE_EVENT_MAX
+};
+
+/// Tasks types definition
+/*@TRACE*/
+enum KE_TASK_TYPE
+{
+    #if (BT_EMB_PRESENT)
+    // BT Controller Tasks
+    TASK_LM,
+    TASK_LC,
+    TASK_LB,
+    #endif // (BT_EMB_PRESENT)
+
+    #if (BLE_EMB_PRESENT)
+    // Link Layer Tasks
+    TASK_LLM,
+    TASK_LLC,
+    #if (BLE_ISO_PRESENT)
+    TASK_LLI,
+    #endif // (BLE_ISO_PRESENT)
+    #endif // (BLE_EMB_PRESENT)
+
+#if ((BLE_EMB_PRESENT) || (BT_EMB_PRESENT))
+    TASK_DBG,
+#endif // ((BLE_EMB_PRESENT) || (BT_EMB_PRESENT))
+
+#if (defined(CFG_ROM) || defined(CFG_USER) || DISPLAY_SUPPORT)
+    TASK_DISPLAY,
+#endif // (DISPLAY_SUPPORT)
+
+#if (defined(CFG_ROM) || defined(CFG_USER) || BLE_APP_PRESENT || defined(CFG_FRAMEWORK) || !defined(FIXME_SDK_FLASHROM_LIB))
+    TASK_APP,
+#endif // (BLE_APP_PRESENT)
+
+#if (BLE_HOST_PRESENT)
+    TASK_L2CC,    // L2CAP Controller Task
+    TASK_GATTM,   // Generic Attribute Profile Manager Task
+    TASK_GATTC,   // Generic Attribute Profile Controller Task
+    TASK_GAPM,    // Generic Access Profile Manager
+    TASK_GAPC,    // Generic Access Profile Controller
+
+    // allocate a certain number of profiles task
+    TASK_PRF_MAX = (TASK_GAPC + BLE_NB_PROFILES),
+
+    #if (BLE_ISO_MODE_0_PROTOCOL)
+    TASK_AM0,     // BLE Audio Mode 0 Task
+    #endif // (BLE_ISO_MODE_0_PROTOCOL)
+#endif // (BLE_HOST_PRESENT)
+
+#if (AHI_TL_SUPPORT)
+    TASK_AHI,
+#endif // (AHI_TL_SUPPORT)
+
+    TASK_USER1,
+    TASK_USER2,
+    TASK_USER3,
+    TASK_USER4,
+
+    /// Maximum number of tasks
+    TASK_MAX,
+
+    TASK_NONE = 0xFF,
+};
+
+extern enum KE_TASK_TYPE rwble_hl_app_main_task;
+
+/// Kernel memory heaps types.
+/*@TRACE*/
+enum KE_MEM_HEAP
+{
+    /// Memory allocated for environment variables
+    KE_MEM_ENV,
+    #if (BLE_HOST_PRESENT)
+    /// Memory allocated for Attribute database
+    KE_MEM_ATT_DB,
+    #endif // (BLE_HOST_PRESENT)
+    /// Memory allocated for kernel messages
+    KE_MEM_KE_MSG,
+    /// Non Retention memory block
+    KE_MEM_NON_RETENTION,
+    KE_MEM_BLOCK_MAX,
+};
+
+
+
+#if (BT_EMB_PRESENT)
+#define BT_HEAP_MSG_SIZE_      BT_HEAP_MSG_SIZE
+#define BT_HEAP_ENV_SIZE_      BT_HEAP_ENV_SIZE
+#else
+#define BT_HEAP_MSG_SIZE_      0
+#define BT_HEAP_ENV_SIZE_      0
+#endif //BT_EMB_PRESENT
+
+#if (BLE_EMB_PRESENT)
+#define BLE_HEAP_MSG_SIZE_     BLE_HEAP_MSG_SIZE
+#define BLE_HEAP_ENV_SIZE_     BLE_HEAP_ENV_SIZE
+#else
+#define BLE_HEAP_MSG_SIZE_     0
+#define BLE_HEAP_ENV_SIZE_     0
+#endif //BLE_EMB_PRESENT
+
+#if (BLE_HOST_PRESENT)
+
+#define BLEHL_HEAP_MSG_SIZE_   BLEHL_HEAP_MSG_SIZE
+#define BLEHL_HEAP_ENV_SIZE_   BLEHL_HEAP_ENV_SIZE
+#define BLEHL_HEAP_DB_SIZE_    BLEHL_HEAP_DB_SIZE
+#else
+#define BLEHL_HEAP_MSG_SIZE_   0
+#define BLEHL_HEAP_ENV_SIZE_   0
+#define BLEHL_HEAP_DB_SIZE_    0
+#endif //BLE_HOST_PRESENT
+
+#if (SECURE_CONNECTIONS && (BT_EMB_PRESENT || BLE_EMB_PRESENT))
+#define ECC_HEAP_NON_RET_SIZE_   (328*2) // Could only have 2 ECC computations simultaneously
+#else // (SECURE_CONNECTIONS && (BT_EMB_PRESENT || BLE_EMB_PRESENT))
+#define ECC_HEAP_NON_RET_SIZE_   0
+#endif // (SECURE_CONNECTIONS && (BT_EMB_PRESENT || BLE_EMB_PRESENT))
+
+/// Kernel Message Heap
+#define RWIP_HEAP_MSG_SIZE         (  BT_HEAP_MSG_SIZE_      + \
+                                      BLE_HEAP_MSG_SIZE_     + \
+                                      BLEHL_HEAP_MSG_SIZE_      )
+
+/// Size of Environment heap
+#define RWIP_HEAP_ENV_SIZE         ( BT_HEAP_ENV_SIZE_       + \
+                                     BLE_HEAP_ENV_SIZE_      + \
+                                     BLEHL_HEAP_ENV_SIZE_       )
+
+
+/// Size of Attribute database heap
+#define RWIP_HEAP_DB_SIZE          (  BLEHL_HEAP_DB_SIZE_  )
+
+/**
+ * Size of non-retention heap
+ *
+ * This heap can be used to split the RAM into 2 parts:
+ *    - an always-on part that can handle a certain number of links
+ *    - a secondary memory that could be powered-off when not used, and retained only when used
+ *
+ * With such mechanism, the previous heaps need to be reduced so that they can contain all required data
+ * in a light scenario (few connections, few profiles). Then the non-retention heap is sized in order to
+ * cover the worst case scenario (max connections, max profiles, etc ...)
+ *
+ * The current size show what is already known as not needing to be retained during deep sleep.
+ */
+#define RWIP_HEAP_NON_RET_SIZE    ( ECC_HEAP_NON_RET_SIZE_ )
+
+/// Minimum sleep time to enter in deep sleep (in half slot).
+#define RWIP_MINIMUM_SLEEP_TIME                (1)
+
+/******************************************************************************************/
+/* -------------------------     CONFIGURABLE PARAMETERS     -----------------------------*/
+/******************************************************************************************/
+
+/// List of parameters identifiers
+enum PARAM_ID
+{
+    /// Definition of the tag associated to each parameters
+    /// Local Bd Address
+    PARAM_ID_BD_ADDRESS                 = 0x01,
+    /// Device Name
+    PARAM_ID_DEVICE_NAME                = 0x02,
+    /// Radio Drift
+    PARAM_ID_LPCLK_DRIFT                = 0x07,
+    /// Radio Jitter
+    PARAM_ID_LPCLK_JITTER               = 0x08,
+    /// Maximum sleep duration
+    PARAM_ID_MAX_SLEEP_DUR              = 0x0A,
+    /// External wake-up time
+    PARAM_ID_EXT_WAKEUP_TIME            = 0x0D,
+    /// Oscillator wake-up time
+    PARAM_ID_OSC_WAKEUP_TIME            = 0x0E,
+    /// Radio wake-up time
+    PARAM_ID_RM_WAKEUP_TIME             = 0x0F,
+    /// UART baudrate
+    PARAM_ID_UART_BAUDRATE              = 0x10,
+    /// Enable sleep mode
+    PARAM_ID_SLEEP_ENABLE               = 0x11,
+    /// Enable External Wakeup
+    PARAM_ID_EXT_WAKEUP_ENABLE          = 0x12,
+    /// SP Private Key 192
+    PARAM_ID_SP_PRIVATE_KEY_P192        = 0x13,
+    /// SP Public Key 192
+    PARAM_ID_SP_PUBLIC_KEY_P192         = 0x14,
+
+    /// Activity Move Configuration (enables/disables activity move for BLE connections and BT (e)SCO links)
+    PARAM_ID_ACTIVITY_MOVE_CONFIG       = 0x15,
+
+    /// Enable/disable scanning for extended advertising PDUs
+    PARAM_ID_SCAN_EXT_ADV               = 0x16,
+
+    /// Duration of the schedule reservation for long activities such as scan, inquiry, page, HDC advertising
+    PARAM_ID_SCHED_SCAN_DUR             = 0x17,
+
+    /// Programming delay, margin for programming the baseband in advance of each activity (in half-slots)
+    PARAM_ID_PROG_DELAY                 = 0x18,
+
+    /// Adjust sleep duration
+    PARAM_ID_SLEEP_ADJ                  = 0x2B,
+
+    /// Synchronous links configuration
+    PARAM_ID_SYNC_CONFIG                = 0x2C,
+    /// PCM Settings
+    PARAM_ID_PCM_SETTINGS               = 0x2D,
+    /// Sleep algorithm duration
+    PARAM_ID_SLEEP_ALGO_DUR             = 0x2E,
+    /// Tracer configuration
+    PARAM_ID_TRACER_CONFIG              = 0x2F,
+
+    /// Diagport configuration
+    PARAM_ID_DIAG_BT_HW                 = 0x30,
+    PARAM_ID_DIAG_BLE_HW                = 0x31,
+    PARAM_ID_DIAG_SW                    = 0x32,
+    PARAM_ID_DIAG_DM_HW                 = 0x33,
+    PARAM_ID_DIAG_PLF                   = 0x34,
+
+    /// IDC selection (for audio demo)
+    PARAM_ID_IDCSEL_PLF                 = 0x37,
+
+    /// RSSI threshold tags
+    PARAM_ID_RSSI_HIGH_THR              = 0x3A,
+    PARAM_ID_RSSI_LOW_THR               = 0x3B,
+    PARAM_ID_RSSI_INTERF_THR            = 0x3C,
+
+    /// RF BTIPT
+    PARAM_ID_RF_BTIPT_VERSION          = 0x3E,
+    PARAM_ID_RF_BTIPT_XO_SETTING       = 0x3F,
+
+    PARAM_ID_BT_LINK_KEY_FIRST          = 0x60,
+    PARAM_ID_BT_LINK_KEY_LAST           = 0x67,
+
+    PARAM_ID_BLE_LINK_KEY_FIRST         = 0x70,
+    PARAM_ID_BLE_LINK_KEY_LAST          = 0x7F,
+    /// SC Private Key (Low Energy)
+    PARAM_ID_LE_PRIVATE_KEY_P256        = 0x80,
+    /// SC Public Key (Low Energy)
+    PARAM_ID_LE_PUBLIC_KEY_P256         = 0x81,
+    /// SC Debug: Used Fixed Private Key from NVDS (Low Energy)
+    PARAM_ID_LE_DBG_FIXED_P256_KEY      = 0x82,
+    /// SP Private Key (classic BT)
+    PARAM_ID_SP_PRIVATE_KEY_P256        = 0x83,
+    /// SP Public Key (classic BT)
+    PARAM_ID_SP_PUBLIC_KEY_P256         = 0x84,
+
+    /// LE Coded PHY 500 Kbps selection
+    PARAM_ID_LE_CODED_PHY_500           = 0x85,
+
+    /// Manufacturing and calibration
+    PARAM_ID_CAL1_MIN                   = 0xB0,
+    PARAM_ID_CAL1_MAX                   = 0xCF,
+
+    /// Application specific
+    PARAM_ID_APP_SPECIFIC_FIRST         = 0xD0,
+    PARAM_ID_APP_SPECIFIC_LAST          = 0xEF,
+
+    /// Manufacturing and calibration
+    PARAM_ID_CAL2_MIN                   = 0xF0,
+    PARAM_ID_CAL2_MAX                   = 0xFE,
+
+};
+
+/// List of parameters lengths
+enum PARAM_LEN
+{
+     // Definition of length associated to each parameters
+     /// Local Bd Address
+     PARAM_LEN_BD_ADDRESS                 = 6,
+     /// Device Name
+     PARAM_LEN_DEVICE_NAME                = 248,
+     /// Low power clock drift
+     PARAM_LEN_LPCLK_DRIFT                = 2,
+     /// Low power clock jitter
+     PARAM_LEN_LPCLK_JITTER               = 1,
+     /// Maximum sleep duration
+     PARAM_LEN_MAX_SLEEP_DUR              = 4,
+     /// External wake-up time
+     PARAM_LEN_EXT_WAKEUP_TIME            = 2,
+     /// Oscillator wake-up time
+     PARAM_LEN_OSC_WAKEUP_TIME            = 2,
+     /// Radio wake-up time
+     PARAM_LEN_RM_WAKEUP_TIME             = 2,
+     /// UART baudrate
+     PARAM_LEN_UART_BAUDRATE              = 4,
+     /// Enable sleep mode
+     PARAM_LEN_SLEEP_ENABLE               = 1,
+     /// Enable External Wakeup
+     PARAM_LEN_EXT_WAKEUP_ENABLE          = 1,
+     /// SP Private Key 192
+     PARAM_LEN_SP_PRIVATE_KEY_P192        = 24,
+     /// SP Public Key 192
+     PARAM_LEN_SP_PUBLIC_KEY_P192         = 48,
+
+     /// Activity Move Configuration
+     PARAM_LEN_ACTIVITY_MOVE_CONFIG       = 1,
+
+     /// Enable/disable scanning for extended advertising PDUs
+     PARAM_LEN_SCAN_EXT_ADV               = 1,
+
+     /// Duration of the schedule reservation for long activities such as scan, inquiry, page, HDC advertising
+     PARAM_LEN_SCHED_SCAN_DUR             = 2,
+
+     /// Programming delay, margin for programming the baseband in advance of each activity (in half-slots)
+     PARAM_LEN_PROG_DELAY                 = 1,
+
+     /// Synchronous links configuration
+     PARAM_LEN_SYNC_CONFIG                = 2,
+     /// PCM Settings
+     PARAM_LEN_PCM_SETTINGS               = 8,
+     /// Tracer configuration
+     PARAM_LEN_TRACER_CONFIG              = 4,
+
+     /// Diagport configuration
+     PARAM_LEN_DIAG_BT_HW                 = 4,
+     PARAM_LEN_DIAG_BLE_HW                = 4,
+     PARAM_LEN_DIAG_SW                    = 4,
+     PARAM_LEN_DIAG_DM_HW                 = 4,
+     PARAM_LEN_DIAG_PLF                   = 4,
+
+     /// IDC selection (for audio demo)
+     PARAM_LEN_IDCSEL_PLF                 = 4,
+
+     /// RSSI thresholds
+     PARAM_LEN_RSSI_THR                   = 1,
+
+     /// RF BTIPT
+     PARAM_LEN_RF_BTIPT_VERSION          = 1,
+     PARAM_LEN_RF_BTIPT_XO_SETTING       = 1,
+
+     /// Link keys
+     PARAM_LEN_BT_LINK_KEY                = 22,
+     PARAM_LEN_BLE_LINK_KEY               = 48,
+
+     /// P256
+     PARAM_LEN_PRIVATE_KEY_P256           = 32,
+     PARAM_LEN_PUBLIC_KEY_P256            = 64,
+     PARAM_LEN_DBG_FIXED_P256_KEY         = 1,
+
+     /// LE Coded PHY 500 Kbps selection
+     PARAM_LEN_LE_CODED_PHY_500           = 1,
+};
+
+/******************************************************************************************/
+/* -------------------------        BT-BLE COEX        -----------------------------------*/
+/******************************************************************************************/
+
+///To let the HW using the default values set in the registers
+#define RW_BLE_PTI_PRIO_AUTO    15
+
+#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)
+/// Enable and disable definition for the PTI
+///Enable TX busy signal
+#define RWIP_PTI_TXEN           1
+///Disable TX busy signal
+#define RWIP_PTI_TXDIS          0
+/// Tx busy position
+#define RWIP_TXBSY_POS          0
+
+///Enable RX busy signal
+#define RWIP_PTI_RXEN           1
+///Disable RX busy signal
+#define RWIP_PTI_RXDIS          0
+/// Rx busy position
+#define RWIP_RXBSY_POS          1
+
+///Enable do not abort TX
+#define RWIP_PTI_DNABORTEN      1
+///Disable do not abort TX
+#define RWIP_PTI_DNABORTDIS     0
+/// Do not abort busy position
+#define RWIP_DNABORT_POS        2
+
+/// SAM disabled
+#define RWIP_SAM_DIS            0
+/// SAM enabled
+#define RWIP_SAM_EN             1
+/// SAM enable position
+#define RWIP_SAMEN_POS          3
+
+/// Bit masking
+#define RWIP_COEX_BIT_MASK      1
+
+/// Coex configuration index
+enum rwip_coex_config_idx
+{
+    #if (BT_EMB_PRESENT)
+    RWIP_COEX_MSSWITCH_IDX,
+    RWIP_COEX_SNIFFATT_IDX,
+    RWIP_COEX_PAGE_IDX,
+    RWIP_COEX_PSCAN_IDX,
+    RWIP_COEX_INQ_IDX,
+    RWIP_COEX_INQRES_IDX,
+    RWIP_COEX_SCORSVD_IDX,
+    RWIP_COEX_BCAST_IDX,
+    RWIP_COEX_CONNECT_IDX,
+    #endif //#if (BT_EMB_PRESENT)
+    #if (BLE_EMB_PRESENT)
+    RWIP_COEX_CON_IDX,
+    RWIP_COEX_CON_DATA_IDX,
+    RWIP_COEX_ADV_IDX,
+    RWIP_COEX_SCAN_IDX,
+    RWIP_COEX_INIT_IDX,
+    #endif // #if (BLE_EMB_PRESENT)
+    /// Max configuration index
+    RWIP_COEX_CFG_MAX,
+};
+#endif //(BLE_EMB_PRESENT || BT_EMB_PRESENT)
+
+/******************************************************************************************/
+/* -------------------------     BT-BLE PRIORITIES     -----------------------------------*/
+/******************************************************************************************/
+#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)
+/// Priority index definition
+enum rwip_prio_idx
+{
+    #if (BT_EMB_PRESENT)
+    /// ACL event default priority
+    RWIP_PRIO_ACL_DFT_IDX,
+    /// ACL event priority with activity
+    RWIP_PRIO_ACL_ACT_IDX,
+    /// ACL Role Switch event default priority
+    RWIP_PRIO_ACL_RSW_IDX,
+    /// ACL sniff event default priority
+    RWIP_PRIO_ACL_SNIFF_DFT_IDX,
+    /// ACL sniff transition event default priority
+    RWIP_PRIO_ACL_SNIFF_TRANS_IDX,
+    #if MAX_NB_SYNC
+    /// SCO event default priority
+    RWIP_PRIO_SCO_DFT_IDX,
+    #endif //MAX_NB_SYNC
+    /// Broadcast ACL event default priority
+    RWIP_PRIO_BCST_DFT_IDX,
+    /// Broadcast ACL event with LMP activity priority
+    RWIP_PRIO_BCST_ACT_IDX,
+    /// CSB RX event default priority
+    RWIP_PRIO_CSB_RX_DFT_IDX,
+    /// CSB TX event default priority
+    RWIP_PRIO_CSB_TX_DFT_IDX,
+    /// Inquiry event default priority
+    RWIP_PRIO_INQ_DFT_IDX,
+    /// Inquiry Scan event default priority
+    RWIP_PRIO_ISCAN_DFT_IDX,
+    /// Page event default priority
+    RWIP_PRIO_PAGE_DFT_IDX,
+    /// Page event default priority
+    RWIP_PRIO_PAGE_1ST_PKT_IDX,
+    /// Page first packet event default priority
+    RWIP_PRIO_PCA_DFT_IDX,
+    /// Page scan event default priority
+    RWIP_PRIO_PSCAN_DFT_IDX,
+    /// Page scan event priority increment when canceled
+    RWIP_PRIO_PSCAN_1ST_PKT_IDX,
+    /// Synchronization Scan event default priority
+    RWIP_PRIO_SSCAN_DFT_IDX,
+    /// Synchronization Train event default priority
+    RWIP_PRIO_STRAIN_DFT_IDX,
+    #endif //#if (BT_EMB_PRESENT)
+    #if (BLE_EMB_PRESENT)
+    /// Default priority for scanning events
+    RWIP_PRIO_SCAN_IDX,
+    /// Default priority for auxiliary scan/init (no_asap) rx events
+    RWIP_PRIO_AUX_RX_IDX,
+    /// Default priority for initiating events
+    RWIP_PRIO_INIT_IDX,
+    /// LE connection events default priority
+    RWIP_PRIO_CONNECT_DFT_IDX,
+    /// LE connection events priority with activity
+    RWIP_PRIO_CONNECT_ACT_IDX,
+    /// Default priority for advertising events
+    RWIP_PRIO_ADV_IDX,
+    /// Default priority for advertising high duty cycle events
+    RWIP_PRIO_ADV_HDC_IDX,
+    /// Default priority for aux advertising events
+    RWIP_PRIO_ADV_AUX_IDX,
+    /// Default priority for periodic advertising events
+    RWIP_PRIO_PER_ADV_IDX,
+    /// Default priority for resolvable private addresses renewal event
+    RWIP_PRIO_RPA_RENEW_IDX,
+    #if (BLE_CIS)
+    /// Default priority for master CIS connect events
+    RWIP_PRIO_M_CIS_IDX,
+    /// Default priority for slave CIS connect events
+    RWIP_PRIO_S_CIS_IDX,
+    #endif // (BLE_CIS)
+    #if (BLE_BIS)
+    /// Default priority for master BIS events
+    RWIP_PRIO_M_BIS_IDX,
+    /// Default priority for slave BIS events
+    RWIP_PRIO_S_BIS_IDX,
+    /// Priority for Scanning activity
+    RWIP_PRIO_BIS_SCAN_IDX,
+    #endif // (BLE_BIS)
+    #endif // #if (BLE_EMB_PRESENT)
+    RWIP_PRIO_IDX_MAX
+};
+/// Default priority value definition
+enum rwip_prio_dft
+{
+    #if (BT_EMB_PRESENT)
+    /// ACL event default priority
+    RWIP_PRIO_ACL_DFT               = 5,
+    /// ACL event priority with activity
+    RWIP_PRIO_ACL_ACT               = 10,
+    /// ACL Role Switch event default priority
+    RWIP_PRIO_ACL_RSW               = 20,
+    /// ACL sniff event default priority
+    RWIP_PRIO_ACL_SNIFF_DFT         = 15,
+    /// ACL sniff transition event default priority
+    RWIP_PRIO_ACL_SNIFF_TRANS       = 10,
+    #if MAX_NB_SYNC
+    /// SCO event default priority
+    RWIP_PRIO_SCO_DFT               = 18,
+    #endif //MAX_NB_SYNC
+    /// Broadcast ACL event default priority
+    RWIP_PRIO_BCST_DFT              = 5,
+    /// Broadcast ACL event with LMP activity priority
+    RWIP_PRIO_BCST_ACT              = 10,
+    /// CSB RX event default priority
+    RWIP_PRIO_CSB_RX_DFT            = 10,
+    /// CSB TX event default priority
+    RWIP_PRIO_CSB_TX_DFT            = 10,
+    /// Inquiry event default priority
+    RWIP_PRIO_INQ_DFT               = 5,
+    /// Inquiry Scan event default priority
+    RWIP_PRIO_ISCAN_DFT             = 5,
+    /// Page event default priority
+    RWIP_PRIO_PAGE_DFT              = 8,
+    /// Page first packet event default priority
+    RWIP_PRIO_PAGE_1ST_PKT          = 20,
+    /// PCA event default priority
+    RWIP_PRIO_PCA_DFT               = 20,
+    /// Page scan event default priority
+    RWIP_PRIO_PSCAN_DFT             = 8,
+    /// Page scan event priority increment when canceled
+    RWIP_PRIO_PSCAN_1ST_PKT         = 20,
+    /// Synchronization Scan event default priority
+    RWIP_PRIO_SSCAN_DFT             = 10,
+    /// Synchronization Train event default priority
+    RWIP_PRIO_STRAIN_DFT            = 10,
+    #endif //#if (BT_EMB_PRESENT)
+    #if (BLE_EMB_PRESENT)
+    /// Default priority for scanning events
+    RWIP_PRIO_SCAN_DFT              = 5,
+    /// Default priority for auxiliary scan/init (no_asap) rx events
+    RWIP_PRIO_AUX_RX_DFT            = 12,
+    /// Default priority for initiating events
+    RWIP_PRIO_INIT_DFT              = 10,
+    /// LE connection events default priority
+    RWIP_PRIO_CONNECT_DFT           = 14,
+    /// LE connection events priority with activity
+    RWIP_PRIO_CONNECT_ACT           = 16,
+    /// Default priority for advertising events
+    RWIP_PRIO_ADV_DFT               = 5,
+    /// Default priority for advertising high duty cycle events
+    RWIP_PRIO_ADV_HDC_DFT           = 10,
+    /// Default priority for aux advertising events
+    RWIP_PRIO_ADV_AUX_DFT           = 12,
+    /// Default priority for periodic advertising events
+    RWIP_PRIO_PER_ADV_DFT           = 10,
+    /// Default priority for resolvable private addresses renewal event
+    RWIP_PRIO_RPA_RENEW_DFT         = 10,
+    #if (BLE_CIS)
+    /// Default priority for Master CIS Connect
+    RWIP_PRIO_M_CIS_DFT             = 20,
+    /// Default priority for Slave CIS Connect
+    RWIP_PRIO_S_CIS_DFT             = 20,
+    #endif // (BLE_CIS)
+    #if (BLE_BIS)
+    /// Default priority for Master BIS
+    RWIP_PRIO_M_BIS_DFT             = 20,
+    /// Default priority for Slave BIS
+    RWIP_PRIO_S_BIS_DFT             = 20,
+    /// Default priority for Scanning activity
+    RWIP_PRIO_BIS_SCAN_DFT          = 4,
+    #endif // (BLE_BIS)
+    #endif // #if (BLE_EMB_PRESENT)
+    /// Max priority
+    RWIP_PRIO_MAX                   = 31,
+};
+/// Default increment value definition
+enum rwip_incr_dft
+{
+    #if (BT_EMB_PRESENT)
+    /// ACL event default increment
+    RWIP_INCR_ACL_DFT               = 1,
+    /// ACL event increment with activity
+    RWIP_INCR_ACL_ACT               = 1,
+    /// ACL Role Switch event default increment
+    RWIP_INCR_ACL_RSW               = 1,
+    /// ACL sniff event default increment
+    RWIP_INCR_ACL_SNIFF_DFT         = 1,
+    /// ACL sniff transition event default increment
+    RWIP_INCR_ACL_SNIFF_TRANS       = 1,
+    #if MAX_NB_SYNC
+    /// SCO event default increment
+    RWIP_INCR_SCO_DFT               = 1,
+    #endif //MAX_NB_SYNC
+    /// Broadcast ACL event default increment
+    RWIP_INCR_BCST_DFT              = 1,
+    /// Broadcast ACL event with LMP activity increment
+    RWIP_INCR_BCST_ACT              = 1,
+    /// CSB RX event default increment
+    RWIP_INCR_CSB_RX_DFT            = 1,
+    /// CSB TX event default increment
+    RWIP_INCR_CSB_TX_DFT            = 1,
+    /// Inquiry event default increment
+    RWIP_INCR_INQ_DFT               = 1,
+    /// Inquiry Scan event default increment
+    RWIP_INCR_ISCAN_DFT             = 1,
+    /// Page event default increment
+    RWIP_INCR_PAGE_DFT              = 1,
+    /// Page event default increment
+    RWIP_INCR_PAGE_1ST_PKT          = 2,
+    /// Page first packet event default increment
+    RWIP_INCR_PCA_DFT               = 1,
+    /// Page scan event default increment
+    RWIP_INCR_PSCAN_DFT             = 1,
+    /// Page scan event increment increment when canceled
+    RWIP_INCR_PSCAN_1ST_PKT         = 1,
+    /// Synchronization Scan event default increment
+    RWIP_INCR_SSCAN_DFT             = 1,
+    /// Synchronization Train event default increment
+    RWIP_INCR_STRAIN_DFT            = 1,
+    #endif //#if (BT_EMB_PRESENT)
+    #if (BLE_EMB_PRESENT)
+    /// Default increment for scanning events
+    RWIP_INCR_SCAN_DFT              = 1,
+    /// Default increment for auxiliary scan/init (no_asap) rx events
+    RWIP_INCR_AUX_RX_DFT            = 1,
+    /// Default increment for initiating events
+    RWIP_INCR_INIT_DFT              = 1,
+    /// LE connection events default increment
+    RWIP_INCR_CONNECT_DFT           = 1,
+    /// LE connection events increment with activity
+    RWIP_INCR_CONNECT_ACT           = 1,
+    /// Default increment for advertising events
+    RWIP_INCR_ADV_DFT               = 1,
+    /// Default increment for advertising high duty cycle events
+    RWIP_INCR_ADV_HDC_PRIO_DFT      = 1,
+    /// Default increment for aux advertising events
+    RWIP_INCR_ADV_AUX_DFT           = 1,
+    /// Default increment for periodic advertising events
+    RWIP_INCR_PER_ADV_DFT           = 1,
+    /// Default increment for resolvable private addresses renewal event
+    RWIP_INCR_RPA_RENEW_DFT         = 1,
+    #if (BLE_CIS)
+    /// Default priority for Master CIS Connect
+    RWIP_INCR_M_CIS_DFT             = 1,
+    /// Default priority for Slave CIS Connect
+    RWIP_INCR_S_CIS_DFT             = 1,
+    #endif // (BLE_CIS)
+    #if (BLE_BIS)
+    /// Default priority for Master BIS
+    RWIP_INCR_M_BIS_DFT             = 1,
+    /// Default priority for Slave BIS
+    RWIP_INCR_S_BIS_DFT             = 1,
+    /// Default priority increment for Scanning procedure
+    RWIP_INCR_BIS_SCAN_DFT          = 1,
+    #endif // (BLE_BIS)
+    #endif // #if (BLE_EMB_PRESENT)
+};
+#endif //#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)
+/// @} BT Stack Configuration
+/// @} ROOT
+
+#ifndef ORIGINAL_APP_INIT
+extern int during_init;
+#endif
+#endif //RWIP_CONFIG_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/rwip_task.h b/platform/atm2/ATM22xx-x1x/include/ble/rwip_task.h
new file mode 100644
index 0000000..ce772db
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/rwip_task.h
@@ -0,0 +1,205 @@
+/**
+ ****************************************************************************************
+ *
+ * @file rwip_task.h
+ *
+ * @brief Task Identifier description for the RW IP
+ *
+ * Copyright (C) RivieraWaves 2009-2016
+ * Copyright (C) Atmosic 2023
+ *
+ ****************************************************************************************
+ */
+
+#ifndef RWIP_TASK_H_
+#define RWIP_TASK_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup ROOT
+ * @{
+ *
+ *  Information about RW SW TASK
+ *
+ * @name RW TASK Configuration
+ * @{
+ ****************************************************************************************
+ */
+
+#include <stdint.h>
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+
+/// Build the first message ID of a task. (in fact a ke_msg_id_t)
+#define TASK_FIRST_MSG(task) ((uint16_t)((task) << 8))
+
+/// Builds the task identifier from the type and the index of that task.
+#define TASK_BUILD(type, index) ((uint16_t)(((index) << 8)|(type)) )
+
+/// Retrieves task type from task id.
+#define TASK_TYPE_GET(ke_task_id) (((uint16_t)ke_task_id) & 0xFF)
+
+/// Retrieves task index number from task id.
+#define TASK_IDX_GET(ke_task_id) ((((uint16_t)ke_task_id) >> 8) & 0xFF)
+
+
+/// Tasks types definition, this value shall be in [0-254] range
+/*@TRACE*/
+enum TASK_API_ID
+{
+    // -----------------------------------------------------------------------------------
+    // ---------------------- Controller Task Identifiers --------------------------------
+    // -----------------------------------------------------------------------------------
+    // Link Layer Tasks
+    TASK_ID_LLM          = 0,//!< TASK_ID_LLM
+    TASK_ID_LLC          = 1,//!< TASK_ID_LLC
+    TASK_ID_LLD          = 2,//!< TASK_ID_LLD
+    TASK_ID_LLI          = 3,//!< TASK_ID_LLI
+
+    TASK_ID_DBG          = 4,//!< TASK_ID_DBG
+
+    // BT Controller Tasks
+    TASK_ID_LM           = 5,//!< TASK_ID_LM
+    TASK_ID_LC           = 6,//!< TASK_ID_LC
+    TASK_ID_LB           = 7,//!< TASK_ID_LB
+    TASK_ID_LD           = 8,//!< TASK_ID_LD
+
+    // -----------------------------------------------------------------------------------
+    // --------------------- BLE HL TASK API Identifiers ---------------------------------
+    // ---------------------     SHALL NOT BE CHANGED    ---------------------------------
+    // -----------------------------------------------------------------------------------
+
+    TASK_ID_L2CC         = 10,   // L2CAP Controller Task
+    TASK_ID_GATTM        = 11,   // Generic Attribute Profile Manager Task
+    TASK_ID_GATTC        = 12,   // Generic Attribute Profile Controller Task
+    TASK_ID_GAPM         = 13,   // Generic Access Profile Manager
+    TASK_ID_GAPC         = 14,   // Generic Access Profile Controller
+    TASK_ID_APP          = 15,   // Application API
+
+    // -----------------------------------------------------------------------------------
+    // --------------------- TRANSPORT AND PLATFORM TASKS --------------------------------
+    // -----------------------------------------------------------------------------------
+    TASK_ID_AHI          = 16,   // Application Host Interface
+    TASK_ID_HCI          = 17,   //!< TASK_ID_HCI
+    TASK_ID_DISPLAY      = 19,   //!< TASK_ID_DISPLAY
+
+    // -----------------------------------------------------------------------------------
+    // --------------------- BLE Profile TASK API Identifiers ----------------------------
+    // ---------------------     SHALL NOT BE CHANGED    ---------------------------------
+    // -----------------------------------------------------------------------------------
+    TASK_ID_DISS         = 20,   // Device Information Service Server Task
+    TASK_ID_DISC         = 21,   // Device Information Service Client Task
+
+    TASK_ID_PROXM        = 22,   // Proximity Monitor Task
+    TASK_ID_PROXR        = 23,   // Proximity Reporter Task
+
+    TASK_ID_FINDL        = 24,   // Find Me Locator Task
+    TASK_ID_FINDT        = 25,   // Find Me Target Task
+
+    TASK_ID_HTPC         = 26,   // Health Thermometer Collector Task
+    TASK_ID_HTPT         = 27,   // Health Thermometer Sensor Task
+
+    TASK_ID_BLPS         = 28,   // Blood Pressure Sensor Task
+    TASK_ID_BLPC         = 29,   // Blood Pressure Collector Task
+
+    TASK_ID_HRPS         = 30,   // Heart Rate Sensor Task
+    TASK_ID_HRPC         = 31,   // Heart Rate Collector Task
+
+    TASK_ID_TIPS         = 32,   // Time Server Task
+    TASK_ID_TIPC         = 33,   // Time Client Task
+
+    TASK_ID_SCPPS        = 34,   // Scan Parameter Profile Server Task
+    TASK_ID_SCPPC        = 35,   // Scan Parameter Profile Client Task
+
+    TASK_ID_BASS         = 36,   // Battery Service Server Task
+    TASK_ID_BASC         = 37,   // Battery Service Client Task
+
+    TASK_ID_HOGPD        = 38,   // HID Device Task
+    TASK_ID_HOGPBH       = 39,   // HID Boot Host Task
+    TASK_ID_HOGPRH       = 40,   // HID Report Host Task
+
+    TASK_ID_GLPS         = 41,   // Glucose Profile Sensor Task
+    TASK_ID_GLPC         = 42,   // Glucose Profile Collector Task
+
+    TASK_ID_RSCPS        = 43,   // Running Speed and Cadence Profile Server Task
+    TASK_ID_RSCPC        = 44,   // Running Speed and Cadence Profile Collector Task
+
+    TASK_ID_CSCPS        = 45,   // Cycling Speed and Cadence Profile Server Task
+    TASK_ID_CSCPC        = 46,   // Cycling Speed and Cadence Profile Client Task
+
+    TASK_ID_ANPS         = 47,   // Alert Notification Profile Server Task
+    TASK_ID_ANPC         = 48,   // Alert Notification Profile Client Task
+
+    TASK_ID_PASPS        = 49,   // Phone Alert Status Profile Server Task
+    TASK_ID_PASPC        = 50,   // Phone Alert Status Profile Client Task
+
+    TASK_ID_CPPS         = 51,   // Cycling Power Profile Server Task
+    TASK_ID_CPPC         = 52,   // Cycling Power Profile Client Task
+
+    TASK_ID_LANS         = 53,   // Location and Navigation Profile Server Task
+    TASK_ID_LANC         = 54,   // Location and Navigation Profile Client Task
+
+    TASK_ID_IPSS         = 55,   // Internet Protocol Support Profile Server Task
+    TASK_ID_IPSC         = 56,   // Internet Protocol Support Profile Client Task
+
+    TASK_ID_ENVS         = 57,   // Environmental Sensing Profile Server Task
+    TASK_ID_ENVC         = 58,   // Environmental Sensing Profile Client Task
+
+    TASK_ID_WSCS         = 59,   // Weight Scale Profile Server Task
+    TASK_ID_WSCC         = 60,   // Weight Scale Profile Client Task
+
+    TASK_ID_UDSS         = 61,   // User Data Service Server Task
+    TASK_ID_UDSC         = 62,   // User Data Service Client Task
+
+    TASK_ID_BCSS         = 63,   // Body Composition Server Task
+    TASK_ID_BCSC         = 64,   // Body Composition Client Task
+
+    TASK_ID_WPTS         = 65,   // Wireless Power Transfer Profile Server Task
+    TASK_ID_WPTC         = 66,   // Wireless Power Transfer Profile Client Task
+
+    TASK_ID_PLXS         = 67,   // Pulse Oximeter Profile Server Task
+    TASK_ID_PLXC         = 68,   // Pulse Oximeter Profile Client Task
+
+    TASK_ID_CGMS         = 69,   // Continuous Glucose Monitoring Server Task
+    TASK_ID_CGMC         = 70,   // Continuous Glucose Monitoring Client Task
+
+
+    TASK_ID_ANCSS        = 71,   // Apple Notification Center Service Profile Server Task
+    TASK_ID_ANCSC        = 72,   // Apple Notification Center Service Profile Client Task
+
+    TASK_ID_USER1        = 100,   // USER task
+    TASK_ID_USER2        = 101,   // USER task
+    TASK_ID_USER3        = 102,   // USER task
+    TASK_ID_USER4        = 103,   // USER task
+
+    TASK_ID_TPUTPS       = 110,  // Throughput Profile Server Task
+    TASK_ID_TPUTPC       = 111,  // Throughput Profile Client Task
+    TASK_ID_OTAPS        = 112,  // OTA Profile Server Task
+    TASK_ID_OTAPC        = 113,  // OTA Profile Client Task
+    TASK_ID_DTPS         = 114,  // Data transfer Profile Server Task
+    TASK_ID_DTPC         = 115,  // Data transfer Client Task
+    TASK_ID_AGPS         = 116,   // Atmosic Generic Profile Server Task
+    TASK_ID_AGPC         = 117,   // Atmosic Generic Profile Client Task
+    TASK_ID_ATMPRFS      = 118,   // Atmosic Profile Server Task
+    TASK_ID_ATVVS        = 119,   // Android TV Voice Server Task
+
+    TASK_ID_MESH         = 200,  // Mesh Task
+
+    /* 240 -> 241 reserved for Audio Mode 0 */
+    TASK_ID_AM0          = 240,  // BLE Audio Mode 0 Task
+    TASK_ID_AM0_HAS      = 241,  // BLE Audio Mode 0 Hearing Aid Service Task
+
+
+    TASK_ID_THPP         = 242,  // Throughput profile tester used for debugging
+
+    TASK_ID_INVALID      = 0xFF, // Invalid Task Identifier
+};
+
+/// @} BT Stack Configuration
+/// @} ROOT
+
+#endif //RWIP_CONFIG_H_
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/rwprf_config.h b/platform/atm2/ATM22xx-x1x/include/ble/rwprf_config.h
new file mode 100644
index 0000000..3b7ab70
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/rwprf_config.h
@@ -0,0 +1,634 @@
+/**
+ ****************************************************************************************
+ *
+ * @file rwprf_config.h
+ *
+ * @brief Header file - Profile Configuration
+ *
+ * Copyright (C) RivieraWaves 2009-2016
+ * Copyright (C) Atmosic 2023
+ *
+ ****************************************************************************************
+ */
+
+
+#ifndef _RWPRF_CONFIG_H_
+#define _RWPRF_CONFIG_H_
+
+
+/**
+ ****************************************************************************************
+ * @addtogroup PRF_CONFIG
+ * @ingroup PROFILE
+ * @brief Profile configuration
+ *
+ * @{
+ ****************************************************************************************
+ */
+
+//ATT DB,Testing and Qualification related flags
+#if (BLE_CENTRAL || BLE_PERIPHERAL)
+/// Proximity Profile Monitor Role
+#if defined(CFG_PRF_PXPM)
+#define BLE_PROX_MONITOR        1
+#else
+#define BLE_PROX_MONITOR        0
+#endif // defined(CFG_PRF_PXPM)
+
+/// Proximity Profile Reporter Role
+#if defined(CFG_PRF_PXPR)
+#define BLE_PROX_REPORTER       1
+#else
+#define BLE_PROX_REPORTER       0
+#endif // defined(CFG_PRF_PXPR)
+
+///Find Me Profile Locator role
+#if defined(CFG_PRF_FMPL)
+#define BLE_FINDME_LOCATOR      1
+#else
+#define BLE_FINDME_LOCATOR      0
+#endif // defined(CFG_PRF_FMPL)
+
+///Find Me Profile Target role
+#if defined(CFG_PRF_FMPT)
+#define BLE_FINDME_TARGET       1
+#else
+#define BLE_FINDME_TARGET       0
+#endif // defined(CFG_PRF_FMPT)
+
+///Health Thermometer Profile Collector Role
+#if defined(CFG_PRF_HTPC)
+#define BLE_HT_COLLECTOR        1
+#else
+#define BLE_HT_COLLECTOR        0
+#endif // defined(CFG_PRF_HTPC)
+
+///Health Thermometer Profile Thermometer Role
+#if defined(CFG_PRF_HTPT)
+#define BLE_HT_THERMOM          1
+#else
+#define BLE_HT_THERMOM          0
+#endif // defined(CFG_PRF_HTPT)
+
+///Device Information Service Client Role
+#if defined(CFG_PRF_DISC)
+#define BLE_DIS_CLIENT          1
+#else
+#define BLE_DIS_CLIENT          0
+#endif // defined(CFG_PRF_DISC)
+
+///Device Information Service Server Role
+#if defined(CFG_PRF_DISS)
+#define BLE_DIS_SERVER          1
+#else
+#define BLE_DIS_SERVER          0
+#endif // defined(CFG_PRF_DISS)
+
+///Blood Pressure Profile Collector Role
+#if defined(CFG_PRF_BLPC)
+#define BLE_BP_COLLECTOR        1
+#else
+#define BLE_BP_COLLECTOR        0
+#endif // defined(CFG_PRF_BLPC)
+
+///Blood Pressure Profile Sensor Role
+#if defined(CFG_PRF_BLPS)
+#define BLE_BP_SENSOR           1
+#else
+#define BLE_BP_SENSOR           0
+#endif // defined(CFG_PRF_BLPS)
+
+///Time Profile Client Role
+#if defined(CFG_PRF_TIPC)
+#define BLE_TIP_CLIENT          1
+#else
+#define BLE_TIP_CLIENT          0
+#endif // defined(CFG_PRF_TIPC)
+
+///Time Profile Server Role
+#if defined(CFG_PRF_TIPS)
+#define BLE_TIP_SERVER          1
+#else
+#define BLE_TIP_SERVER          0
+#endif // defined(CFG_PRF_TIPS)
+
+///Heart Rate Profile Collector Role
+#if defined(CFG_PRF_HRPC)
+#define BLE_HR_COLLECTOR        1
+#else
+#define BLE_HR_COLLECTOR        0
+#endif // defined(CFG_PRF_HRPC)
+
+///Heart Rate Profile Sensor Role
+#if defined(CFG_PRF_HRPS)
+#define BLE_HR_SENSOR           1
+#else
+#define BLE_HR_SENSOR           0
+#endif // defined(CFG_PRF_HRPS)
+
+///Scan Parameter Profile Client Role
+#if defined(CFG_PRF_SCPPC)
+#define BLE_SP_CLIENT           1
+#else
+#define BLE_SP_CLIENT           0
+#endif // defined(CFG_PRF_SCPPC)
+
+///Scan Parameter Profile Server Role
+#if defined(CFG_PRF_SCPPS)
+#define BLE_SP_SERVER           1
+#else
+#define BLE_SP_SERVER           0
+#endif // defined(CFG_PRF_SCPPS)
+
+///Battery Service Client Role
+#if defined(CFG_PRF_BASC)
+#define BLE_BATT_CLIENT         1
+#else
+#define BLE_BATT_CLIENT         0
+#endif // defined(CFG_PRF_BASC)
+
+///Battery Service Server Role
+#if defined(CFG_PRF_BASS)
+#define BLE_BATT_SERVER         1
+#else
+#define BLE_BATT_SERVER         0
+#endif // defined(CFG_PRF_BASS)
+
+///HID Device Role
+#if defined(CFG_PRF_HOGPD)
+#define BLE_HID_DEVICE          1
+#else
+#define BLE_HID_DEVICE          0
+#endif // defined(CFG_PRF_HOGPD)
+
+///HID Boot Host Role
+#if defined(CFG_PRF_HOGPBH)
+#define BLE_HID_BOOT_HOST       1
+#else
+#define BLE_HID_BOOT_HOST       0
+#endif // defined(CFG_PRF_HOGPBH)
+
+///HID Report Host Role
+#if defined(CFG_PRF_HOGPRH)
+#define BLE_HID_REPORT_HOST     1
+#else
+#define BLE_HID_REPORT_HOST     0
+#endif // defined(CFG_PRF_HOGPRH)
+
+/// Glucose Profile Collector Role
+#if defined(CFG_PRF_GLPC)
+#define BLE_GL_COLLECTOR        1
+#else
+#define BLE_GL_COLLECTOR        0
+#endif // defined(CFG_PRF_GLPC)
+
+/// Glucose Profile Sensor Role
+#if defined(CFG_PRF_GLPS)
+#define BLE_GL_SENSOR           1
+#else
+#define BLE_GL_SENSOR           0
+#endif // defined(CFG_PRF_GLPS)
+
+/// Running Speed and Cadence Profile Collector Role
+#if defined(CFG_PRF_RSCPC)
+#define BLE_RSC_COLLECTOR       1
+#else
+#define BLE_RSC_COLLECTOR       0
+#endif // defined(CFG_PRF_RSCPC)
+
+/// Running Speed and Cadence Profile Server Role
+#if defined(CFG_PRF_RSCPS)
+#define BLE_RSC_SENSOR          1
+#else
+#define BLE_RSC_SENSOR          0
+#endif // defined(CFG_PRF_RSCPS)
+
+/// Cycling Speed and Cadence Profile Collector Role
+#if defined(CFG_PRF_CSCPC)
+#define BLE_CSC_COLLECTOR       1
+#else
+#define BLE_CSC_COLLECTOR       0
+#endif // defined(CFG_PRF_CSCPC)
+
+/// Cycling Speed and Cadence Profile Server Role
+#if defined(CFG_PRF_CSCPS)
+#define BLE_CSC_SENSOR          1
+#else
+#define BLE_CSC_SENSOR          0
+#endif // defined(CFG_PRF_CSCPS)
+
+/// Cycling Power Profile Collector Role
+#if defined(CFG_PRF_CPPC)
+#define BLE_CP_COLLECTOR        1
+#else
+#define BLE_CP_COLLECTOR        0
+#endif // defined (CFG_PRF_CPPC)
+
+/// Cycling Power Profile Server Role
+#if defined(CFG_PRF_CPPS)
+#define BLE_CP_SENSOR            1
+#else
+#define BLE_CP_SENSOR            0
+#endif // defined (CFG_PRF_CPPS)
+
+/// Location and Navigation Profile Collector Role
+#if defined(CFG_PRF_LANC)
+#define BLE_LN_COLLECTOR        1
+#else
+#define BLE_LN_COLLECTOR        0
+#endif // defined (CFG_PRF_LANC)
+
+/// Location and Navigation Profile Server Role
+#if defined(CFG_PRF_LANS)
+#define BLE_LN_SENSOR            1
+#else
+#define BLE_LN_SENSOR            0
+#endif // defined (CFG_PRF_LANS)
+
+/// Alert Notification Profile Client Role
+#if defined(CFG_PRF_ANPC)
+#define BLE_AN_CLIENT           1
+#else
+#define BLE_AN_CLIENT           0
+#endif // defined(CFG_PRF_ANPC)
+
+/// Alert Notification Profile Server Role
+#if defined(CFG_PRF_ANPS)
+#define BLE_AN_SERVER           1
+#else
+#define BLE_AN_SERVER           0
+#endif // defined(CFG_PRF_ANPS)
+
+/// Phone Alert Status Profile Client Role
+#if defined(CFG_PRF_PASPC)
+#define BLE_PAS_CLIENT          1
+#else
+#define BLE_PAS_CLIENT          0
+#endif // defined(CFG_PRF_PASPC)
+
+/// Phone Alert Status Profile Server Role
+#if defined(CFG_PRF_PASPS)
+#define BLE_PAS_SERVER          1
+#else
+#define BLE_PAS_SERVER          0
+#endif // defined(CFG_PRF_PASPS)
+
+/// Internet Protocol Support Profile Server Role
+#if defined(CFG_PRF_IPSS)
+#define BLE_IPS_SERVER          1
+#else
+#define BLE_IPS_SERVER          0
+#endif // defined(CFG_PRF_IPSS)
+
+/// Internet Protocol Support Profile Client Role
+#if defined(CFG_PRF_IPSC)
+#define BLE_IPS_CLIENT          1
+#else
+#define BLE_IPS_CLIENT          0
+#endif // defined(CFG_PRF_IPSC)
+
+/// Environmental Sensing Profile Server Role
+#if defined(CFG_PRF_ENVS)
+#define BLE_ENV_SERVER          1
+#else
+#define BLE_ENV_SERVER          0
+#endif // defined(CFG_PRF_ENVS)
+
+/// Environmental Sensing Profile Client Role
+#if defined(CFG_PRF_ENVC)
+#define BLE_ENV_CLIENT          1
+#else
+#define BLE_ENV_CLIENT          0
+#endif // defined(CFG_PRF_ENVC)
+
+/// Weight Scale Profile Server Role
+#if defined(CFG_PRF_WSCS)
+#define BLE_WSC_SERVER          1
+#else
+#define BLE_WSC_SERVER          0
+#endif // defined(CFG_PRF_WSCS)
+
+/// Weight Scale Profile Client Role
+#if defined(CFG_PRF_WSCC)
+#define BLE_WSC_CLIENT          1
+#else
+#define BLE_WSC_CLIENT          0
+#endif // defined(CFG_PRF_WSCC)
+
+/// Body Composition Server Role
+#if defined(CFG_PRF_BCSS)
+#define BLE_BCS_SERVER          1
+#else
+#define BLE_BCS_SERVER          0
+#endif // defined(CFG_PRF_BCSS)
+
+/// Body Composition Client Role
+#if defined(CFG_PRF_BCSC)
+#define BLE_BCS_CLIENT          1
+#else
+#define BLE_BCS_CLIENT          0
+#endif // defined(CFG_PRF_BCSC)
+
+/// User Data Service Server Role
+#if defined(CFG_PRF_UDSS)
+#define BLE_UDS_SERVER          1
+#else
+#define BLE_UDS_SERVER          0
+#endif // defined(CFG_PRF_UDSS)
+
+/// User Data Service Client Role
+#if defined(CFG_PRF_UDSC)
+#define BLE_UDS_CLIENT          1
+#else
+#define BLE_UDS_CLIENT          0
+#endif // defined(CFG_PRF_UDSC)
+
+/// Wireless Power Transfer Profile Server Role
+#if defined(CFG_PRF_WPTS)
+#define BLE_WPT_SERVER          1
+#else
+#define BLE_WPT_SERVER          0
+#endif // defined(CFG_PRF_WPTS)
+
+/// Wireless Power Transfer Profile Client Role
+#if defined(CFG_PRF_WPTC)
+#define BLE_WPT_CLIENT          1
+#else
+#define BLE_WPT_CLIENT          0
+#endif // defined(CFG_PRF_WPTC)
+
+/// Pulse Oximeter Profile Server Role
+#if defined(CFG_PRF_PLXS)
+#define BLE_PLX_SERVER          1
+#else
+#define BLE_PLX_SERVER          0
+#endif // defined(CFG_PRF_PLXS)
+
+/// Pulse Oximete Profile Client Role
+#if defined(CFG_PRF_PLXC)
+#define BLE_PLX_CLIENT          1
+#else
+#define BLE_PLX_CLIENT          0
+#endif // defined(CFG_PRF_PLXC)
+
+/// Continuous Glucose Monitoring Profile Server Role
+#if defined(CFG_PRF_CGMS)
+#define BLE_CGM_SERVER          1
+#else
+#define BLE_CGM_SERVER          0
+#endif // defined(CFG_PRF_CGMS)
+
+/// Continuous Glucose Monitoring Profile Client Role
+#if defined(CFG_PRF_CGMC)
+#define BLE_CGM_CLIENT          1
+#else
+#define BLE_CGM_CLIENT          0
+#endif // defined(CFG_PRF_CGMC)
+
+/// Throughput tester profile for debug usage
+#if defined(CFG_PRF_THPP)
+#define BLE_DBG_THPP          1
+#else
+#define BLE_DBG_THPP          0
+#endif // defined(CFG_PRF_DISS)
+
+#if defined(CFG_PRF_ANCSC)
+#define BLE_ANCS_CLIENT           1
+#else
+#define BLE_ANCS_CLIENT           0
+#endif // defined(CFG_PRF_ANCSC)
+
+/// ATMOSIC Atmosic Generic Profile Client Role
+#if defined(CFG_PRF_AGPC)
+#define BLE_AGP_CLIENT           1
+#else
+#define BLE_AGP_CLIENT           0
+#endif // defined(CFG_PRF_AGPC)
+
+/// ATMOSIC Atmosic Generic Profile Server Role
+#if defined(CFG_PRF_AGPS)
+#define BLE_AGP_SERVER           1
+#else
+#define BLE_AGP_SERVER           0
+#endif // defined(CFG_PRF_AGPS)
+
+
+/// ATMOSIC Throughput Test Profile Client Role
+#if defined(CFG_PRF_TPUTPC)
+#define BLE_TPUTP_CLIENT      1
+#else
+#define BLE_TPUTP_CLIENT      0
+#endif // defined(CFG_PRF_TPUTPC)
+
+/// ATMOSIC Throughput Test Profile Server Role
+#if defined(CFG_PRF_TPUTPS)
+#define BLE_TPUTP_SERVER      1
+#else
+#define BLE_TPUTP_SERVER      0
+#endif // defined(CFG_PRF_TPUTPS)
+
+/// ATMOSIC OTA Profile Server Role
+#if defined(CFG_PRF_OTAPS)
+#define BLE_OTAP_SERVER      1
+#else
+#define BLE_OTAP_SERVER      0
+#endif // defined(CFG_PRF_OTAPS)
+
+/// ATMOSIC DT Profile Server Role
+#if defined(CFG_PRF_DTPS)
+#define BLE_DTP_SERVER      1
+#else
+#define BLE_DTP_SERVER      0
+#endif // defined(CFG_PRF_DTPS)
+
+/// Android TV Voice Service Server Role
+#if defined(CFG_PRF_ATVVS)
+#define BLE_ATVV_SERVER      1
+#else
+#define BLE_ATVV_SERVER      0
+#endif // defined(CFG_PRF_ATVVS)
+
+/// BLE_CLIENT_PRF indicates if at least one client profile is present
+#if (BLE_PROX_MONITOR || BLE_FINDME_LOCATOR || BLE_HT_COLLECTOR || BLE_BP_COLLECTOR \
+        || BLE_HR_COLLECTOR || BLE_DIS_CLIENT || BLE_TIP_CLIENT || BLE_SP_CLIENT \
+        || BLE_BATT_CLIENT || BLE_GL_COLLECTOR || BLE_HID_BOOT_HOST || BLE_HID_REPORT_HOST \
+        || BLE_RSC_COLLECTOR || BLE_CSC_COLLECTOR || BLE_CP_COLLECTOR || BLE_LN_COLLECTOR || BLE_AN_CLIENT \
+        || BLE_PAS_CLIENT || BLE_IPS_CLIENT || BLE_ENV_CLIENT || BLE_WSC_CLIENT \
+        || BLE_UDS_CLIENT || BLE_BCS_CLIENT || BLE_WPT_CLIENT || BLE_PLX_CLIENT \
+        || BLE_CGM_CLIENT || BLE_DBG_THPP || BLE_ANCS_CLIENT || BLE_AGP_CLIENT || BLE_TPUTP_CLIENT)
+
+#define BLE_CLIENT_PRF          1
+#else
+#define BLE_CLIENT_PRF          0
+#endif //(BLE_PROX_MONITOR || BLE_FINDME_LOCATOR ...)
+
+/// BLE_SERVER_PRF indicates if at least one server profile is present
+#if (BLE_PROX_REPORTER || BLE_FINDME_TARGET || BLE_HT_THERMOM || BLE_BP_SENSOR \
+        || BLE_TIP_SERVER || BLE_HR_SENSOR || BLE_DIS_SERVER || BLE_SP_SERVER \
+        || BLE_BATT_SERVER || BLE_HID_DEVICE || BLE_GL_SENSOR || BLE_RSC_SENSOR  \
+        || BLE_CSC_SENSOR || BLE_CP_SENSOR || BLE_LN_SENSOR || BLE_AN_SERVER \
+        || BLE_PAS_SERVER || BLE_IPS_SERVER || BLE_ENV_SERVER || BLE_WSC_SERVER \
+        || BLE_UDS_SERVER || BLE_BCS_SERVER || BLE_WPT_SERVER || BLE_PLX_SERVER \
+        || BLE_CGM_SERVER || BLE_DBG_THPP || BLE_TPUTP_SERVER || BLE_OTAP_SERVER \
+        || BLE_AGP_SERVER || BLE_DTP_SERVER || BLE_ATVV_SERVER)
+#define BLE_SERVER_PRF          1
+#else
+#define BLE_SERVER_PRF          0
+#endif //(BLE_PROX_REPORTER || BLE_FINDME_TARGET ...)
+
+//Force ATT parts depending on profile roles or compile options
+/// Attribute Client
+#if (BLE_CLIENT_PRF)
+#define BLE_ATTC                    1
+#endif //(BLE_CLIENT_PRF)
+
+/// Attribute Server
+#if (BLE_SERVER_PRF)
+#define BLE_ATTS                    1
+#endif //(BLE_SERVER_PRF)
+
+/// Enable data transfer server module for dependent client roles
+#if (BLE_TPUTP_CLIENT)
+#define BLE_DTS_CLIENT              1
+#else
+#define BLE_DTS_CLIENT              0
+#endif
+
+/// Enable data transfer server module for dependent server roles
+#if (BLE_TPUTP_SERVER || BLE_OTAP_SERVER || BLE_DTP_SERVER)
+#define BLE_DTS_SERVER              1
+#else
+#define BLE_DTS_SERVER              0
+#endif
+
+#elif (BLE_OBSERVER || BLE_BROADCASTER)
+/// Proximity Profile Monitor Role
+#define BLE_PROX_MONITOR            0
+/// Proximity Profile Reporter Role
+#define BLE_PROX_REPORTER           0
+///Find Me Profile Locator role
+#define BLE_FINDME_LOCATOR          0
+///Find Me Profile Target role
+#define BLE_FINDME_TARGET           0
+///Health Thermometer Profile Collector Role
+#define BLE_HT_COLLECTOR            0
+///Health Thermometer Profile Thermometer Role
+#define BLE_HT_THERMOM              0
+///Blood Pressure Profile Collector Role
+#define BLE_BP_COLLECTOR            0
+///Blood Pressure Profile Sensor Role
+#define BLE_BP_SENSOR               0
+///Heart Rate Profile Collector Role
+#define BLE_HR_COLLECTOR            0
+///Heart Rate Profile Sensor Role
+#define BLE_HR_SENSOR               0
+///Time Profile Client Role
+#define BLE_TIP_CLIENT              0
+///Time Profile Server Role
+#define BLE_TIP_SERVER              0
+/// Device Information Service Client Role
+#define BLE_DIS_CLIENT              0
+/// Device Information Service Server Role
+#define BLE_DIS_SERVER              0
+/// Scan Parameter Profile Client Role
+#define BLE_SP_CLIENT               0
+/// Scan Parameter Profile Server Role
+#define BLE_SP_SERVER               0
+/// Battery Service Client Role
+#define BLE_BATT_CLIENT             0
+/// Battery Service Server Role
+#define BLE_BATT_SERVER             0
+/// HID Device Role
+#define BLE_HID_DEVICE              0
+/// HID Boot Host Role
+#define BLE_HID_BOOT_HOST           0
+/// HID Report Host Role
+#define BLE_HID_REPORT_HOST         0
+/// Glucose Profile Collector Role
+#define BLE_GL_COLLECTOR            0
+/// Glucose Profile Sensor Role
+#define BLE_GL_SENSOR               0
+/// Running Speed and Cadence Collector Role
+#define BLE_RSC_COLLECTOR           0
+/// Running Speed and Cadence Server Role
+#define BLE_RSC_SENSOR              0
+/// Cycling Speed and Cadence Collector Role
+#define BLE_CSC_COLLECTOR           0
+/// Cycling Speed and Cadence Server Role
+#define BLE_CSC_SENSOR              0
+/// Cycling Power Collector Role
+#define BLE_CP_COLLECTOR            0
+/// Cycling Power Server Role
+#define BLE_CP_SENSOR               0
+/// Location and Navigation Collector Role
+#define BLE_LN_COLLECTOR            0
+/// Location and Navigation Server Role
+#define BLE_LN_SENSOR               0
+/// Alert Notification Client Role
+#define BLE_AN_CLIENT               0
+/// Alert Notification Server Role
+#define BLE_AN_SERVER               0
+/// Phone Alert Status Client Role
+#define BLE_PAS_CLIENT              0
+/// Phone Alert Status Server Role
+#define BLE_PAS_SERVER              0
+/// Internet Protocol Support Profile Server Role
+#define BLE_IPS_SERVER              0
+/// Internet Protocol Support Profile Client Role
+#define BLE_IPS_CLIENT              0
+/// Environmental Sensing Profile Server Role
+#define BLE_ENV_SERVER              0
+/// Environmental Sensing Profile Client Role
+#define BLE_ENV_CLIENT              0
+/// Weight Scale Profile Server Role
+#define BLE_WSC_SERVER              0
+/// Weight Scale Profile Client Role
+#define BLE_WSC_CLIENT              0
+/// Body Composition Profile Client Role
+#define BLE_BCS_CLIENT              0
+/// Body Composition Profile Server Role
+#define BLE_BCS_SERVER              0
+/// User Data Service Server Role
+#define BLE_UDS_SERVER              0
+/// User Data Service Client Role
+#define BLE_UDS_CLIENT              0
+/// Wireless Power Transfer Profile Server Role
+#define BLE_WPT_SERVER              0
+/// Wireless Power Transfer Profile Client Role
+#define BLE_WPT_CLIENT              0
+/// Pulse Oximete Profile Server Role
+#define BLE_PLX_SERVER              0
+/// Pulse Oximete Profile Client Role
+#define BLE_PLX_CLIENT              0
+/// Pulse Oximete Profile Server Role
+#define BLE_CGM_SERVER              0
+/// Pulse Oximete Profile Client Role
+#define BLE_CGM_CLIENT              0
+
+/// Throughput tester profile for debug usage
+#define BLE_DBG_THPP                0
+/// ATMOSIC Throughput Profile Server Role
+#define BLE_TPUTP_SERVER            0
+/// ATMOSIC Throughput Profile Client Role
+#define BLE_TPUTP_CLIENT            0
+/// Data Transfer service
+#define BLE_DTS_SERVER              0
+#define BLE_DTS_CLIENT              0
+/// ATMOSIC OTA Profile Server Role
+#define BLE_OTAP_SERVER             0
+/// ATMOSIC DT Profile Server Role
+#define BLE_DTP_SERVER              0
+
+//Force ATT parts to 0
+/// External database management
+#define BLE_EXT_ATTS_DB             0
+/// Profile Server
+#define BLE_SERVER_PRF              0
+/// Profile Client
+#define BLE_CLIENT_PRF              0
+#endif //(BLE_OBSERVER || BLE_BROADCASTER)
+
+
+/// @} PRF_CONFIG
+
+#endif /* _RWPRF_CONFIG_H_ */
diff --git a/platform/atm2/ATM22xx-x1x/include/ble/smpc.h b/platform/atm2/ATM22xx-x1x/include/ble/smpc.h
new file mode 100644
index 0000000..8c49842
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ble/smpc.h
@@ -0,0 +1,327 @@
+/**
+ ****************************************************************************************
+ *
+ * @file smpc.h
+ *
+ * @brief Header file - SMPC.
+ *
+ * Copyright (C) RivieraWaves 2009-2016
+ * Copyright (C) Atmosic 2023
+ *
+ ****************************************************************************************
+ */
+
+#ifndef SMPC_H_
+#define SMPC_H_
+
+/**
+ ****************************************************************************************
+ * @addtogroup SMP Security Manager Protocol
+ * @ingroup HOST
+ * @brief Security Manager Protocol.
+ *
+ * The SMP is responsible for the over-all security policies of BLE.
+ * It defines methods for pairing and key distribution, handles encryption,
+ * data signing and privacy features such as random addressing generation and resolution.
+ *
+ * Pairing is performed to exchange pairing features and generate a short term
+ * key for link encryption.
+ * A transport specific key distribution is performed to
+ * share the keys that can be used to encrypt the link in the future
+ * reconnection process, signed data verification and random address
+ * resolution.
+ *
+ * There exist 3 phases in the complete security procedure:
+ * 1. Feature exchange (IO capabilities, OOB flags, Authentication Requirements, Key distributions)
+ * 2. Short Term Key generation
+ *    Generation method depends on exchanged features:
+ *     - Just Works - use Temporary key = 0
+ *     - PassKey Entry - use Temporary Key = 6-digit provided by user
+ *     - Out of Band (OOB) - use Temporary Key = 16-octet key, available form OOB source
+ * 3. Transport Specific Key Distribution (TKDP)(LTK+EDIV+RAND_NB, IRK+ADDR, CSRK)
+ *---------------------------------------------------------------------
+ * @addtogroup SMPC Security Manager Protocol Controller
+ * @ingroup SMP
+ * @brief Security Manager Protocol Controller.
+ *
+ * This block handles control of SM procedures for several possible existing connections,
+ * for which the security procedure may be conducted simultaneously.
+ *
+ * It allows flow control for HCI access to encryption and random number generation, used
+ * at different moments in the procedure.
+ *
+ * It handles PDU creation and sending through L2CAP, also their reception from L2CAP
+ * and interpretation.
+ *
+ * Other small utilities such as maximum key size determination and TKDP organization are
+ * implemented in SMPC.
+ * @{
+ *
+ ****************************************************************************************
+ */
+
+
+/*
+ * INCLUDE FILES
+ ****************************************************************************************
+ */
+#include "rwip_config.h"
+
+#if (BLE_SMPC)
+#include "co_bt.h"
+#include "gap.h"
+#include "gapc_task.h"
+#include "ke_task.h"
+
+/*
+ * DEFINES
+ ****************************************************************************************
+ */
+
+/// MAC length
+#define SMPC_SIGN_MAC_LEN                       (8)
+/// SignCounter length
+#define SMPC_SIGN_COUNTER_LEN                   (4)
+/// Signature length
+#define SMPC_SIGN_LEN                           (SMPC_SIGN_MAC_LEN + SMPC_SIGN_COUNTER_LEN)
+
+/**
+ * Repeated Attempts Timer Configuration
+ */
+/// Repeated Attempts Timer default value (x10ms)
+#define SMPC_REP_ATTEMPTS_TIMER_DEF_VAL         (200)      //2s
+/// Repeated Attempts Timer max value (x10ms)
+#define SMPC_REP_ATTEMPTS_TIMER_MAX_VAL         (3000)     //30s
+/// Repeated Attempts Timer multiplier
+#define SMPC_REP_ATTEMPTS_TIMER_MULT            (2)
+
+/**
+ * Timeout Timer Configuration
+ */
+#define SMPC_TIMEOUT_TIMER_DURATION             (3000)     //30s
+
+#define SMPC_PUBLIC_KEY_256_COORD_LEN            0x20
+/*
+ * ENUMERATIONS
+ ****************************************************************************************
+ */
+
+
+/// Information source.
+enum smpc_addr_src
+{
+    /// Local info.
+    SMPC_INFO_LOCAL,
+    /// Peer info.
+    SMPC_INFO_PEER,
+    /// Maximum info source.
+    SMPC_INFO_MAX
+};
+
+/*
+ * STRUCTURES DEFINITION
+ ****************************************************************************************
+ */
+
+/// Master ID Information Structure
+struct smpc_mst_id_info
+{
+    // Encryption Diversifier
+    uint16_t ediv;
+
+    // Random Number
+    uint8_t randnb[GAP_RAND_NB_LEN];
+};
+
+#if (SECURE_CONNECTIONS)
+struct smp_aes_cmac
+{
+    uint8_t* M; // pointer to memory allocated by calling function
+    uint8_t  M_len;
+    uint8_t  M_last[16];
+    uint8_t  X[16];
+    uint8_t  Y[16];
+    uint8_t*  K; //[16];
+    uint8_t  K1[16];
+    uint8_t  K2[16];
+    uint8_t  next_block;
+    uint8_t  num_blocks;
+    uint8_t  state;  // Only 3 States - Idle, SubKey Generation, Block AES
+};
+
+struct smp_f4
+{
+    uint8_t M[65];
+    uint8_t X[16]; // The Key
+};
+
+struct smp_f5
+{
+    uint8_t M[53];
+    uint8_t* W;
+    uint8_t T[16];
+    uint8_t SALT[16];
+};
+
+
+struct smp_f6
+{
+    uint8_t W[16];
+    uint8_t M[65];
+};
+
+struct smp_g2
+{
+    uint8_t X[16];
+    uint8_t M[80];
+};
+
+struct gapc_public_key
+{
+    uint8_t x[GAP_P256_KEY_LEN];
+    uint8_t y[GAP_P256_KEY_LEN];
+};
+
+#endif // (SECURE_CONNECTIONS)
+/// Pairing Information
+struct smpc_pair_info
+{
+    /// TK during Phase 2, LTK or IRK during Phase 3
+    struct gap_sec_key key;
+    /// Pairing request command
+    struct gapc_pairing pair_req_feat;
+    /// Pairing response feature
+    struct gapc_pairing pair_rsp_feat;
+    /// Random number value
+    uint8_t rand[RAND_VAL_LEN];
+    /// Remote random number value
+    uint8_t rem_rand[RAND_VAL_LEN];
+    /// Confirm value to check
+    uint8_t conf_value[GAP_KEY_LEN];
+    /// Pairing Method
+    uint8_t pair_method;
+    /// Authentication level
+    uint8_t auth;
+    /// check that LTK exchanged during pairing
+    bool ltk_exchanged;
+    /// Key to be exchanged (transmitted or to be received)
+    uint8_t keys_dist;
+
+
+    #if (SECURE_CONNECTIONS)
+    // AES_CMAC Info
+    struct smp_aes_cmac* aes_cmac;
+    // Structure for Secure Connections Crypto functions
+    struct smp_f4*  f4_info;
+    struct smp_f5*  f5_info;
+    struct smp_f6*  f6_info;
+    struct smp_g2*  g2_info;
+
+    bool dh_key_calculation_complete;
+
+    uint8_t MacKey[GAP_KEY_LEN];
+    uint8_t dh_key_check_peer[DHKEY_CHECK_LEN];
+    uint8_t dh_key_local[DH_KEY_LEN];
+
+    uint8_t dh_key_check_local[DHKEY_CHECK_LEN];
+    bool dh_key_check_received_from_peer;
+
+    public_key_t peer_public_key;
+
+    uint8_t passkey_bit_count;
+    uint32_t passkey;
+
+    // Required for OOB
+    uint8_t peer_r[GAP_KEY_LEN];
+    uint8_t local_r[GAP_KEY_LEN];
+    bool peer_rand_received;
+    bool peer_confirm_received;
+    #endif // (SECURE_CONNECTIONS)
+};
+
+/// Signing Information
+struct smpc_sign_info
+{
+    /// Operation requester task id
+    ke_task_id_t requester;
+
+    /// Message offset
+    uint16_t msg_offset;
+    /// Number of block
+    uint8_t block_nb;
+    /// Cn-1 value -> Need to kept this value to retrieve it after L generation
+    uint8_t cn1[GAP_KEY_LEN];
+};
+
+/// SMPC environment structure
+struct smpc_env
+{
+    /// SMPC temporary information
+    union smpc_info
+    {
+        /**
+         * Pairing Information - This structure is allocated at the beginning of a pairing
+         * or procedure. It is freed when a disconnection occurs or at the end of
+         * the pairing procedure. If not enough memory can be found, the procedure will fail
+         *  with an "Unspecified Reason" error
+         */
+        struct smpc_pair_info *pair;
+
+        /**
+         * Signature Procedure Information - This structure is allocated at the beginning of a
+         * signing procedure. It is freed when a disconnection occurs or at the end of
+         * the signing procedure. If not enough memory can be found, the procedure will fail
+         *  with an "Unspecified Reason" error.
+         */
+        struct smpc_sign_info *sign;
+    } info;
+
+    /// CSRK values (Local and remote)
+    struct gap_sec_key csrk[SMPC_INFO_MAX];
+
+    /// signature counter values (Local and remote)
+    uint32_t sign_counter[SMPC_INFO_MAX];
+
+    /// Repeated Attempt Timer value
+    uint16_t rep_att_timer_val;
+
+    /// Encryption key size
+    uint8_t key_size;
+
+    /**
+     * Contains the current state of the two timers needed in the SMPC task
+     *      Bit 0 - Is Timeout Timer running
+     *      Bit 1 - Is Repeated Attempt Timer running
+     *      Bit 2 - Has task reached a SMP Timeout
+     */
+    uint8_t timer_state;
+
+    /// State of the current procedure
+    uint8_t state;
+
+    #if (SECURE_CONNECTIONS)
+    bool secure_connections_enabled;
+    #endif // (SECURE_CONNECTIONS)
+};
+
+/*
+ * GLOBAL VARIABLES DEFINITION
+ ****************************************************************************************
+ */
+
+
+/*
+ * MACROS
+ ****************************************************************************************
+ */
+
+/*
+ * FUNCTION DECLARATIONS
+ ****************************************************************************************
+ */
+
+
+#endif //(BLE_SMPC)
+#endif //SMPC_H_
+
+/// @} SMPC
diff --git a/platform/atm2/ATM22xx-x1x/include/ll.h b/platform/atm2/ATM22xx-x1x/include/ll.h
new file mode 100644
index 0000000..a2c64ce
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/ll.h
@@ -0,0 +1,126 @@
+/**
+ *******************************************************************************
+ *
+ * @file ll.h
+ *
+ * @brief Declaration of low level functions.
+ *
+ * Copyright (C) RivieraWaves 2009-2015
+ * Copyright (C) Atmosic 2017-2021
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/**
+ * @defgroup LL Low level
+ * @ingroup ATM2x
+ * @brief Low level functions
+ * @{
+ */
+
+#if !defined(__GNUC__) && !defined(__ICCARM__)
+#error "File only included with ARM GCC or IAR ANSI C/C++ Compiler for ARM"
+#endif
+
+#ifdef CORTEX_M0
+#pragma push_macro("__INLINE")
+#undef __INLINE
+#include "CMSDK_CM0.h"
+#include "core_cm0.h"
+#pragma pop_macro("__INLINE")
+#endif
+
+#ifdef __ICCARM__
+#include <intrinsics.h>
+#endif
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Interrupt priorities
+#define IRQ_PRI_RT	0	// Real time - highest priority
+#define IRQ_PRI_HIGH	1
+#define IRQ_PRI_NORMAL	2
+#define IRQ_PRI_UI	3	// User interface - lowest priority
+
+/** @brief Enable interrupts globally in the system.
+ * This macro must be used when the initialization phase is over and the interrupts
+ * can start being handled by the system.
+ */
+#define GLOBAL_INT_START()                                                  \
+do {                                                                        \
+    __enable_irq();                                                         \
+} while(0)
+
+/** @brief Disable interrupts globally in the system.
+ * This macro must be used when the system wants to disable all the interrupt
+ * it could handle.
+ */
+#define GLOBAL_INT_STOP()                                                   \
+do {                                                                        \
+    __disable_irq();                                                        \
+} while(0)
+
+/** @brief Disable interrupts globally in the system.
+ * This macro must be used in conjunction with the @ref GLOBAL_INT_RESTORE macro since this
+ * last one will close the brace that the current macro opens.  This means that both
+ * macros must be located at the same scope level.
+ */
+#define GLOBAL_INT_DISABLE()                                                \
+do {                                                                        \
+    uint32_t __PRIMASK_save = __get_PRIMASK();                              \
+    __disable_irq()
+
+#define STATIC_GLOBAL_INT_DISABLE()                                         \
+do {                                                                        \
+    static uint32_t __PRIMASK_save;                                         \
+    __PRIMASK_save = __get_PRIMASK();                                       \
+    __disable_irq()
+
+/** @brief Restore interrupts from the previous global disable.
+ * @sa GLOBAL_INT_DISABLE
+ */
+#define GLOBAL_INT_RESTORE()                                                \
+    __set_PRIMASK(__PRIMASK_save);                                          \
+} while(0)
+
+/** @brief Invoke the wait for interrupt procedure of the processor.
+ *
+ * @warning It is suggested that this macro is called while the interrupts are disabled
+ * to have performed the checks necessary to decide to move to sleep mode.
+ *
+ */
+#define WFI() __WFI()
+
+/**
+ * @brief Wait for a condition to be made true by an interrupt handler.
+ */
+#define WFI_COND(__c) do { \
+    bool done = false; \
+    do { \
+	GLOBAL_INT_DISABLE(); \
+	if (__c) { \
+	    done = true; \
+	} else { \
+	    WFI(); \
+	} \
+	GLOBAL_INT_RESTORE(); \
+    } while (!done); \
+} while(0)
+
+/**
+ * @brief Relax the running CPU thread, especially when spinning.
+ */
+#define YIELD() __ASM volatile ("yield")
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} LL
diff --git a/platform/atm2/ATM22xx-x1x/include/reg/CMSDK_CM0.h b/platform/atm2/ATM22xx-x1x/include/reg/CMSDK_CM0.h
new file mode 100644
index 0000000..988cdca
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/reg/CMSDK_CM0.h
@@ -0,0 +1,1343 @@
+/**************************************************************************//**
+ * @file     CMSDK_CM0.h
+ * @brief    CMSIS Cortex-M0 Core Peripheral Access Layer Header File for
+ *           Device CMSDK
+ * @version  V3.01
+ * @date     06. March 2012
+ *
+ * @note
+ * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
+ *
+ * @par
+ * ARM Limited (ARM) is supplying this software for use with Cortex-M
+ * processor based microcontrollers.  This file can be freely distributed
+ * within development tools that are supporting such ARM based processors.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+ * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+ * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+ * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+ *
+ ******************************************************************************/
+
+
+#ifndef CMSDK_H
+#define CMSDK_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/** @addtogroup CMSDK_Definitions CMSDK Definitions
+  This file defines all structures and symbols for CMSDK:
+    - registers and bitfields
+    - peripheral base address
+    - peripheral ID
+    - Peripheral definitions
+  @{
+*/
+
+
+/******************************************************************************/
+/*                Processor and Core Peripherals                              */
+/******************************************************************************/
+/** @addtogroup CMSDK_CMSIS Device CMSIS Definitions
+  Configuration of the Cortex-M0 Processor and Core Peripherals
+  @{
+*/
+
+/*
+ * ==========================================================================
+ * ---------- Interrupt Number Definition -----------------------------------
+ * ==========================================================================
+ */
+
+typedef enum IRQn
+{
+/******  Cortex-M0 Processor Exceptions Numbers ***************************************************/
+
+/* ToDo: use this Cortex interrupt numbers if your device is a CORTEX-M0 device                   */
+  NonMaskableInt_IRQn           = -14,      /*!<  2 Cortex-M0 Non Maskable Interrupt              */
+  HardFault_IRQn                = -13,      /*!<  3 Cortex-M0 Hard Fault Interrupt                */
+  SVCall_IRQn                   = -5,       /*!< 11 Cortex-M0 SV Call Interrupt                   */
+  PendSV_IRQn                   = -2,       /*!< 14 Cortex-M0 Pend SV Interrupt                   */
+  SysTick_IRQn                  = -1,       /*!< 15 Cortex-M0 System Tick Interrupt               */
+
+/******  CMSDK Specific Interrupt Numbers *********************************************************/
+  UARTRX0_IRQn                  = 0,       /*!< UART 0 RX Interrupt                               */
+  UARTTX0_IRQn                  = 1,       /*!< UART 0 TX Interrupt                               */
+  UARTRX1_IRQn                  = 2,       /*!< UART 1 RX Interrupt                               */
+  UARTTX1_IRQn                  = 3,       /*!< UART 1 TX Interrupt                               */
+  UARTRX2_IRQn                  = 4,       /*!< UART 2 RX Interrupt                               */
+  UARTTX2_IRQn                  = 5,       /*!< UART 2 TX Interrupt                               */
+  PORT0_ALL_IRQn                = 6,       /*!< Port 1 combined Interrupt                         */
+  PORT1_ALL_IRQn                = 7,       /*!< Port 1 combined Interrupt                         */
+  TIMER0_IRQn                   = 8,       /*!< TIMER 0 Interrupt                                 */
+  TIMER1_IRQn                   = 9,       /*!< TIMER 1 Interrupt                                 */
+  DUALTIMER_IRQn                = 10,      /*!< Dual Timer Interrupt                              */
+  SPI_IRQn                      = 11,      /*!< SPI Interrupt                                     */
+  UARTOVF0_IRQn                 = 12,      /*!< UART 0 Overflow Interrupt                         */
+  UARTOVF1_IRQn                 = 13,      /*!< UART 1 Overflow Interrupt                         */
+  UARTOVF2_IRQn                 = 14,      /*!< UART 2 Overflow Interrupt                         */
+  DMA_IRQn                      = 15,      /*!< PL230 DMA Done + Error Interrupt                  */
+  PORT0_0_IRQn                  = 16,      /*!< All P0 I/O pins can be used as interrupt source.  */
+  PORT0_1_IRQn                  = 17,      /*!< There are 16 pins in total                        */
+  PORT0_2_IRQn                  = 18,
+  PORT0_3_IRQn                  = 19,
+  PORT0_4_IRQn                  = 20,
+  PORT0_5_IRQn                  = 21,
+  PORT0_6_IRQn                  = 22,
+  PORT0_7_IRQn                  = 23,
+  PORT0_8_IRQn                  = 24,
+  PORT0_9_IRQn                  = 25,
+  PORT0_10_IRQn                 = 26,
+  PORT0_11_IRQn                 = 27,
+  PORT0_12_IRQn                 = 28,
+  PORT0_13_IRQn                 = 29,
+  PORT0_14_IRQn                 = 30,
+  PORT0_15_IRQn                 = 31,
+} IRQn_Type;
+
+
+/*
+ * ==========================================================================
+ * ----------- Processor and Core Peripheral Section ------------------------
+ * ==========================================================================
+ */
+
+/* Configuration of the Cortex-M0 Processor and Core Peripherals */
+#define __CM0_REV                 0x0000    /*!< Core Revision r0p0                               */
+#define __NVIC_PRIO_BITS          2         /*!< Number of Bits used for Priority Levels          */
+#define __Vendor_SysTickConfig    0         /*!< Set to 1 if different SysTick Config is used     */
+#define __MPU_PRESENT             0         /*!< MPU present or not                               */
+
+/*@}*/ /* end of group CMSDK_CMSIS */
+
+
+#include "core_cm0.h"                       /* Cortex-M0 processor and core peripherals           */
+#include "system_CMSDK_CM0.h"               /* CMSDK System include file                          */
+
+
+/******************************************************************************/
+/*                Device Specific Peripheral registers structures             */
+/******************************************************************************/
+/** @addtogroup CMSDK_Peripherals CMSDK Peripherals
+  CMSDK Device Specific Peripheral registers structures
+  @{
+*/
+
+#if defined ( __CC_ARM   )
+#pragma anon_unions
+#endif
+
+
+#include "base_addr.h"
+
+
+/*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/
+/** @addtogroup CMSDK_UART CMSDK Universal Asynchronous Receiver/Transmitter
+  memory mapped structure for CMSDK_UART
+  @{
+*/
+
+typedef struct
+{
+  __IO   uint32_t  DATA;          /*!< Offset: 0x000 Data Register    (R/W) */
+  __IO   uint32_t  STATE;         /*!< Offset: 0x004 Status Register  (R/W) */
+  __IO   uint32_t  CTRL;          /*!< Offset: 0x008 Control Register (R/W) */
+  union {
+    __I    uint32_t  INTSTATUS;   /*!< Offset: 0x00C Interrupt Status Register (R/ ) */
+    __O    uint32_t  INTCLEAR;    /*!< Offset: 0x00C Interrupt Clear Register ( /W) */
+    };
+  __IO   uint32_t  BAUDDIV;       /*!< Offset: 0x010 Baudrate Divider Register (R/W) */
+  __IO   uint32_t  RX_LWM;        /*!< Offset: 0x014 [4:0] RX FIFO low water mark(R/W); constraint 1<= RX_LWM <= 14*/
+  __IO   uint32_t  TX_LWM;        /*!< Offset: 0x018 [4:0] TX FIFO low water mark(R/W); constraint 1<= TX_LWM <= 16*/
+  __I    uint32_t  RX_FIFO_SPACES; /*!< Offset: 0x01C [4:0] RX FIFO availabale spaces;  */
+  __I    uint32_t  TX_FIFO_SPACES; /*!< Offset: 0x020 [4:0] TX FIFO availabale spaces;  */
+  __IO   uint32_t  HW_FLOW_OVRD;      /*!< Offset: 0x024 [3]: ncts_ovrd; [2]: ncts_val [1]: nrts_ovrd; [0]: nrts_val  */
+
+} CMSDK_UART_TypeDef;
+
+/* CMSDK_UART DATA Register Definitions */
+
+#define CMSDK_UART_DATA_Pos               0                                             /*!< CMSDK_UART_DATA_Pos: DATA Position */
+#define CMSDK_UART_DATA_Msk              (0xFFul << CMSDK_UART_DATA_Pos)                /*!< CMSDK_UART DATA: DATA Mask */
+
+#define CMSDK_UART_STATE_NCTS_Pos         5                                             /*!< CMSDK_UART STATE: NCTS Position */
+#define CMSDK_UART_STATE_NCTS_Msk         (0x1ul << CMSDK_UART_STATE_NCTS_Pos)          /*!< CMSDK_UART STATE: NCTS Mask */
+
+#define CMSDK_UART_STATE_NRTS_Pos         4                                             /*!< CMSDK_UART STATE: NRTS Position */
+#define CMSDK_UART_STATE_NRTS_Msk         (0x1ul << CMSDK_UART_STATE_NRTS_Pos)          /*!< CMSDK_UART STATE: NRTS Mask */
+
+#define CMSDK_UART_STATE_RXOR_Pos         3                                             /*!< CMSDK_UART STATE: RXOR Position */
+#define CMSDK_UART_STATE_RXOR_Msk         (0x1ul << CMSDK_UART_STATE_RXOR_Pos)          /*!< CMSDK_UART STATE: RXOR Mask */
+
+#define CMSDK_UART_STATE_TXOR_Pos         2                                             /*!< CMSDK_UART STATE: TXOR Position */
+#define CMSDK_UART_STATE_TXOR_Msk         (0x1ul << CMSDK_UART_STATE_TXOR_Pos)          /*!< CMSDK_UART STATE: TXOR Mask */
+
+#define CMSDK_UART_STATE_RXBF_Pos         1                                             /*!< CMSDK_UART STATE: RXBF Position */
+#define CMSDK_UART_STATE_RXBF_Msk         (0x1ul << CMSDK_UART_STATE_RXBF_Pos)          /*!< CMSDK_UART STATE: RXBF Mask */
+
+#define CMSDK_UART_STATE_TXBF_Pos         0                                             /*!< CMSDK_UART STATE: TXBF Position */
+#define CMSDK_UART_STATE_TXBF_Msk         (0x1ul << CMSDK_UART_STATE_TXBF_Pos )         /*!< CMSDK_UART STATE: TXBF Mask */
+
+#define CMSDK_UART_CTRL_HSTM_Pos          6                                             /*!< CMSDK_UART CTRL: HSTM Position */
+#define CMSDK_UART_CTRL_HSTM_Msk          (0x01ul << CMSDK_UART_CTRL_HSTM_Pos)          /*!< CMSDK_UART CTRL: HSTM Mask */
+
+#define CMSDK_UART_CTRL_RXORIRQEN_Pos     5                                             /*!< CMSDK_UART CTRL: RXORIRQEN Position */
+#define CMSDK_UART_CTRL_RXORIRQEN_Msk     (0x01ul << CMSDK_UART_CTRL_RXORIRQEN_Pos)     /*!< CMSDK_UART CTRL: RXORIRQEN Mask */
+
+#define CMSDK_UART_CTRL_TXORIRQEN_Pos     4                                             /*!< CMSDK_UART CTRL: TXORIRQEN Position */
+#define CMSDK_UART_CTRL_TXORIRQEN_Msk     (0x01ul << CMSDK_UART_CTRL_TXORIRQEN_Pos)     /*!< CMSDK_UART CTRL: TXORIRQEN Mask */
+
+#define CMSDK_UART_CTRL_RXIRQEN_Pos       3                                             /*!< CMSDK_UART CTRL: RXIRQEN Position */
+#define CMSDK_UART_CTRL_RXIRQEN_Msk       (0x01ul << CMSDK_UART_CTRL_RXIRQEN_Pos)       /*!< CMSDK_UART CTRL: RXIRQEN Mask */
+
+#define CMSDK_UART_CTRL_TXIRQEN_Pos       2                                             /*!< CMSDK_UART CTRL: TXIRQEN Position */
+#define CMSDK_UART_CTRL_TXIRQEN_Msk       (0x01ul << CMSDK_UART_CTRL_TXIRQEN_Pos)       /*!< CMSDK_UART CTRL: TXIRQEN Mask */
+
+#define CMSDK_UART_CTRL_RXEN_Pos          1                                             /*!< CMSDK_UART CTRL: RXEN Position */
+#define CMSDK_UART_CTRL_RXEN_Msk          (0x01ul << CMSDK_UART_CTRL_RXEN_Pos)          /*!< CMSDK_UART CTRL: RXEN Mask */
+
+#define CMSDK_UART_CTRL_TXEN_Pos          0                                             /*!< CMSDK_UART CTRL: TXEN Position */
+#define CMSDK_UART_CTRL_TXEN_Msk          (0x01ul << CMSDK_UART_CTRL_TXEN_Pos)          /*!< CMSDK_UART CTRL: TXEN Mask */
+
+#define CMSDK_UART_INTSTATUS_RXORIRQ_Pos  3                                             /*!< CMSDK_UART INTSTATUS: RXORIRQ Position */
+#define CMSDK_UART_INTSTATUS_RXORIRQ_Msk  (0x01ul << CMSDK_UART_INTSTATUS_RXORIRQ_Pos)  /*!< CMSDK_UART INTSTATUS: RXORIRQ Mask */
+
+#define CMSDK_UART_INTSTATUS_TXORIRQ_Pos  2                                             /*!< CMSDK_UART INTSTATUS: TXORIRQ Position */
+#define CMSDK_UART_INTSTATUS_TXORIRQ_Msk  (0x01ul << CMSDK_UART_INTSTATUS_TXORIRQ_Pos)  /*!< CMSDK_UART INTSTATUS: TXORIRQ Mask */
+
+#define CMSDK_UART_INTSTATUS_RXIRQ_Pos    1                                             /*!< CMSDK_UART INTSTATUS: RXIRQ Position */
+#define CMSDK_UART_INTSTATUS_RXIRQ_Msk    (0x01ul << CMSDK_UART_INTSTATUS_RXIRQ_Pos)    /*!< CMSDK_UART INTSTATUS: RXIRQ Mask */
+
+#define CMSDK_UART_INTSTATUS_TXIRQ_Pos    0                                             /*!< CMSDK_UART INTSTATUS: TXIRQ Position */
+#define CMSDK_UART_INTSTATUS_TXIRQ_Msk    (0x01ul << CMSDK_UART_INTSTATUS_TXIRQ_Pos)    /*!< CMSDK_UART INTSTATUS: TXIRQ Mask */
+
+#define CMSDK_UART_BAUDDIV_Pos            0                                             /*!< CMSDK_UART BAUDDIV: BAUDDIV Position */
+#define CMSDK_UART_BAUDDIV_Msk            (0xFFFFFul << CMSDK_UART_BAUDDIV_Pos)         /*!< CMSDK_UART BAUDDIV: BAUDDIV Mask */
+
+#define CMSDK_UART_RX_LWM_Pos             0                                             /*!< CMSDK_UART RX_LWM: RX_LMW Position */
+#define CMSDK_UART_RX_LWM_Msk             (0x1Ful << CMSDK_UART_RX_LWM_Pos)             /*!< CMSDK_UART RX_LWM: RX_LMW Mask */
+
+#define CMSDK_UART_TX_LWM_Pos             0                                             /*!< CMSDK_UART TX_LWM: TX_LMW Position */
+#define CMSDK_UART_TX_LWM_Msk             (0x1Ful << CMSDK_UART_TX_LWM_Pos)             /*!< CMSDK_UART TX_LWM: TX_LMW Mask */
+
+#define CMSDK_UART_RX_FIFO_SPACES_Pos     0                                             /*!< CMSDK_UART RX_FIFO_SPACES: RX_FIFO_SPACES Position */
+#define CMSDK_UART_RX_FIFO_SPACES_Msk     (0x1Ful << CMSDK_UART_RX_FIFO_SPACES_Pos)     /*!< CMSDK_UART RX_FIFO_SPACES: RX_FIFO_SPACES Mask */
+
+#define CMSDK_UART_TX_FIFO_SPACES_Pos     0                                             /*!< CMSDK_UART TX_FIFO_SPACES: TX_FIFO_SPACES Position */
+#define CMSDK_UART_TX_FIFO_SPACES_Msk     (0x1Ful << CMSDK_UART_TX_FIFO_SPACES_Pos)     /*!< CMSDK_UART TX_FIFO_SPACES: TX_FIFO_SPACES Mask */
+
+#define CMSDK_UART_HW_FLOW_OVRD_NCTS_OVRD_Pos 3                                                  /*!< CMSDK_UART HW_FLOW_OVRD: NCTS_OVRD Position */
+#define CMSDK_UART_HW_FLOW_OVRD_NCTS_OVRD_Msk (0x01ul << CMSDK_UART_HW_FLOW_OVRD_NCTS_OVRD_Pos)  /*!< CMSDK_UART HW_FLOW_OVRD: NCTS_OVRD Mask */
+
+#define CMSDK_UART_HW_FLOW_OVRD_NCTS_VAL_Pos 2                                                   /*!< CMSDK_UART HW_FLOW_OVRD: NCTS_VAL Position */
+#define CMSDK_UART_HW_FLOW_OVRD_NCTS_VAL_Msk (0x01ul << CMSDK_UART_HW_FLOW_OVRD_NCTS_VAL_Pos)    /*!< CMSDK_UART HW_FLOW_OVRD: NCTS_VAL Mask */
+
+#define CMSDK_UART_HW_FLOW_OVRD_NRTS_OVRD_Pos 1                                                  /*!< CMSDK_UART HW_FLOW_OVRD: NRTS_OVRD Position */
+#define CMSDK_UART_HW_FLOW_OVRD_NRTS_OVRD_Msk (0x01ul << CMSDK_UART_HW_FLOW_OVRD_NRTS_OVRD_Pos)  /*!< CMSDK_UART HW_FLOW_OVRD: NRTS_OVRD Mask */
+
+#define CMSDK_UART_HW_FLOW_OVRD_NRTS_VAL_Pos 0                                                   /*!< CMSDK_UART HW_FLOW_OVRD: NRTS_VAL Position */
+#define CMSDK_UART_HW_FLOW_OVRD_NRTS_VAL_Msk (0x01ul << CMSDK_UART_HW_FLOW_OVRD_NRTS_VAL_Pos)    /*!< CMSDK_UART HW_FLOW_OVRD: NRTS_VAL Mask */
+/*@}*/ /* end of group CMSDK_UART */
+
+
+/*----------------------------- Timer (TIMER) -------------------------------*/
+/** @addtogroup CMSDK_TIMER CMSDK Timer
+  @{
+*/
+typedef struct
+{
+  __IO   uint32_t  CTRL;          /*!< Offset: 0x000 Control Register (R/W) */
+  __IO   uint32_t  VALUE;         /*!< Offset: 0x004 Current Value Register (R/W) */
+  __IO   uint32_t  RELOAD;        /*!< Offset: 0x008 Reload Value Register  (R/W) */
+  union {
+    __I    uint32_t  INTSTATUS;   /*!< Offset: 0x00C Interrupt Status Register (R/ ) */
+    __O    uint32_t  INTCLEAR;    /*!< Offset: 0x00C Interrupt Clear Register ( /W) */
+    };
+
+} CMSDK_TIMER_TypeDef;
+
+/* CMSDK_TIMER CTRL Register Definitions */
+
+#define CMSDK_TIMER_CTRL_IRQEN_Pos          3                                              /*!< CMSDK_TIMER CTRL: IRQEN Position */
+#define CMSDK_TIMER_CTRL_IRQEN_Msk          (0x01ul << CMSDK_TIMER_CTRL_IRQEN_Pos)         /*!< CMSDK_TIMER CTRL: IRQEN Mask */
+
+#define CMSDK_TIMER_CTRL_SELEXTCLK_Pos      2                                              /*!< CMSDK_TIMER CTRL: SELEXTCLK Position */
+#define CMSDK_TIMER_CTRL_SELEXTCLK_Msk      (0x01ul << CMSDK_TIMER_CTRL_SELEXTCLK_Pos)     /*!< CMSDK_TIMER CTRL: SELEXTCLK Mask */
+
+#define CMSDK_TIMER_CTRL_SELEXTEN_Pos       1                                              /*!< CMSDK_TIMER CTRL: SELEXTEN Position */
+#define CMSDK_TIMER_CTRL_SELEXTEN_Msk       (0x01ul << CMSDK_TIMER_CTRL_SELEXTEN_Pos)      /*!< CMSDK_TIMER CTRL: SELEXTEN Mask */
+
+#define CMSDK_TIMER_CTRL_EN_Pos             0                                              /*!< CMSDK_TIMER CTRL: EN Position */
+#define CMSDK_TIMER_CTRL_EN_Msk             (0x01ul << CMSDK_TIMER_CTRL_EN_Pos)            /*!< CMSDK_TIMER CTRL: EN Mask */
+
+#define CMSDK_TIMER_VAL_CURRENT_Pos         0                                              /*!< CMSDK_TIMER VALUE: CURRENT Position */
+#define CMSDK_TIMER_VAL_CURRENT_Msk         (0xFFFFFFFFul << CMSDK_TIMER_VAL_CURRENT_Pos)  /*!< CMSDK_TIMER VALUE: CURRENT Mask */
+
+#define CMSDK_TIMER_RELOAD_VAL_Pos          0                                              /*!< CMSDK_TIMER RELOAD: RELOAD Position */
+#define CMSDK_TIMER_RELOAD_VAL_Msk          (0xFFFFFFFFul << CMSDK_TIMER_RELOAD_VAL_Pos)   /*!< CMSDK_TIMER RELOAD: RELOAD Mask */
+
+#define CMSDK_TIMER_INTSTATUS_Pos           0                                              /*!< CMSDK_TIMER INTSTATUS: INTSTATUSPosition */
+#define CMSDK_TIMER_INTSTATUS_Msk           (0x01ul << CMSDK_TIMER_INTSTATUS_Pos)          /*!< CMSDK_TIMER INTSTATUS: INTSTATUSMask */
+
+#define CMSDK_TIMER_INTCLEAR_Pos            0                                              /*!< CMSDK_TIMER INTCLEAR: INTCLEAR Position */
+#define CMSDK_TIMER_INTCLEAR_Msk            (0x01ul << CMSDK_TIMER_INTCLEAR_Pos)           /*!< CMSDK_TIMER INTCLEAR: INTCLEAR Mask */
+
+/*@}*/ /* end of group CMSDK_TIMER */
+
+
+/*------------- Timer (TIM) --------------------------------------------------*/
+// <g> Timer (TIM)
+
+/** @addtogroup CMSDK_DualTIMER CMSDK Dual Timer
+  @{
+*/
+
+typedef struct
+{
+  __IO uint32_t Timer1Load;   // <h> Timer 1 Load </h>
+  __I  uint32_t Timer1Value;  // <h> Timer 1 Counter Current Value <r></h>
+  __IO uint32_t Timer1Control;// <h> Timer 1 Control
+                              //   <o.7> TimerEn: Timer Enable
+                              //   <o.6> TimerMode: Timer Mode
+                              //     <0=> Freerunning-mode
+                              //     <1=> Periodic mode
+                              //   <o.5> IntEnable: Interrupt Enable
+                              //   <o.2..3> TimerPre: Timer Prescale
+                              //     <0=> / 1
+                              //     <1=> / 16
+                              //     <2=> / 256
+                              //     <3=> Undefined!
+                              //   <o.1> TimerSize: Timer Size
+                              //     <0=> 16-bit counter
+                              //     <1=> 32-bit counter
+                              //   <o.0> OneShot: One-shoot mode
+                              //     <0=> Wrapping mode
+                              //     <1=> One-shot mode
+                              // </h>
+  __O  uint32_t Timer1IntClr; // <h> Timer 1 Interrupt Clear <w></h>
+  __I  uint32_t Timer1RIS;    // <h> Timer 1 Raw Interrupt Status <r></h>
+  __I  uint32_t Timer1MIS;    // <h> Timer 1 Masked Interrupt Status <r></h>
+  __IO uint32_t Timer1BGLoad; // <h> Background Load Register </h>
+       uint32_t RESERVED0;
+  __IO uint32_t Timer2Load;   // <h> Timer 2 Load </h>
+  __I  uint32_t Timer2Value;  // <h> Timer 2 Counter Current Value <r></h>
+  __IO uint32_t Timer2Control;// <h> Timer 2 Control
+                              //   <o.7> TimerEn: Timer Enable
+                              //   <o.6> TimerMode: Timer Mode
+                              //     <0=> Freerunning-mode
+                              //     <1=> Periodic mode
+                              //   <o.5> IntEnable: Interrupt Enable
+                              //   <o.2..3> TimerPre: Timer Prescale
+                              //     <0=> / 1
+                              //     <1=> / 16
+                              //     <2=> / 256
+                              //     <3=> Undefined!
+                              //   <o.1> TimerSize: Timer Size
+                              //     <0=> 16-bit counter
+                              //     <1=> 32-bit counter
+                              //   <o.0> OneShot: One-shoot mode
+                              //     <0=> Wrapping mode
+                              //     <1=> One-shot mode
+                              // </h>
+  __O  uint32_t Timer2IntClr; // <h> Timer 2 Interrupt Clear <w></h>
+  __I  uint32_t Timer2RIS;    // <h> Timer 2 Raw Interrupt Status <r></h>
+  __I  uint32_t Timer2MIS;    // <h> Timer 2 Masked Interrupt Status <r></h>
+  __IO uint32_t Timer2BGLoad; // <h> Background Load Register </h>
+       uint32_t RESERVED1[945];
+  __IO uint32_t ITCR;         // <h> Integration Test Control Register </h>
+  __O  uint32_t ITOP;         // <h> Integration Test Output Set Register </h>
+} CMSDK_DUALTIMER_BOTH_TypeDef;
+
+#define CMSDK_DUALTIMER1_LOAD_Pos            0                                                /*!< CMSDK_DUALTIMER1 LOAD: LOAD Position */
+#define CMSDK_DUALTIMER1_LOAD_Msk            (0xFFFFFFFFul << CMSDK_DUALTIMER1_LOAD_Pos)      /*!< CMSDK_DUALTIMER1 LOAD: LOAD Mask */
+
+#define CMSDK_DUALTIMER1_VALUE_Pos           0                                                /*!< CMSDK_DUALTIMER1 VALUE: VALUE Position */
+#define CMSDK_DUALTIMER1_VALUE_Msk           (0xFFFFFFFFul << CMSDK_DUALTIMER1_VALUE_Pos)     /*!< CMSDK_DUALTIMER1 VALUE: VALUE Mask */
+
+#define CMSDK_DUALTIMER1_CTRL_EN_Pos         7                                                /*!< CMSDK_DUALTIMER1 CTRL_EN: CTRL Enable Position */
+#define CMSDK_DUALTIMER1_CTRL_EN_Msk         (0x1ul << CMSDK_DUALTIMER1_CTRL_EN_Pos)          /*!< CMSDK_DUALTIMER1 CTRL_EN: CTRL Enable Mask */
+
+#define CMSDK_DUALTIMER1_CTRL_MODE_Pos       6                                                /*!< CMSDK_DUALTIMER1 CTRL_MODE: CTRL MODE Position */
+#define CMSDK_DUALTIMER1_CTRL_MODE_Msk       (0x1ul << CMSDK_DUALTIMER1_CTRL_MODE_Pos)        /*!< CMSDK_DUALTIMER1 CTRL_MODE: CTRL MODE Mask */
+
+#define CMSDK_DUALTIMER1_CTRL_INTEN_Pos      5                                                /*!< CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Position */
+#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk      (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos)       /*!< CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */
+
+#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos   2                                                /*!< CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */
+#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk   (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos)    /*!< CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
+
+#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos       1                                                /*!< CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */
+#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk       (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos)        /*!< CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */
+
+#define CMSDK_DUALTIMER1_CTRL_ONESHOOT_Pos   0                                                /*!< CMSDK_DUALTIMER1 CTRL_ONESHOOT: CTRL ONESHOOT Position */
+#define CMSDK_DUALTIMER1_CTRL_ONESHOOT_Msk   (0x1ul << CMSDK_DUALTIMER1_CTRL_ONESHOOT_Pos)    /*!< CMSDK_DUALTIMER1 CTRL_ONESHOOT: CTRL ONESHOOT Mask */
+
+#define CMSDK_DUALTIMER1_INTCLR_Pos          0                                                /*!< CMSDK_DUALTIMER1 INTCLR: INT Clear Position */
+#define CMSDK_DUALTIMER1_INTCLR_Msk          (0x1ul << CMSDK_DUALTIMER1_INTCLR_Pos)           /*!< CMSDK_DUALTIMER1 INTCLR: INT Clear  Mask */
+
+#define CMSDK_DUALTIMER1_RAWINTSTAT_Pos      0                                                /*!< CMSDK_DUALTIMER1 RAWINTSTAT: Raw Int Status Position */
+#define CMSDK_DUALTIMER1_RAWINTSTAT_Msk      (0x1ul << CMSDK_DUALTIMER1_RAWINTSTAT_Pos)       /*!< CMSDK_DUALTIMER1 RAWINTSTAT: Raw Int Status Mask */
+
+#define CMSDK_DUALTIMER1_MASKINTSTAT_Pos     0                                                /*!< CMSDK_DUALTIMER1 MASKINTSTAT: Mask Int Status Position */
+#define CMSDK_DUALTIMER1_MASKINTSTAT_Msk     (0x1ul << CMSDK_DUALTIMER1_MASKINTSTAT_Pos)      /*!< CMSDK_DUALTIMER1 MASKINTSTAT: Mask Int Status Mask */
+
+#define CMSDK_DUALTIMER1_BGLOAD_Pos          0                                                /*!< CMSDK_DUALTIMER1 BGLOAD: Background Load Position */
+#define CMSDK_DUALTIMER1_BGLOAD_Msk          (0xFFFFFFFFul << CMSDK_DUALTIMER1_BGLOAD_Pos)    /*!< CMSDK_DUALTIMER1 BGLOAD: Background Load Mask */
+
+#define CMSDK_DUALTIMER2_LOAD_Pos            0                                                /*!< CMSDK_DUALTIMER2 LOAD: LOAD Position */
+#define CMSDK_DUALTIMER2_LOAD_Msk            (0xFFFFFFFFul << CMSDK_DUALTIMER2_LOAD_Pos)      /*!< CMSDK_DUALTIMER2 LOAD: LOAD Mask */
+
+#define CMSDK_DUALTIMER2_VALUE_Pos           0                                                /*!< CMSDK_DUALTIMER2 VALUE: VALUE Position */
+#define CMSDK_DUALTIMER2_VALUE_Msk           (0xFFFFFFFFul << CMSDK_DUALTIMER2_VALUE_Pos)     /*!< CMSDK_DUALTIMER2 VALUE: VALUE Mask */
+
+#define CMSDK_DUALTIMER2_CTRL_EN_Pos         7                                                /*!< CMSDK_DUALTIMER2 CTRL_EN: CTRL Enable Position */
+#define CMSDK_DUALTIMER2_CTRL_EN_Msk         (0x1ul << CMSDK_DUALTIMER2_CTRL_EN_Pos)          /*!< CMSDK_DUALTIMER2 CTRL_EN: CTRL Enable Mask */
+
+#define CMSDK_DUALTIMER2_CTRL_MODE_Pos       6                                                /*!< CMSDK_DUALTIMER2 CTRL_MODE: CTRL MODE Position */
+#define CMSDK_DUALTIMER2_CTRL_MODE_Msk       (0x1ul << CMSDK_DUALTIMER2_CTRL_MODE_Pos)        /*!< CMSDK_DUALTIMER2 CTRL_MODE: CTRL MODE Mask */
+
+#define CMSDK_DUALTIMER2_CTRL_INTEN_Pos      5                                                /*!< CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Position */
+#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk      (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos)       /*!< CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */
+
+#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos   2                                                /*!< CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */
+#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk   (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos)    /*!< CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
+
+#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos       1                                                /*!< CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */
+#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk       (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos)        /*!< CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */
+
+#define CMSDK_DUALTIMER2_CTRL_ONESHOOT_Pos   0                                                /*!< CMSDK_DUALTIMER2 CTRL_ONESHOOT: CTRL ONESHOOT Position */
+#define CMSDK_DUALTIMER2_CTRL_ONESHOOT_Msk   (0x1ul << CMSDK_DUALTIMER2_CTRL_ONESHOOT_Pos)    /*!< CMSDK_DUALTIMER2 CTRL_ONESHOOT: CTRL ONESHOOT Mask */
+
+#define CMSDK_DUALTIMER2_INTCLR_Pos          0                                                /*!< CMSDK_DUALTIMER2 INTCLR: INT Clear Position */
+#define CMSDK_DUALTIMER2_INTCLR_Msk          (0x1ul << CMSDK_DUALTIMER2_INTCLR_Pos)           /*!< CMSDK_DUALTIMER2 INTCLR: INT Clear  Mask */
+
+#define CMSDK_DUALTIMER2_RAWINTSTAT_Pos      0                                                /*!< CMSDK_DUALTIMER2 RAWINTSTAT: Raw Int Status Position */
+#define CMSDK_DUALTIMER2_RAWINTSTAT_Msk      (0x1ul << CMSDK_DUALTIMER2_RAWINTSTAT_Pos)       /*!< CMSDK_DUALTIMER2 RAWINTSTAT: Raw Int Status Mask */
+
+#define CMSDK_DUALTIMER2_MASKINTSTAT_Pos     0                                                /*!< CMSDK_DUALTIMER2 MASKINTSTAT: Mask Int Status Position */
+#define CMSDK_DUALTIMER2_MASKINTSTAT_Msk     (0x1ul << CMSDK_DUALTIMER2_MASKINTSTAT_Pos)      /*!< CMSDK_DUALTIMER2 MASKINTSTAT: Mask Int Status Mask */
+
+#define CMSDK_DUALTIMER2_BGLOAD_Pos          0                                                /*!< CMSDK_DUALTIMER2 BGLOAD: Background Load Position */
+#define CMSDK_DUALTIMER2_BGLOAD_Msk          (0xFFFFFFFFul << CMSDK_DUALTIMER2_BGLOAD_Pos)    /*!< CMSDK_DUALTIMER2 BGLOAD: Background Load Mask */
+
+
+typedef struct
+{
+  __IO uint32_t TimerLoad;    // <h> Timer Load </h>
+  __I  uint32_t TimerValue;   // <h> Timer Counter Current Value <r></h>
+  __IO uint32_t TimerControl; // <h> Timer Control
+                              //   <o.7> TimerEn: Timer Enable
+                              //   <o.6> TimerMode: Timer Mode
+                              //     <0=> Freerunning-mode
+                              //     <1=> Periodic mode
+                              //   <o.5> IntEnable: Interrupt Enable
+                              //   <o.2..3> TimerPre: Timer Prescale
+                              //     <0=> / 1
+                              //     <1=> / 16
+                              //     <2=> / 256
+                              //     <3=> Undefined!
+                              //   <o.1> TimerSize: Timer Size
+                              //     <0=> 16-bit counter
+                              //     <1=> 32-bit counter
+                              //   <o.0> OneShot: One-shoot mode
+                              //     <0=> Wrapping mode
+                              //     <1=> One-shot mode
+                              // </h>
+  __O  uint32_t TimerIntClr;  // <h> Timer Interrupt Clear <w></h>
+  __I  uint32_t TimerRIS;     // <h> Timer Raw Interrupt Status <r></h>
+  __I  uint32_t TimerMIS;     // <h> Timer Masked Interrupt Status <r></h>
+  __IO uint32_t TimerBGLoad;  // <h> Background Load Register </h>
+} CMSDK_DUALTIMER_SINGLE_TypeDef;
+
+#define CMSDK_DUALTIMER_LOAD_Pos             0                                               /*!< CMSDK_DUALTIMER LOAD: LOAD Position */
+#define CMSDK_DUALTIMER_LOAD_Msk             (0xFFFFFFFFul << CMSDK_DUALTIMER_LOAD_Pos)      /*!< CMSDK_DUALTIMER LOAD: LOAD Mask */
+
+#define CMSDK_DUALTIMER_VALUE_Pos            0                                               /*!< CMSDK_DUALTIMER VALUE: VALUE Position */
+#define CMSDK_DUALTIMER_VALUE_Msk            (0xFFFFFFFFul << CMSDK_DUALTIMER_VALUE_Pos)     /*!< CMSDK_DUALTIMER VALUE: VALUE Mask */
+
+#define CMSDK_DUALTIMER_CTRL_EN_Pos          7                                               /*!< CMSDK_DUALTIMER CTRL_EN: CTRL Enable Position */
+#define CMSDK_DUALTIMER_CTRL_EN_Msk          (0x1ul << CMSDK_DUALTIMER_CTRL_EN_Pos)          /*!< CMSDK_DUALTIMER CTRL_EN: CTRL Enable Mask */
+
+#define CMSDK_DUALTIMER_CTRL_MODE_Pos        6                                               /*!< CMSDK_DUALTIMER CTRL_MODE: CTRL MODE Position */
+#define CMSDK_DUALTIMER_CTRL_MODE_Msk        (0x1ul << CMSDK_DUALTIMER_CTRL_MODE_Pos)        /*!< CMSDK_DUALTIMER CTRL_MODE: CTRL MODE Mask */
+
+#define CMSDK_DUALTIMER_CTRL_INTEN_Pos       5                                               /*!< CMSDK_DUALTIMER CTRL_INTEN: CTRL Int Enable Position */
+#define CMSDK_DUALTIMER_CTRL_INTEN_Msk       (0x1ul << CMSDK_DUALTIMER_CTRL_INTEN_Pos)       /*!< CMSDK_DUALTIMER CTRL_INTEN: CTRL Int Enable Mask */
+
+#define CMSDK_DUALTIMER_CTRL_PRESCALE_Pos    2                                               /*!< CMSDK_DUALTIMER CTRL_PRESCALE: CTRL PRESCALE Position */
+#define CMSDK_DUALTIMER_CTRL_PRESCALE_Msk    (0x3ul << CMSDK_DUALTIMER_CTRL_PRESCALE_Pos)    /*!< CMSDK_DUALTIMER CTRL_PRESCALE: CTRL PRESCALE Mask */
+
+#define CMSDK_DUALTIMER_CTRL_SIZE_Pos        1                                               /*!< CMSDK_DUALTIMER CTRL_SIZE: CTRL SIZE Position */
+#define CMSDK_DUALTIMER_CTRL_SIZE_Msk        (0x1ul << CMSDK_DUALTIMER_CTRL_SIZE_Pos)        /*!< CMSDK_DUALTIMER CTRL_SIZE: CTRL SIZE Mask */
+
+#define CMSDK_DUALTIMER_CTRL_ONESHOOT_Pos    0                                               /*!< CMSDK_DUALTIMER CTRL_ONESHOOT: CTRL ONESHOOT Position */
+#define CMSDK_DUALTIMER_CTRL_ONESHOOT_Msk    (0x1ul << CMSDK_DUALTIMER_CTRL_ONESHOOT_Pos)    /*!< CMSDK_DUALTIMER CTRL_ONESHOOT: CTRL ONESHOOT Mask */
+
+#define CMSDK_DUALTIMER_INTCLR_Pos           0                                               /*!< CMSDK_DUALTIMER INTCLR: INT Clear Position */
+#define CMSDK_DUALTIMER_INTCLR_Msk           (0x1ul << CMSDK_DUALTIMER_INTCLR_Pos)           /*!< CMSDK_DUALTIMER INTCLR: INT Clear  Mask */
+
+#define CMSDK_DUALTIMER_RAWINTSTAT_Pos       0                                               /*!< CMSDK_DUALTIMER RAWINTSTAT: Raw Int Status Position */
+#define CMSDK_DUALTIMER_RAWINTSTAT_Msk       (0x1ul << CMSDK_DUALTIMER_RAWINTSTAT_Pos)       /*!< CMSDK_DUALTIMER RAWINTSTAT: Raw Int Status Mask */
+
+#define CMSDK_DUALTIMER_MASKINTSTAT_Pos      0                                               /*!< CMSDK_DUALTIMER MASKINTSTAT: Mask Int Status Position */
+#define CMSDK_DUALTIMER_MASKINTSTAT_Msk      (0x1ul << CMSDK_DUALTIMER_MASKINTSTAT_Pos)      /*!< CMSDK_DUALTIMER MASKINTSTAT: Mask Int Status Mask */
+
+#define CMSDK_DUALTIMER_BGLOAD_Pos           0                                               /*!< CMSDK_DUALTIMER BGLOAD: Background Load Position */
+#define CMSDK_DUALTIMER_BGLOAD_Msk           (0xFFFFFFFFul << CMSDK_DUALTIMER_BGLOAD_Pos)    /*!< CMSDK_DUALTIMER BGLOAD: Background Load Mask */
+
+/*@}*/ /* end of group CMSDK_DualTIMER */
+
+
+/*-------------------- General Purpose Input Output (GPIO) -------------------*/
+
+/** @addtogroup CMSDK_GPIO CMSDK GPIO
+  @{
+*/
+typedef struct
+{
+  __IO   uint32_t  DATA;             /*!< Offset: 0x000 DATA Register (R/W) */
+  __IO   uint32_t  DATAOUT;          /*!< Offset: 0x004 Data Output Latch Register (R/W) */
+  __IO   uint32_t  PULLUP_ENABLE_SET;/*!< Offset: 0x008 PU Enable Set Register  (R/W) */
+  __IO   uint32_t  PULLUP_ENABLE_CLR;/*!< Offset: 0x00C PU Enable clear Register  (R/W) */
+  __IO   uint32_t  INENABLE_SET;     /*!< Offset: 0x010 Input  Enable Set Register  (R/W) */
+  __IO   uint32_t  INENABLE_CLR;     /*!< Offset: 0x014 Input  Enable clear Register  (R/W) */
+  __IO   uint32_t  OUTENABLESET;     /*!< Offset: 0x018 Output Enable Set Register  (R/W) */
+  __IO   uint32_t  OUTENABLECLR;     /*!< Offset: 0x01C Output Enable Clear Register  (R/W) */
+  __IO   uint32_t  ALTFUNCSET;       /*!< Offset: 0x020 Alternate Function Set Register  (R/W) */
+  __IO   uint32_t  ALTFUNCCLR;       /*!< Offset: 0x024 Alternate Function Clear Register  (R/W) */
+  __IO   uint32_t  INTENSET;         /*!< Offset: 0x028 Interrupt Enable Set Register  (R/W) */
+  __IO   uint32_t  INTENCLR;         /*!< Offset: 0x02C Interrupt Enable Clear Register  (R/W) */
+  __IO   uint32_t  INTTYPESET;       /*!< Offset: 0x030 Interrupt Type Set Register  (R/W) */
+  __IO   uint32_t  INTTYPECLR;       /*!< Offset: 0x034 Interrupt Type Clear Register  (R/W) */
+  __IO   uint32_t  INTPOLSET;        /*!< Offset: 0x038 Interrupt Polarity Set Register  (R/W) */
+  __IO   uint32_t  INTPOLCLR;        /*!< Offset: 0x03C Interrupt Polarity Clear Register  (R/W) */
+  union {
+    __I    uint32_t  INTSTATUS;      /*!< Offset: 0x040 Interrupt Status Register (R/ ) */
+    __O    uint32_t  INTCLEAR;       /*!< Offset: 0x040 Interrupt Clear Register ( /W) */
+    };
+         uint32_t RESERVED1[239];
+  __IO   uint32_t LB_MASKED[256];    /*!< Offset: 0x400 - 0x7FC Lower byte Masked Access Register (R/W) */
+  __IO   uint32_t UB_MASKED[256];    /*!< Offset: 0x800 - 0xBFC Upper byte Masked Access Register (R/W) */
+} CMSDK_GPIO_TypeDef;
+
+#define CMSDK_GPIO_DATA_Pos            0                                          /*!< CMSDK_GPIO DATA: DATA Position */
+#define CMSDK_GPIO_DATA_Msk            (0xFFFFul << CMSDK_GPIO_DATA_Pos)          /*!< CMSDK_GPIO DATA: DATA Mask */
+
+#define CMSDK_GPIO_DATAOUT_Pos         0                                          /*!< CMSDK_GPIO DATAOUT: DATAOUT Position */
+#define CMSDK_GPIO_DATAOUT_Msk         (0xFFFFul << CMSDK_GPIO_DATAOUT_Pos)       /*!< CMSDK_GPIO DATAOUT: DATAOUT Mask */
+
+#define CMSDK_GPIO_OUTENSET_Pos        0                                          /*!< CMSDK_GPIO OUTEN: OUTEN Position */
+#define CMSDK_GPIO_OUTENSET_Msk        (0xFFFFul << CMSDK_GPIO_OUTEN_Pos)         /*!< CMSDK_GPIO OUTEN: OUTEN Mask */
+
+#define CMSDK_GPIO_OUTENCLR_Pos        0                                          /*!< CMSDK_GPIO OUTEN: OUTEN Position */
+#define CMSDK_GPIO_OUTENCLR_Msk        (0xFFFFul << CMSDK_GPIO_OUTEN_Pos)         /*!< CMSDK_GPIO OUTEN: OUTEN Mask */
+
+#define CMSDK_GPIO_ALTFUNCSET_Pos      0                                          /*!< CMSDK_GPIO ALTFUNC: ALTFUNC Position */
+#define CMSDK_GPIO_ALTFUNCSET_Msk      (0xFFFFul << CMSDK_GPIO_ALTFUNC_Pos)       /*!< CMSDK_GPIO ALTFUNC: ALTFUNC Mask */
+
+#define CMSDK_GPIO_ALTFUNCCLR_Pos      0                                          /*!< CMSDK_GPIO ALTFUNC: ALTFUNC Position */
+#define CMSDK_GPIO_ALTFUNCCLR_Msk      (0xFFFFul << CMSDK_GPIO_ALTFUNC_Pos)       /*!< CMSDK_GPIO ALTFUNC: ALTFUNC Mask */
+
+#define CMSDK_GPIO_INTENSET_Pos        0                                          /*!< CMSDK_GPIO INTEN: INTEN Position */
+#define CMSDK_GPIO_INTENSET_Msk        (0xFFFFul << CMSDK_GPIO_INTEN_Pos)         /*!< CMSDK_GPIO INTEN: INTEN Mask */
+
+#define CMSDK_GPIO_INTENCLR_Pos        0                                          /*!< CMSDK_GPIO INTEN: INTEN Position */
+#define CMSDK_GPIO_INTENCLR_Msk        (0xFFFFul << CMSDK_GPIO_INTEN_Pos)         /*!< CMSDK_GPIO INTEN: INTEN Mask */
+
+#define CMSDK_GPIO_INTTYPESET_Pos      0                                          /*!< CMSDK_GPIO INTTYPE: INTTYPE Position */
+#define CMSDK_GPIO_INTTYPESET_Msk      (0xFFFFul << CMSDK_GPIO_INTTYPE_Pos)       /*!< CMSDK_GPIO INTTYPE: INTTYPE Mask */
+
+#define CMSDK_GPIO_INTTYPECLR_Pos      0                                          /*!< CMSDK_GPIO INTTYPE: INTTYPE Position */
+#define CMSDK_GPIO_INTTYPECLR_Msk      (0xFFFFul << CMSDK_GPIO_INTTYPE_Pos)       /*!< CMSDK_GPIO INTTYPE: INTTYPE Mask */
+
+#define CMSDK_GPIO_INTPOLSET_Pos       0                                          /*!< CMSDK_GPIO INTPOL: INTPOL Position */
+#define CMSDK_GPIO_INTPOLSET_Msk       (0xFFFFul << CMSDK_GPIO_INTPOL_Pos)        /*!< CMSDK_GPIO INTPOL: INTPOL Mask */
+
+#define CMSDK_GPIO_INTPOLCLR_Pos       0                                          /*!< CMSDK_GPIO INTPOL: INTPOL Position */
+#define CMSDK_GPIO_INTPOLCLR_Msk       (0xFFFFul << CMSDK_GPIO_INTPOL_Pos)        /*!< CMSDK_GPIO INTPOL: INTPOL Mask */
+
+#define CMSDK_GPIO_INTSTATUS_Pos       0                                          /*!< CMSDK_GPIO INTSTATUS: INTSTATUS Position */
+#define CMSDK_GPIO_INTSTATUS_Msk       (0xFFul << CMSDK_GPIO_INTSTATUS_Pos)       /*!< CMSDK_GPIO INTSTATUS: INTSTATUS Mask */
+
+#define CMSDK_GPIO_INTCLEAR_Pos        0                                          /*!< CMSDK_GPIO INTCLEAR: INTCLEAR Position */
+#define CMSDK_GPIO_INTCLEAR_Msk        (0xFFul << CMSDK_GPIO_INTCLEAR_Pos)        /*!< CMSDK_GPIO INTCLEAR: INTCLEAR Mask */
+
+#define CMSDK_GPIO_MASKLOWBYTE_Pos     0                                          /*!< CMSDK_GPIO MASKLOWBYTE: MASKLOWBYTE Position */
+#define CMSDK_GPIO_MASKLOWBYTE_Msk     (0x00FFul << CMSDK_GPIO_MASKLOWBYTE_Pos)   /*!< CMSDK_GPIO MASKLOWBYTE: MASKLOWBYTE Mask */
+
+#define CMSDK_GPIO_MASKHIGHBYTE_Pos    0                                          /*!< CMSDK_GPIO MASKHIGHBYTE: MASKHIGHBYTE Position */
+#define CMSDK_GPIO_MASKHIGHBYTE_Msk    (0xFF00ul << CMSDK_GPIO_MASKHIGHBYTE_Pos)  /*!< CMSDK_GPIO MASKHIGHBYTE: MASKHIGHBYTE Mask */
+
+/*@}*/ /* end of group CMSDK_GPIO */
+
+
+/*------------- System Control (SYSCON) --------------------------------------*/
+/** @addtogroup CMSDK_SYSCON CMSDK System Control
+  @{
+*/
+typedef struct
+{
+  __IO   uint32_t  REMAP;          /*!< Offset: 0x000 Remap Control Register (R/W) */
+  __IO   uint32_t  PMUCTRL;        /*!< Offset: 0x004 PMU Control Register (R/W) */
+  __IO   uint32_t  RESETOP;        /*!< Offset: 0x008 Reset Option Register  (R/W) */
+  __IO   uint32_t  EMICTRL;        /*!< Offset: 0x00C EMI Control Register  (R/W) */
+  __IO   uint32_t  RSTINFO;        /*!< Offset: 0x010 Reset Information Register (R/W) */
+} CMSDK_SYSCON_TypeDef;
+
+#define CMSDK_SYSCON_REMAP_Pos                 0
+#define CMSDK_SYSCON_REMAP_Msk                 (0x01ul << CMSDK_SYSCON_REMAP_Pos)               /*!< CMSDK_SYSCON MEME_CTRL: REMAP Mask */
+
+#define CMSDK_SYSCON_PMUCTRL_EN_Pos            0
+#define CMSDK_SYSCON_PMUCTRL_EN_Msk            (0x01ul << CMSDK_SYSCON_PMUCTRL_EN_Pos)          /*!< CMSDK_SYSCON PMUCTRL: PMUCTRL ENABLE Mask */
+
+#define CMSDK_SYSCON_LOCKUPRST_RESETOP_Pos     0
+#define CMSDK_SYSCON_LOCKUPRST_RESETOP_Msk     (0x01ul << CMSDK_SYSCON_LOCKUPRST_RESETOP_Pos)   /*!< CMSDK_SYSCON SYS_CTRL: LOCKUP RESET ENABLE Mask */
+
+#define CMSDK_SYSCON_EMICTRL_SIZE_Pos          24
+#define CMSDK_SYSCON_EMICTRL_SIZE_Msk          (0x00001ul << CMSDK_SYSCON_EMICTRL_SIZE_Pos)     /*!< CMSDK_SYSCON EMICTRL: SIZE Mask */
+
+#define CMSDK_SYSCON_EMICTRL_TACYC_Pos         16
+#define CMSDK_SYSCON_EMICTRL_TACYC_Msk         (0x00007ul << CMSDK_SYSCON_EMICTRL_TACYC_Pos)    /*!< CMSDK_SYSCON EMICTRL: TURNAROUNDCYCLE Mask */
+
+#define CMSDK_SYSCON_EMICTRL_WCYC_Pos          8
+#define CMSDK_SYSCON_EMICTRL_WCYC_Msk          (0x00003ul << CMSDK_SYSCON_EMICTRL_WCYC_Pos)     /*!< CMSDK_SYSCON EMICTRL: WRITECYCLE Mask */
+
+#define CMSDK_SYSCON_EMICTRL_RCYC_Pos          0
+#define CMSDK_SYSCON_EMICTRL_RCYC_Msk          (0x00007ul << CMSDK_SYSCON_EMICTRL_RCYC_Pos)     /*!< CMSDK_SYSCON EMICTRL: READCYCLE Mask */
+
+#define CMSDK_SYSCON_RSTINFO_SYSRESETREQ_Pos   0
+#define CMSDK_SYSCON_RSTINFO_SYSRESETREQ_Msk   (0x00001ul << CMSDK_SYSCON_RSTINFO_SYSRESETREQ_Pos) /*!< CMSDK_SYSCON RSTINFO: SYSRESETREQ Mask */
+
+#define CMSDK_SYSCON_RSTINFO_WDOGRESETREQ_Pos  1
+#define CMSDK_SYSCON_RSTINFO_WDOGRESETREQ_Msk  (0x00001ul << CMSDK_SYSCON_RSTINFO_WDOGRESETREQ_Pos) /*!< CMSDK_SYSCON RSTINFO: WDOGRESETREQ Mask */
+
+#define CMSDK_SYSCON_RSTINFO_LOCKUPRESET_Pos   2
+#define CMSDK_SYSCON_RSTINFO_LOCKUPRESET_Msk   (0x00001ul << CMSDK_SYSCON_RSTINFO_LOCKUPRESET_Pos) /*!< CMSDK_SYSCON RSTINFO: LOCKUPRESET Mask */
+
+/*@}*/ /* end of group CMSDK_SYSCON */
+
+/*------------- PL230 uDMA (PL230) --------------------------------------*/
+/** @addtogroup CMSDK_PL230 CMSDK uDMA controller
+  @{
+*/
+typedef struct
+{
+  __I    uint32_t  DMA_STATUS;           /*!< Offset: 0x000 DMA status Register (R/W) */
+  __O    uint32_t  DMA_CFG;              /*!< Offset: 0x004 DMA configuration Register ( /W) */
+  __IO   uint32_t  CTRL_BASE_PTR;        /*!< Offset: 0x008 Channel Control Data Base Pointer Register  (R/W) */
+  __I    uint32_t  ALT_CTRL_BASE_PTR;    /*!< Offset: 0x00C Channel Alternate Control Data Base Pointer Register  (R/ ) */
+  __I    uint32_t  DMA_WAITONREQ_STATUS; /*!< Offset: 0x010 Channel Wait On Request Status Register  (R/ ) */
+  __O    uint32_t  CHNL_SW_REQUEST;      /*!< Offset: 0x014 Channel Software Request Register  ( /W) */
+  __IO   uint32_t  CHNL_USEBURST_SET;    /*!< Offset: 0x018 Channel UseBurst Set Register  (R/W) */
+  __O    uint32_t  CHNL_USEBURST_CLR;    /*!< Offset: 0x01C Channel UseBurst Clear Register  ( /W) */
+  __IO   uint32_t  CHNL_REQ_MASK_SET;    /*!< Offset: 0x020 Channel Request Mask Set Register  (R/W) */
+  __O    uint32_t  CHNL_REQ_MASK_CLR;    /*!< Offset: 0x024 Channel Request Mask Clear Register  ( /W) */
+  __IO   uint32_t  CHNL_ENABLE_SET;      /*!< Offset: 0x028 Channel Enable Set Register  (R/W) */
+  __O    uint32_t  CHNL_ENABLE_CLR;      /*!< Offset: 0x02C Channel Enable Clear Register  ( /W) */
+  __IO   uint32_t  CHNL_PRI_ALT_SET;     /*!< Offset: 0x030 Channel Primary-Alterante Set Register  (R/W) */
+  __O    uint32_t  CHNL_PRI_ALT_CLR;     /*!< Offset: 0x034 Channel Primary-Alterante Clear Register  ( /W) */
+  __IO   uint32_t  CHNL_PRIORITY_SET;    /*!< Offset: 0x038 Channel Priority Set Register  (R/W) */
+  __O    uint32_t  CHNL_PRIORITY_CLR;    /*!< Offset: 0x03C Channel Priority Clear Register  ( /W) */
+         uint32_t  RESERVED0[3];
+  __IO   uint32_t  ERR_CLR;              /*!< Offset: 0x04C Bus Error Clear Register  (R/W) */
+
+} CMSDK_PL230_TypeDef;
+
+#define PL230_DMA_CHNL_BITS 0
+
+#define CMSDK_PL230_DMA_STATUS_MSTREN_Pos          0                                                          /*!< CMSDK_PL230 DMA STATUS: MSTREN Position */
+#define CMSDK_PL230_DMA_STATUS_MSTREN_Msk          (0x00000001ul << CMSDK_PL230_DMA_STATUS_MSTREN_Pos)        /*!< CMSDK_PL230 DMA STATUS: MSTREN Mask */
+
+#define CMSDK_PL230_DMA_STATUS_STATE_Pos           0                                                          /*!< CMSDK_PL230 DMA STATUS: STATE Position */
+#define CMSDK_PL230_DMA_STATUS_STATE_Msk           (0x0000000Ful << CMSDK_PL230_DMA_STATUS_STATE_Pos)         /*!< CMSDK_PL230 DMA STATUS: STATE Mask */
+
+#define CMSDK_PL230_DMA_STATUS_CHNLS_MINUS1_Pos    0                                                          /*!< CMSDK_PL230 DMA STATUS: CHNLS_MINUS1 Position */
+#define CMSDK_PL230_DMA_STATUS_CHNLS_MINUS1_Msk    (0x0000001Ful << CMSDK_PL230_DMA_STATUS_CHNLS_MINUS1_Pos)  /*!< CMSDK_PL230 DMA STATUS: CHNLS_MINUS1 Mask */
+
+#define CMSDK_PL230_DMA_STATUS_TEST_STATUS_Pos     0                                                          /*!< CMSDK_PL230 DMA STATUS: TEST_STATUS Position */
+#define CMSDK_PL230_DMA_STATUS_TEST_STATUS_Msk     (0x00000001ul << CMSDK_PL230_DMA_STATUS_TEST_STATUS_Pos)   /*!< CMSDK_PL230 DMA STATUS: TEST_STATUS Mask */
+
+#define CMSDK_PL230_DMA_CFG_MSTREN_Pos             0                                                          /*!< CMSDK_PL230 DMA CFG: MSTREN Position */
+#define CMSDK_PL230_DMA_CFG_MSTREN_Msk             (0x00000001ul << CMSDK_PL230_DMA_CFG_MSTREN_Pos)           /*!< CMSDK_PL230 DMA CFG: MSTREN Mask */
+
+#define CMSDK_PL230_DMA_CFG_CPCCACHE_Pos           2                                                          /*!< CMSDK_PL230 DMA CFG: CPCCACHE Position */
+#define CMSDK_PL230_DMA_CFG_CPCCACHE_Msk           (0x00000001ul << CMSDK_PL230_DMA_CFG_CPCCACHE_Pos)         /*!< CMSDK_PL230 DMA CFG: CPCCACHE Mask */
+
+#define CMSDK_PL230_DMA_CFG_CPCBUF_Pos             1                                                          /*!< CMSDK_PL230 DMA CFG: CPCBUF Position */
+#define CMSDK_PL230_DMA_CFG_CPCBUF_Msk             (0x00000001ul << CMSDK_PL230_DMA_CFG_CPCBUF_Pos)           /*!< CMSDK_PL230 DMA CFG: CPCBUF Mask */
+
+#define CMSDK_PL230_DMA_CFG_CPCPRIV_Pos            0                                                          /*!< CMSDK_PL230 DMA CFG: CPCPRIV Position */
+#define CMSDK_PL230_DMA_CFG_CPCPRIV_Msk            (0x00000001ul << CMSDK_PL230_DMA_CFG_CPCPRIV_Pos)          /*!< CMSDK_PL230 DMA CFG: CPCPRIV Mask */
+
+#define CMSDK_PL230_CTRL_BASE_PTR_Pos              PL230_DMA_CHNL_BITS + 5                                    /*!< CMSDK_PL230 STATUS: BASE_PTR Position */
+#define CMSDK_PL230_CTRL_BASE_PTR_Msk              (0x0FFFFFFFul << CMSDK_PL230_CTRL_BASE_PTR_Pos)            /*!< CMSDK_PL230 STATUS: BASE_PTR Mask */
+
+#define CMSDK_PL230_ALT_CTRL_BASE_PTR_Pos          0                                                          /*!< CMSDK_PL230 STATUS: MSTREN Position */
+#define CMSDK_PL230_ALT_CTRL_BASE_PTR_Msk          (0xFFFFFFFFul << CMSDK_PL230_ALT_CTRL_BASE_PTR_Pos)        /*!< CMSDK_PL230 STATUS: MSTREN Mask */
+
+#define CMSDK_PL230_DMA_WAITONREQ_STATUS_Pos       0                                                          /*!< CMSDK_PL230 DMA_WAITONREQ_STATUS: DMA_WAITONREQ_STATUS Position */
+#define CMSDK_PL230_DMA_WAITONREQ_STATUS_Msk       (0xFFFFFFFFul << CMSDK_PL230_DMA_WAITONREQ_STATUS_Pos)     /*!< CMSDK_PL230 DMA_WAITONREQ_STATUS: DMA_WAITONREQ_STATUS Mask */
+
+#define CMSDK_PL230_CHNL_SW_REQUEST_Pos            0                                                          /*!< CMSDK_PL230 CHNL_SW_REQUEST: CHNL_SW_REQUEST Position */
+#define CMSDK_PL230_CHNL_SW_REQUEST_Msk            (0xFFFFFFFFul << CMSDK_PL230_CHNL_SW_REQUEST_Pos)          /*!< CMSDK_PL230 CHNL_SW_REQUEST: CHNL_SW_REQUEST Mask */
+
+#define CMSDK_PL230_CHNL_USEBURST_SET_Pos          0                                                          /*!< CMSDK_PL230 CHNL_USEBURST: SET Position */
+#define CMSDK_PL230_CHNL_USEBURST_SET_Msk          (0xFFFFFFFFul << CMSDK_PL230_CHNL_USEBURST_SET_Pos)        /*!< CMSDK_PL230 CHNL_USEBURST: SET Mask */
+
+#define CMSDK_PL230_CHNL_USEBURST_CLR_Pos          0                                                          /*!< CMSDK_PL230 CHNL_USEBURST: CLR Position */
+#define CMSDK_PL230_CHNL_USEBURST_CLR_Msk          (0xFFFFFFFFul << CMSDK_PL230_CHNL_USEBURST_CLR_Pos)        /*!< CMSDK_PL230 CHNL_USEBURST: CLR Mask */
+
+#define CMSDK_PL230_CHNL_REQ_MASK_SET_Pos          0                                                          /*!< CMSDK_PL230 CHNL_REQ_MASK: SET Position */
+#define CMSDK_PL230_CHNL_REQ_MASK_SET_Msk          (0xFFFFFFFFul << CMSDK_PL230_CHNL_REQ_MASK_SET_Pos)        /*!< CMSDK_PL230 CHNL_REQ_MASK: SET Mask */
+
+#define CMSDK_PL230_CHNL_REQ_MASK_CLR_Pos          0                                                          /*!< CMSDK_PL230 CHNL_REQ_MASK: CLR Position */
+#define CMSDK_PL230_CHNL_REQ_MASK_CLR_Msk          (0xFFFFFFFFul << CMSDK_PL230_CHNL_REQ_MASK_CLR_Pos)        /*!< CMSDK_PL230 CHNL_REQ_MASK: CLR Mask */
+
+#define CMSDK_PL230_CHNL_ENABLE_SET_Pos            0                                                          /*!< CMSDK_PL230 CHNL_ENABLE: SET Position */
+#define CMSDK_PL230_CHNL_ENABLE_SET_Msk            (0xFFFFFFFFul << CMSDK_PL230_CHNL_ENABLE_SET_Pos)          /*!< CMSDK_PL230 CHNL_ENABLE: SET Mask */
+
+#define CMSDK_PL230_CHNL_ENABLE_CLR_Pos            0                                                          /*!< CMSDK_PL230 CHNL_ENABLE: CLR Position */
+#define CMSDK_PL230_CHNL_ENABLE_CLR_Msk            (0xFFFFFFFFul << CMSDK_PL230_CHNL_ENABLE_CLR_Pos)          /*!< CMSDK_PL230 CHNL_ENABLE: CLR Mask */
+
+#define CMSDK_PL230_CHNL_PRI_ALT_SET_Pos           0                                                          /*!< CMSDK_PL230 CHNL_PRI_ALT: SET Position */
+#define CMSDK_PL230_CHNL_PRI_ALT_SET_Msk           (0xFFFFFFFFul << CMSDK_PL230_CHNL_PRI_ALT_SET_Pos)         /*!< CMSDK_PL230 CHNL_PRI_ALT: SET Mask */
+
+#define CMSDK_PL230_CHNL_PRI_ALT_CLR_Pos           0                                                          /*!< CMSDK_PL230 CHNL_PRI_ALT: CLR Position */
+#define CMSDK_PL230_CHNL_PRI_ALT_CLR_Msk           (0xFFFFFFFFul << CMSDK_PL230_CHNL_PRI_ALT_CLR_Pos)         /*!< CMSDK_PL230 CHNL_PRI_ALT: CLR Mask */
+
+#define CMSDK_PL230_CHNL_PRIORITY_SET_Pos          0                                                          /*!< CMSDK_PL230 CHNL_PRIORITY: SET Position */
+#define CMSDK_PL230_CHNL_PRIORITY_SET_Msk          (0xFFFFFFFFul << CMSDK_PL230_CHNL_PRIORITY_SET_Pos)        /*!< CMSDK_PL230 CHNL_PRIORITY: SET Mask */
+
+#define CMSDK_PL230_CHNL_PRIORITY_CLR_Pos          0                                                          /*!< CMSDK_PL230 CHNL_PRIORITY: CLR Position */
+#define CMSDK_PL230_CHNL_PRIORITY_CLR_Msk          (0xFFFFFFFFul << CMSDK_PL230_CHNL_PRIORITY_CLR_Pos)        /*!< CMSDK_PL230 CHNL_PRIORITY: CLR Mask */
+
+#define CMSDK_PL230_ERR_CLR_Pos                    0                                                          /*!< CMSDK_PL230 ERR: CLR Position */
+#define CMSDK_PL230_ERR_CLR_Msk                    (0x00000001ul << CMSDK_PL230_ERR_CLR_Pos)                  /*!< CMSDK_PL230 ERR: CLR Mask */
+
+
+/*@}*/ /* end of group CMSDK_PL230 */
+
+
+/*------------- PrimeCell UART (PL110) --------------------------------------*/
+/** @addtogroup CMSDK_PL110 CMSDK PrimeCell UART
+  @{
+*/
+
+typedef struct
+{
+  __IO uint32_t UARTDR;       // <h> Data
+                              //   <o.11>   OE: Overrun error <r>
+                              //   <o.10>   BE: Break error <r>
+                              //   <o.9>    PE: Parity error <r>
+                              //   <o.8>    FE: Framing error <r>
+                              //   <o.0..7> DATA: Received or Transmitting data (0..255)
+                              // </h>
+  union {
+  __I  uint32_t UARTRSR;      // <h> Receive Status <r>
+                              //   <o.3>    OE: Overrun error <r>
+                              //   <o.2>    BE: Break error <r>
+                              //   <o.1>    PE: Parity error <r>
+                              //   <o.0>    FE: Framing error <r>
+                              // </h>
+  __O  uint32_t UARTECR;      // <h> Error Clear <w>
+                              //   <o.3>    OE: Overrun error <w>
+                              //   <o.2>    BE: Break error <w>
+                              //   <o.1>    PE: Parity error <w>
+                              //   <o.0>    FE: Framing error <w>
+                              // </h>
+  };
+       uint32_t RESERVED0[4];
+  __IO uint32_t UARTFR;       // <h> Flags <r>
+                              //   <o.8>    RI: Ring indicator <r>
+                              //   <o.7>    TXFE: Transmit FIFO empty <r>
+                              //   <o.6>    RXFF: Receive FIFO full <r>
+                              //   <o.5>    TXFF: Transmit FIFO full <r>
+                              //   <o.4>    RXFE: Receive FIFO empty <r>
+                              //   <o.3>    BUSY: UART busy <r>
+                              //   <o.2>    DCD: Data carrier detect <r>
+                              //   <o.1>    DSR: Data set ready <r>
+                              //   <o.0>    CTS: Clear to send <r>
+                              // </h>
+       uint32_t RESERVED1;
+  __IO uint32_t UARTILPR;     // <h> IrDA Low-power Counter
+                              //   <o.0..7> ILPDVSR: 8-bit low-power divisor value (0..255)
+                              // </h>
+  __IO uint32_t UARTIBRD;     // <h> Integer Baud Rate
+                              //   <o.0..15> BAUD DIVINT: Integer baud rate divisor (0..65535)
+                              // </h>
+  __IO uint32_t UARTFBRD;     // <h> Fractional Baud Rate
+                              //   <o.0..5> BAUD DIVFRAC: Fractional baud rate divisor (0..63)
+                              // </h>
+  __IO uint32_t UARTLCR_H;    // <h> Line Control
+                              //   <o.8>    SPS: Stick parity select
+                              //   <o.5..6> WLEN: Word length
+                              //     <0=> 5 bits
+                              //     <1=> 6 bits
+                              //     <2=> 7 bits
+                              //     <3=> 8 bits
+                              //   <o.4>    FEN: Enable FIFOs
+                              //   <o.3>    STP2: Two stop bits select
+                              //   <o.2>    EPS: Even parity select
+                              //   <o.1>    PEN: Parity enable
+                              //   <o.0>    BRK: Send break
+                              // </h>
+  __IO uint32_t UARTCR;       // <h> Control
+                              //   <o.15>   CTSEn: CTS hardware flow control enable
+                              //   <o.14>   RTSEn: RTS hardware flow control enable
+                              //   <o.13>   Out2: Complement of Out2 modem status output
+                              //   <o.12>   Out1: Complement of Out1 modem status output
+                              //   <o.11>   RTS: Request to send
+                              //   <o.10>   DTR: Data transmit ready
+                              //   <o.9>    RXE: Receive enable
+                              //   <o.8>    TXE: Transmit enable
+                              //   <o.7>    LBE: Loop-back enable
+                              //   <o.2>    SIRLP: IrDA SIR low power mode
+                              //   <o.1>    SIREN: SIR enable
+                              //   <o.0>    UARTEN: UART enable
+                              // </h>
+  __IO uint32_t UARTIFLS;     // <h> Interrupt FIFO Level Select
+                              //   <o.3..5> RXIFLSEL: Receive interrupt FIFO level select
+                              //     <0=> >= 1/8 full
+                              //     <1=> >= 1/4 full
+                              //     <2=> >= 1/2 full
+                              //     <3=> >= 3/4 full
+                              //     <4=> >= 7/8 full
+                              //     <5=> reserved
+                              //     <6=> reserved
+                              //     <7=> reserved
+                              //   <o.0..2> TXIFLSEL: Transmit interrupt FIFO level select
+                              //     <0=> <= 1/8 full
+                              //     <1=> <= 1/4 full
+                              //     <2=> <= 1/2 full
+                              //     <3=> <= 3/4 full
+                              //     <4=> <= 7/8 full
+                              //     <5=> reserved
+                              //     <6=> reserved
+                              //     <7=> reserved
+                              // </h>
+  __IO uint32_t UARTIMSC;     // <h> Interrupt Mask Set / Clear
+                              //   <o.10>   OEIM: Overrun error interrupt mask
+                              //   <o.9>    BEIM: Break error interrupt mask
+                              //   <o.8>    PEIM: Parity error interrupt mask
+                              //   <o.7>    FEIM: Framing error interrupt mask
+                              //   <o.6>    RTIM: Receive interrupt mask
+                              //   <o.5>    TXIM: Transmit interrupt mask
+                              //   <o.4>    RXIM: Receive interrupt mask
+                              //   <o.3>    DSRMIM: nUARTDSR modem interrupt mask
+                              //   <o.2>    DCDMIM: nUARTDCD modem interrupt mask
+                              //   <o.1>    CTSMIM: nUARTCTS modem interrupt mask
+                              //   <o.0>    RIMIM: nUARTRI modem interrupt mask
+                              // </h>
+  __IO uint32_t UARTRIS;      // <h> Raw Interrupt Status <r>
+                              //   <o.10>   OERIS: Overrun error interrupt status <r>
+                              //   <o.9>    BERIS: Break error interrupt status <r>
+                              //   <o.8>    PERIS: Parity error interrupt status <r>
+                              //   <o.7>    FERIS: Framing error interrupt status <r>
+                              //   <o.6>    RTRIS: Receive timeout interrupt status <r>
+                              //   <o.5>    TXRIS: Transmit interrupt status <r>
+                              //   <o.4>    RXRIS: Receive interrupt status <r>
+                              //   <o.3>    DSRRMIS: nUARTDSR modem interrupt status <r>
+                              //   <o.2>    DCDRMIS: nUARTDCD modem interrupt status <r>
+                              //   <o.1>    CTSRMIS: nUARTCTS modem interrupt status <r>
+                              //   <o.0>    RIRMIS: nUARTRI modem interrupt status <r>
+                              // </h>
+  __IO uint32_t UARTMIS;      // <h> Masked Interrupt Status <r>
+                              //   <o.10>   OEMIS: Overrun error masked interrupt status <r>
+                              //   <o.9>    BEMIS: Break error masked interrupt status <r>
+                              //   <o.8>    PEMIS: Parity error masked interrupt status <r>
+                              //   <o.7>    FEMIS: Framing error masked interrupt status <r>
+                              //   <o.6>    RTMIS: Receive timeout masked interrupt status <r>
+                              //   <o.5>    TXMIS: Transmit masked interrupt status <r>
+                              //   <o.4>    RXMIS: Receive masked interrupt status <r>
+                              //   <o.3>    DSRMMIS: nUARTDSR modem masked interrupt status <r>
+                              //   <o.2>    DCDMMIS: nUARTDCD modem masked interrupt status <r>
+                              //   <o.1>    CTSMMIS: nUARTCTS modem masked interrupt status <r>
+                              //   <o.0>    RIMMIS: nUARTRI modem masked interrupt status <r>
+                              // </h>
+  __O  uint32_t UARTICR;      // <h> Interrupt Clear <w>
+                              //   <o.10>   OEIC: Overrun error interrupt clear <w>
+                              //   <o.9>    BEIC: Break error interrupt clear <w>
+                              //   <o.8>    PEIC: Parity error interrupt clear <w>
+                              //   <o.7>    FEIC: Framing error interrupt clear <w>
+                              //   <o.6>    RTIC: Receive timeout interrupt clear <w>
+                              //   <o.5>    TXIC: Transmit interrupt clear <w>
+                              //   <o.4>    RXIC: Receive interrupt clear <w>
+                              //   <o.3>    DSRMIC: nUARTDSR modem interrupt clear <w>
+                              //   <o.2>    DCDMIC: nUARTDCD modem interrupt clear <w>
+                              //   <o.1>    CTSMIC: nUARTCTS modem interrupt clear <w>
+                              //   <o.0>    RIMIC: nUARTRI modem interrupt clear <w>
+                              // </h>
+  __IO uint32_t UARTDMACR;    // <h> DMA Control
+                              //   <o.2>    DMAONERR: DMA on error
+                              //   <o.1>    TXDMAE: Transmit DMA enable
+                              //   <o.0>    RXDMAE: Receive DMA enable
+                              // </h>
+} PL110_UART_TypeDef;
+
+#define CMSDK_PL110_DATAOVRRUN_Pos            11                                             /*!< CMSDK_PL110 DATAOVRRUN: Data Overrun Position */
+#define CMSDK_PL110_DATAOVRRUN_Msk           (0x1ul << CMSDK_PL110_DATAOVRRUN_Pos)           /*!< CMSDK_PL110 DATAOVRRUN: Data Overrun Mask */
+
+#define CMSDK_PL110_DATABREAKERR_Pos          10                                             /*!< CMSDK_PL110 DATABREAKERR: Data Break Error Position */
+#define CMSDK_PL110_DATABREAKERR_Msk         (0x1ul << CMSDK_PL110_DATABREAKERR_Pos)         /*!< CMSDK_PL110 DATABREAKERR: Data Break Error Mask */
+
+#define CMSDK_PL110_DATAPARITYERR_Pos         9                                              /*!< CMSDK_PL110 DATAPARITYERR: Data Parity Error Position */
+#define CMSDK_PL110_DATAPARITYERR_Msk        (0x1ul << CMSDK_PL110_DATAPARITYERR_Pos)        /*!< CMSDK_PL110 DATAPARITYERR: Data Parity Error Mask */
+
+#define CMSDK_PL110_DATAFRAMEERR_Pos          8                                              /*!< CMSDK_PL110 DATAFRAMEERR: Data Frame Error Position */
+#define CMSDK_PL110_DATAFRAMEERR_Msk         (0x1ul << CMSDK_PL110_DATAFRAMEERR_Pos)         /*!< CMSDK_PL110 DATAFRAMEERR: Data Frame Error Mask */
+
+#define CMSDK_PL110_RECOVRRUN_Pos             3                                              /*!< CMSDK_PL110 RECOVRRUN: Receive Overrun Position */
+#define CMSDK_PL110_RECOVRRUN_Msk            (0x1ul << CMSDK_PL110_RECOVRRUN_Pos)            /*!< CMSDK_PL110 RECOVRRUN: Receive Overrun Mask */
+
+#define CMSDK_PL110_RECBREAKERR_Pos           2                                              /*!< CMSDK_PL110 RECBREAKERR: Receive Break Error Position */
+#define CMSDK_PL110_RECBREAKERR_Msk          (0x1ul << CMSDK_PL110_RECBREAKERR_Pos)          /*!< CMSDK_PL110 RECBREAKERR: Receive Break Error Mask */
+
+#define CMSDK_PL110_RECPARITYERR_Pos          1                                              /*!< CMSDK_PL110 RECPARITYERR: Receive Parity Error Position */
+#define CMSDK_PL110_RECPARITYERR_Msk         (0x1ul << CMSDK_PL110_RECPARITYERR_Pos)         /*!< CMSDK_PL110 RECPARITYERR: Receive Parity Error Mask */
+
+#define CMSDK_PL110_RECFRAMEERR_Pos           0                                              /*!< CMSDK_PL110 RECFRAMEERR: Receive Frame Error Position */
+#define CMSDK_PL110_RECFRAMEERR_Msk          (0x1ul << CMSDK_PL110_RECFRAMEERR_Pos)          /*!< CMSDK_PL110 RECFRAMEERR: Receive Frame Error Mask */
+
+#define CMSDK_PL110_ERRCLROVRRUN_Pos          3                                              /*!< CMSDK_PL110 ERRCLROVRRUN: Clear Overrun Position */
+#define CMSDK_PL110_ERRCLROVRRUN_Msk         (0x1ul << CMSDK_PL110_ERRCLROVRRUN_Pos)         /*!< CMSDK_PL110 ERRCLROVRRUN: Clear Overrun Mask */
+
+#define CMSDK_PL110_ERRCLRBREAKERR_Pos        2                                              /*!< CMSDK_PL110 ERRCLRBREAKERR: Clear Break Error Position */
+#define CMSDK_PL110_ERRCLRBREAKERR_Msk       (0x1ul << CMSDK_PL110_ERRCLRBREAKERR_Pos)       /*!< CMSDK_PL110 ERRCLRBREAKERR: Clear Break Error Mask */
+
+#define CMSDK_PL110_ERRCLRPARITYERR_Pos       1                                              /*!< CMSDK_PL110 ERRCLRPARITYERR: Clear Parity Error Position */
+#define CMSDK_PL110_ERRCLRPARITYERR_Msk      (0x1ul << CMSDK_PL110_ERRCLRPARITYERR_Pos)      /*!< CMSDK_PL110 ERRCLRPARITYERR: Clear Parity Error Mask */
+
+#define CMSDK_PL110_ERRCLRFRAMEERR_Pos        0                                              /*!< CMSDK_PL110 ERRCLRFRAMEERR: Clear Frame Error Position */
+#define CMSDK_PL110_ERRCLRFRAMEERR_Msk       (0x1ul << CMSDK_PL110_ERRCLRFRAMEERR_Pos)       /*!< CMSDK_PL110 ERRCLRFRAMEERR: Clear Frame Error Mask */
+
+#define CMSDK_PL110_FLAG_RINGIND_Pos          8                                              /*!< CMSDK_PL110 FLAG_RINGIND: Ring Indicator Position */
+#define CMSDK_PL110_FLAG_RINGIND_Msk         (0x1ul << CMSDK_PL110_FLAG_RINGIND_Pos)         /*!< CMSDK_PL110 FLAG_RINGIND: Ring Indicator Mask */
+
+#define CMSDK_PL110_FLAG_TXFEMPTY_Pos         7                                              /*!< CMSDK_PL110 FLAG_TXFEMPTY: Transmit FIFO Empty Position */
+#define CMSDK_PL110_FLAG_TXFEMPTY_Msk        (0x1ul << CMSDK_PL110_FLAG_TXFEMPTY_Pos)        /*!< CMSDK_PL110 FLAG_TXFEMPTY: Transmit FIFO Empty Mask */
+
+#define CMSDK_PL110_FLAG_RXFFULL_Pos          6                                              /*!< CMSDK_PL110 FLAG_RXFFULL: Receive FIFO Full Position */
+#define CMSDK_PL110_FLAG_RXFFULL_Msk         (0x1ul << CMSDK_PL110_FLAG_RXFFULL_Pos)         /*!< CMSDK_PL110 FLAG_RXFFULL: Receive FIFO Full Mask */
+
+#define CMSDK_PL110_FLAG_TXFFULL_Pos          5                                              /*!< CMSDK_PL110 FLAG_TXFFULL: Transmit FIFO Full Position */
+#define CMSDK_PL110_FLAG_TXFFULL_Msk         (0x1ul << CMSDK_PL110_FLAG_TXFFULL_Pos)         /*!< CMSDK_PL110 FLAG_TXFFULL: Transmit FIFO Full Mask */
+
+#define CMSDK_PL110_FLAG_RXFEMPTY_Pos         4                                              /*!< CMSDK_PL110 FLAG_RXFEMPTY: Receive FIFO Empty Position */
+#define CMSDK_PL110_FLAG_RXFEMPTY_Msk        (0x1ul << CMSDK_PL110_FLAG_RXFEMPTY_Pos)        /*!< CMSDK_PL110 FLAG_RXFEMPTY: Receive FIFO Empty Mask */
+
+#define CMSDK_PL110_FLAG_UARTBUSY_Pos         3                                              /*!< CMSDK_PL110 FLAG_UARTBUSY: UART Busy Position */
+#define CMSDK_PL110_FLAG_UARTBUSY_Msk        (0x1ul << CMSDK_PL110_FLAG_UARTBUSY_Pos)        /*!< CMSDK_PL110 FLAG_UARTBUSY: UART Busy Mask */
+
+#define CMSDK_PL110_FLAG_CARRIERDETECT_Pos    2                                              /*!< CMSDK_PL110 FLAG_CARRIERDETECT: Carrier Detect Position */
+#define CMSDK_PL110_FLAG_CARRIERDETECT_Msk   (0x1ul << CMSDK_PL110_FLAG_CARRIERDETECT_Pos)   /*!< CMSDK_PL110 FLAG_CARRIERDETECT: Carrier Detect Mask */
+
+#define CMSDK_PL110_FLAG_DATASETREADY_Pos     1                                              /*!< CMSDK_PL110 FLAG_DATASETREADY: Data Set Ready Position */
+#define CMSDK_PL110_FLAG_DATASETREADY_Msk    (0x1ul << CMSDK_PL110_FLAG_DATASETREADY_Pos)    /*!< CMSDK_PL110 FLAG_DATASETREADY: Data Set Ready Mask */
+
+#define CMSDK_PL110_FLAG_CLR2SEND_Pos         0                                              /*!< CMSDK_PL110 FLAG_CLR2SEND: Clear To Send Position */
+#define CMSDK_PL110_FLAG_CLR2SEND_Msk        (0x1ul << CMSDK_PL110_FLAG_CLR2SEND_Pos)        /*!< CMSDK_PL110 FLAG_CLR2SEND: Clear To Send Mask */
+
+#define CMSDK_PL110_IRDALOWPOWERCOUNT_Pos    0                                               /*!< CMSDK_PL110 IRDALOWPOWERCOUNT: IrDA 8-bit low-power divisor value Position */
+#define CMSDK_PL110_IRDALOWPOWERCOUNT_Msk    (0xFFul << CMSDK_PL110_IRDALOWPOWERCOUNT_Pos)   /*!< CMSDK_PL110 IRDALOWPOWERCOUNT: IrDA 8-bit low-power divisor value Mask */
+
+#define CMSDK_PL110_INTDIVIDER_Pos           0                                               /*!< CMSDK_PL110 INTDIVIDER: Integer Divider Position */
+#define CMSDK_PL110_INTDIVIDER_Msk           (0xFFFFul << CMSDK_PL110_INTDIVIDER_Pos)        /*!< CMSDK_PL110 INTDIVIDER: Integer Divider Mask */
+
+#define CMSDK_PL110_FRACTDIVIDER_Pos         0                                               /*!< CMSDK_PL110 FRACTDIVIDER: Fractional Divider Position */
+#define CMSDK_PL110_FRACTDIVIDER_Msk         (0x3Ful << CMSDK_PL110_FRACTDIVIDER_Pos)        /*!< CMSDK_PL110 FRACTDIVIDER: Fractional Divider Mask */
+
+#define CMSDK_PL110_STICKPARITYSEL_Pos       8                                               /*!< CMSDK_PL110 STICKPARITYSEL: Stick parity select Position */
+#define CMSDK_PL110_STICKPARITYSEL_Msk       (0x1ul << CMSDK_PL110_STICKPARITYSEL_Pos)       /*!< CMSDK_PL110 STICKPARITYSEL: Stick parity select Mask */
+
+#define CMSDK_PL110_WORDLEN_Pos              5                                               /*!< CMSDK_PL110 WORDLEN: Word Length Select Position */
+#define CMSDK_PL110_WORDLEN_Msk              (0x3ul << CMSDK_PL110_WORDLEN_Pos)              /*!< CMSDK_PL110 WORDLEN: Word Length Select Mask */
+
+#define CMSDK_PL110_ENFIFOS_Pos              4                                               /*!< CMSDK_PL110 ENFIFOS: Enable FIFOs Position */
+#define CMSDK_PL110_ENFIFOS_Msk              (0x1ul << CMSDK_PL110_ENFIFOS_Pos)              /*!< CMSDK_PL110 ENFIFOS: Enable FIFOs Mask */
+
+#define CMSDK_PL110_2STOPBITS_Pos            3                                               /*!< CMSDK_PL110 2STOPBITS: Two Stop Bits Select Position */
+#define CMSDK_PL110_2STOPBITS_Msk            (0x1ul << CMSDK_PL110_2STOPBITS_Pos)            /*!< CMSDK_PL110 2STOPBITS: Two Stop Bits Select Mask */
+
+#define CMSDK_PL110_EVENPARITY_Pos           2                                               /*!< CMSDK_PL110 EVENPARITY: Even Parity Select Position */
+#define CMSDK_PL110_EVENPARITY_Msk           (0x1ul << CMSDK_PL110_EVENPARITY_Pos)           /*!< CMSDK_PL110 EVENPARITY: Even Parity Select Mask */
+
+#define CMSDK_PL110_PARITYEN_Pos             1                                               /*!< CMSDK_PL110 PARITYEN: Parity Enable Position */
+#define CMSDK_PL110_PARITYEN_Msk             (0x1ul << CMSDK_PL110_PARITYEN_Pos)             /*!< CMSDK_PL110 PARITYEN: Parity Enable Mask */
+
+#define CMSDK_PL110_SENDBREAK_Pos            0                                               /*!< CMSDK_PL110 SENDBREAK: Send Break Position */
+#define CMSDK_PL110_SENDBREAK_Msk            (0x1ul << CMSDK_PL110_SENDBREAK_Pos)            /*!< CMSDK_PL110 SENDBREAK: Send Break Mask */
+
+#define CMSDK_PL110_CTS_FLOWCTRL_Pos         15                                              /*!< CMSDK_PL110 CTS_FLOWCTRL: Enable CTS Flow Control Position */
+#define CMSDK_PL110_CTS_FLOWCTRL_Msk         (0x1ul << CMSDK_PL110_CTS_FLOWCTRL_Pos)         /*!< CMSDK_PL110 CTS_FLOWCTRL: Enable CTS Flow Control Mask */
+
+#define CMSDK_PL110_RTS_FLOWCTRL_Pos         14                                              /*!< CMSDK_PL110 RTS_FLOWCTRL: Enable RTS Flow Control Position */
+#define CMSDK_PL110_RTS_FLOWCTRL_Msk         (0x1ul << CMSDK_PL110_RTS_FLOWCTRL_Pos)         /*!< CMSDK_PL110 RTS_FLOWCTRL: Enable RTS Flow Control Mask */
+
+#define CMSDK_PL110_OUT2_Pos                 13                                              /*!< CMSDK_PL110 OUT2: Complement of Out2 modem status output Position */
+#define CMSDK_PL110_OUT2_Msk                 (0x1ul << CMSDK_PL110_OUT2_Pos)                 /*!< CMSDK_PL110 OUT2: Complement of Out2 modem status output Mask */
+
+#define CMSDK_PL110_OUT1_Pos                 12                                              /*!< CMSDK_PL110 OUT1: Complement of Out1 modem status output Position */
+#define CMSDK_PL110_OUT1_Msk                 (0x1ul << CMSDK_PL110_OUT1_Pos)                 /*!< CMSDK_PL110 OUT1: Complement of Out1 modem status output Mask */
+
+#define CMSDK_PL110_REQ2SEND_Pos             11                                              /*!< CMSDK_PL110 REQ2SEND: Request To Send Position */
+#define CMSDK_PL110_REQ2SEND_Msk             (0x1ul << CMSDK_PL110_REQ2SEND_Pos)             /*!< CMSDK_PL110 REQ2SEND: Request To Send Mask */
+
+#define CMSDK_PL110_DATATRANSREADY_Pos       10                                              /*!< CMSDK_PL110 DATATRANSREADY: Transmit Ready Position */
+#define CMSDK_PL110_DATATRANSREADY_Msk       (0x1ul << CMSDK_PL110_DATATRANSREADY_Pos)       /*!< CMSDK_PL110 DATATRANSREADY: Transmit Ready Mask */
+
+#define CMSDK_PL110_RXEN_Pos                 9                                               /*!< CMSDK_PL110 RXEN: Receive Enable Position */
+#define CMSDK_PL110_RXEN_Msk                 (0x1ul << CMSDK_PL110_RXEN_Pos)                 /*!< CMSDK_PL110 RXEN: Receive Enable Mask */
+
+#define CMSDK_PL110_TXEN_Pos                 8                                               /*!< CMSDK_PL110 TXEN: Transmit Enable Position */
+#define CMSDK_PL110_TXEN_Msk                 (0x1ul << CMSDK_PL110_TXEN_Pos)                 /*!< CMSDK_PL110 TXEN: Transmit Enable Mask */
+
+#define CMSDK_PL110_LOOPBACKEN_Pos           7                                               /*!< CMSDK_PL110 LOOPBACKEN: Loopback Enable Position */
+#define CMSDK_PL110_LOOPBACKEN_Msk           (0x1ul << CMSDK_PL110_LOOPBACKEN_Pos)           /*!< CMSDK_PL110 LOOPBACKEN: Loopback Enable Mask */
+
+#define CMSDK_PL110_IRDASIRLPM_Pos           2                                               /*!< CMSDK_PL110 IRDASIRLPM: IRDA SIR Low Power Position */
+#define CMSDK_PL110_IRDASIRLPM_Msk           (0x1ul << CMSDK_PL110_IRDASIRLPM_Pos)           /*!< CMSDK_PL110 IRDASIRLPM: IRDA SIR Low Power Mask */
+
+#define CMSDK_PL110_SIREN_Pos                1                                               /*!< CMSDK_PL110 SIREN: SIR Enable Position */
+#define CMSDK_PL110_SIREN_Msk                (0x1ul << CMSDK_PL110_SIREN_Pos)                /*!< CMSDK_PL110 SIREN: SIR Enable Mask */
+
+#define CMSDK_PL110_UARTEN_Pos               0                                               /*!< CMSDK_PL110 UARTEN: UART Enable Position */
+#define CMSDK_PL110_UARTEN_Msk               (0x1ul << CMSDK_PL110_UARTEN_Pos)               /*!< CMSDK_PL110 UARTEN: UART Enable Mask */
+
+#define CMSDK_PL110_RECINTFIFOLEVEL_Pos           3                                                         /*!< CMSDK_PL110 RECINTFIFOLEVEL: Set Receive Int FIFO Level Position */
+#define CMSDK_PL110_RECINTFIFOLEVEL_Msk           (0x7ul << CMSDK_PL110_RECINTFIFOLEVEL_Pos)                /*!< CMSDK_PL110 RECINTFIFOLEVEL: Set Receive Int FIFO Level Mask */
+
+#define CMSDK_PL110_TRANSINTFIFOLEVEL_Pos         0                                                         /*!< CMSDK_PL110 TRANSINTFIFOLEVEL: Set Transmit Int FIFO Level Position */
+#define CMSDK_PL110_TRANSINTFIFOLEVEL_Msk         (0x7ul << CMSDK_PL110_TRANSINTFIFOLEVEL_Pos)              /*!< CMSDK_PL110 TRANSINTFIFOLEVEL: Set Transmit Int FIFO Level Mask */
+
+#define CMSDK_PL110_SETMASK_OVRRUNERRINT_Pos      10                                                        /*!< CMSDK_PL110 SETMASK_OVRRUNERRINT: Set Overrun Error Int Mask Position */
+#define CMSDK_PL110_SETMASK_OVRRUNERRINT_Msk      (0x1ul << CMSDK_PL110_SETMASK_OVRRUNERRINT_Pos)           /*!< CMSDK_PL110 SETMASK_OVRRUNERRINT: Set Overrun Error Int Mask Mask */
+
+#define CMSDK_PL110_SETMASK_BREAKERRINT_Pos       9                                                         /*!< CMSDK_PL110 SETMASK_BREAKERRINT: Set Break Error Int Mask Position */
+#define CMSDK_PL110_SETMASK_BREAKERRINT_Msk       (0x1ul << CMSDK_PL110_SETMASK_BREAKERRINT_Pos)            /*!< CMSDK_PL110 SETMASK_BREAKERRINT: Set Break Error Int Mask Mask */
+
+#define CMSDK_PL110_SETMASK_PARITYERRINT_Pos      8                                                         /*!< CMSDK_PL110 SETMASK_PARITYERRINT: Set Parity Error Int Mask Position */
+#define CMSDK_PL110_SETMASK_PARITYERRINT_Msk      (0x1ul << CMSDK_PL110_SETMASK_PARITYERRINT_Pos)           /*!< CMSDK_PL110 SETMASK_PARITYERRINT: Set Parity Error Int Mask Mask */
+
+#define CMSDK_PL110_SETMASK_FRAMEERRINT_Pos       7                                                         /*!< CMSDK_PL110 SETMASK_FRAMEERRINT: Set Frame Error Int Mask Position */
+#define CMSDK_PL110_SETMASK_FRAMEERRINT_Msk       (0x1ul << CMSDK_PL110_SETMASK_FRAMEERRINT_Pos)            /*!< CMSDK_PL110 SETMASK_FRAMEERRINT: Set Frame Error Int Mask Mask */
+
+#define CMSDK_PL110_SETMASK_RECTRANSINT_Pos       6                                                         /*!< CMSDK_PL110 SETMASK_RECTRANSINT: Set Transmit Receive Comb Int Mask Position */
+#define CMSDK_PL110_SETMASK_RECTRANSINT_Msk       (0x1ul << CMSDK_PL110_SETMASK_RECTRANSINT_Pos)            /*!< CMSDK_PL110 SETMASK_RECTRANSINT: Set Transmit Receive Comb Int Mask Mask */
+
+#define CMSDK_PL110_SETMASK_TRANSINT_Pos          5                                                         /*!< CMSDK_PL110 SETMASK_TRANSINT: Set Transmit Int Mask Position */
+#define CMSDK_PL110_SETMASK_TRANSINT_Msk         (0x1ul << CMSDK_PL110_SETMASK_TRANSINT_Pos)                /*!< CMSDK_PL110 SETMASK_TRANSINT: Set Transmit Int Mask Mask */
+
+#define CMSDK_PL110_SETMASK_RECINT_Pos            4                                                         /*!< CMSDK_PL110 SETMASK_RECINT: Set Receive Int Mask Position */
+#define CMSDK_PL110_SETMASK_RECINT_Msk            (0x1ul << CMSDK_PL110_SETMASK_RECINT_Pos)                 /*!< CMSDK_PL110 SETMASK_RECINT: Set Receive Int Mask Mask */
+
+#define CMSDK_PL110_SETMASK_UART_DSRMODINT_Pos    3                                                         /*!< CMSDK_PL110 SETMASK_UART_DSRMODINT: Set Data Set Ready Modem Int Mask Position */
+#define CMSDK_PL110_SETMASK_UART_DSRMODINT_Msk    (0x1ul << CMSDK_PL110_SETMASK_UARTD_SRMODINT_Pos)         /*!< CMSDK_PL110 SETMASK_UART_DSRMODINT: Set Data Set Ready Modem Int Mask Mask */
+
+#define CMSDK_PL110_SETMASK_UART_DCDMODINT_Pos    2                                                         /*!< CMSDK_PL110 SETMASK_UART_DCDMODINT: Set Data Carrier Detect Modem Int Mask Position */
+#define CMSDK_PL110_SETMASK_UART_DCDMODINT_Msk    (0x1ul << CMSDK_PL110_SETMASK_UART_DCDMODINT_Pos)         /*!< CMSDK_PL110 SETMASK_UART_DCDMODINT: Set Data Carrier Detect Modem Int Mask Mask */
+
+#define CMSDK_PL110_SETMASK_UART_CTSMODINT_Pos    1                                                         /*!< CMSDK_PL110 SETMASK_UART_CTSMODINT: Set Clear To Send Modem Int Mask Position */
+#define CMSDK_PL110_SETMASK_UART_CTSMODINT_Msk    (0x1ul << CMSDK_PL110_SETMASK_UART_CTSMODINT_Pos)         /*!< CMSDK_PL110 SETMASK_UART_CTSMODINT: Set Clear To Send Modem Int Mask Mask */
+
+#define CMSDK_PL110_SETMASK_UART_RIMODINT_Pos     0                                                         /*!< CMSDK_PL110 SETMASK_UART_RIMODINT: Set nUARTRI Modem Int Mask Position */
+#define CMSDK_PL110_SETMASK_UART_RIMODINT_Msk     (0x1ul << CMSDK_PL110_SETMASK_UART_RIMODINT_Pos)          /*!< CMSDK_PL110 SETMASK_UART_RIMODINT: Set nUARTRI Modem Int Mask Mask */
+
+#define CMSDK_PL110_RAWINTSTAT_OVRRUNERRINT_Pos      10                                                     /*!< CMSDK_PL110 RAWINTSTAT_OVRRUNERRINT: Raw Overrun Error Int Status Mask Position */
+#define CMSDK_PL110_RAWINTSTAT_OVRRUNERRINT_Msk      (0x1ul << CMSDK_PL110_RAWINTSTAT_OVRRUNERRINT_Pos)     /*!< CMSDK_PL110 RAWINTSTAT_OVRRUNERRINT: Raw Overrun Error Int Status  Mask */
+
+#define CMSDK_PL110_RAWINTSTAT_BREAKERRINT_Pos       9                                                      /*!< CMSDK_PL110 RAWINTSTAT_BREAKERRINT: Raw Break Error Int Status Mask Position */
+#define CMSDK_PL110_RAWINTSTAT_BREAKERRINT_Msk       (0x1ul << CMSDK_PL110_RAWINTSTAT_BREAKERRINT_Pos)      /*!< CMSDK_PL110 RAWINTSTAT_BREAKERRINT: Raw Break Error Int Status  Mask */
+
+#define CMSDK_PL110_RAWINTSTAT_PARITYERRINT_Pos      8                                                      /*!< CMSDK_PL110 RAWINTSTAT_PARITYERRINT: Raw Parity Error Int Status Mask Position */
+#define CMSDK_PL110_RAWINTSTAT_PARITYERRINT_Msk      (0x1ul << CMSDK_PL110_RAWINTSTAT_PARITYERRINT_Pos)     /*!< CMSDK_PL110 RAWINTSTAT_PARITYERRINT: Raw Parity Error Int Status  Mask */
+
+#define CMSDK_PL110_RAWINTSTAT_FRAMEERRINT_Pos       7                                                      /*!< CMSDK_PL110 RAWINTSTAT_FRAMEERRINT: Raw Frame Error Int Status Mask Position */
+#define CMSDK_PL110_RAWINTSTAT_FRAMEERRINT_Msk       (0x1ul << CMSDK_PL110_RAWINTSTAT_FRAMEERRINT_Pos)      /*!< CMSDK_PL110 RAWINTSTAT_FRAMEERRINT: Raw Frame Error Int Status Mask */
+
+#define CMSDK_PL110_RAWINTSTAT_RECTRANSINT_Pos       6                                                      /*!< CMSDK_PL110 RAWINTSTAT_RECTRANSINT: Raw Transmit Receive Comb Int Status Position */
+#define CMSDK_PL110_RAWINTSTAT_RECTRANSINT_Msk       (0x1ul << CMSDK_PL110_RAWINTSTAT_RECTRANSINT_Pos)      /*!< CMSDK_PL110 RAWINTSTAT_RECTRANSINT: Raw Transmit Receive Comb Int Status Mask */
+
+#define CMSDK_PL110_RAWINTSTAT_TRANSINT_Pos          5                                                      /*!< CMSDK_PL110 RAWINTSTAT_TRANSINT: Raw Transmit Int Status Position */
+#define CMSDK_PL110_RAWINTSTAT_TRANSINT_Msk         (0x1ul << CMSDK_PL110_RAWINTSTAT_TRANSINT_Pos)          /*!< CMSDK_PL110 RAWINTSTAT_TRANSINT: Raw Transmit Int Status Mask */
+
+#define CMSDK_PL110_RAWINTSTAT_RECINT_Pos            4                                                      /*!< CMSDK_PL110 RAWINTSTAT_RECINT: Raw Receive Int Status Position */
+#define CMSDK_PL110_RAWINTSTAT_RECINT_Msk            (0x1ul << CMSDK_PL110_RAWINTSTAT_RECINT_Pos)           /*!< CMSDK_PL110 RAWINTSTAT_RECINT: Raw Receive Int Status Mask */
+
+#define CMSDK_PL110_RAWINTSTAT_UART_DSRMODINT_Pos    3                                                      /*!< CMSDK_PL110 RAWINTSTAT_UART_DSRMODINT: Raw Data Set Ready Int Status Position */
+#define CMSDK_PL110_RAWINTSTAT_UART_DSRMODINT_Msk    (0x1ul << CMSDK_PL110_RAWINTSTAT_UARTD_SRMODINT_Pos)   /*!< CMSDK_PL110 RAWINTSTAT_UARTD_SRMODINT: Raw Data Set Ready Int Status Mask */
+
+#define CMSDK_PL110_RAWINTSTAT_UART_DCDMODINT_Pos    2                                                      /*!< CMSDK_PL110 RAWINTSTAT_UART_DCDMODINT: Raw Data Carrier Detect Int Status Position */
+#define CMSDK_PL110_RAWINTSTAT_UART_DCDMODINT_Msk    (0x1ul << CMSDK_PL110_RAWINTSTAT_UART_DCDMODINT_Pos)   /*!< CMSDK_PL110 RAWINTSTAT_UART_DCDMODINT: Raw Data Carrier Detect Int Status Mask */
+
+#define CMSDK_PL110_RAWINTSTAT_UART_CTSMODINT_Pos    1                                                      /*!< CMSDK_PL110 RAWINTSTAT_UART_CTSMODINT: Raw Clear To Send Int Status Position */
+#define CMSDK_PL110_RAWINTSTAT_UART_CTSMODINT_Msk    (0x1ul << CMSDK_PL110_RAWINTSTAT_UART_CTSMODINT_Pos)   /*!< CMSDK_PL110 RAWINTSTAT_UART_CTSMODINT: Raw Clear To Send Int Status Mask */
+
+#define CMSDK_PL110_RAWINTSTAT_UART_RIMODINT_Pos     0                                                      /*!< CMSDK_PL110 RAWINTSTAT_UART_RIMODINT: Raw nUARTRI Modem Int Status Position */
+#define CMSDK_PL110_RAWINTSTAT_UART_RIMODINT_Msk     (0x1ul << CMSDK_PL110_RAWINTSTAT_UART_RIMODINT_Pos)    /*!< CMSDK_PL110 RAWINTSTAT_UART_RIMODINT: Raw nUARTRI Modem Int Status Mask */
+
+#define CMSDK_PL110_MSKINTSTAT_OVRRUNERRINT_Pos      10                                                     /*!< CMSDK_PL110 MSKINTSTAT_OVRRUNERRINT: Masked Overrun Error Int Status Position */
+#define CMSDK_PL110_MSKINTSTAT_OVRRUNERRINT_Msk      (0x1ul << CMSDK_PL110_MSKINTSTAT_OVRRUNERRINT_Pos)     /*!< CMSDK_PL110 MSKINTSTAT_OVRRUNERRINT: Masked Overrun Error Int Status Mask */
+
+#define CMSDK_PL110_MSKINTSTAT_BREAKERRINT_Pos       9                                                      /*!< CMSDK_PL110 MSKINTSTAT_BREAKERRINT: Masked Break Error Int Status Position */
+#define CMSDK_PL110_MSKINTSTAT_BREAKERRINT_Msk       (0x1ul << CMSDK_PL110_MSKINTSTAT_BREAKERRINT_Pos)      /*!< CMSDK_PL110 MSKINTSTAT_BREAKERRINT: Masked Break Error Int Status Mask */
+
+#define CMSDK_PL110_MSKINTSTAT_PARITYERRINT_Pos      8                                                      /*!< CMSDK_PL110 MSKINTSTAT_PARITYERRINT: Masked Parity Error Int Status Position */
+#define CMSDK_PL110_MSKINTSTAT_PARITYERRINT_Msk      (0x1ul << CMSDK_PL110_MSKINTSTAT_PARITYERRINT_Pos)     /*!< CMSDK_PL110 MSKINTSTAT_PARITYERRINT: Masked Parity Error Int Status Mask */
+
+#define CMSDK_PL110_MSKINTSTAT_FRAMEERRINT_Pos       7                                                      /*!< CMSDK_PL110 MSKINTSTAT_FRAMEERRINT: Masked Frame Error Int Status Position */
+#define CMSDK_PL110_MSKINTSTAT_FRAMEERRINT_Msk       (0x1ul << CMSDK_PL110_MSKINTSTAT_FRAMEERRINT_Pos)      /*!< CMSDK_PL110 MSKINTSTAT_FRAMEERRINT: Masked Frame Error Int Status Mask */
+
+#define CMSDK_PL110_MSKINTSTAT_RECTRANSINT_Pos       6                                                      /*!< CMSDK_PL110 MSKINTSTAT_RECTRANSINT: Masked Transmit Receive Comb Int Status Position */
+#define CMSDK_PL110_MSKINTSTAT_RECTRANSINT_Msk       (0x1ul << CMSDK_PL110_MSKINTSTAT_RECTRANSINT_Pos)      /*!< CMSDK_PL110 MSKINTSTAT_RECTRANSINT: Masked Transmit Receive Comb Int Status Mask */
+
+#define CMSDK_PL110_MSKINTSTAT_TRANSINT_Pos          5                                                      /*!< CMSDK_PL110 MSKINTSTAT_TRANSINT: Masked Transmit Int Status Position */
+#define CMSDK_PL110_MSKINTSTAT_TRANSINT_Msk         (0x1ul << CMSDK_PL110_MSKINTSTAT_TRANSINT_Pos)          /*!< CMSDK_PL110 MSKINTSTAT_TRANSINT: Masked Transmit Int Status Mask */
+
+#define CMSDK_PL110_MSKINTSTAT_RECINT_Pos            4                                                      /*!< CMSDK_PL110 MSKINTSTAT_RECINT: Masked Receive Int Status Position */
+#define CMSDK_PL110_MSKINTSTAT_RECINT_Msk            (0x1ul << CMSDK_PL110_MSKINTSTAT_RECINT_Pos)           /*!< CMSDK_PL110 MSKINTSTAT_RECINT: Masked Receive Int Status Mask */
+
+#define CMSDK_PL110_MSKINTSTAT_UART_DSRMODINT_Pos    3                                                      /*!< CMSDK_PL110 MSKINTSTAT_UART_DSRMODINT: Masked Data Set Ready Int Status Position */
+#define CMSDK_PL110_MSKINTSTAT_UART_DSRMODINT_Msk    (0x1ul << CMSDK_PL110_MSKINTSTAT_UARTD_SRMODINT_Pos)   /*!< CMSDK_PL110 MSKINTSTAT_UART_DSRMODINT: Masked Data Set Ready Int Status Mask */
+
+#define CMSDK_PL110_MSKINTSTAT_UART_DCDMODINT_Pos    2                                                      /*!< CMSDK_PL110 MSKINTSTAT_UART_DCDMODINT: Masked Data Carrier Detect Int Status Position */
+#define CMSDK_PL110_MSKINTSTAT_UART_DCDMODINT_Msk    (0x1ul << CMSDK_PL110_MSKINTSTAT_UART_DCDMODINT_Pos)   /*!< CMSDK_PL110 MSKINTSTAT_UART_DCDMODINT: Masked Data Carrier Detect Int Status Mask */
+
+#define CMSDK_PL110_MSKINTSTAT_UART_CTSMODINT_Pos    1                                                      /*!< CMSDK_PL110 MSKINTSTAT_UART_CTSMODINT: Masked Clear To Send Int Status Position */
+#define CMSDK_PL110_MSKINTSTAT_UART_CTSMODINT_Msk    (0x1ul << CMSDK_PL110_MSKINTSTAT_UART_CTSMODINT_Pos)   /*!< CMSDK_PL110 MSKINTSTAT_UART_CTSMODINT: Masked Clear To Send Int Status Mask */
+
+#define CMSDK_PL110_MSKINTSTAT_UART_RIMODINT_Pos     0                                                      /*!< CMSDK_PL110 MSKINTSTAT_UART_RIMODINT: Masked nUARTRI Modem Int Status Position */
+#define CMSDK_PL110_MSKINTSTAT_UART_RIMODINT_Msk     (0x1ul << CMSDK_PL110_MSKINTSTAT_UART_RIMODINT_Pos)    /*!< CMSDK_PL110 MSKINTSTAT_UART_RIMODINT: Masked nUARTRI Modem Int Status Mask */
+
+#define CMSDK_PL110_INTCLR_OVRRUNERRINT_Pos      10                                                  /*!< CMSDK_PL110 INTCLR_OVRRUNERRINT: Clear Overrun Error Int Position */
+#define CMSDK_PL110_INTCLR_OVRRUNERRINT_Msk      (0x1ul << CMSDK_PL110_INTCLR_OVRRUNERRINT_Pos)      /*!< CMSDK_PL110 INTCLR_OVRRUNERRINT: Clear Overrun Error Int Mask */
+
+#define CMSDK_PL110_INTCLR_BREAKERRINT_Pos       9                                                   /*!< CMSDK_PL110 INTCLR_BREAKERRINT: Clear Break Error Int Position */
+#define CMSDK_PL110_INTCLR_BREAKERRINT_Msk       (0x1ul << CMSDK_PL110_INTCLR_BREAKERRINT_Pos)       /*!< CMSDK_PL110 INTCLR_BREAKERRINT: Clear Break Error Int Mask */
+
+#define CMSDK_PL110_INTCLR_PARITYERRINT_Pos      8                                                   /*!< CMSDK_PL110 INTCLR_PARITYERRINT: Clear Parity Error Int Position */
+#define CMSDK_PL110_INTCLR_PARITYERRINT_Msk      (0x1ul << CMSDK_PL110_INTCLR_PARITYERRINT_Pos)      /*!< CMSDK_PL110 INTCLR_PARITYERRINT: Clear Parity Error Int Mask */
+
+#define CMSDK_PL110_INTCLR_FRAMEERRINT_Pos       7                                                   /*!< CMSDK_PL110 INTCLR_FRAMEERRINT: Clear Frame Error Int Position */
+#define CMSDK_PL110_INTCLR_FRAMEERRINT_Msk       (0x1ul << CMSDK_PL110_INTCLR_FRAMEERRINT_Pos)       /*!< CMSDK_PL110 INTCLR_FRAMEERRINT: Clear Frame Error Int Mask */
+
+#define CMSDK_PL110_INTCLR_RECTRANSINT_Pos       6                                                   /*!< CMSDK_PL110 INTCLR_RECTRANSINT: Clear Receive Transmit Comb Int Position */
+#define CMSDK_PL110_INTCLR_RECTRANSINT_Msk       (0x1ul << CMSDK_PL110_INTCLR_RECTRANSINT_Pos)       /*!< CMSDK_PL110 INTCLR_RECTRANSINT: Clear Receive Transmit Comb Int Mask */
+
+#define CMSDK_PL110_INTCLR_TRANSINT_Pos          5                                                   /*!< CMSDK_PL110 INTCLR_TRANSINT: Clear Transmit Int Position */
+#define CMSDK_PL110_INTCLR_TRANSINT_Msk          (0x1ul << CMSDK_PL110_INTCLR_TRANSINT_Pos)          /*!< CMSDK_PL110 INTCLR_TRANSINT: Clear Transmit Int Mask */
+
+#define CMSDK_PL110_INTCLR_RECINT_Pos            4                                                   /*!< CMSDK_PL110 INTCLR_RECINT: Clear Receive Int Position */
+#define CMSDK_PL110_INTCLR_RECINT_Msk            (0x1ul << CMSDK_PL110_INTCLR_RECINT_Pos)            /*!< CMSDK_PL110 INTCLR_RECINT: Clear Receive Int Mask */
+
+#define CMSDK_PL110_INTCLR_UART_DSRMODINT_Pos    3                                                   /*!< CMSDK_PL110 INTCLR_UART_DSRMODINT: Clear Data Carrier Detect Int Position */
+#define CMSDK_PL110_INTCLR_UART_DSRMODINT_Msk    (0x1ul << CMSDK_PL110_INTCLR_UARTD_SRMODINT_Pos)    /*!< CMSDK_PL110 INTCLR_UARTD_SRMODINT: Clear Data Carrier Detect Int Mask */
+
+#define CMSDK_PL110_INTCLR_UART_DCDMODINT_Pos    2                                                   /*!< CMSDK_PL110 INTCLR_UART_DCDMODINT: Clear Data Set Ready Int Position */
+#define CMSDK_PL110_INTCLR_UART_DCDMODINT_Msk    (0x1ul << CMSDK_PL110_INTCLR_UART_DCDMODINT_Pos)    /*!< CMSDK_PL110 INTCLR_UART_DCDMODINT: Clear Data Set Ready Int Mask */
+
+#define CMSDK_PL110_INTCLR_UART_CTSMODINT_Pos    1                                                   /*!< CMSDK_PL110 INTCLR_UART_CTSMODINT: Clear Clear To Sent Int Position */
+#define CMSDK_PL110_INTCLR_UART_CTSMODINT_Msk    (0x1ul << CMSDK_PL110_INTCLR_UART_CTSMODINT_Pos)    /*!< CMSDK_PL110 INTCLR_UART_CTSMODINT: Clear Clear To Sent Int Mask */
+
+#define CMSDK_PL110_INTCLR_UART_RIMODINT_Pos     0                                                   /*!< CMSDK_PL110 INTCLR_UART_RIMODINT: Clear nUARTRI Modem Int Position */
+#define CMSDK_PL110_INTCLR_UART_RIMODINT_Msk     (0x1ul << CMSDK_PL110_INTCLR_UART_RIMODINT_Pos)     /*!< CMSDK_PL110 INTCLR_UART_RIMODINT: Clear nUARTRI Modem Int Mask */
+
+#define CMSDK_PL110_DMA_ERR_Pos                  2                                                   /*!< CMSDK_PL110 DMA_ERR: DMA Error Position */
+#define CMSDK_PL110_DMA_ERR_Msk                  (0x1ul << CMSDK_PL110_DMA_ERR_Pos)                  /*!< CMSDK_PL110 DMA_ERR: DMA Error Mask */
+
+#define CMSDK_PL110_DMA_TRANS_EN_Pos             1                                                   /*!< CMSDK_PL110 DMA_TRANS_EN: DMA Transmit Error Position */
+#define CMSDK_PL110_DMA_TRANS_EN_Msk             (0x1ul << CMSDK_PL110_DMA_TRANS_EN_Pos)             /*!< CMSDK_PL110 DMA_TRANS_EN: DMA Transmit Error Mask */
+
+#define CMSDK_PL110_DMA_REC_EN_Pos               0                                                   /*!< CMSDK_PL110 DMA_REC_EN: DMA Receive Error Position */
+#define CMSDK_PL110_DMA_REC_EN_Msk               (0x1ul << CMSDK_PL110_DMA_REC_EN_Pos)               /*!< CMSDK_PL110 DMA_REC_EN: DMA Receive Error Mask */
+
+
+/*@}*/ /* end of group  CMSDK_PL110 */
+
+/*------------------- Watchdog ----------------------------------------------*/
+/** @addtogroup CMSDK_Watchdog CMSDK Watchdog
+  @{
+*/
+typedef struct
+{
+
+  __IO    uint32_t  LOAD;          // <h> Watchdog Load Register </h>
+  __I     uint32_t  VALUE;         // <h> Watchdog Value Register </h>
+  __IO    uint32_t  CTRL;          // <h> Watchdog Control Register
+                                   //   <o.1>    RESEN: Reset enable
+                                   //   <o.0>    INTEN: Interrupt enable
+                                   // </h>
+  __O     uint32_t  INTCLR;        // <h> Watchdog Clear Interrupt Register </h>
+  __I     uint32_t  RAWINTSTAT;    // <h> Watchdog Raw Interrupt Status Register </h>
+  __I     uint32_t  MASKINTSTAT;   // <h> Watchdog Interrupt Status Register </h>
+        uint32_t  RESERVED0[762];
+  __IO    uint32_t  LOCK;          // <h> Watchdog Lock Register </h>
+        uint32_t  RESERVED1[191];
+  __IO    uint32_t  ITCR;          // <h> Watchdog Integration Test Control Register </h>
+  __O     uint32_t  ITOP;          // <h> Watchdog Integration Test Output Set Register </h>
+
+}CMSDK_WATCHDOG_TypeDef;
+
+#define CMSDK_Watchdog_LOAD_Pos               0                                              /*!< CMSDK_Watchdog LOAD: LOAD Position */
+#define CMSDK_Watchdog_LOAD_Msk              (0xFFFFFFFFul << CMSDK_Watchdog_LOAD_Pos)       /*!< CMSDK_Watchdog LOAD: LOAD Mask */
+
+#define CMSDK_Watchdog_VALUE_Pos              0                                              /*!< CMSDK_Watchdog VALUE: VALUE Position */
+#define CMSDK_Watchdog_VALUE_Msk             (0xFFFFFFFFul << CMSDK_Watchdog_VALUE_Pos)      /*!< CMSDK_Watchdog VALUE: VALUE Mask */
+
+#define CMSDK_Watchdog_CTRL_RESEN_Pos         1                                              /*!< CMSDK_Watchdog CTRL_RESEN: Enable Reset Output Position */
+#define CMSDK_Watchdog_CTRL_RESEN_Msk        (0x1ul << CMSDK_Watchdog_CTRL_RESEN_Pos)        /*!< CMSDK_Watchdog CTRL_RESEN: Enable Reset Output Mask */
+
+#define CMSDK_Watchdog_CTRL_INTEN_Pos         0                                              /*!< CMSDK_Watchdog CTRL_INTEN: Int Enable Position */
+#define CMSDK_Watchdog_CTRL_INTEN_Msk        (0x1ul << CMSDK_Watchdog_CTRL_INTEN_Pos)        /*!< CMSDK_Watchdog CTRL_INTEN: Int Enable Mask */
+
+#define CMSDK_Watchdog_INTCLR_Pos             0                                              /*!< CMSDK_Watchdog INTCLR: Int Clear Position */
+#define CMSDK_Watchdog_INTCLR_Msk            (0x1ul << CMSDK_Watchdog_INTCLR_Pos)            /*!< CMSDK_Watchdog INTCLR: Int Clear Mask */
+
+#define CMSDK_Watchdog_RAWINTSTAT_Pos         0                                              /*!< CMSDK_Watchdog RAWINTSTAT: Raw Int Status Position */
+#define CMSDK_Watchdog_RAWINTSTAT_Msk        (0x1ul << CMSDK_Watchdog_RAWINTSTAT_Pos)        /*!< CMSDK_Watchdog RAWINTSTAT: Raw Int Status Mask */
+
+#define CMSDK_Watchdog_MASKINTSTAT_Pos        0                                              /*!< CMSDK_Watchdog MASKINTSTAT: Mask Int Status Position */
+#define CMSDK_Watchdog_MASKINTSTAT_Msk       (0x1ul << CMSDK_Watchdog_MASKINTSTAT_Pos)       /*!< CMSDK_Watchdog MASKINTSTAT: Mask Int Status Mask */
+
+#define CMSDK_Watchdog_LOCK_Pos               0                                              /*!< CMSDK_Watchdog LOCK: LOCK Position */
+#define CMSDK_Watchdog_LOCK_Msk              (0x1ul << CMSDK_Watchdog_LOCK_Pos)              /*!< CMSDK_Watchdog LOCK: LOCK Mask */
+
+#define CMSDK_Watchdog_INTEGTESTEN_Pos        0                                              /*!< CMSDK_Watchdog INTEGTESTEN: Integration Test Enable Position */
+#define CMSDK_Watchdog_INTEGTESTEN_Msk       (0x1ul << CMSDK_Watchdog_INTEGTESTEN_Pos)       /*!< CMSDK_Watchdog INTEGTESTEN: Integration Test Enable Mask */
+
+#define CMSDK_Watchdog_INTEGTESTOUTSET_Pos    1                                              /*!< CMSDK_Watchdog INTEGTESTOUTSET: Integration Test Output Set Position */
+#define CMSDK_Watchdog_INTEGTESTOUTSET_Msk   (0x1ul << CMSDK_Watchdog_INTEGTESTOUTSET_Pos)   /*!< CMSDK_Watchdog INTEGTESTOUTSET: Integration Test Output Set Mask */
+
+/*@}*/ /* end of group  CMSDK_Watchdog */
+
+/*------------------- PrimeCell APB GPIO --------------------------------------*/
+/** @addtogroup CMSDK_PL061 CMSDK APB GPIO
+  @{
+*/
+typedef struct
+{
+
+__IO    uint32_t  DATA[256];
+__IO    uint32_t  DIR;
+__IO    uint32_t  INTSENSE;
+__IO    uint32_t  INTBOTHEDGE;
+__IO    uint32_t  INTEVENT;
+__IO    uint32_t  INTMASK;
+__O     uint32_t  RAWINTSTAT;
+__O     uint32_t  MASKINTSTAT;
+__I     uint32_t  INTCLR;
+__IO    uint32_t  MODECTRL;
+
+}APBGPIO_TypeDef;
+
+#define CMSDK_PL061_DATA_Pos               0                                              /*!< CMSDK_PL061 DATA: DATA Position */
+#define CMSDK_PL061_DATA_Msk              (0xFFFFFFFFul << CMSDK_PL061_LOAD_Pos)          /*!< CMSDK_PL061 DATA: DATA Mask */
+
+#define CMSDK_PL061_DIR_Pos                0                                              /*!< CMSDK_PL061 DIR: Data Direction Position */
+#define CMSDK_PL061_DIR_Msk               (0x1ul << CMSDK_PL061_DIR_Pos)                  /*!< CMSDK_PL061 DIR: Data Direction  Mask */
+
+#define CMSDK_PL061_INTSENSE_Pos           0                                              /*!< CMSDK_PL061 INTSENSE: INT SENSE Position */
+#define CMSDK_PL061_INTSENSE_Msk          (0x1ul << CMSDK_PL061_INTSENSE_Pos)             /*!< CMSDK_PL061 INTSENSE: INT SENSE Mask */
+
+#define CMSDK_PL061_INTBOTHEDGE_Pos        0                                              /*!< CMSDK_PL061 INTBOTHEDGE: INT BOTH EDGE Position */
+#define CMSDK_PL061_INTBOTHEDGE_Msk       (0x1ul << CMSDK_PL061_INTBOTHEDGE_Pos)          /*!< CMSDK_PL061 INTBOTHEDGE: INT BOTH EDGE Mask */
+
+#define CMSDK_PL061_INTEVENT_Pos           0                                              /*!< CMSDK_PL061 INTEVENT: INT EVENT Position */
+#define CMSDK_PL061_INTEVENT_Msk          (0x1ul << CMSDK_PL061_INTEVENT_Pos)             /*!< CMSDK_PL061 INTEVENT: INT EVENT Mask */
+
+#define CMSDK_PL061_INTMASK_Pos            0                                              /*!< CMSDK_PL061 INTMASK: INT MASK Position */
+#define CMSDK_PL061_INTMASK_Msk           (0x1ul << CMSDK_PL061_INTMASK_Pos)              /*!< CMSDK_PL061 INTMASK: INT MASK Mask */
+
+#define CMSDK_PL061_RAWINTSTAT_Pos         0                                              /*!< CMSDK_PL061 RAWINTSTAT: Raw Int Status Position */
+#define CMSDK_PL061_RAWINTSTAT_Msk        (0x1ul << CMSDK_PL061_RAWINTSTAT_Pos)           /*!< CMSDK_PL061 RAWINTSTAT: Raw Int Status Mask */
+
+#define CMSDK_PL061_MASKINTSTAT_Pos        0                                              /*!< CMSDK_PL061 MASKINTSTAT: Mask Int Status Position */
+#define CMSDK_PL061_MASKINTSTAT_Msk       (0x1ul << CMSDK_PL061_MASKINTSTAT_Pos)          /*!< CMSDK_PL061 MASKINTSTAT: Mask Int Status Mask */
+
+#define CMSDK_PL061_INTCLR_Pos             0                                              /*!< CMSDK_PL061 INTCLR: Int Clear Position */
+#define CMSDK_PL061_INTCLR_Msk            (0x1ul << CMSDK_PL061_INTCLR_Pos)               /*!< CMSDK_PL061 INTCLR: Int Clear Mask */
+
+#define CMSDK_PL061_MODECTRL_HWEN_Pos      0                                              /*!< CMSDK_PL061 MODECTRL_HWEN: Mode Control Hardware Enable Position */
+#define CMSDK_PL061_MODECTRL_HWEN_Msk     (0x1ul << CMSDK_PL061_MODECTRL_HWEN_Pos)        /*!< CMSDK_PL061 MODECTRL_HWEN: Mode Control Hardware Enable Mask */
+
+
+/*@}*/ /* end of group  CMSDK_PL061 */
+
+
+#if defined ( __CC_ARM   )
+#pragma no_anon_unions
+#endif
+
+/*@}*/ /* end of group CMSDK_Peripherals */
+
+
+/******************************************************************************/
+/*                         Peripheral memory map                              */
+/******************************************************************************/
+/** @addtogroup CMSDK_MemoryMap CMSDK Memory Mapping
+  @{
+*/
+
+/* Peripheral and SRAM base address */
+#define CMSDK_FLASH_BASE        (0x00000000UL)  /*!< (FLASH     ) Base Address */
+#define CMSDK_SRAM_BASE         (0x20000000UL)  /*!< (SRAM      ) Base Address */
+#define CMSDK_PERIPH_BASE       (0x40000000UL)  /*!< (Peripheral) Base Address */
+
+#define CMSDK_RAM_BASE          (0x20000000UL)
+#define CMSDK_APB_BASE          (0x40000000UL)
+#define CMSDK_AHB_BASE          (0x40010000UL)
+#define CMSDK_APB1_BASE         (0x50000000UL)
+#define CMSDK_AHB_NVM_BASE      (0x60000000UL)
+#define CMSDK_AHB_PDM_PP_BASE   (0x80000000UL)
+
+/* APB peripherals                                                           */
+#define CMSDK_TIMER0_BASE       (CMSDK_APB_BASE + 0x0000UL)
+#define CMSDK_TIMER1_BASE       (CMSDK_APB_BASE + 0x1000UL)
+#define CMSDK_DUALTIMER_BASE    (CMSDK_APB_BASE + 0x2000UL)
+#define CMSDK_DUALTIMER_1_BASE  (CMSDK_DUALTIMER_BASE)
+#define CMSDK_DUALTIMER_2_BASE  (CMSDK_DUALTIMER_BASE + 0x20UL)
+#define CMSDK_UART0_BASE        (CMSDK_APB_BASE + 0x4000UL)
+#define CMSDK_UART1_BASE        (CMSDK_APB_BASE + 0x5000UL)
+#define CMSDK_WATCHDOG_BASE     (CMSDK_APB_BASE + 0x8000UL)
+#define CMSDK_PL230_BASE        (CMSDK_APB_BASE + 0xF000UL)  /* not relevant, no DMA */
+
+/* AHB peripherals                                                           */
+#define CMSDK_GPIO0_BASE        (CMSDK_AHB_BASE + 0x0000UL)
+#define CMSDK_GPIO1_BASE        (CMSDK_AHB_BASE + 0x1000UL)
+#define CMSDK_SYSCTRL_BASE      (CMSDK_AHB_BASE + 0xF000UL)
+/*@}*/ /* end of group CMSDK_MemoryMap */
+
+
+/******************************************************************************/
+/*                         Peripheral declaration                             */
+/******************************************************************************/
+
+/** @addtogroup CMSDK_PeripheralDecl CMSDK Peripheral Declaration
+  @{
+*/
+
+#define CMSDK_UART0             ((CMSDK_UART_TypeDef   *) CMSDK_UART0_BASE   )
+#define CMSDK_UART1             ((CMSDK_UART_TypeDef   *) CMSDK_UART1_BASE   )
+#define CMSDK_TIMER0            ((CMSDK_TIMER_TypeDef  *) CMSDK_TIMER0_BASE  )
+#define CMSDK_TIMER1            ((CMSDK_TIMER_TypeDef  *) CMSDK_TIMER1_BASE  )
+#define CMSDK_DUALTIMER         ((CMSDK_DUALTIMER_BOTH_TypeDef  *) CMSDK_DUALTIMER_BASE )
+#define CMSDK_DUALTIMER1        ((CMSDK_DUALTIMER_SINGLE_TypeDef  *) CMSDK_DUALTIMER_1_BASE )
+#define CMSDK_DUALTIMER2        ((CMSDK_DUALTIMER_SINGLE_TypeDef  *) CMSDK_DUALTIMER_2_BASE )
+#define CMSDK_WATCHDOG          ((CMSDK_WATCHDOG_TypeDef  *) CMSDK_WATCHDOG_BASE   )
+#define CMSDK_DMA               ((CMSDK_PL230_TypeDef  *) CMSDK_PL230_BASE   )
+#define CMSDK_GPIO0             ((CMSDK_GPIO_TypeDef   *) CMSDK_GPIO0_BASE   )
+#define CMSDK_GPIO1             ((CMSDK_GPIO_TypeDef   *) CMSDK_GPIO1_BASE   )
+#define CMSDK_SYSCON            ((CMSDK_SYSCON_TypeDef *) CMSDK_SYSCTRL_BASE )
+/*@}*/ /* end of group CMSDK_PeripheralDecl */
+
+/*@}*/ /* end of group CMSDK_Definitions */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* CMSDK_H */
diff --git a/platform/atm2/ATM22xx-x1x/include/reg/at_apb1_wrpr_regs_core_macro.h b/platform/atm2/ATM22xx-x1x/include/reg/at_apb1_wrpr_regs_core_macro.h
new file mode 100644
index 0000000..1ad1f4a
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/reg/at_apb1_wrpr_regs_core_macro.h
@@ -0,0 +1,1322 @@
+/*                                                                           */
+/* File:       at_apb1_wrpr_regs_core_macro.h                                */
+/*                                                                           */
+/* Arguments:  /cad/tools/cadence/blueprint_3.7.5/Linux-64bit/blueprint -eval*/
+/*             $DEFINE_PROPERTY=1; -ansic at_apb1_wrpr_regs_core.rdl         */
+/*                                                                           */
+/* Blueprint:   3.7.5 (Wed Feb 1 23:58:40 PST 2012)                          */
+/* Machine:    gull                                                          */
+/* OS:         Linux 2.6.32-696.13.2.el6.x86_64                              */
+/* Description:                                                              */
+/*                                                                           */
+/* No Description Provided                                                   */
+/*                                                                           */
+/* Copyright (C) 2022 Atmosic Technologies.  All rights reserved             */
+/*                                                                           */
+
+
+#ifndef __REG_AT_APB1_WRPR_REGS_CORE_H__
+#define __REG_AT_APB1_WRPR_REGS_CORE_H__
+
+/**
+ *****************************************************************************
+ * @defgroup AT_APB1_WRPR_REGS_CORE at_apb1_wrpr_regs_core
+ * @ingroup AT_REG
+ * @brief at_apb1_wrpr_regs_core definitions.
+ * @{
+ *****************************************************************************
+ */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_apb0_ctrl */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_apb0_ctrl apb0_ctrl
+ * @brief Contains register fields associated with apb0_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR1_APB0_CTRL_MACRO__
+#define __WRPR1_APB0_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 0  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR1_APB0_CTRL__CLK_ENABLE__SHIFT                                    0
+#define WRPR1_APB0_CTRL__CLK_ENABLE__WIDTH                                    1
+#define WRPR1_APB0_CTRL__CLK_ENABLE__MASK                           0x00000001U
+#define WRPR1_APB0_CTRL__CLK_ENABLE__READ(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB0_CTRL__CLK_ENABLE__WRITE(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB0_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR1_APB0_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR1_APB0_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR1_APB0_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR1_APB0_CTRL__CLK_ENABLE__RESET_VALUE                    0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 0  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR1_APB0_CTRL__SRESET__SHIFT                                        1
+#define WRPR1_APB0_CTRL__SRESET__WIDTH                                        1
+#define WRPR1_APB0_CTRL__SRESET__MASK                               0x00000002U
+#define WRPR1_APB0_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR1_APB0_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR1_APB0_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR1_APB0_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR1_APB0_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR1_APB0_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR1_APB0_CTRL__SRESET__RESET_VALUE                        0x00000001U
+/** @} */
+#define WRPR1_APB0_CTRL__TYPE                                          uint32_t
+#define WRPR1_APB0_CTRL__READ                                       0x00000003U
+#define WRPR1_APB0_CTRL__WRITE                                      0x00000003U
+#define WRPR1_APB0_CTRL__PRESERVED                                  0x00000000U
+#define WRPR1_APB0_CTRL__RESET_VALUE                                0x00000002U
+
+#endif /* __WRPR1_APB0_CTRL_MACRO__ */
+
+/** @} end of apb0_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_apb1_ctrl */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_apb1_ctrl apb1_ctrl
+ * @brief Contains register fields associated with apb1_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR1_APB1_CTRL_MACRO__
+#define __WRPR1_APB1_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 1  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR1_APB1_CTRL__CLK_ENABLE__SHIFT                                    0
+#define WRPR1_APB1_CTRL__CLK_ENABLE__WIDTH                                    1
+#define WRPR1_APB1_CTRL__CLK_ENABLE__MASK                           0x00000001U
+#define WRPR1_APB1_CTRL__CLK_ENABLE__READ(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB1_CTRL__CLK_ENABLE__WRITE(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB1_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR1_APB1_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR1_APB1_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR1_APB1_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR1_APB1_CTRL__CLK_ENABLE__RESET_VALUE                    0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 1  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR1_APB1_CTRL__SRESET__SHIFT                                        1
+#define WRPR1_APB1_CTRL__SRESET__WIDTH                                        1
+#define WRPR1_APB1_CTRL__SRESET__MASK                               0x00000002U
+#define WRPR1_APB1_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR1_APB1_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR1_APB1_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR1_APB1_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR1_APB1_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR1_APB1_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR1_APB1_CTRL__SRESET__RESET_VALUE                        0x00000001U
+/** @} */
+#define WRPR1_APB1_CTRL__TYPE                                          uint32_t
+#define WRPR1_APB1_CTRL__READ                                       0x00000003U
+#define WRPR1_APB1_CTRL__WRITE                                      0x00000003U
+#define WRPR1_APB1_CTRL__PRESERVED                                  0x00000000U
+#define WRPR1_APB1_CTRL__RESET_VALUE                                0x00000002U
+
+#endif /* __WRPR1_APB1_CTRL_MACRO__ */
+
+/** @} end of apb1_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_apb2_ctrl */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_apb2_ctrl apb2_ctrl
+ * @brief Contains register fields associated with apb2_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR1_APB2_CTRL_MACRO__
+#define __WRPR1_APB2_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 2  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR1_APB2_CTRL__CLK_ENABLE__SHIFT                                    0
+#define WRPR1_APB2_CTRL__CLK_ENABLE__WIDTH                                    1
+#define WRPR1_APB2_CTRL__CLK_ENABLE__MASK                           0x00000001U
+#define WRPR1_APB2_CTRL__CLK_ENABLE__READ(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB2_CTRL__CLK_ENABLE__WRITE(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB2_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR1_APB2_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR1_APB2_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR1_APB2_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR1_APB2_CTRL__CLK_ENABLE__RESET_VALUE                    0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 2  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR1_APB2_CTRL__SRESET__SHIFT                                        1
+#define WRPR1_APB2_CTRL__SRESET__WIDTH                                        1
+#define WRPR1_APB2_CTRL__SRESET__MASK                               0x00000002U
+#define WRPR1_APB2_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR1_APB2_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR1_APB2_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR1_APB2_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR1_APB2_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR1_APB2_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR1_APB2_CTRL__SRESET__RESET_VALUE                        0x00000001U
+/** @} */
+#define WRPR1_APB2_CTRL__TYPE                                          uint32_t
+#define WRPR1_APB2_CTRL__READ                                       0x00000003U
+#define WRPR1_APB2_CTRL__WRITE                                      0x00000003U
+#define WRPR1_APB2_CTRL__PRESERVED                                  0x00000000U
+#define WRPR1_APB2_CTRL__RESET_VALUE                                0x00000002U
+
+#endif /* __WRPR1_APB2_CTRL_MACRO__ */
+
+/** @} end of apb2_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_apb3_ctrl */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_apb3_ctrl apb3_ctrl
+ * @brief Contains register fields associated with apb3_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR1_APB3_CTRL_MACRO__
+#define __WRPR1_APB3_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 3  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR1_APB3_CTRL__CLK_ENABLE__SHIFT                                    0
+#define WRPR1_APB3_CTRL__CLK_ENABLE__WIDTH                                    1
+#define WRPR1_APB3_CTRL__CLK_ENABLE__MASK                           0x00000001U
+#define WRPR1_APB3_CTRL__CLK_ENABLE__READ(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB3_CTRL__CLK_ENABLE__WRITE(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB3_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR1_APB3_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR1_APB3_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR1_APB3_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR1_APB3_CTRL__CLK_ENABLE__RESET_VALUE                    0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 3  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR1_APB3_CTRL__SRESET__SHIFT                                        1
+#define WRPR1_APB3_CTRL__SRESET__WIDTH                                        1
+#define WRPR1_APB3_CTRL__SRESET__MASK                               0x00000002U
+#define WRPR1_APB3_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR1_APB3_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR1_APB3_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR1_APB3_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR1_APB3_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR1_APB3_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR1_APB3_CTRL__SRESET__RESET_VALUE                        0x00000001U
+/** @} */
+#define WRPR1_APB3_CTRL__TYPE                                          uint32_t
+#define WRPR1_APB3_CTRL__READ                                       0x00000003U
+#define WRPR1_APB3_CTRL__WRITE                                      0x00000003U
+#define WRPR1_APB3_CTRL__PRESERVED                                  0x00000000U
+#define WRPR1_APB3_CTRL__RESET_VALUE                                0x00000002U
+
+#endif /* __WRPR1_APB3_CTRL_MACRO__ */
+
+/** @} end of apb3_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_apb4_ctrl */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_apb4_ctrl apb4_ctrl
+ * @brief Contains register fields associated with apb4_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR1_APB4_CTRL_MACRO__
+#define __WRPR1_APB4_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 4  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR1_APB4_CTRL__CLK_ENABLE__SHIFT                                    0
+#define WRPR1_APB4_CTRL__CLK_ENABLE__WIDTH                                    1
+#define WRPR1_APB4_CTRL__CLK_ENABLE__MASK                           0x00000001U
+#define WRPR1_APB4_CTRL__CLK_ENABLE__READ(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB4_CTRL__CLK_ENABLE__WRITE(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB4_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR1_APB4_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR1_APB4_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR1_APB4_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR1_APB4_CTRL__CLK_ENABLE__RESET_VALUE                    0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 4  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR1_APB4_CTRL__SRESET__SHIFT                                        1
+#define WRPR1_APB4_CTRL__SRESET__WIDTH                                        1
+#define WRPR1_APB4_CTRL__SRESET__MASK                               0x00000002U
+#define WRPR1_APB4_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR1_APB4_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR1_APB4_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR1_APB4_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR1_APB4_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR1_APB4_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR1_APB4_CTRL__SRESET__RESET_VALUE                        0x00000001U
+/** @} */
+#define WRPR1_APB4_CTRL__TYPE                                          uint32_t
+#define WRPR1_APB4_CTRL__READ                                       0x00000003U
+#define WRPR1_APB4_CTRL__WRITE                                      0x00000003U
+#define WRPR1_APB4_CTRL__PRESERVED                                  0x00000000U
+#define WRPR1_APB4_CTRL__RESET_VALUE                                0x00000002U
+
+#endif /* __WRPR1_APB4_CTRL_MACRO__ */
+
+/** @} end of apb4_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_apb5_ctrl */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_apb5_ctrl apb5_ctrl
+ * @brief Contains register fields associated with apb5_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR1_APB5_CTRL_MACRO__
+#define __WRPR1_APB5_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 5  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR1_APB5_CTRL__CLK_ENABLE__SHIFT                                    0
+#define WRPR1_APB5_CTRL__CLK_ENABLE__WIDTH                                    1
+#define WRPR1_APB5_CTRL__CLK_ENABLE__MASK                           0x00000001U
+#define WRPR1_APB5_CTRL__CLK_ENABLE__READ(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB5_CTRL__CLK_ENABLE__WRITE(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB5_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR1_APB5_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR1_APB5_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR1_APB5_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR1_APB5_CTRL__CLK_ENABLE__RESET_VALUE                    0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 5  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR1_APB5_CTRL__SRESET__SHIFT                                        1
+#define WRPR1_APB5_CTRL__SRESET__WIDTH                                        1
+#define WRPR1_APB5_CTRL__SRESET__MASK                               0x00000002U
+#define WRPR1_APB5_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR1_APB5_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR1_APB5_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR1_APB5_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR1_APB5_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR1_APB5_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR1_APB5_CTRL__SRESET__RESET_VALUE                        0x00000001U
+/** @} */
+#define WRPR1_APB5_CTRL__TYPE                                          uint32_t
+#define WRPR1_APB5_CTRL__READ                                       0x00000003U
+#define WRPR1_APB5_CTRL__WRITE                                      0x00000003U
+#define WRPR1_APB5_CTRL__PRESERVED                                  0x00000000U
+#define WRPR1_APB5_CTRL__RESET_VALUE                                0x00000002U
+
+#endif /* __WRPR1_APB5_CTRL_MACRO__ */
+
+/** @} end of apb5_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_apb6_ctrl */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_apb6_ctrl apb6_ctrl
+ * @brief Contains register fields associated with apb6_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR1_APB6_CTRL_MACRO__
+#define __WRPR1_APB6_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 6  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR1_APB6_CTRL__CLK_ENABLE__SHIFT                                    0
+#define WRPR1_APB6_CTRL__CLK_ENABLE__WIDTH                                    1
+#define WRPR1_APB6_CTRL__CLK_ENABLE__MASK                           0x00000001U
+#define WRPR1_APB6_CTRL__CLK_ENABLE__READ(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB6_CTRL__CLK_ENABLE__WRITE(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB6_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR1_APB6_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR1_APB6_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR1_APB6_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR1_APB6_CTRL__CLK_ENABLE__RESET_VALUE                    0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 6  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR1_APB6_CTRL__SRESET__SHIFT                                        1
+#define WRPR1_APB6_CTRL__SRESET__WIDTH                                        1
+#define WRPR1_APB6_CTRL__SRESET__MASK                               0x00000002U
+#define WRPR1_APB6_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR1_APB6_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR1_APB6_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR1_APB6_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR1_APB6_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR1_APB6_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR1_APB6_CTRL__SRESET__RESET_VALUE                        0x00000001U
+/** @} */
+#define WRPR1_APB6_CTRL__TYPE                                          uint32_t
+#define WRPR1_APB6_CTRL__READ                                       0x00000003U
+#define WRPR1_APB6_CTRL__WRITE                                      0x00000003U
+#define WRPR1_APB6_CTRL__PRESERVED                                  0x00000000U
+#define WRPR1_APB6_CTRL__RESET_VALUE                                0x00000002U
+
+#endif /* __WRPR1_APB6_CTRL_MACRO__ */
+
+/** @} end of apb6_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_apb7_ctrl */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_apb7_ctrl apb7_ctrl
+ * @brief Contains register fields associated with apb7_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR1_APB7_CTRL_MACRO__
+#define __WRPR1_APB7_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 7  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR1_APB7_CTRL__CLK_ENABLE__SHIFT                                    0
+#define WRPR1_APB7_CTRL__CLK_ENABLE__WIDTH                                    1
+#define WRPR1_APB7_CTRL__CLK_ENABLE__MASK                           0x00000001U
+#define WRPR1_APB7_CTRL__CLK_ENABLE__READ(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB7_CTRL__CLK_ENABLE__WRITE(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB7_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR1_APB7_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR1_APB7_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR1_APB7_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR1_APB7_CTRL__CLK_ENABLE__RESET_VALUE                    0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 7  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR1_APB7_CTRL__SRESET__SHIFT                                        1
+#define WRPR1_APB7_CTRL__SRESET__WIDTH                                        1
+#define WRPR1_APB7_CTRL__SRESET__MASK                               0x00000002U
+#define WRPR1_APB7_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR1_APB7_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR1_APB7_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR1_APB7_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR1_APB7_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR1_APB7_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR1_APB7_CTRL__SRESET__RESET_VALUE                        0x00000001U
+/** @} */
+#define WRPR1_APB7_CTRL__TYPE                                          uint32_t
+#define WRPR1_APB7_CTRL__READ                                       0x00000003U
+#define WRPR1_APB7_CTRL__WRITE                                      0x00000003U
+#define WRPR1_APB7_CTRL__PRESERVED                                  0x00000000U
+#define WRPR1_APB7_CTRL__RESET_VALUE                                0x00000002U
+
+#endif /* __WRPR1_APB7_CTRL_MACRO__ */
+
+/** @} end of apb7_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_apb8_ctrl */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_apb8_ctrl apb8_ctrl
+ * @brief Contains register fields associated with apb8_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR1_APB8_CTRL_MACRO__
+#define __WRPR1_APB8_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 8  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR1_APB8_CTRL__CLK_ENABLE__SHIFT                                    0
+#define WRPR1_APB8_CTRL__CLK_ENABLE__WIDTH                                    1
+#define WRPR1_APB8_CTRL__CLK_ENABLE__MASK                           0x00000001U
+#define WRPR1_APB8_CTRL__CLK_ENABLE__READ(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB8_CTRL__CLK_ENABLE__WRITE(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB8_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR1_APB8_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR1_APB8_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR1_APB8_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR1_APB8_CTRL__CLK_ENABLE__RESET_VALUE                    0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 8  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR1_APB8_CTRL__SRESET__SHIFT                                        1
+#define WRPR1_APB8_CTRL__SRESET__WIDTH                                        1
+#define WRPR1_APB8_CTRL__SRESET__MASK                               0x00000002U
+#define WRPR1_APB8_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR1_APB8_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR1_APB8_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR1_APB8_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR1_APB8_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR1_APB8_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR1_APB8_CTRL__SRESET__RESET_VALUE                        0x00000001U
+/** @} */
+#define WRPR1_APB8_CTRL__TYPE                                          uint32_t
+#define WRPR1_APB8_CTRL__READ                                       0x00000003U
+#define WRPR1_APB8_CTRL__WRITE                                      0x00000003U
+#define WRPR1_APB8_CTRL__PRESERVED                                  0x00000000U
+#define WRPR1_APB8_CTRL__RESET_VALUE                                0x00000002U
+
+#endif /* __WRPR1_APB8_CTRL_MACRO__ */
+
+/** @} end of apb8_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_apb9_ctrl */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_apb9_ctrl apb9_ctrl
+ * @brief Contains register fields associated with apb9_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR1_APB9_CTRL_MACRO__
+#define __WRPR1_APB9_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 9  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR1_APB9_CTRL__CLK_ENABLE__SHIFT                                    0
+#define WRPR1_APB9_CTRL__CLK_ENABLE__WIDTH                                    1
+#define WRPR1_APB9_CTRL__CLK_ENABLE__MASK                           0x00000001U
+#define WRPR1_APB9_CTRL__CLK_ENABLE__READ(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB9_CTRL__CLK_ENABLE__WRITE(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB9_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR1_APB9_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR1_APB9_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR1_APB9_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR1_APB9_CTRL__CLK_ENABLE__RESET_VALUE                    0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 9  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR1_APB9_CTRL__SRESET__SHIFT                                        1
+#define WRPR1_APB9_CTRL__SRESET__WIDTH                                        1
+#define WRPR1_APB9_CTRL__SRESET__MASK                               0x00000002U
+#define WRPR1_APB9_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR1_APB9_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR1_APB9_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR1_APB9_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR1_APB9_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR1_APB9_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR1_APB9_CTRL__SRESET__RESET_VALUE                        0x00000001U
+/** @} */
+#define WRPR1_APB9_CTRL__TYPE                                          uint32_t
+#define WRPR1_APB9_CTRL__READ                                       0x00000003U
+#define WRPR1_APB9_CTRL__WRITE                                      0x00000003U
+#define WRPR1_APB9_CTRL__PRESERVED                                  0x00000000U
+#define WRPR1_APB9_CTRL__RESET_VALUE                                0x00000002U
+
+#endif /* __WRPR1_APB9_CTRL_MACRO__ */
+
+/** @} end of apb9_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_apb10_ctrl */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_apb10_ctrl apb10_ctrl
+ * @brief Contains register fields associated with apb10_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR1_APB10_CTRL_MACRO__
+#define __WRPR1_APB10_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 10  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR1_APB10_CTRL__CLK_ENABLE__SHIFT                                   0
+#define WRPR1_APB10_CTRL__CLK_ENABLE__WIDTH                                   1
+#define WRPR1_APB10_CTRL__CLK_ENABLE__MASK                          0x00000001U
+#define WRPR1_APB10_CTRL__CLK_ENABLE__READ(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB10_CTRL__CLK_ENABLE__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0x00000001U)
+#define WRPR1_APB10_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR1_APB10_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR1_APB10_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR1_APB10_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR1_APB10_CTRL__CLK_ENABLE__RESET_VALUE                   0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 10  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR1_APB10_CTRL__SRESET__SHIFT                                       1
+#define WRPR1_APB10_CTRL__SRESET__WIDTH                                       1
+#define WRPR1_APB10_CTRL__SRESET__MASK                              0x00000002U
+#define WRPR1_APB10_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR1_APB10_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR1_APB10_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR1_APB10_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR1_APB10_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR1_APB10_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR1_APB10_CTRL__SRESET__RESET_VALUE                       0x00000001U
+/** @} */
+#define WRPR1_APB10_CTRL__TYPE                                         uint32_t
+#define WRPR1_APB10_CTRL__READ                                      0x00000003U
+#define WRPR1_APB10_CTRL__WRITE                                     0x00000003U
+#define WRPR1_APB10_CTRL__PRESERVED                                 0x00000000U
+#define WRPR1_APB10_CTRL__RESET_VALUE                               0x00000002U
+
+#endif /* __WRPR1_APB10_CTRL_MACRO__ */
+
+/** @} end of apb10_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_apb11_ctrl */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_apb11_ctrl apb11_ctrl
+ * @brief Contains register fields associated with apb11_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR1_APB11_CTRL_MACRO__
+#define __WRPR1_APB11_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 11  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR1_APB11_CTRL__CLK_ENABLE__SHIFT                                   0
+#define WRPR1_APB11_CTRL__CLK_ENABLE__WIDTH                                   1
+#define WRPR1_APB11_CTRL__CLK_ENABLE__MASK                          0x00000001U
+#define WRPR1_APB11_CTRL__CLK_ENABLE__READ(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB11_CTRL__CLK_ENABLE__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0x00000001U)
+#define WRPR1_APB11_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR1_APB11_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR1_APB11_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR1_APB11_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR1_APB11_CTRL__CLK_ENABLE__RESET_VALUE                   0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 11  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR1_APB11_CTRL__SRESET__SHIFT                                       1
+#define WRPR1_APB11_CTRL__SRESET__WIDTH                                       1
+#define WRPR1_APB11_CTRL__SRESET__MASK                              0x00000002U
+#define WRPR1_APB11_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR1_APB11_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR1_APB11_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR1_APB11_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR1_APB11_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR1_APB11_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR1_APB11_CTRL__SRESET__RESET_VALUE                       0x00000001U
+/** @} */
+#define WRPR1_APB11_CTRL__TYPE                                         uint32_t
+#define WRPR1_APB11_CTRL__READ                                      0x00000003U
+#define WRPR1_APB11_CTRL__WRITE                                     0x00000003U
+#define WRPR1_APB11_CTRL__PRESERVED                                 0x00000000U
+#define WRPR1_APB11_CTRL__RESET_VALUE                               0x00000002U
+
+#endif /* __WRPR1_APB11_CTRL_MACRO__ */
+
+/** @} end of apb11_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_apb12_ctrl */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_apb12_ctrl apb12_ctrl
+ * @brief Contains register fields associated with apb12_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR1_APB12_CTRL_MACRO__
+#define __WRPR1_APB12_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 12  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR1_APB12_CTRL__CLK_ENABLE__SHIFT                                   0
+#define WRPR1_APB12_CTRL__CLK_ENABLE__WIDTH                                   1
+#define WRPR1_APB12_CTRL__CLK_ENABLE__MASK                          0x00000001U
+#define WRPR1_APB12_CTRL__CLK_ENABLE__READ(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB12_CTRL__CLK_ENABLE__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0x00000001U)
+#define WRPR1_APB12_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR1_APB12_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR1_APB12_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR1_APB12_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR1_APB12_CTRL__CLK_ENABLE__RESET_VALUE                   0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 12  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR1_APB12_CTRL__SRESET__SHIFT                                       1
+#define WRPR1_APB12_CTRL__SRESET__WIDTH                                       1
+#define WRPR1_APB12_CTRL__SRESET__MASK                              0x00000002U
+#define WRPR1_APB12_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR1_APB12_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR1_APB12_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR1_APB12_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR1_APB12_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR1_APB12_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR1_APB12_CTRL__SRESET__RESET_VALUE                       0x00000001U
+/** @} */
+#define WRPR1_APB12_CTRL__TYPE                                         uint32_t
+#define WRPR1_APB12_CTRL__READ                                      0x00000003U
+#define WRPR1_APB12_CTRL__WRITE                                     0x00000003U
+#define WRPR1_APB12_CTRL__PRESERVED                                 0x00000000U
+#define WRPR1_APB12_CTRL__RESET_VALUE                               0x00000002U
+
+#endif /* __WRPR1_APB12_CTRL_MACRO__ */
+
+/** @} end of apb12_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_apb13_ctrl */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_apb13_ctrl apb13_ctrl
+ * @brief Contains register fields associated with apb13_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR1_APB13_CTRL_MACRO__
+#define __WRPR1_APB13_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 13  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR1_APB13_CTRL__CLK_ENABLE__SHIFT                                   0
+#define WRPR1_APB13_CTRL__CLK_ENABLE__WIDTH                                   1
+#define WRPR1_APB13_CTRL__CLK_ENABLE__MASK                          0x00000001U
+#define WRPR1_APB13_CTRL__CLK_ENABLE__READ(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB13_CTRL__CLK_ENABLE__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0x00000001U)
+#define WRPR1_APB13_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR1_APB13_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR1_APB13_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR1_APB13_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR1_APB13_CTRL__CLK_ENABLE__RESET_VALUE                   0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 13  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR1_APB13_CTRL__SRESET__SHIFT                                       1
+#define WRPR1_APB13_CTRL__SRESET__WIDTH                                       1
+#define WRPR1_APB13_CTRL__SRESET__MASK                              0x00000002U
+#define WRPR1_APB13_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR1_APB13_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR1_APB13_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR1_APB13_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR1_APB13_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR1_APB13_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR1_APB13_CTRL__SRESET__RESET_VALUE                       0x00000001U
+/** @} */
+#define WRPR1_APB13_CTRL__TYPE                                         uint32_t
+#define WRPR1_APB13_CTRL__READ                                      0x00000003U
+#define WRPR1_APB13_CTRL__WRITE                                     0x00000003U
+#define WRPR1_APB13_CTRL__PRESERVED                                 0x00000000U
+#define WRPR1_APB13_CTRL__RESET_VALUE                               0x00000002U
+
+#endif /* __WRPR1_APB13_CTRL_MACRO__ */
+
+/** @} end of apb13_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_apb14_ctrl */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_apb14_ctrl apb14_ctrl
+ * @brief Contains register fields associated with apb14_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR1_APB14_CTRL_MACRO__
+#define __WRPR1_APB14_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 14  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR1_APB14_CTRL__CLK_ENABLE__SHIFT                                   0
+#define WRPR1_APB14_CTRL__CLK_ENABLE__WIDTH                                   1
+#define WRPR1_APB14_CTRL__CLK_ENABLE__MASK                          0x00000001U
+#define WRPR1_APB14_CTRL__CLK_ENABLE__READ(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB14_CTRL__CLK_ENABLE__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0x00000001U)
+#define WRPR1_APB14_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR1_APB14_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR1_APB14_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR1_APB14_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR1_APB14_CTRL__CLK_ENABLE__RESET_VALUE                   0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 14  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR1_APB14_CTRL__SRESET__SHIFT                                       1
+#define WRPR1_APB14_CTRL__SRESET__WIDTH                                       1
+#define WRPR1_APB14_CTRL__SRESET__MASK                              0x00000002U
+#define WRPR1_APB14_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR1_APB14_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR1_APB14_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR1_APB14_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR1_APB14_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR1_APB14_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR1_APB14_CTRL__SRESET__RESET_VALUE                       0x00000001U
+/** @} */
+#define WRPR1_APB14_CTRL__TYPE                                         uint32_t
+#define WRPR1_APB14_CTRL__READ                                      0x00000003U
+#define WRPR1_APB14_CTRL__WRITE                                     0x00000003U
+#define WRPR1_APB14_CTRL__PRESERVED                                 0x00000000U
+#define WRPR1_APB14_CTRL__RESET_VALUE                               0x00000002U
+
+#endif /* __WRPR1_APB14_CTRL_MACRO__ */
+
+/** @} end of apb14_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_apb15_ctrl */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_apb15_ctrl apb15_ctrl
+ * @brief Contains register fields associated with apb15_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR1_APB15_CTRL_MACRO__
+#define __WRPR1_APB15_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 15  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR1_APB15_CTRL__CLK_ENABLE__SHIFT                                   0
+#define WRPR1_APB15_CTRL__CLK_ENABLE__WIDTH                                   1
+#define WRPR1_APB15_CTRL__CLK_ENABLE__MASK                          0x00000001U
+#define WRPR1_APB15_CTRL__CLK_ENABLE__READ(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR1_APB15_CTRL__CLK_ENABLE__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0x00000001U)
+#define WRPR1_APB15_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR1_APB15_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR1_APB15_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR1_APB15_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR1_APB15_CTRL__CLK_ENABLE__RESET_VALUE                   0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 15  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR1_APB15_CTRL__SRESET__SHIFT                                       1
+#define WRPR1_APB15_CTRL__SRESET__WIDTH                                       1
+#define WRPR1_APB15_CTRL__SRESET__MASK                              0x00000002U
+#define WRPR1_APB15_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR1_APB15_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR1_APB15_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR1_APB15_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR1_APB15_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR1_APB15_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR1_APB15_CTRL__SRESET__RESET_VALUE                       0x00000001U
+/** @} */
+#define WRPR1_APB15_CTRL__TYPE                                         uint32_t
+#define WRPR1_APB15_CTRL__READ                                      0x00000003U
+#define WRPR1_APB15_CTRL__WRITE                                     0x00000003U
+#define WRPR1_APB15_CTRL__PRESERVED                                 0x00000000U
+#define WRPR1_APB15_CTRL__RESET_VALUE                               0x00000002U
+
+#endif /* __WRPR1_APB15_CTRL_MACRO__ */
+
+/** @} end of apb15_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR1_core_id */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_core_id core_id
+ * @brief Contains register fields associated with core_id. definitions.
+ * @{
+ */
+#ifndef __WRPR1_CORE_ID_MACRO__
+#define __WRPR1_CORE_ID_MACRO__
+
+/* macros for field id */
+/**
+ * @defgroup at_apb1_wrpr_regs_core_id_field id_field
+ * @brief macros for field id
+ * @details 'WRPR' in ASCII
+ * @{
+ */
+#define WRPR1_CORE_ID__ID__SHIFT                                              0
+#define WRPR1_CORE_ID__ID__WIDTH                                             32
+#define WRPR1_CORE_ID__ID__MASK                                     0xffffffffU
+#define WRPR1_CORE_ID__ID__READ(src)            ((uint32_t)(src) & 0xffffffffU)
+#define WRPR1_CORE_ID__ID__RESET_VALUE                              0x57525052U
+/** @} */
+#define WRPR1_CORE_ID__TYPE                                            uint32_t
+#define WRPR1_CORE_ID__READ                                         0xffffffffU
+#define WRPR1_CORE_ID__PRESERVED                                    0x00000000U
+#define WRPR1_CORE_ID__RESET_VALUE                                  0x57525052U
+
+#endif /* __WRPR1_CORE_ID_MACRO__ */
+
+/** @} end of core_id */
+
+/** @} end of AT_APB1_WRPR_REGS_CORE */
+#endif /* __REG_AT_APB1_WRPR_REGS_CORE_H__ */
diff --git a/platform/atm2/ATM22xx-x1x/include/reg/at_apb_wrpr_regs_core_macro.h b/platform/atm2/ATM22xx-x1x/include/reg/at_apb_wrpr_regs_core_macro.h
new file mode 100644
index 0000000..746e8c7
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/reg/at_apb_wrpr_regs_core_macro.h
@@ -0,0 +1,4875 @@
+/*                                                                           */
+/* File:       at_apb_wrpr_regs_core_macro.h                                 */
+/*                                                                           */
+/* Arguments:  /cad/tools/cadence/blueprint_3.7.5/Linux-64bit/blueprint -eval*/
+/*             $DEFINE_PROPERTY=1; -ansic at_apb_wrpr_regs_core.rdl          */
+/*                                                                           */
+/* Blueprint:   3.7.5 (Wed Feb 1 23:58:40 PST 2012)                          */
+/* Machine:    gull                                                          */
+/* OS:         Linux 2.6.32-696.13.2.el6.x86_64                              */
+/* Description:                                                              */
+/*                                                                           */
+/* No Description Provided                                                   */
+/*                                                                           */
+/* Copyright (C) 2022 Atmosic Technologies.  All rights reserved             */
+/*                                                                           */
+
+
+#ifndef __REG_AT_APB_WRPR_REGS_CORE_H__
+#define __REG_AT_APB_WRPR_REGS_CORE_H__
+
+/**
+ *****************************************************************************
+ * @defgroup AT_APB_WRPR_REGS_CORE at_apb_wrpr_regs_core
+ * @ingroup AT_REG
+ * @brief at_apb_wrpr_regs_core definitions.
+ * @{
+ *****************************************************************************
+ */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_apb0_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_apb0_ctrl apb0_ctrl
+ * @brief Contains register fields associated with apb0_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_APB0_CTRL_MACRO__
+#define __WRPR_APB0_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 0  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR_APB0_CTRL__CLK_ENABLE__SHIFT                                     0
+#define WRPR_APB0_CTRL__CLK_ENABLE__WIDTH                                     1
+#define WRPR_APB0_CTRL__CLK_ENABLE__MASK                            0x00000001U
+#define WRPR_APB0_CTRL__CLK_ENABLE__READ(src)   ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB0_CTRL__CLK_ENABLE__WRITE(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB0_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_APB0_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_APB0_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_APB0_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_APB0_CTRL__CLK_ENABLE__RESET_VALUE                     0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 0  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR_APB0_CTRL__SRESET__SHIFT                                         1
+#define WRPR_APB0_CTRL__SRESET__WIDTH                                         1
+#define WRPR_APB0_CTRL__SRESET__MASK                                0x00000002U
+#define WRPR_APB0_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_APB0_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_APB0_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_APB0_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_APB0_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_APB0_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_APB0_CTRL__SRESET__RESET_VALUE                         0x00000001U
+/** @} */
+#define WRPR_APB0_CTRL__TYPE                                           uint32_t
+#define WRPR_APB0_CTRL__READ                                        0x00000003U
+#define WRPR_APB0_CTRL__WRITE                                       0x00000003U
+#define WRPR_APB0_CTRL__PRESERVED                                   0x00000000U
+#define WRPR_APB0_CTRL__RESET_VALUE                                 0x00000002U
+
+#endif /* __WRPR_APB0_CTRL_MACRO__ */
+
+/** @} end of apb0_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_apb1_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_apb1_ctrl apb1_ctrl
+ * @brief Contains register fields associated with apb1_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_APB1_CTRL_MACRO__
+#define __WRPR_APB1_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 1  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR_APB1_CTRL__CLK_ENABLE__SHIFT                                     0
+#define WRPR_APB1_CTRL__CLK_ENABLE__WIDTH                                     1
+#define WRPR_APB1_CTRL__CLK_ENABLE__MASK                            0x00000001U
+#define WRPR_APB1_CTRL__CLK_ENABLE__READ(src)   ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB1_CTRL__CLK_ENABLE__WRITE(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB1_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_APB1_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_APB1_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_APB1_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_APB1_CTRL__CLK_ENABLE__RESET_VALUE                     0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 1  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR_APB1_CTRL__SRESET__SHIFT                                         1
+#define WRPR_APB1_CTRL__SRESET__WIDTH                                         1
+#define WRPR_APB1_CTRL__SRESET__MASK                                0x00000002U
+#define WRPR_APB1_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_APB1_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_APB1_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_APB1_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_APB1_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_APB1_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_APB1_CTRL__SRESET__RESET_VALUE                         0x00000001U
+/** @} */
+#define WRPR_APB1_CTRL__TYPE                                           uint32_t
+#define WRPR_APB1_CTRL__READ                                        0x00000003U
+#define WRPR_APB1_CTRL__WRITE                                       0x00000003U
+#define WRPR_APB1_CTRL__PRESERVED                                   0x00000000U
+#define WRPR_APB1_CTRL__RESET_VALUE                                 0x00000002U
+
+#endif /* __WRPR_APB1_CTRL_MACRO__ */
+
+/** @} end of apb1_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_apb2_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_apb2_ctrl apb2_ctrl
+ * @brief Contains register fields associated with apb2_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_APB2_CTRL_MACRO__
+#define __WRPR_APB2_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 2  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR_APB2_CTRL__CLK_ENABLE__SHIFT                                     0
+#define WRPR_APB2_CTRL__CLK_ENABLE__WIDTH                                     1
+#define WRPR_APB2_CTRL__CLK_ENABLE__MASK                            0x00000001U
+#define WRPR_APB2_CTRL__CLK_ENABLE__READ(src)   ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB2_CTRL__CLK_ENABLE__WRITE(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB2_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_APB2_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_APB2_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_APB2_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_APB2_CTRL__CLK_ENABLE__RESET_VALUE                     0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 2  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR_APB2_CTRL__SRESET__SHIFT                                         1
+#define WRPR_APB2_CTRL__SRESET__WIDTH                                         1
+#define WRPR_APB2_CTRL__SRESET__MASK                                0x00000002U
+#define WRPR_APB2_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_APB2_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_APB2_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_APB2_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_APB2_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_APB2_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_APB2_CTRL__SRESET__RESET_VALUE                         0x00000001U
+/** @} */
+#define WRPR_APB2_CTRL__TYPE                                           uint32_t
+#define WRPR_APB2_CTRL__READ                                        0x00000003U
+#define WRPR_APB2_CTRL__WRITE                                       0x00000003U
+#define WRPR_APB2_CTRL__PRESERVED                                   0x00000000U
+#define WRPR_APB2_CTRL__RESET_VALUE                                 0x00000002U
+
+#endif /* __WRPR_APB2_CTRL_MACRO__ */
+
+/** @} end of apb2_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_apb3_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_apb3_ctrl apb3_ctrl
+ * @brief Contains register fields associated with apb3_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_APB3_CTRL_MACRO__
+#define __WRPR_APB3_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 3  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR_APB3_CTRL__CLK_ENABLE__SHIFT                                     0
+#define WRPR_APB3_CTRL__CLK_ENABLE__WIDTH                                     1
+#define WRPR_APB3_CTRL__CLK_ENABLE__MASK                            0x00000001U
+#define WRPR_APB3_CTRL__CLK_ENABLE__READ(src)   ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB3_CTRL__CLK_ENABLE__WRITE(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB3_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_APB3_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_APB3_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_APB3_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_APB3_CTRL__CLK_ENABLE__RESET_VALUE                     0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 3  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR_APB3_CTRL__SRESET__SHIFT                                         1
+#define WRPR_APB3_CTRL__SRESET__WIDTH                                         1
+#define WRPR_APB3_CTRL__SRESET__MASK                                0x00000002U
+#define WRPR_APB3_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_APB3_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_APB3_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_APB3_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_APB3_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_APB3_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_APB3_CTRL__SRESET__RESET_VALUE                         0x00000001U
+/** @} */
+#define WRPR_APB3_CTRL__TYPE                                           uint32_t
+#define WRPR_APB3_CTRL__READ                                        0x00000003U
+#define WRPR_APB3_CTRL__WRITE                                       0x00000003U
+#define WRPR_APB3_CTRL__PRESERVED                                   0x00000000U
+#define WRPR_APB3_CTRL__RESET_VALUE                                 0x00000002U
+
+#endif /* __WRPR_APB3_CTRL_MACRO__ */
+
+/** @} end of apb3_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_apb4_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_apb4_ctrl apb4_ctrl
+ * @brief Contains register fields associated with apb4_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_APB4_CTRL_MACRO__
+#define __WRPR_APB4_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 4  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR_APB4_CTRL__CLK_ENABLE__SHIFT                                     0
+#define WRPR_APB4_CTRL__CLK_ENABLE__WIDTH                                     1
+#define WRPR_APB4_CTRL__CLK_ENABLE__MASK                            0x00000001U
+#define WRPR_APB4_CTRL__CLK_ENABLE__READ(src)   ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB4_CTRL__CLK_ENABLE__WRITE(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB4_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_APB4_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_APB4_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_APB4_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_APB4_CTRL__CLK_ENABLE__RESET_VALUE                     0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 4  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR_APB4_CTRL__SRESET__SHIFT                                         1
+#define WRPR_APB4_CTRL__SRESET__WIDTH                                         1
+#define WRPR_APB4_CTRL__SRESET__MASK                                0x00000002U
+#define WRPR_APB4_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_APB4_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_APB4_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_APB4_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_APB4_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_APB4_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_APB4_CTRL__SRESET__RESET_VALUE                         0x00000001U
+/** @} */
+#define WRPR_APB4_CTRL__TYPE                                           uint32_t
+#define WRPR_APB4_CTRL__READ                                        0x00000003U
+#define WRPR_APB4_CTRL__WRITE                                       0x00000003U
+#define WRPR_APB4_CTRL__PRESERVED                                   0x00000000U
+#define WRPR_APB4_CTRL__RESET_VALUE                                 0x00000002U
+
+#endif /* __WRPR_APB4_CTRL_MACRO__ */
+
+/** @} end of apb4_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_apb5_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_apb5_ctrl apb5_ctrl
+ * @brief Contains register fields associated with apb5_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_APB5_CTRL_MACRO__
+#define __WRPR_APB5_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 5  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR_APB5_CTRL__CLK_ENABLE__SHIFT                                     0
+#define WRPR_APB5_CTRL__CLK_ENABLE__WIDTH                                     1
+#define WRPR_APB5_CTRL__CLK_ENABLE__MASK                            0x00000001U
+#define WRPR_APB5_CTRL__CLK_ENABLE__READ(src)   ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB5_CTRL__CLK_ENABLE__WRITE(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB5_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_APB5_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_APB5_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_APB5_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_APB5_CTRL__CLK_ENABLE__RESET_VALUE                     0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 5  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR_APB5_CTRL__SRESET__SHIFT                                         1
+#define WRPR_APB5_CTRL__SRESET__WIDTH                                         1
+#define WRPR_APB5_CTRL__SRESET__MASK                                0x00000002U
+#define WRPR_APB5_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_APB5_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_APB5_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_APB5_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_APB5_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_APB5_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_APB5_CTRL__SRESET__RESET_VALUE                         0x00000001U
+/** @} */
+#define WRPR_APB5_CTRL__TYPE                                           uint32_t
+#define WRPR_APB5_CTRL__READ                                        0x00000003U
+#define WRPR_APB5_CTRL__WRITE                                       0x00000003U
+#define WRPR_APB5_CTRL__PRESERVED                                   0x00000000U
+#define WRPR_APB5_CTRL__RESET_VALUE                                 0x00000002U
+
+#endif /* __WRPR_APB5_CTRL_MACRO__ */
+
+/** @} end of apb5_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_apb6_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_apb6_ctrl apb6_ctrl
+ * @brief Contains register fields associated with apb6_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_APB6_CTRL_MACRO__
+#define __WRPR_APB6_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 6  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR_APB6_CTRL__CLK_ENABLE__SHIFT                                     0
+#define WRPR_APB6_CTRL__CLK_ENABLE__WIDTH                                     1
+#define WRPR_APB6_CTRL__CLK_ENABLE__MASK                            0x00000001U
+#define WRPR_APB6_CTRL__CLK_ENABLE__READ(src)   ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB6_CTRL__CLK_ENABLE__WRITE(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB6_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_APB6_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_APB6_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_APB6_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_APB6_CTRL__CLK_ENABLE__RESET_VALUE                     0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 6  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR_APB6_CTRL__SRESET__SHIFT                                         1
+#define WRPR_APB6_CTRL__SRESET__WIDTH                                         1
+#define WRPR_APB6_CTRL__SRESET__MASK                                0x00000002U
+#define WRPR_APB6_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_APB6_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_APB6_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_APB6_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_APB6_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_APB6_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_APB6_CTRL__SRESET__RESET_VALUE                         0x00000001U
+/** @} */
+#define WRPR_APB6_CTRL__TYPE                                           uint32_t
+#define WRPR_APB6_CTRL__READ                                        0x00000003U
+#define WRPR_APB6_CTRL__WRITE                                       0x00000003U
+#define WRPR_APB6_CTRL__PRESERVED                                   0x00000000U
+#define WRPR_APB6_CTRL__RESET_VALUE                                 0x00000002U
+
+#endif /* __WRPR_APB6_CTRL_MACRO__ */
+
+/** @} end of apb6_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_apb7_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_apb7_ctrl apb7_ctrl
+ * @brief Contains register fields associated with apb7_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_APB7_CTRL_MACRO__
+#define __WRPR_APB7_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 7  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR_APB7_CTRL__CLK_ENABLE__SHIFT                                     0
+#define WRPR_APB7_CTRL__CLK_ENABLE__WIDTH                                     1
+#define WRPR_APB7_CTRL__CLK_ENABLE__MASK                            0x00000001U
+#define WRPR_APB7_CTRL__CLK_ENABLE__READ(src)   ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB7_CTRL__CLK_ENABLE__WRITE(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB7_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_APB7_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_APB7_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_APB7_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_APB7_CTRL__CLK_ENABLE__RESET_VALUE                     0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 7  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR_APB7_CTRL__SRESET__SHIFT                                         1
+#define WRPR_APB7_CTRL__SRESET__WIDTH                                         1
+#define WRPR_APB7_CTRL__SRESET__MASK                                0x00000002U
+#define WRPR_APB7_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_APB7_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_APB7_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_APB7_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_APB7_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_APB7_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_APB7_CTRL__SRESET__RESET_VALUE                         0x00000001U
+/** @} */
+#define WRPR_APB7_CTRL__TYPE                                           uint32_t
+#define WRPR_APB7_CTRL__READ                                        0x00000003U
+#define WRPR_APB7_CTRL__WRITE                                       0x00000003U
+#define WRPR_APB7_CTRL__PRESERVED                                   0x00000000U
+#define WRPR_APB7_CTRL__RESET_VALUE                                 0x00000002U
+
+#endif /* __WRPR_APB7_CTRL_MACRO__ */
+
+/** @} end of apb7_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_apb8_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_apb8_ctrl apb8_ctrl
+ * @brief Contains register fields associated with apb8_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_APB8_CTRL_MACRO__
+#define __WRPR_APB8_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 8  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR_APB8_CTRL__CLK_ENABLE__SHIFT                                     0
+#define WRPR_APB8_CTRL__CLK_ENABLE__WIDTH                                     1
+#define WRPR_APB8_CTRL__CLK_ENABLE__MASK                            0x00000001U
+#define WRPR_APB8_CTRL__CLK_ENABLE__READ(src)   ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB8_CTRL__CLK_ENABLE__WRITE(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB8_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_APB8_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_APB8_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_APB8_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_APB8_CTRL__CLK_ENABLE__RESET_VALUE                     0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 8  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR_APB8_CTRL__SRESET__SHIFT                                         1
+#define WRPR_APB8_CTRL__SRESET__WIDTH                                         1
+#define WRPR_APB8_CTRL__SRESET__MASK                                0x00000002U
+#define WRPR_APB8_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_APB8_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_APB8_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_APB8_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_APB8_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_APB8_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_APB8_CTRL__SRESET__RESET_VALUE                         0x00000001U
+/** @} */
+#define WRPR_APB8_CTRL__TYPE                                           uint32_t
+#define WRPR_APB8_CTRL__READ                                        0x00000003U
+#define WRPR_APB8_CTRL__WRITE                                       0x00000003U
+#define WRPR_APB8_CTRL__PRESERVED                                   0x00000000U
+#define WRPR_APB8_CTRL__RESET_VALUE                                 0x00000002U
+
+#endif /* __WRPR_APB8_CTRL_MACRO__ */
+
+/** @} end of apb8_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_apb9_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_apb9_ctrl apb9_ctrl
+ * @brief Contains register fields associated with apb9_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_APB9_CTRL_MACRO__
+#define __WRPR_APB9_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 9  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR_APB9_CTRL__CLK_ENABLE__SHIFT                                     0
+#define WRPR_APB9_CTRL__CLK_ENABLE__WIDTH                                     1
+#define WRPR_APB9_CTRL__CLK_ENABLE__MASK                            0x00000001U
+#define WRPR_APB9_CTRL__CLK_ENABLE__READ(src)   ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB9_CTRL__CLK_ENABLE__WRITE(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB9_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_APB9_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_APB9_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_APB9_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_APB9_CTRL__CLK_ENABLE__RESET_VALUE                     0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 9  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR_APB9_CTRL__SRESET__SHIFT                                         1
+#define WRPR_APB9_CTRL__SRESET__WIDTH                                         1
+#define WRPR_APB9_CTRL__SRESET__MASK                                0x00000002U
+#define WRPR_APB9_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_APB9_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_APB9_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_APB9_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_APB9_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_APB9_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_APB9_CTRL__SRESET__RESET_VALUE                         0x00000001U
+/** @} */
+#define WRPR_APB9_CTRL__TYPE                                           uint32_t
+#define WRPR_APB9_CTRL__READ                                        0x00000003U
+#define WRPR_APB9_CTRL__WRITE                                       0x00000003U
+#define WRPR_APB9_CTRL__PRESERVED                                   0x00000000U
+#define WRPR_APB9_CTRL__RESET_VALUE                                 0x00000002U
+
+#endif /* __WRPR_APB9_CTRL_MACRO__ */
+
+/** @} end of apb9_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_apb10_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_apb10_ctrl apb10_ctrl
+ * @brief Contains register fields associated with apb10_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_APB10_CTRL_MACRO__
+#define __WRPR_APB10_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 10  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR_APB10_CTRL__CLK_ENABLE__SHIFT                                    0
+#define WRPR_APB10_CTRL__CLK_ENABLE__WIDTH                                    1
+#define WRPR_APB10_CTRL__CLK_ENABLE__MASK                           0x00000001U
+#define WRPR_APB10_CTRL__CLK_ENABLE__READ(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB10_CTRL__CLK_ENABLE__WRITE(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB10_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_APB10_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_APB10_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_APB10_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_APB10_CTRL__CLK_ENABLE__RESET_VALUE                    0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 10  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR_APB10_CTRL__SRESET__SHIFT                                        1
+#define WRPR_APB10_CTRL__SRESET__WIDTH                                        1
+#define WRPR_APB10_CTRL__SRESET__MASK                               0x00000002U
+#define WRPR_APB10_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_APB10_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_APB10_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_APB10_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_APB10_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_APB10_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_APB10_CTRL__SRESET__RESET_VALUE                        0x00000001U
+/** @} */
+#define WRPR_APB10_CTRL__TYPE                                          uint32_t
+#define WRPR_APB10_CTRL__READ                                       0x00000003U
+#define WRPR_APB10_CTRL__WRITE                                      0x00000003U
+#define WRPR_APB10_CTRL__PRESERVED                                  0x00000000U
+#define WRPR_APB10_CTRL__RESET_VALUE                                0x00000002U
+
+#endif /* __WRPR_APB10_CTRL_MACRO__ */
+
+/** @} end of apb10_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_apb11_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_apb11_ctrl apb11_ctrl
+ * @brief Contains register fields associated with apb11_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_APB11_CTRL_MACRO__
+#define __WRPR_APB11_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 11  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR_APB11_CTRL__CLK_ENABLE__SHIFT                                    0
+#define WRPR_APB11_CTRL__CLK_ENABLE__WIDTH                                    1
+#define WRPR_APB11_CTRL__CLK_ENABLE__MASK                           0x00000001U
+#define WRPR_APB11_CTRL__CLK_ENABLE__READ(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB11_CTRL__CLK_ENABLE__WRITE(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB11_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_APB11_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_APB11_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_APB11_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_APB11_CTRL__CLK_ENABLE__RESET_VALUE                    0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 11  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR_APB11_CTRL__SRESET__SHIFT                                        1
+#define WRPR_APB11_CTRL__SRESET__WIDTH                                        1
+#define WRPR_APB11_CTRL__SRESET__MASK                               0x00000002U
+#define WRPR_APB11_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_APB11_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_APB11_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_APB11_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_APB11_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_APB11_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_APB11_CTRL__SRESET__RESET_VALUE                        0x00000001U
+/** @} */
+#define WRPR_APB11_CTRL__TYPE                                          uint32_t
+#define WRPR_APB11_CTRL__READ                                       0x00000003U
+#define WRPR_APB11_CTRL__WRITE                                      0x00000003U
+#define WRPR_APB11_CTRL__PRESERVED                                  0x00000000U
+#define WRPR_APB11_CTRL__RESET_VALUE                                0x00000002U
+
+#endif /* __WRPR_APB11_CTRL_MACRO__ */
+
+/** @} end of apb11_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_apb12_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_apb12_ctrl apb12_ctrl
+ * @brief Contains register fields associated with apb12_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_APB12_CTRL_MACRO__
+#define __WRPR_APB12_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 12  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR_APB12_CTRL__CLK_ENABLE__SHIFT                                    0
+#define WRPR_APB12_CTRL__CLK_ENABLE__WIDTH                                    1
+#define WRPR_APB12_CTRL__CLK_ENABLE__MASK                           0x00000001U
+#define WRPR_APB12_CTRL__CLK_ENABLE__READ(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB12_CTRL__CLK_ENABLE__WRITE(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB12_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_APB12_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_APB12_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_APB12_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_APB12_CTRL__CLK_ENABLE__RESET_VALUE                    0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 12  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR_APB12_CTRL__SRESET__SHIFT                                        1
+#define WRPR_APB12_CTRL__SRESET__WIDTH                                        1
+#define WRPR_APB12_CTRL__SRESET__MASK                               0x00000002U
+#define WRPR_APB12_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_APB12_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_APB12_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_APB12_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_APB12_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_APB12_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_APB12_CTRL__SRESET__RESET_VALUE                        0x00000001U
+/** @} */
+#define WRPR_APB12_CTRL__TYPE                                          uint32_t
+#define WRPR_APB12_CTRL__READ                                       0x00000003U
+#define WRPR_APB12_CTRL__WRITE                                      0x00000003U
+#define WRPR_APB12_CTRL__PRESERVED                                  0x00000000U
+#define WRPR_APB12_CTRL__RESET_VALUE                                0x00000002U
+
+#endif /* __WRPR_APB12_CTRL_MACRO__ */
+
+/** @} end of apb12_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_apb13_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_apb13_ctrl apb13_ctrl
+ * @brief Contains register fields associated with apb13_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_APB13_CTRL_MACRO__
+#define __WRPR_APB13_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 13  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR_APB13_CTRL__CLK_ENABLE__SHIFT                                    0
+#define WRPR_APB13_CTRL__CLK_ENABLE__WIDTH                                    1
+#define WRPR_APB13_CTRL__CLK_ENABLE__MASK                           0x00000001U
+#define WRPR_APB13_CTRL__CLK_ENABLE__READ(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB13_CTRL__CLK_ENABLE__WRITE(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB13_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_APB13_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_APB13_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_APB13_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_APB13_CTRL__CLK_ENABLE__RESET_VALUE                    0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 13  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR_APB13_CTRL__SRESET__SHIFT                                        1
+#define WRPR_APB13_CTRL__SRESET__WIDTH                                        1
+#define WRPR_APB13_CTRL__SRESET__MASK                               0x00000002U
+#define WRPR_APB13_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_APB13_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_APB13_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_APB13_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_APB13_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_APB13_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_APB13_CTRL__SRESET__RESET_VALUE                        0x00000001U
+/** @} */
+#define WRPR_APB13_CTRL__TYPE                                          uint32_t
+#define WRPR_APB13_CTRL__READ                                       0x00000003U
+#define WRPR_APB13_CTRL__WRITE                                      0x00000003U
+#define WRPR_APB13_CTRL__PRESERVED                                  0x00000000U
+#define WRPR_APB13_CTRL__RESET_VALUE                                0x00000002U
+
+#endif /* __WRPR_APB13_CTRL_MACRO__ */
+
+/** @} end of apb13_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_apb14_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_apb14_ctrl apb14_ctrl
+ * @brief Contains register fields associated with apb14_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_APB14_CTRL_MACRO__
+#define __WRPR_APB14_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 14  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR_APB14_CTRL__CLK_ENABLE__SHIFT                                    0
+#define WRPR_APB14_CTRL__CLK_ENABLE__WIDTH                                    1
+#define WRPR_APB14_CTRL__CLK_ENABLE__MASK                           0x00000001U
+#define WRPR_APB14_CTRL__CLK_ENABLE__READ(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB14_CTRL__CLK_ENABLE__WRITE(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB14_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_APB14_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_APB14_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_APB14_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_APB14_CTRL__CLK_ENABLE__RESET_VALUE                    0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 14  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR_APB14_CTRL__SRESET__SHIFT                                        1
+#define WRPR_APB14_CTRL__SRESET__WIDTH                                        1
+#define WRPR_APB14_CTRL__SRESET__MASK                               0x00000002U
+#define WRPR_APB14_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_APB14_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_APB14_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_APB14_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_APB14_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_APB14_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_APB14_CTRL__SRESET__RESET_VALUE                        0x00000001U
+/** @} */
+#define WRPR_APB14_CTRL__TYPE                                          uint32_t
+#define WRPR_APB14_CTRL__READ                                       0x00000003U
+#define WRPR_APB14_CTRL__WRITE                                      0x00000003U
+#define WRPR_APB14_CTRL__PRESERVED                                  0x00000000U
+#define WRPR_APB14_CTRL__RESET_VALUE                                0x00000002U
+
+#endif /* __WRPR_APB14_CTRL_MACRO__ */
+
+/** @} end of apb14_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_apb15_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_apb15_ctrl apb15_ctrl
+ * @brief Contains register fields associated with apb15_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_APB15_CTRL_MACRO__
+#define __WRPR_APB15_CTRL_MACRO__
+
+/* macros for field clk_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_enable_field clk_enable_field
+ * @brief macros for field clk_enable
+ * @details enable clock to peripheral in APB slot 15  1 = clock enabled  0 = clock not enabled
+ * @{
+ */
+#define WRPR_APB15_CTRL__CLK_ENABLE__SHIFT                                    0
+#define WRPR_APB15_CTRL__CLK_ENABLE__WIDTH                                    1
+#define WRPR_APB15_CTRL__CLK_ENABLE__MASK                           0x00000001U
+#define WRPR_APB15_CTRL__CLK_ENABLE__READ(src)  ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB15_CTRL__CLK_ENABLE__WRITE(src) ((uint32_t)(src) & 0x00000001U)
+#define WRPR_APB15_CTRL__CLK_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_APB15_CTRL__CLK_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_APB15_CTRL__CLK_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_APB15_CTRL__CLK_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_APB15_CTRL__CLK_ENABLE__RESET_VALUE                    0x00000000U
+/** @} */
+
+/* macros for field sreset */
+/**
+ * @defgroup at_apb_wrpr_regs_core_sreset_field sreset_field
+ * @brief macros for field sreset
+ * @details reset peripheral in APB slot 15  1 = reset  0 = not reset
+ * @{
+ */
+#define WRPR_APB15_CTRL__SRESET__SHIFT                                        1
+#define WRPR_APB15_CTRL__SRESET__WIDTH                                        1
+#define WRPR_APB15_CTRL__SRESET__MASK                               0x00000002U
+#define WRPR_APB15_CTRL__SRESET__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_APB15_CTRL__SRESET__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_APB15_CTRL__SRESET__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_APB15_CTRL__SRESET__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_APB15_CTRL__SRESET__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_APB15_CTRL__SRESET__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_APB15_CTRL__SRESET__RESET_VALUE                        0x00000001U
+/** @} */
+#define WRPR_APB15_CTRL__TYPE                                          uint32_t
+#define WRPR_APB15_CTRL__READ                                       0x00000003U
+#define WRPR_APB15_CTRL__WRITE                                      0x00000003U
+#define WRPR_APB15_CTRL__PRESERVED                                  0x00000000U
+#define WRPR_APB15_CTRL__RESET_VALUE                                0x00000002U
+
+#endif /* __WRPR_APB15_CTRL_MACRO__ */
+
+/** @} end of apb15_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_clk_hpc_pin_out_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_hpc_pin_out_ctrl clk_hpc_pin_out_ctrl
+ * @brief Contains register fields associated with clk_hpc_pin_out_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_CLK_HPC_PIN_OUT_CTRL_MACRO__
+#define __WRPR_CLK_HPC_PIN_OUT_CTRL_MACRO__
+
+/* macros for field clk_hpc_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_hpc_sel_field clk_hpc_sel_field
+ * @brief macros for field clk_hpc_sel
+ * @details divide ratio for clk_hpc going out for external observation
+ * @{
+ */
+#define WRPR_CLK_HPC_PIN_OUT_CTRL__CLK_HPC_SEL__SHIFT                         0
+#define WRPR_CLK_HPC_PIN_OUT_CTRL__CLK_HPC_SEL__WIDTH                         2
+#define WRPR_CLK_HPC_PIN_OUT_CTRL__CLK_HPC_SEL__MASK                0x00000003U
+#define WRPR_CLK_HPC_PIN_OUT_CTRL__CLK_HPC_SEL__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0x00000003U)
+#define WRPR_CLK_HPC_PIN_OUT_CTRL__CLK_HPC_SEL__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0x00000003U)
+#define WRPR_CLK_HPC_PIN_OUT_CTRL__CLK_HPC_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000003U) | ((uint32_t)(src) &\
+                    0x00000003U)
+#define WRPR_CLK_HPC_PIN_OUT_CTRL__CLK_HPC_SEL__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000003U)))
+#define WRPR_CLK_HPC_PIN_OUT_CTRL__CLK_HPC_SEL__RESET_VALUE         0x00000000U
+/** @} */
+#define WRPR_CLK_HPC_PIN_OUT_CTRL__TYPE                                uint32_t
+#define WRPR_CLK_HPC_PIN_OUT_CTRL__READ                             0x00000003U
+#define WRPR_CLK_HPC_PIN_OUT_CTRL__WRITE                            0x00000003U
+#define WRPR_CLK_HPC_PIN_OUT_CTRL__PRESERVED                        0x00000000U
+#define WRPR_CLK_HPC_PIN_OUT_CTRL__RESET_VALUE                      0x00000000U
+
+#endif /* __WRPR_CLK_HPC_PIN_OUT_CTRL_MACRO__ */
+
+/** @} end of clk_hpc_pin_out_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_clk_hmc_pin_out_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_hmc_pin_out_ctrl clk_hmc_pin_out_ctrl
+ * @brief Contains register fields associated with clk_hmc_pin_out_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_CLK_HMC_PIN_OUT_CTRL_MACRO__
+#define __WRPR_CLK_HMC_PIN_OUT_CTRL_MACRO__
+
+/* macros for field clk_mpc_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_mpc_sel_field clk_mpc_sel_field
+ * @brief macros for field clk_mpc_sel
+ * @details divide ratio for clk_mpc going out for external observation
+ * @{
+ */
+#define WRPR_CLK_HMC_PIN_OUT_CTRL__CLK_MPC_SEL__SHIFT                         0
+#define WRPR_CLK_HMC_PIN_OUT_CTRL__CLK_MPC_SEL__WIDTH                         2
+#define WRPR_CLK_HMC_PIN_OUT_CTRL__CLK_MPC_SEL__MASK                0x00000003U
+#define WRPR_CLK_HMC_PIN_OUT_CTRL__CLK_MPC_SEL__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0x00000003U)
+#define WRPR_CLK_HMC_PIN_OUT_CTRL__CLK_MPC_SEL__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0x00000003U)
+#define WRPR_CLK_HMC_PIN_OUT_CTRL__CLK_MPC_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000003U) | ((uint32_t)(src) &\
+                    0x00000003U)
+#define WRPR_CLK_HMC_PIN_OUT_CTRL__CLK_MPC_SEL__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000003U)))
+#define WRPR_CLK_HMC_PIN_OUT_CTRL__CLK_MPC_SEL__RESET_VALUE         0x00000000U
+/** @} */
+#define WRPR_CLK_HMC_PIN_OUT_CTRL__TYPE                                uint32_t
+#define WRPR_CLK_HMC_PIN_OUT_CTRL__READ                             0x00000003U
+#define WRPR_CLK_HMC_PIN_OUT_CTRL__WRITE                            0x00000003U
+#define WRPR_CLK_HMC_PIN_OUT_CTRL__PRESERVED                        0x00000000U
+#define WRPR_CLK_HMC_PIN_OUT_CTRL__RESET_VALUE                      0x00000000U
+
+#endif /* __WRPR_CLK_HMC_PIN_OUT_CTRL_MACRO__ */
+
+/** @} end of clk_hmc_pin_out_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_clk_lmc_pin_out_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_lmc_pin_out_ctrl clk_lmc_pin_out_ctrl
+ * @brief Contains register fields associated with clk_lmc_pin_out_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_CLK_LMC_PIN_OUT_CTRL_MACRO__
+#define __WRPR_CLK_LMC_PIN_OUT_CTRL_MACRO__
+
+/* macros for field clk_lpc_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_clk_lpc_sel_field clk_lpc_sel_field
+ * @brief macros for field clk_lpc_sel
+ * @details enable for clk_lpc going out for external observation
+ * @{
+ */
+#define WRPR_CLK_LMC_PIN_OUT_CTRL__CLK_LPC_SEL__SHIFT                         0
+#define WRPR_CLK_LMC_PIN_OUT_CTRL__CLK_LPC_SEL__WIDTH                         1
+#define WRPR_CLK_LMC_PIN_OUT_CTRL__CLK_LPC_SEL__MASK                0x00000001U
+#define WRPR_CLK_LMC_PIN_OUT_CTRL__CLK_LPC_SEL__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0x00000001U)
+#define WRPR_CLK_LMC_PIN_OUT_CTRL__CLK_LPC_SEL__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0x00000001U)
+#define WRPR_CLK_LMC_PIN_OUT_CTRL__CLK_LPC_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_CLK_LMC_PIN_OUT_CTRL__CLK_LPC_SEL__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_CLK_LMC_PIN_OUT_CTRL__CLK_LPC_SEL__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_CLK_LMC_PIN_OUT_CTRL__CLK_LPC_SEL__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_CLK_LMC_PIN_OUT_CTRL__CLK_LPC_SEL__RESET_VALUE         0x00000000U
+/** @} */
+#define WRPR_CLK_LMC_PIN_OUT_CTRL__TYPE                                uint32_t
+#define WRPR_CLK_LMC_PIN_OUT_CTRL__READ                             0x00000001U
+#define WRPR_CLK_LMC_PIN_OUT_CTRL__WRITE                            0x00000001U
+#define WRPR_CLK_LMC_PIN_OUT_CTRL__PRESERVED                        0x00000000U
+#define WRPR_CLK_LMC_PIN_OUT_CTRL__RESET_VALUE                      0x00000000U
+
+#endif /* __WRPR_CLK_LMC_PIN_OUT_CTRL_MACRO__ */
+
+/** @} end of clk_lmc_pin_out_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_dbg_ctrl */
+/**
+ * @defgroup at_apb_wrpr_regs_core_dbg_ctrl dbg_ctrl
+ * @brief Contains register fields associated with dbg_ctrl. definitions.
+ * @{
+ */
+#ifndef __WRPR_DBG_CTRL_MACRO__
+#define __WRPR_DBG_CTRL_MACRO__
+
+/* macros for field ble_dbg_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_ble_dbg_sel_field ble_dbg_sel_field
+ * @brief macros for field ble_dbg_sel
+ * @details select which bus goes off-chip
+ * @{
+ */
+#define WRPR_DBG_CTRL__BLE_DBG_SEL__SHIFT                                     0
+#define WRPR_DBG_CTRL__BLE_DBG_SEL__WIDTH                                     4
+#define WRPR_DBG_CTRL__BLE_DBG_SEL__MASK                            0x0000000fU
+#define WRPR_DBG_CTRL__BLE_DBG_SEL__READ(src)   ((uint32_t)(src) & 0x0000000fU)
+#define WRPR_DBG_CTRL__BLE_DBG_SEL__WRITE(src)  ((uint32_t)(src) & 0x0000000fU)
+#define WRPR_DBG_CTRL__BLE_DBG_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x0000000fU) | ((uint32_t)(src) &\
+                    0x0000000fU)
+#define WRPR_DBG_CTRL__BLE_DBG_SEL__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x0000000fU)))
+#define WRPR_DBG_CTRL__BLE_DBG_SEL__RESET_VALUE                     0x00000005U
+/** @} */
+
+/* macros for field em_block_wdata */
+/**
+ * @defgroup at_apb_wrpr_regs_core_em_block_wdata_field em_block_wdata_field
+ * @brief macros for field em_block_wdata
+ * @details not intended to be used; helps with cpf isolation issues
+ * @{
+ */
+#define WRPR_DBG_CTRL__EM_BLOCK_WDATA__SHIFT                                  4
+#define WRPR_DBG_CTRL__EM_BLOCK_WDATA__WIDTH                                  1
+#define WRPR_DBG_CTRL__EM_BLOCK_WDATA__MASK                         0x00000010U
+#define WRPR_DBG_CTRL__EM_BLOCK_WDATA__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000010U) >> 4)
+#define WRPR_DBG_CTRL__EM_BLOCK_WDATA__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 4) & 0x00000010U)
+#define WRPR_DBG_CTRL__EM_BLOCK_WDATA__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000010U) | (((uint32_t)(src) <<\
+                    4) & 0x00000010U)
+#define WRPR_DBG_CTRL__EM_BLOCK_WDATA__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 4) & ~0x00000010U)))
+#define WRPR_DBG_CTRL__EM_BLOCK_WDATA__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000010U) | ((uint32_t)(1) << 4)
+#define WRPR_DBG_CTRL__EM_BLOCK_WDATA__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000010U) | ((uint32_t)(0) << 4)
+#define WRPR_DBG_CTRL__EM_BLOCK_WDATA__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field em_block_addr */
+/**
+ * @defgroup at_apb_wrpr_regs_core_em_block_addr_field em_block_addr_field
+ * @brief macros for field em_block_addr
+ * @details not intended to be used; helps with cpf isolation issues
+ * @{
+ */
+#define WRPR_DBG_CTRL__EM_BLOCK_ADDR__SHIFT                                   5
+#define WRPR_DBG_CTRL__EM_BLOCK_ADDR__WIDTH                                   1
+#define WRPR_DBG_CTRL__EM_BLOCK_ADDR__MASK                          0x00000020U
+#define WRPR_DBG_CTRL__EM_BLOCK_ADDR__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000020U) >> 5)
+#define WRPR_DBG_CTRL__EM_BLOCK_ADDR__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 5) & 0x00000020U)
+#define WRPR_DBG_CTRL__EM_BLOCK_ADDR__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000020U) | (((uint32_t)(src) <<\
+                    5) & 0x00000020U)
+#define WRPR_DBG_CTRL__EM_BLOCK_ADDR__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 5) & ~0x00000020U)))
+#define WRPR_DBG_CTRL__EM_BLOCK_ADDR__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000020U) | ((uint32_t)(1) << 5)
+#define WRPR_DBG_CTRL__EM_BLOCK_ADDR__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000020U) | ((uint32_t)(0) << 5)
+#define WRPR_DBG_CTRL__EM_BLOCK_ADDR__RESET_VALUE                   0x00000000U
+/** @} */
+#define WRPR_DBG_CTRL__TYPE                                            uint32_t
+#define WRPR_DBG_CTRL__READ                                         0x0000003fU
+#define WRPR_DBG_CTRL__WRITE                                        0x0000003fU
+#define WRPR_DBG_CTRL__PRESERVED                                    0x00000000U
+#define WRPR_DBG_CTRL__RESET_VALUE                                  0x00000005U
+
+#endif /* __WRPR_DBG_CTRL_MACRO__ */
+
+/** @} end of dbg_ctrl */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_pin_selection_A */
+/**
+ * @defgroup at_apb_wrpr_regs_core_pin_selection_A pin_selection_A
+ * @brief Contains register fields associated with pin_selection_A. definitions.
+ * @{
+ */
+#ifndef __WRPR_PIN_SELECTION_A_MACRO__
+#define __WRPR_PIN_SELECTION_A_MACRO__
+
+/* macros for field p5_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p5_sel_field p5_sel_field
+ * @brief macros for field p5_sel
+ * @details pin selection setting for P5  P5_GPIO_5_ 0  P5_KSI_14_ 1  P5_UART1_TX 2  P5_PWM_0_ 3  P5_KSO_14_ 7  P5_KSO_13_ 8  P5_KSO_11_ 9  P5_BLE_IN_PROCESS 10  P5_QSPI_CS 11
+ * @{
+ */
+#define WRPR_PIN_SELECTION_A__P5_SEL__SHIFT                                   2
+#define WRPR_PIN_SELECTION_A__P5_SEL__WIDTH                                   5
+#define WRPR_PIN_SELECTION_A__P5_SEL__MASK                          0x0000007cU
+#define WRPR_PIN_SELECTION_A__P5_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x0000007cU) >> 2)
+#define WRPR_PIN_SELECTION_A__P5_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 2) & 0x0000007cU)
+#define WRPR_PIN_SELECTION_A__P5_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x0000007cU) | (((uint32_t)(src) <<\
+                    2) & 0x0000007cU)
+#define WRPR_PIN_SELECTION_A__P5_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 2) & ~0x0000007cU)))
+#define WRPR_PIN_SELECTION_A__P5_SEL__RESET_VALUE                   0x00000000U
+/** @} */
+
+/* macros for field p4_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p4_sel_field p4_sel_field
+ * @brief macros for field p4_sel
+ * @details pin selection setting for P4  P4_GPIO_4_ 0  P4_KSI_15_ 1  P4_UART1_RX 2  P4_I2C0_SDA 3  P4_KSO_15_ 5  P4_KSO_12_ 6  P4_KSO_10_ 7  P4_SHUB0_SDA 8  P4_QSPI_D_0_ 10
+ * @{
+ */
+#define WRPR_PIN_SELECTION_A__P4_SEL__SHIFT                                   7
+#define WRPR_PIN_SELECTION_A__P4_SEL__WIDTH                                   5
+#define WRPR_PIN_SELECTION_A__P4_SEL__MASK                          0x00000f80U
+#define WRPR_PIN_SELECTION_A__P4_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000f80U) >> 7)
+#define WRPR_PIN_SELECTION_A__P4_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 7) & 0x00000f80U)
+#define WRPR_PIN_SELECTION_A__P4_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000f80U) | (((uint32_t)(src) <<\
+                    7) & 0x00000f80U)
+#define WRPR_PIN_SELECTION_A__P4_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 7) & ~0x00000f80U)))
+#define WRPR_PIN_SELECTION_A__P4_SEL__RESET_VALUE                   0x00000000U
+/** @} */
+
+/* macros for field p3_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p3_sel_field p3_sel_field
+ * @brief macros for field p3_sel
+ * @details pin selection setting for P3  P3_GPIO_3_ 0  P3_KSI_16_ 1  P3_QDY_0_ 2  P3_UART1_RTS 3  P3_I2C0_SCK 4  P3_KSO_16_ 6  P3_KSO_11_ 7  P3_KSO_9_ 8  P3_SHUB0_SCK 9
+ * @{
+ */
+#define WRPR_PIN_SELECTION_A__P3_SEL__SHIFT                                  12
+#define WRPR_PIN_SELECTION_A__P3_SEL__WIDTH                                   5
+#define WRPR_PIN_SELECTION_A__P3_SEL__MASK                          0x0001f000U
+#define WRPR_PIN_SELECTION_A__P3_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x0001f000U) >> 12)
+#define WRPR_PIN_SELECTION_A__P3_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 12) & 0x0001f000U)
+#define WRPR_PIN_SELECTION_A__P3_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x0001f000U) | (((uint32_t)(src) <<\
+                    12) & 0x0001f000U)
+#define WRPR_PIN_SELECTION_A__P3_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 12) & ~0x0001f000U)))
+#define WRPR_PIN_SELECTION_A__P3_SEL__RESET_VALUE                   0x00000000U
+/** @} */
+
+/* macros for field p2_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p2_sel_field p2_sel_field
+ * @brief macros for field p2_sel
+ * @details pin selection setting for P2  P2_GPIO_2_ 0  P2_KSI_17_ 1  P2_QDY_1_ 2  P2_KSO_17_ 3  P2_KSO_10_ 4  P2_KSO_8_ 5  P2_SHUB1_MOSI 6  P2_SPI1_MOSI 8
+ * @{
+ */
+#define WRPR_PIN_SELECTION_A__P2_SEL__SHIFT                                  17
+#define WRPR_PIN_SELECTION_A__P2_SEL__WIDTH                                   5
+#define WRPR_PIN_SELECTION_A__P2_SEL__MASK                          0x003e0000U
+#define WRPR_PIN_SELECTION_A__P2_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x003e0000U) >> 17)
+#define WRPR_PIN_SELECTION_A__P2_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 17) & 0x003e0000U)
+#define WRPR_PIN_SELECTION_A__P2_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x003e0000U) | (((uint32_t)(src) <<\
+                    17) & 0x003e0000U)
+#define WRPR_PIN_SELECTION_A__P2_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 17) & ~0x003e0000U)))
+#define WRPR_PIN_SELECTION_A__P2_SEL__RESET_VALUE                   0x00000000U
+/** @} */
+
+/* macros for field p1_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p1_sel_field p1_sel_field
+ * @brief macros for field p1_sel
+ * @details pin selection setting for P1  P1_GPIO_1_ 0  P1_KSI_18_ 1  P1_QDZ_0_ 2  P1_KSO_18_ 3  P1_KSO_9_ 4  P1_SHUB1_CS 5  P1_SPI1_CS 7
+ * @{
+ */
+#define WRPR_PIN_SELECTION_A__P1_SEL__SHIFT                                  22
+#define WRPR_PIN_SELECTION_A__P1_SEL__WIDTH                                   5
+#define WRPR_PIN_SELECTION_A__P1_SEL__MASK                          0x07c00000U
+#define WRPR_PIN_SELECTION_A__P1_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x07c00000U) >> 22)
+#define WRPR_PIN_SELECTION_A__P1_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 22) & 0x07c00000U)
+#define WRPR_PIN_SELECTION_A__P1_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x07c00000U) | (((uint32_t)(src) <<\
+                    22) & 0x07c00000U)
+#define WRPR_PIN_SELECTION_A__P1_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 22) & ~0x07c00000U)))
+#define WRPR_PIN_SELECTION_A__P1_SEL__RESET_VALUE                   0x00000000U
+/** @} */
+
+/* macros for field p0_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p0_sel_field p0_sel_field
+ * @brief macros for field p0_sel
+ * @details pin selection setting for P0  P0_GPIO_0_ 0  P0_KSI_19_ 1  P0_QDZ_1_ 2  P0_KSO_19_ 3  P0_KSO_8_ 4  P0_SHUB1_CLK 5  P0_XPAON 6  P0_SPI1_CLK 7
+ * @{
+ */
+#define WRPR_PIN_SELECTION_A__P0_SEL__SHIFT                                  27
+#define WRPR_PIN_SELECTION_A__P0_SEL__WIDTH                                   5
+#define WRPR_PIN_SELECTION_A__P0_SEL__MASK                          0xf8000000U
+#define WRPR_PIN_SELECTION_A__P0_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0xf8000000U) >> 27)
+#define WRPR_PIN_SELECTION_A__P0_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 27) & 0xf8000000U)
+#define WRPR_PIN_SELECTION_A__P0_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xf8000000U) | (((uint32_t)(src) <<\
+                    27) & 0xf8000000U)
+#define WRPR_PIN_SELECTION_A__P0_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 27) & ~0xf8000000U)))
+#define WRPR_PIN_SELECTION_A__P0_SEL__RESET_VALUE                   0x00000000U
+/** @} */
+#define WRPR_PIN_SELECTION_A__TYPE                                     uint32_t
+#define WRPR_PIN_SELECTION_A__READ                                  0xfffffffcU
+#define WRPR_PIN_SELECTION_A__WRITE                                 0xfffffffcU
+#define WRPR_PIN_SELECTION_A__PRESERVED                             0x00000000U
+#define WRPR_PIN_SELECTION_A__RESET_VALUE                           0x00000000U
+
+#endif /* __WRPR_PIN_SELECTION_A_MACRO__ */
+
+/** @} end of pin_selection_A */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_pin_selection_B */
+/**
+ * @defgroup at_apb_wrpr_regs_core_pin_selection_B pin_selection_B
+ * @brief Contains register fields associated with pin_selection_B. definitions.
+ * @{
+ */
+#ifndef __WRPR_PIN_SELECTION_B_MACRO__
+#define __WRPR_PIN_SELECTION_B_MACRO__
+
+/* macros for field p11_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p11_sel_field p11_sel_field
+ * @brief macros for field p11_sel
+ * @details pin selection setting for P11  P11_GPIO_11_ 0  P11_KSI_8_ 1  P11_SPI0_CS 2  P11_PWM_2_ 3  P11_UART0_TX 7  P11_KSO_8_ 8  P11_SPI0_MOSI 9  P11_I2C1_SCK 10  P11_KSO_19_ 13  P11_KSO_17_ 14  P11_UART0_CTS 15  P11_SHUB0_MOSI 16  P11_SHUB1_SCK 17  P11_SHUB0_CS 18  P11_XPAON 19
+ * @{
+ */
+#define WRPR_PIN_SELECTION_B__P11_SEL__SHIFT                                  2
+#define WRPR_PIN_SELECTION_B__P11_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_B__P11_SEL__MASK                         0x0000007cU
+#define WRPR_PIN_SELECTION_B__P11_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x0000007cU) >> 2)
+#define WRPR_PIN_SELECTION_B__P11_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 2) & 0x0000007cU)
+#define WRPR_PIN_SELECTION_B__P11_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x0000007cU) | (((uint32_t)(src) <<\
+                    2) & 0x0000007cU)
+#define WRPR_PIN_SELECTION_B__P11_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 2) & ~0x0000007cU)))
+#define WRPR_PIN_SELECTION_B__P11_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p10_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p10_sel_field p10_sel_field
+ * @brief macros for field p10_sel
+ * @details pin selection setting for P10  P10_GPIO_10_ 0  P10_KSI_9_ 1  P10_SPI0_CLK 2  P10_PWM_1_ 3  P10_UART0_RX 7  P10_KSO_9_ 8  P10_SPI0_CS 9  P10_I2C0_SDA 10  P10_WURX_DET_1_ 12  P10_KSO_18_ 14  P10_KSO_16_ 15  P10_SHUB0_CS 16  P10_SHUB0_SDA 17  P10_SHUB0_CLK 18  P10_PDM_IN 20  P10_XPAON 21
+ * @{
+ */
+#define WRPR_PIN_SELECTION_B__P10_SEL__SHIFT                                  7
+#define WRPR_PIN_SELECTION_B__P10_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_B__P10_SEL__MASK                         0x00000f80U
+#define WRPR_PIN_SELECTION_B__P10_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000f80U) >> 7)
+#define WRPR_PIN_SELECTION_B__P10_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 7) & 0x00000f80U)
+#define WRPR_PIN_SELECTION_B__P10_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000f80U) | (((uint32_t)(src) <<\
+                    7) & 0x00000f80U)
+#define WRPR_PIN_SELECTION_B__P10_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 7) & ~0x00000f80U)))
+#define WRPR_PIN_SELECTION_B__P10_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p9_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p9_sel_field p9_sel_field
+ * @brief macros for field p9_sel
+ * @details pin selection setting for P9  P9_GPIO_9_ 0  P9_KSI_10_ 1  P9_PWM_2_ 2  P9_SPI1_MISO 3  P9_KSO_10_ 7  P9_SPI0_CLK 8  P9_I2C0_SCK 9  P9_WURX_DET_0_ 11  P9_KSO_17_ 13  P9_KSO_15_ 14  P9_SHUB0_CLK 15  P9_SHUB0_SCK 16  P9_SHUB1_MISO 17  P9_WLAN_RX 18  P9_PDM_CLK 19
+ * @{
+ */
+#define WRPR_PIN_SELECTION_B__P9_SEL__SHIFT                                  12
+#define WRPR_PIN_SELECTION_B__P9_SEL__WIDTH                                   5
+#define WRPR_PIN_SELECTION_B__P9_SEL__MASK                          0x0001f000U
+#define WRPR_PIN_SELECTION_B__P9_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x0001f000U) >> 12)
+#define WRPR_PIN_SELECTION_B__P9_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 12) & 0x0001f000U)
+#define WRPR_PIN_SELECTION_B__P9_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x0001f000U) | (((uint32_t)(src) <<\
+                    12) & 0x0001f000U)
+#define WRPR_PIN_SELECTION_B__P9_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 12) & ~0x0001f000U)))
+#define WRPR_PIN_SELECTION_B__P9_SEL__RESET_VALUE                   0x00000000U
+/** @} */
+
+/* macros for field p8_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p8_sel_field p8_sel_field
+ * @brief macros for field p8_sel
+ * @details pin selection setting for P8  P8_GPIO_8_ 0  P8_KSI_11_ 1  P8_PWM_1_ 2  P8_SPI1_MOSI 3  P8_KSO_11_ 8  P8_KSO_16_ 10  P8_KSO_14_ 11  P8_SHUB1_MOSI 12
+ * @{
+ */
+#define WRPR_PIN_SELECTION_B__P8_SEL__SHIFT                                  17
+#define WRPR_PIN_SELECTION_B__P8_SEL__WIDTH                                   5
+#define WRPR_PIN_SELECTION_B__P8_SEL__MASK                          0x003e0000U
+#define WRPR_PIN_SELECTION_B__P8_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x003e0000U) >> 17)
+#define WRPR_PIN_SELECTION_B__P8_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 17) & 0x003e0000U)
+#define WRPR_PIN_SELECTION_B__P8_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x003e0000U) | (((uint32_t)(src) <<\
+                    17) & 0x003e0000U)
+#define WRPR_PIN_SELECTION_B__P8_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 17) & ~0x003e0000U)))
+#define WRPR_PIN_SELECTION_B__P8_SEL__RESET_VALUE                   0x00000000U
+/** @} */
+
+/* macros for field p7_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p7_sel_field p7_sel_field
+ * @brief macros for field p7_sel
+ * @details pin selection setting for P7  P7_GPIO_7_ 0  P7_KSI_12_ 1  P7_PWM_0_ 2  P7_SPI1_CS 3  P7_KSO_12_ 8  P7_KSO_15_ 9  P7_KSO_13_ 10  P7_SHUB1_CS 11  P7_QSPI_D_2_ 13
+ * @{
+ */
+#define WRPR_PIN_SELECTION_B__P7_SEL__SHIFT                                  22
+#define WRPR_PIN_SELECTION_B__P7_SEL__WIDTH                                   5
+#define WRPR_PIN_SELECTION_B__P7_SEL__MASK                          0x07c00000U
+#define WRPR_PIN_SELECTION_B__P7_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x07c00000U) >> 22)
+#define WRPR_PIN_SELECTION_B__P7_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 22) & 0x07c00000U)
+#define WRPR_PIN_SELECTION_B__P7_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x07c00000U) | (((uint32_t)(src) <<\
+                    22) & 0x07c00000U)
+#define WRPR_PIN_SELECTION_B__P7_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 22) & ~0x07c00000U)))
+#define WRPR_PIN_SELECTION_B__P7_SEL__RESET_VALUE                   0x00000000U
+/** @} */
+
+/* macros for field p6_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p6_sel_field p6_sel_field
+ * @brief macros for field p6_sel
+ * @details pin selection setting for P6  P6_GPIO_6_ 0  P6_KSI_13_ 1  P6_UART1_CTS 2  P6_SPI1_CLK 3  P6_KSO_13_ 8  P6_KSO_14_ 9  P6_KSO_12_ 10  P6_SHUB1_CLK 11  P6_BLE_TX 12  P6_QSPI_D_1_ 13
+ * @{
+ */
+#define WRPR_PIN_SELECTION_B__P6_SEL__SHIFT                                  27
+#define WRPR_PIN_SELECTION_B__P6_SEL__WIDTH                                   5
+#define WRPR_PIN_SELECTION_B__P6_SEL__MASK                          0xf8000000U
+#define WRPR_PIN_SELECTION_B__P6_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0xf8000000U) >> 27)
+#define WRPR_PIN_SELECTION_B__P6_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 27) & 0xf8000000U)
+#define WRPR_PIN_SELECTION_B__P6_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xf8000000U) | (((uint32_t)(src) <<\
+                    27) & 0xf8000000U)
+#define WRPR_PIN_SELECTION_B__P6_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 27) & ~0xf8000000U)))
+#define WRPR_PIN_SELECTION_B__P6_SEL__RESET_VALUE                   0x00000000U
+/** @} */
+#define WRPR_PIN_SELECTION_B__TYPE                                     uint32_t
+#define WRPR_PIN_SELECTION_B__READ                                  0xfffffffcU
+#define WRPR_PIN_SELECTION_B__WRITE                                 0xfffffffcU
+#define WRPR_PIN_SELECTION_B__PRESERVED                             0x00000000U
+#define WRPR_PIN_SELECTION_B__RESET_VALUE                           0x00000000U
+
+#endif /* __WRPR_PIN_SELECTION_B_MACRO__ */
+
+/** @} end of pin_selection_B */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_pin_selection_C */
+/**
+ * @defgroup at_apb_wrpr_regs_core_pin_selection_C pin_selection_C
+ * @brief Contains register fields associated with pin_selection_C. definitions.
+ * @{
+ */
+#ifndef __WRPR_PIN_SELECTION_C_MACRO__
+#define __WRPR_PIN_SELECTION_C_MACRO__
+
+/* macros for field p17_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p17_sel_field p17_sel_field
+ * @brief macros for field p17_sel
+ * @details pin selection setting for P17  P17_QSPI_D_1_ 0  P17_QSPI_CLK 1  P17_QSPI_D_0_ 2
+ * @{
+ */
+#define WRPR_PIN_SELECTION_C__P17_SEL__SHIFT                                  2
+#define WRPR_PIN_SELECTION_C__P17_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_C__P17_SEL__MASK                         0x0000007cU
+#define WRPR_PIN_SELECTION_C__P17_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x0000007cU) >> 2)
+#define WRPR_PIN_SELECTION_C__P17_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 2) & 0x0000007cU)
+#define WRPR_PIN_SELECTION_C__P17_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x0000007cU) | (((uint32_t)(src) <<\
+                    2) & 0x0000007cU)
+#define WRPR_PIN_SELECTION_C__P17_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 2) & ~0x0000007cU)))
+#define WRPR_PIN_SELECTION_C__P17_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p16_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p16_sel_field p16_sel_field
+ * @brief macros for field p16_sel
+ * @details pin selection setting for P16  P16_QSPI_D_0_ 0
+ * @{
+ */
+#define WRPR_PIN_SELECTION_C__P16_SEL__SHIFT                                  7
+#define WRPR_PIN_SELECTION_C__P16_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_C__P16_SEL__MASK                         0x00000f80U
+#define WRPR_PIN_SELECTION_C__P16_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000f80U) >> 7)
+#define WRPR_PIN_SELECTION_C__P16_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 7) & 0x00000f80U)
+#define WRPR_PIN_SELECTION_C__P16_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000f80U) | (((uint32_t)(src) <<\
+                    7) & 0x00000f80U)
+#define WRPR_PIN_SELECTION_C__P16_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 7) & ~0x00000f80U)))
+#define WRPR_PIN_SELECTION_C__P16_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p15_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p15_sel_field p15_sel_field
+ * @brief macros for field p15_sel
+ * @details pin selection setting for P15  P15_QSPI_CS 0
+ * @{
+ */
+#define WRPR_PIN_SELECTION_C__P15_SEL__SHIFT                                 12
+#define WRPR_PIN_SELECTION_C__P15_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_C__P15_SEL__MASK                         0x0001f000U
+#define WRPR_PIN_SELECTION_C__P15_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x0001f000U) >> 12)
+#define WRPR_PIN_SELECTION_C__P15_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 12) & 0x0001f000U)
+#define WRPR_PIN_SELECTION_C__P15_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x0001f000U) | (((uint32_t)(src) <<\
+                    12) & 0x0001f000U)
+#define WRPR_PIN_SELECTION_C__P15_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 12) & ~0x0001f000U)))
+#define WRPR_PIN_SELECTION_C__P15_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p14_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p14_sel_field p14_sel_field
+ * @brief macros for field p14_sel
+ * @details pin selection setting for P14  P14_QSPI_CLK 0  P14_QSPI_D_3_ 1
+ * @{
+ */
+#define WRPR_PIN_SELECTION_C__P14_SEL__SHIFT                                 17
+#define WRPR_PIN_SELECTION_C__P14_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_C__P14_SEL__MASK                         0x003e0000U
+#define WRPR_PIN_SELECTION_C__P14_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x003e0000U) >> 17)
+#define WRPR_PIN_SELECTION_C__P14_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 17) & 0x003e0000U)
+#define WRPR_PIN_SELECTION_C__P14_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x003e0000U) | (((uint32_t)(src) <<\
+                    17) & 0x003e0000U)
+#define WRPR_PIN_SELECTION_C__P14_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 17) & ~0x003e0000U)))
+#define WRPR_PIN_SELECTION_C__P14_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p13_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p13_sel_field p13_sel_field
+ * @brief macros for field p13_sel
+ * @details pin selection setting for P13  P13_GPIO_13_ 0  P13_KSI_6_ 1  P13_QDZ_0_ 2  P13_SPI0_MISO 3  P13_I2C1_SDA 4  P13_KSO_19_ 9  P13_UART0_RTS 10  P13_SHUB0_MISO 11  P13_SHUB1_SDA 12
+ * @{
+ */
+#define WRPR_PIN_SELECTION_C__P13_SEL__SHIFT                                 22
+#define WRPR_PIN_SELECTION_C__P13_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_C__P13_SEL__MASK                         0x07c00000U
+#define WRPR_PIN_SELECTION_C__P13_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x07c00000U) >> 22)
+#define WRPR_PIN_SELECTION_C__P13_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 22) & 0x07c00000U)
+#define WRPR_PIN_SELECTION_C__P13_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x07c00000U) | (((uint32_t)(src) <<\
+                    22) & 0x07c00000U)
+#define WRPR_PIN_SELECTION_C__P13_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 22) & ~0x07c00000U)))
+#define WRPR_PIN_SELECTION_C__P13_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p12_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p12_sel_field p12_sel_field
+ * @brief macros for field p12_sel
+ * @details pin selection setting for P12  P12_GPIO_12_ 0  P12_KSI_7_ 1  P12_QDZ_1_ 2  P12_SPI0_MOSI 3  P12_I2C1_SCK 4  P12_KSO_18_ 9  P12_UART0_CTS 10  P12_SHUB0_MOSI 11  P12_SHUB1_SCK 12
+ * @{
+ */
+#define WRPR_PIN_SELECTION_C__P12_SEL__SHIFT                                 27
+#define WRPR_PIN_SELECTION_C__P12_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_C__P12_SEL__MASK                         0xf8000000U
+#define WRPR_PIN_SELECTION_C__P12_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0xf8000000U) >> 27)
+#define WRPR_PIN_SELECTION_C__P12_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 27) & 0xf8000000U)
+#define WRPR_PIN_SELECTION_C__P12_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xf8000000U) | (((uint32_t)(src) <<\
+                    27) & 0xf8000000U)
+#define WRPR_PIN_SELECTION_C__P12_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 27) & ~0xf8000000U)))
+#define WRPR_PIN_SELECTION_C__P12_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+#define WRPR_PIN_SELECTION_C__TYPE                                     uint32_t
+#define WRPR_PIN_SELECTION_C__READ                                  0xfffffffcU
+#define WRPR_PIN_SELECTION_C__WRITE                                 0xfffffffcU
+#define WRPR_PIN_SELECTION_C__PRESERVED                             0x00000000U
+#define WRPR_PIN_SELECTION_C__RESET_VALUE                           0x00000000U
+
+#endif /* __WRPR_PIN_SELECTION_C_MACRO__ */
+
+/** @} end of pin_selection_C */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_pin_selection_D */
+/**
+ * @defgroup at_apb_wrpr_regs_core_pin_selection_D pin_selection_D
+ * @brief Contains register fields associated with pin_selection_D. definitions.
+ * @{
+ */
+#ifndef __WRPR_PIN_SELECTION_D_MACRO__
+#define __WRPR_PIN_SELECTION_D_MACRO__
+
+/* macros for field p23_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p23_sel_field p23_sel_field
+ * @brief macros for field p23_sel
+ * @details pin selection setting for P23  P23_GPIO_19_ 0  P23_KSI_0_ 1  P23_PWM_6_ 2  P23_SPI0_MISO 3  P23_BLE_DBG_3_ 6  P23_UART0_TX 9  P23_QSPI_D_2_ 10  P23_SHUB0_MISO 13  P23_BLE_IN_PROCESS 14
+ * @{
+ */
+#define WRPR_PIN_SELECTION_D__P23_SEL__SHIFT                                  2
+#define WRPR_PIN_SELECTION_D__P23_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_D__P23_SEL__MASK                         0x0000007cU
+#define WRPR_PIN_SELECTION_D__P23_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x0000007cU) >> 2)
+#define WRPR_PIN_SELECTION_D__P23_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 2) & 0x0000007cU)
+#define WRPR_PIN_SELECTION_D__P23_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x0000007cU) | (((uint32_t)(src) <<\
+                    2) & 0x0000007cU)
+#define WRPR_PIN_SELECTION_D__P23_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 2) & ~0x0000007cU)))
+#define WRPR_PIN_SELECTION_D__P23_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p22_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p22_sel_field p22_sel_field
+ * @brief macros for field p22_sel
+ * @details pin selection setting for P22  P22_GPIO_18_ 0  P22_KSI_1_ 1  P22_PWM_5_ 2  P22_SPI0_MOSI 3  P22_UART0_RX 9  P22_QSPI_D_1_ 10  P22_SHUB0_MOSI 13
+ * @{
+ */
+#define WRPR_PIN_SELECTION_D__P22_SEL__SHIFT                                  7
+#define WRPR_PIN_SELECTION_D__P22_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_D__P22_SEL__MASK                         0x00000f80U
+#define WRPR_PIN_SELECTION_D__P22_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000f80U) >> 7)
+#define WRPR_PIN_SELECTION_D__P22_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 7) & 0x00000f80U)
+#define WRPR_PIN_SELECTION_D__P22_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000f80U) | (((uint32_t)(src) <<\
+                    7) & 0x00000f80U)
+#define WRPR_PIN_SELECTION_D__P22_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 7) & ~0x00000f80U)))
+#define WRPR_PIN_SELECTION_D__P22_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p21_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p21_sel_field p21_sel_field
+ * @brief macros for field p21_sel
+ * @details pin selection setting for P21  P21_GPIO_17_ 0  P21_KSI_2_ 1  P21_PWM_4_ 2  P21_SPI0_CS 3  P21_BLE_DBG_1_ 6  P21_UART0_CTS 10  P21_SHUB0_CS 11
+ * @{
+ */
+#define WRPR_PIN_SELECTION_D__P21_SEL__SHIFT                                 12
+#define WRPR_PIN_SELECTION_D__P21_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_D__P21_SEL__MASK                         0x0001f000U
+#define WRPR_PIN_SELECTION_D__P21_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x0001f000U) >> 12)
+#define WRPR_PIN_SELECTION_D__P21_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 12) & 0x0001f000U)
+#define WRPR_PIN_SELECTION_D__P21_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x0001f000U) | (((uint32_t)(src) <<\
+                    12) & 0x0001f000U)
+#define WRPR_PIN_SELECTION_D__P21_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 12) & ~0x0001f000U)))
+#define WRPR_PIN_SELECTION_D__P21_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p20_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p20_sel_field p20_sel_field
+ * @brief macros for field p20_sel
+ * @details pin selection setting for P20  P20_GPIO_16_ 0  P20_KSI_3_ 1  P20_PWM_3_ 2  P20_SPI0_CLK 3  P20_BLE_DBG_0_ 6  P20_QSPI_D_0_ 9  P20_SHUB0_CLK 12
+ * @{
+ */
+#define WRPR_PIN_SELECTION_D__P20_SEL__SHIFT                                 17
+#define WRPR_PIN_SELECTION_D__P20_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_D__P20_SEL__MASK                         0x003e0000U
+#define WRPR_PIN_SELECTION_D__P20_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x003e0000U) >> 17)
+#define WRPR_PIN_SELECTION_D__P20_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 17) & 0x003e0000U)
+#define WRPR_PIN_SELECTION_D__P20_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x003e0000U) | (((uint32_t)(src) <<\
+                    17) & 0x003e0000U)
+#define WRPR_PIN_SELECTION_D__P20_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 17) & ~0x003e0000U)))
+#define WRPR_PIN_SELECTION_D__P20_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p19_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p19_sel_field p19_sel_field
+ * @brief macros for field p19_sel
+ * @details pin selection setting for P19  P19_QSPI_D_3_ 0  P19_KSI_4_ 1  P19_GPIO_15_ 3  P19_QSPI_CS 4  P19_QSPI_CLK 6
+ * @{
+ */
+#define WRPR_PIN_SELECTION_D__P19_SEL__SHIFT                                 22
+#define WRPR_PIN_SELECTION_D__P19_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_D__P19_SEL__MASK                         0x07c00000U
+#define WRPR_PIN_SELECTION_D__P19_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x07c00000U) >> 22)
+#define WRPR_PIN_SELECTION_D__P19_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 22) & 0x07c00000U)
+#define WRPR_PIN_SELECTION_D__P19_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x07c00000U) | (((uint32_t)(src) <<\
+                    22) & 0x07c00000U)
+#define WRPR_PIN_SELECTION_D__P19_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 22) & ~0x07c00000U)))
+#define WRPR_PIN_SELECTION_D__P19_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p18_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p18_sel_field p18_sel_field
+ * @brief macros for field p18_sel
+ * @details pin selection setting for P18  P18_QSPI_D_2_ 0  P18_KSI_5_ 1  P18_GPIO_14_ 3
+ * @{
+ */
+#define WRPR_PIN_SELECTION_D__P18_SEL__SHIFT                                 27
+#define WRPR_PIN_SELECTION_D__P18_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_D__P18_SEL__MASK                         0xf8000000U
+#define WRPR_PIN_SELECTION_D__P18_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0xf8000000U) >> 27)
+#define WRPR_PIN_SELECTION_D__P18_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 27) & 0xf8000000U)
+#define WRPR_PIN_SELECTION_D__P18_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xf8000000U) | (((uint32_t)(src) <<\
+                    27) & 0xf8000000U)
+#define WRPR_PIN_SELECTION_D__P18_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 27) & ~0xf8000000U)))
+#define WRPR_PIN_SELECTION_D__P18_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+#define WRPR_PIN_SELECTION_D__TYPE                                     uint32_t
+#define WRPR_PIN_SELECTION_D__READ                                  0xfffffffcU
+#define WRPR_PIN_SELECTION_D__WRITE                                 0xfffffffcU
+#define WRPR_PIN_SELECTION_D__PRESERVED                             0x00000000U
+#define WRPR_PIN_SELECTION_D__RESET_VALUE                           0x00000000U
+
+#endif /* __WRPR_PIN_SELECTION_D_MACRO__ */
+
+/** @} end of pin_selection_D */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_pin_selection_E */
+/**
+ * @defgroup at_apb_wrpr_regs_core_pin_selection_E pin_selection_E
+ * @brief Contains register fields associated with pin_selection_E. definitions.
+ * @{
+ */
+#ifndef __WRPR_PIN_SELECTION_E_MACRO__
+#define __WRPR_PIN_SELECTION_E_MACRO__
+
+/* macros for field p29_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p29_sel_field p29_sel_field
+ * @brief macros for field p29_sel
+ * @details pin selection setting for P29  P29_GPIO_25_ 0  P29_KSO_2_ 1  P29_I2C0_SCK 2  P29_UART1_RTS 3  P29_SHUB0_SCK 6
+ * @{
+ */
+#define WRPR_PIN_SELECTION_E__P29_SEL__SHIFT                                  2
+#define WRPR_PIN_SELECTION_E__P29_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_E__P29_SEL__MASK                         0x0000007cU
+#define WRPR_PIN_SELECTION_E__P29_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x0000007cU) >> 2)
+#define WRPR_PIN_SELECTION_E__P29_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 2) & 0x0000007cU)
+#define WRPR_PIN_SELECTION_E__P29_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x0000007cU) | (((uint32_t)(src) <<\
+                    2) & 0x0000007cU)
+#define WRPR_PIN_SELECTION_E__P29_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 2) & ~0x0000007cU)))
+#define WRPR_PIN_SELECTION_E__P29_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p28_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p28_sel_field p28_sel_field
+ * @brief macros for field p28_sel
+ * @details pin selection setting for P28  P28_GPIO_24_ 0  P28_KSO_3_ 1  P28_PWM_7_ 2
+ * @{
+ */
+#define WRPR_PIN_SELECTION_E__P28_SEL__SHIFT                                  7
+#define WRPR_PIN_SELECTION_E__P28_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_E__P28_SEL__MASK                         0x00000f80U
+#define WRPR_PIN_SELECTION_E__P28_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000f80U) >> 7)
+#define WRPR_PIN_SELECTION_E__P28_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 7) & 0x00000f80U)
+#define WRPR_PIN_SELECTION_E__P28_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000f80U) | (((uint32_t)(src) <<\
+                    7) & 0x00000f80U)
+#define WRPR_PIN_SELECTION_E__P28_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 7) & ~0x00000f80U)))
+#define WRPR_PIN_SELECTION_E__P28_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p27_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p27_sel_field p27_sel_field
+ * @brief macros for field p27_sel
+ * @details pin selection setting for P27  P27_GPIO_23_ 0  P27_KSO_4_ 1  P27_QDX_0_ 2  P27_SPI1_MISO 3  P27_PWM_6_ 4  P27_MDM_OUT_7_ 8  P27_SHUB1_MISO 11  P27_WLAN_RX 12
+ * @{
+ */
+#define WRPR_PIN_SELECTION_E__P27_SEL__SHIFT                                 12
+#define WRPR_PIN_SELECTION_E__P27_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_E__P27_SEL__MASK                         0x0001f000U
+#define WRPR_PIN_SELECTION_E__P27_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x0001f000U) >> 12)
+#define WRPR_PIN_SELECTION_E__P27_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 12) & 0x0001f000U)
+#define WRPR_PIN_SELECTION_E__P27_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x0001f000U) | (((uint32_t)(src) <<\
+                    12) & 0x0001f000U)
+#define WRPR_PIN_SELECTION_E__P27_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 12) & ~0x0001f000U)))
+#define WRPR_PIN_SELECTION_E__P27_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p26_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p26_sel_field p26_sel_field
+ * @brief macros for field p26_sel
+ * @details pin selection setting for P26  P26_GPIO_22_ 0  P26_KSO_5_ 1  P26_QDX_1_ 2  P26_SPI1_MOSI 3  P26_PWM_5_ 4  P26_SHUB1_MOSI 11
+ * @{
+ */
+#define WRPR_PIN_SELECTION_E__P26_SEL__SHIFT                                 17
+#define WRPR_PIN_SELECTION_E__P26_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_E__P26_SEL__MASK                         0x003e0000U
+#define WRPR_PIN_SELECTION_E__P26_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x003e0000U) >> 17)
+#define WRPR_PIN_SELECTION_E__P26_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 17) & 0x003e0000U)
+#define WRPR_PIN_SELECTION_E__P26_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x003e0000U) | (((uint32_t)(src) <<\
+                    17) & 0x003e0000U)
+#define WRPR_PIN_SELECTION_E__P26_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 17) & ~0x003e0000U)))
+#define WRPR_PIN_SELECTION_E__P26_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p25_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p25_sel_field p25_sel_field
+ * @brief macros for field p25_sel
+ * @details pin selection setting for P25  P25_GPIO_21_ 0  P25_KSO_6_ 1  P25_QDY_0_ 2  P25_SPI1_CS 3  P25_PWM_4_ 4  P25_BLE_DBG_5_ 7  P25_UART0_RX 10  P25_SHUB1_CS 12  P25_PDM_IN 14  P25_XPAON 16
+ * @{
+ */
+#define WRPR_PIN_SELECTION_E__P25_SEL__SHIFT                                 22
+#define WRPR_PIN_SELECTION_E__P25_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_E__P25_SEL__MASK                         0x07c00000U
+#define WRPR_PIN_SELECTION_E__P25_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x07c00000U) >> 22)
+#define WRPR_PIN_SELECTION_E__P25_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 22) & 0x07c00000U)
+#define WRPR_PIN_SELECTION_E__P25_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x07c00000U) | (((uint32_t)(src) <<\
+                    22) & 0x07c00000U)
+#define WRPR_PIN_SELECTION_E__P25_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 22) & ~0x07c00000U)))
+#define WRPR_PIN_SELECTION_E__P25_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p24_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p24_sel_field p24_sel_field
+ * @brief macros for field p24_sel
+ * @details pin selection setting for P24  P24_GPIO_20_ 0  P24_KSO_7_ 1  P24_QDY_1_ 2  P24_SPI1_CLK 3  P24_PWM_3_ 4  P24_MDM_OUT_4_ 8  P24_QSPI_D_3_ 10  P24_UART0_RTS 13  P24_SHUB1_CLK 14  P24_BLE_TX 15  P24_PDM_CLK 16
+ * @{
+ */
+#define WRPR_PIN_SELECTION_E__P24_SEL__SHIFT                                 27
+#define WRPR_PIN_SELECTION_E__P24_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_E__P24_SEL__MASK                         0xf8000000U
+#define WRPR_PIN_SELECTION_E__P24_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0xf8000000U) >> 27)
+#define WRPR_PIN_SELECTION_E__P24_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 27) & 0xf8000000U)
+#define WRPR_PIN_SELECTION_E__P24_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xf8000000U) | (((uint32_t)(src) <<\
+                    27) & 0xf8000000U)
+#define WRPR_PIN_SELECTION_E__P24_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 27) & ~0xf8000000U)))
+#define WRPR_PIN_SELECTION_E__P24_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+#define WRPR_PIN_SELECTION_E__TYPE                                     uint32_t
+#define WRPR_PIN_SELECTION_E__READ                                  0xfffffffcU
+#define WRPR_PIN_SELECTION_E__WRITE                                 0xfffffffcU
+#define WRPR_PIN_SELECTION_E__PRESERVED                             0x00000000U
+#define WRPR_PIN_SELECTION_E__RESET_VALUE                           0x00000000U
+
+#endif /* __WRPR_PIN_SELECTION_E_MACRO__ */
+
+/** @} end of pin_selection_E */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_pin_selection_F */
+/**
+ * @defgroup at_apb_wrpr_regs_core_pin_selection_F pin_selection_F
+ * @brief Contains register fields associated with pin_selection_F. definitions.
+ * @{
+ */
+#ifndef __WRPR_PIN_SELECTION_F_MACRO__
+#define __WRPR_PIN_SELECTION_F_MACRO__
+
+/* macros for field p33_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p33_sel_field p33_sel_field
+ * @brief macros for field p33_sel
+ * @details pin selection setting for P33  P33_GPIO_29_ 0  P33_UART1_TX 1  P33_QDX_0_ 2  P33_SHUB1_MISO 7  P33_SPI1_MISO 9
+ * @{
+ */
+#define WRPR_PIN_SELECTION_F__P33_SEL__SHIFT                                 12
+#define WRPR_PIN_SELECTION_F__P33_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_F__P33_SEL__MASK                         0x0001f000U
+#define WRPR_PIN_SELECTION_F__P33_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x0001f000U) >> 12)
+#define WRPR_PIN_SELECTION_F__P33_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 12) & 0x0001f000U)
+#define WRPR_PIN_SELECTION_F__P33_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x0001f000U) | (((uint32_t)(src) <<\
+                    12) & 0x0001f000U)
+#define WRPR_PIN_SELECTION_F__P33_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 12) & ~0x0001f000U)))
+#define WRPR_PIN_SELECTION_F__P33_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p32_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p32_sel_field p32_sel_field
+ * @brief macros for field p32_sel
+ * @details pin selection setting for P32  P32_GPIO_28_ 0  P32_UART1_RX 1  P32_QDX_1_ 2  P32_KSI_17_ 3  P32_I2C1_SDA 4  P32_UART1_CTS 5  P32_KSO_17_ 7  P32_SHUB1_SDA 8
+ * @{
+ */
+#define WRPR_PIN_SELECTION_F__P32_SEL__SHIFT                                 17
+#define WRPR_PIN_SELECTION_F__P32_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_F__P32_SEL__MASK                         0x003e0000U
+#define WRPR_PIN_SELECTION_F__P32_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x003e0000U) >> 17)
+#define WRPR_PIN_SELECTION_F__P32_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 17) & 0x003e0000U)
+#define WRPR_PIN_SELECTION_F__P32_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x003e0000U) | (((uint32_t)(src) <<\
+                    17) & 0x003e0000U)
+#define WRPR_PIN_SELECTION_F__P32_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 17) & ~0x003e0000U)))
+#define WRPR_PIN_SELECTION_F__P32_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p31_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p31_sel_field p31_sel_field
+ * @brief macros for field p31_sel
+ * @details pin selection setting for P31  P31_GPIO_27_ 0  P31_KSO_0_ 1  P31_I2C1_SCK 2  P31_UART1_RX 3  P31_SHUB1_SCK 6
+ * @{
+ */
+#define WRPR_PIN_SELECTION_F__P31_SEL__SHIFT                                 22
+#define WRPR_PIN_SELECTION_F__P31_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_F__P31_SEL__MASK                         0x07c00000U
+#define WRPR_PIN_SELECTION_F__P31_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x07c00000U) >> 22)
+#define WRPR_PIN_SELECTION_F__P31_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 22) & 0x07c00000U)
+#define WRPR_PIN_SELECTION_F__P31_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x07c00000U) | (((uint32_t)(src) <<\
+                    22) & 0x07c00000U)
+#define WRPR_PIN_SELECTION_F__P31_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 22) & ~0x07c00000U)))
+#define WRPR_PIN_SELECTION_F__P31_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+
+/* macros for field p30_sel */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p30_sel_field p30_sel_field
+ * @brief macros for field p30_sel
+ * @details pin selection setting for P30  P30_GPIO_26_ 0  P30_KSO_1_ 1  P30_I2C0_SDA 2  P30_UART1_TX 3  P30_UART0_TX 6  P30_SHUB0_SDA 8
+ * @{
+ */
+#define WRPR_PIN_SELECTION_F__P30_SEL__SHIFT                                 27
+#define WRPR_PIN_SELECTION_F__P30_SEL__WIDTH                                  5
+#define WRPR_PIN_SELECTION_F__P30_SEL__MASK                         0xf8000000U
+#define WRPR_PIN_SELECTION_F__P30_SEL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0xf8000000U) >> 27)
+#define WRPR_PIN_SELECTION_F__P30_SEL__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 27) & 0xf8000000U)
+#define WRPR_PIN_SELECTION_F__P30_SEL__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xf8000000U) | (((uint32_t)(src) <<\
+                    27) & 0xf8000000U)
+#define WRPR_PIN_SELECTION_F__P30_SEL__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 27) & ~0xf8000000U)))
+#define WRPR_PIN_SELECTION_F__P30_SEL__RESET_VALUE                  0x00000000U
+/** @} */
+#define WRPR_PIN_SELECTION_F__TYPE                                     uint32_t
+#define WRPR_PIN_SELECTION_F__READ                                  0xfffff000U
+#define WRPR_PIN_SELECTION_F__WRITE                                 0xfffff000U
+#define WRPR_PIN_SELECTION_F__PRESERVED                             0x00000000U
+#define WRPR_PIN_SELECTION_F__RESET_VALUE                           0x00000000U
+
+#endif /* __WRPR_PIN_SELECTION_F_MACRO__ */
+
+/** @} end of pin_selection_F */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_pin_pu_A */
+/**
+ * @defgroup at_apb_wrpr_regs_core_pin_pu_A pin_pu_A
+ * @brief Contains register fields associated with pin_pu_A. definitions.
+ * @{
+ */
+#ifndef __WRPR_PIN_PU_A_MACRO__
+#define __WRPR_PIN_PU_A_MACRO__
+
+/* macros for field p7_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p7_pu_field p7_pu_field
+ * @brief macros for field p7_pu
+ * @details pull-up enable for P7  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_A__P7_PU__SHIFT                                           0
+#define WRPR_PIN_PU_A__P7_PU__WIDTH                                           1
+#define WRPR_PIN_PU_A__P7_PU__MASK                                  0x00000001U
+#define WRPR_PIN_PU_A__P7_PU__READ(src)         ((uint32_t)(src) & 0x00000001U)
+#define WRPR_PIN_PU_A__P7_PU__WRITE(src)        ((uint32_t)(src) & 0x00000001U)
+#define WRPR_PIN_PU_A__P7_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_PIN_PU_A__P7_PU__VERIFY(src) (!(((uint32_t)(src) & ~0x00000001U)))
+#define WRPR_PIN_PU_A__P7_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_PIN_PU_A__P7_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_PIN_PU_A__P7_PU__RESET_VALUE                           0x00000000U
+/** @} */
+
+/* macros for field p6_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p6_pu_field p6_pu_field
+ * @brief macros for field p6_pu
+ * @details pull-up enable for P6  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_A__P6_PU__SHIFT                                           4
+#define WRPR_PIN_PU_A__P6_PU__WIDTH                                           1
+#define WRPR_PIN_PU_A__P6_PU__MASK                                  0x00000010U
+#define WRPR_PIN_PU_A__P6_PU__READ(src)  (((uint32_t)(src) & 0x00000010U) >> 4)
+#define WRPR_PIN_PU_A__P6_PU__WRITE(src) (((uint32_t)(src) << 4) & 0x00000010U)
+#define WRPR_PIN_PU_A__P6_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000010U) | (((uint32_t)(src) <<\
+                    4) & 0x00000010U)
+#define WRPR_PIN_PU_A__P6_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 4) & ~0x00000010U)))
+#define WRPR_PIN_PU_A__P6_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000010U) | ((uint32_t)(1) << 4)
+#define WRPR_PIN_PU_A__P6_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000010U) | ((uint32_t)(0) << 4)
+#define WRPR_PIN_PU_A__P6_PU__RESET_VALUE                           0x00000000U
+/** @} */
+
+/* macros for field p5_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p5_pu_field p5_pu_field
+ * @brief macros for field p5_pu
+ * @details pull-up enable for P5  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_A__P5_PU__SHIFT                                           8
+#define WRPR_PIN_PU_A__P5_PU__WIDTH                                           1
+#define WRPR_PIN_PU_A__P5_PU__MASK                                  0x00000100U
+#define WRPR_PIN_PU_A__P5_PU__READ(src)  (((uint32_t)(src) & 0x00000100U) >> 8)
+#define WRPR_PIN_PU_A__P5_PU__WRITE(src) (((uint32_t)(src) << 8) & 0x00000100U)
+#define WRPR_PIN_PU_A__P5_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000100U) | (((uint32_t)(src) <<\
+                    8) & 0x00000100U)
+#define WRPR_PIN_PU_A__P5_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 8) & ~0x00000100U)))
+#define WRPR_PIN_PU_A__P5_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000100U) | ((uint32_t)(1) << 8)
+#define WRPR_PIN_PU_A__P5_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000100U) | ((uint32_t)(0) << 8)
+#define WRPR_PIN_PU_A__P5_PU__RESET_VALUE                           0x00000000U
+/** @} */
+
+/* macros for field p4_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p4_pu_field p4_pu_field
+ * @brief macros for field p4_pu
+ * @details pull-up enable for P4  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_A__P4_PU__SHIFT                                          12
+#define WRPR_PIN_PU_A__P4_PU__WIDTH                                           1
+#define WRPR_PIN_PU_A__P4_PU__MASK                                  0x00001000U
+#define WRPR_PIN_PU_A__P4_PU__READ(src) (((uint32_t)(src) & 0x00001000U) >> 12)
+#define WRPR_PIN_PU_A__P4_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 12) & 0x00001000U)
+#define WRPR_PIN_PU_A__P4_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00001000U) | (((uint32_t)(src) <<\
+                    12) & 0x00001000U)
+#define WRPR_PIN_PU_A__P4_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 12) & ~0x00001000U)))
+#define WRPR_PIN_PU_A__P4_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00001000U) | ((uint32_t)(1) << 12)
+#define WRPR_PIN_PU_A__P4_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00001000U) | ((uint32_t)(0) << 12)
+#define WRPR_PIN_PU_A__P4_PU__RESET_VALUE                           0x00000000U
+/** @} */
+
+/* macros for field p3_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p3_pu_field p3_pu_field
+ * @brief macros for field p3_pu
+ * @details pull-up enable for P3  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_A__P3_PU__SHIFT                                          16
+#define WRPR_PIN_PU_A__P3_PU__WIDTH                                           1
+#define WRPR_PIN_PU_A__P3_PU__MASK                                  0x00010000U
+#define WRPR_PIN_PU_A__P3_PU__READ(src) (((uint32_t)(src) & 0x00010000U) >> 16)
+#define WRPR_PIN_PU_A__P3_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 16) & 0x00010000U)
+#define WRPR_PIN_PU_A__P3_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00010000U) | (((uint32_t)(src) <<\
+                    16) & 0x00010000U)
+#define WRPR_PIN_PU_A__P3_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 16) & ~0x00010000U)))
+#define WRPR_PIN_PU_A__P3_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00010000U) | ((uint32_t)(1) << 16)
+#define WRPR_PIN_PU_A__P3_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00010000U) | ((uint32_t)(0) << 16)
+#define WRPR_PIN_PU_A__P3_PU__RESET_VALUE                           0x00000000U
+/** @} */
+
+/* macros for field p2_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p2_pu_field p2_pu_field
+ * @brief macros for field p2_pu
+ * @details pull-up enable for P2  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_A__P2_PU__SHIFT                                          20
+#define WRPR_PIN_PU_A__P2_PU__WIDTH                                           1
+#define WRPR_PIN_PU_A__P2_PU__MASK                                  0x00100000U
+#define WRPR_PIN_PU_A__P2_PU__READ(src) (((uint32_t)(src) & 0x00100000U) >> 20)
+#define WRPR_PIN_PU_A__P2_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 20) & 0x00100000U)
+#define WRPR_PIN_PU_A__P2_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00100000U) | (((uint32_t)(src) <<\
+                    20) & 0x00100000U)
+#define WRPR_PIN_PU_A__P2_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 20) & ~0x00100000U)))
+#define WRPR_PIN_PU_A__P2_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00100000U) | ((uint32_t)(1) << 20)
+#define WRPR_PIN_PU_A__P2_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00100000U) | ((uint32_t)(0) << 20)
+#define WRPR_PIN_PU_A__P2_PU__RESET_VALUE                           0x00000000U
+/** @} */
+
+/* macros for field p1_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p1_pu_field p1_pu_field
+ * @brief macros for field p1_pu
+ * @details pull-up enable for P1  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_A__P1_PU__SHIFT                                          24
+#define WRPR_PIN_PU_A__P1_PU__WIDTH                                           1
+#define WRPR_PIN_PU_A__P1_PU__MASK                                  0x01000000U
+#define WRPR_PIN_PU_A__P1_PU__READ(src) (((uint32_t)(src) & 0x01000000U) >> 24)
+#define WRPR_PIN_PU_A__P1_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 24) & 0x01000000U)
+#define WRPR_PIN_PU_A__P1_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x01000000U) | (((uint32_t)(src) <<\
+                    24) & 0x01000000U)
+#define WRPR_PIN_PU_A__P1_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 24) & ~0x01000000U)))
+#define WRPR_PIN_PU_A__P1_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x01000000U) | ((uint32_t)(1) << 24)
+#define WRPR_PIN_PU_A__P1_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x01000000U) | ((uint32_t)(0) << 24)
+#define WRPR_PIN_PU_A__P1_PU__RESET_VALUE                           0x00000000U
+/** @} */
+
+/* macros for field p0_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p0_pu_field p0_pu_field
+ * @brief macros for field p0_pu
+ * @details pull-up enable for P0  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_A__P0_PU__SHIFT                                          28
+#define WRPR_PIN_PU_A__P0_PU__WIDTH                                           1
+#define WRPR_PIN_PU_A__P0_PU__MASK                                  0x10000000U
+#define WRPR_PIN_PU_A__P0_PU__READ(src) (((uint32_t)(src) & 0x10000000U) >> 28)
+#define WRPR_PIN_PU_A__P0_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 28) & 0x10000000U)
+#define WRPR_PIN_PU_A__P0_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x10000000U) | (((uint32_t)(src) <<\
+                    28) & 0x10000000U)
+#define WRPR_PIN_PU_A__P0_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 28) & ~0x10000000U)))
+#define WRPR_PIN_PU_A__P0_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x10000000U) | ((uint32_t)(1) << 28)
+#define WRPR_PIN_PU_A__P0_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x10000000U) | ((uint32_t)(0) << 28)
+#define WRPR_PIN_PU_A__P0_PU__RESET_VALUE                           0x00000000U
+/** @} */
+#define WRPR_PIN_PU_A__TYPE                                            uint32_t
+#define WRPR_PIN_PU_A__READ                                         0x11111111U
+#define WRPR_PIN_PU_A__WRITE                                        0x11111111U
+#define WRPR_PIN_PU_A__PRESERVED                                    0x00000000U
+#define WRPR_PIN_PU_A__RESET_VALUE                                  0x00000000U
+
+#endif /* __WRPR_PIN_PU_A_MACRO__ */
+
+/** @} end of pin_pu_A */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_pin_pu_B */
+/**
+ * @defgroup at_apb_wrpr_regs_core_pin_pu_B pin_pu_B
+ * @brief Contains register fields associated with pin_pu_B. definitions.
+ * @{
+ */
+#ifndef __WRPR_PIN_PU_B_MACRO__
+#define __WRPR_PIN_PU_B_MACRO__
+
+/* macros for field p15_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p15_pu_field p15_pu_field
+ * @brief macros for field p15_pu
+ * @details pull-up enable for P15  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_B__P15_PU__SHIFT                                          0
+#define WRPR_PIN_PU_B__P15_PU__WIDTH                                          1
+#define WRPR_PIN_PU_B__P15_PU__MASK                                 0x00000001U
+#define WRPR_PIN_PU_B__P15_PU__READ(src)        ((uint32_t)(src) & 0x00000001U)
+#define WRPR_PIN_PU_B__P15_PU__WRITE(src)       ((uint32_t)(src) & 0x00000001U)
+#define WRPR_PIN_PU_B__P15_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_PIN_PU_B__P15_PU__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_PIN_PU_B__P15_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_PIN_PU_B__P15_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_PIN_PU_B__P15_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p14_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p14_pu_field p14_pu_field
+ * @brief macros for field p14_pu
+ * @details pull-up enable for P14  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_B__P14_PU__SHIFT                                          4
+#define WRPR_PIN_PU_B__P14_PU__WIDTH                                          1
+#define WRPR_PIN_PU_B__P14_PU__MASK                                 0x00000010U
+#define WRPR_PIN_PU_B__P14_PU__READ(src) (((uint32_t)(src) & 0x00000010U) >> 4)
+#define WRPR_PIN_PU_B__P14_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 4) & 0x00000010U)
+#define WRPR_PIN_PU_B__P14_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000010U) | (((uint32_t)(src) <<\
+                    4) & 0x00000010U)
+#define WRPR_PIN_PU_B__P14_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 4) & ~0x00000010U)))
+#define WRPR_PIN_PU_B__P14_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000010U) | ((uint32_t)(1) << 4)
+#define WRPR_PIN_PU_B__P14_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000010U) | ((uint32_t)(0) << 4)
+#define WRPR_PIN_PU_B__P14_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p13_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p13_pu_field p13_pu_field
+ * @brief macros for field p13_pu
+ * @details pull-up enable for P13  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_B__P13_PU__SHIFT                                          8
+#define WRPR_PIN_PU_B__P13_PU__WIDTH                                          1
+#define WRPR_PIN_PU_B__P13_PU__MASK                                 0x00000100U
+#define WRPR_PIN_PU_B__P13_PU__READ(src) (((uint32_t)(src) & 0x00000100U) >> 8)
+#define WRPR_PIN_PU_B__P13_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 8) & 0x00000100U)
+#define WRPR_PIN_PU_B__P13_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000100U) | (((uint32_t)(src) <<\
+                    8) & 0x00000100U)
+#define WRPR_PIN_PU_B__P13_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 8) & ~0x00000100U)))
+#define WRPR_PIN_PU_B__P13_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000100U) | ((uint32_t)(1) << 8)
+#define WRPR_PIN_PU_B__P13_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000100U) | ((uint32_t)(0) << 8)
+#define WRPR_PIN_PU_B__P13_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p12_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p12_pu_field p12_pu_field
+ * @brief macros for field p12_pu
+ * @details pull-up enable for P12  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_B__P12_PU__SHIFT                                         12
+#define WRPR_PIN_PU_B__P12_PU__WIDTH                                          1
+#define WRPR_PIN_PU_B__P12_PU__MASK                                 0x00001000U
+#define WRPR_PIN_PU_B__P12_PU__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00001000U) >> 12)
+#define WRPR_PIN_PU_B__P12_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 12) & 0x00001000U)
+#define WRPR_PIN_PU_B__P12_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00001000U) | (((uint32_t)(src) <<\
+                    12) & 0x00001000U)
+#define WRPR_PIN_PU_B__P12_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 12) & ~0x00001000U)))
+#define WRPR_PIN_PU_B__P12_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00001000U) | ((uint32_t)(1) << 12)
+#define WRPR_PIN_PU_B__P12_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00001000U) | ((uint32_t)(0) << 12)
+#define WRPR_PIN_PU_B__P12_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p11_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p11_pu_field p11_pu_field
+ * @brief macros for field p11_pu
+ * @details pull-up enable for P11  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_B__P11_PU__SHIFT                                         16
+#define WRPR_PIN_PU_B__P11_PU__WIDTH                                          1
+#define WRPR_PIN_PU_B__P11_PU__MASK                                 0x00010000U
+#define WRPR_PIN_PU_B__P11_PU__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00010000U) >> 16)
+#define WRPR_PIN_PU_B__P11_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 16) & 0x00010000U)
+#define WRPR_PIN_PU_B__P11_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00010000U) | (((uint32_t)(src) <<\
+                    16) & 0x00010000U)
+#define WRPR_PIN_PU_B__P11_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 16) & ~0x00010000U)))
+#define WRPR_PIN_PU_B__P11_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00010000U) | ((uint32_t)(1) << 16)
+#define WRPR_PIN_PU_B__P11_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00010000U) | ((uint32_t)(0) << 16)
+#define WRPR_PIN_PU_B__P11_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p10_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p10_pu_field p10_pu_field
+ * @brief macros for field p10_pu
+ * @details pull-up enable for P10  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_B__P10_PU__SHIFT                                         20
+#define WRPR_PIN_PU_B__P10_PU__WIDTH                                          1
+#define WRPR_PIN_PU_B__P10_PU__MASK                                 0x00100000U
+#define WRPR_PIN_PU_B__P10_PU__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00100000U) >> 20)
+#define WRPR_PIN_PU_B__P10_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 20) & 0x00100000U)
+#define WRPR_PIN_PU_B__P10_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00100000U) | (((uint32_t)(src) <<\
+                    20) & 0x00100000U)
+#define WRPR_PIN_PU_B__P10_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 20) & ~0x00100000U)))
+#define WRPR_PIN_PU_B__P10_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00100000U) | ((uint32_t)(1) << 20)
+#define WRPR_PIN_PU_B__P10_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00100000U) | ((uint32_t)(0) << 20)
+#define WRPR_PIN_PU_B__P10_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p9_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p9_pu_field p9_pu_field
+ * @brief macros for field p9_pu
+ * @details pull-up enable for P9  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_B__P9_PU__SHIFT                                          24
+#define WRPR_PIN_PU_B__P9_PU__WIDTH                                           1
+#define WRPR_PIN_PU_B__P9_PU__MASK                                  0x01000000U
+#define WRPR_PIN_PU_B__P9_PU__READ(src) (((uint32_t)(src) & 0x01000000U) >> 24)
+#define WRPR_PIN_PU_B__P9_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 24) & 0x01000000U)
+#define WRPR_PIN_PU_B__P9_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x01000000U) | (((uint32_t)(src) <<\
+                    24) & 0x01000000U)
+#define WRPR_PIN_PU_B__P9_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 24) & ~0x01000000U)))
+#define WRPR_PIN_PU_B__P9_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x01000000U) | ((uint32_t)(1) << 24)
+#define WRPR_PIN_PU_B__P9_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x01000000U) | ((uint32_t)(0) << 24)
+#define WRPR_PIN_PU_B__P9_PU__RESET_VALUE                           0x00000000U
+/** @} */
+
+/* macros for field p8_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p8_pu_field p8_pu_field
+ * @brief macros for field p8_pu
+ * @details pull-up enable for P8  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_B__P8_PU__SHIFT                                          28
+#define WRPR_PIN_PU_B__P8_PU__WIDTH                                           1
+#define WRPR_PIN_PU_B__P8_PU__MASK                                  0x10000000U
+#define WRPR_PIN_PU_B__P8_PU__READ(src) (((uint32_t)(src) & 0x10000000U) >> 28)
+#define WRPR_PIN_PU_B__P8_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 28) & 0x10000000U)
+#define WRPR_PIN_PU_B__P8_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x10000000U) | (((uint32_t)(src) <<\
+                    28) & 0x10000000U)
+#define WRPR_PIN_PU_B__P8_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 28) & ~0x10000000U)))
+#define WRPR_PIN_PU_B__P8_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x10000000U) | ((uint32_t)(1) << 28)
+#define WRPR_PIN_PU_B__P8_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x10000000U) | ((uint32_t)(0) << 28)
+#define WRPR_PIN_PU_B__P8_PU__RESET_VALUE                           0x00000000U
+/** @} */
+#define WRPR_PIN_PU_B__TYPE                                            uint32_t
+#define WRPR_PIN_PU_B__READ                                         0x11111111U
+#define WRPR_PIN_PU_B__WRITE                                        0x11111111U
+#define WRPR_PIN_PU_B__PRESERVED                                    0x00000000U
+#define WRPR_PIN_PU_B__RESET_VALUE                                  0x00000000U
+
+#endif /* __WRPR_PIN_PU_B_MACRO__ */
+
+/** @} end of pin_pu_B */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_pin_pu_C */
+/**
+ * @defgroup at_apb_wrpr_regs_core_pin_pu_C pin_pu_C
+ * @brief Contains register fields associated with pin_pu_C. definitions.
+ * @{
+ */
+#ifndef __WRPR_PIN_PU_C_MACRO__
+#define __WRPR_PIN_PU_C_MACRO__
+
+/* macros for field p23_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p23_pu_field p23_pu_field
+ * @brief macros for field p23_pu
+ * @details pull-up enable for P23  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_C__P23_PU__SHIFT                                          0
+#define WRPR_PIN_PU_C__P23_PU__WIDTH                                          1
+#define WRPR_PIN_PU_C__P23_PU__MASK                                 0x00000001U
+#define WRPR_PIN_PU_C__P23_PU__READ(src)        ((uint32_t)(src) & 0x00000001U)
+#define WRPR_PIN_PU_C__P23_PU__WRITE(src)       ((uint32_t)(src) & 0x00000001U)
+#define WRPR_PIN_PU_C__P23_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_PIN_PU_C__P23_PU__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_PIN_PU_C__P23_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_PIN_PU_C__P23_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_PIN_PU_C__P23_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p22_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p22_pu_field p22_pu_field
+ * @brief macros for field p22_pu
+ * @details pull-up enable for P22  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_C__P22_PU__SHIFT                                          4
+#define WRPR_PIN_PU_C__P22_PU__WIDTH                                          1
+#define WRPR_PIN_PU_C__P22_PU__MASK                                 0x00000010U
+#define WRPR_PIN_PU_C__P22_PU__READ(src) (((uint32_t)(src) & 0x00000010U) >> 4)
+#define WRPR_PIN_PU_C__P22_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 4) & 0x00000010U)
+#define WRPR_PIN_PU_C__P22_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000010U) | (((uint32_t)(src) <<\
+                    4) & 0x00000010U)
+#define WRPR_PIN_PU_C__P22_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 4) & ~0x00000010U)))
+#define WRPR_PIN_PU_C__P22_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000010U) | ((uint32_t)(1) << 4)
+#define WRPR_PIN_PU_C__P22_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000010U) | ((uint32_t)(0) << 4)
+#define WRPR_PIN_PU_C__P22_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p21_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p21_pu_field p21_pu_field
+ * @brief macros for field p21_pu
+ * @details pull-up enable for P21  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_C__P21_PU__SHIFT                                          8
+#define WRPR_PIN_PU_C__P21_PU__WIDTH                                          1
+#define WRPR_PIN_PU_C__P21_PU__MASK                                 0x00000100U
+#define WRPR_PIN_PU_C__P21_PU__READ(src) (((uint32_t)(src) & 0x00000100U) >> 8)
+#define WRPR_PIN_PU_C__P21_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 8) & 0x00000100U)
+#define WRPR_PIN_PU_C__P21_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000100U) | (((uint32_t)(src) <<\
+                    8) & 0x00000100U)
+#define WRPR_PIN_PU_C__P21_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 8) & ~0x00000100U)))
+#define WRPR_PIN_PU_C__P21_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000100U) | ((uint32_t)(1) << 8)
+#define WRPR_PIN_PU_C__P21_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000100U) | ((uint32_t)(0) << 8)
+#define WRPR_PIN_PU_C__P21_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p20_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p20_pu_field p20_pu_field
+ * @brief macros for field p20_pu
+ * @details pull-up enable for P20  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_C__P20_PU__SHIFT                                         12
+#define WRPR_PIN_PU_C__P20_PU__WIDTH                                          1
+#define WRPR_PIN_PU_C__P20_PU__MASK                                 0x00001000U
+#define WRPR_PIN_PU_C__P20_PU__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00001000U) >> 12)
+#define WRPR_PIN_PU_C__P20_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 12) & 0x00001000U)
+#define WRPR_PIN_PU_C__P20_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00001000U) | (((uint32_t)(src) <<\
+                    12) & 0x00001000U)
+#define WRPR_PIN_PU_C__P20_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 12) & ~0x00001000U)))
+#define WRPR_PIN_PU_C__P20_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00001000U) | ((uint32_t)(1) << 12)
+#define WRPR_PIN_PU_C__P20_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00001000U) | ((uint32_t)(0) << 12)
+#define WRPR_PIN_PU_C__P20_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p19_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p19_pu_field p19_pu_field
+ * @brief macros for field p19_pu
+ * @details pull-up enable for P19  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_C__P19_PU__SHIFT                                         16
+#define WRPR_PIN_PU_C__P19_PU__WIDTH                                          1
+#define WRPR_PIN_PU_C__P19_PU__MASK                                 0x00010000U
+#define WRPR_PIN_PU_C__P19_PU__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00010000U) >> 16)
+#define WRPR_PIN_PU_C__P19_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 16) & 0x00010000U)
+#define WRPR_PIN_PU_C__P19_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00010000U) | (((uint32_t)(src) <<\
+                    16) & 0x00010000U)
+#define WRPR_PIN_PU_C__P19_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 16) & ~0x00010000U)))
+#define WRPR_PIN_PU_C__P19_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00010000U) | ((uint32_t)(1) << 16)
+#define WRPR_PIN_PU_C__P19_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00010000U) | ((uint32_t)(0) << 16)
+#define WRPR_PIN_PU_C__P19_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p18_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p18_pu_field p18_pu_field
+ * @brief macros for field p18_pu
+ * @details pull-up enable for P18  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_C__P18_PU__SHIFT                                         20
+#define WRPR_PIN_PU_C__P18_PU__WIDTH                                          1
+#define WRPR_PIN_PU_C__P18_PU__MASK                                 0x00100000U
+#define WRPR_PIN_PU_C__P18_PU__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00100000U) >> 20)
+#define WRPR_PIN_PU_C__P18_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 20) & 0x00100000U)
+#define WRPR_PIN_PU_C__P18_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00100000U) | (((uint32_t)(src) <<\
+                    20) & 0x00100000U)
+#define WRPR_PIN_PU_C__P18_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 20) & ~0x00100000U)))
+#define WRPR_PIN_PU_C__P18_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00100000U) | ((uint32_t)(1) << 20)
+#define WRPR_PIN_PU_C__P18_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00100000U) | ((uint32_t)(0) << 20)
+#define WRPR_PIN_PU_C__P18_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p17_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p17_pu_field p17_pu_field
+ * @brief macros for field p17_pu
+ * @details pull-up enable for P17  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_C__P17_PU__SHIFT                                         24
+#define WRPR_PIN_PU_C__P17_PU__WIDTH                                          1
+#define WRPR_PIN_PU_C__P17_PU__MASK                                 0x01000000U
+#define WRPR_PIN_PU_C__P17_PU__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x01000000U) >> 24)
+#define WRPR_PIN_PU_C__P17_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 24) & 0x01000000U)
+#define WRPR_PIN_PU_C__P17_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x01000000U) | (((uint32_t)(src) <<\
+                    24) & 0x01000000U)
+#define WRPR_PIN_PU_C__P17_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 24) & ~0x01000000U)))
+#define WRPR_PIN_PU_C__P17_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x01000000U) | ((uint32_t)(1) << 24)
+#define WRPR_PIN_PU_C__P17_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x01000000U) | ((uint32_t)(0) << 24)
+#define WRPR_PIN_PU_C__P17_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p16_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p16_pu_field p16_pu_field
+ * @brief macros for field p16_pu
+ * @details pull-up enable for P16  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_C__P16_PU__SHIFT                                         28
+#define WRPR_PIN_PU_C__P16_PU__WIDTH                                          1
+#define WRPR_PIN_PU_C__P16_PU__MASK                                 0x10000000U
+#define WRPR_PIN_PU_C__P16_PU__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x10000000U) >> 28)
+#define WRPR_PIN_PU_C__P16_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 28) & 0x10000000U)
+#define WRPR_PIN_PU_C__P16_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x10000000U) | (((uint32_t)(src) <<\
+                    28) & 0x10000000U)
+#define WRPR_PIN_PU_C__P16_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 28) & ~0x10000000U)))
+#define WRPR_PIN_PU_C__P16_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x10000000U) | ((uint32_t)(1) << 28)
+#define WRPR_PIN_PU_C__P16_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x10000000U) | ((uint32_t)(0) << 28)
+#define WRPR_PIN_PU_C__P16_PU__RESET_VALUE                          0x00000000U
+/** @} */
+#define WRPR_PIN_PU_C__TYPE                                            uint32_t
+#define WRPR_PIN_PU_C__READ                                         0x11111111U
+#define WRPR_PIN_PU_C__WRITE                                        0x11111111U
+#define WRPR_PIN_PU_C__PRESERVED                                    0x00000000U
+#define WRPR_PIN_PU_C__RESET_VALUE                                  0x00000000U
+
+#endif /* __WRPR_PIN_PU_C_MACRO__ */
+
+/** @} end of pin_pu_C */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_pin_pu_D */
+/**
+ * @defgroup at_apb_wrpr_regs_core_pin_pu_D pin_pu_D
+ * @brief Contains register fields associated with pin_pu_D. definitions.
+ * @{
+ */
+#ifndef __WRPR_PIN_PU_D_MACRO__
+#define __WRPR_PIN_PU_D_MACRO__
+
+/* macros for field p31_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p31_pu_field p31_pu_field
+ * @brief macros for field p31_pu
+ * @details pull-up enable for P31  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_D__P31_PU__SHIFT                                          0
+#define WRPR_PIN_PU_D__P31_PU__WIDTH                                          1
+#define WRPR_PIN_PU_D__P31_PU__MASK                                 0x00000001U
+#define WRPR_PIN_PU_D__P31_PU__READ(src)        ((uint32_t)(src) & 0x00000001U)
+#define WRPR_PIN_PU_D__P31_PU__WRITE(src)       ((uint32_t)(src) & 0x00000001U)
+#define WRPR_PIN_PU_D__P31_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_PIN_PU_D__P31_PU__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_PIN_PU_D__P31_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_PIN_PU_D__P31_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_PIN_PU_D__P31_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p30_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p30_pu_field p30_pu_field
+ * @brief macros for field p30_pu
+ * @details pull-up enable for P30  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_D__P30_PU__SHIFT                                          4
+#define WRPR_PIN_PU_D__P30_PU__WIDTH                                          1
+#define WRPR_PIN_PU_D__P30_PU__MASK                                 0x00000010U
+#define WRPR_PIN_PU_D__P30_PU__READ(src) (((uint32_t)(src) & 0x00000010U) >> 4)
+#define WRPR_PIN_PU_D__P30_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 4) & 0x00000010U)
+#define WRPR_PIN_PU_D__P30_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000010U) | (((uint32_t)(src) <<\
+                    4) & 0x00000010U)
+#define WRPR_PIN_PU_D__P30_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 4) & ~0x00000010U)))
+#define WRPR_PIN_PU_D__P30_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000010U) | ((uint32_t)(1) << 4)
+#define WRPR_PIN_PU_D__P30_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000010U) | ((uint32_t)(0) << 4)
+#define WRPR_PIN_PU_D__P30_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p29_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p29_pu_field p29_pu_field
+ * @brief macros for field p29_pu
+ * @details pull-up enable for P29  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_D__P29_PU__SHIFT                                          8
+#define WRPR_PIN_PU_D__P29_PU__WIDTH                                          1
+#define WRPR_PIN_PU_D__P29_PU__MASK                                 0x00000100U
+#define WRPR_PIN_PU_D__P29_PU__READ(src) (((uint32_t)(src) & 0x00000100U) >> 8)
+#define WRPR_PIN_PU_D__P29_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 8) & 0x00000100U)
+#define WRPR_PIN_PU_D__P29_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000100U) | (((uint32_t)(src) <<\
+                    8) & 0x00000100U)
+#define WRPR_PIN_PU_D__P29_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 8) & ~0x00000100U)))
+#define WRPR_PIN_PU_D__P29_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000100U) | ((uint32_t)(1) << 8)
+#define WRPR_PIN_PU_D__P29_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000100U) | ((uint32_t)(0) << 8)
+#define WRPR_PIN_PU_D__P29_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p28_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p28_pu_field p28_pu_field
+ * @brief macros for field p28_pu
+ * @details pull-up enable for P28  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_D__P28_PU__SHIFT                                         12
+#define WRPR_PIN_PU_D__P28_PU__WIDTH                                          1
+#define WRPR_PIN_PU_D__P28_PU__MASK                                 0x00001000U
+#define WRPR_PIN_PU_D__P28_PU__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00001000U) >> 12)
+#define WRPR_PIN_PU_D__P28_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 12) & 0x00001000U)
+#define WRPR_PIN_PU_D__P28_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00001000U) | (((uint32_t)(src) <<\
+                    12) & 0x00001000U)
+#define WRPR_PIN_PU_D__P28_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 12) & ~0x00001000U)))
+#define WRPR_PIN_PU_D__P28_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00001000U) | ((uint32_t)(1) << 12)
+#define WRPR_PIN_PU_D__P28_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00001000U) | ((uint32_t)(0) << 12)
+#define WRPR_PIN_PU_D__P28_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p27_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p27_pu_field p27_pu_field
+ * @brief macros for field p27_pu
+ * @details pull-up enable for P27  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_D__P27_PU__SHIFT                                         16
+#define WRPR_PIN_PU_D__P27_PU__WIDTH                                          1
+#define WRPR_PIN_PU_D__P27_PU__MASK                                 0x00010000U
+#define WRPR_PIN_PU_D__P27_PU__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00010000U) >> 16)
+#define WRPR_PIN_PU_D__P27_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 16) & 0x00010000U)
+#define WRPR_PIN_PU_D__P27_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00010000U) | (((uint32_t)(src) <<\
+                    16) & 0x00010000U)
+#define WRPR_PIN_PU_D__P27_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 16) & ~0x00010000U)))
+#define WRPR_PIN_PU_D__P27_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00010000U) | ((uint32_t)(1) << 16)
+#define WRPR_PIN_PU_D__P27_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00010000U) | ((uint32_t)(0) << 16)
+#define WRPR_PIN_PU_D__P27_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p26_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p26_pu_field p26_pu_field
+ * @brief macros for field p26_pu
+ * @details pull-up enable for P26  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_D__P26_PU__SHIFT                                         20
+#define WRPR_PIN_PU_D__P26_PU__WIDTH                                          1
+#define WRPR_PIN_PU_D__P26_PU__MASK                                 0x00100000U
+#define WRPR_PIN_PU_D__P26_PU__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00100000U) >> 20)
+#define WRPR_PIN_PU_D__P26_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 20) & 0x00100000U)
+#define WRPR_PIN_PU_D__P26_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00100000U) | (((uint32_t)(src) <<\
+                    20) & 0x00100000U)
+#define WRPR_PIN_PU_D__P26_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 20) & ~0x00100000U)))
+#define WRPR_PIN_PU_D__P26_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00100000U) | ((uint32_t)(1) << 20)
+#define WRPR_PIN_PU_D__P26_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00100000U) | ((uint32_t)(0) << 20)
+#define WRPR_PIN_PU_D__P26_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p25_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p25_pu_field p25_pu_field
+ * @brief macros for field p25_pu
+ * @details pull-up enable for P25  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_D__P25_PU__SHIFT                                         24
+#define WRPR_PIN_PU_D__P25_PU__WIDTH                                          1
+#define WRPR_PIN_PU_D__P25_PU__MASK                                 0x01000000U
+#define WRPR_PIN_PU_D__P25_PU__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x01000000U) >> 24)
+#define WRPR_PIN_PU_D__P25_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 24) & 0x01000000U)
+#define WRPR_PIN_PU_D__P25_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x01000000U) | (((uint32_t)(src) <<\
+                    24) & 0x01000000U)
+#define WRPR_PIN_PU_D__P25_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 24) & ~0x01000000U)))
+#define WRPR_PIN_PU_D__P25_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x01000000U) | ((uint32_t)(1) << 24)
+#define WRPR_PIN_PU_D__P25_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x01000000U) | ((uint32_t)(0) << 24)
+#define WRPR_PIN_PU_D__P25_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p24_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p24_pu_field p24_pu_field
+ * @brief macros for field p24_pu
+ * @details pull-up enable for P24  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_D__P24_PU__SHIFT                                         28
+#define WRPR_PIN_PU_D__P24_PU__WIDTH                                          1
+#define WRPR_PIN_PU_D__P24_PU__MASK                                 0x10000000U
+#define WRPR_PIN_PU_D__P24_PU__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x10000000U) >> 28)
+#define WRPR_PIN_PU_D__P24_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 28) & 0x10000000U)
+#define WRPR_PIN_PU_D__P24_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x10000000U) | (((uint32_t)(src) <<\
+                    28) & 0x10000000U)
+#define WRPR_PIN_PU_D__P24_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 28) & ~0x10000000U)))
+#define WRPR_PIN_PU_D__P24_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x10000000U) | ((uint32_t)(1) << 28)
+#define WRPR_PIN_PU_D__P24_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x10000000U) | ((uint32_t)(0) << 28)
+#define WRPR_PIN_PU_D__P24_PU__RESET_VALUE                          0x00000000U
+/** @} */
+#define WRPR_PIN_PU_D__TYPE                                            uint32_t
+#define WRPR_PIN_PU_D__READ                                         0x11111111U
+#define WRPR_PIN_PU_D__WRITE                                        0x11111111U
+#define WRPR_PIN_PU_D__PRESERVED                                    0x00000000U
+#define WRPR_PIN_PU_D__RESET_VALUE                                  0x00000000U
+
+#endif /* __WRPR_PIN_PU_D_MACRO__ */
+
+/** @} end of pin_pu_D */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_pin_pu_E */
+/**
+ * @defgroup at_apb_wrpr_regs_core_pin_pu_E pin_pu_E
+ * @brief Contains register fields associated with pin_pu_E. definitions.
+ * @{
+ */
+#ifndef __WRPR_PIN_PU_E_MACRO__
+#define __WRPR_PIN_PU_E_MACRO__
+
+/* macros for field p33_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p33_pu_field p33_pu_field
+ * @brief macros for field p33_pu
+ * @details pull-up enable for P33  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_E__P33_PU__SHIFT                                         24
+#define WRPR_PIN_PU_E__P33_PU__WIDTH                                          1
+#define WRPR_PIN_PU_E__P33_PU__MASK                                 0x01000000U
+#define WRPR_PIN_PU_E__P33_PU__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x01000000U) >> 24)
+#define WRPR_PIN_PU_E__P33_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 24) & 0x01000000U)
+#define WRPR_PIN_PU_E__P33_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x01000000U) | (((uint32_t)(src) <<\
+                    24) & 0x01000000U)
+#define WRPR_PIN_PU_E__P33_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 24) & ~0x01000000U)))
+#define WRPR_PIN_PU_E__P33_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x01000000U) | ((uint32_t)(1) << 24)
+#define WRPR_PIN_PU_E__P33_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x01000000U) | ((uint32_t)(0) << 24)
+#define WRPR_PIN_PU_E__P33_PU__RESET_VALUE                          0x00000000U
+/** @} */
+
+/* macros for field p32_pu */
+/**
+ * @defgroup at_apb_wrpr_regs_core_p32_pu_field p32_pu_field
+ * @brief macros for field p32_pu
+ * @details pull-up enable for P32  0 = pull-up resistor not enabled  1 = pull-up resistor enabled
+ * @{
+ */
+#define WRPR_PIN_PU_E__P32_PU__SHIFT                                         28
+#define WRPR_PIN_PU_E__P32_PU__WIDTH                                          1
+#define WRPR_PIN_PU_E__P32_PU__MASK                                 0x10000000U
+#define WRPR_PIN_PU_E__P32_PU__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x10000000U) >> 28)
+#define WRPR_PIN_PU_E__P32_PU__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 28) & 0x10000000U)
+#define WRPR_PIN_PU_E__P32_PU__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x10000000U) | (((uint32_t)(src) <<\
+                    28) & 0x10000000U)
+#define WRPR_PIN_PU_E__P32_PU__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 28) & ~0x10000000U)))
+#define WRPR_PIN_PU_E__P32_PU__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x10000000U) | ((uint32_t)(1) << 28)
+#define WRPR_PIN_PU_E__P32_PU__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x10000000U) | ((uint32_t)(0) << 28)
+#define WRPR_PIN_PU_E__P32_PU__RESET_VALUE                          0x00000000U
+/** @} */
+#define WRPR_PIN_PU_E__TYPE                                            uint32_t
+#define WRPR_PIN_PU_E__READ                                         0x11000000U
+#define WRPR_PIN_PU_E__WRITE                                        0x11000000U
+#define WRPR_PIN_PU_E__PRESERVED                                    0x00000000U
+#define WRPR_PIN_PU_E__RESET_VALUE                                  0x00000000U
+
+#endif /* __WRPR_PIN_PU_E_MACRO__ */
+
+/** @} end of pin_pu_E */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_intrpt_cfg_0 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt_cfg_0 intrpt_cfg_0
+ * @brief Contains register fields associated with intrpt_cfg_0. definitions.
+ * @{
+ */
+#ifndef __WRPR_INTRPT_CFG_0_MACRO__
+#define __WRPR_INTRPT_CFG_0_MACRO__
+
+/* macros for field intrpt0_mask */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt0_mask_field intrpt0_mask_field
+ * @brief macros for field intrpt0_mask
+ * @details interrupt mask for interrupt[0] going into Cortex-M0
+ * @{
+ */
+#define WRPR_INTRPT_CFG_0__INTRPT0_MASK__SHIFT                                0
+#define WRPR_INTRPT_CFG_0__INTRPT0_MASK__WIDTH                               32
+#define WRPR_INTRPT_CFG_0__INTRPT0_MASK__MASK                       0xffffffffU
+#define WRPR_INTRPT_CFG_0__INTRPT0_MASK__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_0__INTRPT0_MASK__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_0__INTRPT0_MASK__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_INTRPT_CFG_0__INTRPT0_MASK__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_INTRPT_CFG_0__INTRPT0_MASK__RESET_VALUE                0x00000001U
+/** @} */
+#define WRPR_INTRPT_CFG_0__TYPE                                        uint32_t
+#define WRPR_INTRPT_CFG_0__READ                                     0xffffffffU
+#define WRPR_INTRPT_CFG_0__WRITE                                    0xffffffffU
+#define WRPR_INTRPT_CFG_0__PRESERVED                                0x00000000U
+#define WRPR_INTRPT_CFG_0__RESET_VALUE                              0x00000001U
+
+#endif /* __WRPR_INTRPT_CFG_0_MACRO__ */
+
+/** @} end of intrpt_cfg_0 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_intrpt_cfg_1 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt_cfg_1 intrpt_cfg_1
+ * @brief Contains register fields associated with intrpt_cfg_1. definitions.
+ * @{
+ */
+#ifndef __WRPR_INTRPT_CFG_1_MACRO__
+#define __WRPR_INTRPT_CFG_1_MACRO__
+
+/* macros for field intrpt1_mask */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt1_mask_field intrpt1_mask_field
+ * @brief macros for field intrpt1_mask
+ * @details interrupt mask for interrupt[1] going into Cortex-M0
+ * @{
+ */
+#define WRPR_INTRPT_CFG_1__INTRPT1_MASK__SHIFT                                0
+#define WRPR_INTRPT_CFG_1__INTRPT1_MASK__WIDTH                               32
+#define WRPR_INTRPT_CFG_1__INTRPT1_MASK__MASK                       0xffffffffU
+#define WRPR_INTRPT_CFG_1__INTRPT1_MASK__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_1__INTRPT1_MASK__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_1__INTRPT1_MASK__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_INTRPT_CFG_1__INTRPT1_MASK__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_INTRPT_CFG_1__INTRPT1_MASK__RESET_VALUE                0x00000002U
+/** @} */
+#define WRPR_INTRPT_CFG_1__TYPE                                        uint32_t
+#define WRPR_INTRPT_CFG_1__READ                                     0xffffffffU
+#define WRPR_INTRPT_CFG_1__WRITE                                    0xffffffffU
+#define WRPR_INTRPT_CFG_1__PRESERVED                                0x00000000U
+#define WRPR_INTRPT_CFG_1__RESET_VALUE                              0x00000002U
+
+#endif /* __WRPR_INTRPT_CFG_1_MACRO__ */
+
+/** @} end of intrpt_cfg_1 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_intrpt_cfg_2 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt_cfg_2 intrpt_cfg_2
+ * @brief Contains register fields associated with intrpt_cfg_2. definitions.
+ * @{
+ */
+#ifndef __WRPR_INTRPT_CFG_2_MACRO__
+#define __WRPR_INTRPT_CFG_2_MACRO__
+
+/* macros for field intrpt2_mask */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt2_mask_field intrpt2_mask_field
+ * @brief macros for field intrpt2_mask
+ * @details interrupt mask for interrupt[2] going into Cortex-M0
+ * @{
+ */
+#define WRPR_INTRPT_CFG_2__INTRPT2_MASK__SHIFT                                0
+#define WRPR_INTRPT_CFG_2__INTRPT2_MASK__WIDTH                               32
+#define WRPR_INTRPT_CFG_2__INTRPT2_MASK__MASK                       0xffffffffU
+#define WRPR_INTRPT_CFG_2__INTRPT2_MASK__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_2__INTRPT2_MASK__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_2__INTRPT2_MASK__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_INTRPT_CFG_2__INTRPT2_MASK__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_INTRPT_CFG_2__INTRPT2_MASK__RESET_VALUE                0x00000004U
+/** @} */
+#define WRPR_INTRPT_CFG_2__TYPE                                        uint32_t
+#define WRPR_INTRPT_CFG_2__READ                                     0xffffffffU
+#define WRPR_INTRPT_CFG_2__WRITE                                    0xffffffffU
+#define WRPR_INTRPT_CFG_2__PRESERVED                                0x00000000U
+#define WRPR_INTRPT_CFG_2__RESET_VALUE                              0x00000004U
+
+#endif /* __WRPR_INTRPT_CFG_2_MACRO__ */
+
+/** @} end of intrpt_cfg_2 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_intrpt_cfg_3 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt_cfg_3 intrpt_cfg_3
+ * @brief Contains register fields associated with intrpt_cfg_3. definitions.
+ * @{
+ */
+#ifndef __WRPR_INTRPT_CFG_3_MACRO__
+#define __WRPR_INTRPT_CFG_3_MACRO__
+
+/* macros for field intrpt3_mask */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt3_mask_field intrpt3_mask_field
+ * @brief macros for field intrpt3_mask
+ * @details interrupt mask for interrupt[3] going into Cortex-M0
+ * @{
+ */
+#define WRPR_INTRPT_CFG_3__INTRPT3_MASK__SHIFT                                0
+#define WRPR_INTRPT_CFG_3__INTRPT3_MASK__WIDTH                               32
+#define WRPR_INTRPT_CFG_3__INTRPT3_MASK__MASK                       0xffffffffU
+#define WRPR_INTRPT_CFG_3__INTRPT3_MASK__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_3__INTRPT3_MASK__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_3__INTRPT3_MASK__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_INTRPT_CFG_3__INTRPT3_MASK__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_INTRPT_CFG_3__INTRPT3_MASK__RESET_VALUE                0x00000008U
+/** @} */
+#define WRPR_INTRPT_CFG_3__TYPE                                        uint32_t
+#define WRPR_INTRPT_CFG_3__READ                                     0xffffffffU
+#define WRPR_INTRPT_CFG_3__WRITE                                    0xffffffffU
+#define WRPR_INTRPT_CFG_3__PRESERVED                                0x00000000U
+#define WRPR_INTRPT_CFG_3__RESET_VALUE                              0x00000008U
+
+#endif /* __WRPR_INTRPT_CFG_3_MACRO__ */
+
+/** @} end of intrpt_cfg_3 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_intrpt_cfg_4 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt_cfg_4 intrpt_cfg_4
+ * @brief Contains register fields associated with intrpt_cfg_4. definitions.
+ * @{
+ */
+#ifndef __WRPR_INTRPT_CFG_4_MACRO__
+#define __WRPR_INTRPT_CFG_4_MACRO__
+
+/* macros for field intrpt4_mask */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt4_mask_field intrpt4_mask_field
+ * @brief macros for field intrpt4_mask
+ * @details interrupt mask for interrupt[4] going into Cortex-M0
+ * @{
+ */
+#define WRPR_INTRPT_CFG_4__INTRPT4_MASK__SHIFT                                0
+#define WRPR_INTRPT_CFG_4__INTRPT4_MASK__WIDTH                               32
+#define WRPR_INTRPT_CFG_4__INTRPT4_MASK__MASK                       0xffffffffU
+#define WRPR_INTRPT_CFG_4__INTRPT4_MASK__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_4__INTRPT4_MASK__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_4__INTRPT4_MASK__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_INTRPT_CFG_4__INTRPT4_MASK__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_INTRPT_CFG_4__INTRPT4_MASK__RESET_VALUE                0x00002000U
+/** @} */
+#define WRPR_INTRPT_CFG_4__TYPE                                        uint32_t
+#define WRPR_INTRPT_CFG_4__READ                                     0xffffffffU
+#define WRPR_INTRPT_CFG_4__WRITE                                    0xffffffffU
+#define WRPR_INTRPT_CFG_4__PRESERVED                                0x00000000U
+#define WRPR_INTRPT_CFG_4__RESET_VALUE                              0x00002000U
+
+#endif /* __WRPR_INTRPT_CFG_4_MACRO__ */
+
+/** @} end of intrpt_cfg_4 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_intrpt_cfg_5 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt_cfg_5 intrpt_cfg_5
+ * @brief Contains register fields associated with intrpt_cfg_5. definitions.
+ * @{
+ */
+#ifndef __WRPR_INTRPT_CFG_5_MACRO__
+#define __WRPR_INTRPT_CFG_5_MACRO__
+
+/* macros for field intrpt5_mask */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt5_mask_field intrpt5_mask_field
+ * @brief macros for field intrpt5_mask
+ * @details interrupt mask for interrupt[5] going into Cortex-M0
+ * @{
+ */
+#define WRPR_INTRPT_CFG_5__INTRPT5_MASK__SHIFT                                0
+#define WRPR_INTRPT_CFG_5__INTRPT5_MASK__WIDTH                               32
+#define WRPR_INTRPT_CFG_5__INTRPT5_MASK__MASK                       0xffffffffU
+#define WRPR_INTRPT_CFG_5__INTRPT5_MASK__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_5__INTRPT5_MASK__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_5__INTRPT5_MASK__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_INTRPT_CFG_5__INTRPT5_MASK__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_INTRPT_CFG_5__INTRPT5_MASK__RESET_VALUE                0x00000000U
+/** @} */
+#define WRPR_INTRPT_CFG_5__TYPE                                        uint32_t
+#define WRPR_INTRPT_CFG_5__READ                                     0xffffffffU
+#define WRPR_INTRPT_CFG_5__WRITE                                    0xffffffffU
+#define WRPR_INTRPT_CFG_5__PRESERVED                                0x00000000U
+#define WRPR_INTRPT_CFG_5__RESET_VALUE                              0x00000000U
+
+#endif /* __WRPR_INTRPT_CFG_5_MACRO__ */
+
+/** @} end of intrpt_cfg_5 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_intrpt_cfg_6 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt_cfg_6 intrpt_cfg_6
+ * @brief Contains register fields associated with intrpt_cfg_6. definitions.
+ * @{
+ */
+#ifndef __WRPR_INTRPT_CFG_6_MACRO__
+#define __WRPR_INTRPT_CFG_6_MACRO__
+
+/* macros for field intrpt6_mask */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt6_mask_field intrpt6_mask_field
+ * @brief macros for field intrpt6_mask
+ * @details interrupt mask for interrupt[6] going into Cortex-M0
+ * @{
+ */
+#define WRPR_INTRPT_CFG_6__INTRPT6_MASK__SHIFT                                0
+#define WRPR_INTRPT_CFG_6__INTRPT6_MASK__WIDTH                               32
+#define WRPR_INTRPT_CFG_6__INTRPT6_MASK__MASK                       0xffffffffU
+#define WRPR_INTRPT_CFG_6__INTRPT6_MASK__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_6__INTRPT6_MASK__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_6__INTRPT6_MASK__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_INTRPT_CFG_6__INTRPT6_MASK__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_INTRPT_CFG_6__INTRPT6_MASK__RESET_VALUE                0x01ff0000U
+/** @} */
+#define WRPR_INTRPT_CFG_6__TYPE                                        uint32_t
+#define WRPR_INTRPT_CFG_6__READ                                     0xffffffffU
+#define WRPR_INTRPT_CFG_6__WRITE                                    0xffffffffU
+#define WRPR_INTRPT_CFG_6__PRESERVED                                0x00000000U
+#define WRPR_INTRPT_CFG_6__RESET_VALUE                              0x01ff0000U
+
+#endif /* __WRPR_INTRPT_CFG_6_MACRO__ */
+
+/** @} end of intrpt_cfg_6 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_intrpt_cfg_7 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt_cfg_7 intrpt_cfg_7
+ * @brief Contains register fields associated with intrpt_cfg_7. definitions.
+ * @{
+ */
+#ifndef __WRPR_INTRPT_CFG_7_MACRO__
+#define __WRPR_INTRPT_CFG_7_MACRO__
+
+/* macros for field intrpt7_mask */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt7_mask_field intrpt7_mask_field
+ * @brief macros for field intrpt7_mask
+ * @details interrupt mask for interrupt[7] going into Cortex-M0
+ * @{
+ */
+#define WRPR_INTRPT_CFG_7__INTRPT7_MASK__SHIFT                                0
+#define WRPR_INTRPT_CFG_7__INTRPT7_MASK__WIDTH                               32
+#define WRPR_INTRPT_CFG_7__INTRPT7_MASK__MASK                       0xffffffffU
+#define WRPR_INTRPT_CFG_7__INTRPT7_MASK__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_7__INTRPT7_MASK__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_7__INTRPT7_MASK__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_INTRPT_CFG_7__INTRPT7_MASK__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_INTRPT_CFG_7__INTRPT7_MASK__RESET_VALUE                0x02000010U
+/** @} */
+#define WRPR_INTRPT_CFG_7__TYPE                                        uint32_t
+#define WRPR_INTRPT_CFG_7__READ                                     0xffffffffU
+#define WRPR_INTRPT_CFG_7__WRITE                                    0xffffffffU
+#define WRPR_INTRPT_CFG_7__PRESERVED                                0x00000000U
+#define WRPR_INTRPT_CFG_7__RESET_VALUE                              0x02000010U
+
+#endif /* __WRPR_INTRPT_CFG_7_MACRO__ */
+
+/** @} end of intrpt_cfg_7 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_intrpt_cfg_8 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt_cfg_8 intrpt_cfg_8
+ * @brief Contains register fields associated with intrpt_cfg_8. definitions.
+ * @{
+ */
+#ifndef __WRPR_INTRPT_CFG_8_MACRO__
+#define __WRPR_INTRPT_CFG_8_MACRO__
+
+/* macros for field intrpt8_mask */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt8_mask_field intrpt8_mask_field
+ * @brief macros for field intrpt8_mask
+ * @details interrupt mask for interrupt[8] going into Cortex-M0
+ * @{
+ */
+#define WRPR_INTRPT_CFG_8__INTRPT8_MASK__SHIFT                                0
+#define WRPR_INTRPT_CFG_8__INTRPT8_MASK__WIDTH                               32
+#define WRPR_INTRPT_CFG_8__INTRPT8_MASK__MASK                       0xffffffffU
+#define WRPR_INTRPT_CFG_8__INTRPT8_MASK__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_8__INTRPT8_MASK__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_8__INTRPT8_MASK__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_INTRPT_CFG_8__INTRPT8_MASK__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_INTRPT_CFG_8__INTRPT8_MASK__RESET_VALUE                0x00000020U
+/** @} */
+#define WRPR_INTRPT_CFG_8__TYPE                                        uint32_t
+#define WRPR_INTRPT_CFG_8__READ                                     0xffffffffU
+#define WRPR_INTRPT_CFG_8__WRITE                                    0xffffffffU
+#define WRPR_INTRPT_CFG_8__PRESERVED                                0x00000000U
+#define WRPR_INTRPT_CFG_8__RESET_VALUE                              0x00000020U
+
+#endif /* __WRPR_INTRPT_CFG_8_MACRO__ */
+
+/** @} end of intrpt_cfg_8 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_intrpt_cfg_9 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt_cfg_9 intrpt_cfg_9
+ * @brief Contains register fields associated with intrpt_cfg_9. definitions.
+ * @{
+ */
+#ifndef __WRPR_INTRPT_CFG_9_MACRO__
+#define __WRPR_INTRPT_CFG_9_MACRO__
+
+/* macros for field intrpt9_mask */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt9_mask_field intrpt9_mask_field
+ * @brief macros for field intrpt9_mask
+ * @details interrupt mask for interrupt[9] going into Cortex-M0
+ * @{
+ */
+#define WRPR_INTRPT_CFG_9__INTRPT9_MASK__SHIFT                                0
+#define WRPR_INTRPT_CFG_9__INTRPT9_MASK__WIDTH                               32
+#define WRPR_INTRPT_CFG_9__INTRPT9_MASK__MASK                       0xffffffffU
+#define WRPR_INTRPT_CFG_9__INTRPT9_MASK__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_9__INTRPT9_MASK__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_9__INTRPT9_MASK__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_INTRPT_CFG_9__INTRPT9_MASK__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_INTRPT_CFG_9__INTRPT9_MASK__RESET_VALUE                0x00000040U
+/** @} */
+#define WRPR_INTRPT_CFG_9__TYPE                                        uint32_t
+#define WRPR_INTRPT_CFG_9__READ                                     0xffffffffU
+#define WRPR_INTRPT_CFG_9__WRITE                                    0xffffffffU
+#define WRPR_INTRPT_CFG_9__PRESERVED                                0x00000000U
+#define WRPR_INTRPT_CFG_9__RESET_VALUE                              0x00000040U
+
+#endif /* __WRPR_INTRPT_CFG_9_MACRO__ */
+
+/** @} end of intrpt_cfg_9 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_intrpt_cfg_10 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt_cfg_10 intrpt_cfg_10
+ * @brief Contains register fields associated with intrpt_cfg_10. definitions.
+ * @{
+ */
+#ifndef __WRPR_INTRPT_CFG_10_MACRO__
+#define __WRPR_INTRPT_CFG_10_MACRO__
+
+/* macros for field intrpt10_mask */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt10_mask_field intrpt10_mask_field
+ * @brief macros for field intrpt10_mask
+ * @details interrupt mask for interrupt[10] going into Cortex-M0
+ * @{
+ */
+#define WRPR_INTRPT_CFG_10__INTRPT10_MASK__SHIFT                              0
+#define WRPR_INTRPT_CFG_10__INTRPT10_MASK__WIDTH                             32
+#define WRPR_INTRPT_CFG_10__INTRPT10_MASK__MASK                     0xffffffffU
+#define WRPR_INTRPT_CFG_10__INTRPT10_MASK__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_10__INTRPT10_MASK__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_10__INTRPT10_MASK__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_INTRPT_CFG_10__INTRPT10_MASK__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_INTRPT_CFG_10__INTRPT10_MASK__RESET_VALUE              0x00000080U
+/** @} */
+#define WRPR_INTRPT_CFG_10__TYPE                                       uint32_t
+#define WRPR_INTRPT_CFG_10__READ                                    0xffffffffU
+#define WRPR_INTRPT_CFG_10__WRITE                                   0xffffffffU
+#define WRPR_INTRPT_CFG_10__PRESERVED                               0x00000000U
+#define WRPR_INTRPT_CFG_10__RESET_VALUE                             0x00000080U
+
+#endif /* __WRPR_INTRPT_CFG_10_MACRO__ */
+
+/** @} end of intrpt_cfg_10 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_intrpt_cfg_11 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt_cfg_11 intrpt_cfg_11
+ * @brief Contains register fields associated with intrpt_cfg_11. definitions.
+ * @{
+ */
+#ifndef __WRPR_INTRPT_CFG_11_MACRO__
+#define __WRPR_INTRPT_CFG_11_MACRO__
+
+/* macros for field intrpt11_mask */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt11_mask_field intrpt11_mask_field
+ * @brief macros for field intrpt11_mask
+ * @details interrupt mask for interrupt[11] going into Cortex-M0
+ * @{
+ */
+#define WRPR_INTRPT_CFG_11__INTRPT11_MASK__SHIFT                              0
+#define WRPR_INTRPT_CFG_11__INTRPT11_MASK__WIDTH                             32
+#define WRPR_INTRPT_CFG_11__INTRPT11_MASK__MASK                     0xffffffffU
+#define WRPR_INTRPT_CFG_11__INTRPT11_MASK__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_11__INTRPT11_MASK__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_11__INTRPT11_MASK__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_INTRPT_CFG_11__INTRPT11_MASK__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_INTRPT_CFG_11__INTRPT11_MASK__RESET_VALUE              0x00000100U
+/** @} */
+#define WRPR_INTRPT_CFG_11__TYPE                                       uint32_t
+#define WRPR_INTRPT_CFG_11__READ                                    0xffffffffU
+#define WRPR_INTRPT_CFG_11__WRITE                                   0xffffffffU
+#define WRPR_INTRPT_CFG_11__PRESERVED                               0x00000000U
+#define WRPR_INTRPT_CFG_11__RESET_VALUE                             0x00000100U
+
+#endif /* __WRPR_INTRPT_CFG_11_MACRO__ */
+
+/** @} end of intrpt_cfg_11 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_intrpt_cfg_12 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt_cfg_12 intrpt_cfg_12
+ * @brief Contains register fields associated with intrpt_cfg_12. definitions.
+ * @{
+ */
+#ifndef __WRPR_INTRPT_CFG_12_MACRO__
+#define __WRPR_INTRPT_CFG_12_MACRO__
+
+/* macros for field intrpt12_mask */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt12_mask_field intrpt12_mask_field
+ * @brief macros for field intrpt12_mask
+ * @details interrupt mask for interrupt[12] going into Cortex-M0
+ * @{
+ */
+#define WRPR_INTRPT_CFG_12__INTRPT12_MASK__SHIFT                              0
+#define WRPR_INTRPT_CFG_12__INTRPT12_MASK__WIDTH                             32
+#define WRPR_INTRPT_CFG_12__INTRPT12_MASK__MASK                     0xffffffffU
+#define WRPR_INTRPT_CFG_12__INTRPT12_MASK__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_12__INTRPT12_MASK__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_12__INTRPT12_MASK__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_INTRPT_CFG_12__INTRPT12_MASK__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_INTRPT_CFG_12__INTRPT12_MASK__RESET_VALUE              0x00000200U
+/** @} */
+#define WRPR_INTRPT_CFG_12__TYPE                                       uint32_t
+#define WRPR_INTRPT_CFG_12__READ                                    0xffffffffU
+#define WRPR_INTRPT_CFG_12__WRITE                                   0xffffffffU
+#define WRPR_INTRPT_CFG_12__PRESERVED                               0x00000000U
+#define WRPR_INTRPT_CFG_12__RESET_VALUE                             0x00000200U
+
+#endif /* __WRPR_INTRPT_CFG_12_MACRO__ */
+
+/** @} end of intrpt_cfg_12 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_intrpt_cfg_13 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt_cfg_13 intrpt_cfg_13
+ * @brief Contains register fields associated with intrpt_cfg_13. definitions.
+ * @{
+ */
+#ifndef __WRPR_INTRPT_CFG_13_MACRO__
+#define __WRPR_INTRPT_CFG_13_MACRO__
+
+/* macros for field intrpt13_mask */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt13_mask_field intrpt13_mask_field
+ * @brief macros for field intrpt13_mask
+ * @details interrupt mask for interrupt[13] going into Cortex-M0
+ * @{
+ */
+#define WRPR_INTRPT_CFG_13__INTRPT13_MASK__SHIFT                              0
+#define WRPR_INTRPT_CFG_13__INTRPT13_MASK__WIDTH                             32
+#define WRPR_INTRPT_CFG_13__INTRPT13_MASK__MASK                     0xffffffffU
+#define WRPR_INTRPT_CFG_13__INTRPT13_MASK__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_13__INTRPT13_MASK__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_13__INTRPT13_MASK__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_INTRPT_CFG_13__INTRPT13_MASK__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_INTRPT_CFG_13__INTRPT13_MASK__RESET_VALUE              0x00000400U
+/** @} */
+#define WRPR_INTRPT_CFG_13__TYPE                                       uint32_t
+#define WRPR_INTRPT_CFG_13__READ                                    0xffffffffU
+#define WRPR_INTRPT_CFG_13__WRITE                                   0xffffffffU
+#define WRPR_INTRPT_CFG_13__PRESERVED                               0x00000000U
+#define WRPR_INTRPT_CFG_13__RESET_VALUE                             0x00000400U
+
+#endif /* __WRPR_INTRPT_CFG_13_MACRO__ */
+
+/** @} end of intrpt_cfg_13 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_intrpt_cfg_14 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt_cfg_14 intrpt_cfg_14
+ * @brief Contains register fields associated with intrpt_cfg_14. definitions.
+ * @{
+ */
+#ifndef __WRPR_INTRPT_CFG_14_MACRO__
+#define __WRPR_INTRPT_CFG_14_MACRO__
+
+/* macros for field intrpt14_mask */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt14_mask_field intrpt14_mask_field
+ * @brief macros for field intrpt14_mask
+ * @details interrupt mask for interrupt[14] going into Cortex-M0
+ * @{
+ */
+#define WRPR_INTRPT_CFG_14__INTRPT14_MASK__SHIFT                              0
+#define WRPR_INTRPT_CFG_14__INTRPT14_MASK__WIDTH                             32
+#define WRPR_INTRPT_CFG_14__INTRPT14_MASK__MASK                     0xffffffffU
+#define WRPR_INTRPT_CFG_14__INTRPT14_MASK__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_14__INTRPT14_MASK__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_14__INTRPT14_MASK__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_INTRPT_CFG_14__INTRPT14_MASK__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_INTRPT_CFG_14__INTRPT14_MASK__RESET_VALUE              0x00000800U
+/** @} */
+#define WRPR_INTRPT_CFG_14__TYPE                                       uint32_t
+#define WRPR_INTRPT_CFG_14__READ                                    0xffffffffU
+#define WRPR_INTRPT_CFG_14__WRITE                                   0xffffffffU
+#define WRPR_INTRPT_CFG_14__PRESERVED                               0x00000000U
+#define WRPR_INTRPT_CFG_14__RESET_VALUE                             0x00000800U
+
+#endif /* __WRPR_INTRPT_CFG_14_MACRO__ */
+
+/** @} end of intrpt_cfg_14 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_intrpt_cfg_15 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt_cfg_15 intrpt_cfg_15
+ * @brief Contains register fields associated with intrpt_cfg_15. definitions.
+ * @{
+ */
+#ifndef __WRPR_INTRPT_CFG_15_MACRO__
+#define __WRPR_INTRPT_CFG_15_MACRO__
+
+/* macros for field intrpt15_mask */
+/**
+ * @defgroup at_apb_wrpr_regs_core_intrpt15_mask_field intrpt15_mask_field
+ * @brief macros for field intrpt15_mask
+ * @details interrupt mask for interrupt[15] going into Cortex-M0
+ * @{
+ */
+#define WRPR_INTRPT_CFG_15__INTRPT15_MASK__SHIFT                              0
+#define WRPR_INTRPT_CFG_15__INTRPT15_MASK__WIDTH                             32
+#define WRPR_INTRPT_CFG_15__INTRPT15_MASK__MASK                     0xffffffffU
+#define WRPR_INTRPT_CFG_15__INTRPT15_MASK__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_15__INTRPT15_MASK__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0xffffffffU)
+#define WRPR_INTRPT_CFG_15__INTRPT15_MASK__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_INTRPT_CFG_15__INTRPT15_MASK__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_INTRPT_CFG_15__INTRPT15_MASK__RESET_VALUE              0x3c001000U
+/** @} */
+#define WRPR_INTRPT_CFG_15__TYPE                                       uint32_t
+#define WRPR_INTRPT_CFG_15__READ                                    0xffffffffU
+#define WRPR_INTRPT_CFG_15__WRITE                                   0xffffffffU
+#define WRPR_INTRPT_CFG_15__PRESERVED                               0x00000000U
+#define WRPR_INTRPT_CFG_15__RESET_VALUE                             0x3c001000U
+
+#endif /* __WRPR_INTRPT_CFG_15_MACRO__ */
+
+/** @} end of intrpt_cfg_15 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_remap */
+/**
+ * @defgroup at_apb_wrpr_regs_core_remap remap
+ * @brief Contains register fields associated with remap. definitions.
+ * @{
+ */
+#ifndef __WRPR_REMAP_MACRO__
+#define __WRPR_REMAP_MACRO__
+
+/* macros for field qspi_drop */
+/**
+ * @defgroup at_apb_wrpr_regs_core_qspi_drop_field qspi_drop_field
+ * @brief macros for field qspi_drop
+ * @details Drops the at_ahb_qspi address start from 0x10000000 to 0x0. No change in range.
+ * @{
+ */
+#define WRPR_REMAP__QSPI_DROP__SHIFT                                          0
+#define WRPR_REMAP__QSPI_DROP__WIDTH                                          1
+#define WRPR_REMAP__QSPI_DROP__MASK                                 0x00000001U
+#define WRPR_REMAP__QSPI_DROP__READ(src)        ((uint32_t)(src) & 0x00000001U)
+#define WRPR_REMAP__QSPI_DROP__WRITE(src)       ((uint32_t)(src) & 0x00000001U)
+#define WRPR_REMAP__QSPI_DROP__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_REMAP__QSPI_DROP__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_REMAP__QSPI_DROP__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_REMAP__QSPI_DROP__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_REMAP__QSPI_DROP__RESET_VALUE                          0x00000000U
+/** @} */
+#define WRPR_REMAP__TYPE                                               uint32_t
+#define WRPR_REMAP__READ                                            0x00000001U
+#define WRPR_REMAP__WRITE                                           0x00000001U
+#define WRPR_REMAP__PRESERVED                                       0x00000000U
+#define WRPR_REMAP__RESET_VALUE                                     0x00000000U
+
+#endif /* __WRPR_REMAP_MACRO__ */
+
+/** @} end of remap */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_ahb_interposers */
+/**
+ * @defgroup at_apb_wrpr_regs_core_ahb_interposers ahb_interposers
+ * @brief Contains register fields associated with ahb_interposers. definitions.
+ * @{
+ */
+#ifndef __WRPR_AHB_INTERPOSERS_MACRO__
+#define __WRPR_AHB_INTERPOSERS_MACRO__
+
+/* macros for field qspi_intp_enable */
+/**
+ * @defgroup at_apb_wrpr_regs_core_qspi_intp_enable_field qspi_intp_enable_field
+ * @brief macros for field qspi_intp_enable
+ * @details If set, interposers are inserted between backplane and peripherals. If peripherals do not respond within allocated time, the interposer returns error on bus. Prevents the software from hanging on bad bus transactions such as read or write to invalid address.
+ * @{
+ */
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_ENABLE__SHIFT                         0
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_ENABLE__WIDTH                         1
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_ENABLE__MASK                0x00000001U
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_ENABLE__READ(src) \
+                    ((uint32_t)(src)\
+                    & 0x00000001U)
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_ENABLE__WRITE(src) \
+                    ((uint32_t)(src)\
+                    & 0x00000001U)
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_ENABLE__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | ((uint32_t)(src) &\
+                    0x00000001U)
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_ENABLE__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0x00000001U)))
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_ENABLE__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(1)
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_ENABLE__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000001U) | (uint32_t)(0)
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_ENABLE__RESET_VALUE         0x00000001U
+/** @} */
+
+/* macros for field qspi_intp_low_ceiling */
+/**
+ * @defgroup at_apb_wrpr_regs_core_qspi_intp_low_ceiling_field qspi_intp_low_ceiling_field
+ * @brief macros for field qspi_intp_low_ceiling
+ * @details If set, lowers the interposer timeout. Useful for testing interposer functionality in simulation.
+ * @{
+ */
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_LOW_CEILING__SHIFT                    1
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_LOW_CEILING__WIDTH                    1
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_LOW_CEILING__MASK           0x00000002U
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_LOW_CEILING__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00000002U) >> 1)
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_LOW_CEILING__WRITE(src) \
+                    (((uint32_t)(src)\
+                    << 1) & 0x00000002U)
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_LOW_CEILING__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | (((uint32_t)(src) <<\
+                    1) & 0x00000002U)
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_LOW_CEILING__VERIFY(src) \
+                    (!((((uint32_t)(src)\
+                    << 1) & ~0x00000002U)))
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_LOW_CEILING__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(1) << 1)
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_LOW_CEILING__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00000002U) | ((uint32_t)(0) << 1)
+#define WRPR_AHB_INTERPOSERS__QSPI_INTP_LOW_CEILING__RESET_VALUE    0x00000000U
+/** @} */
+#define WRPR_AHB_INTERPOSERS__TYPE                                     uint32_t
+#define WRPR_AHB_INTERPOSERS__READ                                  0x00000003U
+#define WRPR_AHB_INTERPOSERS__WRITE                                 0x00000003U
+#define WRPR_AHB_INTERPOSERS__PRESERVED                             0x00000000U
+#define WRPR_AHB_INTERPOSERS__RESET_VALUE                           0x00000001U
+
+#endif /* __WRPR_AHB_INTERPOSERS_MACRO__ */
+
+/** @} end of ahb_interposers */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_scratchpad_A */
+/**
+ * @defgroup at_apb_wrpr_regs_core_scratchpad_A scratchpad_A
+ * @brief Contains register fields associated with scratchpad_A. definitions.
+ * @{
+ */
+#ifndef __WRPR_SCRATCHPAD_A_MACRO__
+#define __WRPR_SCRATCHPAD_A_MACRO__
+
+/* macros for field misc */
+/**
+ * @defgroup at_apb_wrpr_regs_core_misc_field misc_field
+ * @brief macros for field misc
+ * @details mostly likely will be used to inject random seed in sim
+ * @{
+ */
+#define WRPR_SCRATCHPAD_A__MISC__SHIFT                                        0
+#define WRPR_SCRATCHPAD_A__MISC__WIDTH                                       32
+#define WRPR_SCRATCHPAD_A__MISC__MASK                               0xffffffffU
+#define WRPR_SCRATCHPAD_A__MISC__READ(src)      ((uint32_t)(src) & 0xffffffffU)
+#define WRPR_SCRATCHPAD_A__MISC__WRITE(src)     ((uint32_t)(src) & 0xffffffffU)
+#define WRPR_SCRATCHPAD_A__MISC__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_SCRATCHPAD_A__MISC__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_SCRATCHPAD_A__MISC__RESET_VALUE                        0x00000000U
+/** @} */
+#define WRPR_SCRATCHPAD_A__TYPE                                        uint32_t
+#define WRPR_SCRATCHPAD_A__READ                                     0xffffffffU
+#define WRPR_SCRATCHPAD_A__WRITE                                    0xffffffffU
+#define WRPR_SCRATCHPAD_A__PRESERVED                                0x00000000U
+#define WRPR_SCRATCHPAD_A__RESET_VALUE                              0x00000000U
+
+#endif /* __WRPR_SCRATCHPAD_A_MACRO__ */
+
+/** @} end of scratchpad_A */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_scratchpad_B */
+/**
+ * @defgroup at_apb_wrpr_regs_core_scratchpad_B scratchpad_B
+ * @brief Contains register fields associated with scratchpad_B. definitions.
+ * @{
+ */
+#ifndef __WRPR_SCRATCHPAD_B_MACRO__
+#define __WRPR_SCRATCHPAD_B_MACRO__
+
+/* macros for field misc */
+/**
+ * @defgroup at_apb_wrpr_regs_core_misc_field misc_field
+ * @brief macros for field misc
+ * @details mostly likely will be used to inject random seed in sim
+ * @{
+ */
+#define WRPR_SCRATCHPAD_B__MISC__SHIFT                                        0
+#define WRPR_SCRATCHPAD_B__MISC__WIDTH                                       32
+#define WRPR_SCRATCHPAD_B__MISC__MASK                               0xffffffffU
+#define WRPR_SCRATCHPAD_B__MISC__READ(src)      ((uint32_t)(src) & 0xffffffffU)
+#define WRPR_SCRATCHPAD_B__MISC__WRITE(src)     ((uint32_t)(src) & 0xffffffffU)
+#define WRPR_SCRATCHPAD_B__MISC__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_SCRATCHPAD_B__MISC__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_SCRATCHPAD_B__MISC__RESET_VALUE                        0x00000000U
+/** @} */
+#define WRPR_SCRATCHPAD_B__TYPE                                        uint32_t
+#define WRPR_SCRATCHPAD_B__READ                                     0xffffffffU
+#define WRPR_SCRATCHPAD_B__WRITE                                    0xffffffffU
+#define WRPR_SCRATCHPAD_B__PRESERVED                                0x00000000U
+#define WRPR_SCRATCHPAD_B__RESET_VALUE                              0x00000000U
+
+#endif /* __WRPR_SCRATCHPAD_B_MACRO__ */
+
+/** @} end of scratchpad_B */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_scratchpad_C */
+/**
+ * @defgroup at_apb_wrpr_regs_core_scratchpad_C scratchpad_C
+ * @brief Contains register fields associated with scratchpad_C. definitions.
+ * @{
+ */
+#ifndef __WRPR_SCRATCHPAD_C_MACRO__
+#define __WRPR_SCRATCHPAD_C_MACRO__
+
+/* macros for field misc */
+/**
+ * @defgroup at_apb_wrpr_regs_core_misc_field misc_field
+ * @brief macros for field misc
+ * @details mostly likely will be used to inject random seed in sim
+ * @{
+ */
+#define WRPR_SCRATCHPAD_C__MISC__SHIFT                                        0
+#define WRPR_SCRATCHPAD_C__MISC__WIDTH                                       32
+#define WRPR_SCRATCHPAD_C__MISC__MASK                               0xffffffffU
+#define WRPR_SCRATCHPAD_C__MISC__READ(src)      ((uint32_t)(src) & 0xffffffffU)
+#define WRPR_SCRATCHPAD_C__MISC__WRITE(src)     ((uint32_t)(src) & 0xffffffffU)
+#define WRPR_SCRATCHPAD_C__MISC__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_SCRATCHPAD_C__MISC__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_SCRATCHPAD_C__MISC__RESET_VALUE                        0x00000000U
+/** @} */
+#define WRPR_SCRATCHPAD_C__TYPE                                        uint32_t
+#define WRPR_SCRATCHPAD_C__READ                                     0xffffffffU
+#define WRPR_SCRATCHPAD_C__WRITE                                    0xffffffffU
+#define WRPR_SCRATCHPAD_C__PRESERVED                                0x00000000U
+#define WRPR_SCRATCHPAD_C__RESET_VALUE                              0x00000000U
+
+#endif /* __WRPR_SCRATCHPAD_C_MACRO__ */
+
+/** @} end of scratchpad_C */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_scratchpad_D */
+/**
+ * @defgroup at_apb_wrpr_regs_core_scratchpad_D scratchpad_D
+ * @brief Contains register fields associated with scratchpad_D. definitions.
+ * @{
+ */
+#ifndef __WRPR_SCRATCHPAD_D_MACRO__
+#define __WRPR_SCRATCHPAD_D_MACRO__
+
+/* macros for field misc */
+/**
+ * @defgroup at_apb_wrpr_regs_core_misc_field misc_field
+ * @brief macros for field misc
+ * @details mostly likely will be used to inject random seed in sim
+ * @{
+ */
+#define WRPR_SCRATCHPAD_D__MISC__SHIFT                                        0
+#define WRPR_SCRATCHPAD_D__MISC__WIDTH                                       32
+#define WRPR_SCRATCHPAD_D__MISC__MASK                               0xffffffffU
+#define WRPR_SCRATCHPAD_D__MISC__READ(src)      ((uint32_t)(src) & 0xffffffffU)
+#define WRPR_SCRATCHPAD_D__MISC__WRITE(src)     ((uint32_t)(src) & 0xffffffffU)
+#define WRPR_SCRATCHPAD_D__MISC__MODIFY(dst, src) \
+                    (dst) = ((dst) &\
+                    ~0xffffffffU) | ((uint32_t)(src) &\
+                    0xffffffffU)
+#define WRPR_SCRATCHPAD_D__MISC__VERIFY(src) \
+                    (!(((uint32_t)(src)\
+                    & ~0xffffffffU)))
+#define WRPR_SCRATCHPAD_D__MISC__RESET_VALUE                        0x00000000U
+/** @} */
+#define WRPR_SCRATCHPAD_D__TYPE                                        uint32_t
+#define WRPR_SCRATCHPAD_D__READ                                     0xffffffffU
+#define WRPR_SCRATCHPAD_D__WRITE                                    0xffffffffU
+#define WRPR_SCRATCHPAD_D__PRESERVED                                0x00000000U
+#define WRPR_SCRATCHPAD_D__RESET_VALUE                              0x00000000U
+
+#endif /* __WRPR_SCRATCHPAD_D_MACRO__ */
+
+/** @} end of scratchpad_D */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_chipid1 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_chipid1 chipid1
+ * @brief Contains register fields associated with chipid1. definitions.
+ * @{
+ */
+#ifndef __WRPR_CHIPID1_MACRO__
+#define __WRPR_CHIPID1_MACRO__
+
+/* macros for field char3 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_char3_field char3_field
+ * @brief macros for field char3
+ * @details n
+ * @{
+ */
+#define WRPR_CHIPID1__CHAR3__SHIFT                                            0
+#define WRPR_CHIPID1__CHAR3__WIDTH                                            8
+#define WRPR_CHIPID1__CHAR3__MASK                                   0x000000ffU
+#define WRPR_CHIPID1__CHAR3__READ(src)          ((uint32_t)(src) & 0x000000ffU)
+#define WRPR_CHIPID1__CHAR3__RESET_VALUE                            0x0000006eU
+/** @} */
+
+/* macros for field char2 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_char2_field char2_field
+ * @brief macros for field char2
+ * @details d
+ * @{
+ */
+#define WRPR_CHIPID1__CHAR2__SHIFT                                            8
+#define WRPR_CHIPID1__CHAR2__WIDTH                                            8
+#define WRPR_CHIPID1__CHAR2__MASK                                   0x0000ff00U
+#define WRPR_CHIPID1__CHAR2__READ(src)   (((uint32_t)(src) & 0x0000ff00U) >> 8)
+#define WRPR_CHIPID1__CHAR2__RESET_VALUE                            0x00000064U
+/** @} */
+
+/* macros for field char1 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_char1_field char1_field
+ * @brief macros for field char1
+ * @details y
+ * @{
+ */
+#define WRPR_CHIPID1__CHAR1__SHIFT                                           16
+#define WRPR_CHIPID1__CHAR1__WIDTH                                            8
+#define WRPR_CHIPID1__CHAR1__MASK                                   0x00ff0000U
+#define WRPR_CHIPID1__CHAR1__READ(src)  (((uint32_t)(src) & 0x00ff0000U) >> 16)
+#define WRPR_CHIPID1__CHAR1__RESET_VALUE                            0x00000079U
+/** @} */
+
+/* macros for field char0 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_char0_field char0_field
+ * @brief macros for field char0
+ * @details S
+ * @{
+ */
+#define WRPR_CHIPID1__CHAR0__SHIFT                                           24
+#define WRPR_CHIPID1__CHAR0__WIDTH                                            8
+#define WRPR_CHIPID1__CHAR0__MASK                                   0xff000000U
+#define WRPR_CHIPID1__CHAR0__READ(src)  (((uint32_t)(src) & 0xff000000U) >> 24)
+#define WRPR_CHIPID1__CHAR0__RESET_VALUE                            0x00000053U
+/** @} */
+#define WRPR_CHIPID1__TYPE                                             uint32_t
+#define WRPR_CHIPID1__READ                                          0xffffffffU
+#define WRPR_CHIPID1__PRESERVED                                     0x00000000U
+#define WRPR_CHIPID1__RESET_VALUE                                   0x5379646eU
+
+#endif /* __WRPR_CHIPID1_MACRO__ */
+
+/** @} end of chipid1 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_chipid2 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_chipid2 chipid2
+ * @brief Contains register fields associated with chipid2. definitions.
+ * @{
+ */
+#ifndef __WRPR_CHIPID2_MACRO__
+#define __WRPR_CHIPID2_MACRO__
+
+/* macros for field char7 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_char7_field char7_field
+ * @brief macros for field char7
+ * @details nul
+ * @{
+ */
+#define WRPR_CHIPID2__CHAR7__SHIFT                                            0
+#define WRPR_CHIPID2__CHAR7__WIDTH                                            8
+#define WRPR_CHIPID2__CHAR7__MASK                                   0x000000ffU
+#define WRPR_CHIPID2__CHAR7__READ(src)          ((uint32_t)(src) & 0x000000ffU)
+#define WRPR_CHIPID2__CHAR7__RESET_VALUE                            0x00000000U
+/** @} */
+
+/* macros for field char6 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_char6_field char6_field
+ * @brief macros for field char6
+ * @details nul
+ * @{
+ */
+#define WRPR_CHIPID2__CHAR6__SHIFT                                            8
+#define WRPR_CHIPID2__CHAR6__WIDTH                                            8
+#define WRPR_CHIPID2__CHAR6__MASK                                   0x0000ff00U
+#define WRPR_CHIPID2__CHAR6__READ(src)   (((uint32_t)(src) & 0x0000ff00U) >> 8)
+#define WRPR_CHIPID2__CHAR6__RESET_VALUE                            0x00000000U
+/** @} */
+
+/* macros for field char5 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_char5_field char5_field
+ * @brief macros for field char5
+ * @details y
+ * @{
+ */
+#define WRPR_CHIPID2__CHAR5__SHIFT                                           16
+#define WRPR_CHIPID2__CHAR5__WIDTH                                            8
+#define WRPR_CHIPID2__CHAR5__MASK                                   0x00ff0000U
+#define WRPR_CHIPID2__CHAR5__READ(src)  (((uint32_t)(src) & 0x00ff0000U) >> 16)
+#define WRPR_CHIPID2__CHAR5__RESET_VALUE                            0x00000079U
+/** @} */
+
+/* macros for field char4 */
+/**
+ * @defgroup at_apb_wrpr_regs_core_char4_field char4_field
+ * @brief macros for field char4
+ * @details e
+ * @{
+ */
+#define WRPR_CHIPID2__CHAR4__SHIFT                                           24
+#define WRPR_CHIPID2__CHAR4__WIDTH                                            8
+#define WRPR_CHIPID2__CHAR4__MASK                                   0xff000000U
+#define WRPR_CHIPID2__CHAR4__READ(src)  (((uint32_t)(src) & 0xff000000U) >> 24)
+#define WRPR_CHIPID2__CHAR4__RESET_VALUE                            0x00000065U
+/** @} */
+#define WRPR_CHIPID2__TYPE                                             uint32_t
+#define WRPR_CHIPID2__READ                                          0xffffffffU
+#define WRPR_CHIPID2__PRESERVED                                     0x00000000U
+#define WRPR_CHIPID2__RESET_VALUE                                   0x65790000U
+
+#endif /* __WRPR_CHIPID2_MACRO__ */
+
+/** @} end of chipid2 */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_chiprev */
+/**
+ * @defgroup at_apb_wrpr_regs_core_chiprev chiprev
+ * @brief Contains register fields associated with chiprev. definitions.
+ * @{
+ */
+#ifndef __WRPR_CHIPREV_MACRO__
+#define __WRPR_CHIPREV_MACRO__
+
+/* macros for field minor */
+/**
+ * @defgroup at_apb_wrpr_regs_core_minor_field minor_field
+ * @brief macros for field minor
+ * @details Minor revision number.
+ * @{
+ */
+#define WRPR_CHIPREV__MINOR__SHIFT                                            0
+#define WRPR_CHIPREV__MINOR__WIDTH                                            8
+#define WRPR_CHIPREV__MINOR__MASK                                   0x000000ffU
+#define WRPR_CHIPREV__MINOR__READ(src)          ((uint32_t)(src) & 0x000000ffU)
+#define WRPR_CHIPREV__MINOR__RESET_VALUE                            0x00000002U
+/** @} */
+
+/* macros for field major */
+/**
+ * @defgroup at_apb_wrpr_regs_core_major_field major_field
+ * @brief macros for field major
+ * @details Major revision number.
+ * @{
+ */
+#define WRPR_CHIPREV__MAJOR__SHIFT                                            8
+#define WRPR_CHIPREV__MAJOR__WIDTH                                            8
+#define WRPR_CHIPREV__MAJOR__MASK                                   0x0000ff00U
+#define WRPR_CHIPREV__MAJOR__READ(src)   (((uint32_t)(src) & 0x0000ff00U) >> 8)
+#define WRPR_CHIPREV__MAJOR__RESET_VALUE                            0x00000002U
+/** @} */
+
+/* macros for field running_off_32khz_xtal */
+/**
+ * @defgroup at_apb_wrpr_regs_core_running_off_32khz_xtal_field running_off_32khz_xtal_field
+ * @brief macros for field running_off_32khz_xtal
+ * @details Is clk_lpc running off crystal?  0 = oscillator based  1 = crystal based
+ * @{
+ */
+#define WRPR_CHIPREV__RUNNING_OFF_32KHZ_XTAL__SHIFT                          16
+#define WRPR_CHIPREV__RUNNING_OFF_32KHZ_XTAL__WIDTH                           1
+#define WRPR_CHIPREV__RUNNING_OFF_32KHZ_XTAL__MASK                  0x00010000U
+#define WRPR_CHIPREV__RUNNING_OFF_32KHZ_XTAL__READ(src) \
+                    (((uint32_t)(src)\
+                    & 0x00010000U) >> 16)
+#define WRPR_CHIPREV__RUNNING_OFF_32KHZ_XTAL__SET(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00010000U) | ((uint32_t)(1) << 16)
+#define WRPR_CHIPREV__RUNNING_OFF_32KHZ_XTAL__CLR(dst) \
+                    (dst) = ((dst) &\
+                    ~0x00010000U) | ((uint32_t)(0) << 16)
+#define WRPR_CHIPREV__RUNNING_OFF_32KHZ_XTAL__RESET_VALUE           0x00000000U
+/** @} */
+#define WRPR_CHIPREV__TYPE                                             uint32_t
+#define WRPR_CHIPREV__READ                                          0x0001ffffU
+#define WRPR_CHIPREV__PRESERVED                                     0x00000000U
+#define WRPR_CHIPREV__RESET_VALUE                                   0x00000202U
+
+#endif /* __WRPR_CHIPREV_MACRO__ */
+
+/** @} end of chiprev */
+
+/* macros for BlueprintGlobalNameSpace::WRPR_core_id */
+/**
+ * @defgroup at_apb_wrpr_regs_core_core_id core_id
+ * @brief Contains register fields associated with core_id. definitions.
+ * @{
+ */
+#ifndef __WRPR_CORE_ID_MACRO__
+#define __WRPR_CORE_ID_MACRO__
+
+/* macros for field id */
+/**
+ * @defgroup at_apb_wrpr_regs_core_id_field id_field
+ * @brief macros for field id
+ * @details WRPR in ASCII
+ * @{
+ */
+#define WRPR_CORE_ID__ID__SHIFT                                               0
+#define WRPR_CORE_ID__ID__WIDTH                                              32
+#define WRPR_CORE_ID__ID__MASK                                      0xffffffffU
+#define WRPR_CORE_ID__ID__READ(src)             ((uint32_t)(src) & 0xffffffffU)
+#define WRPR_CORE_ID__ID__RESET_VALUE                               0x57525052U
+/** @} */
+#define WRPR_CORE_ID__TYPE                                             uint32_t
+#define WRPR_CORE_ID__READ                                          0xffffffffU
+#define WRPR_CORE_ID__PRESERVED                                     0x00000000U
+#define WRPR_CORE_ID__RESET_VALUE                                   0x57525052U
+
+#endif /* __WRPR_CORE_ID_MACRO__ */
+
+/** @} end of core_id */
+
+/** @} end of AT_APB_WRPR_REGS_CORE */
+#endif /* __REG_AT_APB_WRPR_REGS_CORE_H__ */
diff --git a/platform/atm2/ATM22xx-x1x/include/reg/at_wrpr.h b/platform/atm2/ATM22xx-x1x/include/reg/at_wrpr.h
new file mode 100644
index 0000000..eb75b21
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/reg/at_wrpr.h
@@ -0,0 +1,199 @@
+/**
+ ******************************************************************************
+ *
+ * @file at_wrpr.h
+ *
+ * @brief Peripheral module clock and reset control
+ *
+ * Copyright (C) Atmosic 2020
+ *
+ ******************************************************************************
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdlib.h>
+#include "at_apb_wrpr_regs_core_macro.h"
+#include "at_apb1_wrpr_regs_core_macro.h"
+
+#define WRPR_CTRL__CLK_DISABLE	0x00000000U
+#define WRPR_CTRL__CLK_ENABLE	0x00000001U
+#define WRPR_CTRL__SRESET	0x00000002U
+
+#define APB_MOD_SIZE		0x1000
+#define APB0_NUM_MODULES	16
+#define APB1_NUM_MODULES	16
+
+__STATIC_FORCEINLINE uint32_t volatile *
+module_to_ctrl(void const volatile *addr)
+{
+    uintptr_t address = (uintptr_t)addr;
+
+    if ((address >= CMSDK_APB_BASE) &&
+	(address < CMSDK_APB_BASE + (APB_MOD_SIZE * APB0_NUM_MODULES))) {
+	int i = (address - CMSDK_APB_BASE) / APB_MOD_SIZE;
+	return ((&CMSDK_WRPR->APB0_CTRL) + i);
+    }
+    if ((address >= CMSDK_APB1_BASE) &&
+	(address < CMSDK_APB1_BASE + (APB_MOD_SIZE * APB1_NUM_MODULES))) {
+	int i = (address - CMSDK_APB1_BASE) / APB_MOD_SIZE;
+	return ((&CMSDK_WRPR1->APB0_CTRL) + i);
+    }
+    return (NULL);
+}
+
+#define WRPR_CTRL_GET(__m) ({ \
+    *module_to_ctrl(__m); \
+})
+
+#define WRPR_CTRL_SET(__m, __s) do { \
+    *module_to_ctrl(__m) = (__s); \
+} while (0)
+
+#define WRPR_CTRL_GETSET(__m, __s) ({ \
+    uint32_t volatile *_ctrl = module_to_ctrl(__m); \
+    uint32_t _ret = *_ctrl; \
+    *_ctrl = (__s); \
+    _ret; \
+})
+
+/*
+ * PUSH/POP macros mimic do/while syntax:
+ *
+ * WRPR_CTRL_PUSH(CMSDK_PSEQ, WRPR_CTRL__CLK_ENABLE) {
+ *     ...;
+ * } WRPR_CTRL_POP();
+ */
+#define WRPR_CTRL_PUSH(__m, __s) do { \
+    uint32_t volatile *wrpr_ctrl_addr = module_to_ctrl(__m); \
+    uint32_t wrpr_ctrl_save = *wrpr_ctrl_addr; \
+    *wrpr_ctrl_addr = (__s); \
+    do
+
+#define WRPR_CTRL_POP() \
+    while (0); \
+    *wrpr_ctrl_addr = wrpr_ctrl_save; \
+} while (0)
+
+/*
+ * Pin to selection register mapping
+ */
+#define PSEL_REG_P0	PIN_SELECTION_A
+#define PSEL_REG_P1	PIN_SELECTION_A
+#define PSEL_REG_P2	PIN_SELECTION_A
+#define PSEL_REG_P3	PIN_SELECTION_A
+#define PSEL_REG_P4	PIN_SELECTION_A
+#define PSEL_REG_P5	PIN_SELECTION_A
+#define PSEL_REG_P6	PIN_SELECTION_B
+#define PSEL_REG_P7	PIN_SELECTION_B
+#define PSEL_REG_P8	PIN_SELECTION_B
+#define PSEL_REG_P9	PIN_SELECTION_B
+#define PSEL_REG_P10	PIN_SELECTION_B
+#define PSEL_REG_P11	PIN_SELECTION_B
+#define PSEL_REG_P12	PIN_SELECTION_C
+#define PSEL_REG_P13	PIN_SELECTION_C
+#define PSEL_REG_P14	PIN_SELECTION_C
+#define PSEL_REG_P15	PIN_SELECTION_C
+#define PSEL_REG_P16	PIN_SELECTION_C
+#define PSEL_REG_P17	PIN_SELECTION_C
+#define PSEL_REG_P18	PIN_SELECTION_D
+#define PSEL_REG_P19	PIN_SELECTION_D
+#define PSEL_REG_P20	PIN_SELECTION_D
+#define PSEL_REG_P21	PIN_SELECTION_D
+#define PSEL_REG_P22	PIN_SELECTION_D
+#define PSEL_REG_P23	PIN_SELECTION_D
+#define PSEL_REG_P24	PIN_SELECTION_E
+#define PSEL_REG_P25	PIN_SELECTION_E
+#define PSEL_REG_P26	PIN_SELECTION_E
+#define PSEL_REG_P27	PIN_SELECTION_E
+#define PSEL_REG_P28	PIN_SELECTION_E
+#define PSEL_REG_P29	PIN_SELECTION_E
+#define PSEL_REG_P30	PIN_SELECTION_F
+#define PSEL_REG_P31	PIN_SELECTION_F
+#define PSEL_REG_P32	PIN_SELECTION_F
+#define PSEL_REG_P33	PIN_SELECTION_F
+
+#define PIN2REG(pin)	_PIN2REG(pin)
+#define _PIN2REG(pin)	PSEL_REG_P ## pin
+
+/*
+ * Compute pin selection register core macro
+ */
+#define PIN_SEL(pin, sfx)	_PIN_SEL(PIN2REG(pin), pin, sfx)
+#define _PIN_SEL(sel, pin, sfx)	__PIN_SEL(sel, pin, sfx)
+#define __PIN_SEL(sel, pin, sfx) \
+    WRPR_ ## sel ## __P ## pin ## _SEL__ ## sfx
+
+/*
+ * Compute signal macro (see at_pinmux.h)
+ */
+#define PIN_SIG(pin, sig)	P ## pin ## _ ## sig
+
+/*
+ * Assign signal to pin
+ */
+#define PIN_SELECT(pin, sig) \
+    PIN_SEL(pin, MODIFY)(CMSDK_WRPR->PIN2REG(pin), PIN_SIG(pin, sig))
+
+/*
+ * Pin to pullup register mapping
+ */
+#define PUSEL_REG_P0	PIN_PU_A
+#define PUSEL_REG_P1	PIN_PU_A
+#define PUSEL_REG_P2	PIN_PU_A
+#define PUSEL_REG_P3	PIN_PU_A
+#define PUSEL_REG_P4	PIN_PU_A
+#define PUSEL_REG_P5	PIN_PU_A
+#define PUSEL_REG_P6	PIN_PU_A
+#define PUSEL_REG_P7	PIN_PU_A
+#define PUSEL_REG_P8	PIN_PU_B
+#define PUSEL_REG_P9	PIN_PU_B
+#define PUSEL_REG_P10	PIN_PU_B
+#define PUSEL_REG_P11	PIN_PU_B
+#define PUSEL_REG_P12	PIN_PU_B
+#define PUSEL_REG_P13	PIN_PU_B
+#define PUSEL_REG_P14	PIN_PU_B
+#define PUSEL_REG_P15	PIN_PU_B
+#define PUSEL_REG_P16	PIN_PU_C
+#define PUSEL_REG_P17	PIN_PU_C
+#define PUSEL_REG_P18	PIN_PU_C
+#define PUSEL_REG_P19	PIN_PU_C
+#define PUSEL_REG_P20	PIN_PU_C
+#define PUSEL_REG_P21	PIN_PU_C
+#define PUSEL_REG_P22	PIN_PU_C
+#define PUSEL_REG_P23	PIN_PU_C
+#define PUSEL_REG_P24	PIN_PU_D
+#define PUSEL_REG_P25	PIN_PU_D
+#define PUSEL_REG_P26	PIN_PU_D
+#define PUSEL_REG_P27	PIN_PU_D
+#define PUSEL_REG_P28	PIN_PU_D
+#define PUSEL_REG_P29	PIN_PU_D
+#define PUSEL_REG_P30	PIN_PU_D
+#define PUSEL_REG_P31	PIN_PU_D
+
+/*
+ * Compute pin pullup register
+ */
+#define PIN2PUREG(pin) _PIN2PUREG(pin)
+#define _PIN2PUREG(pin) PUSEL_REG_P ## pin
+
+/*
+ * Compute pin pullup macro
+ */
+#define PIN2PUMACRO(pin, sfx) _PIN2PUMACRO(pin, _PIN2PUREG(pin), sfx)
+#define _PIN2PUMACRO(pin, reg, sfx) __PIN2PUMACRO(pin, reg, sfx)
+#define __PIN2PUMACRO(pin, reg, sfx) \
+    WRPR_ ## reg ## __P ## pin ## _PU__ ## sfx
+
+/*
+ * Set pin pullup
+ */
+#define PIN_PULLUP(pin) \
+    PIN2PUMACRO(pin, SET)(CMSDK_WRPR->PIN2PUREG(pin))
+
+/*
+ * Clear pin pullup
+ */
+#define PIN_PULL_CLR(pin) \
+    PIN2PUMACRO(pin, CLR)(CMSDK_WRPR->PIN2PUREG(pin))
diff --git a/platform/atm2/ATM22xx-x1x/include/reg/base_addr.h b/platform/atm2/ATM22xx-x1x/include/reg/base_addr.h
new file mode 100644
index 0000000..c0c766b
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/reg/base_addr.h
@@ -0,0 +1,791 @@
+#ifndef BASE_ADDR_H
+#define BASE_ADDR_H
+
+/**
+ *****************************************************************************
+ * @defgroup at_base_addr base_addr
+ * @ingroup AT_REG
+ * @brief base address definitions.
+ * @{
+ *****************************************************************************
+ */
+/*---------- AT_APB_WRPR ----------*/
+typedef struct {
+  __IO uint32_t  APB0_CTRL;
+  __IO uint32_t  APB1_CTRL;
+  __IO uint32_t  APB2_CTRL;
+  __IO uint32_t  APB3_CTRL;
+  __IO uint32_t  APB4_CTRL;
+  __IO uint32_t  APB5_CTRL;
+  __IO uint32_t  APB6_CTRL;
+  __IO uint32_t  APB7_CTRL;
+  __IO uint32_t  APB8_CTRL;
+  __IO uint32_t  APB9_CTRL;
+  __IO uint32_t  APB10_CTRL;
+  __IO uint32_t  APB11_CTRL;
+  __IO uint32_t  APB12_CTRL;
+  __IO uint32_t  APB13_CTRL;
+  __IO uint32_t  APB14_CTRL;
+  __IO uint32_t  APB15_CTRL;
+  __IO uint32_t  CLK_HPC_PIN_OUT_CTRL;
+  __IO uint32_t  CLK_HMC_PIN_OUT_CTRL;
+  __IO uint32_t  CLK_LMC_PIN_OUT_CTRL;
+  __IO uint32_t  DBG_CTRL;
+  __IO uint32_t  PIN_SELECTION_A;
+  __IO uint32_t  PIN_SELECTION_B;
+  __IO uint32_t  PIN_SELECTION_C;
+  __IO uint32_t  PIN_SELECTION_D;
+  __IO uint32_t  PIN_SELECTION_E;
+  __IO uint32_t  PIN_SELECTION_F;
+  __IO uint32_t  PIN_PU_A;
+  __IO uint32_t  PIN_PU_B;
+  __IO uint32_t  PIN_PU_C;
+  __IO uint32_t  PIN_PU_D;
+  __IO uint32_t  PIN_PU_E;
+  __IO uint32_t  INTRPT_CFG_0;
+  __IO uint32_t  INTRPT_CFG_1;
+  __IO uint32_t  INTRPT_CFG_2;
+  __IO uint32_t  INTRPT_CFG_3;
+  __IO uint32_t  INTRPT_CFG_4;
+  __IO uint32_t  INTRPT_CFG_5;
+  __IO uint32_t  INTRPT_CFG_6;
+  __IO uint32_t  INTRPT_CFG_7;
+  __IO uint32_t  INTRPT_CFG_8;
+  __IO uint32_t  INTRPT_CFG_9;
+  __IO uint32_t  INTRPT_CFG_10;
+  __IO uint32_t  INTRPT_CFG_11;
+  __IO uint32_t  INTRPT_CFG_12;
+  __IO uint32_t  INTRPT_CFG_13;
+  __IO uint32_t  INTRPT_CFG_14;
+  __IO uint32_t  INTRPT_CFG_15;
+  __IO uint32_t  REMAP;
+  __IO uint32_t  AHB_INTERPOSERS;
+  __IO uint32_t  SCRATCHPAD_A;
+  __IO uint32_t  SCRATCHPAD_B;
+  __IO uint32_t  SCRATCHPAD_C;
+  __IO uint32_t  SCRATCHPAD_D;
+       uint32_t  RESERVED0[967];
+  __I  uint32_t  CHIPID1;
+  __I  uint32_t  CHIPID2;
+  __I  uint32_t  CHIPREV;
+  __I  uint32_t  CORE_ID;
+} CMSDK_AT_APB_WRPR_TypeDef;
+
+/*---------- AT_APB_PWM ----------*/
+typedef struct {
+  __IO uint32_t  PWM0_CTRL;
+  __IO uint32_t  PWM1_CTRL;
+  __IO uint32_t  PWM2_CTRL;
+  __IO uint32_t  PWM3_CTRL;
+  __IO uint32_t  PWM4_CTRL;
+  __IO uint32_t  PWM5_CTRL;
+  __IO uint32_t  PWM6_CTRL;
+  __IO uint32_t  PWM7_CTRL;
+       uint32_t  RESERVED0[1015];
+  __I  uint32_t  CORE_ID;
+} CMSDK_AT_APB_PWM_TypeDef;
+
+/*---------- AT_APB_SPI ----------*/
+typedef struct {
+  __IO uint32_t  TRANSACTION_SETUP;
+  __I  uint32_t  TRANSACTION_STATUS;
+  __IO uint32_t  DATA_BYTES_LOWER;
+  __IO uint32_t  DATA_BYTES_UPPER;
+  __IO uint32_t  INTERRUPT_MASK;
+  __I  uint32_t  INTERRUPT_STATUS;
+  __IO uint32_t  SET_INTERRUPT;
+  __IO uint32_t  RESET_INTERRUPT;
+       uint32_t  RESERVED0[1015];
+  __I  uint32_t  CORE_ID;
+} CMSDK_AT_APB_SPI_TypeDef;
+
+/*---------- AT_APB_OLED ----------*/
+typedef struct {
+  __IO uint32_t  CONTROL;
+  __IO uint32_t  CHARS_0A;
+  __IO uint32_t  CHARS_0B;
+  __IO uint32_t  CHARS_0C;
+  __IO uint32_t  CHARS_0D;
+  __IO uint32_t  CHARS_1A;
+  __IO uint32_t  CHARS_1B;
+  __IO uint32_t  CHARS_1C;
+  __IO uint32_t  CHARS_1D;
+  __IO uint32_t  CHARS_2A;
+  __IO uint32_t  CHARS_2B;
+  __IO uint32_t  CHARS_2C;
+  __IO uint32_t  CHARS_2D;
+  __IO uint32_t  CHARS_3A;
+  __IO uint32_t  CHARS_3B;
+  __IO uint32_t  CHARS_3C;
+  __IO uint32_t  CHARS_3D;
+  __I  uint32_t  STATUS;
+       uint32_t  RESERVED0[1005];
+  __I  uint32_t  CORE_ID;
+} CMSDK_AT_APB_OLED_TypeDef;
+
+/*---------- AT_APB_KSM ----------*/
+typedef struct {
+  __IO uint32_t  CTRL0;
+  __IO uint32_t  TIME_PARAM0;
+  __IO uint32_t  TIME_PARAM1;
+  __IO uint32_t  MATRIX_SIZE;
+       uint32_t  RESERVED0[12];
+  __I  uint32_t  KEYBOARD_PACKET;
+  __I  uint32_t  LOW_POWER;
+       uint32_t  RESERVED1[4];
+  __IO uint32_t  LPBACK_KSI;
+       uint32_t  RESERVED2[9];
+  __I  uint32_t  STATUS;
+       uint32_t  RESERVED3[15];
+  __I  uint32_t  INTERRUPTS;
+  __IO uint32_t  INTERRUPT_MASK;
+  __IO uint32_t  INTERRUPT_CLEAR;
+       uint32_t  RESERVED4[970];
+  __I  uint32_t  DEBUG;
+  __I  uint32_t  DEBUG2;
+  __I  uint32_t  CORE_ID;
+} CMSDK_AT_APB_KSM_TypeDef;
+
+/*---------- AT_APB_QDEC ----------*/
+typedef struct {
+  __IO uint32_t  SETUP_FOR_AXIS_0;
+  __I  uint32_t  ACCUM_PURGE_STATUS_FOR_AXIS_0;
+  __I  uint32_t  ACCUMULATOR_VALUE_FOR_AXIS_0;
+  __I  uint32_t  ERR_PURGE_STATUS_FOR_AXIS_0;
+  __I  uint32_t  ERROR_COUNT_FOR_AXIS_0;
+  __IO uint32_t  SETUP_FOR_AXIS_1;
+  __I  uint32_t  ACCUM_PURGE_STATUS_FOR_AXIS_1;
+  __I  uint32_t  ACCUMULATOR_VALUE_FOR_AXIS_1;
+  __I  uint32_t  ERR_PURGE_STATUS_FOR_AXIS_1;
+  __I  uint32_t  ERROR_COUNT_FOR_AXIS_1;
+  __IO uint32_t  SETUP_FOR_AXIS_2;
+  __I  uint32_t  ACCUM_PURGE_STATUS_FOR_AXIS_2;
+  __I  uint32_t  ACCUMULATOR_VALUE_FOR_AXIS_2;
+  __I  uint32_t  ERR_PURGE_STATUS_FOR_AXIS_2;
+  __I  uint32_t  ERROR_COUNT_FOR_AXIS_2;
+       uint32_t  RESERVED0[1008];
+  __I  uint32_t  CORE_ID;
+} CMSDK_AT_APB_QDEC_TypeDef;
+
+/*---------- AT_APB_SLWTIMER ----------*/
+typedef struct {
+  __IO uint32_t  CONTROL;
+  __IO uint32_t  INIT_LOW;
+  __IO uint32_t  INIT_HIGH;
+  __I  uint32_t  CNT_LOW;
+  __I  uint32_t  CNT_HIGH;
+  __IO uint32_t  THRES0_LOW;
+  __IO uint32_t  THRES0_HIGH;
+  __IO uint32_t  THRES1_LOW;
+  __IO uint32_t  THRES1_HIGH;
+  __IO uint32_t  THRES2_LOW;
+  __IO uint32_t  THRES2_HIGH;
+  __I  uint32_t  STATUS;
+  __I  uint32_t  INTERRUPT_STATUS;
+  __IO uint32_t  INTERRUPT_MASK;
+       uint32_t  RESERVED0[1009];
+  __I  uint32_t  CORE_ID;
+} CMSDK_AT_APB_SLWTIMER_TypeDef;
+
+/*---------- AT_APB_QSPI ----------*/
+typedef struct {
+  __IO uint32_t  TRANSACTION_SETUP;
+  __I  uint32_t  READ_DATA;
+  __IO uint32_t  OVERRIDE_DIN;
+  __IO uint32_t  MODE;
+  __IO uint32_t  REMOTE_AHB_SETUP;
+  __IO uint32_t  REMOTE_AHB_SETUP_2;
+  __IO uint32_t  REMOTE_AHB_SETUP_3;
+  __IO uint32_t  REMOTE_AHB_SETUP_4;
+  __IO uint32_t  REMOTE_AHB_SETUP_5;
+  __IO uint32_t  REMOTE_AHB_SETUP_6;
+  __I  uint32_t  REMOTE_AHB_WLE_CNT;
+  __I  uint32_t  REMOTE_AHB_WIP_CNT;
+  __I  uint32_t  REMOTE_AHB_DBG0;
+  __I  uint32_t  REMOTE_AHB_DBG1;
+  __I  uint32_t  REMOTE_AHB_DBG2;
+       uint32_t  RESERVED0[1008];
+  __I  uint32_t  CORE_ID;
+} CMSDK_AT_APB_QSPI_TypeDef;
+
+/*---------- AT_APB_I2C ----------*/
+typedef struct {
+  __IO uint32_t  TRANSACTION_SETUP;
+  __IO uint32_t  CLOCK_CONTROL;
+  __IO uint32_t  OUTGOING_DATA;
+  __IO uint32_t  IO_CTRL;
+  __I  uint32_t  INCOMING_DATA;
+  __I  uint32_t  TRANSACTION_STATUS;
+  __IO uint32_t  INTERRUPT_MASK;
+  __I  uint32_t  INTERRUPT_STATUS;
+  __IO uint32_t  SET_INTERRUPT;
+  __IO uint32_t  RESET_INTERRUPT;
+       uint32_t  RESERVED0[1013];
+  __I  uint32_t  ID;
+} CMSDK_AT_APB_I2C_TypeDef;
+
+/*---------- AT_APB_NVM ----------*/
+typedef struct {
+  __IO uint32_t  OPMODE;
+  __IO uint32_t  ADDRESS;
+  __I  uint32_t  STATUS;
+  __I  uint32_t  READ_DATA;
+  __IO uint32_t  T_SP_PG_AVDD;
+  __IO uint32_t  T_SP_PGM;
+  __IO uint32_t  T_PGM;
+  __IO uint32_t  T_HP_PGM;
+  __IO uint32_t  T_HP_PG_AVDD;
+  __IO uint32_t  T_SR_RD;
+  __IO uint32_t  T_RD;
+  __IO uint32_t  T_HR_RD;
+  __IO uint32_t  T_SETUP;
+  __IO uint32_t  T_HOLD;
+  __IO uint32_t  T_ADDR;
+  __IO uint32_t  INTERRUPT_MASK;
+  __I  uint32_t  INTERRUPT_STATUS;
+  __IO uint32_t  SET_INTERRUPT;
+  __IO uint32_t  RESET_INTERRUPT;
+  __I  uint32_t  EFUSE_AUTOREAD;
+       uint32_t  RESERVED0[1003];
+  __I  uint32_t  ID;
+} CMSDK_AT_APB_NVM_TypeDef;
+
+/*---------- AT_APB1_WRPR ----------*/
+typedef struct {
+  __IO uint32_t  APB0_CTRL;
+  __IO uint32_t  APB1_CTRL;
+  __IO uint32_t  APB2_CTRL;
+  __IO uint32_t  APB3_CTRL;
+  __IO uint32_t  APB4_CTRL;
+  __IO uint32_t  APB5_CTRL;
+  __IO uint32_t  APB6_CTRL;
+  __IO uint32_t  APB7_CTRL;
+  __IO uint32_t  APB8_CTRL;
+  __IO uint32_t  APB9_CTRL;
+  __IO uint32_t  APB10_CTRL;
+  __IO uint32_t  APB11_CTRL;
+  __IO uint32_t  APB12_CTRL;
+  __IO uint32_t  APB13_CTRL;
+  __IO uint32_t  APB14_CTRL;
+  __IO uint32_t  APB15_CTRL;
+       uint32_t  RESERVED0[1007];
+  __I  uint32_t  CORE_ID;
+} CMSDK_AT_APB1_WRPR_TypeDef;
+
+/*---------- RIF ----------*/
+typedef struct {
+  __IO uint32_t  BIAS;
+  __IO uint32_t  RXBBF_1M;
+  __IO uint32_t  RXBBF_2M;
+  __IO uint32_t  RXDC8;
+  __IO uint32_t  SYNTX0;
+  __IO uint32_t  TXGAIN0;
+  __IO uint32_t  TXGAIN1;
+  __IO uint32_t  RXGAIN0;
+  __IO uint32_t  RXGAIN1;
+  __IO uint32_t  RXGAIN2;
+  __IO uint32_t  RXGAIN3;
+  __IO uint32_t  RXGAIN4;
+  __IO uint32_t  RXGAIN5;
+  __IO uint32_t  RXGAIN6;
+  __IO uint32_t  RXGAIN7;
+  __IO uint32_t  RXGAIN8;
+  __IO uint32_t  RXGAIN9;
+  __IO uint32_t  RXGAIN10;
+  __IO uint32_t  RXGAIN11;
+  __IO uint32_t  RXGAIN12;
+  __IO uint32_t  RXGAIN13;
+  __IO uint32_t  SYNTX1;
+  __IO uint32_t  SYNTX2;
+  __IO uint32_t  SYNTX3;
+  __IO uint32_t  SYNTX4;
+  __IO uint32_t  RX0;
+  __IO uint32_t  TIMER0;
+  __IO uint32_t  TIMER1;
+  __IO uint32_t  TIMER2;
+  __IO uint32_t  TIMER3;
+  __IO uint32_t  RXDC0;
+  __IO uint32_t  RXDC1;
+  __IO uint32_t  RXDC2;
+  __IO uint32_t  RXDC3;
+  __IO uint32_t  RXDC4;
+  __IO uint32_t  RXDC5;
+  __IO uint32_t  RXDC7;
+  __IO uint32_t  SYNTH_CHAN0;
+  __IO uint32_t  SYNTH_CHAN1;
+  __IO uint32_t  SYNTH_CHAN2;
+  __IO uint32_t  SYNTH_CHAN3;
+  __IO uint32_t  SYNTH_CHAN4;
+  __IO uint32_t  ADC_CNTL;
+  __IO uint32_t  MODE_CNTL;
+  __IO uint32_t  CAL_CNTL;
+       uint32_t  RESERVED0[978];
+  __I  uint32_t  ID;
+} CMSDK_RIF_TypeDef;
+
+/*---------- MDM ----------*/
+typedef struct {
+  __IO uint32_t  AGCMEAS;
+  __IO uint32_t  AGCGAIN;
+  __IO uint32_t  DCOFF;
+  __IO uint32_t  IQCORR;
+  __IO uint32_t  AGCSAT;
+  __IO uint32_t  AGCINITSAT;
+  __IO uint32_t  AGCPWRSTEPSAT;
+  __IO uint32_t  AGCPWR;
+  __IO uint32_t  AGCPWR2;
+  __IO uint32_t  AGCTIME;
+  __IO uint32_t  TWOMEG_AGCTIME;
+  __IO uint32_t  AGCTIME2;
+  __IO uint32_t  AGCCNTL;
+  __IO uint32_t  SYNCH;
+  __IO uint32_t  TIMETRACK;
+  __IO uint32_t  TIMESYNC;
+  __IO uint32_t  SYNCDEMOD;
+  __IO uint32_t  TSTIMEOUT;
+  __IO uint32_t  DEMOD;
+  __IO uint32_t  DFEWITHFFE;
+  __IO uint32_t  DFEWITHOUTFFE;
+  __IO uint32_t  TWOMEG_DFEWITHFFE;
+  __IO uint32_t  TWOMEG_DFEWITHOUTFFE;
+  __IO uint32_t  FREQ;
+  __IO uint32_t  FREQLIM;
+  __IO uint32_t  LR;
+  __IO uint32_t  MIXER;
+  __IO uint32_t  ACCESS_ADDRESS;
+  __IO uint32_t  FIR;
+  __IO uint32_t  FFE1;
+  __IO uint32_t  FFE2;
+  __IO uint32_t  FFE3;
+  __IO uint32_t  FFE4;
+  __IO uint32_t  FFE5;
+  __IO uint32_t  FFE6;
+  __IO uint32_t  FFE7;
+  __IO uint32_t  TWOMEG_FFE1;
+  __IO uint32_t  TWOMEG_FFE2;
+  __IO uint32_t  TWOMEG_FFE3;
+  __IO uint32_t  TWOMEG_FFE4;
+  __IO uint32_t  TWOMEG_FFE5;
+  __IO uint32_t  TWOMEG_FFE6;
+  __IO uint32_t  TWOMEG_FFE7;
+  __IO uint32_t  PMODE;
+  __IO uint32_t  DCCAL;
+  __IO uint32_t  DCCAL2;
+  __IO uint32_t  DCOFFTRK;
+  __IO uint32_t  DCOFFTRK2;
+  __I  uint32_t  DCCALRESULTS;
+  __I  uint32_t  DCCALRESULTS2;
+  __I  uint32_t  AGCSTATUS;
+  __I  uint32_t  MEASFREQ;
+  __IO uint32_t  DEBUG;
+  __IO uint32_t  LC2LC;
+  __IO uint32_t  ERR_INJ;
+       uint32_t  RESERVED0[968];
+  __I  uint32_t  CORE_ID;
+} CMSDK_MDM_TypeDef;
+
+/*---------- AT_APB_PSEQ ----------*/
+typedef struct {
+  __IO uint32_t  CTRL0;
+  __IO uint32_t  RETAIN_ALL_WAKE_MASK;
+  __IO uint32_t  HIB_WAKE_MASK;
+  __IO uint32_t  BLE_RET_TO_BLE_ACT_WAKE_MASK;
+  __IO uint32_t  BLE_RET_TO_CPU_ACT_WAKE_MASK;
+  __IO uint32_t  GPIO_WAKE_MASK;
+  __IO uint32_t  GPIO_WAKE_TYPE;
+  __IO uint32_t  GPIO_WAKE_POL;
+  __IO uint32_t  GPIO_WAKE_BOTH_EDGES;
+  __IO uint32_t  WURX_CONFIG;
+  __IO uint32_t  GADC_CONFIG;
+  __IO uint32_t  COUNT0;
+  __IO uint32_t  COUNT1;
+  __IO uint32_t  COUNT2;
+  __IO uint32_t  COUNT3;
+  __IO uint32_t  COUNT4;
+  __IO uint32_t  COUNT5;
+  __IO uint32_t  COUNT6;
+  __IO uint32_t  COUNT7;
+  __IO uint32_t  COUNT8;
+  __IO uint32_t  COUNT9;
+  __IO uint32_t  COUNT0_RADIO;
+  __IO uint32_t  COUNT1_RADIO;
+  __IO uint32_t  COUNT2_RADIO;
+  __IO uint32_t  COUNT3_RADIO;
+  __IO uint32_t  COUNT4_RADIO;
+  __IO uint32_t  COUNT5_RADIO;
+  __IO uint32_t  COUNT6_RADIO;
+  __IO uint32_t  COUNT7_RADIO;
+  __IO uint32_t  COUNT8_RADIO;
+  __IO uint32_t  COUNT9_RADIO;
+  __IO uint32_t  XTAL_BITS0;
+  __IO uint32_t  XTAL_BITS1;
+  __IO uint32_t  OVERRIDES;
+  __IO uint32_t  OVERRIDES2;
+  __IO uint32_t  OVERRIDES3;
+  __IO uint32_t  OVERRIDES4;
+  __IO uint32_t  OVERRIDES5;
+  __IO uint32_t  SYSRAM_OVERRIDES;
+  __IO uint32_t  SYSRAM_OVERRIDES2;
+  __IO uint32_t  SYSRAM_OVERRIDES3;
+  __IO uint32_t  SYSRAM_OVERRIDES4;
+  __IO uint32_t  SYSRAM_OVERRIDES5;
+  __IO uint32_t  SYSRAM_OVERRIDES6;
+  __IO uint32_t  SYSRAM_OVERRIDES7;
+  __IO uint32_t  SYSRAM_OVERRIDES8;
+  __IO uint32_t  SYSRAM_CONF;
+  __IO uint32_t  EMRAM_OVERRIDES;
+  __IO uint32_t  EMRAM_OVERRIDES2;
+  __IO uint32_t  EMRAM_OVERRIDES3;
+  __IO uint32_t  EMRAM_OVERRIDES4;
+  __IO uint32_t  EMRAM_OVERRIDES5;
+  __IO uint32_t  EMRAM_OVERRIDES6;
+  __IO uint32_t  EMRAM_OVERRIDES7;
+  __IO uint32_t  EMRAM_OVERRIDES8;
+  __IO uint32_t  COUNTER_CONTROL;
+  __I  uint32_t  CURRENT_REAL_TIME;
+  __I  uint32_t  CURRENT_COUNT_DOWN_TIME;
+  __IO uint32_t  INIT_COUNT_DOWN;
+  __I  uint32_t  INST_PENDING;
+  __I  uint32_t  STATUS;
+  __IO uint32_t  PERSISTENT0;
+  __IO uint32_t  SENSOR_HUB_CONTROL;
+  __IO uint32_t  KSMQDEC_CONTROL;
+  __I  uint32_t  PMU_STATUS;
+  __IO uint32_t  FLASH_CONTROL;
+  __IO uint32_t  PMU_INTERRUPT;
+  __I  uint32_t  INTERRUPT_STATUS;
+  __IO uint32_t  INTERRUPT_MASK;
+  __IO uint32_t  RESET_INTERRUPT;
+       uint32_t  RESERVED0[953];
+  __I  uint32_t  CORE_ID;
+} CMSDK_AT_APB_PSEQ_TypeDef;
+
+/*---------- AT_APB_SWD ----------*/
+typedef struct {
+  __IO uint32_t  DAP_ADDR_CTRL;
+  __IO uint32_t  DAP_WDATA_CTRL;
+  __IO uint32_t  SWD_CLK_DIV_CTRL;
+  __I  uint32_t  DAP_BRIDGE_STATUS;
+  __I  uint32_t  DAP_RESP_STATUS;
+  __IO uint32_t  RW_CTRL;
+  __IO uint32_t  APNDP_CTRL;
+  __IO uint32_t  TRIGGER_CTRL;
+  __I  uint32_t  DAP_RDATA;
+  __IO uint32_t  DTOP_BYPASS_CTRL;
+  __I  uint32_t  DTOP_BYPASS_STAT;
+  __IO uint32_t  DTOP_BYPASS_GPO;
+       uint32_t  RESERVED0[1011];
+  __I  uint32_t  CORE_ID;
+} CMSDK_AT_APB_SWD_TypeDef;
+
+/*---------- AT_APB_GADC ----------*/
+typedef struct {
+  __IO uint32_t  CTRL;
+  __IO uint32_t  DATAPATH_PARAMETERS;
+  __I  uint32_t  DATAPATH_OUTPUT;
+  __IO uint32_t  FINAL_INVERSION;
+  __I  uint32_t  INTERRUPTS;
+  __IO uint32_t  INTERRUPT_MASK;
+  __IO uint32_t  INTERRUPT_CLEAR;
+  __I  uint32_t  FIFO_DBG;
+       uint32_t  RESERVED0[1015];
+  __I  uint32_t  CORE_ID;
+} CMSDK_AT_APB_GADC_TypeDef;
+
+/*---------- AT_APB_TRNG ----------*/
+typedef struct {
+  __IO uint32_t  CONTROL;
+  __I  uint32_t  STATUS;
+  __I  uint32_t  INTERRUPT_STATUS;
+  __IO uint32_t  INTERRUPT_MASK;
+  __IO uint32_t  SET_INTERRUPT;
+  __IO uint32_t  RESET_INTERRUPT;
+  __I  uint32_t  TRNG;
+       uint32_t  RESERVED0[1016];
+  __I  uint32_t  CORE_ID;
+} CMSDK_AT_APB_TRNG_TypeDef;
+
+/*---------- AT_APB_RCOS_CAL ----------*/
+typedef struct {
+  __IO uint32_t  CAL_CTRL;
+  __IO uint32_t  SLOW_CLK_SET;
+  __I  uint32_t  SLOW_CLK_CNT;
+  __I  uint32_t  FAST_CLK_CNT;
+  __I  uint32_t  STAT;
+       uint32_t  RESERVED0[1018];
+  __I  uint32_t  CORE_ID;
+} CMSDK_AT_APB_RCOS_CAL_TypeDef;
+
+/*---------- AT_APB_SHUB ----------*/
+typedef struct {
+  __IO uint32_t  SETUP0;
+  __IO uint32_t  SETUP1;
+  __IO uint32_t  PORT0_SETUP;
+  __IO uint32_t  PORT0_SENSOR0_SETUP;
+  __IO uint32_t  PORT0_SENSOR1_SETUP;
+  __IO uint32_t  PORT0_SENSOR2_SETUP;
+  __IO uint32_t  PORT0_SENSOR3_SETUP;
+  __IO uint32_t  PORT0_SENSOR4_SETUP;
+  __IO uint32_t  PORT0_SENSOR5_SETUP;
+  __IO uint32_t  PORT0_SENSOR6_SETUP;
+  __IO uint32_t  PORT0_SENSOR7_SETUP;
+  __IO uint32_t  PORT0_SPI_ENG0_CTRL;
+  __IO uint32_t  PORT0_I2C_IDW_0;
+  __IO uint32_t  PORT0_I2C_IDW_1;
+  __IO uint32_t  PORT0_I2C_IDW_2;
+  __IO uint32_t  PORT0_I2C_IDW_3;
+  __IO uint32_t  PORT0_I2C_IDW_4;
+  __IO uint32_t  PORT0_I2C_IDW_5;
+  __IO uint32_t  PORT0_I2C_IDW_6;
+  __IO uint32_t  PORT0_I2C_IDW_7;
+  __IO uint32_t  PORT0_I2C_ADDR_0;
+  __IO uint32_t  PORT0_I2C_ADDR_1;
+  __IO uint32_t  PORT0_I2C_ADDR_2;
+  __IO uint32_t  PORT0_I2C_ADDR_3;
+  __IO uint32_t  PORT0_I2C_ADDR_4;
+  __IO uint32_t  PORT0_I2C_ADDR_5;
+  __IO uint32_t  PORT0_I2C_ADDR_6;
+  __IO uint32_t  PORT0_I2C_ADDR_7;
+  __IO uint32_t  PORT0_I2C_IDR_0;
+  __IO uint32_t  PORT0_I2C_IDR_1;
+  __IO uint32_t  PORT0_I2C_IDR_2;
+  __IO uint32_t  PORT0_I2C_IDR_3;
+  __IO uint32_t  PORT0_I2C_IDR_4;
+  __IO uint32_t  PORT0_I2C_IDR_5;
+  __IO uint32_t  PORT0_I2C_IDR_6;
+  __IO uint32_t  PORT0_I2C_IDR_7;
+  __IO uint32_t  PORT0_I2C_DAT_CTRL;
+  __IO uint32_t  PORT0_I2C_DAT_LAST_CTRL;
+  __IO uint32_t  PORT0_ALM0_QUAN_CTRL;
+  __IO uint32_t  PORT0_ALM1_QUAN_CTRL;
+  __IO uint32_t  PORT0_ALM0_TRIG_CTRL;
+  __IO uint32_t  PORT0_ALM1_TRIG_CTRL;
+  __IO uint32_t  PORT0_ALM0_THRHLD_MAX_0;
+  __IO uint32_t  PORT0_ALM0_THRHLD_MAX_1;
+  __IO uint32_t  PORT0_ALM0_THRHLD_MAX_2;
+  __IO uint32_t  PORT0_ALM0_THRHLD_MIN_0;
+  __IO uint32_t  PORT0_ALM0_THRHLD_MIN_1;
+  __IO uint32_t  PORT0_ALM0_THRHLD_MIN_2;
+  __IO uint32_t  PORT0_ALM1_THRHLD_MAX_0;
+  __IO uint32_t  PORT0_ALM1_THRHLD_MAX_1;
+  __IO uint32_t  PORT0_ALM1_THRHLD_MAX_2;
+  __IO uint32_t  PORT0_ALM1_THRHLD_MIN_0;
+  __IO uint32_t  PORT0_ALM1_THRHLD_MIN_1;
+  __IO uint32_t  PORT0_ALM1_THRHLD_MIN_2;
+  __I  uint32_t  PORT0_STATUS;
+  __IO uint32_t  PORT1_SETUP;
+  __IO uint32_t  PORT1_SENSOR0_SETUP;
+  __IO uint32_t  PORT1_SPI_ENG0_CTRL;
+  __IO uint32_t  PORT1_I2C_IDW_0;
+  __IO uint32_t  PORT1_I2C_ADDR_0;
+  __IO uint32_t  PORT1_I2C_IDR_0;
+  __IO uint32_t  PORT1_I2C_DAT_CTRL;
+  __IO uint32_t  PORT1_I2C_DAT_LAST_CTRL;
+  __IO uint32_t  PORT1_ALM0_QUAN_CTRL;
+  __IO uint32_t  PORT1_ALM0_TRIG_CTRL;
+  __IO uint32_t  PORT1_ALM0_THRHLD_MAX_0;
+  __IO uint32_t  PORT1_ALM0_THRHLD_MAX_1;
+  __IO uint32_t  PORT1_ALM0_THRHLD_MAX_2;
+  __IO uint32_t  PORT1_ALM0_THRHLD_MIN_0;
+  __IO uint32_t  PORT1_ALM0_THRHLD_MIN_1;
+  __IO uint32_t  PORT1_ALM0_THRHLD_MIN_2;
+  __I  uint32_t  PORT1_STATUS;
+  __IO uint32_t  FLASH_CTRL0;
+  __IO uint32_t  FLASH_CTRL1;
+  __IO uint32_t  FLASH_CTRL2;
+  __IO uint32_t  FLASH_CTRL3;
+  __IO uint32_t  FLASH_CTRL4;
+  __I  uint32_t  FLASH_STATUS0;
+  __I  uint32_t  FLASH_STATUS1;
+  __I  uint32_t  SHUB_STATUS0;
+       uint32_t  RESERVED0[943];
+  __I  uint32_t  ID;
+} CMSDK_AT_APB_SHUB_TypeDef;
+
+/*---------- AT_LC ----------*/
+typedef struct {
+  __IO uint32_t  LC_CTRL0;
+  __IO uint32_t  LC_CTRL1;
+  __IO uint32_t  LC_CTRL2;
+  __IO uint32_t  LC_CTRL3;
+  __IO uint32_t  LC_CTRL4;
+  __IO uint32_t  LC_CTRL5;
+  __IO uint32_t  LC_CTRL6;
+  __IO uint32_t  LC_CTRL7;
+  __IO uint32_t  MDM_CTRL0;
+  __IO uint32_t  LC_LP_CTRL0;
+  __IO uint32_t  LC_LP_CTRL1;
+  __IO uint32_t  LC_LP_CTRL2;
+  __I  uint32_t  LC_LP_CTRL3;
+  __IO uint32_t  IFG;
+  __IO uint32_t  PWRUD_1MBPS;
+  __IO uint32_t  PWRUD_2MBPS;
+  __IO uint32_t  PWRUD_250KBPS;
+  __IO uint32_t  RTX_WAIT;
+  __I  uint32_t  LC_ST0;
+  __IO uint32_t  LC_ST0_CLR;
+  __I  uint32_t  LC_ST1;
+  __IO uint32_t  WHT_CTRL;
+  __IO uint32_t  ND_CTRL;
+  __IO uint32_t  SYNC_WRD0;
+  __IO uint32_t  SYNC_WRD1;
+  __IO uint32_t  RX_ADDR0;
+  __IO uint32_t  RX_ADDR1;
+  __IO uint32_t  RX_ADDR2;
+  __IO uint32_t  RX_ADDR3;
+  __IO uint32_t  RX_ADDR4;
+  __IO uint32_t  RX_ADDR5;
+  __IO uint32_t  RX_ADDR6;
+  __IO uint32_t  RX_ADDR7;
+  __IO uint32_t  TFF0_ADDR;
+  __IO uint32_t  RFF0_ADDR;
+  __IO uint32_t  TFF1_ADDR;
+  __IO uint32_t  RFF1_ADDR;
+  __IO uint32_t  TFF2_ADDR;
+  __IO uint32_t  RFF2_ADDR;
+  __IO uint32_t  TFF3_ADDR;
+  __IO uint32_t  RFF3_ADDR;
+  __IO uint32_t  TFF4_ADDR;
+  __IO uint32_t  RFF4_ADDR;
+  __IO uint32_t  TFF5_ADDR;
+  __IO uint32_t  RFF5_ADDR;
+  __IO uint32_t  TFF6_ADDR;
+  __IO uint32_t  RFF6_ADDR;
+  __IO uint32_t  TFF7_ADDR;
+  __IO uint32_t  RFF7_ADDR;
+  __I  uint32_t  TFF0_RPTR;
+  __IO uint32_t  TFF0_WPTR;
+  __IO uint32_t  RFF0_RPTR;
+  __I  uint32_t  RFF0_WPTR;
+  __I  uint32_t  TFF1_RPTR;
+  __IO uint32_t  TFF1_WPTR;
+  __IO uint32_t  RFF1_RPTR;
+  __I  uint32_t  RFF1_WPTR;
+  __I  uint32_t  TFF2_RPTR;
+  __IO uint32_t  TFF2_WPTR;
+  __IO uint32_t  RFF2_RPTR;
+  __I  uint32_t  RFF2_WPTR;
+  __I  uint32_t  TFF3_RPTR;
+  __IO uint32_t  TFF3_WPTR;
+  __IO uint32_t  RFF3_RPTR;
+  __I  uint32_t  RFF3_WPTR;
+  __I  uint32_t  TFF4_RPTR;
+  __IO uint32_t  TFF4_WPTR;
+  __IO uint32_t  RFF4_RPTR;
+  __I  uint32_t  RFF4_WPTR;
+  __I  uint32_t  TFF5_RPTR;
+  __IO uint32_t  TFF5_WPTR;
+  __IO uint32_t  RFF5_RPTR;
+  __I  uint32_t  RFF5_WPTR;
+  __I  uint32_t  TFF6_RPTR;
+  __IO uint32_t  TFF6_WPTR;
+  __IO uint32_t  RFF6_RPTR;
+  __I  uint32_t  RFF6_WPTR;
+  __I  uint32_t  TFF7_RPTR;
+  __IO uint32_t  TFF7_WPTR;
+  __IO uint32_t  RFF7_RPTR;
+  __I  uint32_t  RFF7_WPTR;
+  __IO uint32_t  CRC_PLYNML;
+  __IO uint32_t  CRC;
+  __IO uint32_t  CMD;
+  __I  uint32_t  ND_ST;
+  __I  uint32_t  IRQ;
+  __IO uint32_t  IRQM;
+  __IO uint32_t  IRQ_SET;
+  __IO uint32_t  IRQ_CLR;
+  __IO uint32_t  AESKEY0;
+  __IO uint32_t  AESKEY1;
+  __IO uint32_t  AESKEY2;
+  __IO uint32_t  AESKEY3;
+       uint32_t  RESERVED0[930];
+  __I  uint32_t  ID;
+} CMSDK_AT_LC_TypeDef;
+
+/*---------- AT_APB_PDM ----------*/
+typedef struct {
+  __IO uint32_t  CONTROL;
+  __IO uint32_t  IIR_CONFIG;
+  __IO uint32_t  GAIN_CONTROL_CONFIG;
+  __I  uint32_t  PCM_SAMPLE;
+  __I  uint32_t  FIFO_DEBUG;
+  __I  uint32_t  INTERRUPTS;
+  __IO uint32_t  INTERRUPT_MASK;
+  __IO uint32_t  INTERRUPT_CLEAR;
+       uint32_t  RESERVED0[1015];
+  __I  uint32_t  CORE_ID;
+} CMSDK_AT_APB_PDM_TypeDef;
+
+/*---------- AT_AHB_DMA ----------*/
+typedef struct {
+  __IO uint32_t  OPMODE;
+  __IO uint32_t  CONST_WDATA;
+  __IO uint32_t  SRC_ADDR;
+  __IO uint32_t  TAR_ADDR;
+  __IO uint32_t  SIZE;
+  __I  uint32_t  INTERRUPT_STATUS;
+  __IO uint32_t  INTERRUPT_MASK;
+  __IO uint32_t  SET_INTERRUPT;
+  __IO uint32_t  RESET_INTERRUPT;
+  __I  uint32_t  ERR_STAT;
+       uint32_t  RESERVED0[1013];
+  __I  uint32_t  ID;
+} CMSDK_AT_AHB_DMA_TypeDef;
+
+#define CMSDK_WRPR_BASE                                   0x40003000
+#define CMSDK_PWM_BASE                                    0x40006000
+#define CMSDK_SPI0_BASE                                   0x40007000
+#define CMSDK_OLED_BASE                                   0x40009000
+#define CMSDK_KSM_BASE                                    0x4000a000
+#define CMSDK_SPI2_BASE                                   0x4000b000
+#define CMSDK_QDEC_BASE                                   0x4000c000
+#define CMSDK_SPI1_BASE                                   0x4000d000
+#define CMSDK_SLWTIMER_BASE                               0x4000e000
+#define CMSDK_QSPI_BASE                                   0x4000f000
+#define CMSDK_I2C0_BASE                                   0x50000000
+#define CMSDK_I2C1_BASE                                   0x50001000
+#define CMSDK_NVM_BASE                                    0x50002000
+#define CMSDK_WRPR1_BASE                                  0x50003000
+#define CMSDK_RIF_BASE                                    0x50004000
+#define CMSDK_RADIO_BASE                                  0x50005000
+#define CMSDK_MDM_BASE                                    0x50006000
+#define CMSDK_PMU_BASE                                    0x50007000
+#define CMSDK_PSEQ_BASE                                   0x50008000
+#define CMSDK_SWD_BASE                                    0x50009000
+#define CMSDK_GADC_BASE                                   0x5000a000
+#define CMSDK_TRNG_BASE                                   0x5000b000
+#define CMSDK_RCOS_CAL_BASE                               0x5000c000
+#define CMSDK_SHUB_BASE                                   0x5000d000
+#define CMSDK_ATLC_BASE                                   0x5000e000
+#define CMSDK_PDM_BASE                                    0x5000f000
+#define CMSDK_AT_DMA_BASE                                 0x70000000
+
+#define CMSDK_WRPR                                        ((CMSDK_AT_APB_WRPR_TypeDef *) CMSDK_WRPR_BASE)
+#define CMSDK_PWM                                         ((CMSDK_AT_APB_PWM_TypeDef *) CMSDK_PWM_BASE)
+#define CMSDK_SPI0                                        ((CMSDK_AT_APB_SPI_TypeDef *) CMSDK_SPI0_BASE)
+#define CMSDK_OLED                                        ((CMSDK_AT_APB_OLED_TypeDef *) CMSDK_OLED_BASE)
+#define CMSDK_KSM                                         ((CMSDK_AT_APB_KSM_TypeDef *) CMSDK_KSM_BASE)
+#define CMSDK_SPI2                                        ((CMSDK_AT_APB_SPI_TypeDef *) CMSDK_SPI2_BASE)
+#define CMSDK_QDEC                                        ((CMSDK_AT_APB_QDEC_TypeDef *) CMSDK_QDEC_BASE)
+#define CMSDK_SPI1                                        ((CMSDK_AT_APB_SPI_TypeDef *) CMSDK_SPI1_BASE)
+#define CMSDK_SLWTIMER                                    ((CMSDK_AT_APB_SLWTIMER_TypeDef *) CMSDK_SLWTIMER_BASE)
+#define CMSDK_QSPI                                        ((CMSDK_AT_APB_QSPI_TypeDef *) CMSDK_QSPI_BASE)
+#define CMSDK_I2C0                                        ((CMSDK_AT_APB_I2C_TypeDef *) CMSDK_I2C0_BASE)
+#define CMSDK_I2C1                                        ((CMSDK_AT_APB_I2C_TypeDef *) CMSDK_I2C1_BASE)
+#define CMSDK_NVM                                         ((CMSDK_AT_APB_NVM_TypeDef *) CMSDK_NVM_BASE)
+#define CMSDK_WRPR1                                       ((CMSDK_AT_APB1_WRPR_TypeDef *) CMSDK_WRPR1_BASE)
+#define CMSDK_RIF                                         ((CMSDK_RIF_TypeDef *) CMSDK_RIF_BASE)
+#define CMSDK_RADIO                                       ((CMSDK_AT_APB_SPI_TypeDef *) CMSDK_RADIO_BASE)
+#define CMSDK_MDM                                         ((CMSDK_MDM_TypeDef *) CMSDK_MDM_BASE)
+#define CMSDK_PMU                                         ((CMSDK_AT_APB_SPI_TypeDef *) CMSDK_PMU_BASE)
+#define CMSDK_PSEQ                                        ((CMSDK_AT_APB_PSEQ_TypeDef *) CMSDK_PSEQ_BASE)
+#define CMSDK_SWD                                         ((CMSDK_AT_APB_SWD_TypeDef *) CMSDK_SWD_BASE)
+#define CMSDK_GADC                                        ((CMSDK_AT_APB_GADC_TypeDef *) CMSDK_GADC_BASE)
+#define CMSDK_TRNG                                        ((CMSDK_AT_APB_TRNG_TypeDef *) CMSDK_TRNG_BASE)
+#define CMSDK_RCOS_CAL                                    ((CMSDK_AT_APB_RCOS_CAL_TypeDef *) CMSDK_RCOS_CAL_BASE)
+#define CMSDK_SHUB                                        ((CMSDK_AT_APB_SHUB_TypeDef *) CMSDK_SHUB_BASE)
+#define CMSDK_ATLC                                        ((CMSDK_AT_LC_TypeDef *) CMSDK_ATLC_BASE)
+#define CMSDK_PDM                                         ((CMSDK_AT_APB_PDM_TypeDef *) CMSDK_PDM_BASE)
+#define CMSDK_AT_DMA                                      ((CMSDK_AT_AHB_DMA_TypeDef *) CMSDK_AT_DMA_BASE)
+/** @} end of at_base_addr */
+
+#endif
diff --git a/platform/atm2/ATM22xx-x1x/include/reg/system_CMSDK_CM0.h b/platform/atm2/ATM22xx-x1x/include/reg/system_CMSDK_CM0.h
new file mode 100644
index 0000000..9e74cf3
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/reg/system_CMSDK_CM0.h
@@ -0,0 +1,64 @@
+/**************************************************************************//**
+ * @file     system_CMSDK_CM0.h
+ * @brief    CMSIS Cortex-M0 Device Peripheral Access Layer Header File for
+ *           Device <Device>
+ * @version  V3.01
+ * @date     06. March 2012
+ *
+ * @note
+ * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
+ *
+ * @par
+ * ARM Limited (ARM) is supplying this software for use with Cortex-M
+ * processor based microcontrollers.  This file can be freely distributed
+ * within development tools that are supporting such ARM based processors.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+ * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+ * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+ * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+ *
+ ******************************************************************************/
+
+
+#ifndef SYSTEM_CMSDK_CM0_H
+#define SYSTEM_CMSDK_CM0_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+extern uint32_t SystemCoreClock;     /*!< System Clock Frequency (Core Clock)  */
+
+
+/**
+ * Initialize the system
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Setup the microcontroller system.
+ *         Initialize the System and update the SystemCoreClock variable.
+ */
+extern void SystemInit (void);
+
+/**
+ * Update SystemCoreClock variable
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Updates the SystemCoreClock with current core Clock
+ *         retrieved from cpu registers.
+ */
+extern void SystemCoreClockUpdate (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SYSTEM_CMSDK_CM0_H */
diff --git a/platform/atm2/ATM22xx-x1x/include/rep_vec.h b/platform/atm2/ATM22xx-x1x/include/rep_vec.h
new file mode 100644
index 0000000..9cac3f8
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/include/rep_vec.h
@@ -0,0 +1,731 @@
+/**
+ *******************************************************************************
+ *
+ * @file rep_vec.h
+ *
+ * @brief Replacement vectors for strategic ROM code paths
+ *
+ * Copyright (C) Atmosic 2017-2021
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/**
+ * @defgroup REP_VEC Replacement vectors
+ * @ingroup ATM2x
+ * @brief Replacement vectors for strategic ROM code paths
+ * @{
+ */
+
+#define REP_VEC
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdlib.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Generic add helper macro
+#define RV_ADD(__t, __v, __f) do { \
+    static rep_vec ## __t ## t user_ ## __v = { __f, NULL }; \
+    rep_vec ## __t ## add(&__v, &user_ ## __v); \
+} while(0)
+
+/// Generic add_last helper macro
+#define RV_ADD_LAST(__t, __v, __f) do { \
+    static rep_vec ## __t ## t user_ ## __v = { __f, NULL }; \
+    rep_vec ## __t ## add_last(&__v, &user_ ## __v); \
+} while(0)
+
+/// Return codes
+typedef enum rep_vec_err_e {
+    /// Stop traversal of list and return from invoke
+    RV_DONE = 0,
+    /// Continue to execute next handler in list
+    RV_NEXT
+} rep_vec_err_t;
+
+
+/// void fn(void)
+typedef rep_vec_err_t (*rep_vec_fn_t)(void);
+
+/// void fn(void)
+typedef struct rep_vec_s {
+    rep_vec_fn_t fn;
+    struct rep_vec_s *next;
+} rep_vec_t;
+
+/**
+ * @brief Add handler to head of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void rep_vec_add(rep_vec_t **head, rep_vec_t *new_entry);
+
+/**
+ * @brief Traverse list and invoke handlers
+ * @param rv     Pointer to head of list
+ * @param def_fn Default handler to invoke after end of list
+ */
+void rep_vec_invoke(rep_vec_t *rv, void (*def_fn)(void));
+
+/**
+ * @brief Add handler to tail of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void rep_vec_add_last(rep_vec_t **head, rep_vec_t *new_entry);
+
+/**
+ * @brief Platform schedule
+ *
+ * After all active events have been processed by the main event loop,
+ * this vector is invoked before interrupts are disabled and power saving
+ * modes are handled.
+ */
+extern rep_vec_t *rv_plf_schedule;
+#define RV_PLF_SCHEDULE_ADD(__f) RV_ADD(_, rv_plf_schedule, __f)
+#define RV_PLF_SCHEDULE_ADD_LAST(__f) RV_ADD_LAST(_, rv_plf_schedule, __f)
+
+/**
+ * @brief Platform reset
+ *
+ * When a system reset is requested by the ROM software, this vector will be
+ * invoked after interrupts are globally disabled but before asserting the
+ * hardware reset.  It is the absolute last opportunity for drivers to take
+ * action before all system state is lost.
+ */
+extern rep_vec_t *rv_plf_reset;
+#define RV_PLF_RESET_ADD(__f) RV_ADD(_, rv_plf_reset, __f)
+#define RV_PLF_RESET_ADD_LAST(__f) RV_ADD_LAST(_, rv_plf_reset, __f)
+
+/**
+ * @brief Application init
+ *
+ * At the end of BLE device initialization, this vector will be invoked to
+ * initialize the BLE application layer.  It provides the final opportunity
+ * for customization before the main event loop is entered.
+ */
+extern rep_vec_t *rv_appm_init;
+#define RV_APPM_INIT_ADD(__f) RV_ADD(_, rv_appm_init, __f)
+#define RV_APPM_INIT_ADD_LAST(__f) RV_ADD_LAST(_, rv_appm_init, __f)
+
+/**
+ * @brief Application set advertisement data
+ *
+ * This vector can be used to customize the GAPM_SET_ADV_DATA_CMD performed
+ * by the ROM's built-in beacon application.  It is particularly useful for
+ * tiny OTP user applications to place sensor data into the advertisement.
+ */
+extern rep_vec_t *rv_appm_set_adv_data;
+#define RV_APPM_SET_ADV_DATA_ADD(__f) \
+    RV_ADD(_, rv_appm_set_adv_data, __f)
+#define RV_APPM_SET_ADV_DATA_ADD_LAST(__f) \
+    RV_ADD_LAST(_, rv_appm_set_adv_data, __f)
+
+/**
+ * @brief Platform back from retain_all power save mode
+ *
+ * These vectors permit customization of the ROM's power saving logic.
+ */
+extern rep_vec_t *rv_plf_back_from_retain_all;
+#define RV_PLF_BACK_FROM_RETAIN_ALL_ADD(__f) \
+    RV_ADD(_, rv_plf_back_from_retain_all, __f)
+#define RV_PLF_BACK_FROM_RETAIN_ALL_ADD_LAST(__f) \
+    RV_ADD_LAST(_, rv_plf_back_from_retain_all, __f)
+
+
+/// const struct prf_task_cbs *fn(uint16_t)
+struct prf_task_cbs;
+
+/// const struct prf_task_cbs *fn(uint16_t)
+typedef rep_vec_err_t (*rep_vec_fn__ret_const_struct_prf_task_cbs_p__uint16_t__t)(const struct prf_task_cbs **, uint16_t);
+
+/// const struct prf_task_cbs *fn(uint16_t)
+typedef struct rep_vec__ret_const_struct_prf_task_cbs_p__uint16_t__s {
+    rep_vec_fn__ret_const_struct_prf_task_cbs_p__uint16_t__t fn;
+    struct rep_vec__ret_const_struct_prf_task_cbs_p__uint16_t__s *next;
+} rep_vec__ret_const_struct_prf_task_cbs_p__uint16_t__t;
+
+/**
+ * @brief Add handler to head of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__ret_const_struct_prf_task_cbs_p__uint16_t__add(
+    rep_vec__ret_const_struct_prf_task_cbs_p__uint16_t__t **head,
+    rep_vec__ret_const_struct_prf_task_cbs_p__uint16_t__t *new_entry);
+
+/**
+ * @brief Traverse list and invoke handlers
+ * @param rv     Pointer to head of list
+ * @param def_fn Default handler to invoke after end of list
+ * @param task_id First parameter
+ * @return Return value from handlers
+ */
+const struct prf_task_cbs *
+rep_vec__ret_const_struct_prf_task_cbs_p__uint16_t__invoke(
+    rep_vec__ret_const_struct_prf_task_cbs_p__uint16_t__t *rv,
+    const struct prf_task_cbs *(*def_fn)(uint16_t),
+    uint16_t task_id);
+
+/**
+ * @brief Add handler to tail of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__ret_const_struct_prf_task_cbs_p__uint16_t__add_last(
+    rep_vec__ret_const_struct_prf_task_cbs_p__uint16_t__t **head,
+    rep_vec__ret_const_struct_prf_task_cbs_p__uint16_t__t *new_entry);
+
+/**
+ * @brief Retrieve profile interface
+ *
+ * This vector supports the addition and replacement of BLE profiles.
+ */
+extern rep_vec__ret_const_struct_prf_task_cbs_p__uint16_t__t *rv_prf_itf_get;
+#define RV_PRF_ITF_GET_ADD(__f) \
+    RV_ADD(__ret_const_struct_prf_task_cbs_p__uint16_t__, rv_prf_itf_get, __f)
+#define RV_PRF_ITF_GET_ADD_LAST(__f) \
+    RV_ADD_LAST(__ret_const_struct_prf_task_cbs_p__uint16_t__, rv_prf_itf_get, __f)
+
+
+/// bool fn(void)
+typedef rep_vec_err_t (*rep_vec_fn__ret_bool__t)(bool *);
+
+/// bool fn(void)
+typedef struct rep_vec__ret_bool__s {
+    rep_vec_fn__ret_bool__t fn;
+    struct rep_vec__ret_bool__s *next;
+} rep_vec__ret_bool__t;
+
+/**
+ * @brief Add handler to head of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__ret_bool__add(rep_vec__ret_bool__t **head,
+    rep_vec__ret_bool__t *new_entry);
+
+/**
+ * @brief Traverse list and invoke handlers
+ * @param rv     Pointer to head of list
+ * @param def_fn Default handler to invoke after end of list
+ * @return Return value from handlers
+ */
+bool
+rep_vec__ret_bool__invoke(rep_vec__ret_bool__t *rv, bool (*def_fn)(void));
+
+/**
+ * @brief Add handler to tail of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__ret_bool__add_last(rep_vec__ret_bool__t **head,
+    rep_vec__ret_bool__t *new_entry);
+
+/**
+ * @brief Prevent BLE from entering deep sleep
+ *
+ * This vector can be used to prevent the BLE module from entering sleep.
+ * It will also prevent the rest of the system from entering any power
+ * saving mode.
+ */
+extern rep_vec__ret_bool__t *rv_prevent_ble_sleep;
+#define RV_PREVENT_BLE_SLEEP_ADD(__f) \
+    RV_ADD(__ret_bool__, rv_prevent_ble_sleep, __f)
+#define RV_PREVENT_BLE_SLEEP_ADD_LAST(__f) \
+    RV_ADD_LAST(__ret_bool__, rv_prevent_ble_sleep, __f)
+
+
+/* uint32_t fn(void) */
+typedef rep_vec_err_t (*rep_vec_fn__ret_uint32_t__t)(uint32_t *);
+
+typedef struct rep_vec__ret_uint32_t__s {
+    rep_vec_fn__ret_uint32_t__t fn;
+    struct rep_vec__ret_uint32_t__s *next;
+} rep_vec__ret_uint32_t__t;
+
+/**
+ * @brief Add handler to head of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__ret_uint32_t__add(rep_vec__ret_uint32_t__t **head,
+    rep_vec__ret_uint32_t__t *new_entry);
+
+/**
+ * @brief Traverse list and invoke handlers
+ * @param rv     Pointer to head of list
+ * @param def_fn Default handler to invoke after end of list
+ * @return Return value from handlers
+ */
+uint32_t
+rep_vec__ret_uint32_t__invoke(rep_vec__ret_uint32_t__t *rv,
+    uint32_t (*def_fn)(void));
+
+/**
+ * @brief Secure random word
+ *
+ * This vector is invoked when the ROM BLE stack requires good random data
+ * for various security purposes.  Applications can improve the security
+ * of the system by providing truly random data through this mechanism.
+ */
+extern rep_vec__ret_uint32_t__t *rv_secure_rand_word;
+#define RV_SECURE_RAND_WORD_ADD(__f) \
+    RV_ADD(__ret_uint32_t__, rv_secure_rand_word, __f)
+#define RV_SECURE_RAND_WORD_ADD_LAST(__f) \
+    RV_ADD_LAST(__ret_uint32_t__, rv_secure_rand_word, __f)
+
+
+/// bool fn(int32_t *, int32_t)
+typedef rep_vec_err_t (*rep_vec_fn__ret_bool__int32_t_p__int32_t__t)(bool *, int32_t *, int32_t);
+
+/// bool fn(int32_t *, int32_t)
+typedef struct rep_vec__ret_bool__int32_t_p__int32_t__s {
+    rep_vec_fn__ret_bool__int32_t_p__int32_t__t fn;
+    struct rep_vec__ret_bool__int32_t_p__int32_t__s *next;
+} rep_vec__ret_bool__int32_t_p__int32_t__t;
+
+/**
+ * @brief Add handler to head of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__ret_bool__int32_t_p__int32_t__add(
+    rep_vec__ret_bool__int32_t_p__int32_t__t **head,
+    rep_vec__ret_bool__int32_t_p__int32_t__t *new_entry);
+
+/**
+ * @brief Traverse list and invoke handlers
+ * @param rv     Pointer to head of list
+ * @param def_fn Default handler to invoke after end of list
+ * @param pseq_dur First parameter
+ * @param ble_dur  Second parameter
+ * @return Return value from handlers
+ */
+bool
+rep_vec__ret_bool__int32_t_p__int32_t__invoke(
+    rep_vec__ret_bool__int32_t_p__int32_t__t *rv,
+    bool (*def_fn)(int32_t *, int32_t), int32_t *pseq_dur, int32_t ble_dur);
+
+/**
+ * @brief Add handler to tail of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__ret_bool__int32_t_p__int32_t__add_last(
+    rep_vec__ret_bool__int32_t_p__int32_t__t **head,
+    rep_vec__ret_bool__int32_t_p__int32_t__t *new_entry);
+
+/**
+ * @brief Platform prevent retention power save mode
+ *
+ * After the BLE module has gone to sleep, this vector can be used to
+ * prevent the system from entering the retention power saving mode.
+ */
+extern rep_vec__ret_bool__int32_t_p__int32_t__t *rv_plf_prevent_retention;
+#define RV_PLF_PREVENT_RETENTION_ADD(__f) \
+    RV_ADD(__ret_bool__int32_t_p__int32_t__, rv_plf_prevent_retention, __f)
+#define RV_PLF_PREVENT_RETENTION_ADD_LAST(__f) \
+    RV_ADD_LAST(__ret_bool__int32_t_p__int32_t__, rv_plf_prevent_retention, __f)
+
+/**
+ * @brief Platform prevent hibernation power save mode
+ *
+ * After the BLE module has gone to sleep, this vector can be used to
+ * prevent the system from entering the hibernation power saving mode.
+ */
+extern rep_vec__ret_bool__int32_t_p__int32_t__t *rv_plf_prevent_hibernation;
+#define RV_PLF_PREVENT_HIBERNATION_ADD(__f) \
+    RV_ADD(__ret_bool__int32_t_p__int32_t__, rv_plf_prevent_hibernation, __f)
+#define RV_PLF_PREVENT_HIBERNATION_ADD_LAST(__f) \
+    RV_ADD_LAST(__ret_bool__int32_t_p__int32_t__, rv_plf_prevent_hibernation, __f)
+
+
+/// void fn(uint32_t)
+typedef rep_vec_err_t (*rep_vec_fn__uint32_t__t)(uint32_t);
+
+/// void fn(uint32_t)
+typedef struct rep_vec__uint32_t__s {
+    rep_vec_fn__uint32_t__t fn;
+    struct rep_vec__uint32_t__s *next;
+} rep_vec__uint32_t__t;
+
+/**
+ * @brief Add handler to head of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__uint32_t__add(rep_vec__uint32_t__t **head,
+    rep_vec__uint32_t__t *new_entry);
+
+/**
+ * @brief Traverse list and invoke handlers
+ * @param rv     Pointer to head of list
+ * @param def_fn Default handler to invoke after end of list
+ * @param wake_status First parameter
+ */
+void
+rep_vec__uint32_t__invoke(rep_vec__uint32_t__t *rv, void (*def_fn)(uint32_t),
+    uint32_t wake_status);
+
+/**
+ * @brief Add handler to tail of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__uint32_t__add_last(rep_vec__uint32_t__t **head,
+    rep_vec__uint32_t__t *new_entry);
+
+/**
+ * @brief Platform woke up from power saving mode
+ *
+ * After the system wakes up from a power saving mode, this vector is invoked
+ * from a ke_event handler with the wake-up reason from the PSEQ STATUS
+ * register.  Applications can decode this reason and take specific action.
+ */
+extern rep_vec__uint32_t__t *rv_plf_awoken;
+#define RV_PLF_AWOKEN_ADD(__f) \
+    RV_ADD(__uint32_t__, rv_plf_awoken, __f)
+#define RV_PLF_AWOKEN_ADD_LAST(__f) \
+    RV_ADD_LAST(__uint32_t__, rv_plf_awoken, __f)
+
+
+/// bool fn(int32_t, uint32_t)
+typedef rep_vec_err_t (*rep_vec_fn__ret_bool__int32_t__uint32_t__t)(bool *, int32_t, uint32_t);
+
+/// bool fn(int32_t, uint32_t)
+typedef struct rep_vec__ret_bool__int32_t__uint32_t__s {
+    rep_vec_fn__ret_bool__int32_t__uint32_t__t fn;
+    struct rep_vec__ret_bool__int32_t__uint32_t__s *next;
+} rep_vec__ret_bool__int32_t__uint32_t__t;
+
+/**
+ * @brief Add handler to head of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__ret_bool__int32_t__uint32_t__add(
+    rep_vec__ret_bool__int32_t__uint32_t__t **head,
+    rep_vec__ret_bool__int32_t__uint32_t__t *new_entry);
+
+/**
+ * @brief Traverse list and invoke handlers
+ * @param rv     Pointer to head of list
+ * @param def_fn Default handler to invoke after end of list
+ * @param duration First parameter
+ * @param int_set  Second parameter
+ * @return Return value from handlers
+ */
+bool
+rep_vec__ret_bool__int32_t__uint32_t__invoke(
+    rep_vec__ret_bool__int32_t__uint32_t__t *rv,
+    bool (*def_fn)(int32_t, uint32_t), int32_t duration, uint32_t int_set);
+
+/**
+ * @brief Add handler to tail of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__ret_bool__int32_t__uint32_t__add_last(
+    rep_vec__ret_bool__int32_t__uint32_t__t **head,
+    rep_vec__ret_bool__int32_t__uint32_t__t *new_entry);
+
+/**
+ * @brief Platform enter hibernate power save mode
+ *
+ * These vectors permit customization of the ROM's power saving logic.
+ */
+extern rep_vec__ret_bool__int32_t__uint32_t__t *rv_plf_hibernate;
+#define RV_PLF_HIBERNATE_ADD(__f) \
+    RV_ADD(__ret_bool__int32_t__uint32_t__, rv_plf_hibernate, __f)
+#define RV_PLF_HIBERNATE_ADD_LAST(__f) \
+    RV_ADD_LAST(__ret_bool__int32_t__uint32_t__, rv_plf_hibernate, __f)
+
+/**
+ * @brief Platform enter retain_all power save mode
+ *
+ * These vectors permit customization of the ROM's power saving logic.
+ */
+extern rep_vec__ret_bool__int32_t__uint32_t__t *rv_plf_retain_all;
+#define RV_PLF_RETAIN_ALL_ADD(__f) \
+    RV_ADD(__ret_bool__int32_t__uint32_t__, rv_plf_retain_all, __f)
+#define RV_PLF_RETAIN_ALL_ADD_LAST(__f) \
+    RV_ADD_LAST(__ret_bool__int32_t__uint32_t__, rv_plf_retain_all, __f)
+
+
+/// void fn(bool *, uint32_t *, bool, int32_t)
+typedef rep_vec_err_t (*rep_vec_fn__bool_p__uint32_t_p__bool__int32_t__t)(bool *, uint32_t *, bool, int32_t);
+
+/// void fn(bool *, uint32_t *, bool, int32_t)
+typedef struct rep_vec__bool_p__uint32_t_p__bool__int32_t__s {
+    rep_vec_fn__bool_p__uint32_t_p__bool__int32_t__t fn;
+    struct rep_vec__bool_p__uint32_t_p__bool__int32_t__s *next;
+} rep_vec__bool_p__uint32_t_p__bool__int32_t__t;
+
+/**
+ * @brief Add handler to head of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__bool_p__uint32_t_p__bool__int32_t__add(
+    rep_vec__bool_p__uint32_t_p__bool__int32_t__t **head,
+    rep_vec__bool_p__uint32_t_p__bool__int32_t__t *new_entry);
+
+/**
+ * @brief Traverse list and invoke handlers
+ * @param rv     Pointer to head of list
+ * @param def_fn Default handler to invoke after end of list
+ * @param pseq_sleep         First parameter
+ * @param int_set            Second parameter
+ * @param ble_asleep         Third parameter
+ * @param ble_sleep_duration Fourth parameter
+ */
+void
+rep_vec__bool_p__uint32_t_p__bool__int32_t__invoke(
+    rep_vec__bool_p__uint32_t_p__bool__int32_t__t *rv,
+    void (*def_fn)(bool *, uint32_t *, bool, int32_t), bool *pseq_sleep,
+    uint32_t *int_set, bool ble_asleep, int32_t ble_sleep_duration);
+
+/**
+ * @brief Add handler to tail of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__bool_p__uint32_t_p__bool__int32_t__add_last(
+    rep_vec__bool_p__uint32_t_p__bool__int32_t__t **head,
+    rep_vec__bool_p__uint32_t_p__bool__int32_t__t *new_entry);
+
+/**
+ * @brief Platform considering power save mode
+ *
+ * These vectors permit customization of the ROM's power saving logic.
+ */
+extern rep_vec__bool_p__uint32_t_p__bool__int32_t__t *rv_plf_to_deep_sleep;
+#define RV_PLF_TO_DEEP_SLEEP_ADD(__f) \
+    RV_ADD(__bool_p__uint32_t_p__bool__int32_t__, rv_plf_to_deep_sleep, __f)
+#define RV_PLF_TO_DEEP_SLEEP_ADD_LAST(__f) \
+    RV_ADD_LAST(__bool_p__uint32_t_p__bool__int32_t__, rv_plf_to_deep_sleep, __f)
+
+
+/// void fn(bool, uint32_t)
+typedef rep_vec_err_t (*rep_vec_fn__bool__uint32_t__t)(bool, uint32_t);
+
+/// void fn(bool, uint32_t)
+typedef struct rep_vec__bool__uint32_t__s {
+    rep_vec_fn__bool__uint32_t__t fn;
+    struct rep_vec__bool__uint32_t__s *next;
+} rep_vec__bool__uint32_t__t;
+
+/**
+ * @brief Add handler to head of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__bool__uint32_t__add(rep_vec__bool__uint32_t__t **head,
+    rep_vec__bool__uint32_t__t *new_entry);
+
+/**
+ * @brief Traverse list and invoke handlers
+ * @param rv     Pointer to head of list
+ * @param def_fn Default handler to invoke after end of list
+ * @param pseq_sleep First parameter
+ * @param int_set    Second parameter
+ */
+void
+rep_vec__bool__uint32_t__invoke(rep_vec__bool__uint32_t__t *rv,
+    void (*def_fn)(bool, uint32_t), bool pseq_sleep, uint32_t int_set);
+
+/**
+ * @brief Add handler to tail of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__bool__uint32_t__add_last(rep_vec__bool__uint32_t__t **head,
+    rep_vec__bool__uint32_t__t *new_entry);
+
+/**
+ * @brief Platform back from power save mode
+ *
+ * These vectors permit customization of the ROM's power saving logic.
+ */
+extern rep_vec__bool__uint32_t__t *rv_plf_from_deep_sleep;
+#define RV_PLF_FROM_DEEP_SLEEP_ADD(__f) \
+    RV_ADD(__bool__uint32_t__, rv_plf_from_deep_sleep, __f)
+#define RV_PLF_FROM_DEEP_SLEEP_ADD_LAST(__f) \
+    RV_ADD_LAST(__bool__uint32_t__, rv_plf_from_deep_sleep, __f)
+
+/// void fn(uint8_t, uint32_t, bool)
+typedef rep_vec_err_t (*rep_vec_fn__uint8_t__uint32_t__bool__t)(uint8_t,
+    uint32_t, bool);
+
+/// void fn(uint8_t, uint32_t, bool)
+typedef struct rep_vec__uint8_t__uint32_t__bool__s {
+    rep_vec_fn__uint8_t__uint32_t__bool__t fn;
+    struct rep_vec__uint8_t__uint32_t__bool__s *next;
+} rep_vec__uint8_t__uint32_t__bool__t;
+
+/**
+ * @brief Add handler to head of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__uint8_t__uint32_t__bool__add(
+    rep_vec__uint8_t__uint32_t__bool__t **head,
+    rep_vec__uint8_t__uint32_t__bool__t *new_entry);
+
+/**
+ * @brief Traverse list and invoke handlers
+ * @param rv     Pointer to head of list
+ * @param def_fn Default handler to invoke after end of list
+ * @param link_id    First parameter
+ * @param clock      Second parameter
+ * @param sync       Third parameter
+ */
+void
+rep_vec__uint8_t__uint32_t__bool__invoke(
+    rep_vec__uint8_t__uint32_t__bool__t *rv, void (*def_fn)(uint8_t, uint32_t,
+    bool), uint8_t link_id, uint32_t clock, bool sync);
+
+/**
+ * @brief Add handler to tail of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__uint8_t_uint32_t__bool__add_last(
+    rep_vec__uint8_t__uint32_t__bool__t **head,
+    rep_vec__uint8_t__uint32_t__bool__t *new_entry);
+
+/**
+ * @brief Schedule next anchor point
+ *
+ * These vectors permit customization of the scheduling for the next anchor
+ * point.
+ */
+extern rep_vec__uint8_t__uint32_t__bool__t *rv_lld_con_sched;
+#define RV_LLD_CON_SCHED_ADD(__f) \
+    RV_ADD(__uint8_t__uint32_t__bool__, rv_lld_con_sched, __f)
+#define RV_LLD_CON_SCHED_ADD_LAST(__f) \
+    RV_ADD_LAST(__uint8_t__uint32_t__bool__, rv_lld_con_sched, __f)
+
+/// void fn(uint8_t)
+typedef rep_vec_err_t (*rep_vec_fn__uint8_t__t)(uint8_t);
+
+/// void fn(uint8_t)
+typedef struct rep_vec__uint8_t__s { rep_vec_fn__uint8_t__t fn;
+    struct rep_vec__uint8_t__s *next;
+} rep_vec__uint8_t__t;
+
+/**
+ * @brief Add handler to head of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__uint8_t__add(rep_vec__uint8_t__t **head,
+    rep_vec__uint8_t__t *new_entry);
+
+/**
+ * @brief Traverse list and invoke handlers
+ * @param rv     Pointer to head of list
+ * @param def_fn Default handler to invoke after end of list
+ * @param link_id    First parameter
+ */
+void
+rep_vec__uint8_t__invoke(rep_vec__uint8_t__t *rv, void (*def_fn)(uint8_t),
+    uint8_t link_id);
+
+/**
+ * @brief Add handler to tail of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__uint8_t__add_last(rep_vec__uint8_t__t **head,
+    rep_vec__uint8_t__t *new_entry);
+
+/**
+ * @brief Check the transmission during activity
+ *
+ * These vectors permit customization of over-the-air packet transmission.
+ */
+extern rep_vec__uint8_t__t *rv_lld_con_tx;
+#define RV_LLD_CON_TX_ADD(__f) RV_ADD(__uint8_t__, rv_lld_con_tx, __f)
+#define RV_LLD_CON_TX_ADD_LAST(__f) RV_ADD_LAST(__uint8_t__, rv_lld_con_tx, __f)
+
+/// void fn(uint8_t, uint32_t)
+typedef rep_vec_err_t (*rep_vec_fn__uint8_t__uint32_t__t)(uint8_t, uint32_t);
+
+/// void fn(uint8_t, uint32_t)
+typedef struct rep_vec__uint8_t__uint32_t__s {
+    rep_vec_fn__uint8_t__uint32_t__t fn;
+    struct rep_vec__uint8_t__uint32_t__s *next;
+} rep_vec__uint8_t__uint32_t__t;
+
+/**
+ * @brief Add handler to head of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__uint8_t__uint32_t__add(rep_vec__uint8_t__uint32_t__t **head,
+    rep_vec__uint8_t__uint32_t__t *new_entry);
+
+/**
+ * @brief Traverse list and invoke handlers
+ * @param rv     Pointer to head of list
+ * @param def_fn Default handler to invoke after end of list
+ * @param link_id    First parameter
+ * @param timestamp  Second parameter
+ */
+void
+rep_vec__uint8_t__uint32_t__invoke(rep_vec__uint8_t__uint32_t__t *rv,
+    void (*def_fn)(uint8_t, uint32_t), uint8_t link_id, uint32_t timestamp);
+
+/**
+ * @brief Add handler to tail of list
+ * @param head      Pointer to pointer to head of list
+ * @param new_entry New handler to add
+ */
+void
+rep_vec__uint8_t_uint32_t__add_last(rep_vec__uint8_t__uint32_t__t **head,
+    rep_vec__uint8_t__uint32_t__t *new_entry);
+
+/**
+ * @brief Check the reception during activity
+ *
+ * These vectors permit customization of over-the-air packet reception.
+ */
+extern rep_vec__uint8_t__uint32_t__t *rv_lld_con_rx;
+#define RV_LLD_CON_RX_ADD(__f) \
+    RV_ADD(__uint8_t__uint32_t__, rv_lld_con_rx, __f)
+#define RV_LLD_CON_RX_ADD_LAST(__f) \
+    RV_ADD_LAST(__uint8_t__uint32_t__, rv_lld_con_rx, __f)
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} REP_VEC
diff --git a/platform/atm2/ATM22xx-x1x/lib/app_bass/app_bass.h b/platform/atm2/ATM22xx-x1x/lib/app_bass/app_bass.h
new file mode 100644
index 0000000..d70f89f
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/app_bass/app_bass.h
@@ -0,0 +1,66 @@
+/**
+ *******************************************************************************
+ *
+ * @file app_bass.h
+ *
+ * @brief Battery service for application layer
+ *
+ * Copyright (C) Atmosic 2020
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_APPBASS Battery service for application layer
+ * @ingroup ATM_BTFM_API
+ * @brief The battery service for application of ATM bluetooth framework
+ *
+ * This module contains the battery service interface for application layer.
+ *
+ * @{
+ *******************************************************************************
+ */
+
+/*
+ * INCLUDE FILE
+ *******************************************************************************
+ */
+#include "ble_bass.h"
+#include "gadc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ *******************************************************************************
+ * @brief Retrieve the parameters of battery service
+ * return Battery service parameters
+ *******************************************************************************
+ */
+ble_bass_params_t const *app_bass_param(void);
+
+/**
+ *******************************************************************************
+ * @brief Get battery level
+ * return Return the current battery level
+ *******************************************************************************
+ */
+uint8_t app_bass_get_battery_lvl(void);
+
+/**
+ *******************************************************************************
+ * @brief Send battery level
+ * @param[in] lvl Battery level.
+ *******************************************************************************
+ */
+void app_bass_send_battery_lvl(uint8_t lvl);
+
+#ifdef __cplusplus
+}
+#endif
+
+///@} ATM_BTFM_APPBASS
+
diff --git a/platform/atm2/ATM22xx-x1x/lib/app_batt/app_batt.h b/platform/atm2/ATM22xx-x1x/lib/app_batt/app_batt.h
new file mode 100644
index 0000000..2f52918
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/app_batt/app_batt.h
@@ -0,0 +1,92 @@
+/**
+ *******************************************************************************
+ *
+ * @file app_batt.h
+ *
+ * @brief battery procedure for application layer.
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/**
+ * @defgroup APP_BATT_PROC Battery free procedure for application layer.
+ * @ingroup ATM_BTFM_PROC
+ * @brief Battery free procedure that control HSC and booster.
+ * @{
+ */
+
+#include "arch.h"
+#include "gadc.h"
+#include "batt_model.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Bit definition for hiberation restart.
+#define APP_BATT_HIB_RESTART_BIT (1 << 0)
+/// Bit definition for auto timer
+#define APP_BATT_AUTO_TIMER_BIT (1 << 1)
+
+#ifndef CFG_APP_FEATURE
+#define CFG_APP_FEATURE (APP_BATT_HIB_RESTART_BIT | APP_BATT_AUTO_TIMER_BIT)
+#endif
+
+#if (CFG_APP_FEATURE & APP_BATT_AUTO_TIMER_BIT)
+/// The low battery percentage boundary.
+#define APP_BATT_LOW_BATTERY_PERCENTAGE 30
+/// Time to poll capacity while battery is low.
+#define APP_BATT_LOW_POLL_TIME_CS 10000
+/// Time to poll capacity while battery is high.
+#define APP_BATT_HIGH_POLL_TIME_CS 60000
+#endif
+
+#if (CFG_APP_FEATURE & APP_BATT_HIB_RESTART_BIT)
+/// Time to check while low battery in hibernation
+#define APP_BATT_HIB_TIME_CS 60000
+#endif
+
+/// Callback functions to application.
+typedef struct {
+    /// Start application.
+    void (*app_start)(void (*done)(void));
+    /// Stop application.
+    void (*app_stop)(void (*done)(void));
+    /// Update battery level.
+    void (*level_update)(uint8_t);
+} app_batt_cbs_t;
+
+/**
+ *******************************************************************************
+ * @brief Start application battery procedure.
+ * @param[in] cbs Callback to application.
+ *******************************************************************************
+ */
+void app_batt_start(app_batt_cbs_t const *cbs);
+
+#if (CFG_APP_FEATURE & APP_BATT_AUTO_TIMER_BIT)
+/**
+ *******************************************************************************
+ * @brief Stop application battery procedure.
+ *******************************************************************************
+ */
+void app_batt_stop(void);
+#else
+/**
+ *******************************************************************************
+ * @brief Get the battery level.
+ * @return False if another operation is onging.
+ * @note The result will pass to level_update callback function.
+ *******************************************************************************
+ */
+bool app_batt_get_level(void);
+#endif
+#ifdef __cplusplus
+}
+#endif
+
+/// @} APP_BATT_PROC
diff --git a/platform/atm2/ATM22xx-x1x/lib/app_diss/app_diss.h b/platform/atm2/ATM22xx-x1x/lib/app_diss/app_diss.h
new file mode 100644
index 0000000..b5611f4
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/app_diss/app_diss.h
@@ -0,0 +1,39 @@
+/**
+ *******************************************************************************
+ *
+ * @file app_diss.h
+ *
+ * @brief Device Information Service Configuration Setting
+ *
+ * Copyright (C) Atmosic 2020
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_APPDISS Device information service for application layer
+ * @ingroup ATM_BTFM_API
+ * @brief The device information service for application of ATM bluetooth framework
+ *
+ * This module contains the device information service interface for application layer.
+ *
+ * @{
+ *******************************************************************************
+ */
+#include "app_config.h"
+#include "ble_diss.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct diss_param const *app_dis_param(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+///@} ATM_BTFM_APPBASS
diff --git a/platform/atm2/ATM22xx-x1x/lib/atm_adv/atm_adv.h b/platform/atm2/ATM22xx-x1x/lib/atm_adv/atm_adv.h
new file mode 100644
index 0000000..b87aa75
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/atm_adv/atm_adv.h
@@ -0,0 +1,234 @@
+/**
+ *******************************************************************************
+ *
+ * @file atm_adv.h
+ *
+ * @brief Atmosic BLE advertising procedure
+ *
+ * Copyright (C) Atmosic 2020-2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_PADV ADV procedures
+ * @ingroup ATM_BTFM_PROC
+ * @brief ATM bluetooth framework advertisement procedures
+ *
+ * This module contains the necessary procedure to manipulate ADV.
+ *
+ * @{
+ *******************************************************************************
+ */
+
+#include "ble_gap.h"
+#include "atm_debug.h"
+#include "atm_adv_param.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ATM_INVALID_ADVIDX 0xFF
+
+/// ADV state.
+typedef enum {
+    /// Advertising state machine is in idle state.
+    ATM_ADV_IDLE,
+    /// Advertising state machine is in creating state.
+    ATM_ADV_CREATING,
+    /// Successfully created, data not set.
+    ATM_ADV_CREATED,
+    /// ADV data is under setting.
+    ATM_ADV_ADVDATA_SETTING,
+    /// ADV data is set.
+    ATM_ADV_ADVDATA_DONE,
+    /// Scan data is under setting.
+    ATM_ADV_SCANDATA_SETTING,
+    /// Scan data is set.
+    ATM_ADV_SCANDATA_DONE,
+    /// Advertising state machine is in off state.
+    ATM_ADV_OFF,
+    /// Advertising state machine is in starting state.
+    ATM_ADV_STARTING,
+    /// Advertising state machine is in on state.
+    ATM_ADV_ON,
+    /// Advertising state machine is in stoping state.
+    ATM_ADV_STOPPING,
+    /// Advertising state machine is in deleting state.
+    ATM_ADV_DELETING,
+    /// Delete created advertising successfully.
+    ATM_ADV_DELETED
+} atm_adv_state_t;
+
+/// Advertising callback function
+typedef void (*atm_adv_cb_t)(atm_adv_state_t state, uint8_t act_idx,
+    ble_err_code_t status);
+
+/**
+ *******************************************************************************
+ * @brief Register advertising callback function
+ * @param[in] cb Advertising callback function.
+ *******************************************************************************
+ */
+void atm_adv_reg(atm_adv_cb_t cb);
+
+/**
+ *******************************************************************************
+ * @brief Apply the advertising activity
+ * @param[in] create Advertising activity
+ * @return BLE_ERR_NO_ERROR for success @ref ble_err_code_t
+ *******************************************************************************
+ */
+ble_err_code_t atm_adv_create(atm_adv_create_t const *create);
+
+/**
+ *******************************************************************************
+ * @brief Set the advertising data
+ * @param[in] act_idx Activity index
+ * @param[in] data Advertising data
+ * @return BLE_ERR_NO_ERROR for success @ref ble_err_code_t
+ *******************************************************************************
+ */
+ble_err_code_t atm_adv_set_adv_data(uint8_t act_idx, atm_adv_data_t const *data);
+
+/**
+ *******************************************************************************
+ * @brief Set the scan response data
+ * @param[in] act_idx Activity index
+ * @param[in] data Scan response data
+ * @return BLE_ERR_NO_ERROR for success @ref ble_err_code_t
+ *******************************************************************************
+ */
+ble_err_code_t atm_adv_set_scan_data(uint8_t act_idx, atm_adv_data_t const *data);
+
+/**
+ *******************************************************************************
+ * @brief Start advertising
+ * @param[in] act_idx Activity index
+ * @param[in] start Additional advertising parameters
+ * @return BLE_ERR_NO_ERROR for success @ref ble_err_code_t
+ *******************************************************************************
+ */
+ble_err_code_t atm_adv_start(uint8_t act_idx, atm_adv_start_t const *start);
+
+/**
+ *******************************************************************************
+ * @brief Stop advertising
+ * @param[in] act_idx Activity index
+ * @return BLE_ERR_NO_ERROR for success @ref ble_err_code_t
+ *******************************************************************************
+ */
+ble_err_code_t atm_adv_stop(uint8_t act_idx);
+
+/**
+ *******************************************************************************
+ * @brief Delete advertising
+ * @param[in] act_idx Activity index
+ * @return BLE_ERR_NO_ERROR for success @ref ble_err_code_t
+ *******************************************************************************
+ */
+ble_err_code_t atm_adv_delete(uint8_t act_idx);
+
+/**
+ *******************************************************************************
+ * @brief Get advertising activity state
+ * @param[in] act_idx Activity index
+ * @return state value @ref atm_adv_state_t
+ *******************************************************************************
+ */
+uint8_t atm_adv_get_state(uint8_t act_idx);
+
+/**
+ *******************************************************************************
+ * @brief Check information element
+ *
+ * @param[in] payload The information element of adv. data or scan response data
+ * @param[in] len The length of payload
+ * @return true if data is correct
+ *******************************************************************************
+ */
+__NONNULL(1)
+bool atm_adv_check_adv_len_valid(uint8_t const *payload, uint16_t len);
+
+/**
+ *******************************************************************************
+ * @brief Parameter sanity check for adv data
+ * @param[in] create Parameter setting for create adv.
+ * @param[in] adv Advertising data
+ * @return BLE_ERR_NO_ERROR for success @ref ble_err_code_t
+ *******************************************************************************
+ */
+ble_err_code_t atm_adv_check_adv_data(atm_adv_create_t const *create,
+    atm_adv_data_t const *adv);
+
+/**
+ *******************************************************************************
+ * @brief Parameter sanity check for scan response data
+ * @param[in] create Parameter setting for create adv.
+ * @param[in] scan Scan response data
+ * @return BLE_ERR_NO_ERROR for success @ref ble_err_code_t
+ *******************************************************************************
+ */
+ble_err_code_t atm_adv_check_scan_resp_data(atm_adv_create_t const *create,
+    atm_adv_data_t const *scan);
+
+/**
+ *******************************************************************************
+ * @brief Parameter sanity check for set adv. data or scan response data
+ * @param[in] create Parameter setting for create adv.
+ * @param[in] adv Advertising data
+ * @param[in] scan Scan response data
+ * @return BLE_ERR_NO_ERROR for success @ref ble_err_code_t
+ *******************************************************************************
+ */
+ble_err_code_t atm_adv_set_data_sanity(atm_adv_create_t const *create,
+    atm_adv_data_t const *adv, atm_adv_data_t const *scan);
+
+/**
+ *******************************************************************************
+ * @brief Advertisement stopped indication callback function
+ * @param[in] param Indication information
+ *******************************************************************************
+ */
+void atm_adv_stopped_ind(ble_gap_ind_stop_t const *param);
+
+/**
+ *******************************************************************************
+ * @brief Convert data type from atm_adv_data_nvds_t to atm_adv_data_t
+ * @param[in] data Flash nvds data pointer reading from flash nvds
+ * @return data pointer using atm_adv_data_t data type
+ *******************************************************************************
+ */
+__INLINE atm_adv_data_t *atm_adv_convert_nvds_data_type(atm_adv_data_nvds_t *data)
+{
+    return (atm_adv_data_t *)data;
+}
+
+/**
+ *******************************************************************************
+ * @brief Print advertising timeout parameter
+ * @param[in] create Parameter setting for create adv.
+ * @param[in] start Parameter setting for start adv.
+ * @return BLE_ERR_NO_ERROR for success @ref ble_err_code_t
+ *******************************************************************************
+ */
+#ifdef ATM_DEBUG
+ble_err_code_t atm_adv_timeout_param_print(atm_adv_create_t const *create,
+    atm_adv_start_t const *start);
+#else
+__INLINE uint8_t atm_adv_timeout_param_print(atm_adv_create_t const *create,
+    atm_adv_start_t const *start)
+{
+    return BLE_ERR_NO_ERROR;
+}
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+///@} ATM_BTFM_PADV
+
diff --git a/platform/atm2/ATM22xx-x1x/lib/atm_adv/atm_adv_param.h b/platform/atm2/ATM22xx-x1x/lib/atm_adv/atm_adv_param.h
new file mode 100644
index 0000000..4ed9c6e
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/atm_adv/atm_adv_param.h
@@ -0,0 +1,182 @@
+/**
+ *******************************************************************************
+ *
+ * @file atm_adv_param.h
+ *
+ * @brief Atmosic BLE advertising parameter
+ *
+ * Copyright (C) Atmosic 2020-2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_PADVP ADV parameters
+ * @ingroup ATM_BTFM_PROC
+ * @brief ATM bluetooth framework advertisement parameters
+ *
+ * This module contains the necessary function to provide predefined parameters
+ * for usage of ADV procedures @see atm_adv.h
+ *
+ * @{
+ *******************************************************************************
+ */
+
+#include "atm_log.h"
+#include "ble_gap.h"
+
+// Overwrite setting by application
+#ifdef GAP_ADV_PARM_NAME
+#include STR(GAP_ADV_PARM_NAME)
+#endif
+
+// GAP_ADV_PARM_NAME can overwrite default parameter setting
+#include "atm_adv_param_internal.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if CFG_ADV_CREATE_PARAM_CONST
+#define __ATM_ADV_CREATE_PARAM_CONST const
+#else
+#define __ATM_ADV_CREATE_PARAM_CONST
+#endif
+
+#if CFG_ADV_DATA_PARAM_CONST
+#define __ATM_ADV_DATA_PARAM_CONST const
+#else
+#define __ATM_ADV_DATA_PARAM_CONST
+#endif
+
+#if CFG_ADV_START_PARAM_CONST
+#define __ATM_ADV_START_PARAM_CONST const
+#else
+#define __ATM_ADV_START_PARAM_CONST
+#endif
+
+
+/// Parameter for advertising data and scan response data
+typedef struct {
+    /// Length of advertising data or scan response data
+    uint16_t len;
+    /// The content of advertising data or scan response data
+    uint8_t __ATM_ADV_DATA_PARAM_CONST *data;
+} atm_adv_data_t;
+
+/// NVDS parameter for advertising data and scan response data
+typedef struct {
+    /// Length of advertising data or scan response data
+    uint16_t len;
+    /// The content of advertising data or scan response data
+    uint8_t *data;
+} atm_adv_data_nvds_t;
+
+/// Create an advertising activity command
+typedef struct {
+    ble_own_addr_t own_addr_type;
+    ble_gapm_adv_create_param_t adv_param;
+} atm_adv_create_t;
+
+/// Parameters of Start advertising
+typedef ble_gapm_adv_param_t atm_adv_start_t;
+
+#ifndef CFG_GAP_ADV_MAX_INST
+#define CFG_GAP_ADV_MAX_INST 1
+#endif
+
+/**
+ *******************************************************************************
+ * @brief Get persistent advertising create parameter.
+ * @param[in] idx The index of persistent parameter.
+ *******************************************************************************
+ */
+atm_adv_create_t __ATM_ADV_CREATE_PARAM_CONST *atm_adv_create_param_get(uint8_t idx);
+
+/**
+ *******************************************************************************
+ * @brief Get persistent advertising start parameter.
+ * @param[in] idx The index of persistent parameter.
+ *******************************************************************************
+ */
+atm_adv_start_t __ATM_ADV_START_PARAM_CONST *atm_adv_start_param_get(uint8_t idx);
+
+/**
+ *******************************************************************************
+ * @brief Get persistent advertising data.
+ * @param[in] idx The index of persistent parameter.
+ *******************************************************************************
+ */
+atm_adv_data_t __ATM_ADV_DATA_PARAM_CONST *atm_adv_advdata_param_get(uint8_t idx);
+
+/**
+ *******************************************************************************
+ * @brief Get persistent scan response data.
+ * @param[in] idx The index of persistent parameter.
+ *******************************************************************************
+ */
+atm_adv_data_t __ATM_ADV_DATA_PARAM_CONST *atm_adv_scandata_param_get(uint8_t idx);
+
+/**
+ *******************************************************************************
+ * @brief Get advertising create parameters from Flash NVDS.
+ * @param[in] is_wurx True if wurx ADV.
+  * @param[in,out] create Create parameter
+  * @return true for success
+ *******************************************************************************
+ */
+bool atm_adv_create_param_nvds(bool is_wurx, atm_adv_create_t *create);
+
+/**
+ *******************************************************************************
+ * @brief Get advertising start parameters from Flash NVDS.
+  * @param[in,out] start Start parameter
+  * @return true for success
+ *******************************************************************************
+ */
+bool atm_adv_start_param_nvds(atm_adv_start_t *start);
+
+/**
+ *******************************************************************************
+ * @brief Get scan response data from Flash NVDS.
+  * @param[in,out] scan Scan response data. scan->data must be NULL.
+  * @return true for success, scan->data will be allocated dynamically
+ *******************************************************************************
+ */
+bool atm_adv_scandata_param_nvds(atm_adv_data_nvds_t *scan);
+
+/**
+ *******************************************************************************
+ * @brief Get advertising data from Flash NVDS.
+  * @param[in,out] adv Advertising data. adv->data must be NULL.
+  * @return true for success, adv->data will be allocated dynamically
+ *******************************************************************************
+ */
+bool atm_adv_advdata_param_nvds(atm_adv_data_nvds_t *adv);
+
+/**
+ *******************************************************************************
+ * @brief Get advertising data from Flash NVDS.
+  * @param[in,out] adv Advertising data/scan response data. adv->data must be NULL.
+  * @param[in] tag_id NVDS tag ID
+  * @return true for success, adv->data will be allocated dynamically
+ *******************************************************************************
+ */
+__NONNULL(1)
+bool atm_adv_data_param_nvds_id(atm_adv_data_nvds_t *adv, uint8_t tag_id);
+
+/**
+ *******************************************************************************
+ * @brief Free advertising or scan response data reading from Flash NVDS
+ * @param[in] nvds_data Advertising or scan response data
+ *******************************************************************************
+ */
+void atm_adv_data_param_nvds_free(atm_adv_data_nvds_t *nvds_data);
+
+#ifdef __cplusplus
+}
+#endif
+
+///@} ATM_BTFM_PADVP
diff --git a/platform/atm2/ATM22xx-x1x/lib/atm_adv/atm_adv_param_internal.h b/platform/atm2/ATM22xx-x1x/lib/atm_adv/atm_adv_param_internal.h
new file mode 100644
index 0000000..0eee737
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/atm_adv/atm_adv_param_internal.h
@@ -0,0 +1,249 @@
+/**
+ *******************************************************************************
+ *
+ * @file atm_adv_param_internal.h
+ *
+ * @brief Atmosic BLE advertising default parameter
+ *
+ * Copyright (C) Atmosic 2020-2022
+ *
+ *******************************************************************************
+ */
+
+// Please use GAP_ADV_PARM_NAME to overwrite the parameter setting by example
+// Prevent to modify this framework global default parameter setting
+
+#pragma once
+#include "atm_adv_param.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Default Create Parameter Setting
+#define DEFAULT_CREATE_PARAM_CONST 1
+#define DEFAULT_OWNER_ADDR_TYPE BLE_OWN_STATIC_ADDR
+#define DEFAULT_CREATE_TYPE ADV_TYPE_LEGACY
+#define DEFAULT_CREATE_PROPERTY ADV_LEGACY_UNDIR_CONN_MASK
+#define DEFAULT_CREATE_FILTER_POLICY FILTER_SCAN_ANY_CON_ANY
+#define DEFAULT_CREATE_CHNL_MAP ADV_ALL_CHNLS
+#define DEFAULT_CREATE_PRIM_PHY BLE_GAP_PHY_1MBPS
+#define DEFAULT_CREATE_DISCOVERY_MODE ADV_MODE_GEN_DISC
+#define DEFAULT_CREATE_INTERVAL_MIN (ADV_INTERVAL_MIN * 2)
+#define DEFAULT_CREATE_INTERVAL_MAX (ADV_INTERVAL_MIN * 2)
+#define DEFAULT_CREATE_MAX_TX_POWER 0
+#define DEFAULT_CREATE_SEC_MAX_SKIP 0
+#define DEFAULT_CREATE_SEC_PHY BLE_GAP_PHY_1MBPS
+#define DEFAULT_CREATE_SEC_ADV_SID 0
+#define DEFAULT_CREATE_PERI_INTERVAL_MIN 80
+#define DEFAULT_CREATE_PERI_INTERVAL_MAX 80
+#define DEFAULT_CREATE_PEER_ADDR_TYPE 0
+#define DEFAULT_CREATE_PEER_ADDR 0
+
+// Default Start Parameter Setting
+#define DEFAULT_START_PARAM_CONST 1
+#define DEFAULT_START_DURATION 0
+#ifdef AUTO_TEST
+#ifdef IS_FOR_SIM
+    #define DEFAULT_START_MAX_ADV_EVENT 8
+#else // IS_FOR_SIM
+    #define DEFAULT_START_MAX_ADV_EVENT 80
+#endif // IS_FOR_SIM
+#else // AUTO_TEST
+    #define DEFAULT_START_MAX_ADV_EVENT 0
+#endif // AUTO_TEST
+
+// Default Data Parameter Setting
+#define DEFAULT_DATA_PARAM_CONST 1
+#define DEFAULT_DATA_ADV_ENABLE 1
+#define DEFAULT_DATA_SCANRSP_ENABLE 1
+#define DEFAULT_DATA_ADV_PAYLOAD \
+    0x0c,0x09,'A','t','m','o','s','i','c','-','A','D','V'
+#define DEFAULT_DATA_SCANRSP_PAYLOAD \
+    0x09,0xff,0x00,0x60,'R','W','-','B','L','E'
+
+/************************************/
+//           parameters             //
+/************************************/
+/// --- ADVs Create Parameter Constant-------
+/// To change at runtime, need to set 0
+#ifndef CFG_ADV_CREATE_PARAM_CONST
+#define CFG_ADV_CREATE_PARAM_CONST DEFAULT_CREATE_PARAM_CONST
+#endif
+
+/// -------- ADV0 Register Parameter------------
+#ifndef CFG_ADV0_OWNER_ADDR_TYPE
+#define CFG_ADV0_OWNER_ADDR_TYPE DEFAULT_OWNER_ADDR_TYPE
+#endif
+#ifndef CFG_ADV0_CREATE_TYPE
+#define CFG_ADV0_CREATE_TYPE DEFAULT_CREATE_TYPE
+#endif
+#ifndef CFG_ADV0_CREATE_PROPERTY
+#define CFG_ADV0_CREATE_PROPERTY DEFAULT_CREATE_PROPERTY
+#endif
+#ifndef CFG_ADV0_CREATE_FILTER_POLICY
+#define CFG_ADV0_CREATE_FILTER_POLICY DEFAULT_CREATE_FILTER_POLICY
+#endif
+#ifndef CFG_ADV0_CREATE_PEER_ADDR_TYPE
+#define CFG_ADV0_CREATE_PEER_ADDR_TYPE DEFAULT_CREATE_PEER_ADDR_TYPE
+#endif
+#ifndef CFG_ADV0_CREATE_PEER_ADDR
+#define CFG_ADV0_CREATE_PEER_ADDR DEFAULT_CREATE_PEER_ADDR
+#endif
+#ifndef CFG_ADV0_CREATE_CHNL_MAP
+#define CFG_ADV0_CREATE_CHNL_MAP DEFAULT_CREATE_CHNL_MAP
+#endif
+#ifndef CFG_ADV0_CREATE_PRIM_PHY
+#define CFG_ADV0_CREATE_PRIM_PHY DEFAULT_CREATE_PRIM_PHY
+#endif
+#ifndef CFG_ADV0_CREATE_DISCOVERY_MODE
+#define CFG_ADV0_CREATE_DISCOVERY_MODE DEFAULT_CREATE_DISCOVERY_MODE
+#endif
+#ifndef CFG_ADV0_CREATE_INTERVAL_MIN
+#define CFG_ADV0_CREATE_INTERVAL_MIN DEFAULT_CREATE_INTERVAL_MIN
+#endif
+#ifndef CFG_ADV0_CREATE_INTERVAL_MAX
+#define CFG_ADV0_CREATE_INTERVAL_MAX DEFAULT_CREATE_INTERVAL_MAX
+#endif
+#ifndef CFG_ADV0_CREATE_MAX_TX_POWER
+#define CFG_ADV0_CREATE_MAX_TX_POWER DEFAULT_CREATE_MAX_TX_POWER
+#endif
+#ifndef CFG_ADV0_CREATE_SEC_MAX_SKIP
+#define CFG_ADV0_CREATE_SEC_MAX_SKIP DEFAULT_CREATE_SEC_MAX_SKIP
+#endif
+#ifndef CFG_ADV0_CREATE_SEC_PHY
+#define CFG_ADV0_CREATE_SEC_PHY DEFAULT_CREATE_SEC_PHY
+#endif
+#ifndef CFG_ADV0_CREATE_SEC_ADV_SID
+#define CFG_ADV0_CREATE_SEC_ADV_SID DEFAULT_CREATE_SEC_ADV_SID
+#endif
+#ifndef CFG_ADV0_CREATE_PERI_INTERVAL_MIN
+#define CFG_ADV0_CREATE_PERI_INTERVAL_MIN DEFAULT_CREATE_PERI_INTERVAL_MIN
+#endif
+#ifndef CFG_ADV0_CREATE_PERI_INTERVAL_MAX
+#define CFG_ADV0_CREATE_PERI_INTERVAL_MAX DEFAULT_CREATE_PERI_INTERVAL_MAX
+#endif
+
+/// -------- ADV1 Register Parameter------------
+#ifndef CFG_ADV1_OWNER_ADDR_TYPE
+#define CFG_ADV1_OWNER_ADDR_TYPE DEFAULT_OWNER_ADDR_TYPE
+#endif
+#ifndef CFG_ADV1_CREATE_TYPE
+#define CFG_ADV1_CREATE_TYPE DEFAULT_CREATE_TYPE
+#endif
+#ifndef CFG_ADV1_CREATE_PROPERTY
+#define CFG_ADV1_CREATE_PROPERTY DEFAULT_CREATE_PROPERTY
+#endif
+#ifndef CFG_ADV1_CREATE_FILTER_POLICY
+#define CFG_ADV1_CREATE_FILTER_POLICY DEFAULT_CREATE_FILTER_POLICY
+#endif
+#ifndef CFG_ADV1_CREATE_PEER_ADDR_TYPE
+#define CFG_ADV1_CREATE_PEER_ADDR_TYPE DEFAULT_CREATE_PEER_ADDR_TYPE
+#endif
+#ifndef CFG_ADV1_CREATE_PEER_ADDR
+#define CFG_ADV1_CREATE_PEER_ADDR DEFAULT_CREATE_PEER_ADDR
+#endif
+#ifndef CFG_ADV1_CREATE_CHNL_MAP
+#define CFG_ADV1_CREATE_CHNL_MAP DEFAULT_CREATE_CHNL_MAP
+#endif
+#ifndef CFG_ADV1_CREATE_PRIM_PHY
+#define CFG_ADV1_CREATE_PRIM_PHY DEFAULT_CREATE_PRIM_PHY
+#endif
+#ifndef CFG_ADV1_CREATE_DISCOVERY_MODE
+#define CFG_ADV1_CREATE_DISCOVERY_MODE DEFAULT_CREATE_DISCOVERY_MODE
+#endif
+#ifndef CFG_ADV1_CREATE_INTERVAL_MIN
+#define CFG_ADV1_CREATE_INTERVAL_MIN DEFAULT_CREATE_INTERVAL_MIN
+#endif
+#ifndef CFG_ADV1_CREATE_INTERVAL_MAX
+#define CFG_ADV1_CREATE_INTERVAL_MAX DEFAULT_CREATE_INTERVAL_MAX
+#endif
+#ifndef CFG_ADV1_CREATE_MAX_TX_POWER
+#define CFG_ADV1_CREATE_MAX_TX_POWER DEFAULT_CREATE_MAX_TX_POWER
+#endif
+#ifndef CFG_ADV1_CREATE_SEC_MAX_SKIP
+#define CFG_ADV1_CREATE_SEC_MAX_SKIP DEFAULT_CREATE_SEC_MAX_SKIP
+#endif
+#ifndef CFG_ADV1_CREATE_SEC_PHY
+#define CFG_ADV1_CREATE_SEC_PHY DEFAULT_CREATE_SEC_PHY
+#endif
+#ifndef CFG_ADV1_CREATE_SEC_ADV_SID
+#define CFG_ADV1_CREATE_SEC_ADV_SID DEFAULT_CREATE_SEC_ADV_SID
+#endif
+#ifndef CFG_ADV1_CREATE_PERI_INTERVAL_MIN
+#define CFG_ADV1_CREATE_PERI_INTERVAL_MIN DEFAULT_CREATE_PERI_INTERVAL_MIN
+#endif
+#ifndef CFG_ADV1_CREATE_PERI_INTERVAL_MAX
+#define CFG_ADV1_CREATE_PERI_INTERVAL_MAX DEFAULT_CREATE_PERI_INTERVAL_MAX
+#endif
+
+
+/// ------- ADV Start Parameter Constant----
+/// To change at runtime, need to set 0
+#ifndef CFG_ADV_START_PARAM_CONST
+#define CFG_ADV_START_PARAM_CONST DEFAULT_START_PARAM_CONST
+#endif
+
+/// ------- ADV0 Start Parameter----
+/// Advertising duration (in unit of 10ms). 0 means that advertising continues
+/// until the host disables it
+#ifndef CFG_ADV0_START_DURATION
+#define CFG_ADV0_START_DURATION DEFAULT_START_DURATION
+#endif
+/// The maximum number of extended ad events that the controller should try to
+/// send before terminating the extended adv.
+/// Valid only if extended advertising
+#ifndef CFG_ADV0_START_MAX_ADV_EVENT
+#define CFG_ADV0_START_MAX_ADV_EVENT DEFAULT_START_MAX_ADV_EVENT
+#endif
+
+/// ------- ADV1 Start Parameter----
+/// Advertising duration (in unit of 10ms). 0 means that advertising continues
+/// until the host disable it
+#ifndef CFG_ADV1_START_DURATION
+#define CFG_ADV1_START_DURATION DEFAULT_START_DURATION
+#endif
+/// The maximum number of extended ad events that the controller should try to
+/// send before terminating the extended adv.
+/// Valid only if extended advertising
+#ifndef CFG_ADV1_START_MAX_ADV_EVENT
+#define CFG_ADV1_START_MAX_ADV_EVENT DEFAULT_START_MAX_ADV_EVENT
+#endif
+
+/// ------- ADV Data Parameter Constant----
+/// To change at runtime, need to set 0
+#ifndef CFG_ADV_DATA_PARAM_CONST
+#define CFG_ADV_DATA_PARAM_CONST DEFAULT_DATA_PARAM_CONST
+#endif
+
+/// ------- ADV0 Set Data Parameter----
+#ifndef CFG_ADV0_DATA_ADV_ENABLE
+#define CFG_ADV0_DATA_ADV_ENABLE DEFAULT_DATA_ADV_ENABLE
+#endif
+#ifndef CFG_ADV0_DATA_SCANRSP_ENABLE
+#define CFG_ADV0_DATA_SCANRSP_ENABLE DEFAULT_DATA_SCANRSP_ENABLE
+#endif
+#ifndef CFG_ADV0_DATA_ADV_PAYLOAD
+#define CFG_ADV0_DATA_ADV_PAYLOAD DEFAULT_DATA_ADV_PAYLOAD
+#endif
+#ifndef CFG_ADV0_DATA_SCANRSP_PAYLOAD
+#define CFG_ADV0_DATA_SCANRSP_PAYLOAD DEFAULT_DATA_SCANRSP_PAYLOAD
+#endif
+
+/// ------- ADV1 Set Data Parameter----
+#ifndef CFG_ADV1_DATA_ADV_ENABLE
+#define CFG_ADV1_DATA_ADV_ENABLE DEFAULT_DATA_ADV_ENABLE
+#endif
+#ifndef CFG_ADV1_DATA_SCANRSP_ENABLE
+#define CFG_ADV1_DATA_SCANRSP_ENABLE DEFAULT_DATA_SCANRSP_ENABLE
+#endif
+#ifndef CFG_ADV1_DATA_ADV_PAYLOAD
+#define CFG_ADV1_DATA_ADV_PAYLOAD DEFAULT_DATA_ADV_PAYLOAD
+#endif
+#ifndef CFG_ADV1_DATA_SCANRSP_PAYLOAD
+#define CFG_ADV1_DATA_SCANRSP_PAYLOAD DEFAULT_DATA_SCANRSP_PAYLOAD
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/platform/atm2/ATM22xx-x1x/lib/atm_asm/atm_asm.h b/platform/atm2/ATM22xx-x1x/lib/atm_asm/atm_asm.h
new file mode 100644
index 0000000..b730fcf
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/atm_asm/atm_asm.h
@@ -0,0 +1,154 @@
+/**
+ *******************************************************************************
+ *
+ * @file atm_asm.h
+ *
+ * @brief Atmosic application state machine
+ *
+ * Copyright (C) Atmosic 2020-2023
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_PASM Application state machine
+ * @ingroup ATM_BTFM_PROC
+ * @brief ATM bluetooth framework state machine tool
+ *
+ * This module contains the necessary function of state machine tool
+ *
+ * @{
+ *******************************************************************************
+ */
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * MACROS
+ *******************************************************************************
+ */
+#define S_OP(s, op) (s), (op)
+
+/*
+ * TYPEDEFINE
+ *******************************************************************************
+ */
+
+#ifdef CFG_ASM_BITWISE
+typedef uint32_t ASM_T;
+#else
+typedef uint8_t ASM_T;
+#endif
+typedef ASM_T ASM_S;
+typedef ASM_T ASM_O;
+
+/**
+ * @brief Simple handler
+ */
+typedef void (*state_handler)(void);
+
+typedef struct {
+    /// state code
+    ASM_S state;
+    /// operation code
+    ASM_O operation;
+    /// next state
+    ASM_S next_state;
+    /// handler function for state_operation
+    state_handler handler;
+} state_entry;
+typedef struct {
+    /// state code
+    ASM_S pre_state;
+    /// operation code
+    ASM_O operation;
+    /// next state
+    ASM_S cur_state;
+} atm_asm_trans;
+
+/*
+ * GLOBAL
+ *******************************************************************************
+ */
+/**
+ * @brief Insert application state machine table into framework
+ * @param[in] idx        instance index
+ * @param[in] s_tbl      state machine table
+ * @param[in] s_tbl_size size of state machine table
+ */
+void atm_asm_init_table(uint8_t idx, const state_entry s_tbl[],
+    uint8_t s_tbl_size);
+
+/**
+ * @brief Set state
+ * @param[in] idx        instance index
+ * @param[in] state      state value
+ */
+void atm_asm_set_current_state(uint8_t idx, ASM_S state);
+
+/**
+ * @brief Get current state
+ * @param[in] idx        instance index
+ * @return current state
+ */
+ASM_S atm_asm_get_current_state(uint8_t idx);
+
+/**
+ * @brief Update current state and operation code
+ * @param[in] idx        instance index
+ * @param[in] state      state value
+ * @param[in] op_code    operation code
+ */
+void atm_asm_set_state_op(uint8_t idx, ASM_S state, ASM_O op_code);
+
+/**
+ * @brief Get latest transition
+ * @param[in] idx instance index
+ */
+atm_asm_trans atm_asm_get_latest_transition(uint8_t idx);
+
+/**
+ * @brief Move to handler function by operation code then update state
+ * @param[in] idx         instance index
+ * @param[in] next_op     move state to this
+ */
+void atm_asm_move(uint8_t idx, ASM_O next_op);
+
+/**
+ * @brief Set callback function to debug state machine transitions.
+ * @param[in] idx        instance index
+ * @param[in] cb         callback function
+ */
+void atm_asm_reg_state_change_cb(
+    uint8_t idx, void (*cb)(ASM_S last_s, ASM_O op, ASM_S next_s));
+
+/**
+ *******************************************************************************
+ * @brief Get ordinal number of ASM_O or ASM_S.
+ * @param code Specific state code or operation code.
+ * @return Ordinal number of this state.
+ *******************************************************************************
+ */
+static inline uint8_t atm_asm_ordinal(ASM_T code)
+{
+#ifdef CFG_ASM_BITWISE
+    return co_ctz(code);
+#else
+    return code;
+#endif
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+///@} ATM_BTFM_PASM
+
+
diff --git a/platform/atm2/ATM22xx-x1x/lib/atm_common/atm_co_bt_defines.h b/platform/atm2/ATM22xx-x1x/lib/atm_common/atm_co_bt_defines.h
new file mode 100644
index 0000000..63efc92
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/atm_common/atm_co_bt_defines.h
@@ -0,0 +1,25 @@
+/**
+ *******************************************************************************
+ *
+ * @file atm_co_bt_defines.h
+ *
+ * @brief ATM bluetooth framework common Bluetooth defines.
+ *
+ * Copyright (C) Atmosic 2021
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/**
+ *******************************************************************************
+ * @addtogroup ATM_CO_BT_DEFINES
+ * @brief ATM bluetooth framework common Bluetooth defines.
+ * @{
+ *******************************************************************************
+ */
+
+#define ATMOSIC_COMPANY_ID 0x240A
+
+/// @} ATM_CO_BT_DEFINES
diff --git a/platform/atm2/ATM22xx-x1x/lib/atm_common/atm_co_utils.h b/platform/atm2/ATM22xx-x1x/lib/atm_common/atm_co_utils.h
new file mode 100644
index 0000000..36dab62
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/atm_common/atm_co_utils.h
@@ -0,0 +1,89 @@
+/**
+ *******************************************************************************
+ *
+ * @file atm_co_utils.h
+ *
+ * @brief ATM bluetooth framework common utility functions
+ *
+ * Copyright (C) Atmosic 2020
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_CO_UTILS Common utilities
+ * @ingroup ATM_BTFM
+ * @brief ATM bluetooth framework common utility functions
+ *
+ * This module contains the common utilities functions and macros
+ * used by the bluetooth framework API.
+ *
+ * @{
+ *******************************************************************************
+ */
+
+#include "gap.h"
+#include "co_utils.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Macro to create a for-loop for a co_list
+#define FOR_CO_LIST(co_list, type, hdlr) \
+    for (type hdlr = (type)co_list_pick(&co_list); hdlr; \
+        hdlr = (type)co_list_next(&hdlr->hdr)) \
+
+/// Macro to create a for-loop for pop co_list FIFO
+#define FOR_CO_LIST_POP(co_list, type, hdlr) \
+    for (type hdlr = (type)co_list_pop_front(&co_list); hdlr; \
+	hdlr = (type)co_list_pop_front(&co_list)) \
+
+/// Redefine struct gap_bdaddr to gap_bdaddr_t
+typedef struct gap_bdaddr gap_bdaddr_t;
+
+/**
+ *******************************************************************************
+ * @brief Convert data type from bd_addr_t to struct bd_addr
+ * @param[in] addr address to convert
+ *
+ * @return addr pointer using struct bd_addr data type
+ *******************************************************************************
+ */
+__INLINE struct bd_addr const *atm_co_convert_bd_addr_type(bd_addr_t const *addr)
+{
+    return (struct bd_addr const *)addr;
+}
+
+__INLINE bool atm_co_gap_addr_compare(gap_bdaddr_t const *addr1,
+    gap_bdaddr_t const *addr2)
+{
+    return addr1 && addr2 && (addr1->addr_type == addr2->addr_type) &&
+	co_bdaddr_compare(atm_co_convert_bd_addr_type(&addr1->addr),
+	atm_co_convert_bd_addr_type(&addr2->addr));
+}
+/**
+ * @brief Covert 16 bits data endian.
+ */
+#define ATM_CO_BSWAP16(val16) (((val16 << 8) & 0xFF00) | ((val16 >> 8) & 0xFF))
+
+__INLINE int atm_co_popcount(uint32_t x)
+{
+#ifdef __GNUC__
+    return __builtin_popcount(x);
+#else
+    int i = 0;
+    for (; x; x &= x - 1) {
+	i++;
+    }
+    return i;
+#endif
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} ATM_CO_UTILS
diff --git a/platform/atm2/ATM22xx-x1x/lib/atm_common/atm_ke_utils.h b/platform/atm2/ATM22xx-x1x/lib/atm_common/atm_ke_utils.h
new file mode 100644
index 0000000..e316fed
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/atm_common/atm_ke_utils.h
@@ -0,0 +1,70 @@
+/**
+ *******************************************************************************
+ *
+ * @file atm_ke_utils.h
+ *
+ * @brief ATM bluetooth framework common utility functions
+ *
+ * Copyright (C) Atmosic 2020-2023
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @addtogroup ATM_CO_UTILS
+ * @brief ATM bluetooth framework common kernel functions
+ *
+ * This module contains the common kernel functions and macros
+ * used by the bluetooth framework API.
+ *
+ * @{
+ *******************************************************************************
+ */
+#include "rwip_config.h"
+#include "co_version.h"
+#include <string.h>
+#include "ke_mem.h"
+#include "ke_msg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ *******************************************************************************
+ * @brief Allocation of a block of memory and sets allocated memory to zero
+ * @param[in] nitems number of elements to be allocated.
+ * @param[in] size Size of the memory area that need to be allocated.
+ * @param[in] type Type of memory block
+ *
+ * @return A pointer to the allocated memory area.
+ *******************************************************************************
+ */
+__INLINE void *atm_ke_calloc(uint32_t nitems, uint32_t size, uint8_t type)
+{
+    return memset(ke_malloc(nitems * size, type), 0, nitems * size);
+}
+
+#if (RWBT_SW_VERSION_MAJOR < 11)
+#define ATM_KE_MSG_CALLOC(id, dest, src, param_str) \
+    KE_MSG_ALLOC(id, dest, src, param_str)
+
+#define ATM_KE_MSG_CALLOC_DYN(id, dest, src, param_str, length) \
+    KE_MSG_ALLOC_DYN(id, dest, src, param_str, length)
+#else // (RWBT_SW_VERSION_MAJOR < 11)
+#define ATM_KE_MSG_CALLOC(id, dest, src, param_str) \
+    (struct param_str *)memset(KE_MSG_ALLOC(id, dest, src, param_str), 0, \
+	sizeof(struct param_str))
+
+#define ATM_KE_MSG_CALLOC_DYN(id, dest, src, param_str, length) \
+    (struct param_str *)memset(KE_MSG_ALLOC_DYN(id, dest, src, param_str, \
+	length), 0, sizeof(struct param_str) + length)
+#endif // (RWBT_SW_VERSION_MAJOR < 11)
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} ATM_CO_UTILS
diff --git a/platform/atm2/ATM22xx-x1x/lib/atm_debug/atm_debug.h b/platform/atm2/ATM22xx-x1x/lib/atm_debug/atm_debug.h
new file mode 100644
index 0000000..452ef05
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/atm_debug/atm_debug.h
@@ -0,0 +1,238 @@
+/**
+ *******************************************************************************
+ *
+ * @file atm_debug.h
+ *
+ * @brief Atmosic debug utility
+ *
+ * Copyright (C) Atmosic 2020-2023
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_PDBG DEBUG utility
+ * @ingroup ATM_BTFM_PROC
+ * @brief ATM bluetooth framework debug utility
+ *
+ * This module contains the necessary function for debugging.
+ *
+ * @{
+ *******************************************************************************
+ */
+#include "arch.h"
+#include "atm_log.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * MACRO
+ *******************************************************************************
+ */
+
+#ifdef CFG_DBG
+#define ATM_DEBUG
+#endif
+
+/// All attribute off (@see ATM_VT_SGR)
+#define ATM_DE_COLOR 0
+/// Highlight Block color
+#define ATM_GG_BLACK 90
+/// Highlight Red color
+#define ATM_GG_RED 91
+/// Highlight Green color
+#define ATM_GG_GREEN 92
+/// Highlight Brown color
+#define ATM_GG_BROWN 93
+/// Highlight Grand foreground blue
+#define ATM_GG_BLUE 94
+/// Highlight Magenta color
+#define ATM_GG_MAGENTA 95
+/// Highlight Cyan color
+#define ATM_GG_CYAN 96
+/// Highlight White color
+#define ATM_GG_WHITE 97
+/// Background Block color
+#define ATM_BG_BLACK 40
+/// Background Red color
+#define ATM_BG_RED 41
+/// Background Green color
+#define ATM_BG_GREEN 42
+/// Background Brown color
+#define ATM_BG_BROWN 43
+/// Background Blue color
+#define ATM_BG_BLUE 44
+/// Background Magenta color
+#define ATM_BG_MAGENTA 45
+/// Background Cyan color
+#define ATM_BG_CYAN 46
+/// Background White color
+#define ATM_BG_WHITE 47
+/// Foreground Block color
+#define ATM_FG_BLACK 30
+/// Foreground Red color
+#define ATM_FG_RED 31
+/// Foreground Green color
+#define ATM_FG_GREEN 32
+/// Foreground Brown color
+#define ATM_FG_BROWN 33
+/// Foreground Blue color
+#define ATM_FG_BLUE 34
+/// Foreground Magenta color
+#define ATM_FG_MAGENTA 35
+/// Foreground Cyan color
+#define ATM_FG_CYAN 36
+/// Foreground White color
+#define ATM_FG_WHITE 37
+
+/// cursor position
+#define ATM_VT_CUP(x,y) "\x1b["#x";"#y"H"
+/// cursor  up
+#define ATM_VT_CUU(x) "\x1B["#x"A"
+/// cursor  down
+#define ATM_VT_CUD(x) "\x1B["#x"B"
+/// cursor  forward
+#define ATM_VT_CUF(x) "\x1B["#x"C"
+/// cursor  back
+#define ATM_VT_CUB(x) "\x1B["#x"D"
+/// device status report
+#define ATM_VT_DSR "\x1B[6n"
+/// save cursor position
+#define ATM_VT_SCP "\x1B[6s"
+/// restore cursor position
+#define ATM_VT_RSP "\x1B[6u"
+/// erase display and line
+#define ATM_VT_ED "\x1B[2J"
+#define ATM_VT_EL "\x1B[K"
+/// set graphic rendition
+#define ATM_VT_SGR "\x1B[%dm"
+/// set modes
+#define ATM_VT_SM "\x1B[=%dh"
+/// reset modes
+#define ATM_VT_RM "\x1B[=%dl"
+/// graphic rendition
+#define ATM_VT_GR(x) "\x1B["#x"m"
+/// set default
+#define ATM_VT_DE_COLOR "\x1B[0m"
+/// set FG Red color
+#define ATM_VT_FG_RED "\x1B[31m"
+/// set FG Green color
+#define ATM_VT_FG_GREEN "\x1B[32m"
+/// set FG CYAN color
+#define ATM_VT_FG_CYAN "\x1B[36m"
+/// set FG Blue color
+#define ATM_VT_FG_BLUE "\x1B[34m"
+/// set FG Brown color
+#define ATM_VT_FG_BROWN "\x1B[33m"
+/// set FG White color
+#define ATM_VT_FG_WHITE "\x1B[37m"
+/// set FG MAGENTA color
+#define ATM_VT_FG_MAGENTA "\x1B[35m"
+
+#define HEADER_COLOR(color, header, str) "\x1B[" STR(color) "m" header ATM_VT_DE_COLOR ": " str
+#define STR_COLOR(header, color, str) header ": " "\x1B[" STR(color) "m" str ATM_VT_DE_COLOR
+
+// flag of hex print
+typedef enum {
+    // all disabled
+    atm_debug_hp_none = 0,
+    // 16 columns output. If not set, output will be 8 columns.
+    atm_debug_hp_16col = (1 << 0),
+    // Additional ASCII output enable.
+    atm_debug_hp_ascii_en = (1 << 1),
+    // Indent enabled. 8 spaces.
+    atm_debug_hp_indent_en = (1 << 2),
+} atm_debug_hp_flag_t;
+
+/*
+ * GLOBAL
+ *******************************************************************************
+ */
+#if (KE_PROFILING)
+/**
+ *******************************************************************************
+ * @brief Get memory usage by memory type
+ * @param[in] mem_type memory type
+ * @return Used memory size
+ *******************************************************************************
+ */
+uint16_t atm_debug_mem_usage_by_type(enum KE_MEM_HEAP mem_type);
+#endif
+/**
+ *******************************************************************************
+ * @brief Get total memory size by memory type
+ * @param[in] mem_type memory type
+ * @return Total memory size value
+ *******************************************************************************
+ */
+uint16_t atm_debug_mem_total_by_type(enum KE_MEM_HEAP mem_type);
+
+#ifdef ATM_DEBUG
+/**
+ *******************************************************************************
+ * @brief Print string
+ * @param[in] header Header string array
+ * @param[in] str Content string array
+ *******************************************************************************
+ */
+#define atm_debug_normal(header, str, ...)\
+    DEBUG_TRACE(header ": " str, ##__VA_ARGS__)
+
+/**
+ *******************************************************************************
+ * @brief Print header string with color
+ * @param[in] color Color for header
+ * @param[in] header Header string array
+ * @param[in] str Content string format
+ *******************************************************************************
+ */
+#define atm_debug_header_color(color, header, str, ...)\
+    DEBUG_TRACE(HEADER_COLOR(color, header, str), ##__VA_ARGS__)
+
+/**
+ *******************************************************************************
+ * @brief Print string with color
+ * @param[in] color Color for str
+ * @param[in] header Header string array
+ * @param[in] str Content string array
+ *******************************************************************************
+ */
+#define atm_debug_str_color(header, color, str, ...)\
+    DEBUG_TRACE(STR_COLOR(header, color, str), ##__VA_ARGS__)
+
+/**
+ *******************************************************************************
+ * @brief Print memory usage
+ *******************************************************************************
+ */
+void atm_debug_print_memory_usage(void);
+
+/**
+ *******************************************************************************
+ * @brief Print hex output
+ * @param[in] flag Output type
+ * @param[in] data Data
+ * @param[in] len Data length
+ *******************************************************************************
+ */
+void atm_debug_hex_print(atm_debug_hp_flag_t flag, void const *data,
+    uint16_t len);
+
+#else
+#define atm_debug_normal(header, str, ...) DEBUG_TRACE_COND(0, header ": " str, ##__VA_ARGS__)
+#define atm_debug_header_color(color, header, str, ...) DEBUG_TRACE_COND(0, HEADER_COLOR(color, header, str), ##__VA_ARGS__)
+#define atm_debug_str_color(header, color, str, ...) DEBUG_TRACE_COND(0, STR_COLOR(header, color, str), ##__VA_ARGS__)
+#define atm_debug_print_memory_usage()
+#define atm_debug_hex_print(flag, data, len)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+///@} ATM_BTFM_PDBG
+
diff --git a/platform/atm2/ATM22xx-x1x/lib/atm_gap/atm_gap.h b/platform/atm2/ATM22xx-x1x/lib/atm_gap/atm_gap.h
new file mode 100644
index 0000000..1e03c04
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/atm_gap/atm_gap.h
@@ -0,0 +1,500 @@
+/**
+ *******************************************************************************
+ *
+ * @file atm_gap.h
+ *
+ * @brief Atmosic GAP procedure
+ *
+ * Copyright (C) Atmosic 2020-2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM Atmosic Framework
+ * @brief ATM bluetooth framework
+ *
+ * ATM bluetooth framework components.
+ *
+ * @defgroup ATM_BTFM_PROC Framework Procedure
+ * @ingroup ATM_BTFM
+ * @brief ATM bluetooth procedure
+ * Procedure layer which on top of API.
+ *
+ * @defgroup ATM_BTFM_API Framework Interface(API)
+ * @ingroup ATM_BTFM
+ * @brief ATM bluetooth API layer.
+ *
+ *******************************************************************************
+ */
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_GAP GAP procedures
+ * @ingroup ATM_BTFM_PROC
+ * @brief ATM bluetooth framework GAP procedures
+ *
+ * This module contains the necessary procedure to run the platform with the ATM
+ * bluetooth framework API.
+ *
+ * @{
+ *******************************************************************************
+ */
+
+#include "ble_gap.h"
+#include "gapc_task.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// constant parameter
+#ifndef CFG_GAP_PARAM_CONST
+#define CFG_GAP_PARAM_CONST 1
+#endif
+
+#if CFG_GAP_PARAM_CONST
+#define __ATM_GAP_PARAM_CONST const
+#else
+#define __ATM_GAP_PARAM_CONST
+#endif
+
+/// Invalid activity index
+#define ATM_INVALID_ACTIDX 0xFF
+
+/// Indicate that a connection has been established
+typedef ble_gap_ind_con_est_t atm_connect_info_t;
+
+/// Link states
+typedef enum {
+    /// Link is closed.
+    LINK_CLOSED,
+    /// Link is opened but not adopted yet.
+    LINK_CONNECTING,
+    /// Link is opened
+    LINK_CONNECTED,
+    /// Link is closing
+    LINK_CLOSING,
+} atm_link_state_t;
+
+/// GAP appearance.
+/// Sourced from: https://specificationrefs.bluetooth.com/assigned-values/
+/// Appearance Values.pdf
+typedef enum {
+    /// Generic Unknown
+    ATM_GAP_APPEARANCE_UNKNOWN = 0,
+    /// Generic Phone
+    ATM_GAP_APPEARANCE_GENERIC_PHONE = 64,
+    /// Generic Computer
+    ATM_GAP_APPEARANCE_GENERIC_COMPUTER = 128,
+    /// Generic Watch
+    ATM_GAP_APPEARANCE_GENERIC_WATCH = 192,
+    /// Sports Watch
+    ATM_GAP_APPEARANCE_WATCH_SPORTS_WATCH = 193,
+    /// Generic Clock
+    ATM_GAP_APPEARANCE_GENERIC_CLOCK = 256,
+    /// Generic Display
+    ATM_GAP_APPEARANCE_GENERIC_DISPLAY = 320,
+    /// Generic  Remote Control
+    ATM_GAP_APPEARANCE_GENERIC_REMOTE_CONTROL = 384,
+    /// Generic  Eye-glasses
+    ATM_GAP_APPEARANCE_GENERIC_EYE_GLASSES = 448,
+    /// Generic Tag
+    ATM_GAP_APPEARANCE_GENERIC_TAG = 512,
+    /// Generic Keyring
+    ATM_GAP_APPEARANCE_GENERIC_KEYRING = 576,
+    /// Generic Media Player
+    ATM_GAP_APPEARANCE_GENERIC_MEDIA_PLAYER = 640,
+    /// Generic Barcode Scanner
+    ATM_GAP_APPEARANCE_GENERIC_BARCODE_SCANNER = 704,
+    /// Generic Thermometer
+    ATM_GAP_APPEARANCE_GENERIC_THERMOMETER = 768,
+    /// Ear Thermometer
+    ATM_GAP_APPEARANCE_THERMOMETER_EAR = 769,
+    /// Generic Heart Rate Sensor
+    ATM_GAP_APPEARANCE_GENERIC_HEART_RATE_SENSOR = 832,
+    /// Heart Rate Belt
+    ATM_GAP_APPEARANCE_HEART_RATE_SENSOR_HEART_RATE_BELT = 833,
+    /// Generic Blood Pressure
+    ATM_GAP_APPEARANCE_GENERIC_BLOOD_PRESSURE = 896,
+    /// Arm Blood Pressure
+    ATM_GAP_APPEARANCE_BLOOD_PRESSURE_ARM = 897,
+    /// Wrist Blood Pressure
+    ATM_GAP_APPEARANCE_BLOOD_PRESSURE_WRIST = 898,
+    /// Generic Human Interface Device
+    ATM_GAP_APPEARANCE_HUMAN_INTERFACE_DEVICE = 960,
+    /// Keyboard
+    ATM_GAP_APPEARANCE_KEYBOARD = 961,
+    /// Mouse
+    ATM_GAP_APPEARANCE_MOUSE = 962,
+    /// Joystick
+    ATM_GAP_APPEARANCE_JOYSTICK = 963,
+    /// Gamepad
+    ATM_GAP_APPEARANCE_GAMEPAD = 964,
+    /// Digitizer Tablet
+    ATM_GAP_APPEARANCE_DIGITIZER_TABLET = 965,
+    /// Card Reader
+    ATM_GAP_APPEARANCE_CARD_READER = 966,
+    /// Digital Pen
+    ATM_GAP_APPEARANCE_DIGITAL_PEN = 967,
+    /// Barcode Scanner
+    ATM_GAP_APPEARANCE_BARCODE_SCANNER = 968,
+    /// Generic Glucose Meter
+    ATM_GAP_APPEARANCE_GENERIC_GLUCOSE_METER = 1024,
+    /// Generic Running Walking Sensor
+    ATM_GAP_APPEARANCE_GENERIC_RUNNING_WALKING_SENSOR = 1088,
+    /// In-Shoe Running Walking Sensor
+    ATM_GAP_APPEARANCE_RUNNING_WALKING_SENSOR_IN_SHOE = 1089,
+    /// On-Shoe Running Walking Sensor
+    ATM_GAP_APPEARANCE_RUNNING_WALKING_SENSOR_ON_SHOE = 1090,
+    /// On-Hip Running Walking Sensor
+    ATM_GAP_APPEARANCE_RUNNING_WALKING_SENSOR_ON_HIP = 1091,
+    /// Generic Cycling
+    ATM_GAP_APPEARANCE_GENERIC_CYCLING = 1152,
+    /// Cycling Computer
+    ATM_GAP_APPEARANCE_CYCLING_CYCLING_COMPUTER = 1153,
+    /// Speed Sensor
+    ATM_GAP_APPEARANCE_CYCLING_SPEED_SENSOR = 1154,
+    /// Cadence Sensor
+    ATM_GAP_APPEARANCE_CYCLING_CADENCE_SENSOR = 1155,
+    /// Power Sensor
+    ATM_GAP_APPEARANCE_CYCLING_POWER_SENSOR = 1156,
+    /// Speed and Cadence Sensor
+    ATM_GAP_APPEARANCE_CYCLING_SPEED_AND_CADENCE_SENSOR = 1157,
+    /// Generic Pulse Oximeter
+    ATM_GAP_APPEARANCE_GENERIC_PULSE_OXIMETER = 3136,
+    /// Fingertip Pulse Oximeter
+    ATM_GAP_APPEARANCE_FINGERTIP = 3137,
+    /// Wrist Worn Pulse Oximeter
+    ATM_GAP_APPEARANCE_WRIST_WORN = 3138,
+    /// Generic Weight Scale
+    ATM_GAP_APPEARANCE_GENERIC_WEIGHT_SCALE = 3200,
+    /// Generic Personal Mobility Device
+    ATM_GAP_APPEARANCE_GENERIC_PERSONAL_MOBILITY_DEVICE = 3264,
+    /// Powered Wheelchair
+    ATM_GAP_APPEARANCE_POWERED_WHEELCHAIR = 3265,
+    /// Mobility Scooter
+    ATM_GAP_APPEARANCE_MOBILITY_SCOOTER = 3266,
+    /// Generic Continuous Glucose Monitor
+    ATM_GAP_APPEARANCE_GENERIC_CONTINUOUS_GLUCOSE_MONITOR = 3328,
+    /// Generic Insulin Pump
+    ATM_GAP_APPEARANCE_GENERIC_INSULIN_PUMP = 3392,
+    /// nsulin Pump, durable pump
+    ATM_GAP_APPEARANCE_INSULIN_PUMP_DURABLE_PUMP = 3393,
+    /// Insulin Pump, patch pump
+    ATM_GAP_APPEARANCE_INSULIN_PUMP_PATCH_PUMP = 3396,
+    /// Insulin Pen
+    ATM_GAP_APPEARANCE_INSULIN_PEN = 3400,
+    /// Generic Medication Delivery
+    ATM_GAP_APPEARANCE_GENERIC_MEDICATION_DELIVERY = 3456,
+    /// Generic Outdoor Sports Activity
+    ATM_GAP_APPEARANCE_GENERIC_OUTDOOR_SPORTS_ACTIVITY = 5184,
+    /// Location Display
+    ATM_GAP_APPEARANCE_LOCATION_DISPLAY_DEVICE = 5185,
+    /// Location and Navigation Display
+    ATM_GAP_APPEARANCE_LOCATION_AND_NAVIGATION_DISPLAY_DEVICE = 5186,
+    /// Location Pod
+    ATM_GAP_APPEARANCE_LOCATION_POD = 5187,
+    /// Location and Navigation Pod
+    ATM_GAP_APPEARANCE_LOCATION_AND_NAVIGATION_POD = 5188
+} atm_gap_appearance_t;
+
+/// ATM command complete callback prototype
+/// @param[in] conidx Connection index.
+/// @param[in] status Command status.
+typedef void (*atm_gap_cmd_cb)(uint8_t conidx, ble_err_code_t status);
+
+/// GAP initialization parameters
+typedef struct {
+    /// Device name string array. If NVDS exist, it will be overwritten.
+    uint8_t __ATM_GAP_PARAM_CONST *dev_name;
+    /// Length of dev_name.
+    uint8_t dev_name_len;
+    /// Device name array size.
+    uint8_t dev_name_max;
+    /// Device Appearance Icon
+    atm_gap_appearance_t appearance;
+    /// Slave preferred connection parameters
+    ble_gap_periph_pref_t periph_pref_params;
+    /// IRK assignment from application. Null if not used.
+    uint8_t const *app_irk;
+    /// Set device configuration
+    ble_gap_set_dev_config_t __ATM_GAP_PARAM_CONST *dev_config;
+    /// Own static random address
+    ble_bdaddr_t addr;
+} atm_gap_param_t;
+
+/// GAP application callbacks
+typedef struct {
+    /// Advertising report indication.
+    /// @param[in] ind Report information.
+    void (*ext_adv_ind)(ble_gap_ind_ext_adv_report_t const *ind);
+    /// Connection indication
+    /// @brief This function will be called after ACL connected.
+    /// Application should call @ref atm_gap_connect_accept or
+    /// @ref atm_gap_disconnect.
+    /// @param[in] conidx Connection index.
+    /// @param[in] param Connection parameters.
+    void (*conn_ind)(uint8_t conidx, atm_connect_info_t *param);
+    /// Disconnection indication
+    /// @brief This function will be called after ACL disconnected.
+    /// @param[in] conidx Connection index.
+    /// @param[in] param Disconnection information.
+    void (*disc_ind)(uint8_t conidx, ble_gap_ind_discon_t const *param);
+    /// Pairing request indication
+    /// @brief Pairing information request by pairing procedure.
+    /// After receiving this, application should call
+    /// @ref ble_gap_sec_pairing_rsp.
+    /// @param[in] conidx Connection index.
+    /// @param[in] auth_req Authentication request.
+    void (*pair_req_ind)(uint8_t conidx, enum gap_auth auth_req);
+    /// Security request indication
+    /// @brief Security request by slave.
+    /// @param[in] conidx Connection index.
+    /// @param[in] auth_req Authentication request.
+    void (*sec_req_ind)(uint8_t conidx, enum gap_auth auth_req);
+    /// Passkey indication
+    /// @brief Indication of passkey display or passkey input
+    /// After received this indication, application shall show number to user
+    /// (GAP_TK_DISPLAY)
+    /// or get input(GAP_TK_KEY_ENTRY) from user and call
+    /// @ref ble_gap_sec_passkey_rsp.
+    /// @param[in] type Decide display(GAP_TK_DISPLAY) or
+    /// input(GAP_TK_KEY_ENTRY, GAP_TK_KEY_OOB)
+    /// @param[in] conidx Connection index.
+    /// @param[in] passkey Random number generated by lower layer. It is used
+    /// when type is @ref GAP_TK_DISPLAY.
+    /// Application must show it to user and pass it as argument of
+    /// ble_gap_sec_passkey_rsp. If application want
+    /// to display with other number, then argument to ble_gap_sec_passkey_rsp
+    /// have to change as well.
+    void (*pair_passkey_ind)(enum gap_tk_type type, uint8_t conidx,
+	uint32_t passkey);
+    /// Numeric comparison indication
+    /// @brief Indication of numeric comparison received.
+    /// @param[in] conidx Connection index.
+    /// @param[in] number Number generated between pairing. This shall be
+    /// shown to user.
+    void (*pair_numeric_ind)(uint8_t conidx, uint32_t number);
+    /// Pairing result indication
+    /// @brief This function will be called after pairing finished.
+    /// @param[in] conidx Connection index.
+    /// @param[in] param Bonding information.
+    /// @note Link is encrypted when pairing is success.
+    void (*pair_ind)(uint8_t conidx, ble_gap_ind_le_pair_end_t const *param);
+    /// Connection parameter updated indication
+    /// @brief This function will be called when connection parameter changed
+    /// @param[in] conidx Connection index.
+    void (*conn_param_updated_ind)(uint8_t conidx);
+    /// Initialization confirmation.
+    /// @brief This function will be called when @ref atm_gap_start finished.
+    /// @param[in] status Status for @ref atm_gap_start.
+    void (*init_cfm)(ble_err_code_t status);
+    /// PHY update indication.
+    /// @brief This function will be called after PHY update.
+    /// @param[in] conidx Connection index.
+    /// @param[in] param PHY update information.
+    void (*phy_ind)(uint8_t conidx, ble_gap_le_phy_t const *param);
+    /// Encryption indication
+    /// @brief This function will be called after link encrypted.
+    /// It is invoked during reconnection if encryption is enabled.
+    /// @param[in] conidx Connection task index.
+    /// @param[in] param Encryption information.
+    /// @note This will not be called when link is enctyped at the time of
+    /// pairing.
+    void (*enc_ind)(uint8_t conidx, ble_gap_ind_encrypt_t const *param);
+    /// Link information indication
+    /// @brief This function will be called after @ref atm_gap_get_link_info
+    /// execution finished or information had been updated.
+    /// @param[in] status Information status.
+    /// @param[in] param Information data.
+    void (*linfo_ind)(ble_err_code_t status, ble_gap_link_info_t const *param);
+    /// Periodic sync established indication.
+    /// @param[in] ind sync established information.
+    void (*sync_est_ind)(struct gapm_sync_established_ind const *ind);
+    /// LE Set Data Length Indication
+    /// @param[in] conidx Connection index.
+    /// @param[in] ind Size of LE data packets negotiated over BLE Link.
+    void (*le_pkt_size_ind)(uint8_t conidx, ble_gap_ind_pkt_size_t const *ind);
+} atm_gap_cbs_t;
+
+/// Parameter for connection parameter update process
+typedef struct {
+    /// Confirmation of connection parameter update process
+    /// @param[in] conidx Connection index.
+    /// @param[in] status Status of result.
+    void (*param_nego_cfm)(uint8_t conidx, ble_err_code_t status);
+    /// force retry retry_times no master error happen
+    bool force_retry;
+    /// Max retries for connection parameter update.
+    uint8_t retry_times;
+    /// Time(centisec) for checking the parameter result.
+    uint16_t check_result;
+    /// Time(centisec) for delay start after calling atm_gap_connect_param_nego.
+    /// @note this setting could prevent chance of the LLCP collision
+    uint16_t delay;
+    /// Preferred connection parameter.
+    ble_gap_conn_param_t const *target;
+} atm_gap_param_nego_t;
+
+/// Parameter for setting PHY.
+typedef struct {
+    /// Callback of setting PHY.
+    atm_gap_cmd_cb cb;
+    /// TX PHYs.
+    ble_gap_phy_mode_t tx_phy;
+    /// RX PHYs.
+    ble_gap_phy_mode_t rx_phy;
+    /// PHY_Options.
+    ble_gap_phy_opt_t phy_opt;
+} atm_gap_param_set_phy_t;
+/*
+ * GLOBAL FUNCTION
+ * *****************************************************************************
+ */
+
+/**
+ *******************************************************************************
+ * @brief Register profile
+ * @param[in] name String of profile identification.
+ * @param[in] parm Configured parameter of profile
+ *******************************************************************************
+ */
+__NONNULL(1)
+void atm_gap_prf_reg(char const *name, void const *parm);
+
+/**
+ *******************************************************************************
+ * @brief Initialization BT system
+ * @param[in] init Parameter for initialization.
+ * @param[in] cbs Callbacks of application.
+ *******************************************************************************
+ */
+__NONNULL_ALL
+void atm_gap_start(atm_gap_param_t __ATM_GAP_PARAM_CONST *init, atm_gap_cbs_t const *cbs);
+
+/**
+ *******************************************************************************
+ * @brief Get local name
+ * @param[out] len Length of name.
+ * @return Local name string.
+ *******************************************************************************
+ */
+__NONNULL_ALL
+uint8_t __ATM_GAP_PARAM_CONST *atm_gap_get_local_name(uint8_t *len);
+
+/**
+ *******************************************************************************
+ * @brief Accept incoming connection.
+ * @param[in] conidx Connection index
+ *******************************************************************************
+ */
+void atm_gap_connect_accept(uint8_t conidx);
+
+/**
+ *******************************************************************************
+ * @brief Get connection parameters
+ * @param[in] conidx Connection index.
+ * @return Connection parameter information.
+ *******************************************************************************
+ */
+atm_connect_info_t *atm_gap_get_connect_info(uint8_t conidx);
+
+/**
+ *******************************************************************************
+ * @brief Get link state
+ * @param[in] conidx Connection index.
+ * @return Link state information.
+ *******************************************************************************
+ */
+atm_link_state_t atm_gap_get_connect_state(uint8_t conidx);
+
+/**
+ *******************************************************************************
+ * @brief Launch process of requesting new connection parameter
+ * @param[in] conidx Connection index.
+ * @param[in] param Parameter for process.
+ * @return True if it is allowed. Otherwise means an existing operation
+ * kis ongoing.
+ *******************************************************************************
+ */
+__NONNULL(2)
+bool atm_gap_connect_param_nego(uint8_t conidx, atm_gap_param_nego_t const *param);
+
+/**
+ *******************************************************************************
+ * @brief Disconnect the link
+ * @param[in] conidx Connection index.
+ * @param[in] reason Reason for disconnection. Only allow error code of
+ * BLE_HCI_MODULE.
+ *******************************************************************************
+ */
+void atm_gap_disconnect(uint8_t conidx, ble_err_code_t reason);
+
+/**
+ *******************************************************************************
+ * @brief Disconnect all links
+ *******************************************************************************
+ */
+void atm_gap_disconnect_all(void);
+
+/**
+ *******************************************************************************
+ * @brief Set LE phy. mode
+ * @param[in] conidx Connection index.
+ * @param[in] param Parameter for setting.
+ *******************************************************************************
+ */
+__NONNULL(2)
+void atm_gap_set_phy(uint8_t conidx, atm_gap_param_set_phy_t const *param);
+
+/**
+ *******************************************************************************
+ * @brief Get link information from peer
+ * @param[in] conidx Connection index.
+ * @param[in] type Information to get.
+ *******************************************************************************
+ */
+void atm_gap_get_link_info(uint8_t conidx, ble_gap_link_info_type_t type);
+
+/**
+ *******************************************************************************
+ * @brief Generate random address
+ * @param[in] addr_type Random address type
+ *******************************************************************************
+ */
+void atm_gap_gen_rand_addr(ble_gapm_rand_addr_type_t addr_type);
+
+/**
+ *******************************************************************************
+ * @brief Lower slave latency locally
+ * @param[in] conidx Connection index.
+ * @param[in] latency Target local latency. (in number of connection events)
+ *******************************************************************************
+ */
+void atm_gap_lower_slave_latency_locally(uint8_t conidx, uint16_t latency);
+
+/**
+ *******************************************************************************
+ * @brief Get random address
+ * @return Rand address
+ *******************************************************************************
+ */
+ble_bdaddr_t __ATM_GAP_PARAM_CONST *atm_gap_get_rand_addr(void);
+
+/**
+ *******************************************************************************
+ * @brief Print connection parameter
+ * @param[in] info Connection parameter information
+ *******************************************************************************
+ */
+__NONNULL_ALL
+void atm_gap_print_conn_param(atm_connect_info_t *info);
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} ATM_BTFM_GAP
diff --git a/platform/atm2/ATM22xx-x1x/lib/atm_gap/atm_gap_param.h b/platform/atm2/ATM22xx-x1x/lib/atm_gap/atm_gap_param.h
new file mode 100644
index 0000000..b811124
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/atm_gap/atm_gap_param.h
@@ -0,0 +1,75 @@
+/**
+ *******************************************************************************
+ *
+ * @file atm_gap_param.h
+ *
+ * @brief Header file - ATM bluetooth framework GAP parameters
+ *
+ * Copyright (C) Atmosic 2020-2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+#include "atm_log.h"
+#include "atm_gap.h"
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_GAPP GAP parameters
+ * @ingroup ATM_BTFM_PROC
+ * @brief ATM bluetooth framework GAP parameters
+ *
+ * This module contains the necessary function to provide predefined parameters
+ * for usage of
+ * @ref atm_gap_start.
+ *
+ * @{
+ *******************************************************************************
+ */
+
+// overwritten by application
+#ifdef GAP_PARM_NAME
+#include STR(GAP_PARM_NAME)
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef CFG_GAP_MAX_LINKS
+#define CFG_GAP_MAX_LINKS 1
+#endif
+
+// Max no. of LECB connections
+#ifndef CFG_GAP_MAX_LECB
+#define CFG_GAP_MAX_LECB 1
+#endif
+
+#ifndef CFG_GAP_TEST_TX_PWR_LVL
+#define CFG_GAP_TEST_TX_PWR_LVL BLE_GAP_MAX_TEST_TX_PWR_LVL
+#endif
+
+// Minimum length of connection event in 0.625 ms
+#ifndef CFG_GAP_PARAM_UPDATE_CE_MIN
+#define CFG_GAP_PARAM_UPDATE_CE_MIN 0
+#endif
+
+// Maximum length of connection event in 0.625 ms
+#ifndef CFG_GAP_PARAM_UPDATE_CE_MAX
+#define CFG_GAP_PARAM_UPDATE_CE_MAX 0
+#endif
+
+/**
+ *******************************************************************************
+ * @brief Get persistent GAP start parameter.
+ * @return Pointer of GAP start parameter
+ *******************************************************************************
+ */
+__ATM_GAP_PARAM_CONST atm_gap_param_t *atm_gap_param_get(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} ATM_BTFM_GAPP
diff --git a/platform/atm2/ATM22xx-x1x/lib/atm_gap/atm_gap_param_internal.h b/platform/atm2/ATM22xx-x1x/lib/atm_gap/atm_gap_param_internal.h
new file mode 100644
index 0000000..3e4bf04
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/atm_gap/atm_gap_param_internal.h
@@ -0,0 +1,123 @@
+/**
+ *******************************************************************************
+ *
+ * @file atm_gap_param_internal.h
+ *
+ * @brief Header file - ATM bluetooth framework internal GAP parameters
+ *
+ * Copyright (C) Atmosic 2020-2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+#include "gapc_task.h"
+#include "gapm.h"
+#include "atm_gap.h"
+#include "atm_gap_param.h"
+#include "l2cc_pdu.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// -------------- GAP Basic Configure -----------------------
+
+/// device name setting
+#ifndef CFG_GAP_DEV_NAME
+#define CFG_GAP_DEV_NAME "Atmosic BT"
+#endif
+#ifndef CFG_GAP_DNAME_MAX_LEN
+#define CFG_GAP_DNAME_MAX_LEN 18
+#endif
+#ifndef CFG_GAP_APP_IRK
+#define CFG_GAP_APP_IRK NULL
+#endif
+/// Central, Peripheral, Observer, Broadcaster or All roles. (@see enum gap_role)
+#ifndef CFG_GAP_ROLE
+#define CFG_GAP_ROLE BLE_GAP_ROLE_PERIPHERAL
+#endif
+/// Appearance Icon
+#ifndef CFG_GAP_APPEARANCE
+// (@see atm_gap_appearance_t)
+#define CFG_GAP_APPEARANCE ATM_GAP_APPEARANCE_UNKNOWN
+#endif
+#ifndef CFG_GAP_CONN_INT_MIN
+#define CFG_GAP_CONN_INT_MIN 9 // in 1.25 ms
+#endif
+#ifndef CFG_GAP_CONN_INT_MAX
+#define CFG_GAP_CONN_INT_MAX 9 // in 1.25 ms
+#endif
+#ifndef CFG_GAP_PERIPH_LATENCY
+#define CFG_GAP_PERIPH_LATENCY 29 // in number of connection events
+#endif
+#ifndef CFG_GAP_CONN_TIMEOUT
+#define CFG_GAP_CONN_TIMEOUT 500 // in unit of 10ms. Range: 100ms - 32s
+#endif
+
+// -------------- Privacy Config -----------------------
+#ifndef CFG_RENEW_DURATION
+#define CFG_RENEW_DURATION RPA_TO_DFT
+#endif
+
+#ifndef CFG_GAP_PRIVACY_CFG
+#define CFG_GAP_PRIVACY_CFG 0
+#endif
+// -------------- Security Config -----------------------
+/// Pairing mode authorized (@see enum gapm_pairing_mode)
+#ifndef CFG_GAP_PAIRING_MODE
+#define CFG_GAP_PAIRING_MODE BLE_GAP_PAIRING_LEGACY
+#endif
+
+// -------------- LE Data Length Extension --------------
+#ifndef CFG_GAP_MAX_TX_OCTETS
+#define CFG_GAP_MAX_TX_OCTETS BLE_MAX_OCTETS
+#endif
+#ifndef CFG_GAP_MAX_TX_TIME
+#define CFG_GAP_MAX_TX_TIME LE_MAX_TIME
+#endif
+
+// --------------- L2CAP Configuration ------------------
+#ifndef CFG_GAP_MAX_LL_MTU
+#define CFG_GAP_MAX_LL_MTU 160
+#endif
+#ifndef CFG_GAP_MAX_LL_MPS
+#define CFG_GAP_MAX_LL_MPS L2C_MIN_LE_MTUSIG
+#endif
+
+// -------------- ATT Database Configure ----------------
+/// Attribute database configuration (@see enum gapm_att_cfg_flag)
+#ifndef CFG_GAP_ATT_CFG
+#define CFG_GAP_ATT_CFG 0
+#endif
+
+// --------Application assign static random address ------
+// CFG_GAP_OWN_STATIC_RANDOM_ADDR5 must follow the spec. that
+// bit 6 and bit 7 must be 1
+#ifndef CFG_GAP_OWN_STATIC_RANDOM_ADDR5
+#define CFG_GAP_OWN_STATIC_RANDOM_ADDR5 0x00
+#endif
+
+#ifndef CFG_GAP_OWN_STATIC_RANDOM_ADDR4
+#define CFG_GAP_OWN_STATIC_RANDOM_ADDR4 0x00
+#endif
+
+#ifndef CFG_GAP_OWN_STATIC_RANDOM_ADDR3
+#define CFG_GAP_OWN_STATIC_RANDOM_ADDR3 0x00
+#endif
+
+#ifndef CFG_GAP_OWN_STATIC_RANDOM_ADDR2
+#define CFG_GAP_OWN_STATIC_RANDOM_ADDR2 0x00
+#endif
+
+#ifndef CFG_GAP_OWN_STATIC_RANDOM_ADDR1
+#define CFG_GAP_OWN_STATIC_RANDOM_ADDR1 0x00
+#endif
+
+#ifndef CFG_GAP_OWN_STATIC_RANDOM_ADDR0
+#define CFG_GAP_OWN_STATIC_RANDOM_ADDR0 0x00
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/platform/atm2/ATM22xx-x1x/lib/atm_log/atm_log.h b/platform/atm2/ATM22xx-x1x/lib/atm_log/atm_log.h
new file mode 100644
index 0000000..eb541e0
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/atm_log/atm_log.h
@@ -0,0 +1,166 @@
+/**
+ *******************************************************************************
+ *
+ * @file atm_log.h
+ *
+ * @brief Atmosic Log Facility
+ *
+ * Copyright (C) Atmosic 2020
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_LOG LOG utility
+ * @ingroup ATM_BTFM_PROC
+ * @brief ATM bluetooth framework log utility
+ *
+ * This module contains the macro for log.
+ *
+ * @{
+ *******************************************************************************
+ */
+
+/*
+ * INCLUDES
+ * *****************************************************************************
+ */
+#include "arch.h"
+
+#ifdef RTT_DBG
+#include "SEGGER_RTT.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * MACRO
+ *******************************************************************************
+ */
+
+/// string
+#define D_(d) #d
+#define STR(d) D_(d)
+
+/// set default
+#define ATM_LOG_DECOLOR "\x1B[0m"
+/// set GG Red color
+#define ATM_LOG_GRED "\x1B[91m"
+/// set GG Green color
+#define ATM_LOG_GGREEN "\x1B[92m"
+/// set GG CYAN color
+#define ATM_LOG_GCYAN "\x1B[96m"
+/// set GG Blue color
+#define ATM_LOG_GGBLUE "\x1B[94m"
+/// set GG Brown color
+#define ATM_LOG_GBROWN "\x1B[93m"
+/// set GG White color
+#define ATM_LOG_GWHITE "\x1B[97m"
+/// set GG MAGENTA color
+#define ATM_LOG_GMAGENTA "\x1B[95m"
+/// set FG Red color
+#define ATM_LOG_FRED "\x1B[31m"
+/// set FG Green color
+#define ATM_LOG_FGREEN "\x1B[32m"
+/// set FG CYAN color
+#define ATM_LOG_FCYAN "\x1B[36m"
+/// set FG Blue color
+#define ATM_LOG_FBLUE "\x1B[34m"
+/// set FG Brown color
+#define ATM_LOG_FBROWN "\x1B[33m"
+/// set FG White color
+#define ATM_LOG_FWHITE "\x1B[37m"
+/// set FG MAGENTA color
+#define ATM_LOG_FMAGENTA "\x1B[35m"
+
+/// LOG ERROR mask
+#define ATM_LOG_E_MASK ((1 << 1) - 1)
+/// LOG WARNING mask
+#define ATM_LOG_W_MASK ((1 << 2) - 1)
+/// LOG DEBUG mask
+#define ATM_LOG_D_MASK ((1 << 3) - 1)
+/// LOG NOTIFY mask
+#define ATM_LOG_N_MASK ((1 << 4) - 1)
+/// LOG VERBOSE mask
+#define ATM_LOG_V_MASK ((1 << 5) - 1)
+
+#ifdef RTT_DBG
+/// LOG ERROR color
+#define ATM_LOG_E_C RTT_CTRL_TEXT_BRIGHT_RED
+/// LOG WARNING color
+#define ATM_LOG_W_C RTT_CTRL_TEXT_BRIGHT_MAGENTA
+/// LOG NOTIFY color
+#define ATM_LOG_N_C RTT_CTRL_TEXT_BRIGHT_BLUE
+/// LOG DEBUG color
+#define ATM_LOG_D_C RTT_CTRL_TEXT_BRIGHT_GREEN
+/// LOG VERBOSE color
+#define ATM_LOG_V_C RTT_CTRL_TEXT_BRIGHT_WHITE
+#else
+/// LOG ERROR color
+#define ATM_LOG_E_C ATM_LOG_GRED
+/// LOG WARNING color
+#define ATM_LOG_W_C ATM_LOG_GMAGENTA
+/// LOG NOTIFY color
+#define ATM_LOG_N_C ATM_LOG_GGBLUE
+/// LOG DEBUG color
+#define ATM_LOG_D_C ATM_LOG_GGREEN
+/// LOG VERBOSE color
+#define ATM_LOG_V_C ATM_LOG_GWHITE
+#endif
+
+/// Global debug log level
+/// @note user could use -DATMLOG_GLOBAL_LEVEL=\<lvl\> to disable log below the
+/// \<lvl\>. The \<lvl\> would be ATM_LOG_[E|W|N|D|V]_MASK.
+#ifndef ATM_LOG_GLOBAL_LEVEL
+#define ATM_LOG_GLOBAL_LEVEL ATM_LOG_V_MASK
+#endif
+
+#if PLF_DEBUG
+/// Module debug log setting
+#define ATM_LOG_LOCAL_SETTING(name, level)\
+static const char M_NAME[] = {name};\
+static const uint32_t M_MASK = ATM_LOG_ ## level ## _MASK
+
+/// Module debug log setting dynamic level
+#define ATM_LOG_LOCAL_SETTING_DYN_LV(name, level)\
+static char M_NAME[] = {name};\
+static uint32_t M_MASK = ATM_LOG_ ## level ## _MASK
+
+/// Module debug log
+/// @note The module name(M_NAME) and module mask(M_MASK) needs to be defined
+/// in source file. For example, #define M_NAME "adv". #define M_MASK V
+#define ATM_LOG(MSK, fmt, ...) do {\
+    if ((M_MASK & ATM_LOG_ ## MSK ## _MASK & ATM_LOG_GLOBAL_LEVEL) == \
+	ATM_LOG_ ## MSK ## _MASK) {\
+	DEBUG_TRACE("[%10.10s][" ATM_LOG_ ## MSK ## _C #MSK ATM_LOG_DECOLOR "]: " fmt ,\
+	M_NAME,  ##__VA_ARGS__);\
+    }} while(false)
+#else
+#define ATM_LOG_LOCAL_SETTING(name, level)
+#define ATM_LOG_LOCAL_SETTING_DYN_LV(name, level)
+#define ATM_LOG(MSK, fmt, ...) do {\
+    DEBUG_TRACE_COND(0, fmt,  ##__VA_ARGS__);\
+} while (false)
+#endif //PLF_DEBUG
+
+#ifdef AUTO_TEST
+/// Negative unit test
+#define ATM_LOG_NEGUT(fmt, ...) do { \
+    DEBUG_TRACE("[NEGUT]: " fmt, ##__VA_ARGS__); \
+} while (0)
+#else
+#define ATM_LOG_NEGUT(fmt, ...) do {\
+    DEBUG_TRACE_COND(0, fmt,  ##__VA_ARGS__);\
+} while (0)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+///@} ATM_BTFM_LOG
+
diff --git a/platform/atm2/ATM22xx-x1x/lib/atm_prfs/atm_prfs.h b/platform/atm2/ATM22xx-x1x/lib/atm_prfs/atm_prfs.h
new file mode 100644
index 0000000..1174519
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/atm_prfs/atm_prfs.h
@@ -0,0 +1,59 @@
+/**
+ *******************************************************************************
+ *
+ * @file atm_prfs.h
+ *
+ * @brief Atmosic Profile Server
+ *
+ * Copyright (C) Atmosic 2020
+ *
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+********************************************************************************
+ * @addtogroup ATM_PRFS Atmosic Profile Server
+ * @ingroup ATM_PRF
+ * @brief Atmosic Profile Server
+ * @{
+********************************************************************************
+ */
+
+/*
+ * INCLUDE FILE
+ *******************************************************************************
+ */
+#include "prf.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Max number of server task instances
+#define ATM_PRFS_IDX_MAX (1)
+
+///The atm_prfs environment variable
+struct atm_prfs_env_tag {
+    /// Profile environment
+    prf_env_t prf_env;
+    /// Extra context
+    void const *ctx;
+};
+
+/**
+ *******************************************************************************
+ * @brief Retrieve Atmosic profile interface
+ *
+ * @return Atmosic profile interface
+ *******************************************************************************
+ */
+const struct prf_task_cbs *atm_prfs_itf_get(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} ATM_PRFS
+
diff --git a/platform/atm2/ATM22xx-x1x/lib/atm_prfs/atm_prfs_task.h b/platform/atm2/ATM22xx-x1x/lib/atm_prfs/atm_prfs_task.h
new file mode 100644
index 0000000..b2ee146
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/atm_prfs/atm_prfs_task.h
@@ -0,0 +1,79 @@
+/**
+ *******************************************************************************
+ *
+ * @file atm_prfs_task.h
+ *
+ * @brief Atmosic Profile Server Task
+ *
+ * Copyright (C) Atmosic 2020
+ *
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+********************************************************************************
+ * @addtogroup ATM_PRFSTASK Atmosic Profile Server Task
+ * @ingroup ATM_PRFS
+ * @brief Atmosic Profile Server Task
+ * @{
+********************************************************************************
+ */
+
+/*
+ * INCLUDE FILES
+ *******************************************************************************
+ */
+#include "ke_task.h"
+#include "gattc_task.h"
+#include "atm_prfs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * TYPE DEFINITIONS
+ *******************************************************************************
+ */
+/// Messages for Atmosic profile server (atm_prfs)
+enum atm_prfs_msg_id {
+    /// Redirect the GATTC_ATT_INFO_REQ_IND message to upper layer
+    ATM_PRFS_GATTC_ATT_INFO_REQ_IND =
+	TASK_BUILD(TASK_TYPE_GET(GATTC_ATT_INFO_REQ_IND), TASK_ID_ATMPRFS),
+    /// Redirect the GATTC_WRITE_REQ_IND message to upper layer
+    ATM_PRFS_GATTC_WRITE_REQ_IND =
+	TASK_BUILD(TASK_TYPE_GET(GATTC_WRITE_REQ_IND), TASK_ID_ATMPRFS),
+    /// Redirect the GATTC_READ_REQ_IND message to upper layer
+    ATM_PRFS_GATTC_READ_REQ_IND =
+	TASK_BUILD(TASK_TYPE_GET(GATTC_READ_REQ_IND), TASK_ID_ATMPRFS),
+    /// Redirect the GATTC_CMP_EVT message to upper layer
+    ATM_PRFS_GATTC_CMP_EVT =
+	TASK_BUILD(TASK_TYPE_GET(GATTC_CMP_EVT), TASK_ID_ATMPRFS),
+};
+
+/**
+ *******************************************************************************
+ * @brief Initialize atm_prfs task handlers
+ *
+ * @param[out] task_desc Task descriptor to fill
+ *******************************************************************************
+ */
+void atm_prfs_task_init(struct ke_task_desc *task_desc);
+
+/**
+ *******************************************************************************
+ * @brief Retrieve profile task after profile creating
+ *
+ * @return registed profile task
+ *******************************************************************************
+ */
+uint16_t atm_prfs_get_profile_task(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} ATM_PRFSTASK
+
diff --git a/platform/atm2/ATM22xx-x1x/lib/ble_atmprfs/ble_atmprfs.h b/platform/atm2/ATM22xx-x1x/lib/ble_atmprfs/ble_atmprfs.h
new file mode 100644
index 0000000..4cc7522
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/ble_atmprfs/ble_atmprfs.h
@@ -0,0 +1,347 @@
+/**
+ *******************************************************************************
+ *
+ * @file ble_atmprfs.h
+ *
+ * @brief Atmosic Profile Server Middleware
+ *
+ * Copyright (C) Atmosic 2020
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_ATMPRFS Atmosic profile server API
+ * @ingroup ATM_BTFM_API
+ * @brief ATM bluetooth framework atmprfs API
+ *
+ * This module contains the necessary API to create service through Atmosic
+ * profile server
+ *
+ * @{
+ *******************************************************************************
+ */
+
+/*
+ * INCLUDE
+ *******************************************************************************
+ */
+#include "atm_prfs_task.h"
+#include "gattc.h"
+#include "ble_prf_itf.h"
+#include "ble_gattc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * DEFINE
+ *******************************************************************************
+ */
+/// The module name to register to SDK framework
+#define BLE_ATMPRFS_MODULE_NAME "ble_atmprfs"
+/// Invalid ATT index
+#define BLE_ATMPRFS_INVALID_ATTIDX 0xFF
+/// The maximum serial number of notification or indication
+#define BLE_ATMPRFS_NTF_IND_MAX_SN 0xFFFF
+
+/// The element type in crateing profile
+typedef enum {
+    /// Service
+    BLE_ATMPRFS_ATT_SVC,
+    /// Characteristic
+    BLE_ATMPRFS_ATT_CHAR,
+    /// The descriptor base index
+    BLE_ATMPRFS_ATT_DESC_BASE = ATT_DESC_CHAR_EXT_PROPERTIES,
+    /// CEOD (0x2900)
+    BLE_ATMPRFS_ATT_CHAR_EXT_PROP = BLE_ATMPRFS_ATT_DESC_BASE,
+    /// CUDD (0x2901)
+    BLE_ATMPRFS_ATT_CHAR_USR_DESC,
+    /// CCCD (0x2902)
+    BLE_ATMPRFS_ATT_CLI_CHAR_CFG,
+    /// SCCD (0x2903)
+    BLE_ATMPRFS_ATT_SERVER_CHAR_CFG,
+    /// SCCD (0x2904)
+    BLE_ATMPRFS_ATT_CHAR_PRES_FOMT,
+    /// CAFD (0x2905)
+    BLE_ATMPRFS_ATT_CHAR_AGGR_FOMT,
+    /// The user defined descriptor (128 bit)
+    BLE_ATMPRFS_ATT_USER_DESC
+} ble_atmprfs_att_type_t;
+
+typedef const ble_prf_cbs_t *(ble_atmprfs_get_cbs_t)(void const *param);
+
+/*
+ * STRUCTURE DEFINITION
+ ******************************************************************************
+ */
+
+/// GATTC read request indicate
+typedef uint8_t (*ble_atmprfs_gattc_read_req_ind_t)(uint8_t conidx,
+    uint8_t att_idx);
+/// GATTC write request indicate
+typedef uint8_t (*ble_atmprfs_gattc_write_req_ind_t)(uint8_t conidx,
+    uint8_t att_idx, uint8_t const *data, uint16_t size);
+/// GATTC write confirmation indicate
+typedef void (*ble_atmprfs_gattc_write_cfm_ind_t)(uint8_t conidx,
+    uint8_t att_idx);
+/// GATTC ATT information request indicate
+typedef uint8_t (*ble_atmprfs_gattc_att_info_req_ind_t)(uint8_t conidx,
+    uint8_t att_idx, uint16_t *length);
+
+/// The callback function for ble_atmprfs
+typedef struct {
+    /// GATTC read request indicate
+    ble_atmprfs_gattc_read_req_ind_t read_req;
+    /// GATTC write request indicate
+    ble_atmprfs_gattc_write_req_ind_t write_req;
+    /// GATTC write confirmation indicate
+    ble_atmprfs_gattc_write_cfm_ind_t write_cfm;
+    /// GATTC ATT information request indicate
+    ble_atmprfs_gattc_att_info_req_ind_t att_info_req;
+} ble_atmprfs_cbs_t;
+
+/*
+ * FUNCTION DECLARATION
+ ******************************************************************************
+ */
+
+/**
+ *******************************************************************************
+ * @brief Add service
+ *
+ * @param[in] uuid      Service UUID (128 bit)
+ * @param[in] sec_prop  Security property (ble_att.h)
+ * @param[in] cb        The callback function of register service
+ * @return ATT index. Return BLE_ATMPRFS_INVALID_ATTIDX on failure
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_add_svc(const uint8_t uuid[ATT_UUID_128_LEN],
+    uint16_t sec_prop, ble_atmprfs_cbs_t const *cb);
+
+/**
+ *******************************************************************************
+ * @brief Add 16-bit UUID service
+ *
+ * @param[in] uuid      Service UUID (16 bit)
+ * @param[in] sec_prop  Security property (ble_att.h)
+ * @param[in] cb        The callback function of register service
+ * @return ATT index. Return BLE_ATMPRFS_INVALID_ATTIDX on failure
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_add_svc_16(uint16_t uuid, uint16_t sec_prop,
+    ble_atmprfs_cbs_t const *cb);
+
+/**
+ *******************************************************************************
+ * @brief Add characteristic
+ *
+ * @param[in] uuid      Characteristic UUID (128 bit)
+ * @param[in] perm      Permission (ble_att.h)
+ * @param[in] max_size  The maximum size of characteristic
+ * @return ATT index. Return BLE_ATMPRFS_INVALID_ATTIDX on failure
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_add_char(const uint8_t uuid[ATT_UUID_128_LEN], uint16_t perm,
+    uint16_t max_size);
+
+/**
+ *******************************************************************************
+ * @brief Add 16-bit UUID characteristic
+ *
+ * @param[in] uuid      Characteristic UUID (16 bit)
+ * @param[in] perm      Permission (ble_att.h)
+ * @param[in] max_size  The maximum size of characteristic
+ * @return ATT index. Return BLE_ATMPRFS_INVALID_ATTIDX on failure
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_add_char_16(uint16_t uuid, uint16_t perm,
+    uint16_t max_size);
+
+/**
+ *******************************************************************************
+ * @brief Add characteristic extended properties descriptor (0x2900)
+ *
+ * @return ATT index. Return BLE_ATMPRFS_INVALID_ATTIDX on failure
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_add_char_ext_prop(void);
+
+/**
+ *******************************************************************************
+ * @brief Add characteristic user description descriptor (0x2901)
+ *
+ * @param[in] perm      Permission (ble_att.h)
+ * @param[in] max_size  The maximum size of descriptor
+ * @return ATT index. Return BLE_ATMPRFS_INVALID_ATTIDX on failure
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_add_char_user_desc(uint16_t perm, uint16_t max_size);
+
+/**
+ *******************************************************************************
+ * @brief Add client characteristic configuration descriptor (0x2902)
+ *
+ * @return ATT index. Return BLE_ATMPRFS_INVALID_ATTIDX on failure
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_add_client_char_cfg(void);
+
+/**
+ *******************************************************************************
+ * @brief Add server characteristic configuration descriptor (0x2903)
+ *
+ * @return ATT index. Return BLE_ATMPRFS_INVALID_ATTIDX on failure
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_add_server_char_cfg(void);
+
+/**
+ *******************************************************************************
+ * @brief Add characteristic presentation format descriptor (0x2904)
+ *
+ * @return ATT index. Return BLE_ATMPRFS_INVALID_ATTIDX on failure
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_add_char_pres_format(void);
+
+/**
+ *******************************************************************************
+ * @brief Add characteristic aggregate format descriptor (0x2905)
+ *
+ * @return ATT index. Return BLE_ATMPRFS_INVALID_ATTIDX on failure
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_add_char_aggr_format(uint16_t max_size);
+
+/**
+ *******************************************************************************
+ * @brief Add user defined descriptor
+ *
+ * @param[in] uuid      Descriptor UUID (128 bit)
+ * @param[in] perm      Permission (ble_att.h)
+ * @param[in] max_size  The maximum size of descriptor
+ * @return ATT index. Return BLE_ATMPRFS_INVALID_ATTIDX on failure
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_add_desc_user_defined(const uint8_t uuid[ATT_UUID_128_LEN],
+    uint16_t perm, uint16_t max_size);
+
+/**
+ *******************************************************************************
+ * @brief Active the service database in queue
+ *
+ * @return Success: ATT_ERR_NO_ERROR
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_active_svc_db(void);
+
+/**
+ *******************************************************************************
+ * @brief Apply data to ATT server when get GATTC read request
+ *
+ * @param[in]  conidx   Connection index
+ * @param[in]  att_idx  ATT index
+ * @param[out] data     The data will send to remote
+ * @param[in]  length   The data length
+ * @return Success: ATT_ERR_NO_ERROR
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_gattc_read_cfm(uint8_t conidx, uint8_t att_idx,
+    uint8_t const *data, uint16_t length);
+
+/**
+ *******************************************************************************
+ * @brief Send notification to ATT client
+ *
+ * @param[in]  conidx   Connection index
+ * @param[in]  att_idx  ATT index
+ * @param[out] data     The data will send to remote
+ * @param[in]  length   The data length
+ * @param[in]  cb       The complete event after sending notification
+ * @return Success: ATT_ERR_NO_ERROR
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_gattc_send_ntf(uint8_t conidx, uint8_t att_idx,
+    uint8_t const *data, uint16_t length, ble_gattc_cmpl_cb_t cb);
+
+/**
+ *******************************************************************************
+ * @brief Send indication to ATT client
+ *
+ * @param[in]  conidx   Connection index
+ * @param[in]  att_idx  ATT index
+ * @param[out] data     The data will send to remote
+ * @param[in]  length   The data length
+ * @param[in]  cb       The complete event after sending indication
+ * @return Success: ATT_ERR_NO_ERROR
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_gattc_send_ind(uint8_t conidx, uint8_t att_idx,
+    uint8_t const *data, uint16_t length, ble_gattc_cmpl_cb_t cb);
+
+/**
+ *******************************************************************************
+ * @brief Retrieve the last sequence number after sending notification or
+ * indication
+ *
+ * @param[in]  conidx   Connection index
+ * @return sequence number
+ *******************************************************************************
+ */
+uint16_t ble_atmprfs_get_ni_last_seq_num(uint8_t conidx);
+
+/**
+ *******************************************************************************
+ * @brief Retrieve ATT handle by index
+ *
+ * @param[in] att_idx  The ATT index in profile creating.
+ * @return ATT handle. Return ATT_INVALID_HDL if handle not exist.
+ *******************************************************************************
+ */
+uint16_t ble_atmprfs_get_att_handle(uint8_t att_idx);
+
+/**
+ *******************************************************************************
+ * @brief Get ATT index by ATT handle
+ *
+ * @param[in]  handle   The ATT handle
+ * @param[out] att_idx  ATT index to fill
+ * @return Success: ATT_ERR_NO_ERROR, Fail: ATT_ERR_INVALID_HANDLE
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_get_att_idx(uint16_t handle, uint8_t *att_idx);
+
+/**
+ *******************************************************************************
+ * @brief Apply data to ATT server when get GATTC att info request
+ *
+ * @param[in]  conidx   Connection index
+ * @param[in]  att_idx  ATT index
+ * @param[in]  length   Length
+ * @return Success: ATT_ERR_NO_ERROR
+ *******************************************************************************
+ */
+uint8_t ble_atmprfs_gattc_att_info_cfm(uint8_t conidx, uint8_t att_idx,
+    uint16_t length);
+
+/**
+ *******************************************************************************
+ * @brief Enable/Disable service visibility during service discovery
+ *
+ * @param[in] att_idx  ATT index
+ * @param[in] set      1 (service is visible) :  0 (service is not visible)
+ * @return Success: BLE_ERR_NO_ERROR
+ *******************************************************************************
+ */
+ble_err_code_t ble_atmprfs_svc_visibility_set(uint8_t att_idx, bool set);
+
+#ifdef __cplusplus
+}
+#endif
+
+///@} ATM_BTFM_ATMPRFS
+
diff --git a/platform/atm2/ATM22xx-x1x/lib/ble_bass/ble_bass.h b/platform/atm2/ATM22xx-x1x/lib/ble_bass/ble_bass.h
new file mode 100644
index 0000000..97b7ad1
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/ble_bass/ble_bass.h
@@ -0,0 +1,88 @@
+/**
+ *******************************************************************************
+ *
+ * @file ble_bass.h
+ *
+ * @brief BASS API and data structures
+ *
+ * Copyright (C) Atmosic 2020-2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_BASS Battery service procedures
+ * @ingroup ATM_BTFM_API
+ * @brief BLE bluetooth battery service procedures
+ *
+ * This module contains the necessary procedure to send the battery level.
+ *
+ *
+ * @{
+ *******************************************************************************
+ */
+/*
+ * INCLUDE FILES
+ *******************************************************************************
+ */
+#include "ble_prf_itf.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * DEFINITION
+ *******************************************************************************
+ */
+#define BLE_BASS_MODULE_NAME "kbass"
+#define BATT_LVL_HALF 50 // percent
+#define BATT_LVL_MAX 100 // percent
+
+/*
+ * STRUCTURES DEFINITION
+ *******************************************************************************
+ */
+/// BASS feature
+typedef enum {
+    /// Support notification
+    BLE_BASS_FEATURE_NTF = 1,
+    /// Number of instance. MUST BE the final enumerator. Add new values above.
+    BLE_BASS_NB_BAS_INSTANCES = 2
+} ble_bass_feature_t;
+
+typedef struct {
+    /// Service security level
+    uint8_t sec_lvl;
+    /// Number of BAS to add
+    uint8_t bas_nb;
+    /// Features of each BAS instance. bit 0: support notification.
+    /// bit 1 to 7 reserved.
+    ble_bass_feature_t features[BLE_BASS_NB_BAS_INSTANCES];
+    /// Callback to request update
+    void (*cb_upd_req_ind)(uint8_t bas_instance);
+} ble_bass_params_t;
+
+typedef const ble_prf_cbs_t *(ble_bass_cbs_t)(ble_bass_params_t const *init);
+
+/*
+ * GLOBAL
+ *******************************************************************************
+ */
+
+/**
+ *******************************************************************************
+ * @brief Send battery level information
+ * @param[in] bas_instance Connection index
+ * @param[in] pct_lvl Battery level percentage
+ *******************************************************************************
+ */
+void ble_bass_send_lvl(uint8_t bas_instance, uint8_t pct_lvl);
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} ATM_BTFM_BASS
diff --git a/platform/atm2/ATM22xx-x1x/lib/ble_common/ble_common.h b/platform/atm2/ATM22xx-x1x/lib/ble_common/ble_common.h
new file mode 100644
index 0000000..67a22b1
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/ble_common/ble_common.h
@@ -0,0 +1,74 @@
+/**
+ *******************************************************************************
+ *
+ * @file ble_common.h
+ *
+ * @brief Common BLE definitions and utility
+ *
+ * Copyright (C) Atmosic 2022
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+#include <string.h>
+
+/// Address length
+#define BLE_BDADDR_LEN 6
+
+/// BD address type.
+typedef enum {
+    /// Public address type
+    BLE_ADDR_PUBLIC,
+    /// Random address type
+    BLE_ADDR_RAND,
+} ble_addr_type_t;
+
+/// BD address structure
+typedef struct {
+    /// 6-byte array address value
+    uint8_t addr[BLE_BDADDR_LEN];
+} ble_bdaddr_t;
+
+/// Address information about a device address
+typedef struct {
+    /// BD Address of device
+    ble_bdaddr_t addr;
+    /// Address type of the device
+    ble_addr_type_t type;
+} ble_gap_bdaddr_t;
+
+/**
+ *******************************************************************************
+ * @brief Check equivalence of two ble_bdaddr_t type data
+ * @param[in] addr1 first address to compare
+ * @param[in] addr2 second address to compare
+ *
+ * @return True if they equal.
+ *******************************************************************************
+ */
+__NONNULL_ALL
+__INLINE bool ble_bdaddr_compare(ble_bdaddr_t const *addr1,
+    ble_bdaddr_t const *addr2)
+{
+    return !memcmp(addr1, addr2, BLE_BDADDR_LEN);
+}
+
+/**
+ *******************************************************************************
+ * @brief Check equivalence of two ble_gap_bdaddr_t type data
+ *
+ * @param[in] addr1 first address to compare
+ * @param[in] addr2 second address to compare
+ *
+ * @return True if they equal.
+ *******************************************************************************
+ */
+__NONNULL_ALL
+__INLINE bool ble_gap_addr_compare(ble_gap_bdaddr_t const *addr1,
+    ble_gap_bdaddr_t const *addr2)
+{
+    return (addr1->type == addr2->type) &&
+	ble_bdaddr_compare(&addr1->addr, &addr2->addr);
+}
diff --git a/platform/atm2/ATM22xx-x1x/lib/ble_common/ble_err.h b/platform/atm2/ATM22xx-x1x/lib/ble_common/ble_err.h
new file mode 100644
index 0000000..1094b72
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/ble_common/ble_err.h
@@ -0,0 +1,399 @@
+/**
+ *******************************************************************************
+ *
+ * @file ble_err.h
+ *
+ * @brief Bluetooth framework common error code enums.
+ *
+ * Copyright (C) Atmosic 2022-2023
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/// Error code size of module
+#define BLE_ERR_CODE_BITS 8
+
+/// Module of error codes
+typedef enum {
+    BLE_HCI_MODULE,
+    BLE_L2C_MODULE,
+    BLE_ATT_MODULE,
+    BLE_SMP_MODULE,
+    BLE_GAP_MODULE,
+} ble_module_type_t;
+
+/// Macro for module
+#define BLE_MODULE(x) BLE_##x##_MODULE
+
+/// Macro for combining errors
+#define BLE_ERR(x, y) ((BLE_MODULE(x) << BLE_ERR_CODE_BITS) | y)
+
+/// Macro for getting error type
+#define BLE_ERR_TYPE(x) ((x) >> BLE_ERR_CODE_BITS)
+
+/// Error codes
+/// @note This error code is mapped from the lower layer. Should not be changed.
+typedef enum {
+    /// No error.
+    BLE_ERR_NO_ERROR = 0,
+    /// HCI Specific Error
+    /// Unknown HCI Command.
+    BLE_HCI_ERR_UNKNOWN_HCI_COMMAND = BLE_ERR(HCI, 0x01),
+    /// Unknown Connection Identifier.
+    BLE_HCI_ERR_UNKNOWN_CONNECTION_ID = BLE_ERR(HCI, 0x02),
+    /// Hardware Failure.
+    BLE_HCI_ERR_HARDWARE_FAILURE = BLE_ERR(HCI, 0x03),
+    /// Page Timeout.
+    BLE_HCI_ERR_PAGE_TIMEOUT = BLE_ERR(HCI, 0x04),
+    /// Authentication Failure.
+    BLE_HCI_ERR_AUTH_FAILURE = BLE_ERR(HCI, 0x05),
+    /// PIN or Key Missing.
+    BLE_HCI_ERR_PIN_MISSING = BLE_ERR(HCI, 0x06),
+    /// Memory Capacity Exceeded.
+    BLE_HCI_ERR_MEMORY_CAPA_EXCEED = BLE_ERR(HCI, 0x07),
+    /// Connection Timeout.
+    BLE_HCI_ERR_CON_TIMEOUT = BLE_ERR(HCI, 0x08),
+    /// Connection Limit Exceeded.
+    BLE_HCI_ERR_CON_LIMIT_EXCEED = BLE_ERR(HCI, 0x09),
+    /// Synchronous Connection Limit to a Device Exceeded.
+    BLE_HCI_ERR_SYNC_CON_LIMIT_DEV_EXCEED = BLE_ERR(HCI, 0x0A),
+    /// Connection Already Exists.
+    BLE_HCI_ERR_CON_ALREADY_EXISTS = BLE_ERR(HCI, 0x0B),
+    /// Command Disallowed.
+    BLE_HCI_ERR_COMMAND_DISALLOWED = BLE_ERR(HCI, 0x0C),
+    /// Connection Rejected Due To Limited Resources.
+    BLE_HCI_ERR_CONN_REJ_LIMITED_RESOURCES = BLE_ERR(HCI, 0x0D),
+    /// Connection Rejected Due To Security Reasons.
+    BLE_HCI_ERR_CONN_REJ_SECURITY_REASONS = BLE_ERR(HCI, 0x0E),
+    /// Connection Rejected due to Unacceptable BD_ADDR.
+    BLE_HCI_ERR_CONN_REJ_UNACCEPTABLE_BDADDR = BLE_ERR(HCI, 0x0F),
+    /// Connection Accept Timeout Exceeded.
+    BLE_HCI_ERR_CONN_ACCEPT_TIMEOUT_EXCEED = BLE_ERR(HCI, 0x10),
+    /// Unsupported Feature Or Parameter Value.
+    BLE_HCI_ERR_UNSUPPORTED = BLE_ERR(HCI, 0x11),
+    /// Invalid HCI Command Parameters.
+    BLE_HCI_ERR_INVALID_HCI_PARAM = BLE_ERR(HCI, 0x12),
+    /// Remote User Terminated Connection.
+    BLE_HCI_ERR_REMOTE_USER_TERM_CON = BLE_ERR(HCI, 0x13),
+    /// Remote Device Terminated Connection due to Low Resources.
+    BLE_HCI_ERR_REMOTE_DEV_TERM_LOW_RESOURCES = BLE_ERR(HCI, 0x14),
+    /// Remote Device Terminated Connection due to Power Off.
+    BLE_HCI_ERR_REMOTE_DEV_POWER_OFF = BLE_ERR(HCI, 0x15),
+    /// Connection Terminated By Local Host.
+    BLE_HCI_ERR_CON_TERM_BY_LOCAL_HOST = BLE_ERR(HCI, 0x16),
+    /// Repeated Attempts.
+    BLE_HCI_ERR_REPEATED_ATTEMPTS = BLE_ERR(HCI, 0x17),
+    /// Pairing Not Allowed.
+    BLE_HCI_ERR_PAIRING_NOT_ALLOWED = BLE_ERR(HCI, 0x18),
+    /// Unknown LMP PDU.
+    BLE_HCI_ERR_UNKNOWN_LMP_PDU = BLE_ERR(HCI, 0x19),
+    /// Unsupported Remote Feature.
+    BLE_HCI_ERR_UNSUPPORTED_REMOTE_FEATURE = BLE_ERR(HCI, 0x1A),
+    /// SCO Offset Rejected.
+    BLE_HCI_ERR_SCO_OFFSET_REJECTED = BLE_ERR(HCI, 0x1B),
+    /// SCO Interval Rejected.
+    BLE_HCI_ERR_SCO_INTERVAL_REJECTED = BLE_ERR(HCI, 0x1C),
+    /// SCO Air Mode Rejected.
+    BLE_HCI_ERR_SCO_AIR_MODE_REJECTED = BLE_ERR(HCI, 0x1D),
+    /// Invalid LMP Parameters / Invalid LL Parameters.
+    BLE_HCI_ERR_INVALID_LMP_PARAM = BLE_ERR(HCI, 0x1E),
+    /// Unspecified Error.
+    BLE_HCI_ERR_UNSPECIFIED_ERROR = BLE_ERR(HCI, 0x1F),
+    /// Unsupported LMP Parameter Value / Unsupported LL Parameter Value.
+    BLE_HCI_ERR_UNSUPPORTED_LMP_PARAM_VALUE = BLE_ERR(HCI, 0x20),
+    /// Role Change Not Allowed.
+    BLE_HCI_ERR_ROLE_CHANGE_NOT_ALLOWED = BLE_ERR(HCI, 0x21),
+    /// LMP Response Timeout / LL Response Timeout.
+    BLE_HCI_ERR_LMP_RSP_TIMEOUT = BLE_ERR(HCI, 0x22),
+    /// LMP Error Transaction Collision / LL Procedure Collision.
+    BLE_HCI_ERR_LMP_COLLISION = BLE_ERR(HCI, 0x23),
+    /// LMP PDU Not Allowed.
+    BLE_HCI_ERR_LMP_PDU_NOT_ALLOWED = BLE_ERR(HCI, 0x24),
+    /// Encryption Mode Not Acceptable.
+    BLE_HCI_ERR_ENC_MODE_NOT_ACCEPT = BLE_ERR(HCI, 0x25),
+    /// Link Key cannot be Changed.
+    BLE_HCI_ERR_LINK_KEY_CANT_CHANGE = BLE_ERR(HCI, 0x26),
+    /// Requested QoS Not Supported.
+    BLE_HCI_ERR_QOS_NOT_SUPPORTED = BLE_ERR(HCI, 0x27),
+    /// Instant Passed.
+    BLE_HCI_ERR_INSTANT_PASSED = BLE_ERR(HCI, 0x28),
+    /// Pairing With Unit Key Not Supported.
+    BLE_HCI_ERR_PAIRING_WITH_UNIT_KEY_NOT_SUP = BLE_ERR(HCI, 0x29),
+    /// Different Transaction Collision.
+    BLE_HCI_ERR_DIFF_TRANSACTION_COLLISION = BLE_ERR(HCI, 0x2A),
+    /// QoS Unacceptable Parameter.
+    BLE_HCI_ERR_QOS_UNACCEPTABLE_PARAM = BLE_ERR(HCI, 0x2C),
+    /// QoS Rejected.
+    BLE_HCI_ERR_QOS_REJECTED = BLE_ERR(HCI, 0x2D),
+    /// Channel Assessment Not Supported.
+    BLE_HCI_ERR_CHANNEL_CLASS_NOT_SUP = BLE_ERR(HCI, 0x2E),
+    /// Insufficient Security.
+    BLE_HCI_ERR_INSUFFICIENT_SECURITY = BLE_ERR(HCI, 0x2F),
+    /// Parameter Out Of Mandatory Range.
+    BLE_HCI_ERR_PARAM_OUT_OF_MAND_RANGE = BLE_ERR(HCI, 0x30),
+    /// Role Switch Pending.
+    BLE_HCI_ERR_ROLE_SWITCH_PEND = BLE_ERR(HCI, 0x32),
+    /// Reserved Slot Violation.
+    BLE_HCI_ERR_RESERVED_SLOT_VIOLATION = BLE_ERR(HCI, 0x34),
+    /// Role Switch Failed.
+    BLE_HCI_ERR_ROLE_SWITCH_FAIL = BLE_ERR(HCI, 0x35),
+    /// Extended Inquiry Response Too Large.
+    BLE_HCI_ERR_EIR_TOO_LARGE = BLE_ERR(HCI, 0x36),
+    /// Secure Simple Pairing Not Supported by Host.
+    BLE_HCI_ERR_SP_NOT_SUPPORTED_HOST = BLE_ERR(HCI, 0x37),
+    /// The Host Busy - Pairing.
+    BLE_HCI_ERR_HOST_BUSY_PAIRING = BLE_ERR(HCI, 0x38),
+    /// Connection Rejected due to No Suitable Channel Found.
+    BLE_HCI_ERR_CONN_REJ_NO_SUITABLE_CHANN_FOUND = BLE_ERR(HCI, 0x39),
+    /// Controller Busy.
+    BLE_HCI_ERR_CONTROLLER_BUSY = BLE_ERR(HCI, 0x3A),
+    /// Unacceptable Connection Parameters.
+    BLE_HCI_ERR_UNACCEPTABLE_CONN_PARAM = BLE_ERR(HCI, 0x3B),
+    /// Advertising Timeout.
+    BLE_HCI_ERR_ADV_TO = BLE_ERR(HCI, 0x3C),
+    /// Connection Terminated Due to MIC Failure.
+    BLE_HCI_ERR_TERMINATED_MIC_FAILURE = BLE_ERR(HCI, 0x3D),
+    /// Connection Failed to be Established / Synchronization Timeout.
+    BLE_HCI_ERR_CONN_FAILED_TO_BE_EST = BLE_ERR(HCI, 0x3E),
+    /// Coarse Clock Adjustment Rejected but Will Try to Adjust Using Clock
+    /// Dragging.
+    BLE_HCI_ERR_CCA_REJ_USE_CLOCK_DRAG = BLE_ERR(HCI, 0x40),
+    /// Type0 Submap Not Defined.
+    BLE_HCI_ERR_TYPE0_SUBMAP_NOT_DEFINED = BLE_ERR(HCI, 0x41),
+    /// Unknown Advertising Identifier.
+    BLE_HCI_ERR_UNKNOWN_ADVERTISING_ID = BLE_ERR(HCI, 0x42),
+    /// Limit Reached.
+    BLE_HCI_ERR_LIMIT_REACHED = BLE_ERR(HCI, 0x43),
+    /// Operation Cancelled by Host.
+    BLE_HCI_ERR_OPERATION_CANCELED_BY_HOST = BLE_ERR(HCI, 0x44),
+    /// Undefined error.
+    BLE_HCI_ERR_UNDEFINED = BLE_ERR(HCI, 0xFF),
+
+    /// L2C Specific Error
+    /// Table 4.3: Reason code descriptions in L2CAP of Core Specification.
+    /// Command not understood.
+    BLE_L2C_ERR_NOT_UNDERSTOOD = BLE_ERR(L2C, 0x01),
+    /// Signaling MTU exceeded.
+    BLE_L2C_ERR_INVALID_MTU_EXCEED = BLE_ERR(L2C, 0x02),
+    /// Invalid CID in request.
+    BLE_L2C_ERR_INVALID_CID = BLE_ERR(L2C, 0x03),
+    /// Table 4.14: Result values for the L2CAP_CONNECTION_PARAMETER_UPDATE_RSP
+    /// packet.
+    /// Connection Parameters rejected.
+    BLE_L2C_ERR_CONN_PARA_REJECTED = BLE_ERR(L2C, 0x04),
+    /// Table 4.16: Result values for the L2CAP_LE_CREDIT_BASED_CONNECTION_RSP
+    /// packet in L2CAP of Core Specification.
+    /// Connection refused - SPSM not supported.
+    BLE_L2C_ERR_SPSM_NOT_SUPP = BLE_ERR(L2C, 0x05),
+    /// Connection refused - no resources available.
+    BLE_L2C_ERR_NO_RES_AVAIL = BLE_ERR(L2C, 0x06),
+    /// Connection refused - insufficient authentication.
+    BLE_L2C_ERR_INSUFF_AUTHEN = BLE_ERR(L2C, 0x07),
+    /// Connection refused - insufficient authorization.
+    BLE_L2C_ERR_INSUFF_AUTHOR = BLE_ERR(L2C, 0x08),
+    /// Connection refused - insufficient encryption key size.
+    BLE_L2C_ERR_INSUFF_ENC_KEY_SIZE = BLE_ERR(L2C, 0x09),
+    /// Connection refused - insufficient encryption.
+    BLE_L2C_ERR_INSUFF_ENC = BLE_ERR(L2C, 0x0A),
+    /// Connection refused – invalid Source CID.
+    BLE_L2C_ERR_INVALID_SOURCE_CID = BLE_ERR(L2C, 0x0B),
+    /// Connection refused – Source CID already allocated.
+    BLE_L2C_ERR_CID_ALREADY_ALLOC = BLE_ERR(L2C, 0x0C),
+    /// Connection refused – unacceptable parameters.
+    BLE_L2C_ERR_UNACCEPT_PARA = BLE_ERR(L2C, 0x0D),
+    /// Table 4.17: Result values for the L2CAP_CREDIT_BASED_CONNECTION_RSP
+    /// packet in L2CAP of Core Specification.
+    /// Connection pending – no further information available.
+    BLE_L2C_ERR_NO_FURTHER_INFO_AVAIL = BLE_ERR(L2C, 0x0E),
+    /// Connection pending – authentication pending.
+    BLE_L2C_ERR_AUTHEN_PEND = BLE_ERR(L2C, 0x0F),
+    /// Connection pending – authorization pending.
+    BLE_L2C_ERR_AUTHOR_PEND = BLE_ERR(L2C, 0x10),
+    /// Local L2CAP Specific Error
+    /// Invalid PDU length exceed MPS.
+    BLE_L2C_ERR_INVALID_MPS_EXCEED = BLE_ERR(L2C, 0x11),
+    /// Invalid PDU.
+    BLE_L2C_ERR_INVALID_PDU = BLE_ERR(L2C, 0x12),
+    /// Credit error, invalid number of credit received.
+    BLE_L2C_ERR_CREDIT_ERROR = BLE_ERR(L2C, 0x13),
+    /// Undefined error.
+    BLE_L2C_ERR_UNDEFINED = BLE_ERR(L2C, 0xFF),
+
+    /// ATT Specific Error
+    /// Refer to Table 3.4: Error codes in ATT of Core Specification.
+    /// The attribute handle given was not valid on this server.
+    BLE_ATT_ERR_INVALID_HANDLE = BLE_ERR(ATT, 0x01),
+    /// The attribute cannot be read.
+    BLE_ATT_ERR_READ_NOT_PERMITTED = BLE_ERR(ATT, 0x02),
+    /// The attribute cannot be written.
+    BLE_ATT_ERR_WRITE_NOT_PERMITTED = BLE_ERR(ATT, 0x03),
+    /// The attribute PDU was invalid.
+    BLE_ATT_ERR_INVALID_PDU = BLE_ERR(ATT, 0x04),
+    /// The attribute requires authentication before it can be read or written.
+    BLE_ATT_ERR_INSUFF_AUTHEN = BLE_ERR(ATT, 0x05),
+    /// ATT Server does not support the request received from the client.
+    BLE_ATT_ERR_REQUEST_NOT_SUPPORTED = BLE_ERR(ATT, 0x06),
+    /// Offset specified was past the end of the attribute.
+    BLE_ATT_ERR_INVALID_OFFSET = BLE_ERR(ATT, 0x07),
+    /// The attribute requires authorization before it can be read or written.
+    BLE_ATT_ERR_INSUFF_AUTHOR = BLE_ERR(ATT, 0x08),
+    /// Too many prepare writes have been queued.
+    BLE_ATT_ERR_PREPARE_QUEUE_FULL = BLE_ERR(ATT, 0x09),
+    /// No attribute found within the given attribute handle range.
+    BLE_ATT_ERR_ATTRIBUTE_NOT_FOUND = BLE_ERR(ATT, 0x0A),
+    /// The attribute cannot be read using the ATT_READ_BLOB_REQ PDU.
+    BLE_ATT_ERR_ATTRIBUTE_NOT_LONG = BLE_ERR(ATT, 0x0B),
+    /// The Encryption Key Size used for encrypting this link is too short.
+    BLE_ATT_ERR_INSUFF_ENC_KEY_SIZE = BLE_ERR(ATT, 0x0C),
+    /// The attribute value length is invalid for the operation.
+    BLE_ATT_ERR_INVALID_ATTRIBUTE_VAL_LEN = BLE_ERR(ATT, 0x0D),
+    /// The attribute request that was requested has encountered an error that
+    /// was unlikely, and therefore could not be completed as requested.
+    BLE_ATT_ERR_UNLIKELY_ERR = BLE_ERR(ATT, 0x0E),
+    /// The attribute requires encryption before it can be read or written.
+    BLE_ATT_ERR_INSUFF_ENC = BLE_ERR(ATT, 0x0F),
+    /// The attribute type is not a supported grouping attribute as defined by a
+    /// higher layer specification.
+    BLE_ATT_ERR_UNSUPP_GRP_TYPE = BLE_ERR(ATT, 0x10),
+    /// Insufficient Resources to complete the request.
+    BLE_ATT_ERR_INSUFF_RESOURCE = BLE_ERR(ATT, 0x11),
+    /// The server requests the client to rediscover the database.
+    BLE_ATT_ERR_DATABASE_OUT_OF_SYNC = BLE_ERR(ATT, 0x12),
+    /// The attribute parameter value was not allowed.
+    BLE_ATT_ERR_VALUE_NOT_ALLOWED = BLE_ERR(ATT, 0x13),
+
+    /// Application error code defined by a higher layer specification.
+    /// range 0x80 ~ 0x9F
+    BLE_ATT_ERR_APP_ERROR = BLE_ERR(ATT, 0x80),
+    /// Invalid parameter in request
+    BLE_ATT_ERR_APP_INVALID_PARAM = BLE_ERR(ATT, 0x81),
+    /// Inexistent handle for sending a read/write characteristic request
+    BLE_ATT_ERR_APP_INEXISTENT_HDL = BLE_ERR(ATT, 0x82),
+    /// Discovery stopped due to missing attribute according to specification
+    BLE_ATT_ERR_APP_STOP_DISC_CHAR_MISSING = BLE_ERR(ATT, 0x83),
+    /// Too many SVC instances found -> protocol violation
+    BLE_ATT_ERR_APP_MULTIPLE_SVC = BLE_ERR(ATT, 0x84),
+    /// Discovery stopped due to found attribute with incorrect properties
+    BLE_ATT_ERR_APP_STOP_DISC_WRONG_CHAR_PROP = BLE_ERR(ATT, 0x85),
+    /// Too many Char. instances found-> protocol violation
+    BLE_ATT_ERR_APP_MULTIPLE_CHAR = BLE_ERR(ATT, 0x86),
+    /// Attribute write not allowed
+    BLE_ATT_ERR_APP_NOT_WRITABLE = BLE_ERR(ATT, 0x87),
+    /// Attribute read not allowed
+    BLE_ATT_ERR_APP_NOT_READABLE = BLE_ERR(ATT, 0x88),
+    /// Request not allowed
+    BLE_ATT_ERR_APP_REQ_DISALLOWED = BLE_ERR(ATT, 0x89),
+    /// Notification Not Enabled
+    BLE_ATT_ERR_APP_NTF_DISABLED = BLE_ERR(ATT, 0x8A),
+    /// Indication Not Enabled
+    BLE_ATT_ERR_APP_IND_DISABLED = BLE_ERR(ATT, 0x8B),
+    /// Feature not supported by profile
+    BLE_ATT_ERR_APP_FEATURE_NOT_SUPPORTED = BLE_ERR(ATT, 0x8C),
+    /// Read value has an unexpected length
+    BLE_ATT_ERR_APP_UNEXPECTED_LEN = BLE_ERR(ATT, 0x8D),
+    /// Disconnection occurs
+    BLE_ATT_ERR_APP_DISCONNECTED = BLE_ERR(ATT, 0x8E),
+    /// Procedure Timeout
+    BLE_ATT_ERR_APP_PROC_TIMEOUT = BLE_ERR(ATT, 0x8F),
+    /// Permission set in service/attribute are invalid
+    BLE_ATT_ERR_APP_INVALID_PERM = BLE_ERR(ATT, 0x90),
+
+    /// Common profile and service error codes. range 0xE0 ~ 0xFF
+    BLE_ATT_ERR_COMM_PRF_AND_SERVICE_ERR = BLE_ERR(ATT, 0xE0),
+    /// Write request rejected
+    BLE_ATT_ERR_PRF_WRITE_REQ_REJECTED = BLE_ERR(ATT, 0xFC),
+    /// Client characteristic configuration improperly configured
+    BLE_ATT_ERR_PRF_CCCD_IMPR_CONFIGURED = BLE_ERR(ATT, 0xFD),
+    /// Procedure already in progress
+    BLE_ATT_ERR_PRF_PROC_IN_PROGRESS = BLE_ERR(ATT, 0xFE),
+    /// Out of Range
+    BLE_ATT_ERR_PRF_OUT_OF_RANGE = BLE_ERR(ATT, 0xFF),
+
+    /// SMP Specific Error
+    /// Refer to Table 3.7: Pairing Failed Reason Codes in SMP of Core
+    /// Specification.
+    /// The user input of pass key failed, for example, the user canceled the
+    /// operation.
+    BLE_SMP_ERR_PASSKEY_ENTRY_FAILED = BLE_ERR(SMP, 0x01),
+    /// The OOB Data is not available.
+    BLE_SMP_ERR_OOB_NOT_AVAILABLE = BLE_ERR(SMP, 0x02),
+    /// The pairing procedure cannot be performed as authentication requirements
+    /// cannot be met due to IO capabilities of one or both devices.
+    BLE_SMP_ERR_AUTH_REQ = BLE_ERR(SMP, 0x03),
+    /// The confirm value does not match the calculated confirm value.
+    BLE_SMP_ERR_CONF_VAL_FAILED = BLE_ERR(SMP, 0x04),
+    /// Pairing is not supported by the device.
+    BLE_SMP_ERR_PAIRING_NOT_SUPP = BLE_ERR(SMP, 0x05),
+    /// The resultant encryption key size is insufficient for the security
+    /// requirements of this device.
+    BLE_SMP_ERR_ENC_KEY_SIZE = BLE_ERR(SMP, 0x06),
+    /// The SMP command received is not supported on this device.
+    BLE_SMP_ERR_CMD_NOT_SUPPORTED = BLE_ERR(SMP, 0x07),
+    /// Pairing failed due to an unspecified reason.
+    BLE_SMP_ERR_UNSPECIFIED_REASON = BLE_ERR(SMP, 0x08),
+    /// Pairing or Authentication procedure is disallowed because too little
+    /// time has elapsed since last pairing request or security request.
+    BLE_SMP_ERR_REPEATED_ATTEMPTS = BLE_ERR(SMP, 0x09),
+    /// The command length is invalid or a parameter is outside of the specified
+    /// range.
+    BLE_SMP_ERR_INVALID_PARAM = BLE_ERR(SMP, 0x0A),
+    /// Indicates to the remote device that the DHKey Check value received
+    /// doesn't match the one calculated by the local device.
+    BLE_SMP_ERR_DHKEY_CHECK_FAILED = BLE_ERR(SMP, 0x0B),
+    /// Indicates that the confirm values in the numeric comparison protocol do
+    /// not match.
+    BLE_SMP_ERR_NUMERIC_COMPARISON_FAILED = BLE_ERR(SMP, 0x0C),
+    /// Indicates that the pairing over the LE transport failed due to a Pairing
+    /// Request sent over the BR/EDR transport in process.
+    BLE_SMP_ERR_BREDR_PAIRING_IN_PROGRESS = BLE_ERR(SMP, 0x0D),
+    /// Indicates that the BR/EDR Link Key generated on the BR/EDR transport
+    /// cannot be used to derive and distribute keys for the LE transport.
+    BLE_SMP_ERR_CROSS_TRANSPORT_KEY_GENERATION_NOT_ALLOWED = BLE_ERR(SMP, 0x0E),
+    /// Indicates that the device chose not to accept a distributed key.
+    BLE_SMP_ERR_KEY_REJECTED = BLE_ERR(SMP, 0x0F),
+    /// Local SMP Specific Error
+    /// The signature verification failed.
+    BLE_SMP_ERR_SIGN_VERIF_FAIL = BLE_ERR(SMP, 0x10),
+    /// The encryption procedure failed because the slave device didn't find the
+    /// LTK needed to start an encryption session.
+    BLE_SMP_ERR_ENC_KEY_MISSING = BLE_ERR(SMP, 0x11),
+    /// The encryption procedure failed because the slave device doesn't support
+    /// the encryption feature.
+    BLE_SMP_ERR_ENC_NOT_SUPPORTED = BLE_ERR(SMP, 0x12),
+    /// A timeout has occurred during the start encryption session.
+    BLE_SMP_ERR_ENC_TIMEOUT = BLE_ERR(SMP, 0x13),
+    /// Undefined error.
+    BLE_SMP_ERR_UNDEFINED = BLE_ERR(SMP, 0xFF),
+
+    /// GAP Specific Error
+    /// Invalid parameters set.
+    BLE_GAP_ERR_INVALID_PARAM = BLE_ERR(GAP, 0x01),
+    /// Problem with protocol exchange, get unexpected response.
+    BLE_GAP_ERR_PROTOCOL_PROBLEM = BLE_ERR(GAP, 0x02),
+    /// Request not supported by software configuration.
+    BLE_GAP_ERR_NOT_SUPPORTED = BLE_ERR(GAP, 0x03),
+    /// Request not allowed in current state.
+    BLE_GAP_ERR_COMMAND_DISALLOWED = BLE_ERR(GAP, 0x04),
+    /// Requested operation canceled.
+    BLE_GAP_ERR_CANCELED = BLE_ERR(GAP, 0x05),
+    /// Requested operation timeout.
+    BLE_GAP_ERR_TIMEOUT = BLE_ERR(GAP, 0x06),
+    /// Link connection lost during operation.
+    BLE_GAP_ERR_DISCONNECTED = BLE_ERR(GAP, 0x07),
+    /// Search algorithm finished, but no result found.
+    BLE_GAP_ERR_NOT_FOUND = BLE_ERR(GAP, 0x08),
+    /// Request rejected by peer device.
+    BLE_GAP_ERR_REJECTED = BLE_ERR(GAP, 0x09),
+    /// Problem with privacy configuration.
+    BLE_GAP_ERR_PRIVACY_CFG_PB = BLE_ERR(GAP, 0x0A),
+    /// Duplicate or invalid advertising data.
+    BLE_GAP_ERR_ADV_DATA_INVALID = BLE_ERR(GAP, 0x0B),
+    /// Insufficient resources.
+    BLE_GAP_ERR_INSUFF_RESOURCES = BLE_ERR(GAP, 0x0C),
+    /// Unexpected error.
+    BLE_GAP_ERR_UNEXPECTED = BLE_ERR(GAP, 0x0D),
+    /// Undefined error.
+    BLE_GAP_ERR_UNDEFINED = BLE_ERR(GAP, 0xFF),
+} ble_err_code_t;
diff --git a/platform/atm2/ATM22xx-x1x/lib/ble_diss/ble_diss.h b/platform/atm2/ATM22xx-x1x/lib/ble_diss/ble_diss.h
new file mode 100644
index 0000000..9f09898
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/ble_diss/ble_diss.h
@@ -0,0 +1,78 @@
+/**
+ *******************************************************************************
+ *
+ * @file ble_diss.h
+ *
+ * @brief Device Information Service Server Module
+ *
+ * Copyright (C) Atmosic 2020-2021
+ *
+ *******************************************************************************
+ */
+
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_DISS Device information service procedures
+ * @ingroup ATM_BTFM_API
+ * @brief BLE bluetooth device information service procedures
+ *
+ * This module contains the necessary procedure to send the device information.
+ *
+ * @{
+ *******************************************************************************
+ */
+/*
+ * INCLUDE FILES
+ *******************************************************************************
+ */
+#include <stdint.h>
+#include "ble_gap.h"
+#include "ble_internal.h"
+#include "ble_prf_itf.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * DEFINITION
+ *******************************************************************************
+ */
+#define BLE_DISS_MODULE_NAME       "kdiss"
+
+/*
+ * GLOBAL VARIABLES DECLARATION
+ *******************************************************************************
+ */
+
+/*
+ * DEFINES
+ *******************************************************************************
+ */
+struct diss_param {
+    /// Security Level :
+    ///  7    6    5    4    3    2    1    0
+    /// +----+----+----+----+----+----+----+----+
+    /// |   Reserved   |DIS |  AUTH   |EKS | MI |
+    /// +----+----+----+----+----+----+----+----+
+    ///
+    /// - MI: 1 - Application task is a Multi-Instantiated task, 0 - Mono-Instantiated
+    /// Only applies for service - Ignored by collectors:
+    /// - EKS: Service needs a 16 bytes encryption key
+    /// - AUTH: 0 - Disable, 1 - Enable, 2 - Unauth, 3 - Auth
+    /// - DIS: Disable the service
+    uint8_t sec_lvl;
+    /// Supported Feature configuration
+    uint16_t feature;
+    void (*cb_value_req)(uint8_t, uint8_t const **, uint8_t *);
+};
+
+typedef const ble_prf_cbs_t *(ble_prf_get_cbs_t)(struct diss_param const *init);
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} ATM_BTFM_DISS
diff --git a/platform/atm2/ATM22xx-x1x/lib/ble_gap/ble_gap.h b/platform/atm2/ATM22xx-x1x/lib/ble_gap/ble_gap.h
new file mode 100644
index 0000000..867123a
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/ble_gap/ble_gap.h
@@ -0,0 +1,2192 @@
+/**
+ *******************************************************************************
+ *
+ * @file ble_gap.h
+ *
+ * @brief Header file - BLE GAP API.
+ *
+ * Copyright (C) Atmosic 2020-2023
+ *
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_BLE_GAP GAP API
+ * @ingroup ATM_BTFM_API
+ * @brief ATM bluetooth framework GAP API
+ *
+ * This module contains the necessary API to deal with the GAP messages.
+ *
+ * @{
+ *******************************************************************************
+ */
+
+
+/*
+ * INCLUDE FILES
+ *******************************************************************************
+ */
+
+#include "co_bt.h"     // Common BT Definitions
+#include "gap.h"       // GAP Definition
+#include "gapm.h"
+#include "gapc.h"
+#include "ble_common.h"
+#include "ble_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Key length
+#define BLE_GAP_KEY_LEN 16
+/// Random number number
+#define BLE_GAP_RAND_NB_LEN 8
+/// Maximum test TX power level
+#define BLE_GAP_MAX_TEST_TX_PWR_LVL 0x7F
+/// Minimum switching pattern length
+#define BLE_GAP_MIN_SWITCHING_PATTERN_LEN 2
+/// Maximum switching pattern length
+#define BLE_GAP_MAX_SWITCHING_PATTERN_LEN 0x4B
+/// LE Feature Flags Length
+#define BLE_GAP_LE_FEATS_LEN 8
+/// LE Channel map length
+#define BLE_GAP_LE_CHNL_MAP_LEN 5
+/// Scanning window (in 625us slot)
+#define BLE_SCAN_WINDOW_DFT 0x0010
+/// Scanning interval (in 625us slot)
+#define BLE_SCAN_INTERVAL_DFT 0x0010
+/// Database hash length
+#define BLE_GAP_DATABASE_HASH_LEN 16
+
+/*
+ * TYPEDEFINE
+ *******************************************************************************
+ */
+
+/// Random Address type
+typedef enum {
+    /// Static random address
+    BLE_GAP_STATIC_ADDR = 0xc0,
+    /// Private non-resolvable address
+    BLE_GAP_NON_RSLV_ADDR = 0x00,
+    /// Private resolvable address
+    BLE_GAP_RSLV_ADDR = 0x40,
+} ble_gapm_rand_addr_type_t;
+
+/// BLE ADV data type
+typedef enum {
+    /// Advertising data
+    BLE_GAPM_ADV_DATA,
+    /// Scan response data
+    BLE_GAPM_SCAN_RSP_DATA,
+    /// Periodic advertising data
+    BLE_GAPM_PERIOD_ADV_DATA
+} ble_gapm_data_type_t;
+
+typedef enum {
+    /// Extended advertising report
+    BLE_GAP_REPORT_TYPE_ADV_EXT,
+    /// Legacy advertising report
+    BLE_GAP_REPORT_TYPE_ADV_LEG,
+    /// Extended scan response report
+    BLE_GAP_REPORT_TYPE_SCAN_RSP_EXT,
+    /// Legacy scan response report
+    BLE_GAP_REPORT_TYPE_SCAN_RSP_LEG,
+    /// Periodic advertising report
+    BLE_GAP_REPORT_TYPE_PER_ADV,
+} ble_gap_adv_report_type_t;
+
+typedef enum {
+    /// Report Type (see ble_gap_adv_report_type_t)
+    BLE_GAP_REPORT_INFO_REPORT_TYPE_MASK = 0x07,
+    /// Report is complete
+    BLE_GAP_REPORT_INFO_COMPLETE_BIT = (1 << 3),
+    /// Connectable advertising
+    BLE_GAP_REPORT_INFO_CONN_ADV_BIT = (1 << 4),
+    /// Scannable advertising
+    BLE_GAP_REPORT_INFO_SCAN_ADV_BIT = (1 << 5),
+    /// Directed advertising
+    BLE_GAP_REPORT_INFO_DIR_ADV_BIT = (1 << 6),
+} ble_gap_adv_report_info_t;
+
+/// Packet payload type for test mode
+typedef enum {
+    /// PRBS9 sequence "11111111100000111101..." (in transmission order)
+    BLE_GAP_PKT_PLD_PRBS9,
+    /// Repeated "11110000" (in transmission order)
+    BLE_GAP_PKT_PLD_REPEATED_11110000,
+    /// Repeated "10101010" (in transmission order)
+    BLE_GAP_PKT_PLD_REPEATED_10101010,
+    /// PRBS15 sequence
+    BLE_GAP_PKT_PLD_PRBS15,
+    /// Repeated "11111111" (in transmission order) sequence
+    BLE_GAP_PKT_PLD_REPEATED_11111111,
+    /// Repeated "00000000" (in transmission order) sequence
+    BLE_GAP_PKT_PLD_REPEATED_00000000,
+    /// Repeated "00001111" (in transmission order) sequence
+    BLE_GAP_PKT_PLD_REPEATED_00001111,
+    /// Repeated "01010101" (in transmission order) sequence
+    BLE_GAP_PKT_PLD_REPEATED_01010101,
+} ble_gap_pkt_pld_type_t;
+
+/// Enumeration of TX PHY values
+typedef enum {
+    /// LE 1M PHY
+    BLE_GAP_TX_PHY_1MBPS = 1,
+    /// LE 2M PHY
+    BLE_GAP_TX_PHY_2MBPS = 2,
+    /// LE Coded PHY with S=8 data coding
+    BLE_GAP_TX_PHY_125KBPS = 3,
+    /// LE Coded PHY with S=2 data coding
+    BLE_GAP_TX_PHY_500KBPS = 4,
+} ble_gap_tx_phy_val_t;
+
+/// Enumeration of RX PHY values
+typedef enum {
+    /// LE 1M PHY
+    BLE_GAP_RX_PHY_1MBPS = 1,
+    /// LE 2M PHY
+    BLE_GAP_RX_PHY_2MBPS = 2,
+    /// LE Coded PHY
+    BLE_GAP_RX_PHY_CODED = 3,
+} ble_gap_rx_phy_val_t;
+
+/// Enumeration of PHY values
+typedef enum {
+    /// LE 1M PHY
+    BLE_GAP_PHY_1MBPS = 1,
+    /// LE 2M PHY
+    BLE_GAP_PHY_2MBPS = 2,
+    /// LE Coded PHY
+    BLE_GAP_PHY_CODED = 3,
+} ble_gap_phy_val_t;
+
+/// Constant tone extension type
+typedef enum {
+    /// AoA constant tone extension
+    BLE_GAP_CTE_AOA,
+    /// AoD constant tone extension with 1 us slots
+    BLE_GAP_CTE_AOD_1US,
+    /// AoD constant tone extension with 2 us slots
+    BLE_GAP_CTE_AOD_2US,
+} ble_gap_cte_type_t;
+
+/// LE transmitter test parameters
+typedef struct {
+    /// TX channel (range: 0x00 to 0x27)
+    uint8_t ch;
+    /// Length in bytes of payload data in each packet
+    uint8_t test_data_len;
+    /// Packet payload type
+    ble_gap_pkt_pld_type_t pkt_pld_type;
+    /// PHY
+    ble_gap_tx_phy_val_t phy;
+    /// CTE length
+    uint8_t cte_len;
+    /// CTE type
+    ble_gap_cte_type_t cte_type;
+    /// Transmit power level in dBm (0x7E: minimum | 0x7F: maximum | range: -127
+    /// to +20)
+    int8_t tx_pwr_lvl;
+    /// The number of antenna IDs in the pattern (range: 0x02 to 0x4B)
+    uint8_t switching_pattern_len;
+    /// Antenna IDs
+    uint8_t antenna_id[__ARRAY_EMPTY];
+} ble_gap_test_tx_param_t;
+
+/// Modulation index
+typedef enum {
+    /// Assume transmitter will have a standard modulation index
+    BLE_GAP_MODULATION_STANDARD,
+    /// Assume transmitter will have a stable modulation index
+    BLE_GAP_MODULATION_STABLE,
+} ble_gap_mod_idx_t;
+
+/// Slot durations
+typedef enum {
+    /// Switching and sampling slots are 1 μs each
+    BLE_GAP_SLOT_DUR_1US = 1,
+    /// Switching and sampling slots are 2 μs each
+    BLE_GAP_SLOT_DUR_2US,
+} ble_gap_slot_dur_t;
+
+/// LE receiver test parameters
+typedef struct {
+    /// RX channel (range: 0x00 to 0x27)
+    uint8_t ch;
+    /// PHY
+    ble_gap_rx_phy_val_t phy;
+    /// Modulation index
+    ble_gap_mod_idx_t mod_idx;
+    /// Expected CTE length
+    uint8_t exp_cte_len;
+    /// Expected CTE type
+    ble_gap_cte_type_t exp_cte_type;
+    /// Slot durations
+    ble_gap_slot_dur_t slot_dur;
+    /// The number of antenna IDs in the pattern (range: 0x02 to 0x4B)
+    uint8_t switching_pattern_len;
+    /// Antenna IDs
+    uint8_t antenna_id[__ARRAY_EMPTY];
+} ble_gap_test_rx_param_t;
+
+/// BLE ADV channel selection
+typedef enum {
+    /// Channel 37
+    ADV_37_CHNL = (1 << 0),
+    /// Channel 38
+    ADV_38_CHNL = (1 << 1),
+    /// Channel 39
+    ADV_39_CHNL = (1 << 2),
+    /// Channel 37, 38 and 39
+    ADV_ALL_CHNLS = ADV_37_CHNL | ADV_38_CHNL | ADV_39_CHNL
+} ble_adv_chnl_t;
+
+/// Advertising properties bit field bit value
+typedef enum {
+    /// Indicate that advertising is connectable, reception of
+    /// CONNECT_IND or AUX_CONNECT_REQ PDUs is accepted. Not applicable
+    /// for periodic advertising.
+    ADV_PROP_CONNECTABLE_BIT = (1 << 0),
+    /// Indicate that advertising is scannable, reception of SCAN_REQ or
+    /// AUX_SCAN_REQ PDUs is accepted
+    ADV_PROP_SCANNABLE_BIT = (1 << 1),
+    /// Indicate that advertising targets a specific device. Only apply
+    /// in
+    /// following cases:
+    ///   - Legacy advertising: if connectable
+    ///   - Extended advertising: connectable or (non connectable and
+    /// non discoverable)
+    ADV_PROP_DIRECTED_BIT = (1 << 2),
+    /// Indicate that High Duty Cycle has to be used for advertising on
+    /// primary channel Apply only if created advertising is not an
+    /// extended advertising
+    ADV_PROP_HDC_BIT = (1 << 3),
+    /// Reserved for bit 4
+    ADV_PROP_RESERVED_4_BIT = (1 << 4),
+    /// Enable anonymous mode. Device address won't appear in send PDUs
+    /// Valid only if created advertising is an extended advertising
+    ADV_PROP_ANONYMOUS_BIT = (1 << 5),
+    /// Include TX Power in the extended header of the advertising PDU.
+    /// Valid only if created advertising is not a legacy advertising
+    ADV_PROP_TX_PWR_BIT = (1 << 6),
+    /// Include TX Power in the periodic advertising PDU.
+    /// Valid only if created advertising is a periodic advertising
+    ADV_PROP_PER_TX_PWR_BIT = (1 << 7),
+    /// Indicate if application must be informed about received scan
+    /// requests PDUs
+    ADV_PROP_SCAN_REQ_NTF_EN_BIT = (1 << 8),
+} ble_adv_prop_t;
+
+/// Leggacy advertising properties. Used when type is ADV_TYPE_LEGACY
+enum adv_crt_leg_prop {
+    /// Non connectable non scannable advertising
+    ADV_LEGACY_NON_CONN_NON_SCAN_MASK,
+    /// Broadcast non scannable advertising - Discovery mode must be
+    /// Non Discoverable
+    ADV_LEGACY_BROADCAST_NON_SCAN_MASK =
+	ADV_LEGACY_NON_CONN_NON_SCAN_MASK,
+    /// Non connectable scannable advertising
+    ADV_LEGACY_NON_CONN_SCAN_MASK = ADV_PROP_SCANNABLE_BIT,
+    /// Broadcast non scannable advertising - Discovery mode must be Non
+    /// Discoverable
+    ADV_LEGACY_BROADCAST_SCAN_MASK = ADV_LEGACY_NON_CONN_SCAN_MASK,
+    /// Undirected connectable advertising
+    ADV_LEGACY_UNDIR_CONN_MASK = ADV_PROP_CONNECTABLE_BIT |
+	ADV_PROP_SCANNABLE_BIT,
+    /// Directed connectable advertising
+    ADV_LEGACY_DIR_CONN_MASK = ADV_PROP_DIRECTED_BIT |
+	ADV_PROP_CONNECTABLE_BIT,
+    /// Directed connectable with Low Duty Cycle
+    ADV_LEGACY_DIR_CONN_LDC_MASK = ADV_LEGACY_DIR_CONN_MASK,
+    /// Directed connectable with High Duty Cycle
+    ADV_LEGACY_DIR_CONN_HDC_MASK = ADV_LEGACY_DIR_CONN_MASK |
+	ADV_PROP_HDC_BIT,
+};
+
+/// Leggacy advertising properties. Used when type is ADV_TYPE_EXTENDED
+enum adv_crt_ext_prop {
+    /// Non connectable non scannable extended advertising
+    ADV_EXT_NON_CONN_NON_SCAN_MASK,
+    /// Non connectable scannable extended advertising
+    ADV_EXT_NON_CONN_SCAN_MASK = ADV_PROP_SCANNABLE_BIT,
+    /// Non connectable scannable directed extended advertising
+    ADV_EXT_NON_CONN_SCAN_DIR_MASK = ADV_PROP_SCANNABLE_BIT |
+	ADV_PROP_DIRECTED_BIT,
+    /// Non connectable anonymous directed extended advertising
+    ADV_EXT_ANONYM_DIR_MASK = ADV_PROP_ANONYMOUS_BIT |
+	ADV_PROP_DIRECTED_BIT,
+    /// Undirected connectable extended advertising
+    ADV_EXT_UNDIR_CONN_MASK = ADV_PROP_CONNECTABLE_BIT,
+    /// Directed connectable extended advertising
+    ADV_EXT_DIR_CONN_MASK = ADV_PROP_CONNECTABLE_BIT |
+	ADV_PROP_DIRECTED_BIT,
+};
+
+/// Periodic advertising properties. Used when type is ADV_TYPE_PERIODIC
+enum adv_crt_per_prop {
+    /// Undirected periodic advertising
+    ADV_PER_UNDIR_MASK,
+    /// Directed periodic advertising
+    ADV_PER_DIR_MASK = ADV_PROP_DIRECTED_BIT,
+};
+
+/// Advertising parameters for advertising creation
+typedef struct {
+    /// Advertising type
+    enum adv_crt_type {
+	/// Legacy advertising
+	ADV_TYPE_LEGACY,
+	/// Extended advertising
+	ADV_TYPE_EXTENDED,
+	/// Periodic advertising
+	ADV_TYPE_PERIODIC,
+    } type;
+
+    /// Advertising discovery mode
+    enum adv_crt_mode {
+	/// Mode in non-discov rable
+	ADV_MODE_NON_DISC,
+	/// Mode in general discoverable
+	ADV_MODE_GEN_DISC,
+	/// Mode in limited discoverable
+	ADV_MODE_LIM_DISC,
+	/// Broadcast mode without presence of AD_TYPE_FLAG in advertising data
+	ADV_MODE_BEACON,
+	/// Number of mode
+	ADV_MODE_MAX,
+    } disc_mode;
+
+    /// Advertising property
+    /// This may come from OR operation of values of ble_adv_prop_t
+    /// with one of value from @see enum adv_crt_leg_prop,
+    /// @see enum adv_crt_ext_prop or @see enum adv_crt_per_prop.
+    uint16_t prop;
+
+    /// Maximum power level at which the advertising packets have to be
+    /// transmitted (between -127 and 126 dBm)
+    int8_t max_tx_pwr;
+    /// Advertising filter policy
+    enum adv_crt_filter_policy {
+	/// Allow both scan and connection requests from anyone
+	FILTER_SCAN_ANY_CON_ANY,
+	/// Allow both scan req from White List devices only and connection req
+	/// from anyone
+	FILTER_SCAN_WLST_CON_ANY,
+	/// Allow both scan req from anyone and connection req from White List
+	/// devices only
+	FILTER_SCAN_ANY_CON_WLST,
+	/// Allow scan and connection requests from White List devices only
+	FILTER_SCAN_WLST_CON_WLST,
+    } filter_pol;
+    /// Peer address configuration (only used in case of directed advertising)
+    ble_gap_bdaddr_t peer_addr;
+    /// Configuration for advertising on primary channel
+    struct primary_config {
+	/// Minimum advertising interval (in unit of 625us). Must be greater
+	/// than 20ms
+	uint32_t adv_intv_min;
+	/// Maximum advertising interval (in unit of 625us). Must be greater
+	/// than 20ms
+	uint32_t adv_intv_max;
+	/// Bit field indicating the channel mapping. Bit number 0/1/2 is
+	/// channel number 37/38/39.
+	ble_adv_chnl_t chnl_map;
+	/// Note that LE 2M PHY is not allowed and that legacy advertising only
+	/// support LE 1M PHY
+	ble_gap_phy_val_t phy;
+    } prim_cfg;
+    /// Configuration for secondary advertising (valid only if advertising type
+    /// is ADV_TYPE_EXTENDED or ADV_TYPE_PERIODIC)
+    struct second_config {
+	/// Maximum number of advertising events the controller can skip before
+	/// sending the
+	/// AUX_ADV_IND packets. 0 means that AUX_ADV_IND PDUs shall be sent
+	/// prior each
+	/// advertising events
+	uint8_t max_skip;
+	/// Indicate on which PHY secondary advertising has to be performed
+	ble_gap_phy_val_t phy;
+	/// Advertising SID
+	uint8_t adv_sid;
+    } second_cfg;
+    /// Configuration for periodic advertising (valid only if advertising type
+    /// is ADV_TYPE_PERIODIC)
+    struct periodic_config {
+	/// Minimum advertising interval (in unit of 1.25ms). Must be greater
+	/// than 20ms
+	uint16_t adv_intv_min;
+	/// Maximum advertising interval (in unit of 1.25ms). Must be greater
+	/// than 20ms
+	uint16_t adv_intv_max;
+    } period_cfg;
+} ble_gapm_adv_create_param_t;
+
+/// Generic key structure
+typedef struct {
+    /// Key value MSB -> LSB
+    uint8_t key[BLE_GAP_KEY_LEN];
+} ble_gap_key_t;
+
+typedef struct {
+    /// Identity Resolving Key
+    ble_gap_key_t irk;
+    /// Device BD Identity Address
+    ble_gap_bdaddr_t addr;
+} ble_gap_irk_t;
+
+/// Bit field use to select the preferred TX or RX LE PHY. 0 means no
+/// preferences.
+typedef enum {
+    /// No preferred PHY.
+    BLE_GAP_PHY_ANY = 0x00,
+    /// LE 1M PHY preferred for an active link.
+    BLE_GAP_PHY_LE_1MBPS = (1 << 0),
+    /// LE 2M PHY preferred for an active link.
+    BLE_GAP_PHY_LE_2MBPS = (1 << 1),
+    /// LE Coded PHY preferred for an active link.
+    BLE_GAP_PHY_LE_CODED = (1 << 2),
+} ble_gap_phy_mode_t;
+
+/// Specify what rate Host prefers to use in transmission on coded PHY. refer to
+/// HCI: 7.8.49
+typedef enum {
+    /// No preferred coding when transmitting on the LE Coded PHY.
+    BLE_GAP_PHY_OPT_NO_LE_CODED_TX_PREF,
+    /// Prefers that S=2 coding be used when transmitting on the LE Coded PHY.
+    BLE_GAP_PHY_OPT_S2_LE_CODED_TX_PREF,
+    /// Prefers that S=8 coding be used when transmitting on the LE Coded PHY.
+    BLE_GAP_PHY_OPT_S8_LE_CODED_TX_PREF,
+} ble_gap_phy_opt_t;
+
+typedef enum {
+    /// No role set yet
+    BLE_GAP_ROLE_NONE = 0x00,
+    /// Observer role
+    BLE_GAP_ROLE_OBSERVER = 0x01,
+    /// Broadcaster role
+    BLE_GAP_ROLE_BROADCASTER = 0x02,
+    /// Master/Central role
+    BLE_GAP_ROLE_CENTRAL = (0x04 | BLE_GAP_ROLE_OBSERVER),
+    /// Peripheral/Slave role
+    BLE_GAP_ROLE_PERIPHERAL = (0x08 | BLE_GAP_ROLE_BROADCASTER),
+    /// Device has all role, both peripheral and central
+    BLE_GAP_ROLE_ALL = (BLE_GAP_ROLE_CENTRAL | BLE_GAP_ROLE_PERIPHERAL),
+} ble_gap_role_t;
+
+/// Privacy configuration
+typedef enum {
+    /// Identity address type. Public address:0, Static private random
+    /// address:1
+    BLE_GAP_PRIV_CFG_PRIV_ADDR_BIT = (1 << 0),
+    /// Reserved
+    BLE_GAP_PRIV_CFG_RSVD = (1 << 1),
+    /// Enable controller privacy
+    BLE_GAP_PRIV_CFG_PRIV_EN_BIT = (1 << 2),
+} ble_gap_priv_cfg_t;
+
+/// Pairing Mode
+typedef enum {
+    /// No pairing authorized
+    BLE_GAP_PAIRING_DISABLE = 0,
+    /// Legacy pairing Authorized
+    BLE_GAP_PAIRING_LEGACY = (1 << 0),
+    /// Secure Connection pairing Authorized
+    BLE_GAP_PAIRING_SEC_CON = (1 << 1),
+} ble_gap_pairing_mode_t;
+
+/// Device Attribute write permission requirement
+typedef enum {
+    /// Disable write access
+    BLE_GAP_WRITE_DISABLE,
+    /// Enable write access - no authentication required
+    BLE_GAP_WRITE_NO_AUTH,
+    /// Write access requires unauthenticated link
+    BLE_GAP_WRITE_UNAUTH,
+    /// Write access requires authenticated link
+    BLE_GAP_WRITE_AUTH,
+    /// Write access requires secure connected link
+    BLE_GAP_WRITE_SEC_CON,
+} ble_gap_write_att_perm_t;
+
+/// Attribute database configuration
+///    8    7     6    5    4    3    2    1    0
+/// +-----+----+-----+----+----+----+----+----+----+
+/// | MTU | SC | PCP |   APP_PERM   |   NAME_PERM  |
+/// +-----+----+-----+----+----+----+----+----+----+
+///   15   14   13   12    11     10    9
+/// +----+----+----+----+------+------+----+
+/// |        RFU        | RPAO | EATT | FE |
+/// +----+----+----+----+------+------+----+
+/// - Bit [0-2]  : Device Name write permission requirements for peer device.
+///                (@see ble_gap_write_att_perm_t)
+/// - Bit [3-5]  : Device Appearance write permission requirements for peer
+///                device (@see ble_gap_write_att_perm_t)
+/// - Bit [6]    : Peripheral Preferred Connection Parameters present.
+/// - Bit [7]    : Service change feature present in GATT attribute database.
+/// - Bit [8]    : Enable automatic MTU exchange at connection establishment.
+/// - Bit [9]    : Enable automatic client feature enable setup at connection
+///                establishment.
+/// - Bit [10]   : Enable automatic establishment of Enhanced ATT bearers.
+/// - Bit [11]   : Enable presence of Resolvable private address only.
+/// - Bit [12-15]: Reserve for future use.
+typedef enum {
+    /// Device Name write permission requirements for peer device
+    /// (@see ble_gap_write_att_perm_t)
+    BLE_GAP_ATT_NAME_PERM_MASK = 0x0007,
+    BLE_GAP_ATT_NAME_PERM_POS = 0,
+    /// Device Appearance write permission requirements for peer device
+    /// (@see ble_gap_write_att_perm_t)
+    BLE_GAP_ATT_APPEARENCE_PERM_MASK = 0x0038,
+    BLE_GAP_ATT_APPEARENCE_PERM_POS = 3,
+    /// Peripheral Preferred Connection Parameters present in GAP attribute
+    /// database.
+    BLE_GAP_ATT_PERIPH_PREF_CON_PAR_EN_MASK  = 0x0040,
+    BLE_GAP_ATT_PERIPH_PREF_CON_PAR_EN_POS  = 6,
+    /// Service change feature present in GATT attribute database.
+    BLE_GAP_ATT_SVC_CHG_EN_MASK = 0x0080,
+    BLE_GAP_ATT_SVC_CHG_EN_POS = 7,
+    /// Automatic MTU exchange at connection establishment.
+    BLE_GAP_ATT_CLI_AUTO_MTU_EXCH_EN_MASK = 0x0100,
+    BLE_GAP_ATT_CLI_AUTO_MTU_EXCH_EN_POS = 8,
+    /// Automatic client feature enable
+    BLE_GAP_ATT_CLI_AUTO_FEAT_EN_MASK = 0x0200,
+    BLE_GAP_ATT_CLI_AUTO_FEAT_EN_POS = 9,
+    /// Automatic establishment of Enhanced ATT bearers.
+    BLE_GAP_ATT_CLI_AUTO_EATT_EN_MASK = 0x0400,
+    BLE_GAP_ATT_CLI_AUTO_EATT_POS = 10,
+    /// Presence of Resolvable private address only.
+    BLE_GAP_ATT_RSLV_PRIV_ADDR_ONLY_MASK = 0x0800,
+    BLE_GAP_ATT_RSLV_PRIV_ADDR_ONLY_POS = 11,
+} ble_gap_att_cfg_flag_t;
+
+typedef struct {
+    /// Device Role: Central, Peripheral, Observer, Broadcaster or All roles.
+    ble_gap_role_t role;
+
+    /// Privacy Config
+    /// Duration before regenerate device address when privacy is enabled.
+    /// unit:sec
+    uint16_t renew_dur;
+    /// Provided own static private random address
+    ble_bdaddr_t addr;
+    /// Device IRK used for resolvable random BD address generation (LSB first)
+    ble_gap_key_t irk;
+    /// Privacy configuration bit field
+    ble_gap_priv_cfg_t privacy_cfg;
+
+    /// Security Config
+    /// Pairing mode authorized
+    ble_gap_pairing_mode_t pairing_mode;
+
+    /// ATT Database Config
+    /// GAP service start handle
+    uint16_t gap_start_hdl;
+    /// GATT service start handle
+    uint16_t gatt_start_hdl;
+    /// Attribute database configuration
+    ble_gap_att_cfg_flag_t att_cfg;
+
+    /// LE Data Length Extension
+    /// Suggested value for the Controller's maximum transmitted number of
+    /// payload octets to be used
+    uint16_t sugg_max_tx_octets;
+    /// Suggested value for the Controller's maximum packet transmission time to
+    /// be used (unit: micro sec)
+    uint16_t sugg_max_tx_time;
+
+    /// L2CAP Configuration
+    /// Maximal MTU size
+    uint16_t max_mtu;
+    /// Maximal MPS Packet size
+    uint16_t max_mps;
+    /// Maximum number of LE Credit based connection that can be established
+    uint8_t max_nb_lecb;
+
+    /// LE PHY Management
+    /// Preferred LE PHY for data transmission
+    ble_gap_phy_mode_t tx_pref_phy;
+    /// Preferred LE PHY for data reception
+    ble_gap_phy_mode_t rx_pref_phy;
+
+    /// Other settings
+    /// RF TX Path Compensation value (from -128dB to 128dB, unit is 0.1dB)
+    uint16_t tx_path_comp;
+    /// RF RX Path Compensation value (from -128dB to 128dB, unit is 0.1dB)
+    uint16_t rx_path_comp;
+} ble_gap_set_dev_config_t;
+
+/// BLE peer info type
+typedef enum {
+    /// Retrieve name of peer device.
+    BLE_GAP_GET_PEER_NAME,
+    /// Retrieve peer device version info.
+    BLE_GAP_GET_PEER_VERSION,
+    /// Retrieve peer device features.
+    BLE_GAP_GET_PEER_FEATURES,
+    /// Retrieve connection RSSI.
+    BLE_GAP_GET_CON_RSSI,
+    /// Retrieve connection channel map.
+    BLE_GAP_GET_CON_CHANNEL_MAP,
+    /// Get peer device appearance.
+    BLE_GAP_GET_PEER_APPEARANCE,
+    /// Get peer device peripheral preferred parameters.
+    BLE_GAP_GET_PEER_PERIPH_PREF_PARAMS,
+    /// Get timer timeout value.
+    BLE_GAP_GET_LE_PING_TO,
+    /// Central address resolution supported.
+    BLE_GAP_GET_ADDR_RESOL_SUPP,
+    /// Retrieve PHY configuration of active link.
+    BLE_GAP_GET_PHY,
+    /// Retrieve channel selection algorithm.
+    BLE_GAP_GET_CHAN_SEL_ALGO,
+} ble_gap_link_info_type_t;
+
+/// Peer irk structure
+typedef struct {
+    /// irk information
+    ble_gap_irk_t irk;
+    /// Bonding Index
+    int idx;
+} ble_gap_irk_idx_t;
+
+/// Resolving address command complete event data structure
+typedef struct {
+    /// Index of irk
+    uint8_t index;
+    /// Number of irk
+    uint8_t nb;
+    /// Irk
+    ble_gap_irk_idx_t irk[__ARRAY_EMPTY];
+} resl_addr_t;
+
+/// Connection parameter
+typedef struct {
+    /// Connection interval minimum
+    uint16_t intv_min;
+    /// Connection interval maximum
+    uint16_t intv_max;
+    /// Latency
+    uint16_t latency;
+    /// Supervision timeout
+    uint16_t time_out;
+} ble_gap_conn_param_t;
+
+typedef struct {
+    /// GAP requested operation
+    uint8_t operation;
+    /// Status of the request
+    uint8_t status;
+} gapm_cmp_evt_t;
+
+/// The list of names for registered gap event function.
+typedef enum {
+    /// Handler in atm_gap.
+    GAP_EVT_NAME_ATM_GAP,
+    /// Handler in ble_gap_sec.
+    GAP_EVT_NAME_BLE_GAP_SEC,
+    /// Handler in test.
+    GAP_EVT_NAME_TEST,
+    /// Max number of this enumerations.
+    GAP_EVT_NAME_MAX,
+} ble_gap_evt_reg_name_t;
+
+typedef struct {
+    /// 8-byte array for random number
+    uint8_t nb[BLE_GAP_RAND_NB_LEN];
+} ble_rand_nb_t;
+
+typedef struct ble_gap_ext_adv_report_ind {
+    /// Bit field info
+    ble_gap_adv_report_info_t info;
+    /// Transmitter device address
+    ble_gap_bdaddr_t trans_addr;
+    /// Target device address
+    /// Valid only for directed advertising report
+    ble_gap_bdaddr_t target_addr;
+    /// TX power (in dBm)
+    int8_t tx_pwr;
+    /// RSSI (between -127 and +20 dBm)
+    int8_t rssi;
+    /// Primary PHY (1:1M, 3:Coded)
+    uint8_t phy_prim;
+    /// Secondary PHY (0:No packet on secondary phy, 1:1M, 2:2M, 3:Coded)
+    uint8_t phy_second;
+    /// Advertising SID
+    /// Valid only for periodic advertising report
+    uint8_t adv_sid;
+    /// Periodic advertising interval (in unit of 1.25ms, min is 7.5ms)
+    /// Valid only for periodic advertising report
+    uint16_t period_adv_intv;
+    /// Report length
+    uint16_t length;
+    /// Report
+    uint8_t data[__ARRAY_EMPTY];
+} ble_gap_ind_ext_adv_report_t;
+
+/// Device name
+typedef struct {
+    /// Name length
+    uint16_t value_length;
+    /// Name value (starting from offset to maximum length for BLE_GAP_DEV_NAME
+    /// request)
+    uint8_t value[__ARRAY_EMPTY];
+} ble_gap_dev_name_t;
+
+typedef struct {
+    uint8_t con_idx;
+    ble_gap_dev_name_t param;
+} ble_gap_le_dev_name_t;
+
+typedef struct {
+    uint8_t con_idx;
+    /// Appearance Icon
+    uint16_t appearance;
+} ble_gap_le_appearance_t;
+
+/// Peripheral preference parameters
+typedef struct {
+    /// Connection interval minimum
+    uint16_t con_intv_min;
+    /// Connection interval maximum
+    uint16_t con_intv_max;
+    /// Peripheral latency
+    uint16_t periph_latency;
+    /// Connection supervision timeout multiplier
+    uint16_t con_timeout;
+} ble_gap_periph_pref_t;
+
+typedef struct {
+    uint8_t con_idx;
+    ble_gap_periph_pref_t param;
+} ble_gap_le_periph_pref_t;
+
+typedef struct {
+    uint8_t con_idx;
+    /// Resolvable Private address only
+    uint8_t rslv_priv_addr_only;
+} ble_gap_le_rslv_priv_addr_only_t;
+
+/// Peer version info
+typedef struct {
+    /// Manufacturer name
+    uint16_t comp_id;
+    /// LMP subversion
+    uint16_t lmp_subvers;
+    /// LMP version
+    uint8_t lmp_vers;
+} ble_gap_peer_version_t;
+
+typedef struct {
+    uint8_t con_idx;
+    ble_gap_peer_version_t param;
+} ble_gap_le_peer_version_t;
+
+/// Peer features info
+typedef struct {
+    /// 8-byte array for LE features
+    uint8_t features[BLE_GAP_LE_FEATS_LEN];
+} ble_gap_peer_features_t;
+
+typedef struct {
+    uint8_t con_idx;
+    ble_gap_peer_features_t param;
+} ble_gap_le_peer_features_t;
+
+/// Ongoing connection RSSI
+typedef struct {
+    /// RSSI value
+    int8_t rssi;
+} ble_gap_con_rssi_t;
+
+typedef struct {
+    uint8_t con_idx;
+    ble_gap_con_rssi_t param;
+} ble_gap_le_con_rssi_t;
+
+/// Channel map structure
+typedef struct {
+    /// 5-byte channel map array
+    uint8_t map[BLE_GAP_LE_CHNL_MAP_LEN];
+} ble_chnl_map_t;
+
+/// Ongoing connection Channel Map
+typedef struct {
+    /// Channel map value
+    ble_chnl_map_t ch_map;
+} ble_gap_con_channel_map_t;
+
+typedef struct {
+    uint8_t con_idx;
+    ble_gap_con_channel_map_t param;
+} ble_gap_le_con_channel_map_t;
+
+/// LE Ping
+typedef struct {
+    /// Authenticated payload timeout
+    uint16_t timeout;
+} ble_gap_le_ping_to_val_t;
+
+typedef struct {
+    uint8_t con_idx;
+    ble_gap_le_ping_to_val_t param;
+} ble_gap_le_le_ping_to_val_t;
+
+/// Active link PHY configuration. Triggered when configuration is read or
+/// during an update.
+typedef struct {
+    /// LE PHY for data transmission.
+    ble_gap_phy_val_t tx_phy;
+    /// LE PHY for data reception.
+    ble_gap_phy_val_t rx_phy;
+} ble_gap_le_phy_t;
+
+typedef struct {
+    uint8_t con_idx;
+    ble_gap_le_phy_t param;
+} ble_gap_le_le_phy_t;
+
+/// Channel selection algorithm
+typedef struct {
+    /// Used channel selection algorithm
+    uint8_t chan_sel_algo;
+} ble_gap_chan_sel_algo_t;
+
+typedef struct {
+    uint8_t con_idx;
+    ble_gap_chan_sel_algo_t param;
+} ble_gap_le_chan_sel_algo_t;
+
+/// Response data of @ref ble_gapc_get_link_info
+typedef struct {
+    /// Get information type.
+    ble_gap_link_info_type_t type;
+    union {
+	/// Data for BLE_GAP_GET_PEER_NAME type
+	ble_gap_le_dev_name_t name;
+	/// Data for BLE_GAP_GET_PEER_APPEARANCE type
+	ble_gap_le_appearance_t appearance;
+	/// Data for BLE_GAP_GET_PEER_PERIPH_PREF_PARAMS type
+	ble_gap_le_periph_pref_t periph_pref;
+	/// Data for BLE_GAP_GET_ADDR_RESOL_SUPP type
+	ble_gap_le_rslv_priv_addr_only_t rslv_priv_addr_only;
+	/// Data for BLE_GAP_GET_PEER_VERSION type
+	ble_gap_le_peer_version_t peer_ver;
+	/// Data for BLE_GAP_GET_PEER_FEATURES type
+	ble_gap_le_peer_features_t peer_feat;
+	/// Data for BLE_GAP_GET_CON_RSSI type
+	ble_gap_le_con_rssi_t con_rssi;
+	/// Data for BLE_GAP_GET_CON_CHANNEL_MAP type
+	ble_gap_le_con_channel_map_t con_chnl_map;
+	/// Data for BLE_GAP_GET_LE_PING_TO type
+	ble_gap_le_le_ping_to_val_t le_ping_to;
+	/// Data for BLE_GAP_GET_PHY type
+	ble_gap_le_le_phy_t le_phy;
+	/// Data for BLE_GAP_GET_CHAN_SEL_ALGO type
+	ble_gap_le_chan_sel_algo_t chan_sel_algo;
+    };
+} ble_gap_link_info_t;
+
+typedef struct {
+    /// Activity identifier
+    uint8_t actv_idx;
+    /// Activity stop reason
+    ble_err_code_t reason;
+    /// In case of periodic advertising, indicate if periodic advertising
+    /// has been stopped
+    uint8_t per_adv_stop;
+} ble_gap_ind_stop_t;
+
+typedef struct {
+    /// Connection handle
+    uint16_t conhdl;
+    /// Connection interval
+    uint16_t con_interval;
+    /// Connection latency
+    uint16_t con_latency;
+    /// Supervision timeout
+    uint16_t sup_to;
+    /// Clock accuracy
+    uint8_t clk_accuracy;
+    /// Peer address type
+    uint8_t peer_addr_type;
+    /// Peer BT address
+    ble_bdaddr_t peer_addr;
+    /// Role of device in connection (0 = Central / 1 = Peripheral)
+    uint8_t role;
+} ble_gap_ind_con_est_t;
+
+typedef struct {
+    /// Connection index
+    uint8_t conidx;
+    /// Connection parameter
+    ble_gap_ind_con_est_t param;
+} ble_gap_ind_le_con_est_t;
+
+/// Long Term Key information
+typedef struct {
+    /// Long Term Key
+    ble_gap_key_t ltk;
+    /// Encryption Diversifier
+    uint16_t ediv;
+    /// Random Number
+    ble_rand_nb_t randnb;
+    /// Encryption key size (7 to 16)
+    uint8_t key_size;
+} ble_gap_ltk_t;
+
+typedef struct {
+    /// Connection index
+    uint8_t conidx;
+    /// Long Term Key information
+    ble_gap_ltk_t ltk;
+} ble_gap_ind_le_ltk_t;
+
+typedef struct {
+    /// Connection index
+    uint8_t conidx;
+} ble_gap_ind_le_repeated_attempt_t;
+
+/// Authentication mask
+typedef enum {
+    /// No Flag set
+    BLE_GAP_AUTH_NONE = 0,
+    /// Bond authentication
+    BLE_GAP_AUTH_BOND = (1 << 0),
+    /// Man In the middle protection
+    BLE_GAP_AUTH_MITM = (1 << 2),
+    /// Secure Connection
+    BLE_GAP_AUTH_SEC_CON = (1 << 3),
+    /// Key Notification
+    BLE_GAP_AUTH_KEY_NOTIF = (1 << 4),
+} ble_gap_auth_mask_t;
+
+/// Authentication Requirements
+typedef enum {
+    /// No MITM No Bonding
+    BLE_GAP_AUTH_REQ_NO_MITM_NO_BOND = BLE_GAP_AUTH_NONE,
+    /// No MITM Bonding
+    BLE_GAP_AUTH_REQ_NO_MITM_BOND = BLE_GAP_AUTH_BOND,
+    /// MITM No Bonding
+    BLE_GAP_AUTH_REQ_MITM_NO_BOND = BLE_GAP_AUTH_MITM,
+    /// MITM and Bonding
+    BLE_GAP_AUTH_REQ_MITM_BOND = BLE_GAP_AUTH_MITM | BLE_GAP_AUTH_BOND,
+    /// SEC_CON, No MITM and No Bonding
+    BLE_GAP_AUTH_REQ_NO_MITM_SEC_CON_NO_BOND = BLE_GAP_AUTH_SEC_CON,
+    /// SEC_CON, No MITM and Bonding
+    BLE_GAP_AUTH_REQ_NO_MITM_SEC_CON_BOND = BLE_GAP_AUTH_SEC_CON |
+	BLE_GAP_AUTH_BOND,
+    /// SEC_CON, MITM and No Bonding
+    BLE_GAP_AUTH_REQ_MITM_SEC_CON_NO_BOND = BLE_GAP_AUTH_SEC_CON |
+	BLE_GAP_AUTH_MITM,
+    /// SEC_CON, MITM and Bonding
+    BLE_GAP_AUTH_REQ_MITM_SEC_CON_BOND = BLE_GAP_AUTH_SEC_CON |
+	BLE_GAP_AUTH_MITM | BLE_GAP_AUTH_BOND,
+
+    /// Mask of  authentication features without reserved flag
+    BLE_GAP_AUTH_REQ_MASK = 0x1F
+} ble_gap_auth_t;
+
+typedef enum {
+    /// Unauthenticated pairing achieved but without bond data
+    /// (meaning-less for connection confirmation)
+    BLE_GAP_PAIRING_UNAUTH = BLE_GAP_AUTH_NONE,
+    /// Authenticated pairing achieved but without bond data
+    /// (meaning-less for connection confirmation)
+    BLE_GAP_PAIRING_AUTH = BLE_GAP_AUTH_MITM,
+    /// Secure connection pairing achieved but without bond data
+    /// (meaning-less for connection confirmation)
+    BLE_GAP_PAIRING_SECURE_CON = BLE_GAP_AUTH_SEC_CON | BLE_GAP_AUTH_MITM,
+
+    /// No pairing performed with peer device
+    /// (meaning-less for connection confirmation)
+    BLE_GAP_PAIRING_NO_BOND = BLE_GAP_AUTH_NONE,
+    /// Peer device bonded through an unauthenticated pairing.
+    BLE_GAP_PAIRING_BOND_UNAUTH = BLE_GAP_AUTH_BOND,
+    /// Peer device bonded through an authenticated pairing.
+    BLE_GAP_PAIRING_BOND_AUTH = BLE_GAP_AUTH_MITM | BLE_GAP_AUTH_BOND,
+    /// Peer device bonded through a secure connection pairing pairing.
+    BLE_GAP_PAIRING_BOND_SECURE_CON = BLE_GAP_AUTH_SEC_CON | BLE_GAP_AUTH_MITM |
+	BLE_GAP_AUTH_BOND,
+
+    /// Pairing with bond data present Bit
+    BLE_GAP_PAIRING_BOND_PRESENT_BIT = 0x01,
+    BLE_GAP_PAIRING_BOND_PRESENT_POS = 0x00,
+} ble_gap_pairing_level_t;
+
+typedef struct {
+    /// Connection handle
+    uint8_t conidx;
+    /// Error code
+    ble_err_code_t reason;
+    /// Pairing security level. (Valid if reason == BLE_ERR_NO_ERROR)
+    ble_gap_pairing_level_t pairing_lvl;
+    /// LTK is exchanged. (Valid if reason == BLE_ERR_NO_ERROR)
+    bool ltk_present;
+} ble_gap_ind_le_pair_end_t;
+
+typedef struct {
+    /// Connection handle
+    uint16_t conhdl;
+    /// Reason of disconnection
+    ble_err_code_t reason;
+} ble_gap_ind_discon_t;
+
+typedef struct {
+    uint8_t conidx;
+    ble_gap_ind_discon_t param;
+} ble_gap_ind_le_discon_t;
+
+/// Privacy mode type
+typedef enum {
+    /// Network privacy mode
+    BLE_GAP_PRIV_TYPE_NETWORK,
+    /// Device privacy mode
+    BLE_GAP_PRIV_TYPE_DEVICE,
+} ble_gap_priv_type_t;
+
+/// Resolving list device information
+typedef struct {
+    /// Device identity
+    ble_gap_bdaddr_t addr;
+    /// Privacy Mode
+    ble_gap_priv_type_t priv_mode;
+    /// Peer IRK
+    uint8_t peer_irk[BLE_GAP_KEY_LEN];
+    /// Local IRK
+    uint8_t local_irk[BLE_GAP_KEY_LEN];
+} ble_gap_ral_dev_info_t;
+
+typedef struct {
+    /// Connection interval used on this connection, unit:1.25 ms
+    uint16_t con_interval;
+    /// Peripheral latency for the connection in number of connection events,
+    /// range: 0x0000 to 0x01F3
+    uint16_t con_latency;
+    /// Supervision timeout for this connection, unit: 10ms
+    uint16_t sup_to;
+} ble_gap_ind_con_update_t;
+
+typedef struct {
+    uint8_t conidx;
+    ble_gap_ind_con_update_t param;
+} ble_gap_ind_le_con_update_t;
+
+typedef enum {
+    /// Device name
+    BLE_GAP_DEV_NAME,
+    /// Device external appearance
+    BLE_GAP_DEV_APPEARANCE,
+    /// Peripheral preferred connection parameters
+    BLE_GAP_DEV_PERIPH_PREF_PARAMS,
+    /// Central address resolution supported
+    BLE_GAP_DEV_CTL_ADDR_RESOL,
+    /// Device database hash value
+    BLE_GAP_DEV_DB_HASH,
+    /// Resolvable private addresss as local addresss only
+    BLE_GAP_DEV_RSLV_PRIV_ADDR_ONLY,
+    /// Maximum device info parameter
+    BLE_GAP_DEV_INFO_MAX,
+} ble_gap_dev_info_t;
+
+typedef union {
+    /// Device name
+    ble_gap_dev_name_t name;
+    /// Appearance Icon
+    uint16_t appearance;
+} ble_gap_set_dev_info_t;
+
+typedef struct {
+    /// Requested device information
+    ble_gap_dev_info_t req_type;
+    /// Token value
+    uint16_t token;
+    /// Device information data
+    ble_gap_set_dev_info_t info;
+} ble_gap_ind_set_dev_req_t;
+
+typedef struct {
+    uint8_t conidx;
+    ble_gap_ind_set_dev_req_t param;
+} ble_gap_ind_le_set_dev_req_t;
+
+typedef struct {
+    /// true to accept connection parameters, false else.
+    bool accept;
+    /// Minimum length of connection event needed for this LE connection in
+    /// 0.625 ms.
+    uint16_t ce_len_min;
+    /// Maximum length of connection event needed for this LE connection in
+    /// 0.625 ms.
+    uint16_t ce_len_max;
+} ble_gapc_param_update_cfm_t;
+
+typedef struct {
+    /// Connection interval minimum in 1.25 ms
+    uint16_t intv_min;
+    /// Connection interval maximum in 1.25 ms
+    uint16_t intv_max;
+    /// Latency
+    uint16_t latency;
+    /// Supervision timeout in 10 ms
+    uint16_t time_out;
+} ble_gap_ind_param_update_req_t;
+
+typedef struct {
+    uint8_t conidx;
+    ble_gap_ind_param_update_req_t param;
+} ble_gap_ind_le_param_update_req_t;
+
+typedef struct {
+    /// PHY updated
+    ble_gap_le_phy_t phy;
+} ble_gap_ind_le_phy_t;
+
+typedef struct {
+    uint8_t con_idx;
+    ble_gap_ind_le_phy_t param;
+} ble_gap_ind_le_le_phy_t;
+
+typedef struct {
+    /// Channel selection algorithm updated
+    ble_gap_chan_sel_algo_t algo;
+} ble_gap_ind_chan_sel_algo_t;
+
+typedef struct {
+    uint8_t con_idx;
+    ble_gap_ind_chan_sel_algo_t param;
+} ble_gap_ind_le_chan_sel_algo_t;
+
+/// Additional advertising parameters
+typedef struct {
+    /// Advertising duration (in unit of 10ms). 0 means that advertising
+    /// continues until the host disable it
+    uint16_t duration;
+    /// Maximum number of extended advertising events the controller shall
+    /// attempt to send prior to terminating the extending advertising Valid
+    /// only if extended advertising
+    uint8_t max_adv_evt;
+} ble_gapm_adv_param_t;
+
+/// Scan window operation parameters
+typedef struct {
+    /// Scan interval
+    uint16_t scan_intv;
+    /// Scan window
+    uint16_t scan_wd;
+} ble_gapm_scan_wd_op_param_t;
+
+/// Scanning types
+typedef enum {
+    /// General discovery
+    BLE_GAPM_SCAN_TYPE_GEN_DISC,
+    /// Limited discovery
+    BLE_GAPM_SCAN_TYPE_LIM_DISC,
+    /// Observer
+    BLE_GAPM_SCAN_TYPE_OBSERVER,
+    /// Selective observer
+    BLE_GAPM_SCAN_TYPE_SEL_OBSERVER,
+    /// Connectable discovery
+    BLE_GAPM_SCAN_TYPE_CONN_DISC,
+    /// Selective connectable discovery
+    BLE_GAPM_SCAN_TYPE_SEL_CONN_DISC,
+} ble_gapm_scan_type_t;
+
+/// Scanning properties bit field bit value
+typedef enum {
+    /// Scan advertisement on the LE 1M PHY
+    BLE_GAPM_SCAN_PROP_PHY_1M_BIT = (1 << 0),
+    /// Scan advertisement on the LE Coded PHY
+    BLE_GAPM_SCAN_PROP_PHY_CODED_BIT = (1 << 1),
+    /// Active scan on LE 1M PHY (Scan Request PDUs may be sent)
+    BLE_GAPM_SCAN_PROP_ACTIVE_1M_BIT = (1 << 2),
+    /// Active scan on LE Coded PHY (Scan Request PDUs may be sent)
+    BLE_GAPM_SCAN_PROP_ACTIVE_CODED_BIT = (1 << 3),
+    /// Accept directed advertising packets if we use a RPA and target address
+    /// cannot be solved by the controller
+    BLE_GAPM_SCAN_PROP_ACCEPT_RPA_BIT = (1 << 4),
+    /// Filter truncated advertising or scan response reports
+    BLE_GAPM_SCAN_PROP_FILT_TRUNC_BIT = (1 << 5),
+} ble_gapm_scan_prop_t;
+
+/// Filtering policy for duplicated packets
+typedef enum {
+    /// Disable filtering of duplicated packets
+    BLE_GAPM_DUP_FILT_DIS,
+    /// Enable filtering of duplicated packets
+    BLE_GAPM_DUP_FILT_EN,
+    /// Enable filtering of duplicated packets, reset for each scan period
+    BLE_GAPM_DUP_FILT_EN_PERIOD,
+} ble_gapm_dup_filter_pol_t;
+
+/// Scanning parameters
+typedef struct {
+    /// Type of scanning to be started
+    ble_gapm_scan_type_t type;
+    /// Properties for the scan procedure
+    ble_gapm_scan_prop_t prop;
+    /// Duplicate packet filtering policy
+    ble_gapm_dup_filter_pol_t dup_filt_pol;
+    /// Reserved for future use
+    uint8_t rsvd;
+    /// Scan window opening parameters for LE 1M PHY
+    ble_gapm_scan_wd_op_param_t scan_param_1m;
+    /// Scan window opening parameters for LE Coded PHY
+    ble_gapm_scan_wd_op_param_t scan_param_coded;
+    /// Scan duration (in unit of 10ms). 0 means that the controller will scan
+    /// continuously until reception of a stop command from the application
+    uint16_t duration;
+    /// Scan period (in unit of 1.28s). Time interval between two consequent
+    /// starts of a scan duration by the controller. 0 means that the scan
+    /// procedure is not periodic
+    uint16_t period;
+} ble_gapm_scan_param_t;
+
+/// Initiating types
+typedef enum {
+    /// Direct connection establishment, establish a connection with an
+    /// indicated device
+    BLE_GAPM_INIT_TYPE_DIRECT_CONN_EST,
+    /// Automatic connection establishment, establish a connection with all
+    /// devices whose address is present in the white list
+    BLE_GAPM_INIT_TYPE_AUTO_CONN_EST,
+    /// Name discovery, Establish a connection with an indicated device in order
+    /// to read content of its Device Name characteristic. Connection is closed
+    /// once this operation is stopped.
+    BLE_GAPM_INIT_TYPE_NAME_DISC,
+} ble_gapm_init_type_t;
+
+/// Initiating properties
+typedef enum {
+    /// Scan connectable advertisements on the LE 1M PHY. Connection parameters
+    /// for the LE 1M PHY are provided
+    BLE_GAPM_INIT_PROP_1M_BIT = (1 << 0),
+    /// Connection parameters for the LE 2M PHY are provided
+    BLE_GAPM_INIT_PROP_2M_BIT = (1 << 1),
+    /// Scan connectable advertisements on the LE Coded PHY. Connection
+    /// parameters for the LE Coded PHY are provided
+    BLE_GAPM_INIT_PROP_CODED_BIT = (1 << 2),
+} ble_gapm_init_prop_t;
+
+/// Connection parameters
+typedef struct {
+    /// Minimum value for the connection interval (in unit of 1.25ms). Shall be
+    /// less than or equal to conn_intv_max value. Allowed range is 7.5ms to 4s.
+    uint16_t conn_intv_min;
+    /// Maximum value for the connection interval (in unit of 1.25ms). Shall be
+    /// greater than or equal to conn_intv_min value. Allowed range is 7.5ms to
+    /// 4s.
+    uint16_t conn_intv_max;
+    /// Slave latency. Number of events that can be missed by a connected slave
+    /// device
+    uint16_t conn_latency;
+    /// Link supervision timeout (in unit of 10ms). Allowed range is 100ms to
+    /// 32s
+    uint16_t supervision_to;
+    /// Recommended minimum duration of connection events (in unit of 625us)
+    uint16_t ce_len_min;
+    /// Recommended maximum duration of connection events (in unit of 625us)
+    uint16_t ce_len_max;
+} ble_gapm_conn_param_t;
+
+/// Initiating parameters
+typedef struct {
+    /// Initiating type
+    ble_gapm_init_type_t type;
+    /// Properties for the initiating procedure
+    ble_gapm_init_prop_t prop;
+    /// Timeout for automatic connection establishment (in unit of 10ms). Cancel
+    /// the procedure if not all indicated devices have been connected when the
+    /// timeout occurs. 0 means there is no timeout
+    uint16_t conn_to;
+    /// Scan window opening parameters for LE 1M PHY
+    ble_gapm_scan_wd_op_param_t scan_param_1m;
+    /// Scan window opening parameters for LE Coded PHY
+    ble_gapm_scan_wd_op_param_t scan_param_coded;
+    /// Connection parameters for LE 1M PHY
+    ble_gapm_conn_param_t conn_param_1m;
+    /// Connection parameters for LE 2M PHY
+    ble_gapm_conn_param_t conn_param_2m;
+    /// Connection parameters for LE Coded PHY
+    ble_gapm_conn_param_t conn_param_coded;
+    /// Address of peer device in case white list is not used for connection
+    ble_gap_bdaddr_t peer_addr;
+} ble_gapm_init_param_t;
+
+/// Periodic advertising information
+typedef struct {
+    /// Advertiser address information
+    ble_gap_bdaddr_t addr;
+    /// Advertising SID
+    uint8_t adv_sid;
+} ble_gapm_period_adv_addr_t;
+
+/// Periodic synchronization types
+typedef enum {
+    /// Do not use periodic advertiser list for synchronization. Use advertiser
+    /// information provided in the ble_gapm_start_per_sync().
+    BLE_GAPM_PER_SYNC_TYPE_GENERAL,
+    /// Use periodic advertiser list for synchronization
+    BLE_GAPM_PER_SYNC_TYPE_SELECTIVE,
+    /// Use Periodic advertising sync transfer information send through
+    /// connection for synchronization
+    BLE_GAPM_PER_SYNC_TYPE_PAST,
+} ble_gapm_per_sync_type_t;
+
+/// Bit field of enabled advertising reports
+typedef enum {
+    /// Periodic advertising reports reception enabled
+    BLE_GAPM_REPORT_ADV_EN_BIT = 0x01,
+    BLE_GAPM_REPORT_ADV_EN_POS = 0,
+    /// BIG Info advertising reports reception enabled
+    BLE_GAPM_REPORT_BIGINFO_EN_BIT = 0x02,
+    BLE_GAPM_REPORT_BIGINFO_EN_POS = 1,
+    /// Periodic advertising reports reception enabled with duplicate filtering
+    /// enabled.
+    BLE_GAPM_REPORT_ADV_DUP_FIL_EN_BIT = 0x04,
+    BLE_GAPM_REPORT_ADV_DUP_FIL_EN_POS = 2,
+} ble_gapm_report_en_bf_t;
+
+/// Constant Tone Extension sync filtering type
+typedef enum {
+    /// Do not sync to packets with an AoA Constant Tone Extension
+    BLE_GAPM_CTE_NO_SYNC_WITH_AOA = (1 << 0),
+    /// Do not sync to packets with an AoD Constant Tone Extension with 1 us
+    /// slots
+    BLE_GAPM_CTE_NO_SYNC_WITH_AOD_1US_SLOT = (1 << 1),
+    /// Do not sync to packets with an AoD Constant Tone Extension with 2 us
+    /// slots
+    BLE_GAPM_CTE_NO_SYNC_WITH_AOD_2US_SLOT = (1 << 2),
+    /// Do not sync to packets with a type 3 Constant Tone Extension (currently
+    /// reserved for future use)
+    BLE_GAPM_CTE_NO_SYNC_WITH_TYPE_3 = (1 << 3),
+    /// Do not sync to packets without a Constant Tone Extension
+    BLE_GAPM_CTE_NO_SYNC_WITHOUT_CTE = (1 << 4),
+} ble_gapm_sync_cte_type_t;
+
+/// Periodic synchronization parameters
+typedef struct {
+    /// Number of periodic advertising that can be skipped after a successful
+    /// receive. Maximum authorized value is 499.
+    uint16_t skip;
+    /// Synchronization timeout for the periodic advertising (in unit of 10ms
+    /// between 100ms and 163.84s)
+    uint16_t sync_to;
+    /// Periodic synchronization type
+    ble_gapm_per_sync_type_t type;
+    /// Connection index used for periodic sync info reception (only valid for
+    /// BLE_GAPM_PER_SYNC_TYPE_PAST)
+    uint8_t conidx;
+    /// Address of advertiser with which synchronization has to be established
+    /// (used only if type is BLE_GAPM_PER_SYNC_TYPE_GENERAL)
+    ble_gapm_period_adv_addr_t adv_addr;
+    /// Bit field that contains list of reports that are enabled or not.
+    ble_gapm_report_en_bf_t report_en_bf;
+    /// Type of Constant Tone Extension device should sync on.
+    ble_gapm_sync_cte_type_t cte_type;
+} ble_gapm_per_sync_param_t;
+
+/// Type of activities that can be created
+typedef enum {
+    /// Advertising activity
+    BLE_GAPM_ACTV_TYPE_ADV,
+    /// Scanning activity
+    BLE_GAPM_ACTV_TYPE_SCAN,
+    /// Initiating activity
+    BLE_GAPM_ACTV_TYPE_INIT,
+    /// Periodic synchronization activity
+    BLE_GAPM_ACTV_TYPE_PER_SYNC,
+} ble_gapm_actv_type_t;
+
+typedef struct {
+    /// The maximum Tx payload size
+    uint16_t max_tx_octets;
+    /// The maximum Tx time (unit: us)
+    uint16_t max_tx_time;
+    /// The maximum Rx payload size
+    uint16_t max_rx_octets;
+    /// The maximum Rx time (unit: us)
+    uint16_t max_rx_time;
+} ble_gap_ind_pkt_size_t;
+
+typedef struct {
+    uint8_t conidx;
+    ble_gap_ind_pkt_size_t param;
+} ble_gap_ind_le_pkt_size_t;
+
+typedef struct {
+    /// Requested information
+    ble_gap_dev_info_t req;
+    /// Token value that must be returned in confirmation
+    uint16_t token;
+    /// Device name data offset
+    uint16_t name_offset;
+    /// Maximum name length (starting from offset)
+    uint16_t max_name_length;
+} ble_gap_ind_get_dev_info_req_t;
+
+typedef struct {
+    uint8_t conidx;
+    ble_gap_ind_get_dev_info_req_t param;
+} ble_gap_ind_le_get_dev_info_req_t;
+
+typedef struct {
+    /// Encryption status
+    ble_err_code_t status;
+    /// Pairing security level
+    ble_gap_pairing_level_t pairing_lvl;
+} ble_gap_ind_encrypt_t;
+
+typedef struct {
+    uint8_t conidx;
+    ble_gap_ind_encrypt_t param;
+} ble_gap_ind_le_encrypt_t;
+
+typedef struct {
+    /// Pairing security level
+    ble_gap_pairing_level_t pairing_lvl;
+} ble_gap_encrypt_t;
+
+typedef struct {
+    uint8_t conidx;
+    ble_gap_encrypt_t param;
+} ble_gap_le_encrypt_t;
+
+typedef enum {
+    /// Passkey entry started
+    BLE_GAP_PASSKEY_ENTRY_STARTED,
+    /// Passkey digit entered
+    BLE_GAP_PASSKEY_DIGIT_ENTERED,
+    /// Passkey digit erased
+    BLE_GAP_PASSKEY_DIGIT_ERASED,
+    /// Passkey cleared
+    BLE_GAP_PASSKEY_CLEARED,
+    /// Passkey entry completed
+    BLE_GAP_PASSKEY_ENTRY_COMPLETED,
+} ble_gap_notif_type_t;
+
+typedef struct {
+    /// Keypress notification type
+    ble_gap_notif_type_t keypress_notif_type;
+} ble_gap_ind_keypress_notif_t;
+
+typedef struct {
+    uint8_t conidx;
+    ble_gap_ind_keypress_notif_t param;
+} ble_gap_ind_le_keypress_notif_t;
+
+typedef struct {
+    /// Requested information
+    ble_gap_dev_info_t req;
+    /// Status of the confirmation
+    ble_err_code_t status;
+    /// Token value provided in request indication
+    uint16_t token;
+    /// Complete value length including offset
+    uint16_t complete_length;
+    union {
+	/// Data for BLE_GAP_DEV_NAME request
+	ble_gap_dev_name_t name;
+	/// Data for BLE_GAP_DEV_APPEARANCE request
+	uint16_t appearance;
+	/// Data for BLE_GAP_DEV_PERIPH_PREF_PARAMS request
+	ble_gap_periph_pref_t periph_pref;
+	/// Data for BLE_GAP_DEV_CTL_ADDR_RESOL request
+	uint8_t ctl_addr_resol;
+	/// Data for BLE_GAP_DEV_DB_HASH request
+	uint8_t hash[BLE_GAP_DATABASE_HASH_LEN];
+	/// Data for BLE_GAP_DEV_RSLV_PRIV_ADDR_ONLY request
+	/// 0: Only Resolvable Private Addresses will be used as local addresses
+	/// after bonding; 1-255: Reserved for future use.
+	uint8_t rslv_priv_addr_only;
+    };
+} ble_gap_get_dev_info_cfm_t;
+
+typedef struct {
+    /// Internally used
+    uint8_t operation;
+    /// Status of the request
+    ble_err_code_t status;
+    /// Connection index
+    uint8_t con_idx;
+    union {
+	/// Data for operation (@see enum ble_gap_link_info_type_t)
+	ble_gap_link_info_t info;
+	/// Authentication. Data in callback of @ref ble_gap_sec_encrypt_req
+	ble_gap_le_encrypt_t encrypt;
+    };
+} ble_gapc_cmpl_t;
+
+typedef struct {
+    /// Internally used
+    uint8_t operation;
+    /// Status of the request
+    ble_err_code_t status;
+    /// Extra data
+    union {
+	/// Random number. Data in callback of @ref ble_gapm_gen_rand.
+	ble_rand_nb_t randnb;
+	/// Resolved addr
+	resl_addr_t resladr;
+	/// Activity index. Data in callback of @ref ble_gapm_stop_activity
+	uint8_t actv_stop_idx;
+	/// Generated address which is returned data of
+	/// @ref ble_gapm_gen_rand_addr
+	ble_bdaddr_t randadr;
+	/// Generated encrypted data which is returned data of
+	/// @ref ble_gapm_enc_block
+	uint8_t enc_result[BLE_GAP_KEY_LEN];
+	/// Number of received packets. Data in callback of
+	/// @ref ble_gapm_le_test_stop
+	uint16_t nb_packet_received;
+	/// Periodic sync activity index which is returned data of
+	/// @ref ble_gapm_create_persync_activity
+	uint8_t persync_act_idx;
+	/// Scan activity index which is returned data of
+	/// @ref ble_gapm_create_scan_activity
+	uint8_t scan_act_idx;
+	/// Initiating activity index which is returned data of
+	/// @ref ble_gapm_create_init_activity
+	uint8_t init_act_idx;
+	/// ADV creation information. Data in callback of
+	/// @ref ble_gapm_create_adv_activity.
+	struct {
+	    /// ADV identifier
+	    uint8_t adv_idx;
+	    /// Selected TX power for ADV activity
+	    int8_t tx_pwr;
+	} adv_created;
+    };
+} ble_gapm_cmpl_t;
+
+/// Invalid connection index
+#define BLE_GAP_INVALID_CONIDX 0xFF
+
+/// GAP event
+typedef enum {
+    /// Indication of ADV stop
+    BLE_GAP_EID_IND_ADV_STOP,
+    /// Indication of Scan stop
+    BLE_GAP_EID_IND_SCAN_STOP,
+    /// Indication of initiating stop
+    BLE_GAP_EID_IND_INIT_STOP,
+    /// Indication of periodic sync stop
+    BLE_GAP_EID_IND_PER_SYNC_STOP,
+    /// Indication of extended advertising report
+    BLE_GAP_EID_IND_EXT_ADV_REPORT,
+    /// Indication of connection established
+    BLE_GAP_EID_IND_CON_EST,
+    /// Indication of connection disconnected
+    BLE_GAP_EID_IND_DISCON,
+    /// Indication of LTK
+    BLE_GAP_EID_IND_LTK,
+    /// Indication of connection parameter updated
+    BLE_GAP_EID_IND_CON_UPDATE,
+    /// Indication of set device information request
+    BLE_GAP_EID_IND_SET_DEV_INFO_REQ,
+    /// Pairing end
+    BLE_GAP_EID_IND_PAIR_END,
+    /// Indication of parameter updating request
+    BLE_GAP_EID_IND_PARAM_UPDATE_REQ,
+    /// Indication of LE PHY
+    BLE_GAP_EID_IND_LE_PHY,
+    /// Indication of channel selection algorithm
+    BLE_GAP_EID_IND_CHAN_SEL_ALGO,
+    /// Indication of LE packet size
+    BLE_GAP_EID_IND_PKT_SIZE,
+    /// Indication of getting device information request
+    BLE_GAP_EID_IND_GET_DEV_INFO_REQ,
+    /// Indication of encrypt
+    BLE_GAP_EID_IND_ENCRYPT,
+    /// Indicatin of repeated attempt
+    BLE_GAP_EID_IND_REPEATED_ATTEMPT,
+    /// Indicatin of keypress notification
+    BLE_GAP_EID_IND_KEYPRESS_NOTIFICATION,
+} ble_gap_eid_t;
+
+typedef struct {
+    /// Event ID
+    ble_gap_eid_t eid;
+    union {
+	/// Data for BLE_GAP_EID_IND_ADV_STOP event.
+	ble_gap_ind_stop_t ind_adv_stop;
+	/// Data for BLE_GAP_EID_IND_SCAN_STOP event.
+	ble_gap_ind_stop_t ind_scan_stop;
+	/// Data for BLE_GAP_EID_IND_INIT_STOP event.
+	ble_gap_ind_stop_t ind_init_stop;
+	/// Data for BLE_GAP_EID_IND_PER_SYNC_STOP event.
+	ble_gap_ind_stop_t ind_per_sync_stop;
+	/// Data for BLE_GAP_EID_IND_EXT_ADV_REPORT event.
+	ble_gap_ind_ext_adv_report_t ind_ext_adv_rpt;
+	/// Data for BLE_GAP_EID_IND_CON_EST event.
+	ble_gap_ind_le_con_est_t ind_con_est;
+	/// Data for BLE_GAP_EID_IND_DISCON event.
+	ble_gap_ind_le_discon_t ind_discon;
+	/// Data for BLE_GAP_EID_IND_LTK event.
+	ble_gap_ind_le_ltk_t ind_ltk;
+	/// Data for BLE_GAP_EID_IND_CON_UPDATE event.
+	ble_gap_ind_le_con_update_t ind_con_update;
+	// Data for BLE_GAP_EID_IND_SET_DEV_INFO_REQ event.
+	ble_gap_ind_le_set_dev_req_t ind_set_dev_req;
+	/// Data for BLE_GAP_EDI_IND_PAIR_END
+	ble_gap_ind_le_pair_end_t ind_pair_end;
+	/// Data for BLE_GAP_EID_IND_PARAM_UPDATE_REQ event.
+	ble_gap_ind_le_param_update_req_t ind_param_update_req;
+	/// Data for BLE_GAP_EID_IND_LE_PHY event.
+	ble_gap_ind_le_le_phy_t ind_le_phy;
+	/// Data for BLE_GAP_EID_IND_CHAN_SEL_ALGO event.
+	ble_gap_ind_le_chan_sel_algo_t ind_sel_algo;
+	/// Data for BLE_GAP_EID_IND_PKT_SIZE event.
+	ble_gap_ind_le_pkt_size_t ind_pkt_size;
+	/// Data for BLE_GAP_EID_IND_GET_DEV_INFO_REQ event.
+	ble_gap_ind_le_get_dev_info_req_t ind_get_dev_info_req;
+	/// Data for BLE_GAP_EID_IND_ENCRYPT event.
+	ble_gap_ind_le_encrypt_t ind_encrypt;
+	/// Data for BLE_GAP_EID_IND_REPEATED_ATTEMPT event.
+	ble_gap_ind_le_repeated_attempt_t ind_repeated_attempt;
+	/// Data for BLE_GAP_EID_IND_KEYPRESS_NOTIFICATION event.
+	ble_gap_ind_le_keypress_notif_t ind_keypress_notif;
+    };
+} ble_gap_evt_t;
+
+/// Own BD address source of the device
+typedef enum {
+    /// Public or Private Static Address
+    BLE_OWN_STATIC_ADDR,
+    /// Generated resolvable private random address
+    BLE_OWN_GEN_RSLV_ADDR,
+    /// Generated non-resolvable private random address
+    BLE_OWN_GEN_NON_RSLV_ADDR,
+} ble_own_addr_t;
+
+/// GAPC command complete callback prototype
+/// @param[in] conidx Connection index.
+/// @param[in] parm Parameter returned.
+/// @param[in] ctx Context provided from calling API.
+typedef void (*gapc_cmpl_cb)(uint8_t conidx, struct gapc_cmp_evt const *parm,
+    void const *ctx);
+
+/// GAPC message
+/// @param[in] id message id
+/// @param[in] conidx The connection index
+/// @param[in] is_bcast Specify the message is broadcast or not
+/// @param[in] parm message parameter
+typedef void (*gapc_ind)(enum gapc_msg_id id, uint8_t conidx, bool is_bcast,
+    void const *parm);
+
+/// GAPM message callback
+/// @param[in] id message id
+/// @param[in] parm message parameter
+typedef void (*gapm_ind)(enum gapm_msg_id id, void const *parm);
+
+/// GAPM add profile callback prototype
+/// @param[in] parm Parameter returned.
+/// @param[in] ctx Context provided from calling API.
+typedef void (*gapm_profile_add_cb)(void *parm, void const *ctx);
+
+// FIXME: please remove comment below after coverting process is done.
+// Coverting mapping for process of cleaning up violation of abstraction:
+//| incument            | succeesor            |
+//|=====================+======================|
+//| gapc_cmpl_cb        | ble_gapc_cmd_cb      |
+//| gapm_cmp_evt_t      | ble_gapm_cmpl_t      |
+//| struct gapc_cmp_evt | ble_gapc_cmpl_t      |
+//| ble_gapm_reg_ind    | ble_gap_evt_func_reg |
+//| ble_gapc_reg_ind    | ble_gap_evt_func_reg |
+//| gapc_ind            | ble_gap_evt_fn       |
+//| gapm_ind            | ble_gap_evt_fn       |
+// The incumbent functions(structs) would be totally replaced finally.
+
+/// GAPC command complete callback prototype
+/// @param[in] conidx Connection index.
+/// @param[in] parm Parameter returned.
+/// @param[in] ctx Context provided from calling API.
+typedef void (*ble_gapc_cmd_cb)(uint8_t conidx, ble_gapc_cmpl_t const *parm,
+    void const *ctx);
+
+/// GAPM command complete callback prototype
+/// @param[in] parm Parameter returned.
+/// @param[in] ctx Context provided from calling API.
+typedef void (*ble_gapm_cmd_cb)(ble_gapm_cmpl_t const *parm, void const *ctx);
+
+/// GAP event callback function
+/// @param[in] event Event parameter
+/// @return True if processed. If return value is false, the event will be sent
+/// to next registered function.
+typedef bool (*ble_gap_evt_fn)(ble_gap_evt_t const *event);
+
+/*
+ * MACROS
+ *******************************************************************************
+ */
+
+/// Invalid bond index
+#define BLE_GAP_INVALID_BOND (-1)
+
+
+/*
+ * GLOBAL C API
+ *******************************************************************************
+ */
+/**
+ *******************************************************************************
+ * @brief Register ble gap event callback
+ *
+ * @param[in] pri Priority for service order. 0 is the highest.
+ * @param[in] name Name of this event func.
+ * @param[in] fn Event function
+ *******************************************************************************
+ */
+void ble_gap_evt_func_reg(uint8_t pri, ble_gap_evt_reg_name_t name,
+    ble_gap_evt_fn fn);
+
+/**
+ *******************************************************************************
+ * @brief Get gap event handler
+ *
+ * @param[in] name Name string for event handler.
+ * @return Event function. NULL if not found.
+ *******************************************************************************
+ */
+ble_gap_evt_fn ble_gap_evt_func_get(ble_gap_evt_reg_name_t name);
+
+/**
+ *******************************************************************************
+ * @brief Set device configuration
+ *
+ * @param[in] cfg device configuration
+ * @param[in] cb Complete callback function.
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+__NONNULL(1)
+void ble_gapm_set_device_config(ble_gap_set_dev_config_t const *cfg,
+    ble_gapm_cmd_cb cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Remove gap event handler
+ *
+ * @param[in] name Name string for event handler.
+ * @return Removed callback function. NULL if not found.
+ *******************************************************************************
+ */
+ble_gap_evt_fn ble_gap_evt_func_rm(ble_gap_evt_reg_name_t name);
+
+/**
+ *******************************************************************************
+ * @brief Generate random number
+ *
+ * @param[in] cb Complete callback function. The random number will be return in
+ * randnb data field of ble_gapm_cmpl_t which is passed as a argument of cb.
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+void ble_gapm_gen_rand(ble_gapm_cmd_cb cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Set content of the white list
+ * @param[in] count Number of entries to be added in the list. 0 means that list
+ * content has to be cleared.
+ * @param[in] addrs List of entries to be added in the list.
+ * @param[in] cb Command complete callback. NULL means that the caller does not
+ * need to be informed after the command completion.
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+__NONNULL(2)
+void ble_gapm_set_white_list(uint8_t count, ble_gap_bdaddr_t const addrs[],
+    ble_gapm_cmd_cb cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Set content of the resolving list
+ * @param[in] count Number of entries to be added in the list. 0 means that list
+ * content has to be cleared.
+ * @param[in] rals List of entries to be added in the list.
+ * @param[in] cb Command complete callback. NULL means that the caller does not
+ * need to be informed after the command completion.
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+void ble_gapm_set_resolving_list(uint8_t count,
+    ble_gap_ral_dev_info_t const rals[], ble_gapm_cmd_cb cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Lower slave latency locally
+ * @param[in] conidx Connection index.
+ * @param[in] latency
+ * @param[in] cb Command complete callback
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+void ble_gapc_lower_slave_latency_locally(uint8_t conidx, uint16_t latency,
+    ble_gapc_cmd_cb cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Set the preferred slave event duration (for slave role configuration)
+ * @param[in] conidx Connection index.
+ * @param[in] dur Preferred event duration that the controller should use on a
+ * connection (N * 0.625 ms)
+ * @param[in] single_tx Slave transmits a single packet per connection event
+ * (False/True)
+ * @param[in] cb Command complete callback
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+void ble_gapc_set_prefer_slave_event_duration(uint8_t conidx, uint16_t dur,
+    bool single_tx, ble_gapc_cmd_cb cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Start TX direct test mode
+ * @param[in] param Test TX parameters.
+ * @param[in] cb Command complete callback. NULL means that the caller does not
+ * need to be informed after the command completion.
+ *******************************************************************************
+ */
+__NONNULL(1)
+void ble_gapm_le_test_tx(ble_gap_test_tx_param_t const *param,
+    ble_gapm_cmd_cb cb);
+
+/**
+ *******************************************************************************
+ * @brief Start RX direct test mode.
+ * @param[in] param Test RX parameters.
+ * @param[in] cb Command complete callback. NULL means that the caller does not
+ * need to be informed after the command completion.
+ *******************************************************************************
+ */
+__NONNULL(1)
+void ble_gapm_le_test_rx(ble_gap_test_rx_param_t const *param,
+    ble_gapm_cmd_cb cb);
+
+/**
+ *******************************************************************************
+ * @brief Stop the direct test mode.
+ * @param[in] cb Command complete callback.
+ *******************************************************************************
+ */
+__NONNULL_ALL
+void ble_gapm_le_test_stop(ble_gapm_cmd_cb cb);
+
+/**
+ *******************************************************************************
+ * @brief Resolve provided random address using array of Identity Resolution Key
+ * (IRK) exchanged.
+ * @param[in] addr Resolvable random address to solve.
+ * @param[in] nb Number of provided IRK.
+ * @param[in] irkarr peer IRK
+ * @param[in] cb Command complete callback.
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+void ble_gapm_resolv_addr(ble_bdaddr_t addr, uint8_t nb, ble_gap_irk_idx_t irkarr[],
+    ble_gapm_cmd_cb cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Generate random address
+ * @param[in] addr_type random address type
+ * @param[in] cb Command complete or indication callback.
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+void ble_gapm_gen_rand_addr(ble_gapm_rand_addr_type_t addr_type,
+    ble_gapm_cmd_cb cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Encrypt data
+ * @param[in] key 128 bit operand (key)
+ * @param[in] data 128 bit operand (data)
+ * @param[in] cb Command complete callback.
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+void ble_gapm_enc_block(uint8_t const key[BLE_GAP_KEY_LEN],
+    uint8_t const data[BLE_GAP_KEY_LEN], ble_gapm_cmd_cb cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Stop an activity
+ * @param[in] idx Activity identifier
+ * @param[in] ctx Context data.
+ * @param[in] cb Command complete callback.
+ *******************************************************************************
+ */
+void ble_gapm_stop_activity(uint8_t idx, void const *ctx, ble_gapm_cmd_cb cb);
+
+/**
+ *******************************************************************************
+ * @brief Delete activity
+ * @param[in] idx Activity identifier.
+ * @param[in] ctx Context data.
+ * @param[in] cb Command complete callback.
+ *******************************************************************************
+ */
+void ble_gapm_delete_activity(uint8_t idx, void const *ctx, ble_gapm_cmd_cb cb);
+
+/**
+ *******************************************************************************
+ * @brief Set advertising data
+ * @param[in] data_type  ADV data type
+ * @param[in] idx Activity identifier.
+ * @param[in] len Length of ADV data.
+ * @param[in] data ADV data array.
+ * @param[in] ctx Context data.
+ * @param[in] cb Command complete callback.
+ *****************************************************************************
+ */
+void ble_gapm_set_adv_data(ble_gapm_data_type_t data_type, uint8_t idx,
+    uint16_t len, uint8_t const *data, void const *ctx, ble_gapm_cmd_cb cb);
+
+/**
+ *******************************************************************************
+ * @brief Get link information
+ * @param[in] info Operation correspond to information.
+ * @param[in] conidx Connection index.
+ * @param[in] cb Complete callback function. NULL means that the caller does not
+ * need to be informed after the command completion.
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+void ble_gapc_get_link_info(uint8_t conidx, ble_gap_link_info_type_t info,
+    ble_gapc_cmd_cb cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Set phy. rate
+ * @param[in] conidx Connection index.
+ * @param[in] tx_phy Tx phy.
+ * @param[in] rx_phy Rx phy.
+ * @param[in] phy_opt Coded phy. opt.
+ * @param[in] cb Complete callback function. NULL means that the caller does not
+ * need to be informed after the command completion.
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+void ble_gapc_set_phy(uint8_t conidx, ble_gap_phy_mode_t tx_phy,
+    ble_gap_phy_mode_t rx_phy, ble_gap_phy_opt_t phy_opt, ble_gapc_cmd_cb cb,
+    void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Update connection parameters
+ * @param[in] conidx Connection index.
+ * @param[in] param Connection parameters.
+ * @param[in] cb Complete callback function.
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+__NONNULL(2)
+void ble_gapc_update_param(uint8_t conidx, ble_gap_conn_param_t const *param,
+    ble_gapc_cmd_cb cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Disconnect specific link
+ * @param[in] conidx Connection index.
+ * @param[in] reason Reason for disconnection. Only allow BLE_HCI_MODULE and
+ * BLE_SMP_MODULE type.
+ * @param[in] cb Complete callback function.
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+void ble_gapc_disconnect(uint8_t conidx, ble_err_code_t reason, ble_gapc_cmd_cb cb,
+    void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Set device IRK
+ * @param[in] irk IRK array data. Size is BLE_GAP_KEY_LEN(16).
+ * @param[in] cb Complete callback function.
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+__NONNULL(1)
+void ble_gapm_set_irk(uint8_t const irk[BLE_GAP_KEY_LEN], ble_gapm_cmd_cb cb,
+    void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Set device information confirmation (corresponding to
+ * BLE_GAP_EID_IND_SET_DEV_INFO_REQ event)
+ * @param[in] conidx Connection index.
+ * @param[in] req_type Request type
+ * @param[in] status Status of the request
+ * @param[in] token Token value
+ *******************************************************************************
+ */
+void ble_gapc_set_dev_info_cfm(uint8_t conidx, ble_gap_dev_info_t req_type,
+    ble_err_code_t status, uint16_t token);
+
+/**
+ *******************************************************************************
+ * @brief Retrieve connection address information
+ * @param[in] conidx Connection index
+ * @param[out] addr Pointer to peer addr.
+ * @return True if connection exists.
+ *******************************************************************************
+ */
+__NONNULL(2)
+bool ble_gapc_get_peer_addr(uint8_t conidx, ble_gap_bdaddr_t *addr);
+
+/**
+ *******************************************************************************
+ * @brief Confirm reception of BLE_GAP_EID_IND_PARAM_UPDATE_REQ event
+ * @param[in] conidx Connection index.
+ * @param[in] param Confirmation parameters.
+ *******************************************************************************
+ */
+__NONNULL(2)
+void ble_gapc_param_update_cfm(uint8_t conidx,
+    ble_gapc_param_update_cfm_t const *param);
+
+/**
+ *******************************************************************************
+ * @brief Confirm reception of BLE_GAP_EID_IND_GET_DEV_INFO_REQ event
+ * @param[in] conidx Connection index.
+ * @param[in] param Confirmation parameters.
+ *******************************************************************************
+ */
+__NONNULL(2)
+void ble_gapc_get_dev_info_cfm(uint8_t conidx,
+    ble_gap_get_dev_info_cfm_t const *param);
+
+/**
+ *******************************************************************************
+ * @brief Create periodic sync activity
+ * @param[in] own_addr_type Own address type
+ * @param[in] ctx Context data.
+ * @param[in] cb Command complete callback.
+ *******************************************************************************
+ */
+__NONNULL(3)
+void ble_gapm_create_persync_activity(ble_own_addr_t own_addr_type,
+    void const *ctx, ble_gapm_cmd_cb cb);
+
+/**
+ *******************************************************************************
+ * @brief Create scan activity
+ * @param[in] own_addr_type Own address type
+ * @param[in] ctx Context data.
+ * @param[in] cb Command complete callback.
+ *******************************************************************************
+ */
+__NONNULL(3)
+void ble_gapm_create_scan_activity(ble_own_addr_t own_addr_type,
+    void const *ctx, ble_gapm_cmd_cb cb);
+
+/**
+ *******************************************************************************
+ * @brief Create initiating activity
+ * @param[in] own_addr_type Own address type
+ * @param[in] ctx Context data.
+ * @param[in] cb Command complete callback.
+ *******************************************************************************
+ */
+__NONNULL(3)
+void ble_gapm_create_init_activity(ble_own_addr_t own_addr_type,
+    void const *ctx, ble_gapm_cmd_cb cb);
+
+/**
+ *******************************************************************************
+ * @brief Start advertising
+ * @param[in] idx Activity identifier.
+ * @param[in] dur Advertising duration (in unit of 10ms). 0 means that
+ * advertising continues until the application stop actively.
+ * @param[in] max_evt  Maximum number of extended advertising events the
+ * controller shall attempt to send prior to terminating the extending
+ * advertising. Valid only if extended advertising.
+ * @param[in] ctx Context data.
+ * @param[in] cb Command complete callback. NULL means that the caller does not
+ * need to be informed after the command completion.
+ *******************************************************************************
+ */
+void ble_gapm_start_adv(uint8_t idx, uint16_t dur, uint8_t max_evt,
+    void const *ctx, ble_gapm_cmd_cb cb);
+
+/**
+ *******************************************************************************
+ * @brief Start scanning
+ * @param[in] idx Activity identifier.
+ * @param[in] param Scanning parameters.
+ * @param[in] ctx Context data.
+ * @param[in] cb Command complete callback. NULL means that the caller does not
+ * need to be informed after the command completion.
+ *******************************************************************************
+ */
+__NONNULL(2)
+void ble_gapm_start_scan(uint8_t idx, ble_gapm_scan_param_t const *param,
+    void const *ctx, ble_gapm_cmd_cb cb);
+
+/**
+ *******************************************************************************
+ * @brief Start Initiating
+ * @param[in] idx Activity identifier.
+ * @param[in] param Initiating parameters.
+ * @param[in] ctx Context data.
+ * @param[in] cb Command complete callback. NULL means that the caller does not
+ * need to be informed after the command completion.
+ *******************************************************************************
+ */
+__NONNULL(2)
+void ble_gapm_start_init(uint8_t idx, ble_gapm_init_param_t const *param,
+    void const *ctx, ble_gapm_cmd_cb cb);
+
+/**
+ *******************************************************************************
+ * @brief Start periodic synchronization
+ * @param[in] idx Activity identifier.
+ * @param[in] param Periodic synchronization parameters.
+ * @param[in] ctx Context data.
+ * @param[in] cb Command complete callback. NULL means that the caller does not
+ * need to be informed after the command completion.
+ *******************************************************************************
+ */
+__NONNULL(2)
+void ble_gapm_start_per_sync(uint8_t idx,
+    ble_gapm_per_sync_param_t const *param, void const *ctx,
+    ble_gapm_cmd_cb cb);
+
+/**
+ *******************************************************************************
+ * @brief Create ADV activity
+ * @param[in] own_addr_type Own address type
+ * @param[in] param Advertising parameters for advertising creation.
+ * @param[in] ctx Context data
+ * @param[in] cb Command complete callback.
+ *******************************************************************************
+ */
+__NONNULL(2)
+void ble_gapm_create_adv_activity(ble_own_addr_t own_addr_type,
+    ble_gapm_adv_create_param_t const *param, void const *ctx,
+    ble_gapm_cmd_cb cb);
+
+/**
+ *******************************************************************************
+ * @brief Get advertising create parameters from Flash NVDS.
+ * @param[in] is_wurx True if the adv is wurx.
+ * @param[in,out] own_addr_type Own addr type.
+ * @param[in,out] create Create parameter
+ * @return true for success
+ *******************************************************************************
+ */
+__NONNULL_ALL
+bool ble_gapm_get_adv_create_nvds(bool is_wurx, ble_own_addr_t *own_addr_type,
+    ble_gapm_adv_create_param_t *create);
+
+#ifdef __cplusplus
+}
+#endif
+
+///@} ATM_BTFM_BLE_GAP
+
diff --git a/platform/atm2/ATM22xx-x1x/lib/ble_gap/ble_internal.h b/platform/atm2/ATM22xx-x1x/lib/ble_gap/ble_internal.h
new file mode 100644
index 0000000..6c04a8a
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/ble_gap/ble_internal.h
@@ -0,0 +1,221 @@
+/**
+ *******************************************************************************
+ *
+ * @file ble_internal.h
+ *
+ * @brief Middleware GAP Internal function
+ *
+ * Copyright (C) Atmosic 2020-2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_BLE_INT GAP internal API
+ * @ingroup ATM_BTFM_API
+ * @brief ATM bluetooth framework GAP internal API
+ *
+ * This module contains the necessary API to deal with the GAP messages.
+ *
+ * @{
+ *******************************************************************************
+ */
+
+#include "ble_task.h"
+#include "ble_gap.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Internal C API
+ *******************************************************************************
+ */
+
+// BLE GAP Security environment structure
+struct ble_gap_sec_env_tag {
+    uint16_t bonded_mask;
+    int8_t last_bonding;
+    uint8_t current_authreq;
+    ble_gap_bdaddr_t peer_addr;
+    struct gapc_irk peer_irk;
+    ble_gap_ltk_t ltk;
+    ble_gap_ltk_t peer_ltk;
+    bool peer_irk_valid;
+    bool loc_irk_valid;
+    uint8_t loc_irk[BLE_GAP_KEY_LEN];
+};
+
+// BLE gapm profile task add extended parameters
+typedef struct {
+    // service start handle
+    // 0 - Dynamic allocation
+    uint16_t start_hdl;
+} ble_gapm_task_add_ex_t;
+
+/**
+ *******************************************************************************
+ * @brief GAP API initialization
+ *******************************************************************************
+ */
+void ble_gap_init(void);
+/**
+ *******************************************************************************
+ * @brief Reset controller
+ * After reset controller, user needs to @see ble_gapm_set_device_config again.
+ * @param[in] cb Complete callback function.
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+void ble_gapm_reset_cmd(ble_gapm_cmd_cb cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Create and add profile task
+ *
+ * @param[in] taskid Task identifier.
+ * @param[in] seclvl Security Level :
+ *  7    6    5    4    3    2    1    0
+ * +----+----+----+----+----+----+----+----+
+ * |   Reserved   |DIS |  AUTH   |EKS | MI |
+ * +----+----+----+----+----+----+----+----+
+ *
+ * - MI: 1 - Application task is a Multi-Instantiated task, 0 - Mono-Instantiated
+ * Only applies for service - Ignored by collectors:
+ * - EKS: Service needs a 16 bytes encryption key
+ * - AUTH: 0 - Disable, 1 - Enable, 2 - Unauth, 3 - Auth
+ * - DIS: Disable the service
+ * @param[in] size Size of allocated profile configuration data. The storage
+ * will be passed to @p cbadd callback.
+ * @param[in] cbadd Profile added callback function.
+ * @param[in] cb Complete callback function.
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+void ble_gapm_profile_task_add(uint16_t taskid, uint8_t seclvl, uint16_t size,
+    gapm_profile_add_cb cbadd, ble_gapm_cmd_cb cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Create and add profile task with extended parameters
+ *
+ * @param[in] taskid Task identifier.
+ * @param[in] seclvl Security Level :
+ *  7    6    5    4    3    2    1    0
+ * +----+----+----+----+----+----+----+----+
+ * |   Reserved   |DIS |  AUTH   |EKS | MI |
+ * +----+----+----+----+----+----+----+----+
+ *
+ * - MI: 1 - Application task is a Multi-Instantiated task,
+ *   0 - Mono-Instantiated Only applies for service - Ignored by collectors:
+ * - EKS: Service needs a 16 bytes encryption key
+ * - AUTH: 0 - Disable, 1 - Enable, 2 - Unauth, 3 - Auth
+ * - DIS: Disable the service
+ * @param[in] size Size of allocated profile configuration data. The storage
+ * will be passed to @p cbadd callback.
+ * @param[in] cbadd Profile added callback function.
+ * @param[in] cb Complete callback function.
+ * @param[in] ctx Context data.
+ * @param[in] ext Extended parameters
+ *******************************************************************************
+ */
+void ble_gapm_profile_task_add_ex(uint16_t taskid, uint8_t seclvl,
+    uint16_t size, gapm_profile_add_cb cbadd, ble_gapm_cmd_cb cb,
+    void const *ctx, ble_gapm_task_add_ex_t const *ext);
+
+/**
+ *******************************************************************************
+ * @brief Register GAPC message callback
+ * @param[in] cb Callback of GAPC message
+ *******************************************************************************
+ */
+void ble_gapc_reg_ind(gapc_ind cb);
+
+/**
+ *******************************************************************************
+ * @brief Register GAPM message callback
+ * @param[in] cb Callback of GAPM message
+ *******************************************************************************
+ */
+void ble_gapm_reg_ind(gapm_ind cb);
+
+/**
+ *******************************************************************************
+ * @brief Register GAPC message callback
+ * @param[in] cb Callback of GAPC security messages (GAPC_BOND_REQ_IND,
+ * GAPC_BOND_IND and GAPC_ENCRYPT_REQ_IND).
+ *******************************************************************************
+ */
+void ble_gapc_sec_reg_ind(ke_msg_func_t cb);
+
+/**
+ *******************************************************************************
+ * @brief Initialization
+ * @return Handler of messages. (GAPC_BOND_REQ_IND, GAPC_BOND_IND and
+ * GAPC_ENCRYPT_REQ_IND).
+ *******************************************************************************
+ */
+ke_msg_func_t ble_gap_sec_init(void);
+
+/**
+ *******************************************************************************
+ * @brief Get gapm handler
+ *******************************************************************************
+ */
+gapm_ind ble_gapm_cb_get(void);
+
+/**
+ *******************************************************************************
+ * @brief Get gapc handler
+ *******************************************************************************
+ */
+gapc_ind ble_gapc_cb_get(void);
+
+/**
+ *******************************************************************************
+ * @brief Add gapc command callback
+ * @param[in] cb Command complete callback.
+ * @param[in] op  GAPC operation code
+ * @param[in] ctx Context data.
+ *******************************************************************************
+ */
+void ble_gapc_add_cb(gapc_cmpl_cb cb, uint8_t op, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Add gapc command callback
+ * @param[in] cb Command complete callback.
+ * @param[in] op  GAPC operation code.
+ * @param[in] ctx Context data.
+ * @param[in] evt Additinal information needed in command complete.
+ *******************************************************************************
+ */
+void ble_gapc_push_cb(ble_gapc_cmd_cb cb, uint8_t op, void const *ctx,
+    ble_gapc_cmpl_t *evt);
+
+/**
+ *******************************************************************************
+ * @brief Allocate a memory of ble_gapc_cmpl_t with extra data length
+ * @param[in] extra_data_len The extra data length.
+ * @return Allocated memory pointer with extra data length.
+ *******************************************************************************
+ */
+ble_gapc_cmpl_t *ble_gapc_add_cb_evt(uint32_t extra_data_len);
+
+/**
+ *******************************************************************************
+ * @brief Call a callback event
+ * @param[in] id Event id.
+ * @param[in] evt Event.
+ *******************************************************************************
+ */
+void ble_gap_evt_cb_call(ble_gap_eid_t id, ble_gap_evt_t *evt);
+
+#ifdef __cplusplus
+}
+#endif
+
+/// @} ATM_BTFM_BLE_INT
diff --git a/platform/atm2/ATM22xx-x1x/lib/ble_gattc/ble_gattc.h b/platform/atm2/ATM22xx-x1x/lib/ble_gattc/ble_gattc.h
new file mode 100644
index 0000000..560ec95
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/ble_gattc/ble_gattc.h
@@ -0,0 +1,475 @@
+/**
+ *******************************************************************************
+ *
+ * @file ble_gattc.h
+ *
+ * @brief Header File - BLE GATTC API
+ *
+ * Copyright (C) Atmosic 2020-2023
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_GATTC GATTC API
+ * @ingroup ATM_BTFM_API
+ * @brief ATM bluetooth framework GATTC API
+ *
+ * This module contains the necessary API to deal with the RW GATTC messages.
+ *
+ * @{
+ *******************************************************************************
+ */
+
+/*
+ * INCLUDE
+ *******************************************************************************
+ */
+#include "co_bt.h"
+#include "gattc_task.h"
+#include "ble_att.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * STRUCTURE DEFINITION
+ *******************************************************************************
+ */
+
+/// The characteristic information of GATTC_DISC_ALL_CHAR
+typedef struct {
+    /// Element handle
+    uint16_t attr_hdl;
+    /// Pointer attribute handle to UUID
+    uint16_t pointer_hdl;
+    /// Properties
+    uint8_t prop;
+    /// UUID length
+    uint8_t uuid_len;
+    /// Characteristic UUID
+    uint8_t uuid[ATT_UUID_128_LEN];
+} ble_gattc_disc_all_char_ind_t;
+
+/// The data of GATTC_DISC_ALL_CHAR
+typedef struct {
+    /// The maximum entries
+    uint16_t max_num;
+    /// Number of entries
+    uint16_t num;
+    /// Entry of one characteristic
+    ble_gattc_disc_all_char_ind_t chars[__ARRAY_EMPTY];
+} ble_gattc_disc_chars_t;
+
+/// The characteristic descriptor information of GATTC_DISC_DESC_CHAR
+typedef struct {
+    /// Element handle
+    uint16_t attr_hdl;
+    /// UUID length
+    uint8_t uuid_len;
+    /// Descriptor UUID
+    uint8_t uuid[ATT_UUID_128_LEN];
+} ble_gattc_disc_char_desc_ind_t;
+
+/// Data for GATTC_DISC_DESC_CHAR
+typedef struct {
+    /// The maximum entries
+    uint16_t max_num;
+    /// Number of entries
+    uint16_t num;
+    /// Entry of one characteristic descriptor
+    ble_gattc_disc_char_desc_ind_t descs[__ARRAY_EMPTY];
+} ble_gattc_disc_char_descs_t;
+
+/// The service information of GATTC_DISC_ALL_SVC
+typedef struct {
+    /// Start handle
+    uint16_t start_hdl;
+    /// End handle
+    uint16_t end_hdl;
+    /// UUID length
+    uint8_t  uuid_len;
+    /// Service UUID
+    uint8_t  uuid[ATT_UUID_128_LEN];
+} ble_gattc_disc_all_svc_ind_t;
+
+/// Data of GATTC_DISC_ALL_SVC
+typedef struct {
+    /// The maximum entries
+    uint16_t max_num;
+    /// Number of entries
+    uint8_t num;
+    /// Entry of one characteristic
+    ble_gattc_disc_all_svc_ind_t svcs[__ARRAY_EMPTY];
+} ble_gattc_disc_svcs_t;
+
+/// GATT task message
+typedef enum gattc_msg_id ble_gattc_msg_id_t;
+/// Discovery all characteristics indication structure
+typedef struct gattc_disc_char_ind ble_gattc_disc_char_ind_t;
+/// Discover service indication structure
+typedef struct gattc_disc_svc_ind ble_gattc_disc_svc_ind_t;
+
+typedef struct {
+    /// Attribute handle
+    uint16_t handle;
+    /// Read offset
+    uint16_t offset;
+    /// Read length
+    uint16_t length;
+    /// Handle value
+    uint8_t value[__ARRAY_EMPTY];
+} ble_gattc_read_ind_t;
+
+/// GATT command complete event includes extra information
+typedef struct {
+    /// GATT request type
+    uint8_t operation;
+    /// Status of the request
+    uint8_t status;
+    /// Operation sequence number - provided when operation is started
+    uint16_t seq_num;
+    /// Extra data
+    union {
+	/// Data for GATTC_DISC_BY_UUID_CHAR
+	ble_gattc_disc_char_ind_t disc_char;
+	/// Data for GATTC_DISC_ALL_CHAR
+	ble_gattc_disc_chars_t disc_chars;
+	/// Data for GATTC_DISC_DESC_CHAR
+	ble_gattc_disc_char_descs_t disc_descs;
+	/// Data for GATTC_DISC_BY_UUID_SVC
+	ble_gattc_disc_svc_ind_t disc_svc;
+	/// Data for GATTC_DISC_ALL_SVC
+	ble_gattc_disc_svcs_t disc_svcs;
+	/// Data for ble_gatt_read API
+	ble_gattc_read_ind_t read_ind;
+    };
+} ble_gattc_cmp_evt_ex_t;
+
+/// The operate code to add or remove callback (@ref ble_gattc_cb_apply)
+typedef enum {
+    /// Add unsolicited message callback
+    BLE_GATTC_CB_ADD,
+    /// Remove unsolicited message callback
+    BLE_GATTC_CB_REMOVE
+} ble_gattc_cb_op_t;
+
+/// The peer device triggers an event (notification)
+typedef struct gattc_event_ind ble_gattc_event_ind_t;
+/// Indicate that the ATT MTU has been updated (negotiated)
+typedef struct gattc_mtu_changed_ind ble_gattc_mtu_changed_int_t;
+/// The peer device triggers an event (indication)
+typedef struct gattc_event_req_ind ble_gattc_event_req_ind_t;
+
+/// GATTC unsolicited callbacks for application
+typedef struct {
+    /// MTU exchanged indication
+    /// @brief This function will be called after MTU changed.
+    /// @param[in] conidx  Connection task index.
+    /// @param[in] mtu     MTU exchange information.
+    void (*mtu_exchanged_ind)(uint8_t conidx, uint16_t mtu);
+    /// GATTC event indication
+    /// @brief This function will be called in GATTC event indication.
+    /// @param[in] conidx  Connection task index.
+    /// @param[in] ind     GATTC event data.
+    void (*event_ind)(uint8_t conidx, ble_gattc_event_ind_t const *ind);
+    /// GATTC event require indication
+    /// @brief This function will be called in GATTC event require indication.
+    /// @param[in] conidx  Connection task index.
+    /// @param[in] ind     GATTC event require data.
+    void (*event_req_ind)(uint8_t conidx, ble_gattc_event_req_ind_t const *ind);
+    /// Service changed Configuration indication
+    /// @brief This function will be called after CCCD written.
+    /// @param[in] conidx   Connection task index.
+    /// @param[in] ind_cfg  BLE_ATT_CCCD_IND: service changed indication is
+    /// enabled, BLE_ATT_CCCD_STOP_IND: service changed indication is disabled.
+    void (*svc_changed_cfg_ind)(uint8_t conidx, ble_att_cccd_val_t ind_cfg);
+} ble_gattc_unsolicited_cbs_t;
+
+/// The ID of callback function (@ref ble_gattc_cb_apply)
+typedef struct ble_gattc_unsolicited_ctx_s const *ble_gattc_cb_id_t;
+
+/*
+ * FUNCTION DECLARATION
+ *******************************************************************************
+ */
+
+/**
+ *******************************************************************************
+ * GATTC command complete callback prototype
+ *
+ * @param[in] conidx  Connection index
+ * @param[in] parm    Parameter returned
+ * @param[in] ctx     Context which provided from calling API
+ *******************************************************************************
+ */
+typedef void (*ble_gattc_cmpl_cb_t)(uint8_t conidx,
+    ble_gattc_cmp_evt_ex_t const *param, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Retrieve the GATTC message handler
+ *
+ * @return GATTC message handler
+ *******************************************************************************
+ */
+const struct ble_subtask_handlers *ble_gattc_handler_get(void);
+
+/**
+ *******************************************************************************
+ * @brief GATTC initialization
+ *******************************************************************************
+ */
+void ble_gattc_init(void);
+
+/**
+ *******************************************************************************
+ * @brief Add or remove the GATTC unsolicited message callback
+ *
+ * @param[in] op Operate code (@ref ble_gattc_cb_op_t)
+ * @param[in] cbs Callback of GATTC unsolicited message
+ * @return the ID of GATTC callback function if op code is ble_gattc_cb_add;
+ * otherwise, return NULL.
+ *******************************************************************************
+ */
+__NONNULL(2)
+ble_gattc_cb_id_t ble_gattc_cb_apply(ble_gattc_cb_op_t op,
+    ble_gattc_unsolicited_cbs_t const *cbs);
+
+/**
+ *******************************************************************************
+ * @brief Get gattc unsolicited callback
+ *
+ * @param[in] id The ID of GATTC callback function
+ * @return GATTC callback function identify
+ *******************************************************************************
+ */
+__NONNULL_ALL
+ble_gattc_unsolicited_cbs_t const *ble_gattc_cb_get(ble_gattc_cb_id_t const id);
+
+/**
+ *******************************************************************************
+ * @brief MTU exchange
+ *
+ * @param[in] conidx  Connection index
+ * @param[in] cb      Command complete or indication callback
+ *******************************************************************************
+ */
+void ble_gattc_mtu_exchange(uint8_t conidx, ble_gattc_cmpl_cb_t cb);
+
+/**
+ *******************************************************************************
+ * @brief The specific characteristic discovery
+ *
+ * @param[in] conidx    Connection index
+ * @param[in] uuid      UUID searched - LSB first
+ * @param[in] uuid_len  UUID length (2, 4, or 16 bytes)
+ * @param[in] cb        Command complete or indication callback
+ * @param[in] ctx       Context data
+ *******************************************************************************
+ */
+void ble_gattc_disc_svc(uint8_t conidx, uint8_t const *uuid, uint8_t uuid_len,
+    ble_gattc_cmpl_cb_t cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Discover service by handle range
+ *
+ * @param[in] conidx  Connection index
+ * @param[in] shdl     Start handle
+ * @param[in] ehdl     End handle
+ * @param[in] max_num The maximum services could be discovered
+ * @param[in] cb      Command complete or indication callback
+ * @param[in] ctx     Context data
+ *******************************************************************************
+ */
+void ble_gattc_disc_svcs(uint8_t conidx, uint16_t shdl, uint16_t ehdl,
+    uint16_t max_num, ble_gattc_cmpl_cb_t cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Characteristic discovery
+ *
+ * @param[in] conidx    Connection index
+ * @param[in] uuid      UUID searched - LSB first
+ * @param[in] uuid_len  UUID length (2, 4, or 16 bytes)
+ * @param[in] cb        Command complete or indication callback
+ * @param[in] ctx       Context data
+ *******************************************************************************
+ */
+void ble_gattc_disc_char(uint8_t conidx, uint8_t const *uuid, uint8_t uuid_len,
+    ble_gattc_cmpl_cb_t cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Discover all characteristics
+ *
+ * @param[in] conidx  Connection index
+ * @param[in] shdl    Start handle
+ * @param[in] ehdl    End handle
+ * @param[in] cb      Command complete or indication callback
+ * @param[in] max_num The maximum characteristics could be discovered
+ * @param[in] ctx     Context data
+ *******************************************************************************
+ */
+void ble_gattc_disc_chars(uint8_t conidx, uint16_t shdl, uint16_t ehdl,
+    uint16_t max_num, ble_gattc_cmpl_cb_t cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Characteristic descriptor discovery
+ *
+ * @param[in] conidx    Connection index
+ * @param[in] shdl      Start handle
+ * @param[in] ehdl      End handle
+ * @param[in] max_num   The maximum descriptors could be discovered
+ * @param[in] cb        Command complete or indication callback
+ * @param[in] ctx       Context data
+ *******************************************************************************
+ */
+void ble_gattc_disc_desc_char(uint8_t conidx, uint16_t shdl, uint16_t ehdl,
+    uint16_t max_num, ble_gattc_cmpl_cb_t cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Characteristic write
+ *
+ * @param[in] conidx  Connection index
+ * @param[in] hdl     ATT handle
+ * @param[in] dat     Data
+ * @param[in] len     Data length
+ * @param[in] cb      Command complete or indication callback
+ * @param[in] ctx     Context data
+ *******************************************************************************
+ */
+void ble_gattc_write(uint8_t conidx, uint16_t hdl, uint8_t const *dat,
+    uint16_t len, ble_gattc_cmpl_cb_t cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Characteristic read
+ *
+ * @param[in] conidx  Connection index
+ * @param[in] hdl     ATT handle
+ * @param[in] offset Start offset in data payload
+ * @param[in] len     Data length. (0 = read all)
+ * @param[in] cb      Command complete or indication callback
+ * @param[in] ctx     Context data
+ *******************************************************************************
+ */
+void ble_gattc_read(uint8_t conidx, uint16_t hdl, uint16_t offset, uint16_t len,
+    ble_gattc_cmpl_cb_t cb, void const *ctx);
+/**
+ *******************************************************************************
+ * @brief Characteristic write without response
+ *
+ * @param[in] conidx  Connection index
+ * @param[in] hdl     ATT handle
+ * @param[in] dat     Data
+ * @param[in] len     Data length
+ * @param[in] cb      Command complete or indication callback
+ * @param[in] ctx     Context data
+ *******************************************************************************
+ */
+void ble_gattc_write_no_resp(uint8_t conidx, uint16_t hdl, uint8_t const *dat,
+    uint16_t len, ble_gattc_cmpl_cb_t cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Characteristic read confirm
+ *
+ * @param[in] conidx  Connection index
+ * @param[in] hdl     ATT handle
+ * @param[in] dat     Data
+ * @param[in] length  Data length
+ *******************************************************************************
+ */
+void ble_gattc_read_cfm(uint8_t conidx, uint16_t hdl, uint8_t const *dat,
+    uint16_t length);
+
+/**
+ *******************************************************************************
+ * @brief Characteristic write confirm
+ *
+ * @param[in] conidx  Connection index
+ * @param[in] hdl     ATT handle
+ * @param[in] status  Status
+ *******************************************************************************
+ */
+void ble_gattc_write_cfm(uint8_t conidx, uint16_t hdl, uint8_t status);
+
+/**
+ *******************************************************************************
+ * @brief Characteristic notification
+ *
+ * @param[in] conidx    Connection index
+ * @param[in] hdl       ATT handle
+ * @param[in] dat       Data
+ * @param[in] ntf_size  Data length
+ * @param[in] sn        Sequence number
+ * @param[in] cb        Command complete or indication callback
+ * @param[in] ctx       Context data
+ *******************************************************************************
+ */
+void ble_gattc_send_ntf(uint8_t conidx, uint16_t hdl, uint8_t const *dat,
+    uint16_t ntf_size, uint16_t sn, ble_gattc_cmpl_cb_t cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Characteristic indication
+ *
+ * @param[in] conidx    Connection index
+ * @param[in] hdl       ATT handle
+ * @param[in] dat       Data
+ * @param[in] ind_size  Data length
+ * @param[in] sn        Seq number
+ * @param[in] cb        Command complete or indication callback
+ * @param[in] ctx       Context data
+ *******************************************************************************
+ */
+void ble_gattc_send_ind(uint8_t conidx, uint16_t hdl, uint8_t const *dat,
+    uint16_t ind_size, uint16_t sn, ble_gattc_cmpl_cb_t cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Characteristic att info confirm
+ *
+ * @param[in] conidx  Connection index
+ * @param[in] hdl     ATT handle
+ * @param[in] length  Length
+ *******************************************************************************
+ */
+void ble_gattc_att_info_cfm(uint8_t conidx, uint16_t hdl, uint16_t length);
+
+/**
+ *******************************************************************************
+ * @brief Characteristic att event requirement indication confirm
+ *
+ * @param[in] conidx  Connection index
+ * @param[in] hdl     ATT handle
+ *******************************************************************************
+ */
+void ble_gattc_event_req_ind_cfm(uint8_t conidx, uint16_t hdl);
+
+/**
+ *******************************************************************************
+ * @brief Send service changed notification
+ *
+ * @param[in] conidx  Connection index
+ * @param[in] start_hdl   Staring handle
+ * @param[in] end_hdl     Ending handle
+ * @param[in] cb          Callback function (NULL for no callback)
+ *******************************************************************************
+ */
+void ble_gattc_svc_changed(uint8_t conidx, uint16_t start_hdl, uint16_t end_hdl,
+    ble_gattc_cmpl_cb_t cb);
+
+#ifdef __cplusplus
+}
+#endif
+
+///@} ATM_BTFM_GATTC
+
diff --git a/platform/atm2/ATM22xx-x1x/lib/ble_hogpd/ble_hogpd.h b/platform/atm2/ATM22xx-x1x/lib/ble_hogpd/ble_hogpd.h
new file mode 100644
index 0000000..cc79c39
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/ble_hogpd/ble_hogpd.h
@@ -0,0 +1,395 @@
+/**
+ *******************************************************************************
+ *
+ * @file ble_hogpd.h
+ *
+ * @brief HID Over GATT Profile Device Middleware
+ *
+ * Copyright (C) Atmosic 2020-2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_HOGPD HID Over GATT Profile Device API
+ * @ingroup ATM_BTFM_API
+ * @brief ATM bluetooth framework HOGP API
+ *
+ * This module contains the necessary device API for HID over GATT profile
+ *
+ * @{
+ *******************************************************************************
+ */
+#include <stdbool.h>
+#include "ble_prf_itf.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// The module name to register to SDK framework
+#define BLE_HOGPD_MODULE_NAME "khogpd"
+
+/// Maximal number of HIDS
+#define BLE_HOGPD_NB_HIDS_INST_MAX 2
+/// Maximal number of Report Char.
+#define BLE_HOGPD_NB_REPORT_INST_MAX 5
+
+/// The states of the HID device
+typedef enum {
+    /// Device is disabled (Service not added in DB)
+    BLE_HOGPD_DISABLED,
+    /// Device is idle (Service added but profile not enabled)
+    BLE_HOGPD_IDLE,
+    /// Device is enabled (Device is connected and the profile is enabled)
+    BLE_HOGPD_ENABLED,
+    /// Device is ready (Device can sent the report)
+    BLE_HOGPD_READY,
+    /// Mark for last
+    BLE_HOGPD_STATE_MAX,
+} ble_hogpd_state_t;
+
+/// Report Char. Configuration Flag Values
+typedef enum {
+    /// Input Report
+    BLE_HOGPD_CFG_REPORT_IN = 0x01,
+    /// Output Report
+    BLE_HOGPD_CFG_REPORT_OUT = 0x02,
+    /// HOGPD_CFG_REPORT_FEAT can be used as a mask to check Report type
+    /// Feature Report
+    BLE_HOGPD_CFG_REPORT_FEAT = 0x03,
+    /// Input report with Write capabilities
+    BLE_HOGPD_CFG_REPORT_WR = 0x10,
+} ble_hogpd_report_cfg_t;
+
+/// Features Flag Values
+typedef enum {
+    /// Keyboard Device
+    BLE_HOGPD_CFG_KEYBOARD = 0x01,
+    /// Mouse Device
+    BLE_HOGPD_CFG_MOUSE = 0x02,
+    /// Protocol Mode present
+    BLE_HOGPD_CFG_PROTO_MODE = 0x04,
+    /// Extended Reference Present
+    BLE_HOGPD_CFG_MAP_EXT_REF = 0x08,
+    /// Boot Keyboard Report write capability
+    BLE_HOGPD_CFG_BOOT_KB_WR = 0x10,
+    /// Boot Mouse Report write capability
+    BLE_HOGPD_CFG_BOOT_MOUSE_WR = 0x20,
+    /// Valid Feature mask
+    BLE_HOGPD_CFG_MASK = 0x3F,
+    /// Report Notification Enabled
+    BLE_HOGPD_CFG_REPORT_NTF_EN = 0x40,
+} ble_hogpd_cfg_t;
+
+/// Type of reports
+typedef enum {
+    /// The Report characteristic
+    BLE_HOGPD_REPORT,
+    /// The Report Map characteristic
+    BLE_HOGPD_REPORT_MAP,
+    /// Boot Keyboard Input Report
+    BLE_HOGPD_BOOT_KEYBOARD_INPUT_REPORT,
+    /// Boot Keyboard Output Report
+    BLE_HOGPD_BOOT_KEYBOARD_OUTPUT_REPORT,
+    /// Boot Mouse Input Report
+    BLE_HOGPD_BOOT_MOUSE_INPUT_REPORT,
+} ble_hogpd_report_type_t;
+
+/// HID Information bit values
+typedef enum {
+    /// Device capable of providing wake-up signal to a HID host
+    BLE_HIDS_REMOTE_WAKE_CAPABLE = 0x01,
+    /// Normally connectable support bit
+    BLE_HIDS_NORM_CONNECTABLE = 0x02,
+} ble_hogp_info_bit_t;
+
+/// HID Control Point Characteristic value keys
+enum ble_hogp_ctnl_pt {
+    /// Suspend
+    BLE_HOGP_CTNL_PT_SUSPEND,
+    /// Exit suspend
+    BLE_HOGP_CTNL_PT_EXIT_SUSPEND,
+};
+
+/// Protocol Mode Char. value Keys
+enum ble_hogp_boot_prot_mode {
+    /// Boot Protocol Mode
+    BLE_HOGP_BOOT_PROTOCOL_MODE,
+    /// Report Protocol Mode
+    BLE_HOGP_REPORT_PROTOCOL_MODE,
+};
+
+/*
+ * STRUCTURE DEFINITION
+ *******************************************************************************
+ */
+
+/// HID Information structure
+typedef struct {
+    /// bcdHID
+    uint16_t bcdHID;
+    /// bCountryCode
+    uint8_t bCountryCode;
+    /// Flags
+    ble_hogp_info_bit_t flags;
+} ble_hids_hid_info_t;
+
+/// External Report Reference
+typedef struct {
+    /// Included Service Handle
+    uint16_t inc_svc_hdl;
+    /// Characteristic UUID
+    uint16_t rep_ref_uuid;
+} ble_hogpd_ext_ref_t;
+
+/// Database Creation Service Instance Configuration structure
+typedef struct {
+    /// Service Features
+    ble_hogpd_cfg_t svc_features;
+    /// Number of Report Char. instances to add in the database
+    uint8_t report_nb;
+    /// Report Char. Configuration
+    ble_hogpd_report_cfg_t report_char_cfg[BLE_HOGPD_NB_REPORT_INST_MAX];
+    /// Report id number
+    uint8_t report_id[BLE_HOGPD_NB_REPORT_INST_MAX];
+    /// HID Information Char. Values
+    ble_hids_hid_info_t hid_info;
+    /// External Report Reference
+    ble_hogpd_ext_ref_t ext_ref;
+} ble_hogpd_hids_cfg_t;
+
+typedef struct {
+    /// Number of HIDS to add
+    uint8_t hids_nb;
+    /// Initial configuration for each HIDS instance
+    ble_hogpd_hids_cfg_t cfg[BLE_HOGPD_NB_HIDS_INST_MAX];
+} ble_hogpd_db_cfg_t;
+
+/// The ble_hogpd peer information
+typedef struct {
+    /// State of module
+    ble_hogpd_state_t state;
+    /// Notification CCC mask
+    uint16_t ntf_mask;
+} ble_hogpd_peer_info_t;
+
+/// The ble_hogpd report info
+typedef struct {
+    /// Connection index
+    uint8_t conidx;
+    /// HIDS Instance
+    uint8_t hid_idx;
+    /// Report type
+    ble_hogpd_report_type_t rpt_type;
+    /// Report index
+    uint8_t rpt_idx;
+} ble_hogpd_report_info_t;
+
+/// The ble_hogpd report
+typedef struct {
+    /// Report Info
+    ble_hogpd_report_info_t info;
+    /// Report length
+    uint16_t rpt_len;
+    /// Report data
+    uint8_t const *data;
+} ble_hogpd_report_t;
+
+/// The ble_hogpd report read request
+typedef struct {
+    /// Report info
+    ble_hogpd_report_info_t info;
+    /// Token value that must be returned in confirmation
+    uint16_t token;
+    /// Data offset requested for read value
+    uint16_t offset;
+    /// Maximum data length is response value (starting from offset)
+    uint16_t max_length;
+} ble_hogpd_report_read_req_t;
+
+/// The ble_hogpd report write request
+typedef struct {
+    /// Token value that must be returned in confirmation
+    uint16_t token;
+    /// Report info
+    ble_hogpd_report_info_t info;
+    /// Report length
+    uint16_t rpt_len;
+    /// Report data
+    uint8_t const *data;
+} ble_hogpd_report_write_req_t;
+
+/// The ble_hogpd report read confirm
+typedef struct {
+    /// Report info
+    ble_hogpd_report_info_t info;
+    /// Status of read request. Success: BLE_ERR_NO_ERROR
+    ble_err_code_t status;
+    /// Token value
+    uint16_t token;
+    /// Report length
+    uint16_t rpt_len;
+    /// Report data
+    uint8_t const *data;
+} ble_hogpd_report_read_cfm_t;
+
+/// The ble_hogpd report write confirm
+typedef struct {
+    /// Token value
+    uint16_t token;
+    /// Status of read request. Success: BLE_ERR_NO_ERROR
+    ble_err_code_t status;
+    /// Report Info
+    ble_hogpd_report_info_t info;
+} ble_hogpd_report_write_cfm_t;
+
+typedef void (*ble_hogpd_ntf_ind_t)(uint8_t conidx, uint16_t rpt_idx_mask);
+typedef void (*ble_hogpd_state_ind_t)(uint8_t conidx, ble_hogpd_state_t last);
+typedef void (*ble_hogpd_report_read_req_cb_t)(
+    ble_hogpd_report_read_req_t const *req);
+typedef void (*ble_hogpd_report_write_req_cb_t)(
+    ble_hogpd_report_write_req_t const *req);
+typedef void (*ble_hogpd_report_cmp_cb_t)(uint8_t conidx, ble_err_code_t status,
+    void const *ctx);
+
+typedef struct {
+    /// Number of report could be sent
+    uint8_t nb_report;
+    /// Database config
+    ble_hogpd_db_cfg_t db_cfg;
+    /// Report map
+    uint8_t const *report_map[BLE_HOGPD_NB_HIDS_INST_MAX];
+    /// Report map size
+    uint16_t report_map_len[BLE_HOGPD_NB_HIDS_INST_MAX];
+    /// The mask of cccd enable for HID ready
+    uint16_t ccc_rdy_mask;
+    /// Notification state changed
+    ble_hogpd_state_ind_t state_ind;
+    /// Report read request
+    ble_hogpd_report_read_req_cb_t report_read_req;
+    /// Report write request
+    ble_hogpd_report_write_req_cb_t report_write_req;
+    /// Service start handle
+    /// 0: dynamically allocated in Attribute database
+    uint16_t start_hdl;
+    /// Number of peers supported
+    uint8_t nb_peer;
+} ble_hogpd_param_t;
+
+typedef ble_prf_cbs_t const *(ble_hogpd_cbs_t)(ble_hogpd_param_t const *init);
+
+/**
+ *******************************************************************************
+ * @brief Send HID report
+ *
+ * @param[in] rpt Report
+ * @param[in] cmp_cb Report complete callback. NULL if the user does not want to
+ * be notified after report event complete.
+ * @param[in] ctx User defined context
+ * @return Success: true
+ *******************************************************************************
+ */
+__NONNULL(1)
+bool ble_hogpd_send_report(ble_hogpd_report_t const *rpt,
+    ble_hogpd_report_cmp_cb_t cmp_cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Send report read confirm
+ *
+ * @param[in] cfm Report read confirm
+ *******************************************************************************
+ */
+__NONNULL_ALL
+void ble_hogpd_send_report_read_cfm(ble_hogpd_report_read_cfm_t const *cfm);
+
+/**
+ *******************************************************************************
+ * @brief Send report write confirm
+ *
+ * @param[in] cfm Report write confirm
+ *******************************************************************************
+ */
+__NONNULL_ALL
+void ble_hogpd_send_report_write_cfm(ble_hogpd_report_write_cfm_t const *cfm);
+
+/**
+ *******************************************************************************
+ * @brief Claim report buffer.
+ *
+ * Application uses this function to claim a buffer from ble_hogpd layer and
+ * calls ble_hogpd_report_send to send it out.
+ *
+ * @param[in] info Report Info
+ * @param[in] rpt_len Report Length
+ * @param[in] cmp_cb Report complete callback. NULL if the user does not want to
+ * be notified after report event complete.
+ * @param[in] ctx Application context.
+ * @return HOGPD report buffer context.
+ *******************************************************************************
+ */
+__NONNULL(1)
+void *ble_hogpd_report_claim(ble_hogpd_report_info_t const *info,
+    uint16_t rpt_len, ble_hogpd_report_cmp_cb_t cmp_cb, void const *ctx);
+
+/**
+ *******************************************************************************
+ * @brief Get report data payload
+ *
+ * @param[in] rpt_buf_ctx HOGPD report buffer context
+ * @return Pointer of the report payload
+ *******************************************************************************
+ */
+__NONNULL_ALL
+uint8_t *ble_hogpd_report_get_report_payload(void *rpt_buf_ctx);
+
+/**
+ *******************************************************************************
+ * @brief Get report length from the report buffer
+ *
+ * @param[in] rpt_buf_ctx HOGPD report buffer context
+ * @return Report length
+ *******************************************************************************
+ */
+__NONNULL_ALL
+uint16_t ble_hogpd_report_get_report_length(void const *rpt_buf_ctx);
+
+/**
+ *******************************************************************************
+ * @brief Set report length to the report buffer
+ *
+ * @param[in] rpt_buf_ctx HOGPD report buffer context
+ * @param[in] new_len Report length. Must not longer than the claimed length
+ *******************************************************************************
+ */
+__NONNULL(1)
+void ble_hogpd_report_set_report_length(void *rpt_buf_ctx, uint16_t new_len);
+
+/**
+ *******************************************************************************
+ * @brief Send report to peer.
+ *
+ * @param[in] rpt_buf_ctx HOGPD report buffer context
+ *******************************************************************************
+ */
+__NONNULL_ALL
+void ble_hogpd_report_send(void const *rpt_buf_ctx);
+
+/**
+ *******************************************************************************
+ * @brief Get module information
+ *
+ * @return Current ble_hogpd peer information
+ *******************************************************************************
+ */
+ble_hogpd_peer_info_t const *ble_hogpd_get_peer_info(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+///@} ATM_BTFM_HOGPD
+
diff --git a/platform/atm2/ATM22xx-x1x/lib/prf/ble_att.h b/platform/atm2/ATM22xx-x1x/lib/prf/ble_att.h
new file mode 100644
index 0000000..07ee444
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/prf/ble_att.h
@@ -0,0 +1,126 @@
+/**
+ *******************************************************************************
+ *
+ * @file ble_att.h
+ *
+ * @brief BLE ATT
+ *
+ * Copyright (C) Atmosic 2020
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_ATT BLE ATT define
+ * @ingroup ATM_BTFM_API
+ * @brief ATM bluetooth framework ATT defines
+ *
+ * @{
+ *******************************************************************************
+ */
+
+/*
+ * INCLUDE FILE
+ ******************************************************************************
+ */
+#include "rwip_config.h"
+#include "att.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * DEFINE
+ ******************************************************************************
+ */
+
+/// No security requirements
+#define BLE_SEC_PROP_NO_SECURITY (PERM(SVC_AUTH, NO_AUTH))
+/// Unauthenticated no MITM protection
+#define BLE_SEC_PROP_UNAUTH (PERM(SVC_AUTH, UNAUTH))
+/// Authenticated MITM protection
+#define BLE_SEC_PROP_AUTH (PERM(SVC_AUTH, AUTH))
+/// LE Secure Connections pairing
+#define BLE_SEC_PROP_LE_SC (PERM(SVC_AUTH, SEC_CON))
+
+#define BLE_ATT_RD PERM(RD, ENABLE)
+/// No security requirements - Read
+#define BLE_ATT_READ_NO_SECURITY (BLE_ATT_RD | PERM(RP, NO_AUTH))
+/// Unauthenticated no MITM protection - Read
+#define BLE_ATT_READ_UNAUTH (BLE_ATT_RD | PERM(RP, UNAUTH))
+/// Authenticated MITM protection - Read
+#define BLE_ATT_READ_AUTH (BLE_ATT_RD | PERM(RP, AUTH))
+/// LE Secure Connections pairing - Read
+#define BLE_ATT_READ_LE_SC (BLE_ATT_RD | PERM(RP, SEC_CON))
+
+#define BLE_ATT_WC PERM(WRITE_COMMAND, ENABLE)
+/// No security requirements - Write command
+#define BLE_ATT_WRITE_COMMAND_NO_SECURITY (BLE_ATT_WC | PERM(WP, NO_AUTH))
+/// Unauthenticated no MITM protection - Write command
+#define BLE_ATT_WRITE_COMMAND_UNAUTH (BLE_ATT_WC | PERM(WP, UNAUTH))
+/// Authenticated MITM protection - Write command
+#define BLE_ATT_WRITE_COMMAND_AUTH (BLE_ATT_WC | PERM(WP, AUTH))
+/// LE Secure Connections pairing - Write command
+#define BLE_ATT_WRITE_COMMAND_LE_SC (BLE_ATT_WC | PERM(WP, SEC_CON))
+
+#define BLE_ATT_WR PERM(WRITE_REQ, ENABLE)
+/// No security requirements - Write request
+#define BLE_ATT_WRITE_REQ_NO_SECURITY (BLE_ATT_WR | PERM(WP, NO_AUTH))
+/// Unauthenticated no MITM protection - Write request
+#define BLE_ATT_WRITE_REQ_UNAUTH (BLE_ATT_WR | PERM(WP, UNAUTH))
+/// Authenticated MITM protection - Write request
+#define BLE_ATT_WRITE_REQ_AUTH (BLE_ATT_WR | PERM(WP, AUTH))
+/// LE Secure Connections pairing - Write request
+#define BLE_ATT_WRITE_REQ_LE_SC (BLE_ATT_WR | PERM(WP, SEC_CON))
+
+#define BLE_ATT_WS PERM(WRITE_SIGNED, ENABLE)
+/// No security requirements - Write signed
+#define BLE_ATT_WRITE_SIGNED_NO_SECURITY (BLE_ATT_WS | PERM(WP, NO_AUTH))
+/// Unauthenticated no MITM protection - Write signed
+#define BLE_ATT_WRITE_SIGNED_UNAUTH (BLE_ATT_WS | PERM(WP, UNAUTH))
+/// Authenticated MITM protection - Write signed
+#define BLE_ATT_WRITE_SIGNED_AUTH (BLE_ATT_WS | PERM(WP, AUTH))
+/// LE Secure Connections pairing - Write signed
+#define BLE_ATT_WRITE_SIGNED_LE_SC (BLE_ATT_WS | PERM(WP, SEC_CON))
+
+#define BLE_ATT_NTF PERM(NTF, ENABLE)
+/// No security requirements - Notification
+#define BLE_ATT_NTF_NO_SECURITY (BLE_ATT_NTF | PERM(NP, NO_AUTH))
+/// Unauthenticated no MITM protection - Notification
+#define BLE_ATT_NTF_UNAUTH (BLE_ATT_NTF | PERM(NP, UNAUTH))
+/// Authenticated MITM protection - Notification
+#define BLE_ATT_NTF_AUTH (BLE_ATT_NTF | PERM(NP, AUTH))
+/// LE Secure Connections pairing - Notification
+#define BLE_ATT_NTF_LE_SC (BLE_ATT_NTF | PERM(NP, SEC_CON))
+
+#define BLE_ATT_IND PERM(IND, ENABLE)
+/// No security requirements - Indication
+#define BLE_ATT_IND_NO_SECURITY (BLE_ATT_IND | PERM(IP, NO_AUTH))
+/// Unauthenticated no MITM protection - Indication
+#define BLE_ATT_IND_UNAUTH (BLE_ATT_IND | PERM(IP, UNAUTH))
+/// Authenticated MITM protection - Indication
+#define BLE_ATT_IND_AUTH (BLE_ATT_IND | PERM(IP, AUTH))
+/// LE Secure Connections pairing - Indication
+#define BLE_ATT_IND_LE_SC (BLE_ATT_IND | PERM(IP, SEC_CON))
+
+/// Client Characteristic Configuration Codes
+typedef enum {
+    /// Stop notification
+    BLE_ATT_CCCD_STOP_NTF = ATT_CCC_STOP_NTFIND,
+    /// Stop indication
+    BLE_ATT_CCCD_STOP_IND = ATT_CCC_STOP_NTFIND,
+    /// Start notification
+    BLE_ATT_CCCD_NTF = ATT_CCC_START_NTF,
+    /// Start indication
+    BLE_ATT_CCCD_IND = ATT_CCC_START_IND
+} ble_att_cccd_val_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+///@} ATM_BTFM_ATT
+
diff --git a/platform/atm2/ATM22xx-x1x/lib/prf/ble_prf_itf.h b/platform/atm2/ATM22xx-x1x/lib/prf/ble_prf_itf.h
new file mode 100644
index 0000000..056c15a
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/lib/prf/ble_prf_itf.h
@@ -0,0 +1,59 @@
+/**
+ *******************************************************************************
+ *
+ * @file ble_prf_itf.h
+ *
+ * @brief BLE profile interface
+ *
+ * Copyright (C) Atmosic 2020-2022
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/**
+ *******************************************************************************
+ * @defgroup ATM_BTFM_PRFITF Profile interface
+ * @ingroup ATM_BTFM_API
+ * @brief ATM bluetooth framework profile interface
+ *
+ * This module contains the profile interface definitioin for middleware and
+ * application layer.
+ *
+ * @{
+ *******************************************************************************
+ */
+
+/*
+ * INCLUDE FILE
+ *******************************************************************************
+ */
+#include "ble_gap.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * STRUCTURE
+ *******************************************************************************
+ */
+/// The profile interface callback API for middleware and application layer.
+typedef struct {
+    /// @brief Profile initialization.
+    /// @details This function will be called before BT controller reset.
+    void (*init_op)(void);
+    /// @brief Profile start.
+    /// @details This function will be called after BT controller reset.
+    /// Profile shall add service in this function if needed.
+    /// @param[in] cb Callback needed be called after starting duties completed.
+    /// @param[in] ctxt Context data.
+    void (*start_op)(ble_gapm_cmd_cb cb, void const *ctxt);
+} ble_prf_cbs_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+///@} ATM_BTFM_PRFITF
+
diff --git a/platform/atm2/ATM22xx-x1x/openocd/atm2x_flash.tcl b/platform/atm2/ATM22xx-x1x/openocd/atm2x_flash.tcl
new file mode 100644
index 0000000..c4f6f84
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/atm2x_flash.tcl
@@ -0,0 +1,1463 @@
+#
+# atm2x_flash.tcl
+# Production APIs for flash operations
+# Copyright (C) Atmosic 2018-2022
+#
+
+#
+# SPI
+#
+
+array set SPI0 {
+    clkdiv	3
+    dummy	0
+}
+set SPI0(base)			$CMSDK_SPI0_BASE
+set SPI0(TRANSACTION_SETUP)	[expr {$CMSDK_SPI0_TRANSACTION_SETUP}]
+set SPI0(TRANSACTION_STATUS)	[expr {$CMSDK_SPI0_TRANSACTION_STATUS}]
+set SPI0(DATA_BYTES_LOWER)	[expr {$CMSDK_SPI0_DATA_BYTES_LOWER}]
+set SPI0(DATA_BYTES_UPPER)	[expr {$CMSDK_SPI0_DATA_BYTES_UPPER}]
+set SPI0(INTERRUPT_MASK)	[expr {$CMSDK_SPI0_INTERRUPT_MASK}]
+set SPI0(INTERRUPT_STATUS)	[expr {$CMSDK_SPI0_INTERRUPT_STATUS}]
+set SPI0(SET_INTERRUPT)		[expr {$CMSDK_SPI0_SET_INTERRUPT}]
+set SPI0(RESET_INTERRUPT)	[expr {$CMSDK_SPI0_RESET_INTERRUPT}]
+set SPI0(CORE_ID)		[expr {$CMSDK_SPI0_CORE_ID}]
+
+array set SPI1 {
+    clkdiv	3
+    dummy	0
+}
+set SPI1(base)			$CMSDK_SPI1_BASE
+set SPI1(TRANSACTION_SETUP)	[expr {$CMSDK_SPI1_TRANSACTION_SETUP}]
+set SPI1(TRANSACTION_STATUS)	[expr {$CMSDK_SPI1_TRANSACTION_STATUS}]
+set SPI1(DATA_BYTES_LOWER)	[expr {$CMSDK_SPI1_DATA_BYTES_LOWER}]
+set SPI1(DATA_BYTES_UPPER)	[expr {$CMSDK_SPI1_DATA_BYTES_UPPER}]
+set SPI1(INTERRUPT_MASK)	[expr {$CMSDK_SPI1_INTERRUPT_MASK}]
+set SPI1(INTERRUPT_STATUS)	[expr {$CMSDK_SPI1_INTERRUPT_STATUS}]
+set SPI1(SET_INTERRUPT)		[expr {$CMSDK_SPI1_SET_INTERRUPT}]
+set SPI1(RESET_INTERRUPT)	[expr {$CMSDK_SPI1_RESET_INTERRUPT}]
+set SPI1(CORE_ID)		[expr {$CMSDK_SPI1_CORE_ID}]
+
+array set SPI2 {
+    clkdiv	3
+    dummy	0
+}
+set SPI2(base)			$CMSDK_SPI2_BASE
+set SPI2(TRANSACTION_SETUP)	[expr {$CMSDK_SPI2_TRANSACTION_SETUP}]
+set SPI2(TRANSACTION_STATUS)	[expr {$CMSDK_SPI2_TRANSACTION_STATUS}]
+set SPI2(DATA_BYTES_LOWER)	[expr {$CMSDK_SPI2_DATA_BYTES_LOWER}]
+set SPI2(DATA_BYTES_UPPER)	[expr {$CMSDK_SPI2_DATA_BYTES_UPPER}]
+set SPI2(INTERRUPT_MASK)	[expr {$CMSDK_SPI2_INTERRUPT_MASK}]
+set SPI2(INTERRUPT_STATUS)	[expr {$CMSDK_SPI2_INTERRUPT_STATUS}]
+set SPI2(SET_INTERRUPT)		[expr {$CMSDK_SPI2_SET_INTERRUPT}]
+set SPI2(RESET_INTERRUPT)	[expr {$CMSDK_SPI2_RESET_INTERRUPT}]
+set SPI2(CORE_ID)		[expr {$CMSDK_SPI2_CORE_ID}]
+
+array set RADIO {
+    clkdiv	0
+    dummy	3
+}
+set RADIO(base)			$CMSDK_RADIO_BASE
+set RADIO(TRANSACTION_SETUP)	[expr {$CMSDK_RADIO_TRANSACTION_SETUP}]
+set RADIO(TRANSACTION_STATUS)	[expr {$CMSDK_RADIO_TRANSACTION_STATUS}]
+set RADIO(DATA_BYTES_LOWER)	[expr {$CMSDK_RADIO_DATA_BYTES_LOWER}]
+set RADIO(DATA_BYTES_UPPER)	[expr {$CMSDK_RADIO_DATA_BYTES_UPPER}]
+set RADIO(INTERRUPT_MASK)	[expr {$CMSDK_RADIO_INTERRUPT_MASK}]
+set RADIO(INTERRUPT_STATUS)	[expr {$CMSDK_RADIO_INTERRUPT_STATUS}]
+set RADIO(SET_INTERRUPT)	[expr {$CMSDK_RADIO_SET_INTERRUPT}]
+set RADIO(RESET_INTERRUPT)	[expr {$CMSDK_RADIO_RESET_INTERRUPT}]
+set RADIO(CORE_ID)		[expr {$CMSDK_RADIO_CORE_ID}]
+
+array set PMU {
+    clkdiv	0
+    dummy	3
+}
+set PMU(base)			$CMSDK_PMU_BASE
+set PMU(TRANSACTION_SETUP)	[expr {$CMSDK_PMU_TRANSACTION_SETUP}]
+set PMU(TRANSACTION_STATUS)	[expr {$CMSDK_PMU_TRANSACTION_STATUS}]
+set PMU(DATA_BYTES_LOWER)	[expr {$CMSDK_PMU_DATA_BYTES_LOWER}]
+set PMU(DATA_BYTES_UPPER)	[expr {$CMSDK_PMU_DATA_BYTES_UPPER}]
+set PMU(INTERRUPT_MASK)		[expr {$CMSDK_PMU_INTERRUPT_MASK}]
+set PMU(INTERRUPT_STATUS)	[expr {$CMSDK_PMU_INTERRUPT_STATUS}]
+set PMU(SET_INTERRUPT)		[expr {$CMSDK_PMU_SET_INTERRUPT}]
+set PMU(RESET_INTERRUPT)	[expr {$CMSDK_PMU_RESET_INTERRUPT}]
+set PMU(CORE_ID)		[expr {$CMSDK_PMU_CORE_ID}]
+
+
+proc do_spi_transaction { spi_name csn_stays_low opcode num_data_bytes upper lower } {
+    upvar #0 $spi_name spi
+    set transaction [expr {($spi(dummy) << 26) | ($csn_stays_low << 25) | ($opcode << 16) | ($spi(clkdiv) << 6) | (0x00000020) | ($num_data_bytes << 1)}]
+
+    mww $spi(DATA_BYTES_LOWER) $lower
+    mww $spi(DATA_BYTES_UPPER) $upper
+    mww $spi(TRANSACTION_SETUP) $transaction
+    mww $spi(TRANSACTION_SETUP) [expr {$transaction | 0x00000001}]
+
+    while {([mrw $spi(TRANSACTION_STATUS)] & 0x00000002) == 0x00000002} {}
+}
+
+proc do_spi_read { spi_name opcode {len 1} } {
+    upvar #0 $spi_name spi
+    do_spi_transaction $spi_name 0 $opcode $len 0x0 0x0
+    return [mrw $spi(DATA_BYTES_LOWER)]
+}
+
+proc spi_write_enable { spi_name } {
+    do_spi_transaction $spi_name 0 0x06 0 0x0 0x0
+}
+
+proc spi_vsr_write_enable { spi_name } {
+    do_spi_transaction $spi_name 0 0x50 0 0x0 0x0
+}
+
+proc spi_macronix_exit_deep_power_down { spi_name } {
+    do_spi_transaction $spi_name 0 0xab 0 0x0 0x0
+}
+
+proc spi_macronix_enter_secured_otp { spi_name } {
+    do_spi_transaction $spi_name 0 0xb1 0 0x0 0x0
+}
+
+proc spi_macronix_exit_secured_otp { spi_name } {
+    do_spi_transaction $spi_name 0 0xc1 0 0x0 0x0
+}
+
+proc spi_macronix_make_quad { spi_name } {
+    spi_write_enable $spi_name
+#   WRITE STATUS REG - High perf, Quad Enable
+    do_spi_transaction $spi_name 0 0x01 3 0x0 0x020040
+}
+
+proc spi_giga_make_quad { spi_name } {
+    spi_write_enable $spi_name
+#   WRITE STATUS REG - Quad Enable
+    do_spi_transaction $spi_name 0 0x01 2 0x0 0x0200
+}
+
+proc spi_fudan_make_quad { spi_name } {
+    spi_write_enable $spi_name
+    do_spi_transaction $spi_name 0 0x31 1 0x0 0x02
+}
+
+proc spi_puya_make_quad { spi_name } {
+    spi_write_enable $spi_name
+#   WRITE STATUS REG - Quad Enable
+    do_spi_transaction $spi_name 0 0x01 2 0x0 0x0200
+}
+
+proc spi_winbond_make_quad { spi_name } {
+    spi_vsr_write_enable $spi_name
+    do_spi_transaction $spi_name 0 0x31 1 0x0 0x02
+}
+
+proc flash_lower_from_addr { addr } {
+    return [expr {(($addr & 0xff) << 16) | ($addr & 0xff00) | (($addr & 0xff0000) >> 16)}]
+}
+
+proc spi_read_flash_byte { spi_name addr } {
+    upvar #0 $spi_name spi
+
+    do_spi_transaction $spi_name 0 0x03 4 0x0 [flash_lower_from_addr $addr]
+    return [expr {[mrw $spi(DATA_BYTES_LOWER)] >> 24}]
+}
+
+proc flash_upper_lower_to_be_word { upper lower } {
+    return [expr {($lower & 0xff000000) | (($upper & 0xff) << 16) | ($upper & 0xff00) | (($upper & 0xff0000) >> 16)}]
+}
+
+proc flash_upper_lower_to_le_word { upper lower } {
+    return [expr {(($upper & 0xffffff) << 8) | ($lower >> 24)}]
+}
+
+proc spi_read_flash_be_word { spi_name addr } {
+    upvar #0 $spi_name spi
+
+    do_spi_transaction $spi_name 0 0x03 7 0x0 [flash_lower_from_addr $addr]
+    set lower [mrw $spi(DATA_BYTES_LOWER)]
+    set upper [mrw $spi(DATA_BYTES_UPPER)]
+    return [flash_upper_lower_to_be_word $upper $lower]
+}
+
+proc spi_read_flash_le_word { spi_name addr } {
+    upvar #0 $spi_name spi
+
+    do_spi_transaction $spi_name 0 0x03 7 0x0 [flash_lower_from_addr $addr]
+    set lower [mrw $spi(DATA_BYTES_LOWER)]
+    set upper [mrw $spi(DATA_BYTES_UPPER)]
+    return [flash_upper_lower_to_le_word $upper $lower]
+}
+
+proc spi_fdb { spi_name addr count } {
+    set ret ""
+
+    for {set i 0} {$i < $count} {incr i} {
+	set ret [concat $ret [format " %02x" [spi_read_flash_byte $spi_name [expr {$addr+$i}]]]]
+    }
+    return $ret
+}
+
+proc spi_read_pmuradio_word { spi_name block addr } {
+    upvar #0 $spi_name spi
+
+    set opcode [expr {$block << 4}]
+    do_spi_transaction $spi_name 0 $opcode 5 0x0 $addr
+    set lower [mrw $spi(DATA_BYTES_LOWER)]
+    set upper [mrw $spi(DATA_BYTES_UPPER)]
+    return [expr {(($upper & 0xff) << 24) | ($lower >> 8)}]
+}
+
+proc spi_write_pmuradio_word { spi_name block addr data } {
+    upvar #0 $spi_name spi
+
+    set opcode [expr {($block << 4) | 0x01}]
+    set lower [expr {(($data & 0xffffff) << 8) | $addr}]
+    set upper [expr {$data >> 24}]
+    do_spi_transaction $spi_name 0 $opcode 5 $upper $lower
+}
+
+proc spi_write_disable { spi_name } {
+    do_spi_transaction $spi_name 0 0x04 0 0x0 0x0
+}
+
+proc spi_read_status { spi_name {opcode 0x05} } {
+    return [do_spi_read $spi_name $opcode]
+}
+
+proc spi_wait_for_no_wip { spi_name } {
+    while {1} {
+	set ret [spi_read_status $spi_name]
+	if {($ret & 0x1) == 0x0} {
+	    return $ret
+	}
+    }
+}
+
+proc spi_macronix_chip_erase { spi_name } {
+    spi_write_enable $spi_name
+    do_spi_transaction $spi_name 0 0xc7 0 0x0 0x0
+    set status [spi_wait_for_no_wip $spi_name]
+    if {($status & 0x02) != 0x00} {
+	error [format "Chip erase command FAILED!  Status Register 0x%02x" $status]
+    }
+    set scur [spi_macronix_read_scur $spi_name]
+    if {($scur & 0x40) != 0x00} {
+	error [format "Chip erase FAILED!  Security Register 0x%02x" $scur]
+    }
+}
+
+proc spi_macronix_sector_erase { spi_name addr } {
+    spi_write_enable $spi_name
+    do_spi_transaction $spi_name 0 0x20 3 0x0 [flash_lower_from_addr $addr]
+    set status [spi_wait_for_no_wip $spi_name]
+    if {($status & 0x02) != 0x00} {
+	error [format "Sector 0x%06x erase command FAILED!  Status Register 0x%02x" $addr $status]
+    }
+    set scur [spi_macronix_read_scur $spi_name]
+    if {($scur & 0x40) != 0x00} {
+	error [format "Sector 0x%06x erase FAILED!  Security Register 0x%02x" $addr $scur]
+    }
+}
+
+proc spi_winbond_chip_erase { spi_name } {
+    spi_write_enable $spi_name
+    do_spi_transaction $spi_name 0 0xc7 0 0x0 0x0
+    set status [spi_wait_for_no_wip $spi_name]
+    if {($status & 0x02) != 0x00} {
+	error [format "Chip erase command FAILED!  Status Register 0x%02x" $status]
+    }
+}
+
+proc spi_winbond_sector_erase { spi_name addr } {
+    spi_write_enable $spi_name
+    do_spi_transaction $spi_name 0 0x20 3 0x0 [flash_lower_from_addr $addr]
+    set status [spi_wait_for_no_wip $spi_name]
+    if {($status & 0x02) != 0x00} {
+	error [format "Sector 0x%06x erase command FAILED!  Status Register 0x%02x" $addr $status]
+    }
+}
+
+proc spi_macronix_read_scur { spi_name } {
+    return [do_spi_read $spi_name 0x2b]
+}
+
+proc spi_micron_read_evcr { spi_name } {
+    return [do_spi_read $spi_name 0x65]
+}
+
+proc spi_micron_read_flag_status { spi_name } {
+    return [do_spi_read $spi_name 0x70]
+}
+
+proc spi_micron_make_quad { spi_name } {
+    set evcr [spi_micron_read_evcr $spi_name]
+    spi_write_enable $spi_name
+    do_spi_transaction $spi_name 0 0x61 1 0x0 [expr {$evcr & ~0xd0}]
+}
+
+proc spi_reset { spi_name } {
+    do_spi_transaction $spi_name 0 0x66 0 0x0 0x0
+    do_spi_transaction $spi_name 0 0x99 0 0x0 0x0
+}
+
+proc spi_read_flash_id { spi_name {len 1} } {
+    return [do_spi_read $spi_name 0x9f $len]
+}
+
+
+#
+# QSPI
+#
+
+array set QSPI_MICRON {
+    type	micron
+    dummy	2
+}
+array set QSPI_MACRONIX {
+    type	macronix
+    dummy	4
+}
+
+proc qspi_drive_start {} {
+    global CMSDK_QSPI_TRANSACTION_SETUP
+
+    mww $CMSDK_QSPI_TRANSACTION_SETUP 0x02000000
+}
+
+proc to_oe_format_quad { nibble } {
+    switch $nibble {
+	 0 {return 0x2222}
+	 1 {return 0x2223}
+	 2 {return 0x2232}
+	 3 {return 0x2233}
+	 4 {return 0x2322}
+	 5 {return 0x2323}
+	 6 {return 0x2332}
+	 7 {return 0x2333}
+	 8 {return 0x3222}
+	 9 {return 0x3223}
+	10 {return 0x3232}
+	11 {return 0x3233}
+	12 {return 0x3322}
+	13 {return 0x3323}
+	14 {return 0x3332}
+	15 {return 0x3333}
+	default {return 0}
+    }
+}
+
+proc qspi_drive_nibble { nibble } {
+    global CMSDK_QSPI_TRANSACTION_SETUP
+
+    set oe [expr {[to_oe_format_quad $nibble] << 8}]
+    mww $CMSDK_QSPI_TRANSACTION_SETUP $oe
+    mww $CMSDK_QSPI_TRANSACTION_SETUP [expr {0x01000000 | $oe}]
+}
+
+proc qspi_drive_byte { byte } {
+    qspi_drive_nibble [expr {($byte & 0xf0) >> 4}]
+    qspi_drive_nibble [expr {$byte & 0x0f}]
+}
+
+proc qspi_micron_drive_opcode { opcode } {
+    qspi_drive_byte $opcode
+}
+
+proc qspi_macronix_drive_opcode { opcode } {
+    global CMSDK_QSPI_TRANSACTION_SETUP
+
+    for {set i 0} {$i < 8} {incr i} {
+	set opcode [expr {$opcode << 1}]
+	set drive [expr {($opcode & 0x100) | 0x200}]
+	mww $CMSDK_QSPI_TRANSACTION_SETUP $drive
+	mww $CMSDK_QSPI_TRANSACTION_SETUP [expr {0x01000000 | $drive}]
+    }
+}
+
+proc qspi_winbond_drive_opcode { opcode } {
+    global CMSDK_QSPI_TRANSACTION_SETUP
+
+    for {set i 0} {$i < 8} {incr i} {
+	set opcode [expr {$opcode << 1}]
+	set drive [expr {($opcode & 0x100) | 0x200}]
+	mww $CMSDK_QSPI_TRANSACTION_SETUP $drive
+	mww $CMSDK_QSPI_TRANSACTION_SETUP [expr {0x01000000 | $drive}]
+    }
+}
+
+proc qspi_capture_byte {} {
+    global CMSDK_QSPI_TRANSACTION_SETUP
+
+    mww $CMSDK_QSPI_TRANSACTION_SETUP 0
+    mww $CMSDK_QSPI_TRANSACTION_SETUP 0x01000000
+    mww $CMSDK_QSPI_TRANSACTION_SETUP 0x010000f0
+
+    mww $CMSDK_QSPI_TRANSACTION_SETUP 0
+    mww $CMSDK_QSPI_TRANSACTION_SETUP 0x01000000
+    mww $CMSDK_QSPI_TRANSACTION_SETUP 0x0100000f
+}
+
+proc qspi_drive_stop {} {
+    global CMSDK_QSPI_TRANSACTION_SETUP
+
+    mww $CMSDK_QSPI_TRANSACTION_SETUP 0
+    mww $CMSDK_QSPI_TRANSACTION_SETUP 0x02000000
+}
+
+proc do_qspi_cmd { qspi_name opcode } {
+    upvar #0 $qspi_name qspi
+
+    qspi_drive_start
+    qspi_${qspi(type)}_drive_opcode $opcode
+    qspi_drive_stop
+}
+
+proc do_qspi_write { qspi_name opcode data } {
+    upvar #0 $qspi_name qspi
+
+    qspi_drive_start
+    qspi_${qspi(type)}_drive_opcode $opcode
+    qspi_drive_byte $data
+    qspi_drive_stop
+}
+
+proc do_qspi_read_byte { qspi_name opcode } {
+    upvar #0 $qspi_name qspi
+    global CMSDK_QSPI_READ_DATA
+
+    qspi_drive_start
+    qspi_${qspi(type)}_drive_opcode $opcode
+    qspi_capture_byte
+    qspi_drive_stop
+    return [mrw $CMSDK_QSPI_READ_DATA]
+}
+
+proc qspi_write_disable { qspi_name } {
+    do_qspi_cmd $qspi_name 0x04
+}
+
+proc qspi_write_enable { qspi_name } {
+    do_qspi_cmd $qspi_name 0x06
+}
+
+proc qspi_read_flash_byte { qspi_name addr } {
+    upvar #0 $qspi_name qspi
+    global CMSDK_QSPI_READ_DATA
+
+    qspi_drive_start
+    qspi_${qspi(type)}_drive_opcode 0xeb
+    qspi_drive_byte [expr {($addr >> 16) & 0xff}]
+    qspi_drive_byte [expr {($addr >> 8) & 0xff}]
+    qspi_drive_byte [expr {$addr & 0xff}]
+    for {set i 0} {$i < $qspi(dummy)} {incr i} {
+	qspi_drive_byte 0x00
+    }
+    qspi_capture_byte
+    qspi_drive_stop
+    return [mrw $CMSDK_QSPI_READ_DATA]
+}
+
+proc qspi_read_flash_be { qspi_name addr {len 4} } {
+    upvar #0 $qspi_name qspi
+    global CMSDK_QSPI_READ_DATA
+
+    qspi_drive_start
+    qspi_${qspi(type)}_drive_opcode 0xeb
+    qspi_drive_byte [expr {($addr >> 16) & 0xff}]
+    qspi_drive_byte [expr {($addr >> 8) & 0xff}]
+    qspi_drive_byte [expr {$addr & 0xff}]
+    for {set i 0} {$i < $qspi(dummy)} {incr i} {
+	qspi_drive_byte 0x00
+    }
+    set ret 0
+    for {set i 0} {$i < $len} {incr i} {
+	qspi_capture_byte
+	set ret [expr {($ret << 8) | [mrw $CMSDK_QSPI_READ_DATA]}]
+    }
+    qspi_drive_stop
+    return $ret
+}
+
+proc qspi_read_flash_le { qspi_name addr {len 4} } {
+    upvar #0 $qspi_name qspi
+    global CMSDK_QSPI_READ_DATA
+
+    qspi_drive_start
+    qspi_${qspi(type)}_drive_opcode 0xeb
+    qspi_drive_byte [expr {($addr >> 16) & 0xff}]
+    qspi_drive_byte [expr {($addr >> 8) & 0xff}]
+    qspi_drive_byte [expr {$addr & 0xff}]
+    for {set i 0} {$i < $qspi(dummy)} {incr i} {
+	qspi_drive_byte 0x00
+    }
+    set ret 0
+    for {set i 0} {$i < $len} {incr i} {
+	qspi_capture_byte
+	set ret [expr {$ret | ([mrw $CMSDK_QSPI_READ_DATA] << ($i*8))}]
+    }
+    qspi_drive_stop
+    return $ret
+}
+
+proc qspi_fdb { qspi_name addr count } {
+    set ret ""
+
+    for {set i 0} {$i < $count} {incr i} {
+	set ret [concat $ret [format " %02x" [qspi_read_flash_byte $qspi_name [expr {$addr+$i}]]]]
+    }
+    return $ret
+}
+
+proc qspi_reset { qspi_name } {
+    do_qspi_cmd $qspi_name 0x66
+    do_qspi_cmd $qspi_name 0x99
+}
+
+proc qspi_micron_read_status {} {
+    return [do_qspi_read_byte QSPI_MICRON 0x05]
+}
+
+proc qspi_micron_wait_for_no_wip {} {
+    while {1} {
+	set ret [qspi_micron_read_status]
+	if {($ret & 0x1) == 0x0} {
+	    return $ret
+	}
+    }
+}
+
+proc qspi_micron_read_evcr {} {
+    return [do_qspi_read_byte QSPI_MICRON 0x65]
+}
+
+proc qspi_micron_read_flag_status {} {
+    return [do_qspi_read_byte QSPI_MICRON 0x70]
+}
+
+proc qspi_micron_read_flash_id {} {
+    return [do_qspi_read_byte QSPI_MICRON 0xaf]
+}
+
+proc qspi_micron_bulk_erase { } {
+    qspi_write_enable QSPI_MICRON
+
+    qspi_drive_start
+    qspi_micron_drive_opcode 0xc7
+    qspi_drive_stop
+
+    set status [qspi_micron_wait_for_no_wip]
+    if {($status & 0x02) != 0x00} {
+	error [format "Chip erase command FAILED!  Status Register 0x%02x" $status]
+    }
+    set flag_status [qspi_micron_read_flag_status]
+    if {($flag_status & 0x20) != 0x00} {
+	error [format "Chip erase FAILED!  Flag Status Register 0x%02x" $flag_status]
+    }
+}
+
+proc qspi_micron_subsector_erase { addr } {
+    qspi_write_enable QSPI_MICRON
+
+    qspi_drive_start
+    qspi_micron_drive_opcode 0x20
+    qspi_drive_byte [expr {($addr >> 16) & 0xff}]
+    qspi_drive_byte [expr {($addr >> 8) & 0xff}]
+    qspi_drive_byte [expr {$addr & 0xff}]
+    qspi_drive_stop
+
+    set status [qspi_micron_wait_for_no_wip]
+    if {($status & 0x02) != 0x00} {
+	error [format "Sector 0x%06x erase command FAILED!  Status Register 0x%02x" $addr $status]
+    }
+    set flag_status [qspi_micron_read_flag_status]
+    if {($flag_status & 0x20) != 0x00} {
+	error [format "Sector 0x%06x erase FAILED!  Flag Status Register 0x%02x" $addr $flag_status]
+    }
+}
+
+proc qspi_macronix_make_ahb {} {
+    global CMSDK_QSPI_TRANSACTION_SETUP
+    global CMSDK_QSPI_REMOTE_AHB_SETUP
+    global CMSDK_QSPI_REMOTE_AHB_SETUP_2
+    global CMSDK_QSPI_REMOTE_AHB_SETUP_3
+    global CMSDK_QSPI_REMOTE_AHB_SETUP_5
+
+    # Byte swaps, macronix, div by 1, opcode 0xeb, mode 2, dummy 4
+    set REMOTE_AHB_SETUP 0x10eceb64
+    if {![info exists ::env(NO_HYPER)]} {
+	enable_hpc
+	# Slip half cycle, hyper
+	set REMOTE_AHB_SETUP [expr {$REMOTE_AHB_SETUP | 0x60000000}]
+    }
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP $REMOTE_AHB_SETUP
+    # READ STATUS REG, 4PP, WRITE ENABLE
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP_2 0x00053806
+    # Check wle, wip bit 0+, wle bit 1+
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP_3 0x81300000
+    # Stall: WE2PP 32, WLE 32, PP WIP 1023
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP_5 0x020083ff
+    # Give AHB control
+    mww $CMSDK_QSPI_TRANSACTION_SETUP 0x12000000
+
+    adapter speed 75
+}
+
+proc qspi_giga_make_ahb {} {
+    global CMSDK_QSPI_TRANSACTION_SETUP
+    global CMSDK_QSPI_REMOTE_AHB_SETUP
+    global CMSDK_QSPI_REMOTE_AHB_SETUP_2
+    global CMSDK_QSPI_REMOTE_AHB_SETUP_3
+    global CMSDK_QSPI_REMOTE_AHB_SETUP_5
+
+    # Serial PP addr, swaps, macronix, div by 1, opcode 0xeb, mode 2, dummy 4
+    set REMOTE_AHB_SETUP 0x18eceb64
+    if {![info exists ::env(NO_HYPER)]} {
+	enable_hpc
+	# Slip half cycle, hyper
+	set REMOTE_AHB_SETUP [expr {$REMOTE_AHB_SETUP | 0x60000000}]
+    }
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP $REMOTE_AHB_SETUP
+    # READ STATUS REG, QIPP, WRITE ENABLE
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP_2 0x00053206
+    # Check wle, wip bit 0+, wle bit 1+
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP_3 0x81300000
+    # Stall: WE2PP 32, WLE 32, PP WIP 1023
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP_5 0x020083ff
+    # Give AHB control
+    mww $CMSDK_QSPI_TRANSACTION_SETUP 0x12000000
+
+    adapter speed 75
+}
+
+proc qspi_fudan_make_ahb {} {
+    global CMSDK_QSPI_TRANSACTION_SETUP
+    global CMSDK_QSPI_REMOTE_AHB_SETUP
+    global CMSDK_QSPI_REMOTE_AHB_SETUP_2
+    global CMSDK_QSPI_REMOTE_AHB_SETUP_3
+    global CMSDK_QSPI_REMOTE_AHB_SETUP_5
+
+    # Serial PP addr, swaps, macronix, div by 1, opcode 0xeb, mode 2, dummy 4
+    set REMOTE_AHB_SETUP 0x18eceb64
+    if {![info exists ::env(NO_HYPER)]} {
+	enable_hpc
+	# Slip half cycle, hyper
+	set REMOTE_AHB_SETUP [expr {$REMOTE_AHB_SETUP | 0x60000000}]
+    }
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP $REMOTE_AHB_SETUP
+    # READ STATUS REG, QIPP, WRITE ENABLE
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP_2 0x00053206
+    # Check wle, wip bit 0+, wle bit 1+
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP_3 0x81300000
+    # Stall: WE2PP 32, WLE 32, PP WIP 1023
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP_5 0x020083ff
+    # Give AHB control
+    mww $CMSDK_QSPI_TRANSACTION_SETUP 0x12000000
+
+    adapter speed 75
+}
+
+proc qspi_puya_make_ahb {} {
+    global CMSDK_QSPI_TRANSACTION_SETUP
+    global CMSDK_QSPI_REMOTE_AHB_SETUP
+    global CMSDK_QSPI_REMOTE_AHB_SETUP_2
+    global CMSDK_QSPI_REMOTE_AHB_SETUP_3
+    global CMSDK_QSPI_REMOTE_AHB_SETUP_5
+
+    # Serial PP addr, swaps, macronix, div by 1, opcode 0xeb, mode 2, dummy 4
+    set REMOTE_AHB_SETUP 0x18eceb64
+    if {![info exists ::env(NO_HYPER)]} {
+	enable_hpc
+	# Slip half cycle, hyper
+	set REMOTE_AHB_SETUP [expr {$REMOTE_AHB_SETUP | 0x60000000}]
+    }
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP $REMOTE_AHB_SETUP
+    # READ STATUS REG, QIPP, WRITE ENABLE
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP_2 0x00053206
+    # Check wle, wip bit 0+, wle bit 1+
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP_3 0x81300000
+    # Stall: WE2PP 32, WLE 32, PP WIP 1023
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP_5 0x020083ff
+    # Give AHB control
+    mww $CMSDK_QSPI_TRANSACTION_SETUP 0x12000000
+
+    adapter speed 75
+}
+
+proc qspi_winbond_make_ahb {} {
+    global CMSDK_QSPI_TRANSACTION_SETUP
+    global CMSDK_QSPI_REMOTE_AHB_SETUP
+    global CMSDK_QSPI_REMOTE_AHB_SETUP_2
+    global CMSDK_QSPI_REMOTE_AHB_SETUP_3
+    global CMSDK_QSPI_REMOTE_AHB_SETUP_5
+
+    # Serial PP addr, swaps, macronix, div by 1, opcode 0xeb, mode 2, dummy 4
+    set REMOTE_AHB_SETUP 0x18eceb64
+    if {![info exists ::env(NO_HYPER)]} {
+	enable_hpc
+	# Slip half cycle, hyper
+	set REMOTE_AHB_SETUP [expr {$REMOTE_AHB_SETUP | 0x60000000}]
+    }
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP $REMOTE_AHB_SETUP
+    # READ STATUS REG, QIPP, WRITE ENABLE
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP_2 0x00053206
+    # Check wle, wip bit 0+, wle bit 1+
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP_3 0x81300000
+    # Stall: WE2PP 32, WLE 32, PP WIP 1023
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP_5 0x020083ff
+    # Give AHB control
+    mww $CMSDK_QSPI_TRANSACTION_SETUP 0x12000000
+
+    adapter speed 75
+}
+
+proc qspi_micron_make_ahb {} {
+    global CMSDK_QSPI_TRANSACTION_SETUP
+    global CMSDK_QSPI_REMOTE_AHB_SETUP
+    global CMSDK_QSPI_REMOTE_AHB_SETUP_2
+
+    qspi_write_enable QSPI_MICRON
+    # WRITE VOLATILE CONFIG REG
+    do_qspi_write QSPI_MICRON 0x81 0x2b
+
+    # Byte swaps, div by 1, opcode 0xeb, mode 2, dummy 2
+    set REMOTE_AHB_SETUP 0x10e4eb62
+    if {![info exists ::env(NO_HYPER)]} {
+	enable_hpc
+	# Slip half cycle, hyper
+	set REMOTE_AHB_SETUP [expr {$REMOTE_AHB_SETUP | 0x60000000}]
+    }
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP $REMOTE_AHB_SETUP
+    # READ STATUS REG, PAGE PROGRAM, WRITE ENABLE
+    mww $CMSDK_QSPI_REMOTE_AHB_SETUP_2 0x00050206
+    # Give AHB control
+    mww $CMSDK_QSPI_TRANSACTION_SETUP 0x12000000
+
+    adapter speed 75
+}
+
+proc qspi_disable_ahb {} {
+    global CMSDK_QSPI_TRANSACTION_SETUP
+
+    mww $CMSDK_QSPI_TRANSACTION_SETUP 0x02000000
+    if {![info exists ::env(NO_HYPER)]} {
+	disable_hpc
+    }
+}
+
+proc qspi_micron_make_spi {} {
+    qspi_write_enable QSPI_MICRON
+    # WRITE VOLATILE CONFIG REG
+    do_qspi_write QSPI_MICRON 0x81 0xfb
+
+    set evcr [qspi_micron_read_evcr]
+    qspi_write_enable QSPI_MICRON
+    # WRITE ENHANCED VOLATILE CONFIG REG
+    do_qspi_write QSPI_MICRON 0x61 [expr {$evcr | 0xd0}]
+}
+
+
+#
+# Sydney procs
+#
+
+proc sydney_setup_5x5 {} {
+    global CMSDK_WRPR_PIN_SELECTION_C
+    global CMSDK_WRPR_PIN_SELECTION_D
+    global CMSDK_WRPR_PIN_SELECTION_E
+
+    mww $CMSDK_WRPR_PIN_SELECTION_C 0x003fff84
+    mww $CMSDK_WRPR_PIN_SELECTION_D 0x19120528
+    mww $CMSDK_WRPR_PIN_SELECTION_E 0x50000000
+}
+
+proc sydney_setup_5x5_stacked {} {
+    global CMSDK_WRPR_PIN_SELECTION_A
+    global CMSDK_WRPR_PIN_SELECTION_B
+    global CMSDK_WRPR_PIN_SELECTION_C
+    global CMSDK_WRPR_PIN_SELECTION_D
+
+    mww $CMSDK_WRPR_PIN_SELECTION_A 0x0000052c
+    mww $CMSDK_WRPR_PIN_SELECTION_B 0x6b400000
+    mww $CMSDK_WRPR_PIN_SELECTION_C 0x003fff84
+    mww $CMSDK_WRPR_PIN_SELECTION_D 0x18000000
+}
+
+proc sydney_print_part_number { nvm_efuse_autoread } {
+    set pkg [expr {$nvm_efuse_autoread & 0x08}]
+    set stacked [expr {$nvm_efuse_autoread & 0x10}]
+    set non_harv [expr {$nvm_efuse_autoread & 0x100}]
+    set csp [expr {$nvm_efuse_autoread & 0x2000}]
+    set pkg_7x7 [expr {$nvm_efuse_autoread & 0x4000}]
+
+    puts [format "ATM%d2%d%d-x1x silicon: %s pkg, %s" \
+	[expr {$non_harv ? 2 : 3}] \
+	[expr {$pkg ? [expr {$csp ? 5 : 0}] : [expr {$pkg_7x7 ? 3 : 2}]}] \
+	[expr {$stacked ? 2 : 1}] \
+	[expr {$pkg ? [expr {$csp ? "CSP" : "5x5"}] : [expr {$pkg_7x7 ? "7x7" : "6x6"}]}] \
+	[expr {$stacked ? "Stacked flash" : "External flash"}]]
+}
+
+proc check_flash_mem_cap { maker mem_cap region_end } {
+    set byte_size [expr {1 << $mem_cap}]
+    puts [format "%s %uMb flash (%u bytes)" $maker [expr {1 << ($mem_cap - 17)}] $byte_size]
+    if {!$region_end} {
+	return $byte_size
+    }
+    if {$byte_size >= $region_end} {
+	return $byte_size
+    }
+    error [format "Check FLASH_SIZE setting: region_end 0x%x too large for flash device size 0x%x" $region_end $byte_size]
+}
+
+proc sydney_discover_flash { {region_end 0x0} } {
+    global CMSDK_NVM_EFUSE_AUTOREAD
+
+    enable_nvm
+    set nvm_EFUSE_AUTOREAD [mrw $CMSDK_NVM_EFUSE_AUTOREAD]
+    set pkg_opts [expr {$nvm_EFUSE_AUTOREAD & 0x18}]
+    if {$pkg_opts == 0x08} {
+	sydney_setup_5x5
+    } elseif {$pkg_opts == 0x18} {
+	sydney_setup_5x5_stacked
+    }
+    sydney_print_part_number $nvm_EFUSE_AUTOREAD
+
+    for {set i 0} {$i < 2} {incr i} {
+	set id [spi_read_flash_id SPI2 3]
+#	puts [format "flash id 0x%06x" $id]
+	set flash_id [expr {$id & 0xffff}]
+	set mem_cap [expr {$id >> 16}]
+	if {$flash_id == 0x28c2} {
+	    set flash_size [check_flash_mem_cap "Macronix" $mem_cap $region_end]
+	    return [list "macronix" $flash_size $mem_cap]
+	} elseif {$flash_id == 0x65c8} {
+	    set flash_size [check_flash_mem_cap "GigaDevice" $mem_cap $region_end]
+	    return [list "giga" $flash_size $mem_cap]
+	} elseif {$flash_id == 0x28a1} {
+	    set flash_size [check_flash_mem_cap "Fudan" $mem_cap $region_end]
+	    return [list "fudan" $flash_size $mem_cap]
+	} elseif {($flash_id == 0x2085) || ($flash_id == 0x4085) || ($flash_id == 0x6085)} {
+	    set flash_size [check_flash_mem_cap "Puya" $mem_cap $region_end]
+	    return [list "puya" $flash_size $mem_cap]
+	} elseif {$flash_id == 0x60ef} {
+	    set flash_size [check_flash_mem_cap "Winbond" $mem_cap $region_end]
+	    return [list "winbond" $flash_size $mem_cap]
+	} elseif {$flash_id == 0xba20} {
+	    set flash_size [check_flash_mem_cap "Micron" $mem_cap $region_end]
+	    return [list "micron" $flash_size $mem_cap]
+	} else {
+	    # Might have been in deep power down or performance enhanced mode
+	    spi_macronix_exit_deep_power_down SPI2
+
+	    # Might be a micron in qspi mode
+	    enable_qspi
+	    sydney_micron_qspi_2_spi
+	}
+    }
+    error [format "Unknown flash 0x%06x" $id]
+}
+
+proc sydney_macronix_enable_ahb_bridge {} {
+    spi_macronix_make_quad SPI2
+    if {([spi_read_status SPI2] & 0x40) == 0x00} {
+	error "Failed to set QE"
+    }
+    enable_qspi
+    qspi_macronix_make_ahb
+    return "Macronix OK"
+}
+
+proc sydney_giga_enable_ahb_bridge {} {
+    if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	spi_giga_make_quad SPI2
+	if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	    error "Failed to set QE"
+	}
+    }
+    enable_qspi
+    qspi_giga_make_ahb
+    return "Giga OK"
+}
+
+proc sydney_fudan_enable_ahb_bridge {} {
+    if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	spi_fudan_make_quad SPI2
+	if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	    error "Failed to set QE"
+	}
+    }
+    enable_qspi
+    qspi_fudan_make_ahb
+    return "Fudan OK"
+}
+
+proc sydney_puya_enable_ahb_bridge {} {
+    if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	spi_puya_make_quad SPI2
+	if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	    error "Failed to set QE"
+	}
+    }
+    enable_qspi
+    qspi_puya_make_ahb
+    return "Puya OK"
+}
+
+proc sydney_winbond_enable_ahb_bridge {} {
+    if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	spi_winbond_make_quad SPI2
+	if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	    error "Failed to set QE"
+	}
+    }
+    enable_qspi
+    qspi_winbond_make_ahb
+    return "Winbond OK"
+}
+
+proc sydney_micron_enable_ahb_bridge {} {
+    spi_micron_make_quad SPI2
+    enable_qspi
+    if {[qspi_micron_read_flash_id] != 0x20} {
+	error "Failed to read qspi flash id"
+    }
+    qspi_micron_make_ahb
+    return "Micron OK"
+}
+
+proc sydney_enable_ahb_bridge {} {
+    enable_spi2
+    lassign [sydney_discover_flash] flash size
+
+    sydney_${flash}_enable_ahb_bridge
+}
+
+proc sydney_disable_ahb_bridge {} {
+    global _SWD_KHZ
+
+    adapter speed $_SWD_KHZ
+    qspi_disable_ahb
+}
+
+proc sydney_macronix_qspi_2_spi {} {
+    reset_qspi
+}
+
+proc sydney_giga_qspi_2_spi {} {
+    reset_qspi
+}
+
+proc sydney_fudan_qspi_2_spi {} {
+    reset_qspi
+}
+
+proc sydney_puya_qspi_2_spi {} {
+    reset_qspi
+}
+
+proc sydney_winbond_qspi_2_spi {} {
+    reset_qspi
+}
+
+proc sydney_micron_qspi_2_spi {} {
+    qspi_micron_make_spi
+    reset_qspi
+}
+
+proc sydney_macronix_ahb_2_spi {} {
+    sydney_disable_ahb_bridge
+    sydney_macronix_qspi_2_spi
+}
+
+proc sydney_giga_ahb_2_spi {} {
+    sydney_disable_ahb_bridge
+    sydney_giga_qspi_2_spi
+}
+
+proc sydney_fudan_ahb_2_spi {} {
+    sydney_disable_ahb_bridge
+    sydney_fudan_qspi_2_spi
+}
+
+proc sydney_puya_ahb_2_spi {} {
+    sydney_disable_ahb_bridge
+    sydney_puya_qspi_2_spi
+}
+
+proc sydney_winbond_ahb_2_spi {} {
+    sydney_disable_ahb_bridge
+    sydney_winbond_qspi_2_spi
+}
+
+proc sydney_micron_ahb_2_spi {} {
+    sydney_disable_ahb_bridge
+    sydney_micron_qspi_2_spi
+}
+
+proc sydney_macronix_erase_whole { } {
+    spi_macronix_make_quad SPI2
+    if {([spi_read_status SPI2] & 0x40) == 0x00} {
+	error "Failed to set QE"
+    }
+    spi_macronix_chip_erase SPI2
+    enable_qspi
+}
+
+proc sydney_macronix_erase { start end } {
+    spi_macronix_make_quad SPI2
+    if {([spi_read_status SPI2] & 0x40) == 0x00} {
+	error "Failed to set QE"
+    }
+    for {set i $start} {$i < $end} {set i [expr {$i + 0x1000}]} {
+	spi_macronix_sector_erase SPI2 $i
+    }
+    enable_qspi
+}
+
+proc sydney_giga_erase_whole { } {
+    if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	spi_giga_make_quad SPI2
+	if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	    error "Failed to set QE"
+	}
+    }
+    spi_winbond_chip_erase SPI2
+    enable_qspi
+}
+
+proc sydney_giga_erase { start end } {
+    if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	spi_giga_make_quad SPI2
+	if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	    error "Failed to set QE"
+	}
+    }
+    for {set i $start} {$i < $end} {set i [expr {$i + 0x1000}]} {
+	spi_winbond_sector_erase SPI2 $i
+    }
+    enable_qspi
+}
+
+proc sydney_fudan_erase_whole { } {
+    if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	spi_fudan_make_quad SPI2
+	if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	    error "Failed to set QE"
+	}
+    }
+    spi_winbond_chip_erase SPI2
+    enable_qspi
+}
+
+proc sydney_fudan_erase { start end } {
+    if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	spi_fudan_make_quad SPI2
+	if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	    error "Failed to set QE"
+	}
+    }
+    for {set i $start} {$i < $end} {set i [expr {$i + 0x1000}]} {
+	spi_winbond_sector_erase SPI2 $i
+    }
+    enable_qspi
+}
+
+proc sydney_puya_erase_whole { } {
+    if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	spi_puya_make_quad SPI2
+	if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	    error "Failed to set QE"
+	}
+    }
+    spi_winbond_chip_erase SPI2
+    enable_qspi
+}
+
+proc sydney_puya_erase { start end } {
+    if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	spi_puya_make_quad SPI2
+	if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	    error "Failed to set QE"
+	}
+    }
+    for {set i $start} {$i < $end} {set i [expr {$i + 0x1000}]} {
+	spi_winbond_sector_erase SPI2 $i
+    }
+    enable_qspi
+}
+
+proc sydney_winbond_erase_whole { } {
+    if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	spi_winbond_make_quad SPI2
+	if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	    error "Failed to set QE"
+	}
+    }
+    spi_winbond_chip_erase SPI2
+    enable_qspi
+}
+
+proc sydney_winbond_erase { start end } {
+    if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	spi_winbond_make_quad SPI2
+	if {([spi_read_status SPI2 0x35] & 0x02) == 0x00} {
+	    error "Failed to set QE"
+	}
+    }
+    for {set i $start} {$i < $end} {set i [expr {$i + 0x1000}]} {
+	spi_winbond_sector_erase SPI2 $i
+    }
+    enable_qspi
+}
+
+proc sydney_winbond_protect_flash { {mpr_lock_size 0} } {
+    puts [format "sydney_winbond_protect_flash: mpr_lock_size = 0x%x" $mpr_lock_size]
+
+    set status_reg 0
+    if {$mpr_lock_size == 0} {
+	puts "disable protection"
+    } elseif {$mpr_lock_size == 0x1000} {
+	puts "protect - 4KB (07F000 - 07FFFF)"
+	# WRITE STATUS REG - SEC, TB, BP2, BP1, BP0 [1,0,0,0,1]
+	set status_reg 0x44
+    } elseif {$mpr_lock_size == 0x2000} {
+	puts "protect - 8KB (07E000 - 07FFFF)"
+	# WRITE STATUS REG - SEC, TB, BP2, BP1, BP0 [1,0,0,1,0]
+	set status_reg 0x48
+    } elseif {$mpr_lock_size == 0x4000} {
+	puts "protect - 16KB (07C000 - 07FFFF)"
+	# WRITE STATUS REG - SEC, TB, BP2, BP1, BP0 [1,0,0,1,1]
+	set status_reg 0x4c
+    } elseif {$mpr_lock_size == 0x8000} {
+	puts "protect - 32KB (078000 - 07FFFF)"
+	# WRITE STATUS REG - SEC, TB, BP2, BP1, BP0 [1,0,1,1,0]
+	set status_reg 0x58
+    } else {
+	error "Protection size not supported."
+    }
+    return $status_reg
+}
+
+proc sydney_micron_erase_whole { } {
+    spi_micron_make_quad SPI2
+    enable_qspi
+    if {[qspi_micron_read_flash_id] != 0x20} {
+	error "Failed to read qspi flash id"
+    }
+    qspi_micron_bulk_erase
+}
+
+proc sydney_micron_erase { start end } {
+    spi_micron_make_quad SPI2
+    enable_qspi
+    if {[qspi_micron_read_flash_id] != 0x20} {
+	error "Failed to read qspi flash id"
+    }
+    for {set i $start} {$i < $end} {set i [expr {$i + 0x1000}]} {
+	qspi_micron_subsector_erase $i
+    }
+}
+
+proc sydney_macronix_dump_otp { image {len 8192} } {
+    reset halt
+    enable_spi2
+    lassign [sydney_discover_flash] flash size
+    if {$flash != "macronix"} {
+	error [format "Wrong flash type: %s" $flash]
+    }
+
+    set scur [spi_macronix_read_scur SPI2]
+    puts [format "Security Register 0x%02x" $scur]
+
+    spi_macronix_enter_secured_otp SPI2
+
+    sydney_${flash}_enable_ahb_bridge
+
+    dump_image $image 0x10000000 $len
+
+    sydney_${flash}_ahb_2_spi
+
+    spi_macronix_exit_secured_otp SPI2
+}
+
+proc sydney_erase_upgd_data {flash size} {
+    set part_offset [expr {$size / 2}]
+    set end [expr {$part_offset + 0x1000}]
+    puts [format "Erasing upgd sector at 0x%08x to 0x%08x " $part_offset $end]
+    sydney_${flash}_erase $part_offset $end
+}
+
+proc sydney_erase_flash { {len 0x78000} } {
+    reset halt
+    enable_spi2
+    lassign [sydney_discover_flash $len] flash size
+
+    if {[info exists ::env(ERASE_WHOLE)]} {
+	puts [format "Erasing whole device"]
+	sydney_${flash}_erase_whole
+    } else {
+	sydney_${flash}_erase 0x00000 $len
+	if {[info exists ::env(ERASE_UPGRADE_DATA)]} {
+	    sydney_erase_upgd_data $flash $size
+	}
+    }
+
+    sydney_${flash}_qspi_2_spi
+    return "OK"
+}
+
+proc sydney_flash_size { } {
+    reset halt
+    enable_spi2
+    lassign [sydney_discover_flash] flash size
+
+    return $size
+}
+
+proc sydney_dump_flash { image {len 0x78000} } {
+    reset halt
+    enable_spi2
+    lassign [sydney_discover_flash $len] flash size
+
+    # Dump entire flash for len == 0
+    if {!$len} {
+	set len $size
+    }
+
+    sydney_${flash}_enable_ahb_bridge
+
+    dump_image $image 0x10000000 $len
+
+    sydney_${flash}_ahb_2_spi
+}
+
+proc sydney_load_flash { image {region_start 0x0} {region_size 0x78000} {address ""} } {
+    reset halt
+    enable_spi2
+    set region_end [expr {$region_start + $region_size}]
+    lassign [sydney_discover_flash $region_end] flash size
+
+    if {[info exists ::env(ERASE_WHOLE)]} {
+	puts [format "Erasing whole device"]
+	sydney_${flash}_erase_whole
+    } else {
+	sydney_${flash}_erase $region_start $region_end
+	if {[info exists ::env(ERASE_UPGRADE_DATA)]} {
+	    sydney_erase_upgd_data $flash $size
+	}
+    }
+
+    qspi_${flash}_make_ahb
+
+    if {$address == ""} {
+	puts -nonewline [load_image $image]
+    } else {
+	puts -nonewline [load_image $image $address]
+    }
+
+    sydney_${flash}_ahb_2_spi
+    spi_wait_for_no_wip SPI2
+}
+
+proc sydney_verify_flash { image {address ""} } {
+    reset halt
+    enable_spi2
+    lassign [sydney_discover_flash] flash size
+
+    sydney_${flash}_enable_ahb_bridge
+
+    if {$address == ""} {
+	puts -nonewline [verify_image $image]
+    } else {
+	puts -nonewline [verify_image $image $address]
+    }
+
+    sydney_${flash}_ahb_2_spi
+}
+
+proc sydney_protect_flash { {mpr_lock_size 0} } {
+    reset halt
+    enable_spi2
+    lassign [sydney_discover_flash] flash size
+    set id [spi_read_flash_id SPI2 3]
+    if { $id != 0x1360ef} {
+	puts [format "flash id 0x%06x" $id]
+	error "Not a W25Q40EW part"
+    }
+
+    set cur_status [spi_read_status SPI2]
+    puts [format "sydney_protect_flash: current status register1 = 0x%02x" $cur_status]
+
+    set write_status [sydney_${flash}_protect_flash $mpr_lock_size]
+
+    if { $cur_status == $write_status } {
+	puts [format "Not update status register"]
+	return $cur_status
+    }
+
+    spi_write_enable SPI2
+    do_spi_transaction SPI2 0 0x01 1 0x0 $write_status
+    while {1} {
+	set ret [spi_read_status SPI2]
+	if {($ret & $write_status) == $write_status} {
+	    return $ret
+	}
+    }
+}
+
+proc sydney_erase_flash_nvds { region_start region_size } {
+    reset halt
+    enable_spi2
+    set region_end [expr {$region_start + $region_size}]
+    lassign [sydney_discover_flash $region_end] flash size
+
+    sydney_${flash}_erase $region_start $region_end
+
+    sydney_${flash}_qspi_2_spi
+    return "OK"
+}
+
+proc return_winning_seq { seq0 seq1 mem_cap } {
+    set seq [expr {$seq0 + 1}]
+    set seq0 [expr {$seq & 0x0f}]
+    if {$seq0 == $seq1} {
+        return 1
+    } else {
+        return 0
+    }
+}
+
+proc id_is_valid { upgrade_status } {
+    set FLASH_UPGRADE_STATUS_ID_MASK 0xffffff00
+    set FLASH_UPGRADE_STATUS_ID_ROM 0x4d4f5200
+    set FLASH_UPGRADE_STATUS_ID_USR 0x52535500
+    set id [expr {$upgrade_status & $FLASH_UPGRADE_STATUS_ID_MASK}]
+    set id_rom [expr {$id == $FLASH_UPGRADE_STATUS_ID_ROM}]
+    set id_usr [expr {$id == $FLASH_UPGRADE_STATUS_ID_USR}]
+    set ret [expr {$id_rom || $id_usr}]
+    puts "$id $id_rom $id_usr $ret\n"
+    return $ret
+}
+
+proc status_is_all_good { upgrade_status } {
+    set FLASH_UPGRADE_STATUS_STATE_MASK 0x0f
+    set FLASH_UPGRADE_STATUS_nBAD_MASK 0x08
+    set FLASH_UPGRADE_STATUS_nBOOTED_MASK 0x04
+    set upgd_status_mask [expr {$upgrade_status & $FLASH_UPGRADE_STATUS_STATE_MASK}]
+    set bad_booted_mask [expr {$FLASH_UPGRADE_STATUS_nBAD_MASK | $FLASH_UPGRADE_STATUS_nBOOTED_MASK}]
+    set ret [expr {$upgd_status_mask != $bad_booted_mask}]
+    return $ret
+}
+
+proc sydney_get_active_bank_addr { region_start region_size mem_bank mem_cap } {
+    set FLASH_START_ADDR 0x10000000
+    set FLASH_UPGRADE_STATUS_WOFF 0x10
+    set FLASH_UPGRADE_STATUS_SEQ_MASK 0xf0
+    set active_standby_flag 0
+
+    set bank_off [expr {1 << ($mem_cap-3)}]
+    #convert $bank_off to byte address
+    set bank_off [expr {$bank_off*4}]
+
+    if {$mem_bank=="active"} {
+        puts "$mem_bank\n"
+        set active_standby_flag 0
+    } elseif {$mem_bank=="standby"} {
+        puts "$mem_bank\n"
+        set active_standby_flag 1
+    } elseif {$mem_bank=="bank0"} {
+        puts "Bank 0\n"
+        return $FLASH_START_ADDR
+    } elseif {$mem_bank=="bank1"} {
+        puts "Bank 1\n"
+        return [expr {$FLASH_START_ADDR + $bank_off}]
+    } else {
+        error "$mem_bank is not a valid MEM_BANK value. Allowed values 'active', 'standby', 'bank0', or 'bank1'"
+    }
+
+    set b0_us_addr [expr {$FLASH_START_ADDR + $FLASH_UPGRADE_STATUS_WOFF}]
+    set b1_us_addr [expr {$FLASH_START_ADDR + $FLASH_UPGRADE_STATUS_WOFF + $bank_off}]
+    puts "bank_off $bank_off\nb0 $b0_us_addr\nb1 $b1_us_addr\n"
+    set region_end [expr {$region_start + $region_size}]
+    set b0_us [mrw $b0_us_addr]
+    set b1_us [mrw $b1_us_addr]
+    puts "mem_cap $mem_cap\nb0_us $b0_us\nb1_us $b1_us\n"
+    set b0 [id_is_valid $b0_us]
+    set b1 [id_is_valid $b1_us]
+
+    if {$b0} {
+        set b0 [status_is_all_good $b0_us]
+    }
+
+    if {$b1} {
+        set b1 [status_is_all_good $b1_us]
+    }
+
+    #map winning sequence if both b0 and b1 pass
+    if {$b0 && $b1} {
+        set b0_seq_mask [expr { $b0_us & $FLASH_UPGRADE_STATUS_SEQ_MASK} ]
+        set b1_seq_mask [expr { $b1_us & $FLASH_UPGRADE_STATUS_SEQ_MASK} ]
+        set b0_seq [expr { $b0_seq_mask >> 4 } ]
+        set b1_seq [expr { $b1_seq_mask >> 4 } ]
+        set b1 [return_winning_seq $b0_seq $b1_seq $mem_cap]
+    }
+    puts "b0 b1 $b0 $b1\n"
+    #if bank 1 is not active, default to bank 0
+    if {$b1} {
+        if {$active_standby_flag == 0} {
+            return [expr {$FLASH_START_ADDR + $bank_off}]
+        } else {
+            return $FLASH_START_ADDR
+        }
+
+    } else {
+        if {$active_standby_flag == 0} {
+            return $FLASH_START_ADDR
+        } else {
+            return [expr {$FLASH_START_ADDR + $bank_off}]
+        }
+    }
+}
+
+proc sydney_dump_flash_nvds { image region_start region_size mem_bank } {
+    reset halt
+    enable_spi2
+    set region_end [expr {$region_start + $region_size}]
+    lassign [sydney_discover_flash $region_end] flash size mem_cap
+
+    sydney_${flash}_enable_ahb_bridge
+
+    set active_bank_addr [sydney_get_active_bank_addr $region_start $region_size $mem_bank $mem_cap]
+    puts "Returned bank address is $active_bank_addr\n"
+    dump_image $image [expr {$active_bank_addr + $region_start}] $region_size
+
+    sydney_${flash}_ahb_2_spi
+}
+
+proc sydney_load_flash_nvds { image region_start region_size } {
+    reset halt
+    enable_spi2
+    set region_end [expr {$region_start + $region_size}]
+    lassign [sydney_discover_flash $region_end] flash size
+
+    sydney_${flash}_erase $region_start $region_end
+
+    qspi_${flash}_make_ahb
+
+    puts -nonewline [load_image $image [expr {0x10000000 + $region_start}]]
+
+    sydney_${flash}_ahb_2_spi
+    spi_wait_for_no_wip SPI2
+}
+
+proc sydney_verify_flash_nvds { image region_start region_size } {
+    reset halt
+    enable_spi2
+    set region_end [expr {$region_start + $region_size}]
+    lassign [sydney_discover_flash $region_end] flash size
+
+    sydney_${flash}_enable_ahb_bridge
+
+    puts -nonewline [verify_image $image [expr {0x10000000 + $region_start}]]
+
+    sydney_${flash}_ahb_2_spi
+}
diff --git a/platform/atm2/ATM22xx-x1x/openocd/atm2x_gdb.tcl b/platform/atm2/ATM22xx-x1x/openocd/atm2x_gdb.tcl
new file mode 100644
index 0000000..070ecc5
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/atm2x_gdb.tcl
@@ -0,0 +1,14 @@
+#
+# atm2x_gdb.tcl
+# GDB helper functions for ATM2x devices
+# Copyright (C) Atmosic 2020
+#
+
+# Fully reset target device and halt at first instruction.
+# (gdb) monitor reset_hard_halt
+proc reset_hard_halt {} {
+    set_benign_boot
+    reset_hard
+    set_normal_boot
+    reset halt
+}
diff --git a/platform/atm2/ATM22xx-x1x/openocd/atm2x_nvm.tcl b/platform/atm2/ATM22xx-x1x/openocd/atm2x_nvm.tcl
new file mode 100644
index 0000000..15ea45e
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/atm2x_nvm.tcl
@@ -0,0 +1,203 @@
+#
+# atm2x_nvm.tcl
+# Production APIs for NVM (aka: OTP, efuse) operations
+# Copyright (C) Atmosic 2018-2019
+#
+
+#
+# NVM
+#
+
+set NVM_SIZE 4096
+
+proc nvm_read_byte { addr } {
+    global CMSDK_AHB_NVM_BASE
+
+    return [mrb [expr {$CMSDK_AHB_NVM_BASE + $addr}]]
+}
+
+proc nvm_set_bit { byte_addr bit } {
+    global CMSDK_NVM_OPMODE
+    global CMSDK_NVM_ADDRESS
+    global CMSDK_NVM_STATUS
+
+    set bit_addr [expr {(($byte_addr & ~0x3ff) << 3) | (($bit & 0x7) << 10) | ($byte_addr & 0x3ff)}]
+    mww $CMSDK_NVM_ADDRESS $bit_addr
+    mww $CMSDK_NVM_OPMODE 0x80000002
+    while {([mrw $CMSDK_NVM_STATUS] & 0x80000000) == 0x80000000} {}
+}
+
+proc nvm_fdb { addr count } {
+    set ret ""
+
+    for {set i 0} {$i < $count} {incr i} {
+	set ret [concat $ret [format " %02x" [nvm_read_byte [expr {$addr+$i}]]]]
+    }
+    return $ret
+}
+
+proc sydney_dump_nvm { image } {
+    global CMSDK_AHB_NVM_BASE
+    global NVM_SIZE
+
+    reset halt
+
+    enable_nvm
+
+    dump_image $image $CMSDK_AHB_NVM_BASE $NVM_SIZE
+}
+
+proc sydney_precheck_nvm { image } {
+    global CMSDK_RAM_BASE
+    global NVM_SIZE
+
+    reset halt
+
+    mww $CMSDK_RAM_BASE 0x00000000 [expr {$NVM_SIZE / 4}]
+    load_image $image $CMSDK_RAM_BASE
+
+    enable_nvm
+    for {set i 0} {$i < $NVM_SIZE} {incr i} {
+	set old [nvm_read_byte $i]
+	set maddr [expr {$CMSDK_RAM_BASE + $i}]
+	set new [mrb $maddr]
+
+	if {($old & $new) != $old} {
+	    error [format "ERROR: bit cleared @0x%x: %02x->%02x" $i $old $new]
+	}
+    }
+
+    return "OK"
+}
+
+proc sydney_burn_nvm { image } {
+    global CMSDK_RAM_BASE
+    global NVM_SIZE
+    global CMSDK_WRPR_PIN_SELECTION_E
+
+    reset halt
+
+    mww $CMSDK_RAM_BASE 0x00000000 [expr {$NVM_SIZE / 4}]
+    load_image $image $CMSDK_RAM_BASE
+
+    enable_nvm
+    # Compute the change set
+    for {set i 0} {$i < $NVM_SIZE} {incr i} {
+	set old [nvm_read_byte $i]
+	set maddr [expr {$CMSDK_RAM_BASE + $i}]
+	set new [mrb $maddr]
+
+	if {($old & $new) != $old} {
+	    error [format "ERROR: bit cleared @0x%x: %02x->%02x" $i $old $new]
+	}
+
+	mwb $maddr [expr {$old ^ $new}]
+    }
+
+    # Set the changed bits
+    for {set i 0} {$i < $NVM_SIZE} {incr i} {
+	set maddr [expr {$CMSDK_RAM_BASE + $i}]
+	set new [mrb $maddr]
+
+	if {$new == 0x00} {
+	    continue
+	}
+	for {set bit 0} {$bit < 8} {incr bit} {
+	    if {($new & (1 << $bit)) == 0} {
+		continue
+	    }
+	    nvm_set_bit $i $bit
+	}
+    }
+
+    return "OK"
+}
+
+proc sydney_verify_nvm { image } {
+    global CMSDK_RAM_BASE
+    global NVM_SIZE
+
+    reset halt
+
+    mww $CMSDK_RAM_BASE 0x00000000 [expr {$NVM_SIZE / 4}]
+    load_image $image $CMSDK_RAM_BASE
+
+    enable_nvm
+    for {set i 0} {$i < $NVM_SIZE} {incr i} {
+	set old [nvm_read_byte $i]
+	set maddr [expr {$CMSDK_RAM_BASE + $i}]
+	set new [mrb $maddr]
+
+	if {$old != $new} {
+	    error [format "ERROR: difference @0x%x: %02x-%02x" $i $old $new]
+	}
+    }
+
+    return "OK"
+}
+
+proc sydney_burn_autoread_bit { byte_off bit_off } {
+    global NVM_SIZE
+
+    reset halt
+
+    enable_nvm
+    set addr [expr {$NVM_SIZE - 4 + $byte_off}]
+    set old [nvm_read_byte $addr]
+
+    if {($old & (1 << $bit_off)) == 0} {
+        nvm_set_bit $addr $bit_off
+    }
+}
+
+set AUTOREAD_SWD_DISABLE_BIT_OFF 0
+set AUTOREAD_SWD_DISABLE_BYTE_OFF 0
+
+# !!!! Warning !!!!
+# This operation will disable SWD interfacer permanently and can't be reverted.
+proc sydney_burn_swd_disable {} {
+
+    sydney_burn_autoread_bit $::AUTOREAD_SWD_DISABLE_BYTE_OFF $::AUTOREAD_SWD_DISABLE_BIT_OFF
+}
+
+set AUTOREAD_5x5_BIT_OFF 3
+set AUTOREAD_5x5_BYTE_OFF 0
+proc sydney_burn_5x5 {} {
+    global AUTOREAD_5x5_BIT_OFF
+    global AUTOREAD_5x5_BYTE_OFF
+
+    sydney_burn_autoread_bit $AUTOREAD_5x5_BYTE_OFF $AUTOREAD_5x5_BIT_OFF
+}
+
+set AUTOREAD_STACKED_BIT_OFF 4
+set AUTOREAD_STACKED_BYTE_OFF 0
+proc sydney_burn_stacked {} {
+    global AUTOREAD_STACKED_BIT_OFF
+    global AUTOREAD_STACKED_BYTE_OFF
+
+    sydney_burn_autoread_bit $AUTOREAD_STACKED_BYTE_OFF $AUTOREAD_STACKED_BIT_OFF
+}
+
+set AUTOREAD_HARV_TYPE_BIT_OFF 2
+set AUTOREAD_HARV_TYPE_BYTE_OFF 3
+proc sydney_burn_harv_type {} {
+    global AUTOREAD_HARV_TYPE_BIT_OFF
+    global AUTOREAD_HARV_TYPE_BYTE_OFF
+
+    sydney_burn_autoread_bit $AUTOREAD_HARV_TYPE_BYTE_OFF $AUTOREAD_HARV_TYPE_BIT_OFF
+}
+
+set AUTOREAD_NO_32K_XTAL_BIT_OFF 7
+set AUTOREAD_NO_32K_XTAL_BYTE_OFF 3
+proc sydney_burn_no_32k_xtal {} {
+    global AUTOREAD_NO_32K_XTAL_BIT_OFF
+    global AUTOREAD_NO_32K_XTAL_BYTE_OFF
+
+    sydney_burn_autoread_bit $AUTOREAD_NO_32K_XTAL_BYTE_OFF $AUTOREAD_NO_32K_XTAL_BIT_OFF
+}
+
+set AUTOREAD_IGNORE_32K_XTAL_CHECK_BIT_OFF 0
+set AUTOREAD_IGNORE_32K_XTAL_CHECK_BYTE_OFF 3
+proc sydney_burn_ignore_32k_xtal_check {} {
+    sydney_burn_autoread_bit $::AUTOREAD_IGNORE_32K_XTAL_CHECK_BYTE_OFF $::AUTOREAD_IGNORE_32K_XTAL_CHECK_BIT_OFF
+}
diff --git a/platform/atm2/ATM22xx-x1x/openocd/atm2x_openocd.cfg b/platform/atm2/ATM22xx-x1x/openocd/atm2x_openocd.cfg
new file mode 100644
index 0000000..c1b35c9
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/atm2x_openocd.cfg
@@ -0,0 +1,42 @@
+if {[info exists ::env(SWDIF)]} {

+    if {$::env(SWDIF) eq "JLINK"} {

+	puts "Using JLINK"

+	source [find atm_jlink.tcl]

+    } else {

+	error [format "Unknown SWDIF=%s setting" $::env(SWDIF)]

+    }

+} else {

+    puts "Using FTDI"

+    source [find atm_ftdi.tcl]

+}

+

+if {![info exists ::env(FTDI_HARD_RESET)]} {

+    source [find m0_cpu.tcl]

+}

+

+proc set_reset {} {

+    assert_pwd

+}

+

+proc release_reset {} {

+    deassert_pwd

+}

+

+proc set_benign_boot {} {

+    assert_bboot

+}

+

+proc set_normal_boot {} {

+    deassert_bboot

+}

+

+# Tested as high as 20000, but openocd complains a lot when the

+# AHB bus is busy (ex: when running from flash)

+set _SWD_KHZ [expr {[info exists ::env(SYDNEY_SWD_KHZ)] ? $::env(SYDNEY_SWD_KHZ) : 1000}]

+adapter speed $_SWD_KHZ

+

+gdb_port disabled

+telnet_port disabled

+tcl_port disabled

+

+source [find atm_top.tcl]

diff --git a/platform/atm2/ATM22xx-x1x/openocd/atm2x_peripheral_wrapper_operations.tcl b/platform/atm2/ATM22xx-x1x/openocd/atm2x_peripheral_wrapper_operations.tcl
new file mode 100644
index 0000000..a0ef3ef
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/atm2x_peripheral_wrapper_operations.tcl
@@ -0,0 +1,515 @@
+# Generated by ./sydney_gen_resets_tcl.sh from soc/BP200-BU-00000-r1p0-00rel0/software/cmsis/Device/ARM/CMSDK_CM0/Include/base_addr.h
+
+source [find regs/regs_for_program.tcl]
+
+proc parse_id { id } {
+    set c0 [expr [expr $id & 0xff000000] >> 24]
+    set c1 [expr [expr $id & 0x00ff0000] >> 16]
+    set c2 [expr [expr $id & 0x0000ff00] >> 8]
+    set c3 [expr [expr $id & 0x000000ff] >> 0]
+    format "%c%c%c%c" $c0 $c1 $c2 $c3
+}
+
+proc enable_pwm {} {
+    global CMSDK_WRPR_APB6_CTRL
+    mww $CMSDK_WRPR_APB6_CTRL 0x00000001
+}
+
+proc disable_pwm {} {
+    global CMSDK_WRPR_APB6_CTRL
+    mww $CMSDK_WRPR_APB6_CTRL 0x00000000
+}
+
+proc reset_pwm {} {
+    global CMSDK_WRPR_APB6_CTRL
+    mww $CMSDK_WRPR_APB6_CTRL 0x00000002
+}
+
+proc getid_pwm {} {
+    enable_pwm
+    global CMSDK_PWM_CORE_ID
+    parse_id [mrw $CMSDK_PWM_CORE_ID]
+}
+
+proc enable_spi0 {} {
+    global CMSDK_WRPR_APB7_CTRL
+    mww $CMSDK_WRPR_APB7_CTRL 0x00000001
+}
+
+proc disable_spi0 {} {
+    global CMSDK_WRPR_APB7_CTRL
+    mww $CMSDK_WRPR_APB7_CTRL 0x00000000
+}
+
+proc reset_spi0 {} {
+    global CMSDK_WRPR_APB7_CTRL
+    mww $CMSDK_WRPR_APB7_CTRL 0x00000002
+}
+
+proc getid_spi0 {} {
+    enable_spi0
+    global CMSDK_SPI0_CORE_ID
+    parse_id [mrw $CMSDK_SPI0_CORE_ID]
+}
+
+proc enable_oled {} {
+    global CMSDK_WRPR_APB9_CTRL
+    mww $CMSDK_WRPR_APB9_CTRL 0x00000001
+}
+
+proc disable_oled {} {
+    global CMSDK_WRPR_APB9_CTRL
+    mww $CMSDK_WRPR_APB9_CTRL 0x00000000
+}
+
+proc reset_oled {} {
+    global CMSDK_WRPR_APB9_CTRL
+    mww $CMSDK_WRPR_APB9_CTRL 0x00000002
+}
+
+proc getid_oled {} {
+    enable_oled
+    global CMSDK_OLED_CORE_ID
+    parse_id [mrw $CMSDK_OLED_CORE_ID]
+}
+
+proc enable_ksm {} {
+    global CMSDK_WRPR_APB10_CTRL
+    mww $CMSDK_WRPR_APB10_CTRL 0x00000001
+}
+
+proc disable_ksm {} {
+    global CMSDK_WRPR_APB10_CTRL
+    mww $CMSDK_WRPR_APB10_CTRL 0x00000000
+}
+
+proc reset_ksm {} {
+    global CMSDK_WRPR_APB10_CTRL
+    mww $CMSDK_WRPR_APB10_CTRL 0x00000002
+}
+
+proc getid_ksm {} {
+    enable_ksm
+    global CMSDK_KSM_CORE_ID
+    parse_id [mrw $CMSDK_KSM_CORE_ID]
+}
+
+proc enable_spi2 {} {
+    global CMSDK_WRPR_APB11_CTRL
+    mww $CMSDK_WRPR_APB11_CTRL 0x00000001
+}
+
+proc disable_spi2 {} {
+    global CMSDK_WRPR_APB11_CTRL
+    mww $CMSDK_WRPR_APB11_CTRL 0x00000000
+}
+
+proc reset_spi2 {} {
+    global CMSDK_WRPR_APB11_CTRL
+    mww $CMSDK_WRPR_APB11_CTRL 0x00000002
+}
+
+proc getid_spi2 {} {
+    enable_spi2
+    global CMSDK_SPI2_CORE_ID
+    parse_id [mrw $CMSDK_SPI2_CORE_ID]
+}
+
+proc enable_qdec {} {
+    global CMSDK_WRPR_APB12_CTRL
+    mww $CMSDK_WRPR_APB12_CTRL 0x00000001
+}
+
+proc disable_qdec {} {
+    global CMSDK_WRPR_APB12_CTRL
+    mww $CMSDK_WRPR_APB12_CTRL 0x00000000
+}
+
+proc reset_qdec {} {
+    global CMSDK_WRPR_APB12_CTRL
+    mww $CMSDK_WRPR_APB12_CTRL 0x00000002
+}
+
+proc getid_qdec {} {
+    enable_qdec
+    global CMSDK_QDEC_CORE_ID
+    parse_id [mrw $CMSDK_QDEC_CORE_ID]
+}
+
+proc enable_spi1 {} {
+    global CMSDK_WRPR_APB13_CTRL
+    mww $CMSDK_WRPR_APB13_CTRL 0x00000001
+}
+
+proc disable_spi1 {} {
+    global CMSDK_WRPR_APB13_CTRL
+    mww $CMSDK_WRPR_APB13_CTRL 0x00000000
+}
+
+proc reset_spi1 {} {
+    global CMSDK_WRPR_APB13_CTRL
+    mww $CMSDK_WRPR_APB13_CTRL 0x00000002
+}
+
+proc getid_spi1 {} {
+    enable_spi1
+    global CMSDK_SPI1_CORE_ID
+    parse_id [mrw $CMSDK_SPI1_CORE_ID]
+}
+
+proc enable_slwtimer {} {
+    global CMSDK_WRPR_APB14_CTRL
+    mww $CMSDK_WRPR_APB14_CTRL 0x00000001
+}
+
+proc disable_slwtimer {} {
+    global CMSDK_WRPR_APB14_CTRL
+    mww $CMSDK_WRPR_APB14_CTRL 0x00000000
+}
+
+proc reset_slwtimer {} {
+    global CMSDK_WRPR_APB14_CTRL
+    mww $CMSDK_WRPR_APB14_CTRL 0x00000002
+}
+
+proc getid_slwtimer {} {
+    enable_slwtimer
+    global CMSDK_SLWTIMER_CORE_ID
+    parse_id [mrw $CMSDK_SLWTIMER_CORE_ID]
+}
+
+proc enable_qspi {} {
+    global CMSDK_WRPR_APB15_CTRL
+    mww $CMSDK_WRPR_APB15_CTRL 0x00000001
+}
+
+proc disable_qspi {} {
+    global CMSDK_WRPR_APB15_CTRL
+    mww $CMSDK_WRPR_APB15_CTRL 0x00000000
+}
+
+proc reset_qspi {} {
+    global CMSDK_WRPR_APB15_CTRL
+    mww $CMSDK_WRPR_APB15_CTRL 0x00000002
+}
+
+proc getid_qspi {} {
+    enable_qspi
+    global CMSDK_QSPI_CORE_ID
+    parse_id [mrw $CMSDK_QSPI_CORE_ID]
+}
+
+proc enable_i2c0 {} {
+    global CMSDK_WRPR1_APB0_CTRL
+    mww $CMSDK_WRPR1_APB0_CTRL 0x00000001
+}
+
+proc disable_i2c0 {} {
+    global CMSDK_WRPR1_APB0_CTRL
+    mww $CMSDK_WRPR1_APB0_CTRL 0x00000000
+}
+
+proc reset_i2c0 {} {
+    global CMSDK_WRPR1_APB0_CTRL
+    mww $CMSDK_WRPR1_APB0_CTRL 0x00000002
+}
+
+proc getid_i2c0 {} {
+    enable_i2c0
+    global CMSDK_I2C0_ID
+    parse_id [mrw $CMSDK_I2C0_ID]
+}
+
+proc enable_i2c1 {} {
+    global CMSDK_WRPR1_APB1_CTRL
+    mww $CMSDK_WRPR1_APB1_CTRL 0x00000001
+}
+
+proc disable_i2c1 {} {
+    global CMSDK_WRPR1_APB1_CTRL
+    mww $CMSDK_WRPR1_APB1_CTRL 0x00000000
+}
+
+proc reset_i2c1 {} {
+    global CMSDK_WRPR1_APB1_CTRL
+    mww $CMSDK_WRPR1_APB1_CTRL 0x00000002
+}
+
+proc getid_i2c1 {} {
+    enable_i2c1
+    global CMSDK_I2C1_ID
+    parse_id [mrw $CMSDK_I2C1_ID]
+}
+
+proc enable_nvm {} {
+    global CMSDK_WRPR1_APB2_CTRL
+    mww $CMSDK_WRPR1_APB2_CTRL 0x00000001
+}
+
+proc disable_nvm {} {
+    global CMSDK_WRPR1_APB2_CTRL
+    mww $CMSDK_WRPR1_APB2_CTRL 0x00000000
+}
+
+proc reset_nvm {} {
+    global CMSDK_WRPR1_APB2_CTRL
+    mww $CMSDK_WRPR1_APB2_CTRL 0x00000002
+}
+
+proc getid_nvm {} {
+    enable_nvm
+    global CMSDK_NVM_ID
+    parse_id [mrw $CMSDK_NVM_ID]
+}
+
+proc enable_rif {} {
+    global CMSDK_WRPR1_APB4_CTRL
+    mww $CMSDK_WRPR1_APB4_CTRL 0x00000001
+}
+
+proc disable_rif {} {
+    global CMSDK_WRPR1_APB4_CTRL
+    mww $CMSDK_WRPR1_APB4_CTRL 0x00000000
+}
+
+proc reset_rif {} {
+    global CMSDK_WRPR1_APB4_CTRL
+    mww $CMSDK_WRPR1_APB4_CTRL 0x00000002
+}
+
+proc getid_rif {} {
+    enable_rif
+    global CMSDK_RIF_ID
+    parse_id [mrw $CMSDK_RIF_ID]
+}
+
+proc enable_radio {} {
+    global CMSDK_WRPR1_APB5_CTRL
+    mww $CMSDK_WRPR1_APB5_CTRL 0x00000001
+}
+
+proc disable_radio {} {
+    global CMSDK_WRPR1_APB5_CTRL
+    mww $CMSDK_WRPR1_APB5_CTRL 0x00000000
+}
+
+proc reset_radio {} {
+    global CMSDK_WRPR1_APB5_CTRL
+    mww $CMSDK_WRPR1_APB5_CTRL 0x00000002
+}
+
+proc getid_radio {} {
+    enable_radio
+    global CMSDK_RADIO_CORE_ID
+    parse_id [mrw $CMSDK_RADIO_CORE_ID]
+}
+
+proc enable_mdm {} {
+    global CMSDK_WRPR1_APB6_CTRL
+    mww $CMSDK_WRPR1_APB6_CTRL 0x00000001
+}
+
+proc disable_mdm {} {
+    global CMSDK_WRPR1_APB6_CTRL
+    mww $CMSDK_WRPR1_APB6_CTRL 0x00000000
+}
+
+proc reset_mdm {} {
+    global CMSDK_WRPR1_APB6_CTRL
+    mww $CMSDK_WRPR1_APB6_CTRL 0x00000002
+}
+
+proc getid_mdm {} {
+    enable_mdm
+    global CMSDK_MDM_CORE_ID
+    parse_id [mrw $CMSDK_MDM_CORE_ID]
+}
+
+proc enable_pmu {} {
+    global CMSDK_WRPR1_APB7_CTRL
+    mww $CMSDK_WRPR1_APB7_CTRL 0x00000001
+}
+
+proc disable_pmu {} {
+    global CMSDK_WRPR1_APB7_CTRL
+    mww $CMSDK_WRPR1_APB7_CTRL 0x00000000
+}
+
+proc reset_pmu {} {
+    global CMSDK_WRPR1_APB7_CTRL
+    mww $CMSDK_WRPR1_APB7_CTRL 0x00000002
+}
+
+proc getid_pmu {} {
+    enable_pmu
+    global CMSDK_PMU_CORE_ID
+    parse_id [mrw $CMSDK_PMU_CORE_ID]
+}
+
+proc enable_pseq {} {
+    global CMSDK_WRPR1_APB8_CTRL
+    mww $CMSDK_WRPR1_APB8_CTRL 0x00000001
+}
+
+proc disable_pseq {} {
+    global CMSDK_WRPR1_APB8_CTRL
+    mww $CMSDK_WRPR1_APB8_CTRL 0x00000000
+}
+
+proc reset_pseq {} {
+    global CMSDK_WRPR1_APB8_CTRL
+    mww $CMSDK_WRPR1_APB8_CTRL 0x00000002
+}
+
+proc getid_pseq {} {
+    enable_pseq
+    global CMSDK_PSEQ_CORE_ID
+    parse_id [mrw $CMSDK_PSEQ_CORE_ID]
+}
+
+proc enable_swd {} {
+    global CMSDK_WRPR1_APB9_CTRL
+    mww $CMSDK_WRPR1_APB9_CTRL 0x00000001
+}
+
+proc disable_swd {} {
+    global CMSDK_WRPR1_APB9_CTRL
+    mww $CMSDK_WRPR1_APB9_CTRL 0x00000000
+}
+
+proc reset_swd {} {
+    global CMSDK_WRPR1_APB9_CTRL
+    mww $CMSDK_WRPR1_APB9_CTRL 0x00000002
+}
+
+proc getid_swd {} {
+    enable_swd
+    global CMSDK_SWD_CORE_ID
+    parse_id [mrw $CMSDK_SWD_CORE_ID]
+}
+
+proc enable_gadc {} {
+    global CMSDK_WRPR1_APB10_CTRL
+    mww $CMSDK_WRPR1_APB10_CTRL 0x00000001
+}
+
+proc disable_gadc {} {
+    global CMSDK_WRPR1_APB10_CTRL
+    mww $CMSDK_WRPR1_APB10_CTRL 0x00000000
+}
+
+proc reset_gadc {} {
+    global CMSDK_WRPR1_APB10_CTRL
+    mww $CMSDK_WRPR1_APB10_CTRL 0x00000002
+}
+
+proc getid_gadc {} {
+    enable_gadc
+    global CMSDK_GADC_CORE_ID
+    parse_id [mrw $CMSDK_GADC_CORE_ID]
+}
+
+proc enable_trng {} {
+    global CMSDK_WRPR1_APB11_CTRL
+    mww $CMSDK_WRPR1_APB11_CTRL 0x00000001
+}
+
+proc disable_trng {} {
+    global CMSDK_WRPR1_APB11_CTRL
+    mww $CMSDK_WRPR1_APB11_CTRL 0x00000000
+}
+
+proc reset_trng {} {
+    global CMSDK_WRPR1_APB11_CTRL
+    mww $CMSDK_WRPR1_APB11_CTRL 0x00000002
+}
+
+proc getid_trng {} {
+    enable_trng
+    global CMSDK_TRNG_CORE_ID
+    parse_id [mrw $CMSDK_TRNG_CORE_ID]
+}
+
+proc enable_rcos_cal {} {
+    global CMSDK_WRPR1_APB12_CTRL
+    mww $CMSDK_WRPR1_APB12_CTRL 0x00000001
+}
+
+proc disable_rcos_cal {} {
+    global CMSDK_WRPR1_APB12_CTRL
+    mww $CMSDK_WRPR1_APB12_CTRL 0x00000000
+}
+
+proc reset_rcos_cal {} {
+    global CMSDK_WRPR1_APB12_CTRL
+    mww $CMSDK_WRPR1_APB12_CTRL 0x00000002
+}
+
+proc getid_rcos_cal {} {
+    enable_rcos_cal
+    global CMSDK_RCOS_CAL_CORE_ID
+    parse_id [mrw $CMSDK_RCOS_CAL_CORE_ID]
+}
+
+proc enable_shub {} {
+    global CMSDK_WRPR1_APB13_CTRL
+    mww $CMSDK_WRPR1_APB13_CTRL 0x00000001
+}
+
+proc disable_shub {} {
+    global CMSDK_WRPR1_APB13_CTRL
+    mww $CMSDK_WRPR1_APB13_CTRL 0x00000000
+}
+
+proc reset_shub {} {
+    global CMSDK_WRPR1_APB13_CTRL
+    mww $CMSDK_WRPR1_APB13_CTRL 0x00000002
+}
+
+proc getid_shub {} {
+    enable_shub
+    global CMSDK_SHUB_ID
+    parse_id [mrw $CMSDK_SHUB_ID]
+}
+
+proc enable_atlc {} {
+    global CMSDK_WRPR1_APB14_CTRL
+    mww $CMSDK_WRPR1_APB14_CTRL 0x00000001
+}
+
+proc disable_atlc {} {
+    global CMSDK_WRPR1_APB14_CTRL
+    mww $CMSDK_WRPR1_APB14_CTRL 0x00000000
+}
+
+proc reset_atlc {} {
+    global CMSDK_WRPR1_APB14_CTRL
+    mww $CMSDK_WRPR1_APB14_CTRL 0x00000002
+}
+
+proc getid_atlc {} {
+    enable_atlc
+    global CMSDK_ATLC_ID
+    parse_id [mrw $CMSDK_ATLC_ID]
+}
+
+proc enable_pdm {} {
+    global CMSDK_WRPR1_APB15_CTRL
+    mww $CMSDK_WRPR1_APB15_CTRL 0x00000001
+}
+
+proc disable_pdm {} {
+    global CMSDK_WRPR1_APB15_CTRL
+    mww $CMSDK_WRPR1_APB15_CTRL 0x00000000
+}
+
+proc reset_pdm {} {
+    global CMSDK_WRPR1_APB15_CTRL
+    mww $CMSDK_WRPR1_APB15_CTRL 0x00000002
+}
+
+proc getid_pdm {} {
+    enable_pdm
+    global CMSDK_PDM_CORE_ID
+    parse_id [mrw $CMSDK_PDM_CORE_ID]
+}
diff --git a/platform/atm2/ATM22xx-x1x/openocd/atm2x_pseq.tcl b/platform/atm2/ATM22xx-x1x/openocd/atm2x_pseq.tcl
new file mode 100644
index 0000000..26989b1
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/atm2x_pseq.tcl
@@ -0,0 +1,57 @@
+#
+# atm2x_pseq.tcl
+# Production APIs for PSEQ operations
+# Copyright (C) Atmosic 2018-2019
+#
+
+proc enable_hpc {} {
+    global CMSDK_PSEQ_XTAL_BITS1
+
+    enable_pseq
+    set xb1 [mrw $CMSDK_PSEQ_XTAL_BITS1]
+    mww $CMSDK_PSEQ_XTAL_BITS1 [expr {$xb1 | (1 << 19)}]
+    disable_pseq
+}
+
+proc disable_hpc {} {
+    global CMSDK_PSEQ_XTAL_BITS1
+
+    enable_pseq
+    set xb1 [mrw $CMSDK_PSEQ_XTAL_BITS1]
+    mww $CMSDK_PSEQ_XTAL_BITS1 [expr {$xb1 & ~(1 << 19)}]
+    disable_pseq
+}
+
+proc enable_emram {} {
+    global CMSDK_PSEQ_EMRAM_OVERRIDES
+    global CMSDK_PSEQ_EMRAM_OVERRIDES2
+    global CMSDK_PSEQ_EMRAM_OVERRIDES3
+    global CMSDK_PSEQ_EMRAM_OVERRIDES4
+    global CMSDK_PSEQ_EMRAM_OVERRIDES5
+    global CMSDK_PSEQ_EMRAM_OVERRIDES6
+
+    enable_pseq
+    mww $CMSDK_PSEQ_EMRAM_OVERRIDES 0
+    mww $CMSDK_PSEQ_EMRAM_OVERRIDES6 0
+    mww $CMSDK_PSEQ_EMRAM_OVERRIDES5 0
+    mww $CMSDK_PSEQ_EMRAM_OVERRIDES4 0
+    mww $CMSDK_PSEQ_EMRAM_OVERRIDES3 0
+    mww $CMSDK_PSEQ_EMRAM_OVERRIDES2 0
+}
+
+proc enable_uram {} {
+    global CMSDK_PSEQ_SYSRAM_OVERRIDES
+    global CMSDK_PSEQ_SYSRAM_OVERRIDES2
+    global CMSDK_PSEQ_SYSRAM_OVERRIDES3
+    global CMSDK_PSEQ_SYSRAM_OVERRIDES4
+    global CMSDK_PSEQ_SYSRAM_OVERRIDES5
+    global CMSDK_PSEQ_SYSRAM_OVERRIDES6
+
+    enable_pseq
+    mww $CMSDK_PSEQ_SYSRAM_OVERRIDES 0
+    mww $CMSDK_PSEQ_SYSRAM_OVERRIDES6 0
+    mww $CMSDK_PSEQ_SYSRAM_OVERRIDES5 0
+    mww $CMSDK_PSEQ_SYSRAM_OVERRIDES4 0
+    mww $CMSDK_PSEQ_SYSRAM_OVERRIDES3 0
+    mww $CMSDK_PSEQ_SYSRAM_OVERRIDES2 0
+}
diff --git a/platform/atm2/ATM22xx-x1x/openocd/atm2x_rom.tcl b/platform/atm2/ATM22xx-x1x/openocd/atm2x_rom.tcl
new file mode 100644
index 0000000..ee4072d
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/atm2x_rom.tcl
@@ -0,0 +1,65 @@
+#
+# atm2x_rom.tcl
+# Production APIs for ROM operations
+# Copyright (C) Atmosic 2018-2020
+#
+
+proc verify_rom_version {} {
+    reset halt
+    if {[mrw 0x3f2c8] == 0x454c422d} {
+	return
+    }
+    if {[mrw 0x3cdb0] == 0x422d5752} {
+	error "Incompatible with ATM2xE1 or ATM2xE2 part!"
+    } elseif {[mrw 0x3d8e8] == 0x422d5752} {
+	error "Incompatible with ATM2xE2b part!"
+    } elseif {[mrw 0x3ae2c] == 0x422d5752} {
+	error "Incompatible with ATM2xE3, ATM2xE3a, or ATM2xE3b part!"
+    } elseif {[mrw 0x3ea30] == 0x422d5752} {
+	error "Incompatible with ATM2xE3c or ATMx2xx-x0x part!"
+    }
+    error "Not an ATMx2xx-x1x part!"
+}
+
+proc get_rom_version {} {
+    reset halt
+    if {[mrw 0x3cdb0] == 0x422d5752} {
+	return [list ATM2xE1 ATM2xE2]
+    } elseif {[mrw 0x3d8e8] == 0x422d5752} {
+	return [list ATM2xE2b]
+    } elseif {[mrw 0x3ae2c] == 0x422d5752} {
+	return [list ATM2xE3 ATM2xE3a ATM2xE3b]
+    } elseif {[mrw 0x3ea30] == 0x422d5752} {
+	return [list ATM2xE3c ATM22xx-x0x ATM32xx-x0x]
+    } elseif {[mrw 0x3f2c8] == 0x454c422d} {
+	return [list ATM22xx-x1x ATM32xx-x1x]
+    }
+    error "Unrecognized platform"
+}
+
+proc load_ram_image { external_flash_init image {entry_point 0x20014000} } {
+    reset halt
+
+    # Hijack flash app
+    bp $external_flash_init 2 hw
+    resume; sleep 1; wait_halt
+    rbp $external_flash_init
+
+    # Relocate stack if necessary
+    if {$entry_point != 0x20014000} {
+	set src 0x20014000
+	set end [lindex [reg sp] 2]
+	set dst $entry_point
+	puts -nonewline "Relocate stack $end..$src"
+	while {$src != $end} {
+	    incr src -4
+	    incr dst -4
+	    mww $dst [mrw $src]
+	}
+	set dstx [format 0x%x $dst]
+	puts " to $dstx..$entry_point"
+	reg sp $dst
+    }
+
+    load_image $image $entry_point
+}
diff --git a/platform/atm2/ATM22xx-x1x/openocd/atm_coredump.tcl b/platform/atm2/ATM22xx-x1x/openocd/atm_coredump.tcl
new file mode 100644
index 0000000..18a5d5b
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/atm_coredump.tcl
@@ -0,0 +1,84 @@
+################################################################################
+#
+# @file atm_coredump.tcl
+#
+# @brief Implements Coredump Helper functions for ATM22/ATM32 paltform
+#
+# Copyright (C) Atmosic 2022
+#
+################################################################################
+
+proc reg_dump {} {
+    set index { 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 }
+
+    # First 18 ints are 0s
+    set str [string repeat "\u0000" 72]
+    foreach x $index {
+	append str [binary format i1 [ lindex [reg $x] 2]]
+    }
+    append str [binary format i1 0x0]
+    return $str
+}
+
+proc get_section_names {} {
+    set section_names {".shstrtab" ".flash" ".rom" ".sram" ".em"}
+    return $section_names
+}
+
+# Dumps flash using appropriate function for platform
+proc coredump_dump_flash { CoreDumpFile } {
+    set temp_file "tmpfile"
+
+    sydney_dump_flash $temp_file [sydney_flash_size]
+    copy_tempfile $temp_file $CoreDumpFile
+}
+
+proc get_headers { list_of_regions initial_offset string_table } {
+    set program_header ""
+    set section_headers ""
+
+    set data_offset $initial_offset
+    foreach region $list_of_regions {
+	set start_addr [lindex $region 0]
+	set region_size [lindex $region 1]
+	set string [lindex $region 2]
+
+	set string_offset [string first $string $string_table]
+
+	append program_headers [generate_program_header 1 $data_offset $start_addr 0 $region_size]
+	append section_headers [generate_section_header $string_offset 1 4 $start_addr $data_offset $region_size 0 0 1 0]
+
+	incr data_offset $region_size
+    }
+
+    return [list $program_headers $section_headers]
+}
+
+proc get_list_of_regions {} {
+    # Each region is of format {start_addr size section_name}
+    set list_of_regions [list]
+    lappend list_of_regions [list $::CMSDK_ROM_BASE 0x40000 ".rom"]
+
+    set num_sram_banks 6
+    set sram_bank_size 0x4000
+    set num_em_banks 2
+    set em_bank_size 0x4000
+
+    enable_pseq
+    set sram_override [mrw $::CMSDK_PSEQ_SYSRAM_OVERRIDES]
+    set emram_override [mrw $::CMSDK_PSEQ_EMRAM_OVERRIDES]
+    disable_pseq
+
+    set sram_active_sections [active_sections $::CMSDK_RAM_BASE $sram_bank_size $num_sram_banks $sram_override]
+    set em_active_sections [active_sections $::CMSDK_EM_BASE $em_bank_size $num_em_banks $emram_override]
+
+    foreach start $sram_active_sections {
+	lappend list_of_regions [list $start $sram_bank_size ".sram"]
+    }
+
+    foreach start $em_active_sections {
+	lappend list_of_regions [list $start $em_bank_size ".em"]
+    }
+
+    lappend list_of_regions [list $::CMSDK_FLASH_BASE [sydney_flash_size] ".flash"]
+}
diff --git a/platform/atm2/ATM22xx-x1x/openocd/atm_ftdi.tcl b/platform/atm2/ATM22xx-x1x/openocd/atm_ftdi.tcl
new file mode 100644
index 0000000..892ba54
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/atm_ftdi.tcl
@@ -0,0 +1,89 @@
+set IS_ATM_MP 0

+

+if {[info exists ::env(SWDBOARD)]} {

+    if {$::env(SWDBOARD) eq "APT"} {

+	set IS_ATM_MP 1

+	puts "Using APT"

+    } elseif {$::env(SWDBOARD) eq "DL"} {

+	set IS_ATM_MP 1

+	puts "Using DL"

+    }

+} else {

+    puts "Using Interface Board"

+}

+

+adapter driver ftdi

+if {$IS_ATM_MP} {

+    ftdi_vid_pid 0x0403 0x6011

+    set _FTDI_RESET 0x80

+    set _FTDI_BBOOT 0x40

+    # Use FT4232HQ ADBUS4 pin as GPIO (GPIOL0)

+    set _FTDI_SWD_ENABLE 0x10

+} else {

+    ftdi_vid_pid 0x0403 0x6010

+    set _FTDI_RESET 0x8000

+    set _FTDI_BBOOT 0x4000

+    # Use FT2232H ACBUS4 pin as GPIO (GPIOH4)

+    set _FTDI_SWD_ENABLE 0x1000

+}

+

+if {[info exists ::env(SYDNEY_SERIAL)]} {

+    if {!$IS_ATM_MP} {

+	set _FTDI_SERIAL [format "%s%s" $::env(SYDNEY_SERIAL) "USB1"]

+    } else {

+	set _FTDI_SERIAL $::env(SYDNEY_SERIAL)

+    }

+    puts "FTDI serial $_FTDI_SERIAL"

+    ftdi_serial $_FTDI_SERIAL

+}

+

+ftdi_channel 0

+set _FTDI_OD 0x0000

+set _FTDI_OE 0x0003

+

+if {[info exists ::env(FTDI_HARD_RESET)]} {

+    set _FTDI_OE [expr {$_FTDI_OE | $_FTDI_RESET}]

+    if {$::env(FTDI_HARD_RESET) ne "0"} {

+	set _FTDI_OD [expr {$_FTDI_OD | $_FTDI_RESET}]

+    }

+}

+

+if {[info exists ::env(FTDI_BENIGN_BOOT)]} {

+    set _FTDI_OE [expr {$_FTDI_OE | $_FTDI_BBOOT}]

+    if {$::env(FTDI_BENIGN_BOOT) ne "0"} {

+	set _FTDI_OD [expr {$_FTDI_OD | $_FTDI_BBOOT}]

+    }

+}

+

+set _FTDI_OE [expr {$_FTDI_OE | $_FTDI_SWD_ENABLE}]

+set _FTDI_OD [expr {$_FTDI_OD | $_FTDI_SWD_ENABLE}]

+

+ftdi_layout_init $_FTDI_OD $_FTDI_OE

+ftdi_layout_signal SRST -data $_FTDI_RESET -oe $_FTDI_RESET

+ftdi_layout_signal BBOOT -data $_FTDI_BBOOT -oe $_FTDI_BBOOT

+ftdi_layout_signal SWDENABLE -data $_FTDI_SWD_ENABLE -oe $_FTDI_SWD_ENABLE

+

+transport select swd

+ftdi_layout_signal SWD_EN -data 0

+ftdi_layout_signal SWDIO_OE -data 0

+

+

+proc assert_pwd {} {

+    ftdi_set_signal SRST 1

+}

+

+proc deassert_pwd {} {

+    ftdi_set_signal SWDENABLE 0

+    ftdi_set_signal SWDENABLE z

+    ftdi_set_signal SRST 0

+    ftdi_set_signal SRST z

+}

+

+proc assert_bboot {} {

+    ftdi_set_signal BBOOT 1

+}

+

+proc deassert_bboot {} {

+    ftdi_set_signal BBOOT 0

+    ftdi_set_signal BBOOT z

+}

diff --git a/platform/atm2/ATM22xx-x1x/openocd/atm_jlink.tcl b/platform/atm2/ATM22xx-x1x/openocd/atm_jlink.tcl
new file mode 100644
index 0000000..49ea09f
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/atm_jlink.tcl
@@ -0,0 +1,50 @@
+# Pin 5 - BBOOT, Pin 11 - PWD

+# Array element for mapping - pin3:pin5:pin7:pin9:pin11:pin13:pin15:pin17

+set JLINK_PIO_OUT_LOW 2

+set JLINK_PIO_OUT_HIGH 3

+set JLINK_PIO_MAP_DEFAULT 0:0:0:0:0:0:0:0

+set JLINK_PIO_MAP_BBOOT_H_PWD_L 0:$JLINK_PIO_OUT_HIGH:0:0:0:0:0:0

+set JLINK_PIO_MAP_BBOOT_L_PWD_H 0:$JLINK_PIO_OUT_LOW:0:0:$JLINK_PIO_OUT_HIGH:0:0:0

+set JLINK_PIO_MAP_BBOOT_L_PWD_L 0:$JLINK_PIO_OUT_LOW:0:0:$JLINK_PIO_OUT_LOW:0:0:0

+

+adapter driver jlink

+

+if {[info exists ::env(JLINK_SERIAL)]} {

+    set _JLINK_SERIAL [format "%s" $::env(JLINK_SERIAL)]

+    puts "JLINK serial $_JLINK_SERIAL"

+    jlink serial $_JLINK_SERIAL

+}

+

+transport select swd

+

+set BBOOT_ENABLE $JLINK_PIO_OUT_LOW

+if {[info exists ::env(FTDI_BENIGN_BOOT)]} {

+    if {$::env(FTDI_BENIGN_BOOT) ne "0"} {

+	set BBOOT_ENABLE $JLINK_PIO_OUT_HIGH

+    }

+}

+

+set PWD_ENABLE $JLINK_PIO_OUT_LOW

+if {[info exists ::env(FTDI_HARD_RESET)]} {

+    if {$::env(FTDI_HARD_RESET) ne "0"} {

+	set PWD_ENABLE $JLINK_PIO_OUT_HIGH

+    }

+}

+

+jlink gpioconfig 0:$BBOOT_ENABLE:0:0:$PWD_ENABLE:0:0:0

+

+proc assert_pwd {} {

+    jlink gpio map $::JLINK_PIO_MAP_BBOOT_L_PWD_H

+}

+

+proc deassert_pwd {} {

+    jlink gpio map $::JLINK_PIO_MAP_BBOOT_L_PWD_L

+}

+

+proc assert_bboot {} {

+    jlink gpio map $::JLINK_PIO_MAP_BBOOT_H_PWD_L

+}

+

+proc deassert_bboot {} {

+    jlink gpio map $::JLINK_PIO_MAP_BBOOT_L_PWD_L

+}

diff --git a/platform/atm2/ATM22xx-x1x/openocd/atm_nvds.tcl b/platform/atm2/ATM22xx-x1x/openocd/atm_nvds.tcl
new file mode 100644
index 0000000..ec9326e
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/atm_nvds.tcl
@@ -0,0 +1,22 @@
+#
+# atm_nvds.tcl
+# Provide NVDS functions
+# Copyright (C) Atmosic 2022
+#
+
+proc sydney_erase_nvds { {region_start 0x78000} {region_size 0x8000} } {
+    sydney_erase_flash_nvds $region_start $region_size
+}
+
+proc sydney_dump_nvds { image {region_start 0x78000} {region_size 0x8000} {mem_bank "bank0"} } {
+    sydney_dump_flash_nvds $image $region_start $region_size $mem_bank
+}
+
+proc sydney_load_nvds { image {region_start 0x78000} {region_size 0x8000} } {
+    sydney_load_flash_nvds $image $region_start $region_size
+}
+
+proc sydney_verify_nvds { image {region_start 0x78000} {region_size 0x8000} } {
+    sydney_verify_flash_nvds $image $region_start $region_size
+}
+
diff --git a/platform/atm2/ATM22xx-x1x/openocd/atm_top.tcl b/platform/atm2/ATM22xx-x1x/openocd/atm_top.tcl
new file mode 100644
index 0000000..a83eab1
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/atm_top.tcl
@@ -0,0 +1,25 @@
+#
+# atm_top.tcl
+# Production top level for ATM2/ATM3 devices
+# Copyright (C) Atmosic 2018-2022
+#
+
+source [find mem_helper.tcl]
+
+set CMSDK_ROM_BASE   0x00000000
+set CMSDK_FLASH_BASE 0x10000000
+set CMSDK_RAM_BASE   0x20000000
+set CMSDK_EM_BASE    0x30008000
+set CMSDK_AHB_NVM_BASE		0x60000000
+set CMSDK_AT_DMA_BASE		0x70000000
+set CMSDK_AHB_PDM_PP_BASE	0x80000000
+
+source [find atm2x_peripheral_wrapper_operations.tcl]
+source [find atm2x_pseq.tcl]
+source [find atm2x_flash.tcl]
+source [find atm_nvds.tcl]
+source [find atm2x_gdb.tcl]
+source [find atm2x_nvm.tcl]
+source [find atm2x_rom.tcl]
+source [find atm_coredump.tcl]
+source [find coredump.tcl]
diff --git a/platform/atm2/ATM22xx-x1x/openocd/coredump.tcl b/platform/atm2/ATM22xx-x1x/openocd/coredump.tcl
new file mode 100644
index 0000000..8d32fdd
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/coredump.tcl
@@ -0,0 +1,298 @@
+################################################################################
+#
+# @file coredump.tcl
+#
+# @brief Common File to Generate Coredump, relies on platform specific helper
+#        files
+#
+# Copyright (C) Atmosic 2022
+#
+################################################################################
+
+proc generate_string_header { string_list } {
+
+    set string_str [binary format c1 0x0]
+
+    foreach name $string_list {
+	append string_str $name
+	append string_str [binary format c1 0x0]
+    }
+
+    return $string_str
+}
+
+proc generate_section_header { sh_name sh_type sh_flags sh_addr sh_offset sh_size sh_link sh_info sh_addralign sh_entsize } {
+    set str [binary format i1 $sh_name]
+    append str [binary format i1 $sh_type]
+    append str [binary format i1 $sh_flags]
+    append str [binary format i1 $sh_addr]
+    append str [binary format i1 $sh_offset]
+    append str [binary format i1 $sh_size]
+    append str [binary format i1 $sh_link]
+    append str [binary format i1 $sh_info]
+    append str [binary format i1 $sh_addralign]
+    append str [binary format i1 $sh_entsize]
+
+    return $str
+}
+
+proc generate_program_header { p_type p_offset p_vaddr p_paddr p_filesz } {
+    set str [binary format i1 $p_type]
+    append str [binary format i1 $p_offset]
+    append str [binary format i1 $p_vaddr]
+    append str [binary format i1 $p_paddr]
+    append str [binary format i1 $p_filesz]
+    #memsz
+    append str [binary format i1 0x0]
+    #flags
+    append str [binary format i1 0x0]
+    #align
+    append str [binary format i1 0x0]
+
+    return $str
+}
+
+proc generate_pt_note { reg_dump } {
+    # PT_NOTE Section
+    # namesz
+    set str [binary format i1 0x5]
+
+    # descsz
+    append str [binary format i1 [string length $reg_dump]]
+
+    # type (NT_PRSTATUS == 1)
+    append str [binary format i1 0x1]
+
+    # name (+ padding)
+    append str "CORE"
+    append str [string repeat "\u0000" 4]
+
+    # desc
+    append str $reg_dump
+
+    return $str
+}
+
+proc generate_elf_header { elf_header_size program_header_size num_prog_headers section_header_size num_sections } {
+
+    set symtbl_section [expr $num_sections - 1]
+
+    # e_ident/EI_MAGIC
+    set str [binary format c1a3 0x7f ELF]
+
+    # e_ident/EI_CLASS
+    append str [binary format c1 0x1]
+
+    # e_ident/EI_DATA (Little Endian)
+    append str [binary format c1 0x1]
+
+    # e_ident/EI_VERSION (EV_CURRENT)
+    append str [binary format c1 0x1]
+
+    # e_ident/EI_PAD (9 Bytes)
+    append str [binary format c9 {0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0}]
+
+    # e_type (Core File)
+    append str [binary format s1 0x4]
+
+    # e_machine (EM_ARM)
+    append str [binary format s1 40]
+
+    # e_version (0x1)
+    append str [binary format i1 0x1]
+
+    # e_entry (0x0)
+    append str [binary format i1 0x0]
+
+    # e_phoff (0x0)
+    append str [binary format i1 $elf_header_size]
+
+    # e_shoff
+    set e_shoff [expr $program_header_size * $num_prog_headers]
+    set e_shoff [expr $elf_header_size + $e_shoff]
+    append str [binary format i1 $e_shoff]
+
+    # e_flags (0x0)
+    append str [binary format i1 0x0]
+
+    # e_ehsize
+    append str [binary format s1 $elf_header_size]
+
+    # e_phentsize
+    append str [binary format s1 $program_header_size]
+
+    # e_phnum
+    append str [binary format s1 $num_prog_headers]
+
+    # e_shentsize
+    append str [binary format s1 $section_header_size]
+
+    # e_shnum
+    append str [binary format s1 $num_sections]
+
+    # e_shstrndx (last section is symbol table)
+    append str [binary format s1 $symtbl_section]
+
+    return $str
+}
+
+# Return list of active sections based on override flag
+proc active_sections { bank_start_addr bank_size no_of_banks override } {
+    set act_sec_list {}
+    for {set i 0} {$i < $no_of_banks} {incr i} {
+	set start [expr $bank_start_addr + ($i * $bank_size)]
+	if { !($override & [expr {1<<(12+$i) | 1<<$i}]) } {
+	    lappend act_sec_list $start
+	}
+    }
+    return $act_sec_list
+}
+
+proc copy_tempfile { temp_file coredump_file } {
+    set platform $::tcl_platform(os)
+    if { $platform == "Windows NT" || $platform == "mingw" } {
+	exec cmd /c copy /b $coredump_file + $temp_file
+    } else {
+	exec cat $temp_file >> $coredump_file
+    }
+}
+
+# Dump all regions except external flash
+proc dump_core { list_of_regions CoreDumpFile } {
+    set temp_file "tmpfile"
+
+    # Each region is of format {start_addr size section_name}
+    foreach region $list_of_regions {
+	if {[string equal ".flash" [lindex $region 2]]} {
+	    coredump_dump_flash $CoreDumpFile
+	} else {
+	    dump_image $temp_file [lindex $region 0] [lindex $region 1]
+	    copy_tempfile $temp_file $CoreDumpFile
+	}
+    }
+}
+
+proc get_coredump { {CoreDumpFile "Coredump"} } {
+#  CoreFile Layout Details:
+#  +++++++++++++++++++++++++++++++++++++++++++++++++++
+#  +                 ELF header                      +
+#  +++++++++++++++++++++++++++++++++++++++++++++++++++
+#  +                 Program Header #1               +
+#  +++++++++++++++++++++++++++++++++++++++++++++++++++
+#  +                 Program Header #2               +
+#  +++++++++++++++++++++++++++++++++++++++++++++++++++
+#  ...
+#  +                 Program Header #n               +
+#  +++++++++++++++++++++++++++++++++++++++++++++++++++
+#  +                 Section Header #1               +
+#  +++++++++++++++++++++++++++++++++++++++++++++++++++
+#  +                 Section Header #2               +
+#  +++++++++++++++++++++++++++++++++++++++++++++++++++
+#  ...
+#  +                 Section Header #n               +
+#  +++++++++++++++++++++++++++++++++++++++++++++++++++
+#  +         PT_NOTE/RegDump section data             +
+#  +++++++++++++++++++++++++++++++++++++++++++++++++++
+#  +         shstrtab/String table data              +
+#  +++++++++++++++++++++++++++++++++++++++++++++++++++
+#  +                                                 +
+#  +                 Dumped Data                     +
+#  +                                                 +
+#  +++++++++++++++++++++++++++++++++++++++++++++++++++
+#
+
+    halt
+    set saved_reg_dump [reg_dump]
+
+    set fp [open $CoreDumpFile w+]
+    fconfigure $fp -translation binary
+
+    set oss $::tcl_platform(os)
+    puts "Operating System: $oss"
+
+    # Constants
+    set elf_header_size		52
+    set section_header_size	40
+    set program_header_size	32
+
+    # 20 bytes is from namesz (4), descsz (4), type (4), name (8)
+    set ptnote_size [expr 20 + [string length $saved_reg_dump]]
+
+    set list_of_regions [get_list_of_regions]
+    set num_regions [llength $list_of_regions]
+
+    # + 1 for PT_NOTE
+    set num_prog_headers [expr $num_regions + 1]
+
+    # + 2 for EMPTY and SHSTRTAB sections
+    set num_sections [expr $num_regions + 2]
+
+    # Some constants to aid with offset calculation
+    set program_total_size [expr $program_header_size * $num_prog_headers]
+    set section_total_size [expr $section_header_size * $num_sections]
+    set header_size [expr $elf_header_size + $program_total_size + $section_total_size]
+
+    # Need to add length of array to add null terminator count (+ 1 is for EMPTY section header)
+    set section_names [get_section_names]
+    set string_tbl_size [expr [llength $section_names] + [string length [string map {"\"" "" " " ""} $section_names]] + 1]
+    set string_table [generate_string_header $section_names]
+
+    # Offset and size calculations
+    set strtab_string_offset [string first ".shstrtab" $string_table]
+
+    ######### Start Writing File #########
+
+    ### Write ELF_HEADER ###
+    puts -nonewline $fp [generate_elf_header $elf_header_size $program_header_size $num_prog_headers $section_header_size $num_sections]
+
+    # Generate Program Headers and Section Headers for memory regions
+    set headers [get_headers $list_of_regions [expr $header_size + $ptnote_size + $string_tbl_size] $string_table]
+    set program_headers [lindex $headers 0]
+    set section_headers [lindex $headers 1]
+
+    ### Write Program Headers ###
+
+    # Write Memory Region Program Headers
+    puts -nonewline $fp $program_headers
+
+    # Generate Program header for holding registers in PT_NOTE section
+    puts -nonewline $fp [generate_program_header 0x4 $header_size 0x0 0x0 $ptnote_size]
+
+    ### Write Section Headers ###
+    # Empty Section
+    puts -nonewline $fp [generate_section_header 0 0 0 0 0 0 0 0 0 0]
+
+    # Write Memory Region Sections
+    puts -nonewline $fp $section_headers
+
+    # String Table section header
+    set string_table_offset [expr $header_size + $ptnote_size]
+    # Not sure where it is documented but according to readelf flag of 0x20 corresponds to Strings
+    puts -nonewline $fp [generate_section_header $strtab_string_offset 3 0x20 0 $string_table_offset $string_tbl_size 0 0 1 0]
+
+    ### Write PT_NOTE (reg dump) ###
+    puts -nonewline $fp [generate_pt_note $saved_reg_dump]
+
+    ### Write String Table ###
+    puts -nonewline $fp $string_table
+
+    close $fp
+
+    ### Write Core Dump ###
+    dump_core $list_of_regions $CoreDumpFile
+
+    puts ""
+    puts "##########################################################"
+    puts " Dump saved to file: $CoreDumpFile"
+    puts "##########################################################"
+    puts ""
+    puts "##########################################################"
+    puts " In order to do offline Coredump analysis, please use gdb "
+    puts " from toolchain version                                   "
+    puts " gcc-arm-11.2-2022.02-x86_64-arm-none-eabi or later       "
+    puts " https://developer.arm.com/tools-and-software/            "
+    puts " open-source-software/developer-tools/gnu-toolchain/      "
+    puts " downloads                                                "
+    puts "##########################################################"
+    puts ""
+}
diff --git a/platform/atm2/ATM22xx-x1x/openocd/http/app.tcl b/platform/atm2/ATM22xx-x1x/openocd/http/app.tcl
new file mode 100644
index 0000000..1e04580
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/http/app.tcl
@@ -0,0 +1,22 @@
+::http::add-handler OPTIONS /app/client-closing {
+    ::http::respond [::http::make-options-response {} 0 {} $request]
+}
+
+::http::add-handler POST /app/client-closing {
+    # There probably should be some key generation and exchange between the
+    # client and server so a request from a random HTTP client is rejected. For
+    # now, just ack the req.
+    ::http::respond [::http::make-bin-svc-response {} {} $request]
+    # Assumption: the sole client closed, so it's time to shutdown the OpenOCD
+    # server.  (Multiple clients would require tracking, or at least counting,
+    # and shuting down the server when the last client closes.  Or maybe the
+    # server should always stay up even when no client exist.  That, however, is
+    # a problem for the future, if ever.  Right now, there's a 1-to-1
+    # relationship between clients and servers, and each pair is tightly
+    # coupled.)
+    #
+    # Calling OpenOCD's shutdown makes the http server emit an handled critical
+    # error with an emtpy message.  But that's OK since the program exists with
+    # 0 status.
+    shutdown
+}
diff --git a/platform/atm2/ATM22xx-x1x/openocd/http/bin_svc_server.tcl b/platform/atm2/ATM22xx-x1x/openocd/http/bin_svc_server.tcl
new file mode 100644
index 0000000..2dd611f
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/http/bin_svc_server.tcl
@@ -0,0 +1,707 @@
+source source_jimhttp.tcl
+source_jimhttp http.tcl
+
+variable nvds_tool nvds_tool
+variable atm_isp atm_isp
+variable bin_svc_http_err_code 206
+variable platforms {}
+global ::http::statusCodePhrases
+
+if {[dict exists $::http::statusCodePhrases $bin_svc_http_err_code]} {
+    puts "Warning: overriding ::http::statusCodePhrases($bin_svc_http_err_code)"
+}
+dict set ::http::statusCodePhrases $bin_svc_http_err_code {Atmosic Binary Service Error}
+
+::http::add-handler GET / {
+    ::http::respond [::http::make-response "Atmosic binary API server" {} $request]
+}
+
+proc ::http::make-options-response {body have_get {headers {}} {request {}}} {
+    set ::http::responseTemplate \
+        {HTTP/1.1 $headers(code) $::http::statusCodePhrases($headers(code))
+Content-Type: $headers(contentType)
+Content-Length: $length}
+
+    set ::http::headerDefaults [dict create {*}{
+        code 200
+        contentType text/html
+    }]
+
+    set headers [dict merge $::http::headerDefaults $headers]
+
+    if ($have_get) {
+	set opts [list OPTIONS GET POST]
+    } else {
+	set opts [list OPTIONS POST]
+    }
+    set opts_str [join $opts ", "]
+
+    # Handle response processing, e.g., compression.
+    foreach lambda $::http::responseFilters {
+        lassign [apply $lambda $body $headers $request] body headers
+    }
+
+    set length [string bytelength $body]
+
+    set response [subst $::http::responseTemplate]
+
+    append response \
+		"\nAccess-Control-Allow-Origin: *"
+    append response \
+                 "\nAllow: $opts_str"
+
+    append response \
+                "\nAccess-Control-Allow-Methods: $opts_str"
+    append response \
+		"\nAccess-Control-Allow-Headers: X-PINGOTHER, content-type"
+    return $response
+}
+
+
+proc add-bin-svc-options {route have_get } {
+    ::http::add-handler OPTIONS $route [list apply {{have_get} {
+	upvar 1 request request
+	upvar 1 channel channel
+       ::http::respond [::http::make-options-response "" $have_get {} $request]
+    }} $have_get]
+}
+
+proc ::http::make-bin-svc-response {body {headers {}} {request {}}} {
+    set ::http::responseTemplate \
+        {HTTP/1.1 $headers(code) $::http::statusCodePhrases($headers(code))
+Content-Type: $headers(contentType)
+Content-Length: $length}
+
+    set ::http::headerDefaults [dict create {*}{
+        code 200
+        contentType text/html
+    }]
+
+    set headers [dict merge $::http::headerDefaults $headers]
+
+    # Handle response processing, e.g., compression.
+    foreach lambda $::http::responseFilters {
+        lassign [apply $lambda $body $headers $request] body headers
+    }
+
+    set length [string bytelength $body]
+
+    set response [subst $::http::responseTemplate]
+
+    # TODO: Generalize for other possible fields in the headers.
+    if {[dict exists $headers cookies]} {
+        foreach cookie $headers(cookies) {
+            append response "\nSet-Cookie: [::http::make-cookie $cookie]"
+        }
+    }
+    if {[dict exists $headers contentEncoding]} {
+        append response \
+                "\nContent-Encoding: [dict get $headers contentEncoding]"
+    }
+    append response \
+                "\nAccess-Control-Allow-Origin: *"
+
+    append response "\n\n$body"
+    return $response
+}
+
+proc ::http::make-bin-svc-err {body {request {}}} {
+    global bin_svc_http_err_code
+    return [::http::make-bin-svc-response $body [list code $bin_svc_http_err_code] $request]
+}
+
+proc handle-bin-get {oocd_cmd filename mimeType} {
+    ::http::log info "Running OpenOCD binary command $oocd_cmd $filename"
+    upvar 2 channel channel
+    upvar 2 request request
+    if { [catch {verify_rom_version} msg] } {
+	::http::log error "Verify ROM version failed: $msg"
+	::http::respond [::http::make-bin-svc-err "<p>$msg</p>" $request]
+	::http::log debug "Sent ROM version mismatch error response"
+	return
+    }
+    ::http::log debug "Verify ROM succeeded"
+    if { [catch {$oocd_cmd $filename}] } {
+	::http::respond [::http::make-bin-svc-err "<p>'$oocd_cmd' failed</p>" \
+			     $request]
+	return
+    }
+    puts -nonewline $channel \
+	[::http::make-bin-svc-response \
+	     [::http::read-file $filename] \
+	     [list contentType $mimeType] \
+	     $request]
+    file delete -- $filename
+}
+
+proc add-bin-svc-get {route oocd_cmd filename} {
+    ::http::add-handler GET $route [list apply {{oocd_cmd filename mimeType} {
+	poll on
+	handle-bin-get $oocd_cmd $filename $mimeType
+	polloff_n_reset_hard
+    }} $oocd_cmd $filename [::mime::type $filename]]
+}
+
+proc get-xargs {req_form} {
+    ::http::log debug "get-xargs"
+    if {! [dict exists $req_form xargs]} {
+	::http::log debug "No xargs in URI"
+	return {}
+    }
+    set xargs_str [dict get $req_form xargs]
+    ::http::log debug "xargs_str: $xargs_str"
+    set xargs [lsearch -all -inline -not -exact [split $xargs_str] {}]
+    ::http::log debug "xargs: $xargs"
+    return $xargs
+}
+
+proc handle-bin-post {oocd_cmd filename mimeType} {
+    ::http::log info "Running OpenOCD SVC command $oocd_cmd $filename"
+    ::http::log debug "in [pwd]"
+    upvar 2 channel channel
+    upvar 2 request request
+    if { [catch {verify_rom_version} msg] } {
+	::http::log error "Verify ROM version failed: $msg"
+	::http::respond [::http::make-bin-svc-err "<p>$msg</p>" $request]
+	::http::log debug "Sent ROM version mismatch error response"
+	return
+    }
+    ::http::log debug "Verify ROM succeeded"
+    if {$request(contentLength) != [string length $request(formPost)]} {
+	::http::log warning "content and formPost lengths differ"
+    }
+    # First, write posted data to a file
+    set error 1
+    set fileopen 1
+    if { [catch {open $filename w} outfile] } {
+	::http::log error "Could not open $filename for writing\n'$outfile'"
+	set fileopen 0
+    } elseif { [catch {puts -nonewline $outfile $request(formPost)}] } {
+	::http::log error "Could not write to $filename\n$outfile"
+    } else {
+	set error 0
+    }
+    if {$fileopen} {
+	close $outfile
+    }
+    # Upon successful saving of bin/nvm, load/burn on device
+    set args [list $oocd_cmd $filename \
+		  {*}[get-xargs [dict get $request form]]]
+    if {$error} {
+	set errMsg "Failed to save posted data to file"
+    } elseif { [catch {{*}$args} msg] } {
+	set errMsg "'$oocd_cmd' failed: $msg"
+    } else {
+	set errMsg ""
+    }
+    file delete -- $filename
+    if {$errMsg eq ""} {
+	::http::log info "'$args' executed AOK"
+	set resp [::http::make-bin-svc-response "" {} $request]
+    } else {
+	::http::log warning "Command '$args' failed"
+	::http::log warning "Responding with error: $errMsg"
+	set resp [::http::make-bin-svc-err "<p>$errMsg</p>" $request]
+    }
+    ::http::respond $resp
+}
+
+proc add-bin-svc-post {route oocd_cmd filename} {
+    ::http::add-handler POST $route [list apply {{oocd_cmd filename mimeType} {
+	poll on
+	handle-bin-post $oocd_cmd $filename $mimeType
+	polloff_n_reset_hard
+    }} $oocd_cmd $filename [::mime::type $filename]]
+}
+
+proc add-service {route oocd_cmd_get oocd_cmd_post filename {have_get 1} } {
+    if ($have_get) {
+	add-bin-svc-get $route $oocd_cmd_get $filename
+    }
+    add-bin-svc-post $route $oocd_cmd_post $filename
+    add-bin-svc-options $route $have_get
+}
+
+# Filter out all args of the atm_isp burn subcommand except -e, -v,
+# -c, or their combinations
+proc filter_isp_burn_args { isp_burn_args args } {
+    return [lsearch -all -inline {*}$args -regexp $isp_burn_args {^\-[evc]+$}]
+}
+
+# Makes a system call to atm_isp with "burn -i <archive> -t
+# atm_ispX.tcl -d atm_isp_X <args...>" as arguments.  <args...> is
+# filtered first.
+#
+# This function manages the files generated by atm_isp.  If an atm_isp
+# error occurs in debug mode (::http::verbosity >= 3), the files used
+# as arguments to -t/-d won't be cleaned up.
+proc sydney_burn_archive { archive args } {
+    ::http::log debug "sydney_burn_archive archive=$archive args=$args"
+    global atm_isp
+    set atm_isp_xargs [filter_isp_burn_args $args]
+    set atm_isp_xargs_ignored [filter_isp_burn_args $args -not]
+    if {$atm_isp_xargs_ignored ne ""} {
+	::http::log warning "Ignored archive xargs $atm_isp_xargs_ignored"
+    }
+    set atm_isp_tcl_script "atm_isp_[pid].tcl"
+    set atm_isp_tmp_dir "atm_isp_[pid]"
+    set argv [list $atm_isp burn -i $archive]
+    lappend argv -t $atm_isp_tcl_script
+    lappend argv -d $atm_isp_tmp_dir
+    lappend argv {*}$atm_isp_xargs
+    set errMsg {}
+    ::http::log debug "sydney_burn_archive: executing '$argv'"
+    if { [catch { file mkdir $atm_isp_tmp_dir } ] } {
+	set errMsg "Failed to make temp directory '$atm_isp_tmp_dir'"
+    } elseif { [catch { exec >@stdout 2>@stderr {*}$argv } msg] } {
+	set errMsg "Command '$argv' failed: $msg"
+    } elseif { [catch {source $atm_isp_tcl_script} msg] } {
+	set errMsg "Sourcing '$atm_isp_tcl_script' failed: $msg"
+    }
+    if { $errMsg ne {} && $::http::verbosity >= 3 } { # 3 is "debug"
+	::http::log debug "Kept atm_isp_tcl_script=$atm_isp_tcl_script and atm_isp_tmp_dir=$atm_isp_tmp_dir"
+    } else {
+	file delete -- $atm_isp_tcl_script
+	file delete -force -- $atm_isp_tmp_dir
+	::http::log debug "Deleted atm_isp_tcl_script=$atm_isp_tcl_script and atm_isp_tmp_dir=$atm_isp_tmp_dir"
+    }
+    if { $errMsg eq {} } {
+	::http::log debug "Successfully executed '$argv' and sourced the generated script"
+    } else {
+	error $errMsg
+    }
+}
+
+add-service /verify_flash {} sydney_verify_flash image 0
+add-service /elf sydney_dump_flash sydney_load_flash image
+add-service /nvds/flash sydney_dump_nvds sydney_load_nvds flash_nvds_[pid].bin
+add-service /nvds/otp sydney_dump_nvm sydney_burn_nvm otp_nvds_[pid].nvm
+add-service /isp/burn {} sydney_burn_archive arch.atm 0
+
+# Takes individual tag data files and makes a system call to
+# "nvds_tool" with -b and the appropriate -e/-l -t&-d pairs.
+#
+# There are two methods to determine the arguments passed to nvds_tool:
+#
+#  M-1) Get all arguments verbatim (modulo -hbvpSo:O:) from the URI as in:
+#
+#           /nvds/tool/b?-i%20-e%20b6%20-t%2001%20-d%20foo.bin
+#
+#     to execute "nvds_tool -b -i -e b6 -t 01 -d foo.bin"
+#
+#  M-2) If no erasing or locking of a tag (nvds_tool -e or -l) is
+#     needed, and there's no specific or non-lexicographic order in
+#     which the tag data should be passed to nvds_tool, then the tags
+#     can just come in as the "filename" metadata accomponied with the
+#     uploaded tag data files.  The URL can encode "?isotp=" for -i,
+#     "?rebuild=<filename>" for -r <filename>, and "?sort_tags=" to
+#     sort the <tag>s in the "-t <tag> -d <data>" pairs.
+#
+# Todo-1: allow option for tag data to come in as just binary blobs, not
+#         necessarily as files.
+
+::http::add-handler OPTIONS /nvds/tool/b {
+    set resp [::http::make-options-response "" $have_get {} $request]
+
+    ::http::respond $resp
+}
+
+::http::add-handler POST /nvds/tool/b {
+    global nvds_tool
+    set err_msg {}
+    set tmp_files {}
+    set posted_files {}
+    set existing_nvds_filename {}
+    set out nvds
+    set argv [list $nvds_tool -b -o $out]
+    if {![dict exists $request files]} {
+	set err_msg "No files posted to /nvds/tool/b"
+    } elseif {3 <= $::http::verbosity} {
+	::http::log debug "begin url form data"
+	dict for {key info} [dict get $request form] {
+	    ::http::log debug "$key=[dict get $request form $key]"
+	}
+	::http::log debug "end url form data"
+    }
+    # Create temporary files
+    set existing_nvds_fname_client {}
+    dict for {fname_client info} [dict get $request files] {
+	if {$err_msg ne ""} {
+	    break
+	}
+	if {[dict exists $request files $fname_client filename]} {
+	    set filename [dict get $request files $fname_client filename]
+	} else {
+	    set filename [file tail $fname_client]
+	}
+	::http::log debug "Received $fname_client as $filename"
+	if {$existing_nvds_filename eq $filename} {
+	    set existing_nvds_fname_client $fname_client
+	}
+	set content [dict get $request files $fname_client content]
+	set fileopen 1
+	if { [catch {open $filename w} outfile] } {
+	    set err_msg "Could not open $filename for writing\n'$outfile'"
+	    set fileopen 0
+	} elseif { [catch {puts -nonewline $outfile $content}] } {
+	    set err_msg "Could not write to $filename\n$outfile"
+	} else {
+	    ::http::log debug "Saved [string length $content] bytes in $filename"
+	    lappend tmp_files $filename
+	}
+	if {$fileopen} {
+	    close $outfile
+	}
+    }
+    if {$err_msg eq ""} {
+	if {[dict exists $request form nvds_tool_args]} {
+	    ::http::log debug "METHOD 1 -- verbatim nvds_tool_args"
+	    # Method M-1
+	    #
+	    # Note: every nvds_tool opt, including those that don't
+	    # take arguments, should have come in prefixed with a "-"
+	    # and separated from its argument or the next option with
+	    # a "%20".  For example, "-ie01" to erase tag 01 from OTP
+	    # is not acceptable, even though nvds_tool itself
+	    # correctly recognizes these options because it uses
+	    # getopts, which we don't have in tcl.
+	    set xargs_str [dict get $request form nvds_tool_args]
+	    ::http::log debug "xargs_str: $xargs_str"
+	    set xargs [lsearch -all -inline -not -exact [split $xargs_str] {}]
+	    ::http::log debug "xargs: $xargs"
+	    proc filter_xargs { opt {has_arg 0} } {
+		::http::log debug "opt=$opt,has_arg=$has_arg"
+		upvar 1 xargs xargs
+		set idx [lsearch $xargs $opt]
+		if {$idx != -1} {
+		    set last $idx
+		    if {$has_arg} {
+			incr last
+		    }
+		    ::http::log warning "ignoring '[lrange $xargs $idx $last]' in nvds_tool_args"
+		    set xargs [lreplace $xargs $idx $last]
+		}
+	    }
+	    ::http::log debug "filter out opts with no args"
+	    foreach opt {-h -b -v -p -S} {
+		filter_xargs $opt
+	    }
+	    ::http::log debug "filter out opts with args"
+	    foreach opt {-o -O} {
+		filter_xargs $opt 1
+	    }
+	    lappend argv {*}$xargs
+	} else {
+	    # Method M-2
+	    ::http::log debug "METHOD 2 -- ?rebuild=<fname>&isotp=&sort_tags="
+	    if {[dict exists $request form rebuild]} {
+		set existing_nvds_filename [dict get $request form rebuild]
+	    }
+	    if {[dict exists $request form isotp]} {
+		lappend argv -i
+	    }
+	    if {$existing_nvds_filename ne ""} {
+		lappend argv -r $existing_nvds_filename
+	    }
+	    set tags $tmp_files
+	    if {$existing_nvds_filename ne ""} {
+		if {$existing_nvds_fname_client eq ""} {
+		    set err_msg "$existing_nvds_filename to rebuild not uploaded"
+		} else {
+		    set idx [lsearch -exact $tags $existing_nvds_filename]
+		    if {$idx == -1} {
+			set err_msg "Could not find $existing_nvds_filename in temporary files list"
+		    } else {
+			set tags [lreplace $tags $idx $idx]
+		    }
+		}
+	    }
+	    set do_sort 0
+	    if { [dict exists $request form sort_tags] } {
+		set do_sort 1
+	    } elseif { [info exists ::env(HTTP_NVDS_SORT_TAGS)] } {
+		set do_sort $::env(HTTP_NVDS_SORT_TAGS)
+	    }
+	    if {$do_sort} {
+		set tags [lsort -ascii $tags]
+	    }
+	    foreach tag $tags {
+		lappend argv -t $tag -d $tag
+	    }
+	}
+	::http::log debug "argv: $argv"
+	if { [catch { exec >@stdout 2>@stderr {*}$argv } msg] } {
+	    set err_msg "Failed to execute $nvds_tool: $msg"
+	} else {
+	    ::http::log debug "responding with produced NVDS [file size $out]"
+	    puts -nonewline $channel \
+		[::http::make-bin-svc-response \
+		     [::http::read-file $out] \
+		     [list contentType [::mime::type $out]] \
+		     $request]
+	    file delete -- $out
+	}
+    }
+    # Delete temporary files
+    foreach filename $tmp_files {
+	file delete -- $filename
+    }
+    if {$err_msg eq ""} {
+	set succ_msg "'$argv' succeeded"
+	::http::log info $succ_msg
+	set resp [::http::make-response "<p><$succ_msg</p>" {} $request]
+    } else {
+	::http::log error "$err_msg"
+	set resp [::http::make-bin-svc-err "<p>$err_msg</p>" $request]
+    }
+    ::http::respond $resp
+}
+
+::http::add-handler OPTIONS /nvds/tool/s {
+    set resp [::http::make-options-response "" $have_get {} $request]
+
+    ::http::respond $resp
+}
+
+# Takes an NVDS file and returns a list of address-tag-length
+# triplets.  This information is sufficient for the client to extract
+# the individual tag data.  For example,
+# "7,1,6;16,6,39;58,11,28;89,12,24;116,5,3;122,9,4;129,17,1;133,18,1"
+# corresponds to an NVDS file that pretty-prints as follows.
+#
+# @0007 01  c9 00 00 6b 69 7c
+# @0010 06  00 00 00 00 01 02 00 00 00 00 00 00 00 00 00 00 00 00 00 40 06 00 00 40 06 00 00 07 01 00 00 00 00 00 00 00 00 00 00
+# @003a 0b  03 03 aa fe 0e 16 aa fe 10 00 01 61 74 6d 6f 73 69 63 07 08 08 41 30 30 30 30 63 39
+# @0059 0c  17 09 41 54 4d 30 32 30 31 20 45 33 61 20 42 43 4e 20 30 30 30 30 63 39
+# @0074 05  00 00 1e
+# @007a 09  b8 0b 00 00
+# @0081 11  04
+# @0085 12  02
+#
+::http::add-handler POST /nvds/tool/s {
+    ::http::log debug "/nvds/tool/s"
+    set NVDS \x4e\x56\x44\x53
+    set NVDS_inv \xb1\xa9\xbb\xac
+    set errMsg {}
+    set reqLen [string length $request(formPost)]
+    ::http::log debug "reqLen=$reqLen"
+    if {$reqLen < 4} {
+	set errMsg "binary data length too short: $reqLen"
+    } else {
+	set magic_bytes [string range $request(formPost) 0 3]
+	if {[string equal $magic_bytes $NVDS]} {
+	    set isOTP 0
+	} elseif {[string equal $magic_bytes $NVDS_inv]} {
+	    set isOTP 1
+	} elseif {[string equal $magic_bytes \x00\x00\x00\x00]} {
+	    set errMsg "NVDS is blank"
+	} else {
+	    set errMsg "unknown bytes"
+	}
+    }
+    if {$errMsg ne ""} {
+	::http::log error "Magic bytes check failed: $errMsg"
+	::http::respond [::http::make-bin-svc-err "<p>Magic bytes check of NVDS failed: $errMsg</p>" $request]
+	return
+    }
+
+    ::http::log debug "isOTP=$isOTP"
+
+    global nvds_tool
+    # First, write posted data to a file
+    set filename nvds
+    set error 1
+    set fileopen 1
+    if { [catch {open $filename w} outfile] } {
+	::http::log error "Could not open $filename for writing\n'$outfile'"
+	set fileopen 0
+    } elseif { [catch {puts -nonewline $outfile $request(formPost)}] } {
+	::http::log error "Could not write to $filename\n$outfile"
+    } else {
+	set error 0
+    }
+    if {$fileopen} {
+	close $outfile
+    }
+    # Upon successful saving of bin/nvm, get the split instructions
+    # (addr-tag-len triplets) to send back to the client
+    set splitdir split_nvds
+    set argv [list $nvds_tool]
+    if {[dict exists $request form isotp] || $isOTP} {
+	lappend argv -i
+    }
+    lappend argv -vr $filename
+    if {$error} {
+	set errMsg "Failed to save posted data to file"
+    } elseif { [catch { file mkdir $splitdir } msg] } {
+	set errMsg $msg
+    } elseif { [catch { exec {*}$argv } nvds_tool_output] } {
+	set errMsg "'$argv' failed: $nvds_tool_output"
+    } else {
+	set errMsg ""
+    }
+    file delete -- $filename $splitdir
+    if {$errMsg eq ""} {
+	::http::log info "split AOK with '$argv'"
+	set addr_tag_len_list {}
+	foreach tag_data_line [split $nvds_tool_output "\n"] {
+	    set tokens [split $tag_data_line]
+	    set addr [expr 0x[string trimleft [lindex $tokens 0] @]]
+	    set tag [expr 0x[lindex $tokens 1]]
+	    set len [expr [llength [lsearch -all -inline -not -exact $tokens {}]] - 2]
+	    set addr_tag_len [join [list $addr $tag $len] ","]
+	    ::http::log info "addr_tag_len=$addr_tag_len"
+	    lappend addr_tag_len_list $addr_tag_len
+	}
+	set resp_text [join $addr_tag_len_list ";"]
+	::http::log info "resp_text=$resp_text"
+	set resp [::http::make-bin-svc-response $resp_text {} $request]
+    } else {
+	::http::log warning "Responding with error: $errMsg"
+	set resp [::http::make-bin-svc-err "<p>$errMsg</p>" $request]
+    }
+    ::http::respond $resp
+}
+
+::http::add-handler OPTIONS /nvds/otp/rmw {
+    ::http::respond [::http::make-options-response {} 0 {} $request]
+}
+
+::http::add-handler POST /nvds/otp/rmw {
+    ::http::log debug "/nvds/otp/rmw"
+    set NVDS \x4e\x56\x44\x53
+    set NVDS_inv \xb1\xa9\xbb\xac
+    set errMsg {}
+    set reqLen [string length $request(formPost)]
+    ::http::log debug "reqLen=$reqLen"
+    if {$reqLen < 4} {
+	set errMsg "binary data length too short: $reqLen"
+    } else {
+	set magic_bytes [string range $request(formPost) 0 3]
+	if {[string equal $magic_bytes $NVDS]} {
+	    set errMsg "format is for flash, not OTP"
+	} elseif {[string equal $magic_bytes $NVDS_inv]} {
+	    set isOTP 1
+	} elseif {[string equal $magic_bytes \x00\x00\x00\x00]} {
+	    set errMsg "NVDS is blank"
+	} else {
+	    set errMsg "unknown bytes"
+	}
+    }
+    if {$errMsg ne ""} {
+	::http::log error "Magic bytes check failed: $errMsg"
+	::http::respond [::http::make-bin-svc-err "<p>Magic bytes check of NVDS failed: $errMsg</p>" $request]
+	return
+    }
+
+    global nvds_tool
+    # First, write posted data to a file
+    set filename nvds_[pid].nvm
+    set error 1
+    set fileopen 1
+    if { [catch {open $filename w} outfile] } {
+	::http::log error "Could not open $filename for writing\n'$outfile'"
+	set fileopen 0
+    } elseif { [catch {puts -nonewline $outfile $request(formPost)}] } {
+	::http::log error "Could not write to $filename\n$outfile"
+    } else {
+	set error 0
+    }
+    if {$fileopen} {
+	close $outfile
+    }
+    if {$error} {
+	set errMsg "Failed to save posted data to file"
+	::http::log warning "Responding with error: $errMsg"
+	::http::respond [::http::make-bin-svc-err "<p>$errMsg</p>" $request]
+	return
+    }
+    if {$request(contentLength) != [string length $request(formPost)]} {
+	::http::log warning "content and formPost lengths differ"
+    }
+    set dev_otp_old dev_otp_old_[pid].nvm
+    set dev_otp_new dev_otp_new_[pid].nvm
+    set argv [list $nvds_tool -i -r $dev_otp_old -r $filename -b -o $dev_otp_new]
+    poll on
+    if { [catch { verify_rom_version } msg] } {
+	set errMsg "Verify ROM version failed: $msg"
+    } elseif { [catch { sydney_dump_nvm $dev_otp_old } msg ] } {
+	set errMsg "Dump OTP failed: $msg"
+    } elseif { [catch { exec {*}$argv } msg] } {
+	set errMsg "Merging OTP with '$argv' failed: $msg"
+    } elseif { [catch { sydney_burn_nvm $dev_otp_new } msg ] } {
+	set errMsg "Burn OTP failed: $msg"
+    } else {
+	set errMsg ""
+    }
+    polloff_n_reset_hard
+    file delete -- $dev_otp_old $filename
+    file delete -force -- $dev_otp_new
+    if {$errMsg eq ""} {
+	::http::log info "Read-modify-write of OTP went AOK"
+	set resp [::http::make-bin-svc-response {} {} $request]
+    } else {
+	::http::log warning "Responding with error: $errMsg"
+	set resp [::http::make-bin-svc-err "<p>$errMsg</p>" $request]
+    }
+    ::http::respond $resp
+}
+
+proc set_platforms {} {
+    global platforms
+    if {$platforms ne ""} {
+	return ""
+    }
+    set errMsg {}
+    poll on
+    if { [ catch {get_rom_version} rom_ver ] } {
+	set errMsg "get_rom_ver err: $rom_ver"
+    }
+    polloff_n_reset_hard
+    if {$errMsg ne {}} {
+	error $errMsg
+    }
+    set platforms $rom_ver
+}
+
+if {[info exists ::env(HTTP_APP)] && $::env(HTTP_APP)} {
+    source [find app.tcl]
+}
+
+::http::add-handler GET /nvds/platforms {
+    # Thought: eagerly, rather than lazily, call set_platforms before starting
+    # the HTTP server.  Do that once and read the result from that point on out.
+    if { [ catch {set_platforms} errMsg ] } {
+	::http::log info "Error: $errMsg"
+	set resp [::http::make-bin-svc-err "<p>$errMsg</p>" $request]
+    } else {
+	global platforms
+	::http::log info "Platforms: $platforms"
+	set resp [::http::make-bin-svc-response [join $platforms ","] {} $request]
+    }
+    ::http::respond $resp
+}
+
+# Start the HTTP server binding it to $ipAddress and $port.  Similar
+# to ::http::start-server, but it has no wait.
+proc start-server-no-wait {ipAddress port} {
+    set ::http::serverSocket [socket stream.server $ipAddress:$port]
+    $::http::serverSocket readable {
+        set client [$::http::serverSocket accept addr]
+        ::http::serve-and-trap-errors $client {*}[split $addr :]
+    }
+}
+
+proc start-bin-server {args_dict} {
+    global ::http::crashOnError
+    global ::http::verbosity
+    global nvds_tool
+    global atm_isp
+    dict with args_dict {
+	set nvds_tool $nvds_tool
+	set atm_isp $atm_isp
+	set ::http::verbosity $verbosity
+	start-server-no-wait $ip $port
+	puts "Info : Listening on port $port for binary http requests"
+    }
+}
diff --git a/platform/atm2/ATM22xx-x1x/openocd/http/openocd_http.tcl b/platform/atm2/ATM22xx-x1x/openocd/http/openocd_http.tcl
new file mode 100644
index 0000000..5d25663
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/http/openocd_http.tcl
@@ -0,0 +1,35 @@
+# Routine for sourcing Jim Tcl scripts.  Jim Tcl doesn't have a find
+# function.  Therefore, Jim Tcl scripts don't use the idiom "source
+# [find X.tcl]" commonly used in OpenOCD scripts.
+proc source_jimtcl_script {jimtcl_script} {
+    set saved_pwd [pwd]
+    cd [file dirname [find $jimtcl_script]]
+    source $jimtcl_script
+    cd $saved_pwd
+}
+
+proc openocd_http_dir {} {
+    if {[info exists ::env(OPENOCD_HTTP_DIR)]} {
+        return $::env(OPENOCD_HTTP_DIR)
+    }
+    return [file dirname [file normalize [info script]]]
+}
+
+set argv {}
+set argv0 openocd_bin_http
+if {[info exists ::env(HTTP_BIN_PORT)]} {
+    lappend argv -p $::env(HTTP_BIN_PORT)
+}
+if {[info exists ::env(HTTP_BIN_IP)]} {
+    lappend argv -i $::env(HTTP_BIN_IP)
+}
+if {[info exists ::env(HTTP_BIN_VERBOSITY)]} {
+    lappend argv -v $::env(HTTP_BIN_VERBOSITY)
+}
+if {[info exists ::env(HTTP_NVDS_TOOL)]} {
+    lappend argv -n $::env(HTTP_NVDS_TOOL)
+}
+if {[info exists ::env(HTTP_ATM_ISP)]} {
+    lappend argv -s $::env(HTTP_ATM_ISP)
+}
+source_jimtcl_script [file join [openocd_http_dir] run_bin_svc_server.tcl]
diff --git a/platform/atm2/ATM22xx-x1x/openocd/http/run_bin_svc_server.tcl b/platform/atm2/ATM22xx-x1x/openocd/http/run_bin_svc_server.tcl
new file mode 100644
index 0000000..a4bb926
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/http/run_bin_svc_server.tcl
@@ -0,0 +1,24 @@
+source bin_svc_server.tcl
+source_jimhttp arguments.tcl
+
+proc main {} {
+    global argv
+    global argv0
+
+    stdout buffering line
+
+    set optionalArgs [list -p port 8080 -i ip 0.0.0.0 -v verbosity 2 -n nvds_tool nvds_tool -s atm_isp atm_isp]
+    set error [catch {
+        set args [::arguments::parse {} $optionalArgs $argv]
+    } errorMessage]
+    if {$error} {
+        puts "Error: $errorMessage"
+        puts [::arguments::usage {} $optionalArgs $argv0]
+        exit 1
+    }
+    if { [catch {start-bin-server $args} errMsg ] } {
+	puts "Error: could not start http server - $errMsg"
+    }
+}
+
+main
diff --git a/platform/atm2/ATM22xx-x1x/openocd/http/source_jimhttp.tcl b/platform/atm2/ATM22xx-x1x/openocd/http/source_jimhttp.tcl
new file mode 100644
index 0000000..8c11395
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/http/source_jimhttp.tcl
@@ -0,0 +1,8 @@
+proc source_jimhttp {scripts} {
+    set save [pwd]
+    cd [find jimhttp]
+    foreach script $scripts {
+	source $script
+    }
+    cd $save
+}
diff --git a/platform/atm2/ATM22xx-x1x/openocd/m0_cpu.tcl b/platform/atm2/ATM22xx-x1x/openocd/m0_cpu.tcl
new file mode 100644
index 0000000..4550b7e
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/m0_cpu.tcl
@@ -0,0 +1,52 @@
+source [find target/swj-dp.tcl]
+
+set _CHIPNAME Sydney
+set _ENDIAN little
+# JTAG IDCODE register
+set _CPUTAPID 0x0BA01477
+
+swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID -irlen 4
+
+set _TARGETNAME $_CHIPNAME.cpu
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
+$_TARGETNAME configure -work-area-backup 1 -work-area-phys 0x20010000 -work-area-size 128
+
+set _RESET_HARD_ON_EXIT 0
+set _RESET_HARD_TIME 2000
+if {[info exists ::env(FTDI_RESET_HARD_TIME)]} {
+    set _RESET_HARD_TIME $::env(FTDI_RESET_HARD_TIME)
+    puts "_RESET_HARD_TIME set to $_RESET_HARD_TIME"
+}
+rename exit orig_exit
+proc exit {} {
+    poll off
+    # Deassert syspwrupreq and dbgpwrupreq
+    $::_CHIPNAME.dap dpreg 4 0x00000041
+    if {$::_RESET_HARD_ON_EXIT} {
+	set_reset
+	sleep $::_RESET_HARD_TIME
+	release_reset
+    }
+    orig_exit
+}
+
+reset_config none
+cortex_m reset_config sysresetreq
+
+proc reset_hard [list [list reset_time $_RESET_HARD_TIME] ] {
+    poll off
+    set_reset
+    sleep $reset_time
+    release_reset
+    sleep 100
+    poll on
+}
+
+proc polloff_n_reset_hard {} {
+    poll off
+    $::_CHIPNAME.dap dpreg 4 0x00000041
+    set_reset
+    sleep $::_RESET_HARD_TIME
+    release_reset
+}
diff --git a/platform/atm2/ATM22xx-x1x/openocd/regs/nvm.tcl b/platform/atm2/ATM22xx-x1x/openocd/regs/nvm.tcl
new file mode 100644
index 0000000..b83566e
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/regs/nvm.tcl
@@ -0,0 +1,80 @@
+set CMSDK_NVM_BASE            0x50002000
+set CMSDK_NVM_OPMODE [expr $CMSDK_NVM_BASE + 0x0]
+set CMSDK_NVM_OPMODE_READ__RESET_VALUE 0x00000000
+set CMSDK_NVM_OPMODE_PROGRAM__RESET_VALUE 0x00000000
+set CMSDK_NVM_OPMODE_WORD_SIZE__RESET_VALUE 0x00000000
+set CMSDK_NVM_OPMODE_AUTO_INC__RESET_VALUE 0x00000000
+set CMSDK_NVM_OPMODE_GO__RESET_VALUE 0x00000000
+set CMSDK_NVM_OPMODE__RESET_VALUE 0x00000000
+set CMSDK_NVM_ADDRESS [expr $CMSDK_NVM_BASE + 0x4]
+set CMSDK_NVM_ADDRESS_ADDRESS__RESET_VALUE 0x00000000
+set CMSDK_NVM_ADDRESS__RESET_VALUE 0x00000000
+set CMSDK_NVM_STATUS [expr $CMSDK_NVM_BASE + 0x8]
+set CMSDK_NVM_STATUS_RUNNING__RESET_VALUE 0x00000000
+set CMSDK_NVM_STATUS__RESET_VALUE 0x00000000
+set CMSDK_NVM_READ_DATA [expr $CMSDK_NVM_BASE + 0xc]
+set CMSDK_NVM_READ_DATA_READ_DATA__RESET_VALUE 0x00000000
+set CMSDK_NVM_READ_DATA__RESET_VALUE 0x00000000
+set CMSDK_NVM_T_SP_PG_AVDD [expr $CMSDK_NVM_BASE + 0x10]
+set CMSDK_NVM_T_SP_PG_AVDD_CYCLES__RESET_VALUE 0x0000000f
+set CMSDK_NVM_T_SP_PG_AVDD__RESET_VALUE 0x0000000f
+set CMSDK_NVM_T_SP_PGM [expr $CMSDK_NVM_BASE + 0x14]
+set CMSDK_NVM_T_SP_PGM_CYCLES__RESET_VALUE 0x00000000
+set CMSDK_NVM_T_SP_PGM__RESET_VALUE 0x00000000
+set CMSDK_NVM_T_PGM [expr $CMSDK_NVM_BASE + 0x18]
+set CMSDK_NVM_T_PGM_CYCLES__RESET_VALUE 0x0000008f
+set CMSDK_NVM_T_PGM__RESET_VALUE 0x0000008f
+set CMSDK_NVM_T_HP_PGM [expr $CMSDK_NVM_BASE + 0x1c]
+set CMSDK_NVM_T_HP_PGM_CYCLES__RESET_VALUE 0x00000000
+set CMSDK_NVM_T_HP_PGM__RESET_VALUE 0x00000000
+set CMSDK_NVM_T_HP_PG_AVDD [expr $CMSDK_NVM_BASE + 0x20]
+set CMSDK_NVM_T_HP_PG_AVDD_CYCLES__RESET_VALUE 0x0000000f
+set CMSDK_NVM_T_HP_PG_AVDD__RESET_VALUE 0x0000000f
+set CMSDK_NVM_T_SR_RD [expr $CMSDK_NVM_BASE + 0x24]
+set CMSDK_NVM_T_SR_RD_CYCLES__RESET_VALUE 0x00000001
+set CMSDK_NVM_T_SR_RD__RESET_VALUE 0x00000001
+set CMSDK_NVM_T_RD [expr $CMSDK_NVM_BASE + 0x28]
+set CMSDK_NVM_T_RD_CYCLES__RESET_VALUE 0x00000000
+set CMSDK_NVM_T_RD__RESET_VALUE 0x00000000
+set CMSDK_NVM_T_HR_RD [expr $CMSDK_NVM_BASE + 0x2c]
+set CMSDK_NVM_T_HR_RD_CYCLES__RESET_VALUE 0x00000001
+set CMSDK_NVM_T_HR_RD__RESET_VALUE 0x00000001
+set CMSDK_NVM_T_SETUP [expr $CMSDK_NVM_BASE + 0x30]
+set CMSDK_NVM_T_SETUP_CYCLES__RESET_VALUE 0x00000000
+set CMSDK_NVM_T_SETUP__RESET_VALUE 0x00000000
+set CMSDK_NVM_T_HOLD [expr $CMSDK_NVM_BASE + 0x34]
+set CMSDK_NVM_T_HOLD_CYCLES__RESET_VALUE 0x00000000
+set CMSDK_NVM_T_HOLD__RESET_VALUE 0x00000000
+set CMSDK_NVM_T_ADDR [expr $CMSDK_NVM_BASE + 0x38]
+set CMSDK_NVM_T_ADDR_CYCLES__RESET_VALUE 0x00000000
+set CMSDK_NVM_T_ADDR__RESET_VALUE 0x00000000
+set CMSDK_NVM_INTERRUPT_MASK [expr $CMSDK_NVM_BASE + 0x3c]
+set CMSDK_NVM_INTERRUPT_MASK_PASSTHRU0__RESET_VALUE 0x00000000
+set CMSDK_NVM_INTERRUPT_MASK__RESET_VALUE 0x00000000
+set CMSDK_NVM_INTERRUPT_STATUS [expr $CMSDK_NVM_BASE + 0x40]
+set CMSDK_NVM_INTERRUPT_STATUS_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_NVM_INTERRUPT_STATUS__RESET_VALUE 0x00000000
+set CMSDK_NVM_SET_INTERRUPT [expr $CMSDK_NVM_BASE + 0x44]
+set CMSDK_NVM_SET_INTERRUPT_SET_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_NVM_SET_INTERRUPT__RESET_VALUE 0x00000000
+set CMSDK_NVM_RESET_INTERRUPT [expr $CMSDK_NVM_BASE + 0x48]
+set CMSDK_NVM_RESET_INTERRUPT_RESET_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_NVM_RESET_INTERRUPT__RESET_VALUE 0x00000000
+set CMSDK_NVM_EFUSE_AUTOREAD [expr $CMSDK_NVM_BASE + 0x4c]
+set CMSDK_NVM_EFUSE_AUTOREAD_SWD_DISABLE__RESET_VALUE 0x00000000
+set CMSDK_NVM_EFUSE_AUTOREAD_SYSRAM_SVT_EN_HW__RESET_VALUE 0x00000000
+set CMSDK_NVM_EFUSE_AUTOREAD_SYSRAM_HVT_EN_HW__RESET_VALUE 0x00000000
+set CMSDK_NVM_EFUSE_AUTOREAD_PKG_6X6__RESET_VALUE 0x00000000
+set CMSDK_NVM_EFUSE_AUTOREAD_RESERVED1__RESET_VALUE 0x00000000
+set CMSDK_NVM_EFUSE_AUTOREAD_OTP_HARV_ALLOWED__RESET_VALUE 0x00000000
+set CMSDK_NVM_EFUSE_AUTOREAD_OTP_BROWNOUT_THR__RESET_VALUE 0x00000000
+set CMSDK_NVM_EFUSE_AUTOREAD_OTP_ENDOFLIFE_THR__RESET_VALUE 0x00000000
+set CMSDK_NVM_EFUSE_AUTOREAD_OTP_NABG_TRIM__RESET_VALUE 0x00000000
+set CMSDK_NVM_EFUSE_AUTOREAD_OTP_GEN_VDDIO__RESET_VALUE 0x00000000
+set CMSDK_NVM_EFUSE_AUTOREAD_OTP_HARV_TYPE__RESET_VALUE 0x00000000
+set CMSDK_NVM_EFUSE_AUTOREAD_OTP_BATT_TYPE__RESET_VALUE 0x00000000
+set CMSDK_NVM_EFUSE_AUTOREAD_RESERVED2__RESET_VALUE 0x00000000
+set CMSDK_NVM_EFUSE_AUTOREAD__RESET_VALUE 0x00000000
+set CMSDK_NVM_ID [expr $CMSDK_NVM_BASE + 0xffc]
+set CMSDK_NVM_ID_ID__RESET_VALUE 0x4e564d20
+set CMSDK_NVM_ID__RESET_VALUE 0x4e564d20
diff --git a/platform/atm2/ATM22xx-x1x/openocd/regs/pmu.tcl b/platform/atm2/ATM22xx-x1x/openocd/regs/pmu.tcl
new file mode 100644
index 0000000..4ec6d4f
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/regs/pmu.tcl
@@ -0,0 +1,43 @@
+set CMSDK_PMU_BASE            0x50007000
+set CMSDK_PMU_TRANSACTION_SETUP [expr $CMSDK_PMU_BASE + 0x0]
+set CMSDK_PMU_TRANSACTION_SETUP_START__RESET_VALUE 0x00000000
+set CMSDK_PMU_TRANSACTION_SETUP_NUM_DATA_BYTES__RESET_VALUE 0x00000000
+set CMSDK_PMU_TRANSACTION_SETUP_RWB__RESET_VALUE 0x00000000
+set CMSDK_PMU_TRANSACTION_SETUP_CLKDIV__RESET_VALUE 0x00000000
+set CMSDK_PMU_TRANSACTION_SETUP_OPCODE__RESET_VALUE 0x00000000
+set CMSDK_PMU_TRANSACTION_SETUP_LOOPBACK__RESET_VALUE 0x00000000
+set CMSDK_PMU_TRANSACTION_SETUP_CSN_STAYS_LOW__RESET_VALUE 0x00000000
+set CMSDK_PMU_TRANSACTION_SETUP_DUMMY_CYCLES__RESET_VALUE 0x00000000
+set CMSDK_PMU_TRANSACTION_SETUP__RESET_VALUE 0x00000000
+set CMSDK_PMU_TRANSACTION_STATUS [expr $CMSDK_PMU_BASE + 0x4]
+set CMSDK_PMU_TRANSACTION_STATUS_DONE__RESET_VALUE 0x00000000
+set CMSDK_PMU_TRANSACTION_STATUS_RUNNING__RESET_VALUE 0x00000000
+set CMSDK_PMU_TRANSACTION_STATUS_OPCODE_STATUS__RESET_VALUE 0x00000000
+set CMSDK_PMU_TRANSACTION_STATUS__RESET_VALUE 0x00000000
+set CMSDK_PMU_DATA_BYTES_LOWER [expr $CMSDK_PMU_BASE + 0x8]
+set CMSDK_PMU_DATA_BYTES_LOWER_BYTE0__RESET_VALUE 0x00000000
+set CMSDK_PMU_DATA_BYTES_LOWER_BYTE1__RESET_VALUE 0x00000000
+set CMSDK_PMU_DATA_BYTES_LOWER_BYTE2__RESET_VALUE 0x00000000
+set CMSDK_PMU_DATA_BYTES_LOWER_BYTE3__RESET_VALUE 0x00000000
+set CMSDK_PMU_DATA_BYTES_LOWER__RESET_VALUE 0x00000000
+set CMSDK_PMU_DATA_BYTES_UPPER [expr $CMSDK_PMU_BASE + 0xc]
+set CMSDK_PMU_DATA_BYTES_UPPER_BYTE4__RESET_VALUE 0x00000000
+set CMSDK_PMU_DATA_BYTES_UPPER_BYTE5__RESET_VALUE 0x00000000
+set CMSDK_PMU_DATA_BYTES_UPPER_BYTE6__RESET_VALUE 0x00000000
+set CMSDK_PMU_DATA_BYTES_UPPER_BYTE7__RESET_VALUE 0x00000000
+set CMSDK_PMU_DATA_BYTES_UPPER__RESET_VALUE 0x00000000
+set CMSDK_PMU_INTERRUPT_MASK [expr $CMSDK_PMU_BASE + 0x10]
+set CMSDK_PMU_INTERRUPT_MASK_PASSTHRU0__RESET_VALUE 0x00000000
+set CMSDK_PMU_INTERRUPT_MASK__RESET_VALUE 0x00000000
+set CMSDK_PMU_INTERRUPT_STATUS [expr $CMSDK_PMU_BASE + 0x14]
+set CMSDK_PMU_INTERRUPT_STATUS_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_PMU_INTERRUPT_STATUS__RESET_VALUE 0x00000000
+set CMSDK_PMU_SET_INTERRUPT [expr $CMSDK_PMU_BASE + 0x18]
+set CMSDK_PMU_SET_INTERRUPT_SET_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_PMU_SET_INTERRUPT__RESET_VALUE 0x00000000
+set CMSDK_PMU_RESET_INTERRUPT [expr $CMSDK_PMU_BASE + 0x1c]
+set CMSDK_PMU_RESET_INTERRUPT_RESET_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_PMU_RESET_INTERRUPT__RESET_VALUE 0x00000000
+set CMSDK_PMU_CORE_ID [expr $CMSDK_PMU_BASE + 0xffc]
+set CMSDK_PMU_CORE_ID_ID__RESET_VALUE 0x53504920
+set CMSDK_PMU_CORE_ID__RESET_VALUE 0x53504920
diff --git a/platform/atm2/ATM22xx-x1x/openocd/regs/pseq.tcl b/platform/atm2/ATM22xx-x1x/openocd/regs/pseq.tcl
new file mode 100644
index 0000000..38d5b05
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/regs/pseq.tcl
@@ -0,0 +1,388 @@
+set CMSDK_PSEQ_BASE           0x50008000
+set CMSDK_PSEQ_CTRL0 [expr $CMSDK_PSEQ_BASE + 0x0]
+set CMSDK_PSEQ_CTRL0_MANAGE_XTAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CTRL0_REQ_BLE_ONLY_LP_STATE__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CTRL0_REQ_RETAIN_ALL_STATE__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CTRL0_REQ_HIBERNATE_STATE__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CTRL0_ENABLE_DEBUG_BUS__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CTRL0_REQ_BLE_TO_BOOT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CTRL0_XTAL_WAITS_FOR_RETV__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CTRL0_BLE_BOOSTS_RETV__RESET_VALUE 0x00000001
+set CMSDK_PSEQ_CTRL0_BLOCK_DBG_WAKE__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CTRL0_WURX_DET0_SEL__RESET_VALUE 0x00000001
+set CMSDK_PSEQ_CTRL0_WURX_DET1_SEL__RESET_VALUE 0x00000001
+set CMSDK_PSEQ_CTRL0_RADIO_EN_I_SRC__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CTRL0_PINSEL_LATCH_OPEN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CTRL0_KSM_LATCH_OPEN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CTRL0_GPIO_LATCH_OPEN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CTRL0_REQ_SOC_OFF__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CTRL0__RESET_VALUE 0x002a0000
+set CMSDK_PSEQ_RETAIN_ALL_WAKE_MASK [expr $CMSDK_PSEQ_BASE + 0x4]
+set CMSDK_PSEQ_RETAIN_ALL_WAKE_MASK_WATCH_GPIO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_RETAIN_ALL_WAKE_MASK_WATCH_CNTDOWN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_RETAIN_ALL_WAKE_MASK_WATCH_WURX0__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_RETAIN_ALL_WAKE_MASK_WATCH_WURX1__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_RETAIN_ALL_WAKE_MASK_WATCH_QDEC__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_RETAIN_ALL_WAKE_MASK_WATCH_KSM__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_RETAIN_ALL_WAKE_MASK_WATCH_SHUB__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_RETAIN_ALL_WAKE_MASK__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_HIB_WAKE_MASK [expr $CMSDK_PSEQ_BASE + 0x8]
+set CMSDK_PSEQ_HIB_WAKE_MASK_WATCH_GPIO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_HIB_WAKE_MASK_WATCH_CNTDOWN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_HIB_WAKE_MASK_WATCH_WURX0__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_HIB_WAKE_MASK_WATCH_WURX1__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_HIB_WAKE_MASK_WATCH_QDEC__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_HIB_WAKE_MASK_WATCH_KSM__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_HIB_WAKE_MASK_WATCH_SHUB__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_HIB_WAKE_MASK__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_BLE_RET_TO_BLE_ACT_WAKE_MASK [expr $CMSDK_PSEQ_BASE + 0xc]
+set CMSDK_PSEQ_BLE_RET_TO_BLE_ACT_WAKE_MASK_WATCH_GPIO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_BLE_RET_TO_BLE_ACT_WAKE_MASK_WATCH_CNTDOWN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_BLE_RET_TO_BLE_ACT_WAKE_MASK_WATCH_WURX0__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_BLE_RET_TO_BLE_ACT_WAKE_MASK_WATCH_WURX1__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_BLE_RET_TO_BLE_ACT_WAKE_MASK_WATCH_QDEC__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_BLE_RET_TO_BLE_ACT_WAKE_MASK_WATCH_KSM__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_BLE_RET_TO_BLE_ACT_WAKE_MASK_WATCH_SHUB__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_BLE_RET_TO_BLE_ACT_WAKE_MASK__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_BLE_RET_TO_CPU_ACT_WAKE_MASK [expr $CMSDK_PSEQ_BASE + 0x10]
+set CMSDK_PSEQ_BLE_RET_TO_CPU_ACT_WAKE_MASK_WATCH_GPIO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_BLE_RET_TO_CPU_ACT_WAKE_MASK_WATCH_CNTDOWN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_BLE_RET_TO_CPU_ACT_WAKE_MASK_WATCH_WURX0__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_BLE_RET_TO_CPU_ACT_WAKE_MASK_WATCH_WURX1__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_BLE_RET_TO_CPU_ACT_WAKE_MASK_WATCH_QDEC__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_BLE_RET_TO_CPU_ACT_WAKE_MASK_WATCH_KSM__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_BLE_RET_TO_CPU_ACT_WAKE_MASK_WATCH_SHUB__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_BLE_RET_TO_CPU_ACT_WAKE_MASK__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_GPIO_WAKE_MASK [expr $CMSDK_PSEQ_BASE + 0x14]
+set CMSDK_PSEQ_GPIO_WAKE_MASK_LOWER__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_GPIO_WAKE_MASK_UPPER__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_GPIO_WAKE_MASK__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_GPIO_WAKE_TYPE [expr $CMSDK_PSEQ_BASE + 0x18]
+set CMSDK_PSEQ_GPIO_WAKE_TYPE_LOWER__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_GPIO_WAKE_TYPE_UPPER__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_GPIO_WAKE_TYPE__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_GPIO_WAKE_POL [expr $CMSDK_PSEQ_BASE + 0x1c]
+set CMSDK_PSEQ_GPIO_WAKE_POL_LOWER__RESET_VALUE 0x0000ffff
+set CMSDK_PSEQ_GPIO_WAKE_POL_UPPER__RESET_VALUE 0x0000ffff
+set CMSDK_PSEQ_GPIO_WAKE_POL__RESET_VALUE 0xffffffff
+set CMSDK_PSEQ_GPIO_WAKE_BOTH_EDGES [expr $CMSDK_PSEQ_BASE + 0x20]
+set CMSDK_PSEQ_GPIO_WAKE_BOTH_EDGES_LOWER__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_GPIO_WAKE_BOTH_EDGES_UPPER__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_GPIO_WAKE_BOTH_EDGES__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_WURX_CONFIG [expr $CMSDK_PSEQ_BASE + 0x24]
+set CMSDK_PSEQ_WURX_CONFIG_WURX_EN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_WURX_CONFIG_WURX_RSTB__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_WURX_CONFIG_WURX_CUTVDD_B__RESET_VALUE 0x00000001
+set CMSDK_PSEQ_WURX_CONFIG__RESET_VALUE 0x00000004
+set CMSDK_PSEQ_GADC_CONFIG [expr $CMSDK_PSEQ_BASE + 0x28]
+set CMSDK_PSEQ_GADC_CONFIG_GADC_EN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_GADC_CONFIG_GADC_RSTB__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_GADC_CONFIG_GADC_CUTVDD_B__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_GADC_CONFIG__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT0 [expr $CMSDK_PSEQ_BASE + 0x2c]
+set CMSDK_PSEQ_COUNT0_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT0__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT1 [expr $CMSDK_PSEQ_BASE + 0x30]
+set CMSDK_PSEQ_COUNT1_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT1__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT2 [expr $CMSDK_PSEQ_BASE + 0x34]
+set CMSDK_PSEQ_COUNT2_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT2__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT3 [expr $CMSDK_PSEQ_BASE + 0x38]
+set CMSDK_PSEQ_COUNT3_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT3__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT4 [expr $CMSDK_PSEQ_BASE + 0x3c]
+set CMSDK_PSEQ_COUNT4_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT4__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT5 [expr $CMSDK_PSEQ_BASE + 0x40]
+set CMSDK_PSEQ_COUNT5_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT5__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT6 [expr $CMSDK_PSEQ_BASE + 0x44]
+set CMSDK_PSEQ_COUNT6_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT6__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT7 [expr $CMSDK_PSEQ_BASE + 0x48]
+set CMSDK_PSEQ_COUNT7_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT7__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT8 [expr $CMSDK_PSEQ_BASE + 0x4c]
+set CMSDK_PSEQ_COUNT8_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT8__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT9 [expr $CMSDK_PSEQ_BASE + 0x50]
+set CMSDK_PSEQ_COUNT9_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT9__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT0_RADIO [expr $CMSDK_PSEQ_BASE + 0x54]
+set CMSDK_PSEQ_COUNT0_RADIO_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT0_RADIO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT1_RADIO [expr $CMSDK_PSEQ_BASE + 0x58]
+set CMSDK_PSEQ_COUNT1_RADIO_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT1_RADIO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT2_RADIO [expr $CMSDK_PSEQ_BASE + 0x5c]
+set CMSDK_PSEQ_COUNT2_RADIO_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT2_RADIO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT3_RADIO [expr $CMSDK_PSEQ_BASE + 0x60]
+set CMSDK_PSEQ_COUNT3_RADIO_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT3_RADIO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT4_RADIO [expr $CMSDK_PSEQ_BASE + 0x64]
+set CMSDK_PSEQ_COUNT4_RADIO_CNT__RESET_VALUE 0x00000004
+set CMSDK_PSEQ_COUNT4_RADIO__RESET_VALUE 0x00000004
+set CMSDK_PSEQ_COUNT5_RADIO [expr $CMSDK_PSEQ_BASE + 0x68]
+set CMSDK_PSEQ_COUNT5_RADIO_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT5_RADIO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT6_RADIO [expr $CMSDK_PSEQ_BASE + 0x6c]
+set CMSDK_PSEQ_COUNT6_RADIO_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT6_RADIO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT7_RADIO [expr $CMSDK_PSEQ_BASE + 0x70]
+set CMSDK_PSEQ_COUNT7_RADIO_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT7_RADIO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT8_RADIO [expr $CMSDK_PSEQ_BASE + 0x74]
+set CMSDK_PSEQ_COUNT8_RADIO_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT8_RADIO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT9_RADIO [expr $CMSDK_PSEQ_BASE + 0x78]
+set CMSDK_PSEQ_COUNT9_RADIO_CNT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT9_RADIO_EM_BLOCK_WDATA__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT9_RADIO_EM_BLOCK_ADDR__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT9_RADIO_SPARE__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNT9_RADIO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_XTAL_BITS0 [expr $CMSDK_PSEQ_BASE + 0x7c]
+set CMSDK_PSEQ_XTAL_BITS0_XTALFREQ__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_XTAL_BITS0_XOCAPIN__RESET_VALUE 0x0000000d
+set CMSDK_PSEQ_XTAL_BITS0_XOCAPOUT__RESET_VALUE 0x0000000d
+set CMSDK_PSEQ_XTAL_BITS0__RESET_VALUE 0x0000035a
+set CMSDK_PSEQ_XTAL_BITS1 [expr $CMSDK_PSEQ_BASE + 0x80]
+set CMSDK_PSEQ_XTAL_BITS1_XOBIAS__RESET_VALUE 0x0000000c
+set CMSDK_PSEQ_XTAL_BITS1_XOAGC_EN__RESET_VALUE 0x00000001
+set CMSDK_PSEQ_XTAL_BITS1_XOFASTSTART__RESET_VALUE 0x00000007
+set CMSDK_PSEQ_XTAL_BITS1_XOSETTLE__RESET_VALUE 0x00000010
+set CMSDK_PSEQ_XTAL_BITS1_RCOSCFREQ__RESET_VALUE 0x0000000b
+set CMSDK_PSEQ_XTAL_BITS1_DOUBLERDCC_EN__RESET_VALUE 0x00000001
+set CMSDK_PSEQ_XTAL_BITS1_CLKHPC_EN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_XTAL_BITS1_CLKMPC_EN__RESET_VALUE 0x00000001
+set CMSDK_PSEQ_XTAL_BITS1_EXTCLK__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_XTAL_BITS1_XTAL_SPARE__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_XTAL_BITS1__RESET_VALUE 0x0016d0fc
+set CMSDK_PSEQ_OVERRIDES [expr $CMSDK_PSEQ_BASE + 0x84]
+set CMSDK_PSEQ_OVERRIDES_FORCE_PRECISION_REQ__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES_FORCE_PRECISION_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES_FORCE_OSC_ON_REQ__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES_BLOCK_BLE_OSC_ON_REQ__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES_BLOCK_BLE_HIGH_PRECISION_REQ__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2 [expr $CMSDK_PSEQ_BASE + 0x88]
+set CMSDK_PSEQ_OVERRIDES2_BLOCK_CACHE_PSD__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2_BLOCK_CACHE_VDDCUT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2_OVERRIDE_CACHE_PSD_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2_OVERRIDE_CACHE_PSD__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2_OVERRIDE_CACHE_RET_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2_OVERRIDE_CACHE_RET__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2_OVERRIDE_CACHE_NAP_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2_OVERRIDE_CACHE_NAP__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2_OVERRIDE_CACHE_ISO_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2_OVERRIDE_CACHE_ISO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2_OVERRIDE_CACHE_CLKEN_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2_OVERRIDE_CACHE_CLKEN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2_OVERRIDE_CACHE_VDDCUT_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2_OVERRIDE_CACHE_VDDCUT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2_BLOCK_SYSROM_VDDCUT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2_BLOCK_EFUSE_VDDCUT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES2__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES3 [expr $CMSDK_PSEQ_BASE + 0x8c]
+set CMSDK_PSEQ_OVERRIDES3_OVERRIDE_SYSROM_CLKEN_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES3_OVERRIDE_SYSROM_CLKEN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES3_OVERRIDE_SYSROM_ISO_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES3_OVERRIDE_SYSROM_ISO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES3_OVERRIDE_SYSROM_PSD_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES3_OVERRIDE_SYSROM_PSD__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES3__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4 [expr $CMSDK_PSEQ_BASE + 0x90]
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_BLE_CLKEN_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_BLE_CLKEN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_BLE_FRST_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_BLE_FRST__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_BLE_ISO_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_BLE_ISO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_BLE_KILL_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_BLE_KILL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_BLE_SLEEP_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_BLE_SLEEP__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_BLE_LOADB_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_BLE_LOADB__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_BLE_RETN_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_BLE_RETN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_PNR_CLKEN_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_PNR_CLKEN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_PNR_FRST_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_PNR_FRST__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_PNR_ISO_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_PNR_ISO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_PNR_KILL_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_PNR_KILL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_PNR_SLEEP_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_PNR_SLEEP__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_PNR_LOADB_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_PNR_LOADB__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_PNR_RETN_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_PNR_RETN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_EFUSE_ISO_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_EFUSE_ISO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_EFUSE_VDDCUT_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4_OVERRIDE_EFUSE_VDDCUT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES4__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5 [expr $CMSDK_PSEQ_BASE + 0x94]
+set CMSDK_PSEQ_OVERRIDES5_OVERRIDE_BLE_FRSTDP_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5_OVERRIDE_BLE_FRSTDP__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5_OVERRIDE_RADIO_ISO_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5_OVERRIDE_RADIO_ISO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5_OVERRIDE_WREQ_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5_OVERRIDE_WREQ__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5_OVERRIDE_RADIO_FRST_B_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5_OVERRIDE_RADIO_FRST_B__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5_OVERRIDE_CUTVDD_B_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5_OVERRIDE_CUTVDD_B__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5_OVERRIDE_RADIO_EN_O_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5_OVERRIDE_RADIO_EN_O__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5_OVERRIDE_RETV_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5_OVERRIDE_RETV__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5_OVERRIDE_XTAL_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5_OVERRIDE_XTAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_OVERRIDES5__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES [expr $CMSDK_PSEQ_BASE + 0x98]
+set CMSDK_PSEQ_SYSRAM_OVERRIDES_OVERRIDE_SYSRAM_VDDCUT_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES_OVERRIDE_SYSRAM_VDDCUT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES2 [expr $CMSDK_PSEQ_BASE + 0x9c]
+set CMSDK_PSEQ_SYSRAM_OVERRIDES2_OVERRIDE_SYSRAM_CLKEN_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES2_OVERRIDE_SYSRAM_CLKEN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES2__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES3 [expr $CMSDK_PSEQ_BASE + 0xa0]
+set CMSDK_PSEQ_SYSRAM_OVERRIDES3_OVERRIDE_SYSRAM_ISO_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES3_OVERRIDE_SYSRAM_ISO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES3__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES4 [expr $CMSDK_PSEQ_BASE + 0xa4]
+set CMSDK_PSEQ_SYSRAM_OVERRIDES4_OVERRIDE_SYSRAM_NAP_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES4_OVERRIDE_SYSRAM_NAP__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES4__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES5 [expr $CMSDK_PSEQ_BASE + 0xa8]
+set CMSDK_PSEQ_SYSRAM_OVERRIDES5_OVERRIDE_SYSRAM_RET_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES5_OVERRIDE_SYSRAM_RET__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES5__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES6 [expr $CMSDK_PSEQ_BASE + 0xac]
+set CMSDK_PSEQ_SYSRAM_OVERRIDES6_OVERRIDE_SYSRAM_PSD_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES6_OVERRIDE_SYSRAM_PSD__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES6__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES7 [expr $CMSDK_PSEQ_BASE + 0xb0]
+set CMSDK_PSEQ_SYSRAM_OVERRIDES7_BLOCK_SYSRAM_VDDCUT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES7__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES8 [expr $CMSDK_PSEQ_BASE + 0xb4]
+set CMSDK_PSEQ_SYSRAM_OVERRIDES8_BLOCK_SYSRAM_PSD__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_OVERRIDES8__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_CONF [expr $CMSDK_PSEQ_BASE + 0xb8]
+set CMSDK_PSEQ_SYSRAM_CONF_SYSRAM_HVT_EN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_CONF_SYSRAM_SVT_EN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_CONF_SW_OVERRIDE__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SYSRAM_CONF__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES [expr $CMSDK_PSEQ_BASE + 0xbc]
+set CMSDK_PSEQ_EMRAM_OVERRIDES_OVERRIDE_EMRAM_VDDCUT_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES_OVERRIDE_EMRAM_VDDCUT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES2 [expr $CMSDK_PSEQ_BASE + 0xc0]
+set CMSDK_PSEQ_EMRAM_OVERRIDES2_OVERRIDE_EMRAM_CLKEN_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES2_OVERRIDE_EMRAM_CLKEN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES2__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES3 [expr $CMSDK_PSEQ_BASE + 0xc4]
+set CMSDK_PSEQ_EMRAM_OVERRIDES3_OVERRIDE_EMRAM_ISO_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES3_OVERRIDE_EMRAM_ISO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES3__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES4 [expr $CMSDK_PSEQ_BASE + 0xc8]
+set CMSDK_PSEQ_EMRAM_OVERRIDES4_OVERRIDE_EMRAM_NAP_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES4_OVERRIDE_EMRAM_NAP__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES4__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES5 [expr $CMSDK_PSEQ_BASE + 0xcc]
+set CMSDK_PSEQ_EMRAM_OVERRIDES5_OVERRIDE_EMRAM_RET_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES5_OVERRIDE_EMRAM_RET__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES5__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES6 [expr $CMSDK_PSEQ_BASE + 0xd0]
+set CMSDK_PSEQ_EMRAM_OVERRIDES6_OVERRIDE_EMRAM_PSD_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES6_OVERRIDE_EMRAM_PSD__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES6__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES7 [expr $CMSDK_PSEQ_BASE + 0xd4]
+set CMSDK_PSEQ_EMRAM_OVERRIDES7_BLOCK_EMRAM_VDDCUT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES7__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES8 [expr $CMSDK_PSEQ_BASE + 0xd8]
+set CMSDK_PSEQ_EMRAM_OVERRIDES8_BLOCK_EMRAM_PSD__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_EMRAM_OVERRIDES8__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNTER_CONTROL [expr $CMSDK_PSEQ_BASE + 0xdc]
+set CMSDK_PSEQ_COUNTER_CONTROL_HALT_REAL_TIME_COUNTER__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNTER_CONTROL_LOAD_COUNT_DOWN_TIMER__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_COUNTER_CONTROL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CURRENT_REAL_TIME [expr $CMSDK_PSEQ_BASE + 0xe0]
+set CMSDK_PSEQ_CURRENT_REAL_TIME_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CURRENT_REAL_TIME__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CURRENT_COUNT_DOWN_TIME [expr $CMSDK_PSEQ_BASE + 0xe4]
+set CMSDK_PSEQ_CURRENT_COUNT_DOWN_TIME_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CURRENT_COUNT_DOWN_TIME__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_INIT_COUNT_DOWN [expr $CMSDK_PSEQ_BASE + 0xe8]
+set CMSDK_PSEQ_INIT_COUNT_DOWN_VAL__RESET_VALUE 0x00000fff
+set CMSDK_PSEQ_INIT_COUNT_DOWN__RESET_VALUE 0x00000fff
+set CMSDK_PSEQ_INST_PENDING [expr $CMSDK_PSEQ_BASE + 0xec]
+set CMSDK_PSEQ_INST_PENDING_CNTDWN_TIMER_LOAD__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_INST_PENDING__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_STATUS [expr $CMSDK_PSEQ_BASE + 0xf0]
+set CMSDK_PSEQ_STATUS_IN_ACTIVE_STATE__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_STATUS_IN_CPU_ACTIVE_STATE__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_STATUS_IN_HIBERNATE_STATE__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_STATUS_TIMER_TRIGGERED__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_STATUS_GPIO_TRIGGERED__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_STATUS_WURX0_TRIGGERED__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_STATUS_WURX1_TRIGGERED__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_STATUS_QDEC_TRIGGERED__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_STATUS_KSM_TRIGGERED__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_STATUS_DBG_TRIGGERED__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_STATUS_SHUB_TRIGGERED__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_STATUS__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_PERSISTENT0 [expr $CMSDK_PSEQ_BASE + 0xf4]
+set CMSDK_PSEQ_PERSISTENT0_DATA__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_PERSISTENT0__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SENSOR_HUB_CONTROL [expr $CMSDK_PSEQ_BASE + 0xf8]
+set CMSDK_PSEQ_SENSOR_HUB_CONTROL_ENABLE_FUNC__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SENSOR_HUB_CONTROL_SHUB_RESET__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SENSOR_HUB_CONTROL_SHUB_RUNNING_VAL__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SENSOR_HUB_CONTROL_SHUB_RUNNING_OVRD__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SENSOR_HUB_CONTROL_SHUB_CLKEN__RESET_VALUE 0x00000001
+set CMSDK_PSEQ_SENSOR_HUB_CONTROL_SHUB_ISO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SENSOR_HUB_CONTROL_SHUB_VDDCUT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_SENSOR_HUB_CONTROL__RESET_VALUE 0x00000010
+set CMSDK_PSEQ_KSMQDEC_CONTROL [expr $CMSDK_PSEQ_BASE + 0xfc]
+set CMSDK_PSEQ_KSMQDEC_CONTROL_KSMQDEC_CLKEN__RESET_VALUE 0x00000001
+set CMSDK_PSEQ_KSMQDEC_CONTROL_KSMQDEC_FRST__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_KSMQDEC_CONTROL_KSMQDEC_ISO__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_KSMQDEC_CONTROL_KSMQDEC_VDDCUT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_KSMQDEC_CONTROL__RESET_VALUE 0x00000001
+set CMSDK_PSEQ_PMU_STATUS [expr $CMSDK_PSEQ_BASE + 0x100]
+set CMSDK_PSEQ_PMU_STATUS_ENERGY4CPU__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_PMU_STATUS_ENERGY4TX__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_PMU_STATUS_ENDOFLIFE__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_PMU_STATUS_BROWNOUT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_PMU_STATUS_SOC_OFF_WKUP_DET__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_PMU_STATUS__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_FLASH_CONTROL [expr $CMSDK_PSEQ_BASE + 0x104]
+set CMSDK_PSEQ_FLASH_CONTROL_POWER_CYCLE_EN__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_FLASH_CONTROL_RPD_HAS_CLOCK__RESET_VALUE 0x00000001
+set CMSDK_PSEQ_FLASH_CONTROL_MODE__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_FLASH_CONTROL_OPCODE__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_FLASH_CONTROL__RESET_VALUE 0x00000002
+set CMSDK_PSEQ_PMU_INTERRUPT [expr $CMSDK_PSEQ_BASE + 0x108]
+set CMSDK_PSEQ_PMU_INTERRUPT_INTMASK__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_PMU_INTERRUPT_CLEAR_RE_INDICATOR__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_PMU_INTERRUPT_CLEAR_FE_INDICATOR__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_PMU_INTERRUPT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_INTERRUPT_STATUS [expr $CMSDK_PSEQ_BASE + 0x10c]
+set CMSDK_PSEQ_INTERRUPT_STATUS_RETURNED_FROM_LOW_POWER_STATE__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_INTERRUPT_STATUS__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_INTERRUPT_MASK [expr $CMSDK_PSEQ_BASE + 0x110]
+set CMSDK_PSEQ_INTERRUPT_MASK_INTRPT_MASK__RESET_VALUE 0x00000001
+set CMSDK_PSEQ_INTERRUPT_MASK__RESET_VALUE 0x00000001
+set CMSDK_PSEQ_RESET_INTERRUPT [expr $CMSDK_PSEQ_BASE + 0x114]
+set CMSDK_PSEQ_RESET_INTERRUPT_INTRPT_RESET__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_RESET_INTERRUPT__RESET_VALUE 0x00000000
+set CMSDK_PSEQ_CORE_ID [expr $CMSDK_PSEQ_BASE + 0xffc]
+set CMSDK_PSEQ_CORE_ID_ID__RESET_VALUE 0x50534551
+set CMSDK_PSEQ_CORE_ID__RESET_VALUE 0x50534551
diff --git a/platform/atm2/ATM22xx-x1x/openocd/regs/qspi.tcl b/platform/atm2/ATM22xx-x1x/openocd/regs/qspi.tcl
new file mode 100644
index 0000000..46ab80c
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/regs/qspi.tcl
@@ -0,0 +1,87 @@
+set CMSDK_QSPI_BASE           0x4000f000
+set CMSDK_QSPI_TRANSACTION_SETUP [expr $CMSDK_QSPI_BASE + 0x0]
+set CMSDK_QSPI_TRANSACTION_SETUP_SAMPLE_DIN__RESET_VALUE 0x00000000
+set CMSDK_QSPI_TRANSACTION_SETUP_DOUT_0_CTRL__RESET_VALUE 0x00000000
+set CMSDK_QSPI_TRANSACTION_SETUP_DOUT_1_CTRL__RESET_VALUE 0x00000000
+set CMSDK_QSPI_TRANSACTION_SETUP_DOUT_2_CTRL__RESET_VALUE 0x00000000
+set CMSDK_QSPI_TRANSACTION_SETUP_DOUT_3_CTRL__RESET_VALUE 0x00000000
+set CMSDK_QSPI_TRANSACTION_SETUP_CLK_VAL__RESET_VALUE 0x00000000
+set CMSDK_QSPI_TRANSACTION_SETUP_CSN_VAL__RESET_VALUE 0x00000001
+set CMSDK_QSPI_TRANSACTION_SETUP_REMOTE_AHB_QSPI_HAS_CONTROL__RESET_VALUE 0x00000000
+set CMSDK_QSPI_TRANSACTION_SETUP_REMOTE_SPI_HAS_CONTROL__RESET_VALUE 0x00000001
+set CMSDK_QSPI_TRANSACTION_SETUP__RESET_VALUE 0x22000000
+set CMSDK_QSPI_READ_DATA [expr $CMSDK_QSPI_BASE + 0x4]
+set CMSDK_QSPI_READ_DATA_RDATA__RESET_VALUE 0x00000000
+set CMSDK_QSPI_READ_DATA__RESET_VALUE 0x00000000
+set CMSDK_QSPI_OVERRIDE_DIN [expr $CMSDK_QSPI_BASE + 0x8]
+set CMSDK_QSPI_OVERRIDE_DIN_DIN_OVERRIDE_VAL__RESET_VALUE 0x00000000
+set CMSDK_QSPI_OVERRIDE_DIN_OVERRIDE_DIN__RESET_VALUE 0x00000000
+set CMSDK_QSPI_OVERRIDE_DIN__RESET_VALUE 0x00000000
+set CMSDK_QSPI_MODE [expr $CMSDK_QSPI_BASE + 0xc]
+set CMSDK_QSPI_MODE_IS_DUAL__RESET_VALUE 0x00000000
+set CMSDK_QSPI_MODE_IS_QUAD__RESET_VALUE 0x00000001
+set CMSDK_QSPI_MODE__RESET_VALUE 0x00000002
+set CMSDK_QSPI_REMOTE_AHB_SETUP [expr $CMSDK_QSPI_BASE + 0x10]
+set CMSDK_QSPI_REMOTE_AHB_SETUP_DUMMY_CYCLES__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_MODE__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_IS_OPCODE__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_OPCODE__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_CLKDIVSEL__RESET_VALUE 0x00000003
+set CMSDK_QSPI_REMOTE_AHB_SETUP_RDATA_BYTE_SWAP__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_IS_MACRONIX__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_WDATA_BYTE_SWAP__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_WDATA_HALFWORD_SWAP__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_WDATA_WORD_SWAP__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_ENABLE_CLOCKS__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_ENABLE_CACHE__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_ENABLE_FINE_CLOCK_GATING__RESET_VALUE 0x00000001
+set CMSDK_QSPI_REMOTE_AHB_SETUP_INVALIDATE_ENTIRE_CACHE__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_SERIALIZE_PP_ADDRESS__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_SKEW_CSN_ACT_WEN__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_HYPER__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_SLIP_HALF_CYCLE__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP__RESET_VALUE 0x02030000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_2 [expr $CMSDK_QSPI_BASE + 0x14]
+set CMSDK_QSPI_REMOTE_AHB_SETUP_2_OPCODE_WE__RESET_VALUE 0x00000006
+set CMSDK_QSPI_REMOTE_AHB_SETUP_2_OPCODE_PP__RESET_VALUE 0x00000002
+set CMSDK_QSPI_REMOTE_AHB_SETUP_2_OPCODE_WIP__RESET_VALUE 0x00000005
+set CMSDK_QSPI_REMOTE_AHB_SETUP_2_OPCODE_SE__RESET_VALUE 0x00000020
+set CMSDK_QSPI_REMOTE_AHB_SETUP_2__RESET_VALUE 0x20050206
+set CMSDK_QSPI_REMOTE_AHB_SETUP_3 [expr $CMSDK_QSPI_BASE + 0x18]
+set CMSDK_QSPI_REMOTE_AHB_SETUP_3_ENABLE_PERFORMANCE_MODE__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_3_EXPM__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_3_WLE_POLARITY__RESET_VALUE 0x00000001
+set CMSDK_QSPI_REMOTE_AHB_SETUP_3_WLE_BIT__RESET_VALUE 0x00000001
+set CMSDK_QSPI_REMOTE_AHB_SETUP_3_WIP_POLARITY__RESET_VALUE 0x00000001
+set CMSDK_QSPI_REMOTE_AHB_SETUP_3_WIP_BIT__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_3_CHECK_WLE__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_3__RESET_VALUE 0x01300000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_4 [expr $CMSDK_QSPI_BASE + 0x1c]
+set CMSDK_QSPI_REMOTE_AHB_SETUP_4_INVERT_ADDR__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_4__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_SETUP_5 [expr $CMSDK_QSPI_BASE + 0x20]
+set CMSDK_QSPI_REMOTE_AHB_SETUP_5_PP_STALL_WIP__RESET_VALUE 0x00000200
+set CMSDK_QSPI_REMOTE_AHB_SETUP_5_STALL_WLE__RESET_VALUE 0x00000020
+set CMSDK_QSPI_REMOTE_AHB_SETUP_5_STALL_WE2PP__RESET_VALUE 0x00000020
+set CMSDK_QSPI_REMOTE_AHB_SETUP_5__RESET_VALUE 0x02008200
+set CMSDK_QSPI_REMOTE_AHB_SETUP_6 [expr $CMSDK_QSPI_BASE + 0x24]
+set CMSDK_QSPI_REMOTE_AHB_SETUP_6_SE_STALL_WIP__RESET_VALUE 0x00001fff
+set CMSDK_QSPI_REMOTE_AHB_SETUP_6__RESET_VALUE 0x00001fff
+set CMSDK_QSPI_REMOTE_AHB_WLE_CNT [expr $CMSDK_QSPI_BASE + 0x28]
+set CMSDK_QSPI_REMOTE_AHB_WLE_CNT_WLE_CNT__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_WLE_CNT__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_WIP_CNT [expr $CMSDK_QSPI_BASE + 0x2c]
+set CMSDK_QSPI_REMOTE_AHB_WIP_CNT_WIP_CNT__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_WIP_CNT__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_DBG0 [expr $CMSDK_QSPI_BASE + 0x30]
+set CMSDK_QSPI_REMOTE_AHB_DBG0_DBG0__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_DBG0__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_DBG1 [expr $CMSDK_QSPI_BASE + 0x34]
+set CMSDK_QSPI_REMOTE_AHB_DBG1_DBG1__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_DBG1__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_DBG2 [expr $CMSDK_QSPI_BASE + 0x38]
+set CMSDK_QSPI_REMOTE_AHB_DBG2_DBG2__RESET_VALUE 0x00000000
+set CMSDK_QSPI_REMOTE_AHB_DBG2__RESET_VALUE 0x00000000
+set CMSDK_QSPI_CORE_ID [expr $CMSDK_QSPI_BASE + 0xffc]
+set CMSDK_QSPI_CORE_ID_ID__RESET_VALUE 0x51535049
+set CMSDK_QSPI_CORE_ID__RESET_VALUE 0x51535049
diff --git a/platform/atm2/ATM22xx-x1x/openocd/regs/radio.tcl b/platform/atm2/ATM22xx-x1x/openocd/regs/radio.tcl
new file mode 100644
index 0000000..901a45e
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/regs/radio.tcl
@@ -0,0 +1,43 @@
+set CMSDK_RADIO_BASE          0x50005000
+set CMSDK_RADIO_TRANSACTION_SETUP [expr $CMSDK_RADIO_BASE + 0x0]
+set CMSDK_RADIO_TRANSACTION_SETUP_START__RESET_VALUE 0x00000000
+set CMSDK_RADIO_TRANSACTION_SETUP_NUM_DATA_BYTES__RESET_VALUE 0x00000000
+set CMSDK_RADIO_TRANSACTION_SETUP_RWB__RESET_VALUE 0x00000000
+set CMSDK_RADIO_TRANSACTION_SETUP_CLKDIV__RESET_VALUE 0x00000000
+set CMSDK_RADIO_TRANSACTION_SETUP_OPCODE__RESET_VALUE 0x00000000
+set CMSDK_RADIO_TRANSACTION_SETUP_LOOPBACK__RESET_VALUE 0x00000000
+set CMSDK_RADIO_TRANSACTION_SETUP_CSN_STAYS_LOW__RESET_VALUE 0x00000000
+set CMSDK_RADIO_TRANSACTION_SETUP_DUMMY_CYCLES__RESET_VALUE 0x00000000
+set CMSDK_RADIO_TRANSACTION_SETUP__RESET_VALUE 0x00000000
+set CMSDK_RADIO_TRANSACTION_STATUS [expr $CMSDK_RADIO_BASE + 0x4]
+set CMSDK_RADIO_TRANSACTION_STATUS_DONE__RESET_VALUE 0x00000000
+set CMSDK_RADIO_TRANSACTION_STATUS_RUNNING__RESET_VALUE 0x00000000
+set CMSDK_RADIO_TRANSACTION_STATUS_OPCODE_STATUS__RESET_VALUE 0x00000000
+set CMSDK_RADIO_TRANSACTION_STATUS__RESET_VALUE 0x00000000
+set CMSDK_RADIO_DATA_BYTES_LOWER [expr $CMSDK_RADIO_BASE + 0x8]
+set CMSDK_RADIO_DATA_BYTES_LOWER_BYTE0__RESET_VALUE 0x00000000
+set CMSDK_RADIO_DATA_BYTES_LOWER_BYTE1__RESET_VALUE 0x00000000
+set CMSDK_RADIO_DATA_BYTES_LOWER_BYTE2__RESET_VALUE 0x00000000
+set CMSDK_RADIO_DATA_BYTES_LOWER_BYTE3__RESET_VALUE 0x00000000
+set CMSDK_RADIO_DATA_BYTES_LOWER__RESET_VALUE 0x00000000
+set CMSDK_RADIO_DATA_BYTES_UPPER [expr $CMSDK_RADIO_BASE + 0xc]
+set CMSDK_RADIO_DATA_BYTES_UPPER_BYTE4__RESET_VALUE 0x00000000
+set CMSDK_RADIO_DATA_BYTES_UPPER_BYTE5__RESET_VALUE 0x00000000
+set CMSDK_RADIO_DATA_BYTES_UPPER_BYTE6__RESET_VALUE 0x00000000
+set CMSDK_RADIO_DATA_BYTES_UPPER_BYTE7__RESET_VALUE 0x00000000
+set CMSDK_RADIO_DATA_BYTES_UPPER__RESET_VALUE 0x00000000
+set CMSDK_RADIO_INTERRUPT_MASK [expr $CMSDK_RADIO_BASE + 0x10]
+set CMSDK_RADIO_INTERRUPT_MASK_PASSTHRU0__RESET_VALUE 0x00000000
+set CMSDK_RADIO_INTERRUPT_MASK__RESET_VALUE 0x00000000
+set CMSDK_RADIO_INTERRUPT_STATUS [expr $CMSDK_RADIO_BASE + 0x14]
+set CMSDK_RADIO_INTERRUPT_STATUS_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_RADIO_INTERRUPT_STATUS__RESET_VALUE 0x00000000
+set CMSDK_RADIO_SET_INTERRUPT [expr $CMSDK_RADIO_BASE + 0x18]
+set CMSDK_RADIO_SET_INTERRUPT_SET_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_RADIO_SET_INTERRUPT__RESET_VALUE 0x00000000
+set CMSDK_RADIO_RESET_INTERRUPT [expr $CMSDK_RADIO_BASE + 0x1c]
+set CMSDK_RADIO_RESET_INTERRUPT_RESET_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_RADIO_RESET_INTERRUPT__RESET_VALUE 0x00000000
+set CMSDK_RADIO_CORE_ID [expr $CMSDK_RADIO_BASE + 0xffc]
+set CMSDK_RADIO_CORE_ID_ID__RESET_VALUE 0x53504920
+set CMSDK_RADIO_CORE_ID__RESET_VALUE 0x53504920
diff --git a/platform/atm2/ATM22xx-x1x/openocd/regs/regs_for_program.tcl b/platform/atm2/ATM22xx-x1x/openocd/regs/regs_for_program.tcl
new file mode 100644
index 0000000..7ef8b30
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/regs/regs_for_program.tcl
@@ -0,0 +1,10 @@
+source [find regs/spi0.tcl]
+source [find regs/spi1.tcl]
+source [find regs/spi2.tcl]
+source [find regs/radio.tcl]
+source [find regs/pmu.tcl]
+source [find regs/wrpr.tcl]
+source [find regs/wrpr1.tcl]
+source [find regs/nvm.tcl]
+source [find regs/qspi.tcl]
+source [find regs/pseq.tcl]
diff --git a/platform/atm2/ATM22xx-x1x/openocd/regs/spi0.tcl b/platform/atm2/ATM22xx-x1x/openocd/regs/spi0.tcl
new file mode 100644
index 0000000..7e9efa7
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/regs/spi0.tcl
@@ -0,0 +1,43 @@
+set CMSDK_SPI0_BASE           0x40007000
+set CMSDK_SPI0_TRANSACTION_SETUP [expr $CMSDK_SPI0_BASE + 0x0]
+set CMSDK_SPI0_TRANSACTION_SETUP_START__RESET_VALUE 0x00000000
+set CMSDK_SPI0_TRANSACTION_SETUP_NUM_DATA_BYTES__RESET_VALUE 0x00000000
+set CMSDK_SPI0_TRANSACTION_SETUP_RWB__RESET_VALUE 0x00000000
+set CMSDK_SPI0_TRANSACTION_SETUP_CLKDIV__RESET_VALUE 0x00000000
+set CMSDK_SPI0_TRANSACTION_SETUP_OPCODE__RESET_VALUE 0x00000000
+set CMSDK_SPI0_TRANSACTION_SETUP_LOOPBACK__RESET_VALUE 0x00000000
+set CMSDK_SPI0_TRANSACTION_SETUP_CSN_STAYS_LOW__RESET_VALUE 0x00000000
+set CMSDK_SPI0_TRANSACTION_SETUP_DUMMY_CYCLES__RESET_VALUE 0x00000000
+set CMSDK_SPI0_TRANSACTION_SETUP__RESET_VALUE 0x00000000
+set CMSDK_SPI0_TRANSACTION_STATUS [expr $CMSDK_SPI0_BASE + 0x4]
+set CMSDK_SPI0_TRANSACTION_STATUS_DONE__RESET_VALUE 0x00000000
+set CMSDK_SPI0_TRANSACTION_STATUS_RUNNING__RESET_VALUE 0x00000000
+set CMSDK_SPI0_TRANSACTION_STATUS_OPCODE_STATUS__RESET_VALUE 0x00000000
+set CMSDK_SPI0_TRANSACTION_STATUS__RESET_VALUE 0x00000000
+set CMSDK_SPI0_DATA_BYTES_LOWER [expr $CMSDK_SPI0_BASE + 0x8]
+set CMSDK_SPI0_DATA_BYTES_LOWER_BYTE0__RESET_VALUE 0x00000000
+set CMSDK_SPI0_DATA_BYTES_LOWER_BYTE1__RESET_VALUE 0x00000000
+set CMSDK_SPI0_DATA_BYTES_LOWER_BYTE2__RESET_VALUE 0x00000000
+set CMSDK_SPI0_DATA_BYTES_LOWER_BYTE3__RESET_VALUE 0x00000000
+set CMSDK_SPI0_DATA_BYTES_LOWER__RESET_VALUE 0x00000000
+set CMSDK_SPI0_DATA_BYTES_UPPER [expr $CMSDK_SPI0_BASE + 0xc]
+set CMSDK_SPI0_DATA_BYTES_UPPER_BYTE4__RESET_VALUE 0x00000000
+set CMSDK_SPI0_DATA_BYTES_UPPER_BYTE5__RESET_VALUE 0x00000000
+set CMSDK_SPI0_DATA_BYTES_UPPER_BYTE6__RESET_VALUE 0x00000000
+set CMSDK_SPI0_DATA_BYTES_UPPER_BYTE7__RESET_VALUE 0x00000000
+set CMSDK_SPI0_DATA_BYTES_UPPER__RESET_VALUE 0x00000000
+set CMSDK_SPI0_INTERRUPT_MASK [expr $CMSDK_SPI0_BASE + 0x10]
+set CMSDK_SPI0_INTERRUPT_MASK_PASSTHRU0__RESET_VALUE 0x00000000
+set CMSDK_SPI0_INTERRUPT_MASK__RESET_VALUE 0x00000000
+set CMSDK_SPI0_INTERRUPT_STATUS [expr $CMSDK_SPI0_BASE + 0x14]
+set CMSDK_SPI0_INTERRUPT_STATUS_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_SPI0_INTERRUPT_STATUS__RESET_VALUE 0x00000000
+set CMSDK_SPI0_SET_INTERRUPT [expr $CMSDK_SPI0_BASE + 0x18]
+set CMSDK_SPI0_SET_INTERRUPT_SET_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_SPI0_SET_INTERRUPT__RESET_VALUE 0x00000000
+set CMSDK_SPI0_RESET_INTERRUPT [expr $CMSDK_SPI0_BASE + 0x1c]
+set CMSDK_SPI0_RESET_INTERRUPT_RESET_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_SPI0_RESET_INTERRUPT__RESET_VALUE 0x00000000
+set CMSDK_SPI0_CORE_ID [expr $CMSDK_SPI0_BASE + 0xffc]
+set CMSDK_SPI0_CORE_ID_ID__RESET_VALUE 0x53504920
+set CMSDK_SPI0_CORE_ID__RESET_VALUE 0x53504920
diff --git a/platform/atm2/ATM22xx-x1x/openocd/regs/spi1.tcl b/platform/atm2/ATM22xx-x1x/openocd/regs/spi1.tcl
new file mode 100644
index 0000000..d5b161a
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/regs/spi1.tcl
@@ -0,0 +1,43 @@
+set CMSDK_SPI1_BASE           0x4000d000
+set CMSDK_SPI1_TRANSACTION_SETUP [expr $CMSDK_SPI1_BASE + 0x0]
+set CMSDK_SPI1_TRANSACTION_SETUP_START__RESET_VALUE 0x00000000
+set CMSDK_SPI1_TRANSACTION_SETUP_NUM_DATA_BYTES__RESET_VALUE 0x00000000
+set CMSDK_SPI1_TRANSACTION_SETUP_RWB__RESET_VALUE 0x00000000
+set CMSDK_SPI1_TRANSACTION_SETUP_CLKDIV__RESET_VALUE 0x00000000
+set CMSDK_SPI1_TRANSACTION_SETUP_OPCODE__RESET_VALUE 0x00000000
+set CMSDK_SPI1_TRANSACTION_SETUP_LOOPBACK__RESET_VALUE 0x00000000
+set CMSDK_SPI1_TRANSACTION_SETUP_CSN_STAYS_LOW__RESET_VALUE 0x00000000
+set CMSDK_SPI1_TRANSACTION_SETUP_DUMMY_CYCLES__RESET_VALUE 0x00000000
+set CMSDK_SPI1_TRANSACTION_SETUP__RESET_VALUE 0x00000000
+set CMSDK_SPI1_TRANSACTION_STATUS [expr $CMSDK_SPI1_BASE + 0x4]
+set CMSDK_SPI1_TRANSACTION_STATUS_DONE__RESET_VALUE 0x00000000
+set CMSDK_SPI1_TRANSACTION_STATUS_RUNNING__RESET_VALUE 0x00000000
+set CMSDK_SPI1_TRANSACTION_STATUS_OPCODE_STATUS__RESET_VALUE 0x00000000
+set CMSDK_SPI1_TRANSACTION_STATUS__RESET_VALUE 0x00000000
+set CMSDK_SPI1_DATA_BYTES_LOWER [expr $CMSDK_SPI1_BASE + 0x8]
+set CMSDK_SPI1_DATA_BYTES_LOWER_BYTE0__RESET_VALUE 0x00000000
+set CMSDK_SPI1_DATA_BYTES_LOWER_BYTE1__RESET_VALUE 0x00000000
+set CMSDK_SPI1_DATA_BYTES_LOWER_BYTE2__RESET_VALUE 0x00000000
+set CMSDK_SPI1_DATA_BYTES_LOWER_BYTE3__RESET_VALUE 0x00000000
+set CMSDK_SPI1_DATA_BYTES_LOWER__RESET_VALUE 0x00000000
+set CMSDK_SPI1_DATA_BYTES_UPPER [expr $CMSDK_SPI1_BASE + 0xc]
+set CMSDK_SPI1_DATA_BYTES_UPPER_BYTE4__RESET_VALUE 0x00000000
+set CMSDK_SPI1_DATA_BYTES_UPPER_BYTE5__RESET_VALUE 0x00000000
+set CMSDK_SPI1_DATA_BYTES_UPPER_BYTE6__RESET_VALUE 0x00000000
+set CMSDK_SPI1_DATA_BYTES_UPPER_BYTE7__RESET_VALUE 0x00000000
+set CMSDK_SPI1_DATA_BYTES_UPPER__RESET_VALUE 0x00000000
+set CMSDK_SPI1_INTERRUPT_MASK [expr $CMSDK_SPI1_BASE + 0x10]
+set CMSDK_SPI1_INTERRUPT_MASK_PASSTHRU0__RESET_VALUE 0x00000000
+set CMSDK_SPI1_INTERRUPT_MASK__RESET_VALUE 0x00000000
+set CMSDK_SPI1_INTERRUPT_STATUS [expr $CMSDK_SPI1_BASE + 0x14]
+set CMSDK_SPI1_INTERRUPT_STATUS_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_SPI1_INTERRUPT_STATUS__RESET_VALUE 0x00000000
+set CMSDK_SPI1_SET_INTERRUPT [expr $CMSDK_SPI1_BASE + 0x18]
+set CMSDK_SPI1_SET_INTERRUPT_SET_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_SPI1_SET_INTERRUPT__RESET_VALUE 0x00000000
+set CMSDK_SPI1_RESET_INTERRUPT [expr $CMSDK_SPI1_BASE + 0x1c]
+set CMSDK_SPI1_RESET_INTERRUPT_RESET_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_SPI1_RESET_INTERRUPT__RESET_VALUE 0x00000000
+set CMSDK_SPI1_CORE_ID [expr $CMSDK_SPI1_BASE + 0xffc]
+set CMSDK_SPI1_CORE_ID_ID__RESET_VALUE 0x53504920
+set CMSDK_SPI1_CORE_ID__RESET_VALUE 0x53504920
diff --git a/platform/atm2/ATM22xx-x1x/openocd/regs/spi2.tcl b/platform/atm2/ATM22xx-x1x/openocd/regs/spi2.tcl
new file mode 100644
index 0000000..e341c6e
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/regs/spi2.tcl
@@ -0,0 +1,43 @@
+set CMSDK_SPI2_BASE           0x4000b000
+set CMSDK_SPI2_TRANSACTION_SETUP [expr $CMSDK_SPI2_BASE + 0x0]
+set CMSDK_SPI2_TRANSACTION_SETUP_START__RESET_VALUE 0x00000000
+set CMSDK_SPI2_TRANSACTION_SETUP_NUM_DATA_BYTES__RESET_VALUE 0x00000000
+set CMSDK_SPI2_TRANSACTION_SETUP_RWB__RESET_VALUE 0x00000000
+set CMSDK_SPI2_TRANSACTION_SETUP_CLKDIV__RESET_VALUE 0x00000000
+set CMSDK_SPI2_TRANSACTION_SETUP_OPCODE__RESET_VALUE 0x00000000
+set CMSDK_SPI2_TRANSACTION_SETUP_LOOPBACK__RESET_VALUE 0x00000000
+set CMSDK_SPI2_TRANSACTION_SETUP_CSN_STAYS_LOW__RESET_VALUE 0x00000000
+set CMSDK_SPI2_TRANSACTION_SETUP_DUMMY_CYCLES__RESET_VALUE 0x00000000
+set CMSDK_SPI2_TRANSACTION_SETUP__RESET_VALUE 0x00000000
+set CMSDK_SPI2_TRANSACTION_STATUS [expr $CMSDK_SPI2_BASE + 0x4]
+set CMSDK_SPI2_TRANSACTION_STATUS_DONE__RESET_VALUE 0x00000000
+set CMSDK_SPI2_TRANSACTION_STATUS_RUNNING__RESET_VALUE 0x00000000
+set CMSDK_SPI2_TRANSACTION_STATUS_OPCODE_STATUS__RESET_VALUE 0x00000000
+set CMSDK_SPI2_TRANSACTION_STATUS__RESET_VALUE 0x00000000
+set CMSDK_SPI2_DATA_BYTES_LOWER [expr $CMSDK_SPI2_BASE + 0x8]
+set CMSDK_SPI2_DATA_BYTES_LOWER_BYTE0__RESET_VALUE 0x00000000
+set CMSDK_SPI2_DATA_BYTES_LOWER_BYTE1__RESET_VALUE 0x00000000
+set CMSDK_SPI2_DATA_BYTES_LOWER_BYTE2__RESET_VALUE 0x00000000
+set CMSDK_SPI2_DATA_BYTES_LOWER_BYTE3__RESET_VALUE 0x00000000
+set CMSDK_SPI2_DATA_BYTES_LOWER__RESET_VALUE 0x00000000
+set CMSDK_SPI2_DATA_BYTES_UPPER [expr $CMSDK_SPI2_BASE + 0xc]
+set CMSDK_SPI2_DATA_BYTES_UPPER_BYTE4__RESET_VALUE 0x00000000
+set CMSDK_SPI2_DATA_BYTES_UPPER_BYTE5__RESET_VALUE 0x00000000
+set CMSDK_SPI2_DATA_BYTES_UPPER_BYTE6__RESET_VALUE 0x00000000
+set CMSDK_SPI2_DATA_BYTES_UPPER_BYTE7__RESET_VALUE 0x00000000
+set CMSDK_SPI2_DATA_BYTES_UPPER__RESET_VALUE 0x00000000
+set CMSDK_SPI2_INTERRUPT_MASK [expr $CMSDK_SPI2_BASE + 0x10]
+set CMSDK_SPI2_INTERRUPT_MASK_PASSTHRU0__RESET_VALUE 0x00000000
+set CMSDK_SPI2_INTERRUPT_MASK__RESET_VALUE 0x00000000
+set CMSDK_SPI2_INTERRUPT_STATUS [expr $CMSDK_SPI2_BASE + 0x14]
+set CMSDK_SPI2_INTERRUPT_STATUS_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_SPI2_INTERRUPT_STATUS__RESET_VALUE 0x00000000
+set CMSDK_SPI2_SET_INTERRUPT [expr $CMSDK_SPI2_BASE + 0x18]
+set CMSDK_SPI2_SET_INTERRUPT_SET_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_SPI2_SET_INTERRUPT__RESET_VALUE 0x00000000
+set CMSDK_SPI2_RESET_INTERRUPT [expr $CMSDK_SPI2_BASE + 0x1c]
+set CMSDK_SPI2_RESET_INTERRUPT_RESET_INTERRUPT0__RESET_VALUE 0x00000000
+set CMSDK_SPI2_RESET_INTERRUPT__RESET_VALUE 0x00000000
+set CMSDK_SPI2_CORE_ID [expr $CMSDK_SPI2_BASE + 0xffc]
+set CMSDK_SPI2_CORE_ID_ID__RESET_VALUE 0x53504920
+set CMSDK_SPI2_CORE_ID__RESET_VALUE 0x53504920
diff --git a/platform/atm2/ATM22xx-x1x/openocd/regs/wrpr.tcl b/platform/atm2/ATM22xx-x1x/openocd/regs/wrpr.tcl
new file mode 100644
index 0000000..bf4062b
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/regs/wrpr.tcl
@@ -0,0 +1,256 @@
+set CMSDK_WRPR_BASE           0x40003000
+set CMSDK_WRPR_APB0_CTRL [expr $CMSDK_WRPR_BASE + 0x0]
+set CMSDK_WRPR_APB0_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR_APB0_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR_APB0_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR_APB1_CTRL [expr $CMSDK_WRPR_BASE + 0x4]
+set CMSDK_WRPR_APB1_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR_APB1_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR_APB1_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR_APB2_CTRL [expr $CMSDK_WRPR_BASE + 0x8]
+set CMSDK_WRPR_APB2_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR_APB2_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR_APB2_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR_APB3_CTRL [expr $CMSDK_WRPR_BASE + 0xc]
+set CMSDK_WRPR_APB3_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR_APB3_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR_APB3_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR_APB4_CTRL [expr $CMSDK_WRPR_BASE + 0x10]
+set CMSDK_WRPR_APB4_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR_APB4_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR_APB4_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR_APB5_CTRL [expr $CMSDK_WRPR_BASE + 0x14]
+set CMSDK_WRPR_APB5_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR_APB5_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR_APB5_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR_APB6_CTRL [expr $CMSDK_WRPR_BASE + 0x18]
+set CMSDK_WRPR_APB6_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR_APB6_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR_APB6_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR_APB7_CTRL [expr $CMSDK_WRPR_BASE + 0x1c]
+set CMSDK_WRPR_APB7_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR_APB7_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR_APB7_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR_APB8_CTRL [expr $CMSDK_WRPR_BASE + 0x20]
+set CMSDK_WRPR_APB8_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR_APB8_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR_APB8_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR_APB9_CTRL [expr $CMSDK_WRPR_BASE + 0x24]
+set CMSDK_WRPR_APB9_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR_APB9_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR_APB9_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR_APB10_CTRL [expr $CMSDK_WRPR_BASE + 0x28]
+set CMSDK_WRPR_APB10_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR_APB10_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR_APB10_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR_APB11_CTRL [expr $CMSDK_WRPR_BASE + 0x2c]
+set CMSDK_WRPR_APB11_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR_APB11_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR_APB11_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR_APB12_CTRL [expr $CMSDK_WRPR_BASE + 0x30]
+set CMSDK_WRPR_APB12_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR_APB12_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR_APB12_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR_APB13_CTRL [expr $CMSDK_WRPR_BASE + 0x34]
+set CMSDK_WRPR_APB13_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR_APB13_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR_APB13_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR_APB14_CTRL [expr $CMSDK_WRPR_BASE + 0x38]
+set CMSDK_WRPR_APB14_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR_APB14_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR_APB14_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR_APB15_CTRL [expr $CMSDK_WRPR_BASE + 0x3c]
+set CMSDK_WRPR_APB15_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR_APB15_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR_APB15_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR_CLK_HPC_PIN_OUT_CTRL [expr $CMSDK_WRPR_BASE + 0x40]
+set CMSDK_WRPR_CLK_HPC_PIN_OUT_CTRL_CLK_HPC_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_CLK_HPC_PIN_OUT_CTRL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_CLK_HMC_PIN_OUT_CTRL [expr $CMSDK_WRPR_BASE + 0x44]
+set CMSDK_WRPR_CLK_HMC_PIN_OUT_CTRL_CLK_MPC_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_CLK_HMC_PIN_OUT_CTRL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_CLK_LMC_PIN_OUT_CTRL [expr $CMSDK_WRPR_BASE + 0x48]
+set CMSDK_WRPR_CLK_LMC_PIN_OUT_CTRL_CLK_LPC_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_CLK_LMC_PIN_OUT_CTRL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_DBG_CTRL [expr $CMSDK_WRPR_BASE + 0x4c]
+set CMSDK_WRPR_DBG_CTRL_BLE_DBG_SEL__RESET_VALUE 0x00000005
+set CMSDK_WRPR_DBG_CTRL_EM_BLOCK_WDATA__RESET_VALUE 0x00000000
+set CMSDK_WRPR_DBG_CTRL_EM_BLOCK_ADDR__RESET_VALUE 0x00000000
+set CMSDK_WRPR_DBG_CTRL__RESET_VALUE 0x00000005
+set CMSDK_WRPR_PIN_SELECTION_A [expr $CMSDK_WRPR_BASE + 0x50]
+set CMSDK_WRPR_PIN_SELECTION_A_P5_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_A_P4_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_A_P3_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_A_P2_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_A_P1_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_A_P0_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_A__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_B [expr $CMSDK_WRPR_BASE + 0x54]
+set CMSDK_WRPR_PIN_SELECTION_B_P11_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_B_P10_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_B_P9_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_B_P8_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_B_P7_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_B_P6_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_B__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_C [expr $CMSDK_WRPR_BASE + 0x58]
+set CMSDK_WRPR_PIN_SELECTION_C_P17_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_C_P16_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_C_P15_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_C_P14_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_C_P13_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_C_P12_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_C__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_D [expr $CMSDK_WRPR_BASE + 0x5c]
+set CMSDK_WRPR_PIN_SELECTION_D_P23_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_D_P22_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_D_P21_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_D_P20_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_D_P19_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_D_P18_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_D__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_E [expr $CMSDK_WRPR_BASE + 0x60]
+set CMSDK_WRPR_PIN_SELECTION_E_P29_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_E_P28_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_E_P27_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_E_P26_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_E_P25_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_E_P24_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_E__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_F [expr $CMSDK_WRPR_BASE + 0x64]
+set CMSDK_WRPR_PIN_SELECTION_F_P33_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_F_P32_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_F_P31_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_F_P30_SEL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_SELECTION_F__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_A [expr $CMSDK_WRPR_BASE + 0x68]
+set CMSDK_WRPR_PIN_PU_A_P7_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_A_P6_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_A_P5_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_A_P4_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_A_P3_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_A_P2_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_A_P1_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_A_P0_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_A__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_B [expr $CMSDK_WRPR_BASE + 0x6c]
+set CMSDK_WRPR_PIN_PU_B_P15_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_B_P14_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_B_P13_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_B_P12_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_B_P11_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_B_P10_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_B_P9_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_B_P8_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_B__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_C [expr $CMSDK_WRPR_BASE + 0x70]
+set CMSDK_WRPR_PIN_PU_C_P23_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_C_P22_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_C_P21_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_C_P20_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_C_P19_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_C_P18_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_C_P17_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_C_P16_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_C__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_D [expr $CMSDK_WRPR_BASE + 0x74]
+set CMSDK_WRPR_PIN_PU_D_P31_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_D_P30_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_D_P29_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_D_P28_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_D_P27_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_D_P26_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_D_P25_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_D_P24_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_D__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_E [expr $CMSDK_WRPR_BASE + 0x78]
+set CMSDK_WRPR_PIN_PU_E_P33_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_E_P32_PU__RESET_VALUE 0x00000000
+set CMSDK_WRPR_PIN_PU_E__RESET_VALUE 0x00000000
+set CMSDK_WRPR_INTRPT_CFG_0 [expr $CMSDK_WRPR_BASE + 0x7c]
+set CMSDK_WRPR_INTRPT_CFG_0_INTRPT0_MASK__RESET_VALUE 0x00000001
+set CMSDK_WRPR_INTRPT_CFG_0__RESET_VALUE 0x00000001
+set CMSDK_WRPR_INTRPT_CFG_1 [expr $CMSDK_WRPR_BASE + 0x80]
+set CMSDK_WRPR_INTRPT_CFG_1_INTRPT1_MASK__RESET_VALUE 0x00000002
+set CMSDK_WRPR_INTRPT_CFG_1__RESET_VALUE 0x00000002
+set CMSDK_WRPR_INTRPT_CFG_2 [expr $CMSDK_WRPR_BASE + 0x84]
+set CMSDK_WRPR_INTRPT_CFG_2_INTRPT2_MASK__RESET_VALUE 0x00000004
+set CMSDK_WRPR_INTRPT_CFG_2__RESET_VALUE 0x00000004
+set CMSDK_WRPR_INTRPT_CFG_3 [expr $CMSDK_WRPR_BASE + 0x88]
+set CMSDK_WRPR_INTRPT_CFG_3_INTRPT3_MASK__RESET_VALUE 0x00000008
+set CMSDK_WRPR_INTRPT_CFG_3__RESET_VALUE 0x00000008
+set CMSDK_WRPR_INTRPT_CFG_4 [expr $CMSDK_WRPR_BASE + 0x8c]
+set CMSDK_WRPR_INTRPT_CFG_4_INTRPT4_MASK__RESET_VALUE 0x00002000
+set CMSDK_WRPR_INTRPT_CFG_4__RESET_VALUE 0x00002000
+set CMSDK_WRPR_INTRPT_CFG_5 [expr $CMSDK_WRPR_BASE + 0x90]
+set CMSDK_WRPR_INTRPT_CFG_5_INTRPT5_MASK__RESET_VALUE 0x00000000
+set CMSDK_WRPR_INTRPT_CFG_5__RESET_VALUE 0x00000000
+set CMSDK_WRPR_INTRPT_CFG_6 [expr $CMSDK_WRPR_BASE + 0x94]
+set CMSDK_WRPR_INTRPT_CFG_6_INTRPT6_MASK__RESET_VALUE 0x01ff0000
+set CMSDK_WRPR_INTRPT_CFG_6__RESET_VALUE 0x01ff0000
+set CMSDK_WRPR_INTRPT_CFG_7 [expr $CMSDK_WRPR_BASE + 0x98]
+set CMSDK_WRPR_INTRPT_CFG_7_INTRPT7_MASK__RESET_VALUE 0x02000010
+set CMSDK_WRPR_INTRPT_CFG_7__RESET_VALUE 0x02000010
+set CMSDK_WRPR_INTRPT_CFG_8 [expr $CMSDK_WRPR_BASE + 0x9c]
+set CMSDK_WRPR_INTRPT_CFG_8_INTRPT8_MASK__RESET_VALUE 0x00000020
+set CMSDK_WRPR_INTRPT_CFG_8__RESET_VALUE 0x00000020
+set CMSDK_WRPR_INTRPT_CFG_9 [expr $CMSDK_WRPR_BASE + 0xa0]
+set CMSDK_WRPR_INTRPT_CFG_9_INTRPT9_MASK__RESET_VALUE 0x00000040
+set CMSDK_WRPR_INTRPT_CFG_9__RESET_VALUE 0x00000040
+set CMSDK_WRPR_INTRPT_CFG_10 [expr $CMSDK_WRPR_BASE + 0xa4]
+set CMSDK_WRPR_INTRPT_CFG_10_INTRPT10_MASK__RESET_VALUE 0x00000080
+set CMSDK_WRPR_INTRPT_CFG_10__RESET_VALUE 0x00000080
+set CMSDK_WRPR_INTRPT_CFG_11 [expr $CMSDK_WRPR_BASE + 0xa8]
+set CMSDK_WRPR_INTRPT_CFG_11_INTRPT11_MASK__RESET_VALUE 0x00000100
+set CMSDK_WRPR_INTRPT_CFG_11__RESET_VALUE 0x00000100
+set CMSDK_WRPR_INTRPT_CFG_12 [expr $CMSDK_WRPR_BASE + 0xac]
+set CMSDK_WRPR_INTRPT_CFG_12_INTRPT12_MASK__RESET_VALUE 0x00000200
+set CMSDK_WRPR_INTRPT_CFG_12__RESET_VALUE 0x00000200
+set CMSDK_WRPR_INTRPT_CFG_13 [expr $CMSDK_WRPR_BASE + 0xb0]
+set CMSDK_WRPR_INTRPT_CFG_13_INTRPT13_MASK__RESET_VALUE 0x00000400
+set CMSDK_WRPR_INTRPT_CFG_13__RESET_VALUE 0x00000400
+set CMSDK_WRPR_INTRPT_CFG_14 [expr $CMSDK_WRPR_BASE + 0xb4]
+set CMSDK_WRPR_INTRPT_CFG_14_INTRPT14_MASK__RESET_VALUE 0x00000800
+set CMSDK_WRPR_INTRPT_CFG_14__RESET_VALUE 0x00000800
+set CMSDK_WRPR_INTRPT_CFG_15 [expr $CMSDK_WRPR_BASE + 0xb8]
+set CMSDK_WRPR_INTRPT_CFG_15_INTRPT15_MASK__RESET_VALUE 0x3c001000
+set CMSDK_WRPR_INTRPT_CFG_15__RESET_VALUE 0x3c001000
+set CMSDK_WRPR_REMAP [expr $CMSDK_WRPR_BASE + 0xbc]
+set CMSDK_WRPR_REMAP_QSPI_DROP__RESET_VALUE 0x00000000
+set CMSDK_WRPR_REMAP__RESET_VALUE 0x00000000
+set CMSDK_WRPR_AHB_INTERPOSERS [expr $CMSDK_WRPR_BASE + 0xc0]
+set CMSDK_WRPR_AHB_INTERPOSERS_QSPI_INTP_ENABLE__RESET_VALUE 0x00000001
+set CMSDK_WRPR_AHB_INTERPOSERS_QSPI_INTP_LOW_CEILING__RESET_VALUE 0x00000000
+set CMSDK_WRPR_AHB_INTERPOSERS__RESET_VALUE 0x00000001
+set CMSDK_WRPR_SCRATCHPAD_A [expr $CMSDK_WRPR_BASE + 0xc4]
+set CMSDK_WRPR_SCRATCHPAD_A_MISC__RESET_VALUE 0x00000000
+set CMSDK_WRPR_SCRATCHPAD_A__RESET_VALUE 0x00000000
+set CMSDK_WRPR_SCRATCHPAD_B [expr $CMSDK_WRPR_BASE + 0xc8]
+set CMSDK_WRPR_SCRATCHPAD_B_MISC__RESET_VALUE 0x00000000
+set CMSDK_WRPR_SCRATCHPAD_B__RESET_VALUE 0x00000000
+set CMSDK_WRPR_SCRATCHPAD_C [expr $CMSDK_WRPR_BASE + 0xcc]
+set CMSDK_WRPR_SCRATCHPAD_C_MISC__RESET_VALUE 0x00000000
+set CMSDK_WRPR_SCRATCHPAD_C__RESET_VALUE 0x00000000
+set CMSDK_WRPR_SCRATCHPAD_D [expr $CMSDK_WRPR_BASE + 0xd0]
+set CMSDK_WRPR_SCRATCHPAD_D_MISC__RESET_VALUE 0x00000000
+set CMSDK_WRPR_SCRATCHPAD_D__RESET_VALUE 0x00000000
+set CMSDK_WRPR_CHIPID1 [expr $CMSDK_WRPR_BASE + 0xff0]
+set CMSDK_WRPR_CHIPID1_CHAR3__RESET_VALUE 0x0000006e
+set CMSDK_WRPR_CHIPID1_CHAR2__RESET_VALUE 0x00000064
+set CMSDK_WRPR_CHIPID1_CHAR1__RESET_VALUE 0x00000079
+set CMSDK_WRPR_CHIPID1_CHAR0__RESET_VALUE 0x00000053
+set CMSDK_WRPR_CHIPID1__RESET_VALUE 0x5379646e
+set CMSDK_WRPR_CHIPID2 [expr $CMSDK_WRPR_BASE + 0xff4]
+set CMSDK_WRPR_CHIPID2_CHAR7__RESET_VALUE 0x00000000
+set CMSDK_WRPR_CHIPID2_CHAR6__RESET_VALUE 0x00000000
+set CMSDK_WRPR_CHIPID2_CHAR5__RESET_VALUE 0x00000079
+set CMSDK_WRPR_CHIPID2_CHAR4__RESET_VALUE 0x00000065
+set CMSDK_WRPR_CHIPID2__RESET_VALUE 0x65790000
+set CMSDK_WRPR_CHIPREV [expr $CMSDK_WRPR_BASE + 0xff8]
+set CMSDK_WRPR_CHIPREV_MINOR__RESET_VALUE 0x00000002
+set CMSDK_WRPR_CHIPREV_MAJOR__RESET_VALUE 0x00000002
+set CMSDK_WRPR_CHIPREV_RUNNING_OFF_32KHZ_XTAL__RESET_VALUE 0x00000000
+set CMSDK_WRPR_CHIPREV__RESET_VALUE 0x00000202
+set CMSDK_WRPR_CORE_ID [expr $CMSDK_WRPR_BASE + 0xffc]
+set CMSDK_WRPR_CORE_ID_ID__RESET_VALUE 0x57525052
+set CMSDK_WRPR_CORE_ID__RESET_VALUE 0x57525052
diff --git a/platform/atm2/ATM22xx-x1x/openocd/regs/wrpr1.tcl b/platform/atm2/ATM22xx-x1x/openocd/regs/wrpr1.tcl
new file mode 100644
index 0000000..07908a5
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/regs/wrpr1.tcl
@@ -0,0 +1,68 @@
+set CMSDK_WRPR1_BASE          0x50003000
+set CMSDK_WRPR1_APB0_CTRL [expr $CMSDK_WRPR1_BASE + 0x0]
+set CMSDK_WRPR1_APB0_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR1_APB0_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR1_APB0_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR1_APB1_CTRL [expr $CMSDK_WRPR1_BASE + 0x4]
+set CMSDK_WRPR1_APB1_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR1_APB1_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR1_APB1_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR1_APB2_CTRL [expr $CMSDK_WRPR1_BASE + 0x8]
+set CMSDK_WRPR1_APB2_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR1_APB2_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR1_APB2_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR1_APB3_CTRL [expr $CMSDK_WRPR1_BASE + 0xc]
+set CMSDK_WRPR1_APB3_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR1_APB3_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR1_APB3_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR1_APB4_CTRL [expr $CMSDK_WRPR1_BASE + 0x10]
+set CMSDK_WRPR1_APB4_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR1_APB4_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR1_APB4_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR1_APB5_CTRL [expr $CMSDK_WRPR1_BASE + 0x14]
+set CMSDK_WRPR1_APB5_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR1_APB5_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR1_APB5_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR1_APB6_CTRL [expr $CMSDK_WRPR1_BASE + 0x18]
+set CMSDK_WRPR1_APB6_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR1_APB6_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR1_APB6_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR1_APB7_CTRL [expr $CMSDK_WRPR1_BASE + 0x1c]
+set CMSDK_WRPR1_APB7_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR1_APB7_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR1_APB7_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR1_APB8_CTRL [expr $CMSDK_WRPR1_BASE + 0x20]
+set CMSDK_WRPR1_APB8_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR1_APB8_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR1_APB8_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR1_APB9_CTRL [expr $CMSDK_WRPR1_BASE + 0x24]
+set CMSDK_WRPR1_APB9_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR1_APB9_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR1_APB9_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR1_APB10_CTRL [expr $CMSDK_WRPR1_BASE + 0x28]
+set CMSDK_WRPR1_APB10_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR1_APB10_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR1_APB10_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR1_APB11_CTRL [expr $CMSDK_WRPR1_BASE + 0x2c]
+set CMSDK_WRPR1_APB11_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR1_APB11_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR1_APB11_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR1_APB12_CTRL [expr $CMSDK_WRPR1_BASE + 0x30]
+set CMSDK_WRPR1_APB12_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR1_APB12_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR1_APB12_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR1_APB13_CTRL [expr $CMSDK_WRPR1_BASE + 0x34]
+set CMSDK_WRPR1_APB13_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR1_APB13_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR1_APB13_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR1_APB14_CTRL [expr $CMSDK_WRPR1_BASE + 0x38]
+set CMSDK_WRPR1_APB14_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR1_APB14_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR1_APB14_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR1_APB15_CTRL [expr $CMSDK_WRPR1_BASE + 0x3c]
+set CMSDK_WRPR1_APB15_CTRL_CLK_ENABLE__RESET_VALUE 0x00000000
+set CMSDK_WRPR1_APB15_CTRL_SRESET__RESET_VALUE 0x00000001
+set CMSDK_WRPR1_APB15_CTRL__RESET_VALUE 0x00000002
+set CMSDK_WRPR1_CORE_ID [expr $CMSDK_WRPR1_BASE + 0xffc]
+set CMSDK_WRPR1_CORE_ID_ID__RESET_VALUE 0x57525052
+set CMSDK_WRPR1_CORE_ID__RESET_VALUE 0x57525052
diff --git a/platform/atm2/ATM22xx-x1x/openocd/servers.tcl b/platform/atm2/ATM22xx-x1x/openocd/servers.tcl
new file mode 100644
index 0000000..e7360a0
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/openocd/servers.tcl
@@ -0,0 +1,8 @@
+
+gdb_port 3333
+telnet_port 4444
+tcl_port 6666
+
+bindto 0.0.0.0
+
+source [find http/openocd_http.tcl]
diff --git a/platform/atm2/ATM22xx-x1x/rom/cmsdk_cm0_user_flash.ld b/platform/atm2/ATM22xx-x1x/rom/cmsdk_cm0_user_flash.ld
new file mode 100644
index 0000000..ef32f4d
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/rom/cmsdk_cm0_user_flash.ld
@@ -0,0 +1,134 @@
+/*
+ * cmsdk_cm0_user_flash.ld
+ * Linker script for user application executing from external flash
+ *
+ * Copyright (C) Atmosic 2017-2021
+ */
+
+INCLUDE "lib-nosys.ld"
+INCLUDE "memory.ld"
+
+ENTRY(_user_entry)
+
+SECTIONS
+{
+	.text :
+	{
+		__text_start__ = .;
+		KEEP(*(.user_entry))
+		*(.text*)
+		KEEP(*(.KEEP.text*))
+
+		KEEP(*(.init))
+		KEEP(*(.fini))
+
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+		*(SORT(.ctors.*))
+		*(.ctors)
+
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+
+		*(.rodata*)
+
+		KEEP(*(.eh_frame*))
+	} > UFLASH
+
+	. = ALIGN(4);
+	__atm_module_start = .;
+	.ATM.module :
+	{
+		KEEP(*(SORT(.atm_module.*)))
+	} > UFLASH
+	__atm_module_end = .;
+
+	. = ALIGN(4);
+	__at_cmd_start = .;
+	.ATCOMMAND :
+	{
+		KEEP(*(SORT(.at_cmd.*)))
+	} > UFLASH
+	__at_cmd_end = .;
+
+	.ARM.extab :
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > UFLASH
+
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > UFLASH
+	__exidx_end = .;
+
+	. = ALIGN(4);
+	__etext = .;
+
+	.data : AT (__etext)
+	{
+		__data_start__ = .;
+
+		*(vtable)
+		*(.data*)
+
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
+
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
+
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
+
+		KEEP(*(.jcr*))
+
+		. = ALIGN(4);
+		/* All data end */
+		__data_end__ = .;
+	} > URAM
+
+	/* Check if UFLASH overflowed */
+	ASSERT((__etext - ORIGIN(UFLASH)) + (__data_end__ - __data_start__) < LENGTH(UFLASH), "section .data does not fit in region UFLASH")
+
+	__NVDS_Flash = ORIGIN(NVDS);
+	__NVDS_FlashEnd = ORIGIN(NVDS) + LENGTH(NVDS);
+
+	__User_Flash = ORIGIN(USER);
+	__User_FlashEnd = ORIGIN(USER) + LENGTH(USER);
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
+	} > URAM
+
+	.uninit (NOLOAD) :
+	{
+		. = ALIGN(4);
+		*(.uninit*)
+		. = ALIGN(4);
+	} > URAM
+}
diff --git a/platform/atm2/ATM22xx-x1x/rom/memory.ld b/platform/atm2/ATM22xx-x1x/rom/memory.ld
new file mode 100644
index 0000000..0ee9d4d
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/rom/memory.ld
@@ -0,0 +1,73 @@
+/*
+ *-----------------------------------------------------------------------------
+ * The confidential and proprietary information contained in this file may
+ * only be used by a person authorised under and to the extent permitted
+ * by a subsisting licensing agreement from ARM Limited.
+ *
+ *            (C) COPYRIGHT 2010-2013 ARM Limited.
+ *                ALL RIGHTS RESERVED
+ *
+ * This entire notice must be reproduced on all copies of this file
+ * and copies of this file may only be made by a person if such person is
+ * permitted to do so under the terms of a subsisting license agreement
+ * from ARM Limited.
+ *
+ *      SVN Information
+ *
+ *      Checked In          : $Date: $
+ *
+ *      Revision            : $Revision: $
+ *
+ *      Release Information : Cortex-M System Design Kit-r1p0-00rel0
+ *-----------------------------------------------------------------------------
+ */
+/* Linker script to configure memory regions.
+ * Need modifying for a specific board.
+ *   FLASH.ORIGIN: starting address of flash
+ *   FLASH.LENGTH: length of flash
+ *   RAM.ORIGIN: starting address of RAM bank 0
+ *   RAM.LENGTH: length of RAM bank 0
+ *
+ * 0x10000000  ┌────────────────────┐
+ *             │░░░░░░░░░░░░░░░░░░░░│
+ *             │░░░░░░░░░░░░░░░░░░░░│
+ *             │░░░░░░░░░░░░░░░░░░░░│
+ *             │░░░░░░UFLASH░░░░░░░░│ UFLASH_LEN
+ *             │░░░░░░░░░░░░░░░░░░░░│
+ *             │░░░░░░░░░░░░░░░░░░░░│
+ *             │░░░░░░░░░░░░░░░░░░░░│
+ * 0x10000000  │░░░░░░░░░░░░░░░░░░░░│
+ * +UFLASH_LEN ├────────────────────┤
+ *             │░░░░░░░░░░░░░░░░░░░░│
+ *             │░░░░░░░░USER░░░░░░░░│ USER_LEN
+ * 0x10000000  │░░░░░░░░░░░░░░░░░░░░│
+ * +UFLASH_LEN ├────────────────────┤
+ * +USER_LEN   │░░░░░░░░░░░░░░░░░░░░│
+ *             │░░░░░░░░NVDS░░░░░░░░│ NVDS_LEN
+ * 0x10000000  │░░░░░░░░░░░░░░░░░░░░│
+ * +UFLASH_LEN ├────────────────────┤
+ * +USER_LEN   │░░░░░░░░░░░░░░░░░░░░│
+ * +NVDS_LEN   │░░░░░░░░MPR░░░░░░░░░│ MPR_LEN
+ *             │░░░░░░░░░░░░░░░░░░░░│
+ *             └────────────────────┘
+ *
+ */
+
+HIDDEN(USER_LEN = DEFINED(USER_SIZE) ? USER_SIZE : 0);
+HIDDEN(NVDS_LEN = DEFINED(NVDS_SIZE) ? NVDS_SIZE : 0x8000);
+HIDDEN(MPR_LEN = DEFINED(MPR_SIZE) ? MPR_SIZE : 0);
+HIDDEN(UFLASH_LEN = (DEFINED(FLASH_SIZE) ? FLASH_SIZE : 0x80000) - NVDS_LEN - USER_LEN - MPR_LEN);
+HIDDEN(URAM_ORG = DEFINED(URAM_START) ? URAM_START : 0x20014000);
+HIDDEN(URAM_LEN = DEFINED(URAM_SIZE) ? URAM_SIZE : 0x4000); /* 16K */
+
+MEMORY
+{
+  FLASH (rx)  : ORIGIN =        0x0, LENGTH = 0x40000 /* 256K */
+  UFLASH (rx) : ORIGIN = 0x10000000, LENGTH = UFLASH_LEN
+  USER (rwx)  : ORIGIN = 0x10000000 + UFLASH_LEN, LENGTH = USER_LEN
+  NVDS (rwx)  : ORIGIN = 0x10000000 + UFLASH_LEN + USER_LEN, LENGTH = NVDS_LEN
+  MPR (rwx)   : ORIGIN = 0x10000000 + UFLASH_LEN + USER_LEN + NVDS_LEN, LENGTH = MPR_LEN
+  RAM (rwx)   : ORIGIN = 0x20000000, LENGTH = 0x14000 /*  80K */
+  URAM (rwx)  : ORIGIN = URAM_ORG, LENGTH = URAM_LEN
+}
+
diff --git a/platform/atm2/ATM22xx-x1x/rom/rom.mk b/platform/atm2/ATM22xx-x1x/rom/rom.mk
new file mode 100644
index 0000000..f375f26
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/rom/rom.mk
@@ -0,0 +1,39 @@
+
+ifndef __ROM_MK__
+__ROM_MK__ = 1
+
+ROM_CFLAGS := \
+	-DCFG_EMB \
+	-DCFG_HOST \
+	-DCFG_BLE \
+	-DCFG_AHITL \
+	-DCFG_NVDS \
+	-DCFG_DBG_MEM \
+	-DCFG_DBG_FLASH \
+	-DCFG_DBG_NVDS \
+	-DCFG_DBG_STACK_PROF \
+	-DCFG_RF_SYDNEY \
+	-DCFG_ALLROLES \
+	-DCFG_ACT=6 \
+	-DCFG_RAL=3 \
+	-DCFG_CON=5 \
+	-DCFG_ISO_CON=0 \
+	-DCFG_SEC_CON \
+	-DCFG_EXT_DB \
+	-DCFG_ATTC \
+	-DCFG_ATTS \
+	-DCFG_PRF \
+	-DCFG_NB_PRF=12 \
+	-DCFG_HCITL \
+	-DCFG_AHITL \
+	-DCFG_BLE_DTM \
+
+.PHONY: gdb_rom
+gdb_rom: $(ROM_DIR)/fw.elf $(GDB)
+	$(GDB) -x $(GDB_CFG_DIR)/atmx2.gdb $<
+
+.PHONY: gdb_rom_target
+gdb_rom_target: $(ROM_DIR)/fw.elf $(GDB)
+	$(GDB) -x $(GDB_CFG_DIR)/atmx2.gdb $< -ex "target remote localhost:3333"
+
+endif # __ROM_MK__
diff --git a/platform/atm2/ATM22xx-x1x/rom/rom_app.mk b/platform/atm2/ATM22xx-x1x/rom/rom_app.mk
new file mode 100644
index 0000000..0e52c45
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/rom/rom_app.mk
@@ -0,0 +1,103 @@
+
+ifndef __ROM_APP_MK__
+__ROM_APP_MK__ = 1
+
+include $(ROM_DIR)/rom.mk
+
+# set library defaults
+LIBS ?= \
+	$(LIB_DIR)/lib_plf$(if $(DEBUG),_dbg).a \
+
+ifdef RUN_IN_RAM
+DRIVERS += pseq
+INCLUDES += $(DRIVER_DIR)/wurx
+CFLAGS += '-Dmain(...)=user_main(__VA_ARGS__)'
+endif
+
+ROM_ERRATA_SRC := $(filter-out $(ROM_ERRATA_EXCLUDE),\
+    $(notdir $(wildcard $(ROM_DIR)/ROM_errata_*.c)))
+
+comma := ,
+
+ifeq ($(TOOLSET),IAR)
+APP_USER_STARTUP ?= $(ROM_DIR)/iccarm/user_startup_CMSDK_CM0-iar.s
+
+ifdef USE_LIB
+LIBS := \
+	--whole-archive $(LIB_DIR)/app_lib/$(APP)$(if $(DEBUG),_dbg).a \
+	$(LIBS)
+else
+rom.o: rom.elf
+	$(IAR_DIR)/isymexport $< $@
+endif
+
+LDFLAGS := \
+	--config_search $(ROM_DIR)/iccarm \
+	--config cmsdk_cm0_user_flash.icf \
+	--entry _user_entry \
+	$(LDFLAGS)
+
+REDEF += $(ROM_DIR)/iccarm/iar.redef
+else ifeq ($(TOOLSET),ARM)
+APP_USER_STARTUP ?= $(ROM_DIR)/armcc/Startup.s
+
+ifdef USE_LIB
+LIBS := \
+	'$(LIB_DIR)/app_lib/$(APP)$(if $(DEBUG),_dbg).a(*)' \
+	$(LIBS)
+else
+rom.o: rom.elf
+	$(COMMON_USER_DIR)/gen_symtab.py $< $@
+endif
+
+LDFLAGS := \
+	--scatter=$(ROM_DIR)/armcc/cmsdk_cm0_user_flash.sct \
+	$(LDFLAGS)
+
+REDEF += $(ROM_DIR)/keil.redef
+else # TOOLSET
+APP_USER_STARTUP ?= $(ROM_DIR)/user_startup_CMSDK_CM0.s
+
+ifdef USE_LIB
+comma := ,
+LIBS := \
+	-Wl$(comma)--whole-archive \
+	$(LIB_DIR)/app_lib/$(APP)$(if $(DEBUG),_dbg).a \
+	-Wl$(comma)--no-whole-archive \
+	$(LIBS)
+else
+rom.o: rom.elf
+	$(COMMON_USER_DIR)/gen_symtab.py $< $@
+endif
+
+LDFLAGS := \
+	-L$(ROM_DIR) \
+	$(if $(RUN_IN_RAM),-Tcmsdk_cm0_user_ram.ld,\
+	    $(if $(AVOID_XIP),-Tcmsdk_cm0_user_flash_noxip.ld,\
+	    -Tcmsdk_cm0_user_flash.ld)) \
+	$(if $(URAM_START),-Wl$(comma)--defsym=URAM_START=$(URAM_START)) \
+	$(if $(URAM_SIZE),-Wl$(comma)--defsym=URAM_SIZE=$(URAM_SIZE)) \
+	$(LDFLAGS)
+endif
+
+ifndef USE_LIB
+OBJS += rom.o
+endif
+
+REDEF += \
+	$(ROM_DIR)/startup.redef \
+	$(ROM_DIR)/user.redef \
+	$(if $(COVERAGE),$(ROM_DIR)/gcov.redef) \
+
+rom.elf: $(ROM_DIR)/fw.elf
+	$(OBJCOPY) $(addprefix --redefine-syms=,$(REDEF)) \
+	    --globalize-symbols=$(ROM_DIR)/rom.glob \
+	    --add-symbol run_in_ram_hook=0x601d $< $@
+
+GDB_EXTRA += -ex "add-symbol-file rom.elf"
+
+.PHONY: clean
+clean::
+	rm -f rom.elf
+
+endif # __ROM_APP_MK__
diff --git a/platform/atm2/ATM22xx-x1x/user/app.mk b/platform/atm2/ATM22xx-x1x/user/app.mk
new file mode 100644
index 0000000..45fc0a5
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/user/app.mk
@@ -0,0 +1,760 @@
+################################################################################
+#
+# @file app.mk
+#
+# @brief Application make helper
+#
+# Copyright (C) Atmosic 2018-2022
+#
+################################################################################
+
+ifndef __APP_MK__
+__APP_MK__ = 1
+
+APP ?= $(notdir $(CURDIR))
+
+# Watchdog default 5 sec
+WDOG ?= 5
+
+LIBRARIES += atm_utils_c atm_utils_math
+DRIVERS += \
+	heap \
+	hw_cfg \
+	pinmux \
+	rf \
+	watchdog \
+
+ifdef UART_FLASH
+# default 32K NVDS
+UART_FLASH_NVDS_SIZE ?= 0x8000
+CFLAGS += -DUART_FLASH_NVDS_SIZE=$(UART_FLASH_NVDS_SIZE)
+
+# UART_FLASH=0 for using UART0
+# UART_FLASH=1 for using UART1
+ifeq ($(UART_FLASH),0)
+CFLAGS += -DCFG_UART_FLASH_UART0
+else ifneq ($(UART_FLASH),1)
+$(error "usage: make $(MAKECMDGOALS) UART_FLASH=<0|1>")
+endif
+DRIVERS += uart_flash
+else ifndef RUN_IN_RAM
+CFLAGS += -DCFG_EXT_FLASH
+DRIVERS += ext_flash
+endif # UART_FLASH
+
+ifndef NO_PMU
+DRIVERS += pmu reset
+INCLUDES += $(DRIVER_DIR)/wurx
+endif
+
+# Enable Brownout by default
+ifndef NO_BROWNOUT
+DRIVERS += brwnout
+endif
+
+ifdef FORCE_LPC_RCOS
+CFLAGS += -DFORCE_LPC_RCOS
+endif
+
+ifdef FPGA
+DRIVERS += dtop_bypass
+endif
+
+# Include board specific pin mapping
+CFLAGS += -DPINMAP_BOARD=$(BOARD)
+INCLUDES += pinmap
+
+# Code coverage for units under test
+ifeq ($(TOOLSET),)
+ifneq ($(and $(UU_TEST),$(filter -DAUTO_TEST,$(CFLAGS))),)
+ifeq ($(filter -DIS_FOR_SIM,$(CFLAGS)),)
+ifndef RUN_IN_RAM
+COVERAGE ?= $(UU_TEST)
+endif
+endif # IS_FOR_SIM
+endif # UU_TEST && AUTO_TEST
+endif # TOOLSET
+
+.PHONY: all
+all: $(APP).bin $(APP).asm
+
+include $(COMMON_USER_DIR)/tools.mk
+include $(COMMON_USER_DIR)/nvds.mk
+include $(if $(FLASHROM),$(LIB_DIR)/$(FLASHROM).mk,$(ROM_DIR)/rom_app.mk)
+
+ifdef FLASHROM
+override undefine USE_LIB
+FLASHOFF ?= 0x10000000
+endif
+
+ifndef NO_USER_INIT
+C_SRCS += $(USER_DIR)/user_init.c
+endif
+
+C_SRCS += $(wildcard $(APP).c) $(USER_DIR)/user_debug.c
+CXX_SRCS += $(foreach e,$(CXX_EXT),$(wildcard $(APP).$e))
+
+ifeq ($(TOOLSET),ARM)
+C_SRCS += $(USER_DIR)/armcc/retarget.c
+endif
+
+ifdef DEBUG
+C_SRCS += $(USER_DIR)/hardfault_handler_armv6m.c
+DRIVERS += swd_dbg
+ifndef SKIP_TB
+DRIVERS += arm_traceback
+endif # SKIP_TB
+ifdef RTT_DBG
+DRIVERS += SEGGER_RTT
+CFLAGS += -DRTT_DBG
+C_SRCS += $(DRIVER_DIR)/SEGGER_RTT/SEGGER_RTT_printf.c
+C_SRCS += $(DRIVER_DIR)/SEGGER_RTT/rtt_debug.c
+ifdef RTT_DBG_ONLY
+CFLAGS += -DRTT_DBG_ONLY
+endif
+endif
+else # DEBUG
+ifneq (,$(filter -DAUTO_TEST,$(CFLAGS)))
+C_SRCS += $(USER_DIR)/hardfault_handler_armv6m.c
+ifndef SKIP_TB
+DRIVERS += arm_traceback
+endif
+endif # AUTO_TEST
+override undefine RTT_DBG
+endif # DEBUG
+
+ifdef COVERAGE
+C_SRCS += $(USER_DIR)/user_gcov.c
+endif
+
+ifdef LPC_RCOS
+DRIVERS += lpc_rcos
+CFLAGS += -DLPC_RCOS
+endif
+
+LIBRARIES := $(sort $(LIBRARIES))
+
+C_SRCS += $(addprefix $(ROM_DIR)/,$(ROM_ERRATA_SRC))
+
+define include_driver
+$(eval N := $(notdir $1))
+$(eval D := $(DRIVER_DIR)/$1)
+INCLUDES += $D
+-include $D/$N.mk
+ifeq ($$(lastword $$(MAKEFILE_LIST)),$D/$N.mk)
+C_SRCS += $$(addprefix $D/,$$($N.C_SRCS))
+INCLUDES += $$(addprefix $D/,$$($N.INCLUDES))
+LIBS += $$(addprefix $D/,$$($N.LIBS))
+CFLAGS += $$($N.CFLAGS)
+else
+C_SRCS += $D/$N.c
+endif
+endef
+$(foreach d,$(DRIVERS),$(eval $(call include_driver,$d)))
+
+define include_library
+$(eval N := $(notdir $1))
+$(eval L := $(LIB_DIR)/$1)
+INCLUDES += $L
+-include $L/$N.mk
+ifeq ($$(lastword $$(MAKEFILE_LIST)),$L/$N.mk)
+C_SRCS += $$(addprefix $L/,$$($N.C_SRCS))
+INCLUDES += $$(addprefix $L/,$$($N.INCLUDES))
+LIBS += $$(addprefix $L/,$$($N.LIBS))
+CFLAGS += $$($N.CFLAGS)
+else
+C_SRCS += $(wildcard $L/$N*.c)
+endif
+endef
+$(foreach l,$(LIBRARIES),$(eval $(call include_library,$l)))
+
+EXCL_APP_LIB_ALL := $(EXCLUDE_APP_LIB_C_SRCS) $(APP).c
+ifdef USE_LIB
+C_SRCS := $(EXCL_APP_LIB_ALL)
+else
+S_SRCS += $(APP_USER_STARTUP)
+endif
+
+OBJS += $(notdir $(S_SRCS:%.s=%.o) $(C_SRCS:%.c=%.o) \
+	$(foreach f,$(CXX_SRCS),$(basename $f).o))
+
+# Non-conforming compilation units.  Needs to be cleaned up and removed.
+FIXME_USES_BLE := \
+	app_bass.c \
+	app_diss.c \
+	app_fio.c \
+	app_gap.c \
+	app_hrps.c \
+	app_htpt.c \
+	app_otaps.c \
+	at_cmd_init.c \
+	at_cmd_utils.c \
+	atm_adv.c \
+	atm_adv_param.c \
+	atm_debug.c \
+	atm_gap.c \
+	atm_gap_param.c \
+	atm_init.c \
+	atm_init_param.c \
+	atm_persync.c \
+	atm_prfs.c \
+	atm_prfs_task.c \
+	atm_scan.c \
+	atm_scan_param.c \
+	bleadvdata.c \
+	bleadvenable.c \
+	bleadvlegacyparm.c \
+	bleadvtxpwr.c \
+	bleconntxpwr.c \
+	blegapdevname.c \
+	blegapdisconnect.c \
+	blegapgetconnstat.c \
+	blegapinit.c \
+	blegapgetrssi.c \
+	blegapgetpeerinfo.c \
+	blegapcreateconn.c \
+	blegapcancelcreateconn.c \
+	blegapparnego.c \
+	blescanenable.c \
+	blescanfil.c \
+	blescanfilrm.c \
+	blegattaddchar.c \
+	blegattadddesc.c \
+	blegattadddescuserdfd.c \
+	blegattaddservice.c \
+	blegattdftchar1.c \
+	blegattdftchar2.c \
+	blegattdftserver.c \
+	blegattdftservice.c \
+	blegattmtuexchgreq.c \
+	blegattmtuset.c \
+	blegattdiscchar.c \
+	blegattdiscchars.c \
+	blegattdiscdescs.c \
+	blegattdiscsvc.c \
+	blegattdiscsvcs.c \
+	blegattsvcactive.c \
+	blegatttoble.c \
+	blescanrspdata.c \
+	blegapevtconn.c \
+	blegapevtdisconn.c \
+	blegapevtlinkinfo.c \
+	blegapevtadvrpt.c \
+	blegapevtpar.c \
+	blegattmtuexchange.c \
+	blegattread.c \
+	blegattwrite.c \
+	blegattnotify.c \
+	blesmppairreq.c \
+	blesmppairendind.c \
+	sysbdaddr.c \
+	sysfuncpin.c \
+	syspm.c \
+	sysnvds.c \
+	blegattfromble.c \
+	sysuart0raw.c \
+	sysdfu.c \
+	at_cmd_dfu_proc.c \
+
+FIXME_EXAMPLE_USES_BLE := \
+	atcmd_gap.c \
+	ATM_ancsc.c \
+	ATM_shub.c \
+	attc_gatt.c \
+	atts_gatt.c \
+	atvrc_custom.c \
+	BLE_adv.c \
+	BLE_adv_scan.c \
+	BLE_atcmd.c \
+	BLE_att_client.c \
+	BLE_att_server.c \
+	BLE_bridge.c \
+	BLE_harv_adv.c \
+	BLE_scan_adv.c \
+	BLE_scan.c \
+	bridge_att.c \
+	bridge_audio.c \
+	bridge_gap.c \
+	bridge_ir.c \
+	bridge_mmi_client.c \
+	bridge_mmi_server.c \
+	button_demo.c \
+	common.c \
+	CT_adv.c \
+	CT_button.c \
+	CT_gatt.c \
+	CT_nvds.c \
+	CT_ota.c \
+	CT_scan.c \
+	CT_tracing.c \
+	DTM.c \
+	ESL_client.c \
+	ESL_server.c \
+	GPIO.c \
+	HCI.c \
+	HCI_vendor.c \
+	HIB_restore.c \
+	HID_keyboard.c \
+	HID_mouse.c \
+	HRP_sensor.c \
+	HT_thermometer.c \
+	ICM_sensor.c \
+	kbd_gap.c \
+	kbd_hogp.c \
+	kbd_mmi.c \
+	kbd_mmi_vkey.c \
+	kbd_otaps.c \
+	key_button.c \
+	LECB_client.c \
+	LECB_server.c \
+	mbedtls_bist.c \
+	mouse_hogp.c \
+	mouse_gap.c \
+	mouse_mmi.c \
+	mouse_mmi_led.c \
+	mouse_mmi_sensor.c \
+	mouse_mmi_timer.c \
+	mouse_otaps.c \
+	per_sync.c \
+	pm_demo.c \
+	pvbcn_adv.c \
+	pvbcn_gap.c \
+	pvbcn_gatt.c \
+	pvbcn_mmi.c \
+	pvbcn_ota.c \
+	PV_beacon.c \
+	RAM_hibernate.c \
+	rc_atvv.c \
+	rc_gap.c \
+	rc_hidau.c \
+	rc_hogp.c \
+	rc_ir.c \
+	rc_mmi.c \
+	rc_mmi_vkey.c \
+	rc_ota.c \
+	rc_pdm.c \
+	rc_test_mode.c \
+	RFsource_adv.c \
+	RFsource_scan.c \
+	swd_nego.c \
+	tmp1075_sensor_adv.c \
+	top_mmi.c \
+	TPUTP_client.c \
+	TPUTP_server.c \
+	transceiver.c \
+	uart0_raw_demo.c \
+	vendor_specific.c \
+	vkey_test.c \
+	WURX_adv.c \
+	WURX_scan_adv.c \
+
+FIXME_DRIVER_USES_BLE := \
+	atm_ble.c \
+	atm_button.c \
+	atm_pm.c \
+	atm_vkey.c \
+	bme680.c \
+	dtop_bypass.c \
+	ext_flash.c \
+	gadc.c \
+	hw_cfg.c \
+	lpc_rcos.c \
+	mouse.c \
+	pmu.c \
+	profiles.c \
+	pseq.c \
+	rf.c \
+	shub.c \
+	sw_event.c \
+	sw_timer.c \
+	trng.c \
+	uart0.c \
+	uart0_raw.c \
+	uart_flash.c \
+	uni_ir.c \
+	wurx.c \
+
+FRAMEWORK_UPPER_DIRS := $(wildcard $(LIB_DIR)/app_* $(LIB_DIR)/at_cmd* $(LIB_DIR)/atm_*)
+
+ABSTRACT_FILES := \
+    $(notdir $(shell find $(FRAMEWORK_UPPER_DIRS) -name '*.c')) \
+    $(notdir $(shell find $(EXAMPLE_DIR) -name '*.c')) \
+    $(notdir $(shell find $(DRIVER_DIR) -name '*.c')) \
+
+FILTERED_ABSTRACT_FILES := $(filter-out $(FIXME_USES_BLE) \
+    $(FIXME_EXAMPLE_USES_BLE) $(FIXME_DRIVER_USES_BLE),$(ABSTRACT_FILES))
+
+INCLUDES := \
+	$(TOP_DIR) \
+	$(INCLUDE_DIR) \
+	$(INCLUDE_DIR)/reg \
+	$(INCLUDE_DIR)/reg_ble \
+	$(INCLUDE_DIR)/arm \
+	$(INCLUDE_DIR)/ble \
+	$(DRIVER_DIR)/spi \
+	$(DRIVER_DIR)/timer \
+	$(INCLUDES)
+
+BLE_ONLY_INCLUDES := \
+	$(INCLUDE_DIR)/reg_ble \
+	$(INCLUDE_DIR)/ble \
+	$(LIB_DIR)/porting_ble \
+
+EXT_INCLUDES := $(filter-out $(BLE_ONLY_INCLUDES),$(INCLUDES))
+
+CFLAGS := \
+	-D__MODULE__=\"$${<F}\" \
+	-DFLASH_SIZE=$(if $(FLASH_SIZE),$(FLASH_SIZE),0x80000) \
+	-DCORTEX_M0 \
+	$(if $(FLASHROM),'-Dmain(...)=user_main(__VA_ARGS__)',-DCFG_USER) \
+	$(if $(DEBUG),-DCFG_DBG) \
+	$$(if $$(filter $(FILTERED_ABSTRACT_FILES),$$(<F)),\
+	    $(EXT_INCLUDES:%=-I%),\
+	    $($(if $(FLASHROM),FLASH)ROM_CFLAGS) $(INCLUDES:%=-I%)) \
+	$(CFLAGS)
+
+ifeq ($(TOOLSET),IAR)
+ASFLAGS := \
+	--cpu cortex-m0 --thumb -r \
+	$(ASFLAGS)
+
+CFLAGS := \
+	--cpu cortex-m0 --thumb -Ohz \
+	--vla \
+	--debug \
+	-e --warnings_are_errors \
+	--diag_suppress Go029,Pa039,Pa082,Pa084,Pa089,Pa093,Pe111,Pe186,Pe188 \
+	-I$(INCLUDE_DIR)/iccarm \
+	$(CFLAGS)
+
+DEP_FLAGS := --dependencies=n +
+
+LDFLAGS := \
+	--cpu cortex-m0 \
+	-L$(USER_DIR) \
+	$(if $(FLASH_SIZE),--config_def FLASH_SIZE=$(FLASH_SIZE)) \
+	$(if $(USER_SIZE),--config_def USER_SIZE=$(USER_SIZE)) \
+	$(if $(NVDS_SIZE),--config_def NVDS_SIZE=$(NVDS_SIZE)) \
+	$(if $(URAM_START),--config_def URAM_START=$(URAM_START)) \
+	$(if $(URAM_SIZE),--config_def URAM_SIZE=$(URAM_SIZE)) \
+	$(if $(MPR_SIZE),--config_def MPR_SIZE=$(MPR_SIZE)) \
+	--map=$(APP).map \
+	$(LDFLAGS)
+else
+C_ONLY_FLAGS := \
+	-Wstrict-prototypes \
+	-Wold-style-definition \
+	-Wmissing-prototypes \
+
+comma := ,
+
+ifeq ($(TOOLSET),ARM)
+ASFLAGS := \
+	--cpu=cortex-m0 --thumb -g \
+	$(ASFLAGS)
+
+C_ONLY_FLAGS += -std=gnu17
+
+CFLAGS := \
+	-Oz \
+	-fshort-enums \
+	$(CFLAGS)
+
+LDFLAGS := -v \
+	--cpu=cortex-m0 \
+	$(if $(DEBUG),,--lto --lto_level=Oz) \
+	--entry __main \
+	--predefine="$(if $(FLASH_SIZE),-DFLASH_SIZE=$(FLASH_SIZE)) \
+	    $(if $(USER_SIZE),-DUSER_SIZE=$(USER_SIZE)) \
+	    $(if $(NVDS_SIZE),-DNVDS_SIZE=$(NVDS_SIZE)) \
+	    $(if $(URAM_START),-DURAM_START=$(URAM_START)) \
+	    $(if $(URAM_SIZE),-DURAM_SIZE=$(URAM_SIZE)) \
+	    $(if $(MPR_SIZE),-DMPR_SIZE=$(MPR_SIZE))" \
+	--map --list=$(APP).map \
+	--info unused \
+	$(LDFLAGS)
+else
+ASFLAGS := \
+	-mcpu=cortex-m0 -mthumb -g \
+	$(ASFLAGS)
+
+C_ONLY_FLAGS += -std=c17 \
+	-Wold-style-declaration \
+	-Wmissing-parameter-type \
+
+CFLAGS := \
+	-Os \
+	-Wformat-signedness -Wsuggest-attribute=noreturn \
+	$(CFLAGS)
+
+LDFLAGS := \
+	-Wl,--fatal-warnings,--warn-common -mthumb -mcpu=cortex-m0 \
+	$(if $(FLASHROM),,-nostartfiles) -Wl,--gc-sections \
+	$(if $(COVERAGE),-fprofile-arcs) \
+	$(if $(DEBUG),,-flto) \
+	-L$(USER_DIR) \
+	$(if $(FLASH_SIZE),-Wl$(comma)--defsym=FLASH_SIZE=$(FLASH_SIZE)) \
+	$(if $(USER_SIZE),-Wl$(comma)--defsym=USER_SIZE=$(USER_SIZE)) \
+	$(if $(NVDS_SIZE),-Wl$(comma)--defsym=NVDS_SIZE=$(NVDS_SIZE)) \
+	$(if $(URAM_START),-Wl$(comma)--defsym=URAM_START=$(URAM_START)) \
+	$(if $(URAM_SIZE),-Wl$(comma)--defsym=URAM_SIZE=$(URAM_SIZE)) \
+	$(if $(MPR_SIZE),-Wl$(comma)--defsym=MPR_SIZE=$(MPR_SIZE)) \
+	-Xlinker -Map=$(APP).map \
+	$(LDFLAGS)
+endif
+
+CFLAGS := \
+	-mcpu=cortex-m0 -mthumb -mlong-calls \
+	-fms-extensions -ffunction-sections -fdata-sections \
+	-fno-strict-aliasing -g3 $(if $(DEBUG),,-flto) \
+	-Wall -Wchar-subscripts -Wformat \
+	-Wuninitialized -Winit-self \
+	-Wignored-qualifiers -Wswitch-default -Wswitch-enum -Wunused -Wundef \
+	-Wnull-dereference -Wdouble-promotion \
+	-Wwrite-strings -Wshadow -Wmissing-declarations -Wcast-qual \
+	-Wpointer-arith \
+	$(C_ONLY_FLAGS) -Werror \
+	-I$(INCLUDE_DIR)/armgcc \
+	$(CFLAGS)
+
+CXXFLAGS := $(filter-out $(C_ONLY_FLAGS),$(CFLAGS)) -std=c++17
+DEP_FLAGS := -MD
+endif
+
+ifdef USER_SIZE
+CFLAGS += -DUSER_SIZE=$(USER_SIZE)
+endif
+
+ifdef MPR_SIZE
+CFLAGS += -DMPR_SIZE=$(MPR_SIZE)
+endif
+
+ifdef PMU_CFG
+CFLAGS += -D$(PMU_CFG)
+ifeq ($(filter-out VBAT_GT_1p8V_VDDIO_EXT VBAT_GT_1p8V_VDDIO_INT VBAT_LE_1p8V NO_VBAT,$(PMU_CFG)),)
+else
+$(warning Unknown PMU_CFG $(PMU_CFG))
+endif
+endif # PMU_CFG
+
+define o_from_s_RULE
+$(notdir $(1:%.s=%.o)): $(1) $(ASSEMBLE)
+	$(ASSEMBLE) $(ASFLAGS) $$< -o $$@
+endef
+$(foreach src,$(S_SRCS),$(eval $(call o_from_s_RULE,$(src))))
+
+define o_from_c_RULE
+$(notdir $(1:%.c=%.o)): $(1) $(firstword $(COMPILE)) \
+    | c_bindings
+	$(COMPILE) $(CFLAGS) $$(if $$(filter $(COVERAGE),\
+	    $$(basename $$@)),-fprofile-arcs -ftest-coverage) \
+	    $(DEP_FLAGS) -c $$< -o $$@
+ifneq (,$(filter -DAUTO_TEST,$(CFLAGS)))
+	-$$(if $$(filter $(ABSTRACT_FILES),$$(<F)),\
+	    ! grep $$(addprefix -e ,$(BLE_ONLY_INCLUDES)) $$(@:%.o=%.d))
+endif
+endef
+$(foreach src,$(C_SRCS),$(eval $(call o_from_c_RULE,$(src))))
+
+define o_from_cxx_RULE
+$(notdir $(basename $1).o): $(1) $(firstword $(CXX)) \
+    | cpp_bindings
+	$(CXX) $(CXXFLAGS) $$(if $$(filter $(COVERAGE),\
+	    $$(basename $$@)),-fprofile-arcs -ftest-coverage) \
+	    $(DEP_FLAGS) -c $$< -o $$@
+endef
+$(foreach src,$(CXX_SRCS),$(eval $(call o_from_cxx_RULE,$(src))))
+
+-include *.d
+
+.PHONY: c_bindings cpp_bindings
+c_bindings cpp_bindings::
+
+ifdef RUST_LIBS
+RUST_TARGET := thumbv6m-none-eabi
+
+define lib_from_rust_TEMPLATE
+$(eval A := $1/target/$(RUST_TARGET)/$(if $(DEBUG),debug,release)/lib$1.rlib)
+OBJS += $A
+.PHONY: $A
+$A:
+	$(if $(wildcard $1_wrapper.h),bindgen --use-core --ctypes-prefix cty \
+	    -o $1_bindings.rs $1_wrapper.h -- \
+	    --sysroot=$(BINUTILS_DIR)/../arm-none-eabi \
+	    -target $(RUST_TARGET) $(filter-out -W%,$(CFLAGS)))
+	cd $1 && cargo build --target $(RUST_TARGET) $(if $(DEBUG),,--release)
+c_bindings::
+	cbindgen -l c -o $1_bindings.h $1
+cpp_bindings::
+	cbindgen -l c++ -o $1_bindings.hpp $1
+clean::
+	cd $1 && cargo clean
+	rm -f $1/Cargo.lock
+	rm -f $1_bindings.rs $1_bindings.h $1_bindings.hpp
+$(eval $(if $(filter undefine,$(.FEATURES)),undefine A,A :=))
+endef # lib_from_rust_TEMPLATE
+$(foreach l,$(RUST_LIBS),$(eval $(call lib_from_rust_TEMPLATE,$l)))
+endif # RUST_LIBS
+
+ifneq (,$(strip $(CXX_SRCS)))
+LINK := $(CXX)
+endif
+
+EXCLUDE_APP_SRC=$(notdir $(EXCL_APP_LIB_ALL))
+EXCLUDE_APP_OBJ+=$(patsubst %.c,%.o,$(EXCLUDE_APP_SRC))
+
+ifdef FLASHROM
+$(APP).elf: $(OBJS) $(firstword $(LINK))
+	$(OBJCOPY) $(if $(COVERAGE),--redefine-syms $(ROM_DIR)/gcov.redef) \
+	    --redefine-syms $(ROM_DIR)/user.redef \
+	    $(LIB_DIR)/lib$(FLASHROM)$(if $(DEBUG),_dbg).a flashrom.a
+	$(LINK) -Tcmsdk_cm0_flash_rom.ld $(LDFLAGS) $(OBJS) $(LIBS) -o $@ \
+	    -Wl,-whole-archive flashrom.a -Wl,-no-whole-archive
+else # FLASHROM
+$(LIB_DIR)/app_lib/$(APP)$(if $(DEBUG),_dbg).a: $(OBJS)
+	mkdir -p $(@D)
+	$(AR) rcD --plugin=$(PLUGIN) $@ $(filter-out $(EXCLUDE_APP_OBJ),$(OBJS))
+	$(RANLIB) -D --plugin=$(PLUGIN) $@
+	$(AR) t $@
+
+$(APP).elf: $(OBJS) $(firstword $(LINK)) \
+	$(if $(BUILD_APP_LIB),$(LIB_DIR)/app_lib/$(APP)$(if $(DEBUG),_dbg).a)
+ifeq ($(MAKECMDGOALS),build_info)
+	@echo IDE_LINK_CMD:
+endif
+	$(LINK) $(LDFLAGS) $(OBJS) $(LIBS) -o $@
+endif # FLASHROM
+
+ifeq ($(TOOLSET),ARM)
+$(APP).bin: $(APP).elf
+	$(ARM_DIR)/fromelf --bin --output=$@ $<
+
+$(APP).ihex: $(APP).elf
+	$(ARM_DIR)/fromelf --i32 --output=$@ $<
+else
+$(APP).bin: $(APP).elf $(OBJCOPY)
+	$(OBJCOPY) -O binary $< $@
+
+$(APP).ihex: $(APP).elf $(OBJCOPY)
+	$(OBJCOPY) -O ihex $< $@
+endif
+
+$(APP).bo: $(APP).bin $(OBJCOPY)
+	$(OBJCOPY) -I binary -O elf32-littlearm -B arm --rename-section .data=.rodata,alloc,load,readonly,data,contents $< $@
+
+$(APP).hex: $(APP).ihex $(OBJCOPY)
+	$(OBJCOPY) -O verilog $< $@
+
+$(APP).asm: $(APP).elf $(OBJDUMP)
+	$(OBJDUMP) -d $< >$@
+
+.PHONY: program
+program: $(APP).elf reset_target
+	$(OPENOCD) -c "init; verify_rom_version; sydney_load_flash $< $(if $(FLASH_START),$(FLASH_START) $(if $(NVDS_START),$(NVDS_START))); exit"
+
+.PHONY: program_all
+program_all: $(if $(flash_nvds.data),build_flash_nvds push_flash_nvds) program
+
+.PHONY: verify
+verify: $(APP).elf reset_target
+	$(OPENOCD) -c "init; verify_rom_version; sydney_verify_flash $<; exit"
+
+.PHONY: run.ram
+run.ram: $(APP).bin reset_target
+	$(eval RUN_IN_RAM_HOOK:=$(shell $(NM) rom.elf | grep '\<run_in_ram_hook\>' | awk '{print "0x" $$1}'))\
+	$(OPENOCD) -c "init; verify_rom_version; catch {sydney_erase_flash}; load_ram_image $(RUN_IN_RAM_HOOK) $< $(if $(URAM_START),$(URAM_START),0x20014000); resume $(if $(URAM_START),$(URAM_START),0x20014000); exit"
+
+.PHONY: run.flash
+run.flash: $(APP).elf reset_target
+	$(OPENOCD) -c "init; verify_rom_version; sydney_load_flash $< \
+		$(if $(FLASH_START),$(FLASH_START) $(if $(PRESERVE_USER),$(USER_START),$(if $(NVDS_START),$(NVDS_START)) $(if $(FLASHOFF),$(FLASHOFF)))); set _RESET_HARD_ON_EXIT 1; exit"
+
+.PHONY: run
+run: run.$(if $(RUN_IN_RAM),ram,flash)
+
+.PHONY: run_all
+run_all: $(if $(flash_nvds.data),build_flash_nvds push_flash_nvds) run
+
+.PHONY: pull_core
+pull_core: check_openocd
+	$(OPENOCD) -c "init; get_coredump; exit"
+
+.PHONY: gcov
+gcov:
+	$(GCOV) -ab *.gcda
+
+.PHONY: gdb
+gdb: $(if $(NO_REBUILD),,$(APP).elf) $(GDB)
+	$(GDB) -x $(GDB_CFG_DIR)/atmx2.gdb $(APP).elf $(GDB_EXTRA)
+
+.PHONY: gdb_target
+gdb_target: $(if $(NO_REBUILD),,$(APP).elf) $(GDB)
+	$(GDB) -x $(GDB_CFG_DIR)/atmx2.gdb $(APP).elf $(GDB_EXTRA) -ex "target remote $(GDB_REMOTE)"
+
+.PHONY: keil_gcc_gen
+keil_gcc_gen:
+	python3 $(IDE_PRJ_GEN) $(CURDIR) -s ATMx2 -m $(MAKEOVERRIDES)
+
+.PHONY: keil_arm_gen
+keil_arm_gen:
+	python3 $(IDE_PRJ_GEN) $(CURDIR) -s ATMx2 -i keil_arm -m $(MAKEOVERRIDES)
+
+.PHONY: ses_gen
+ses_gen:
+	python3 $(IDE_PRJ_GEN) $(CURDIR) -s ATMx2 -i ses -m $(MAKEOVERRIDES)
+
+.PHONY: iar_gen
+iar_gen:
+	python3 $(IDE_PRJ_GEN) $(CURDIR) -s ATMx2 -i iar -m $(MAKEOVERRIDES)
+
+.PHONY: build_info
+build_info: all
+	@echo IDE_S_SRCS = $(S_SRCS)
+	@echo IDE_C_SRCS = $(C_SRCS)
+	@echo IDE_ASFLAGS = $(ASFLAGS)
+	@echo IDE_CFLAGS = $(CFLAGS)
+	@echo IDE_LIBS = $(LIBS)
+
+.PHONY: clean
+clean::
+	rm -f $(APP).{bin,elf,asm}
+	rm -f flashrom.a
+	-rm -f *.d *.o
+	-rm -f *.gcno *.gcda
+ifndef COVERAGE
+	-rm -f *.gcov
+endif
+	-rm -f *.map
+
+ARCH_FLASH_TYPE := bin
+
+ifeq ($(ARCH_FLASH_TYPE),bin)
+# TODO: figure out a solution to avoid duplicating these platform-dependent
+# values from <PLATFORM_DIR>/openocd/*_flash.tcl in Make.  May require a change
+# in archive format.
+ATM_ISP_LOAD_FLASH_XARGS := \
+	$(if $(FLASH_START),$(FLASH_START),0x0) \
+	$(if $(NVDS_START),$(NVDS_START),0x78000) \
+	0x10000000 \
+	$(if $(MPR_START), -mpr_start $(MPR_START)) \
+	$(if $(MPR_SIZE), -mpr_size $(MPR_SIZE)) \
+	$(if $(MPR_LOCK_SIZE), -mpr_lock_size $(MPR_LOCK_SIZE))
+else ifeq ($(ARCH_FLASH_TYPE),elf)
+ATM_ISP_LOAD_FLASH_XARGS := $(if $(FLASH_START),$(FLASH_START) $(if $(NVDS_START),$(NVDS_START)))
+else
+$(error Unknown ARCH_FLASH_TYPE $(ARCH_FLASH_TYPE))
+endif
+
+.PHONY: arch_add_flash
+arch_add_flash: $(APP).$(ARCH_FLASH_TYPE)
+	$(call ATM_ISP_LOAD,$< $(ATM_ISP_LOAD_FLASH_XARGS),Flash)
+
+build_archive: arch_add_flash
+
+.PHONY: info
+info: $(APP).elf $(SIZE)
+	$(SIZE) $<
+
+include $(COMMON_USER_DIR)/layout_info.mk
+
+endif # __APP_MK__
diff --git a/platform/atm2/ATM22xx-x1x/user/cmsdk_cm0_flash_rom.ld b/platform/atm2/ATM22xx-x1x/user/cmsdk_cm0_flash_rom.ld
new file mode 100644
index 0000000..274ab04
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/user/cmsdk_cm0_flash_rom.ld
@@ -0,0 +1,17 @@
+/*
+ * cmsdk_cm0_flash_rom.ld
+ * Linker script for Sydney FLASHROM
+ *
+ * Copyright (C) Atmosic 2018-2019
+ */
+
+INCLUDE "lib-nosys.ld"
+INCLUDE "memory_flash_rom.ld"
+
+__NVDS_Flash = ORIGIN(NVDS);
+__NVDS_FlashEnd = ORIGIN(NVDS) + LENGTH(NVDS);
+
+__User_Flash = ORIGIN(USER);
+__User_FlashEnd = ORIGIN(USER) + LENGTH(USER);
+
+INCLUDE "sections.ld"
diff --git a/platform/atm2/ATM22xx-x1x/user/common.mk b/platform/atm2/ATM22xx-x1x/user/common.mk
new file mode 100644
index 0000000..23d78ef
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/user/common.mk
@@ -0,0 +1,44 @@
+
+ifndef __COMMON_MK__
+__COMMON_MK__ = 1
+
+# First target
+.PHONY: all
+all:
+
+.PHONY: FORCE
+FORCE:
+
+PLATFORM_DIR := $(realpath $(dir $(patsubst %/,%,$(dir $(lastword $(filter-out $(lastword $(MAKEFILE_LIST)), $(MAKEFILE_LIST))))))/../..)
+TOP_DIR := $(realpath $(PLATFORM_DIR)/../../../)
+COMMON_USER_DIR := $(PLATFORM_DIR)/user
+USER_DIR := $(PLATFORM_DIR)/user
+BLE_APP_DIR := $(PLATFORM_DIR)/app
+DRIVER_DIR := $(PLATFORM_DIR)/driver
+GDB_CFG_DIR := $(PLATFORM_DIR)/gdb
+INCLUDE_DIR := $(PLATFORM_DIR)/include
+OPENOCD_CFG_DIR := $(PLATFORM_DIR)/openocd
+BLE_PRF_DIR := $(PLATFORM_DIR)/profiles
+ROM_DIR := $(PLATFORM_DIR)/rom
+PLAT_TOOLS_DIR := $(PLATFORM_DIR)/tools
+LIB_DIR := $(PLATFORM_DIR)/lib
+EXAMPLE_DIR := $(PLATFORM_DIR)/examples
+
+to_upper = $(shell echo $1 | tr '[:lower:]' '[:upper:]')
+
+wdog_val = $(shell printf "0x%08x" `expr $1 \* 16000000`)
+
+wdog_tag = $(shell printf "%02x " "$$(( $(call wdog_val,$1) & 0xFF ))" ; \
+	    printf "%02x " "$$(( ($(call wdog_val,$1) & 0xFF00)  >> 8 ))" ; \
+	    printf "%02x " "$$(( ($(call wdog_val,$1) & 0xFF0000) >> 16))" ; \
+	    printf "%02x" "$$(( ($(call wdog_val,$1) & 0xFF000000) >> 24))" )
+
+PLATFORM_NAME := $(notdir $(PLATFORM_DIR))
+PLATFORM_FAMILY := $(notdir $(realpath $(PLATFORM_DIR)/..))
+
+BOARD ?= m2221
+ifneq (,$(filter-out m2201 m2202 m2221 m2231 m2251 m3201 m3202 m3221 m3231 x2xx_emu x2xx_mp,$(BOARD)))
+    $(error "usage: make $(MAKECMDGOALS) BOARD=<m2201|m2202|m2221|m2231|m2251|m3201|m3202|m3221|m3231")
+endif
+
+endif # __COMMON_MK__
diff --git a/platform/atm2/ATM22xx-x1x/user/flash_program.sh b/platform/atm2/ATM22xx-x1x/user/flash_program.sh
new file mode 100644
index 0000000..ed479ca
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/user/flash_program.sh
@@ -0,0 +1,8 @@
+#!/bin/bash
+
+echo ""
+echo "Flashing program from directory $1"
+echo ""
+
+[ -d $1 ] && cd $1 && make program
+
diff --git a/platform/atm2/ATM22xx-x1x/user/framework.mk b/platform/atm2/ATM22xx-x1x/user/framework.mk
new file mode 100644
index 0000000..a2caa24
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/user/framework.mk
@@ -0,0 +1,19 @@
+
+ifndef __FRAMEWORK_MK__
+__FRAMEWORK_MK__ = 1
+
+CFLAGS += -DCFG_FRAMEWORK
+LIBRARIES += framework_lib porting_ble ble_common
+
+# Add common framework modules
+ifdef FRAMEWORK_MODULES
+LIBRARIES += ble_module ble_task $(FRAMEWORK_MODULES)
+endif
+
+ifneq (,$(filter at_cmd,$(LIBRARIES)))
+include $(COMMON_USER_DIR)/atcmds.mk
+endif
+
+include $(COMMON_USER_DIR)/app.mk
+
+endif # __FRAMEWORK_MK__
diff --git a/platform/atm2/ATM22xx-x1x/user/layout_info.mk b/platform/atm2/ATM22xx-x1x/user/layout_info.mk
new file mode 100644
index 0000000..aeb8d4d
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/user/layout_info.mk
@@ -0,0 +1,56 @@
+
+ifndef __LAYOUT_INFO_MK__
+__LAYOUT_INFO_MK__ = 1
+
+.PHONY: layout_info
+layout_info:
+	@echo "*────────────────────* $(FLASH_START)"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+	@echo "│░░░░░░UFLASH░░░░░░░░│($(if $(UFLASH_SIZE),$(UFLASH_SIZE),Default))"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+ifdef USER_START
+	@echo "├────────────────────┤ $(USER_START)"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+	@echo "│░░░░░░░░USER░░░░░░░░│($(USER_SIZE))"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+endif
+	@echo "├────────────────────┤ $(NVDS_START)"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+	@echo "│░░░░░░░░NVDS░░░░░░░░│($(if $(NVDS_SIZE),$(NVDS_SIZE),Default))"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+ifneq (,$(filter OTAPS,$(PROFILES)))
+ifdef MPR_START
+	@echo "├────────────────────┤ $(shell printf "0x%x" $$(($(NVDS_START) + $(NVDS_SIZE))))"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+	@echo "│░░░░░░reserved░░░░░░│($(MPR_SIZE))"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+	@echo "│░░░░░░Bank 0░░░░░░░░│"
+	@echo "├====================┤ $(FLASH_SIZE)"
+	@echo ".░░░░░░Bank 1░░░░░░░░."
+	@echo ".░░░░░░░░░░░░░░░░░░░░."
+	@echo ".░░░░░░░░░░░░░░░░░░░░."
+	@echo ".░░░░░░░░░░░░░░░░░░░░."
+	@echo "├────────────────────┤ $(MPR_START)"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+	@echo "│░░░░░░░░MPR░░░░░░░░░│($(MPR_SIZE))"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+	@echo "*────────────────────* $(shell printf "0x%x" $$(($(FLASH_SIZE)*2)))"
+else
+	@echo "*────────────────────* $(FLASH_SIZE)"
+endif # MPR_START
+else
+ifdef MPR_START
+	@echo "├────────────────────┤ $(MPR_START)"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+	@echo "│░░░░░░░░MPR░░░░░░░░░│($(MPR_SIZE))"
+	@echo "│░░░░░░░░░░░░░░░░░░░░│"
+endif # MPR_START
+	@echo "*────────────────────* $(FLASH_SIZE)"
+endif # OTAPS
+
+endif # __LAYOUT_INFO_MK__
diff --git a/platform/atm2/ATM22xx-x1x/user/lib-nosys.ld b/platform/atm2/ATM22xx-x1x/user/lib-nosys.ld
new file mode 100644
index 0000000..64e5874
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/user/lib-nosys.ld
@@ -0,0 +1,2 @@
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
diff --git a/platform/atm2/ATM22xx-x1x/user/memory_flash_rom.ld b/platform/atm2/ATM22xx-x1x/user/memory_flash_rom.ld
new file mode 100644
index 0000000..979ce8e
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/user/memory_flash_rom.ld
@@ -0,0 +1,42 @@
+/*
+ *-----------------------------------------------------------------------------
+ * The confidential and proprietary information contained in this file may
+ * only be used by a person authorised under and to the extent permitted
+ * by a subsisting licensing agreement from ARM Limited.
+ *
+ *            (C) COPYRIGHT 2010-2013 ARM Limited.
+ *                ALL RIGHTS RESERVED
+ *
+ * This entire notice must be reproduced on all copies of this file
+ * and copies of this file may only be made by a person if such person is
+ * permitted to do so under the terms of a subsisting license agreement
+ * from ARM Limited.
+ *
+ *      SVN Information
+ *
+ *      Checked In          : $Date: $
+ *
+ *      Revision            : $Revision: $
+ *
+ *      Release Information : Cortex-M System Design Kit-r1p0-00rel0
+ *-----------------------------------------------------------------------------
+ */
+/* Linker script to configure memory regions.
+ * Need modifying for a specific board.
+ *   FLASH.ORIGIN: starting address of flash
+ *   FLASH.LENGTH: length of flash
+ *   RAM.ORIGIN: starting address of RAM bank 0
+ *   RAM.LENGTH: length of RAM bank 0
+ */
+
+HIDDEN(USER_LEN = DEFINED(USER_SIZE) ? USER_SIZE : 0);
+HIDDEN(NVDS_LEN = DEFINED(NVDS_SIZE) ? NVDS_SIZE : 0x2000);
+HIDDEN(FLASH_LEN = (DEFINED(FLASH_SIZE) ? FLASH_SIZE : 0x80000) - NVDS_LEN - USER_LEN);
+
+MEMORY
+{
+  FLASH (rx)  : ORIGIN = 0x00000000, LENGTH = FLASH_LEN
+  USER (rwx)  : ORIGIN = 0x0000000 + FLASH_LEN, LENGTH = USER_LEN
+  NVDS (rwx)  : ORIGIN =  FLASH_LEN + USER_LEN, LENGTH = NVDS_LEN
+  RAM (rwx)   : ORIGIN = 0x20000000, LENGTH = 0x18000 /*  96K */
+}
diff --git a/platform/atm2/ATM22xx-x1x/user/nvds.mk b/platform/atm2/ATM22xx-x1x/user/nvds.mk
new file mode 100644
index 0000000..a051928
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/user/nvds.mk
@@ -0,0 +1,503 @@
+################################################################################
+#
+# @file nvds.mk
+#
+# @brief NVDS make helper
+#
+# Copyright (C) Atmosic 2018-2022
+#
+################################################################################
+
+ifndef __NVDS_MK__
+__NVDS_MK__ = 1
+
+include $(COMMON_USER_DIR)/tools.mk
+include $(ROM_DIR)/rom.mk
+
+DEF_MPR_BIN_FILE := flash_mpr_nvds.bin
+
+ifdef MPR_SIZE
+ifneq ($(shell printf "%d" $$(($(MPR_SIZE)&0x0FFF))),0)
+$(error "MPR_SIZE is not at 4K boundary")
+endif
+
+ifndef FLASH_SIZE
+$(error "usage: Need to compile with FLASH_SIZE. ex: make FLASH_SIZE=0x40000 MPR_SIZE=0x1000")
+endif #FLASH_SIZE
+endif
+
+ifneq ($(or $(MPR_SIZE),$(USER_SIZE),$(FLASH_SIZE),$(NVDS_SIZE)),)
+FLASH_SIZE ?= 0x80000
+NVDS_SIZE ?= 0x8000
+MPR_SIZE ?= 0
+USER_SIZE ?= 0
+FLASH_MEM_BANK ?= "bank0"
+FLASH_START := 0
+
+ifeq ($(MPR_SIZE),0)
+NVDS_START := $(shell printf "0x%x" $$(($(FLASH_SIZE) - $(NVDS_SIZE))))
+else
+ifneq (,$(filter OTAPS,$(PROFILES)))
+MPR_START := $(shell printf "0x%x" $$(($(FLASH_SIZE)*2 - $(MPR_SIZE))))
+NVDS_START := $(shell printf "0x%x" $$(($(FLASH_SIZE) - $(MPR_SIZE) - $(NVDS_SIZE))))
+else
+MPR_START := $(shell printf "0x%x" $$(($(FLASH_SIZE) - $(MPR_SIZE))))
+NVDS_START := $(shell printf "0x%x" $$(($(MPR_START) - $(NVDS_SIZE))))
+endif #OTAPS
+endif #MPR_SIZE
+
+ifneq ($(USER_SIZE),0)
+USER_START := $(shell printf "0x%x" $$(($(NVDS_START) - $(USER_SIZE))))
+endif #USER_SIZE
+
+UFLASH_SIZE := $(shell printf "0x%x" $$(($(FLASH_SIZE) - $(NVDS_SIZE) - $(USER_SIZE) - $(MPR_SIZE))))
+endif
+
+TAG_DATA_DIR ?= tag_data
+
+.PHONY: all
+all:
+
+$(TAG_DATA_DIR)/%.bin: $(TAG_DATA_DIR)/%.tds
+	sed 's,#.*$$,,' < $< | tr -d '[:space:]' | xxd -ps -r > $@
+
+pre_bond_files := $(basename $(foreach file,$(TAG_DATA_DIR)/*,$(wildcard $(file)/*_pre_bond.tds)))
+ifdef pre_bond_files
+flash_nvds.data += $(foreach file,$(pre_bond_files),$(subst $(TAG_DATA_DIR)/,,$(file)))
+endif
+
+ifdef WDOG
+flash_nvds.data += b5-SYDNEY_TAG_WATCHDOG/wdog
+otp_nvds.data += b5-SYDNEY_TAG_WATCHDOG/wdog
+endif
+
+$(TAG_DATA_DIR)/18-PROG_DELAY:
+	mkdir -p $@
+
+.PRECIOUS: $(TAG_DATA_DIR)/18-PROG_DELAY/%.tds
+$(TAG_DATA_DIR)/18-PROG_DELAY/%.tds: | $(TAG_DATA_DIR)/18-PROG_DELAY
+	echo "# Programing delay (margin for programing the baseband in advance of each activity in half-slots)" > $@
+	echo $(18-PROG_DELAY.$(@F)) >> $@
+
+ifeq ($(filter 18-PROG_DELAY/%,$(flash_nvds.data)),)
+18-PROG_DELAY.default.tds := "04" # 4 half slots (1250us)
+flash_nvds.data += 18-PROG_DELAY/default
+endif
+
+clean::
+	rm -f $(TAG_DATA_DIR)/18-PROG_DELAY/default.tds
+
+$(TAG_DATA_DIR)/2e-SLEEP_ALGO_DUR:
+	mkdir -p $@
+
+.PRECIOUS: $(TAG_DATA_DIR)/2e-SLEEP_ALGO_DUR/%.tds
+$(TAG_DATA_DIR)/2e-SLEEP_ALGO_DUR/%.tds: | $(TAG_DATA_DIR)/2e-SLEEP_ALGO_DUR
+	echo $(2e-SLEEP_ALGO_DUR.$(@F)) > $@
+
+ifeq ($(filter 2e-SLEEP_ALGO_DUR/%,$(flash_nvds.data)),)
+2e-SLEEP_ALGO_DUR.sleep_algo.tds := "F4 01" # 500 half-us (250 us)
+flash_nvds.data += 2e-SLEEP_ALGO_DUR/sleep_algo
+otp_nvds.data += 2e-SLEEP_ALGO_DUR/sleep_algo
+endif
+
+clean::
+	rm -f $(TAG_DATA_DIR)/2e-SLEEP_ALGO_DUR/sleep_algo.tds
+
+ifdef LPC_RCOS
+$(TAG_DATA_DIR)/0d-EXT_WAKEUP_TIME:
+	mkdir -p $@
+
+.PRECIOUS: $(TAG_DATA_DIR)/0d-EXT_WAKEUP_TIME/%.tds
+$(TAG_DATA_DIR)/0d-EXT_WAKEUP_TIME/%.tds: | $(TAG_DATA_DIR)/0d-EXT_WAKEUP_TIME
+	echo "# 9ms in us" > $@
+	echo $(0d-EXT_WAKEUP_TIME.$(@F)) > $@
+
+$(TAG_DATA_DIR)/0e-OSC_WAKEUP_TIME:
+	mkdir -p $@
+
+.PRECIOUS: $(TAG_DATA_DIR)/0e-OSC_WAKEUP_TIME/%.tds
+$(TAG_DATA_DIR)/0e-OSC_WAKEUP_TIME/%.tds: | $(TAG_DATA_DIR)/0e-OSC_WAKEUP_TIME
+	echo "# 9ms in us" > $@
+	echo $(0e-OSC_WAKEUP_TIME.$(@F)) > $@
+
+$(TAG_DATA_DIR)/2b-SLEEP_ADJ:
+	mkdir -p $@
+
+.PRECIOUS: $(TAG_DATA_DIR)/2b-SLEEP_ADJ/%.tds
+$(TAG_DATA_DIR)/2b-SLEEP_ADJ/%.tds: | $(TAG_DATA_DIR)/2b-SLEEP_ADJ
+	echo "# Number of half slots (312.5us)" > $@
+	echo $(2b-SLEEP_ADJ.$(@F)) > $@
+
+0d-EXT_WAKEUP_TIME.no_32KHz_xtal.tds := "28 23"
+0e-OSC_WAKEUP_TIME.no_32KHz_xtal.tds := "28 23"
+2b-SLEEP_ADJ.no_32KHz_xtal.tds := "02 00 00 00"
+
+flash_nvds.data += 0d-EXT_WAKEUP_TIME/no_32KHz_xtal \
+    0e-OSC_WAKEUP_TIME/no_32KHz_xtal \
+    2b-SLEEP_ADJ/no_32KHz_xtal \
+
+clean::
+	rm -f $(TAG_DATA_DIR)/0d-EXT_WAKEUP_TIME/no_32KHz_xtal.tds
+	rm -f $(TAG_DATA_DIR)/0e-OSC_WAKEUP_TIME/no_32KHz_xtal.tds
+	rm -f $(TAG_DATA_DIR)/2b-SLEEP_ADJ/no_32KHz_xtal.tds
+endif # LPC_RCOS
+
+ifdef USER_BD_ADDR
+flash_nvds.data += 01-BD_ADDRESS/user
+
+$(TAG_DATA_DIR)/01-BD_ADDRESS:
+	mkdir -p $@
+
+.PHONY: $(TAG_DATA_DIR)/01-BD_ADDRESS/user.tds
+$(TAG_DATA_DIR)/01-BD_ADDRESS/user.tds: | $(TAG_DATA_DIR)/01-BD_ADDRESS
+	echo $(USER_BD_ADDR) > $@
+endif
+
+$(TAG_DATA_DIR)/b3-FLASH_POWERUP_DELAY:
+	mkdir -p $@
+
+.PRECIOUS: $(TAG_DATA_DIR)/b3-FLASH_POWERUP_DELAY/%.tds
+$(TAG_DATA_DIR)/b3-FLASH_POWERUP_DELAY/%.tds: | $(TAG_DATA_DIR)/b3-FLASH_POWERUP_DELAY
+	echo $(b3-FLASH_POWERUP_DELAY.$(@F)) > $@
+
+ifeq ($(filter b3-FLASH_POWERUP_DELAY/%,$(otp_nvds.data)),)
+# Use Macronix delay as the superset default value
+b3-FLASH_POWERUP_DELAY.macronix.tds := "1a 00" # 800us @ 32.768khz
+otp_nvds.data += b3-FLASH_POWERUP_DELAY/macronix
+endif
+
+clean::
+	rm -f $(TAG_DATA_DIR)/b3-FLASH_POWERUP_DELAY/macronix.tds
+
+ifdef NVDS_APP
+otp_nvds.data += b6-USER_APP/$(NVDS_APP)
+
+all: $(TAG_DATA_DIR)/b6-USER_APP/$(NVDS_APP).bin
+
+.PHONY: gdb_otp
+gdb_otp: $(TAG_DATA_DIR)/b6-USER_APP/$(NVDS_APP).elf $(TAG_DATA_DIR)/b6-USER_APP/rom.elf $(GDB)
+	$(GDB) -x $(GDB_CFG_DIR)/sydney.gdb $< -ex "add-symbol-file $(TAG_DATA_DIR)/b6-USER_APP/rom.elf"
+
+.PHONY: gdb_otp_target
+gdb_otp_target: $(TAG_DATA_DIR)/b6-USER_APP/$(NVDS_APP).elf $(TAG_DATA_DIR)/b6-USER_APP/rom.elf $(GDB)
+	$(GDB) -x $(GDB_CFG_DIR)/sydney.gdb $< -ex "add-symbol-file $(TAG_DATA_DIR)/b6-USER_APP/rom.elf" -ex "target remote $(GDB_REMOTE)"
+endif
+
+NVDS_APP_INCLUDES := \
+	$(INCLUDE_DIR) \
+	$(INCLUDE_DIR)/armgcc \
+	$(INCLUDE_DIR)/reg \
+	$(INCLUDE_DIR)/reg_ble \
+	$(INCLUDE_DIR)/arm \
+	$(INCLUDE_DIR)/ble \
+	$(DRIVER_DIR)/flash \
+	$(DRIVER_DIR)/spi \
+	$(DRIVER_DIR)/timer \
+	$(LIB_DIR)/atm_utils_c \
+	$(LIB_DIR)/atm_utils_math \
+	$(NVDS_APP_INCLUDES)
+
+$(TAG_DATA_DIR)/b6-USER_APP/rom.elf: $(ROM_DIR)/fw.elf
+	$(OBJCOPY) $(NVDS_APP_ROMCOPY_FLAGS) $< $@
+
+$(TAG_DATA_DIR)/b6-USER_APP/rom.o: $(TAG_DATA_DIR)/b6-USER_APP/rom.elf
+	$(COMMON_USER_DIR)/gen_symtab.py $< $@
+
+.PRECIOUS: $(TAG_DATA_DIR)/b6-USER_APP/%.elf
+$(TAG_DATA_DIR)/b6-USER_APP/%.elf: $(TAG_DATA_DIR)/b6-USER_APP/%.c \
+    $(TAG_DATA_DIR)/b6-USER_APP/rom.o
+	cd $(@D) && $(GCC) -mcpu=cortex-m0 -Os -mthumb -mlong-calls \
+	    -fms-extensions -ffunction-sections -fdata-sections \
+	    -fno-strict-aliasing -g3 -flto \
+	    -Wall -Wchar-subscripts -Wformat -Wformat-signedness \
+	    -Wuninitialized -Winit-self \
+	    -Wignored-qualifiers -Wswitch-default -Wswitch-enum -Wunused -Wundef \
+	    -Wnull-dereference -Wsuggest-attribute=noreturn -Wdouble-promotion \
+	    -Wwrite-strings -Wshadow -Wcast-qual \
+	    -Wpointer-arith \
+	    -Wstrict-prototypes -Wold-style-declaration -Wold-style-definition \
+	    -Wmissing-parameter-type \
+	    -std=c17 -Werror \
+	    -DCORTEX_M0 $(ROM_CFLAGS) -DCFG_USER \
+	    $(NVDS_APP_CFLAGS) \
+	    $(NVDS_APP_INCLUDES:%=-I%) \
+	    -MD $(<F) \
+	    -Wl,--fatal-warnings,--warn-common \
+	    -nostdlib -Wl,--gc-sections \
+	    -L$(ROM_DIR) -L$(USER_DIR) -Tcmsdk_cm0_user_ram.ld \
+	    $(if $(NVDS_APP_URAM_SIZE),-Wl$(comma)--defsym=URAM_SIZE=$(NVDS_APP_URAM_SIZE)) \
+	    $(word 2,$(^F)) \
+	    -o $(@F)
+-include $(TAG_DATA_DIR)/b6-USER_APP/*.d
+
+$(TAG_DATA_DIR)/b6-USER_APP/%.bin: $(TAG_DATA_DIR)/b6-USER_APP/%.elf
+	$(OBJCOPY) -O binary $< $@
+
+$(TAG_DATA_DIR)/b5-SYDNEY_TAG_WATCHDOG:
+	mkdir -p $@
+
+.PRECIOUS: $(TAG_DATA_DIR)/b5-SYDNEY_TAG_WATCHDOG/%.tds
+$(TAG_DATA_DIR)/b5-SYDNEY_TAG_WATCHDOG/%.tds: | $(TAG_DATA_DIR)/b5-SYDNEY_TAG_WATCHDOG
+	echo $(call wdog_tag,$(WDOG)) > $@
+
+clean::
+	rm -f $(TAG_DATA_DIR)/b5-SYDNEY_TAG_WATCHDOG/wdog.tds
+
+$(TAG_DATA_DIR)/fe-MEM_RMW:
+	mkdir -p $@
+
+.PRECIOUS: $(TAG_DATA_DIR)/fe-MEM_RMW/%.tds
+$(TAG_DATA_DIR)/fe-MEM_RMW/%.tds: | $(TAG_DATA_DIR)/fe-MEM_RMW
+	echo $($(@F)) > $@
+
+$(TAG_DATA_DIR)/fc-PMU_W:
+	mkdir -p $@
+
+.PRECIOUS: $(TAG_DATA_DIR)/fc-PMU_W/%.tds
+$(TAG_DATA_DIR)/fc-PMU_W/%.tds: | $(TAG_DATA_DIR)/fc-PMU_W
+	echo $($(@F)) > $@
+
+data2deps = $(addprefix $(TAG_DATA_DIR)/,$(addsuffix .bin,$1))
+data2opts = $(foreach data,$1,-t $(firstword $(subst -, ,$(data))) -d $(TAG_DATA_DIR)/$(data).bin)
+
+HARV_CFG := $(filter -DCFG_NONRF_HARV -DCFG_RF_HARV,$(CFLAGS))
+
+RECHARGE_BATT := $(filter -DCFG_RECHBATT,$(CFLAGS))
+ifneq ($(RECHARGE_BATT),)
+
+PMU13.tds := "093800000100"
+otp_nvds.data += fc-PMU_W/PMU13
+
+ifeq ($(PMU_CFG),VBAT_GT_1p8V_VDDIO_EXT)
+otp_nvds.hw := OTP_BATT_TYPE:RECHARGE_VBAT_GT_1p8V OTP_DISABLE_VDDIO
+else
+otp_nvds.hw := OTP_BATT_TYPE:RECHARGE_VBAT_GT_1p8V
+endif # VBAT_GT_1p8V_VDDIO_EXT
+
+SWREG_CTRL_5.tds := "0c141a0a4e01"
+SWREG_CTRL_6.tds := "0c184d0a8c09"
+otp_nvds.data += fc-PMU_W/SWREG_CTRL_5
+otp_nvds.data += fc-PMU_W/SWREG_CTRL_6
+
+else # RECHARGE_BATT
+
+ifneq ($(PMU_CFG),)
+ifeq ($(PMU_CFG),VBAT_GT_1p8V_VDDIO_EXT)
+otp_nvds.hw := OTP_BATT_TYPE:VBAT_GT_1p8V OTP_DISABLE_VDDIO
+else ifeq ($(PMU_CFG),VBAT_GT_1p8V_VDDIO_INT)
+otp_nvds.hw := OTP_BATT_TYPE:VBAT_GT_1p8V
+else ifeq ($(PMU_CFG),VBAT_LE_1p8V)
+otp_nvds.hw := OTP_BATT_TYPE:VBAT_LE_1p8V
+else ifeq ($(PMU_CFG),NO_VBAT)
+ifeq ($(HARV_CFG),)
+$(error No harvesting option specified when using NO_VBAT)
+endif
+otp_nvds.hw := OTP_BATT_TYPE:NO_VBAT
+else
+$(warning Unknown PMU_CFG $(PMU_CFG))
+endif
+endif # PMU_CFG
+
+endif # RECHARGE_BATT
+
+ifneq ($(HARV_CFG),)
+ifeq ($(HARV_CFG),-DCFG_NONRF_HARV)
+
+NONRF_HARV.tds := "09406E5a0000"
+otp_nvds.data += fc-PMU_W/NONRF_HARV
+
+ifneq ($(filter -DVSTORE_MAX_EQ_3p0V,$(CFLAGS)),)
+NONRF_VRANGE_1p1_1p4.tds := "0918211c1400"
+NONRF_VRANGE_1p2_1p5.tds := "0918215c1600"
+NONRF_VRANGE_1p3_1p6.tds := "0918219c1800"
+NONRF_VRANGE_1p4_1p7.tds := "091821dc1a00"
+NONRF_VRANGE_1p5_1p8.tds := "0918211c1d00"
+NONRF_VRANGE_1p6_1p9.tds := "0918215c1f00"
+else
+NONRF_VRANGE_1p1_1p4.tds := "0918211e1400"
+NONRF_VRANGE_1p2_1p5.tds := "0918215e1600"
+NONRF_VRANGE_1p3_1p6.tds := "0918219e1800"
+NONRF_VRANGE_1p4_1p7.tds := "091821de1a00"
+NONRF_VRANGE_1p5_1p8.tds := "0918211e1d00"
+NONRF_VRANGE_1p6_1p9.tds := "0918215e1f00"
+endif # VSTORE_MAX_EQ_3p0V
+
+ifneq ($(filter -DCFG_NONRF_VRANGE_1p1_1p4,$(CFLAGS)),)
+otp_nvds.data += fc-PMU_W/NONRF_VRANGE_1p1_1p4
+else ifneq ($(filter -DCFG_NONRF_VRANGE_1p2_1p5,$(CFLAGS)),)
+otp_nvds.data += fc-PMU_W/NONRF_VRANGE_1p2_1p5
+else ifneq ($(filter -DCFG_NONRF_VRANGE_1p3_1p6,$(CFLAGS)),)
+otp_nvds.data += fc-PMU_W/NONRF_VRANGE_1p3_1p6
+else ifneq ($(filter -DCFG_NONRF_VRANGE_1p4_1p7,$(CFLAGS)),)
+otp_nvds.data += fc-PMU_W/NONRF_VRANGE_1p4_1p7
+else ifneq ($(filter -DCFG_NONRF_VRANGE_1p5_1p8,$(CFLAGS)),)
+otp_nvds.data += fc-PMU_W/NONRF_VRANGE_1p5_1p8
+else ifneq ($(filter -DCFG_NONRF_VRANGE_1p6_1p9,$(CFLAGS)),)
+otp_nvds.data += fc-PMU_W/NONRF_VRANGE_1p6_1p9
+else
+$(error Voltage Range Config not defined in $(CFLAGS))
+endif # CFG_NONRF_VRANGE_XX_XX
+
+else # CFG_NONRF_HARV
+
+otp_nvds.hw += OTP_HARV_TYPE
+MDM_AGCCNTL_CLR_PEAKDET.tds := "306000500000000001000000"
+otp_nvds.data += fe-MEM_RMW/MDM_AGCCNTL_CLR_PEAKDET
+
+ifneq ($(filter -DVSTORE_MAX_EQ_3p0V,$(CFLAGS)),)
+PMU5.tds := "0918215c1f00"
+otp_nvds.data += fc-PMU_W/PMU5
+endif # VSTORE_MAX_EQ_3p0V
+
+endif # CFG_RF_HARV
+endif # HARV_CFG
+
+BRWNOUT_OPT := $(filter -DBRWNOUT_THR%,$(CFLAGS))
+ifdef BRWNOUT_OPT
+otp_nvds.hw += OTP_BROWNOUT_THR:$(BRWNOUT_OPT:-DBRWNOUT_THR%=%)
+endif
+
+ifneq ($(or $(otp_nvds.data),$(otp_nvds.hw)),)
+
+nvds_tool_otp_args = $(call data2opts,$(otp_nvds.data)) $(if $(otp_nvds.hw),$(addprefix -w ,$(otp_nvds.hw)))
+
+.PHONY: build_archive_otp_nvds
+build_archive_otp_nvds: $(NVDS_TOOL) $(call data2deps,$(otp_nvds.data))
+	$< -i $(nvds_tool_otp_args) -b -o otp_nvds.nvm
+
+.PHONY: rebuild_otp_nvds
+rebuild_otp_nvds: $(NVDS_TOOL) $(call data2deps,$(otp_nvds.data))
+	$< -i -r otp_nvds.nvm $(nvds_tool_otp_args) -b -o otp_nvds_new.nvm
+	mv -f otp_nvds.nvm otp_nvds_$(shell $(MD5SUM) otp_nvds.nvm | cut -d " " -f 1).nvm
+	mv otp_nvds_new.nvm otp_nvds.nvm
+
+otp_nvds.nvm:
+	@echo "ERROR: Use build_archive_otp_nvds/rebuild_otp_nvds to make otp_nvds.nvm before invoking build_archive"
+	@exit 1
+
+.PHONY: arch_add_otp_nvds
+arch_add_otp_nvds: otp_nvds.nvm
+	$(call ATM_ISP_LOAD,$<,OtpNvds)
+
+ifdef ADD_OTP_TO_ARCHIVE
+build_archive: arch_add_otp_nvds
+endif
+endif # otp_nvds.data
+
+NVDS_TOOL_F = $(if $(NVDS_SIZE),-f $(shell printf '%u' $(NVDS_SIZE)))
+NVDS_TOOL_MPR_F = $(if $(MPR_SIZE),-f $(shell printf '%u' $(MPR_SIZE)))
+
+ifdef flash_nvds.data
+.PHONY: build_flash_nvds
+build_flash_nvds: $(NVDS_TOOL) $(call data2deps,$(flash_nvds.data))
+	$< $(NVDS_TOOL_F) -b $(call data2opts,$(flash_nvds.data)) > flash_nvds.bin
+
+.PHONY: rebuild_flash_nvds
+rebuild_flash_nvds: $(NVDS_TOOL) $(call data2deps,$(flash_nvds.data))
+	$< $(NVDS_TOOL_F) -b -r flash_nvds.bin $(call data2opts,$(flash_nvds.data)) > flash_nvds_new.bin
+	mv -f flash_nvds.bin flash_nvds_$(shell $(MD5SUM) flash_nvds.bin | cut -d " " -f 1).bin
+	mv flash_nvds_new.bin flash_nvds.bin
+
+flash_nvds.bin:
+	@echo "ERROR: Use re/build_flash_nvds to make flash_nvds.bin before invoking build_archive"
+	@exit 1
+
+.PHONY: arch_add_flash_nvds
+arch_add_flash_nvds: flash_nvds.bin
+	$(call ATM_ISP_LOAD,$< $(if $(NVDS_START),$(NVDS_START) $(if $(NVDS_SIZE),$(NVDS_SIZE))),FlashNvds)
+
+build_archive: arch_add_flash_nvds
+endif # flash_nvds.data
+
+.PHONY: pull_otp_nvds
+pull_otp_nvds: reset_target
+	$(OPENOCD) -c "init; verify_rom_version; sydney_dump_nvm otp_nvds.nvm; exit"
+
+.PHONY: show_otp_nvds
+show_otp_nvds:
+	$(NVDS_TOOL) -i -r otp_nvds.nvm -v
+
+.PHONY: show_pretty_otp_nvds
+show_pretty_otp_nvds: $(NVDS_TOOL)
+	$(NVDS_TOOL) -i -r otp_nvds.nvm -p
+
+
+.PHONY: show_otp_hw_cfg
+show_otp_hw_cfg:
+	$(NVDS_TOOL) -i -r otp_nvds.nvm -v -N
+
+.PHONY: show_pretty_otp_hw_cfg
+show_pretty_otp_hw_cfg:
+	$(NVDS_TOOL) -i -r otp_nvds.nvm -p -N
+
+.PHONY: split_otp_nvds
+split_otp_nvds:
+	$(NVDS_TOOL) -i -r otp_nvds.nvm -S
+
+.PHONY: push_otp_nvds
+push_otp_nvds: reset_target
+	$(OPENOCD) -c "init; verify_rom_version; sydney_burn_nvm otp_nvds.nvm; sydney_verify_nvm otp_nvds.nvm; exit"
+
+.PHONY: pull_flash_nvds
+pull_flash_nvds: reset_target
+	$(OPENOCD) -c "init; verify_rom_version; sydney_dump_nvds flash_nvds.bin $(if $(NVDS_START),$(NVDS_START) $(if $(NVDS_SIZE),$(NVDS_SIZE) $(if $(FLASH_MEM_BANK),$(FLASH_MEM_BANK)))); exit"
+
+.PHONY: show_flash_nvds
+show_flash_nvds:
+	$(NVDS_TOOL) $(NVDS_TOOL_F) -r flash_nvds.bin -v
+
+.PHONY: show_pretty_flash_nvds
+show_pretty_flash_nvds:
+	$(NVDS_TOOL) $(NVDS_TOOL_F) -r flash_nvds.bin -p
+
+.PHONY: split_flash_nvds
+split_flash_nvds:
+	$(NVDS_TOOL) $(NVDS_TOOL_F) -r flash_nvds.bin -S
+
+.PHONY: erase_flash_nvds
+erase_flash_nvds: reset_target
+	$(OPENOCD) -c "init; verify_rom_version; sydney_erase_nvds $(if $(NVDS_START),$(NVDS_START) $(if $(NVDS_SIZE),$(NVDS_SIZE))); exit"
+
+.PHONY: push_flash_nvds
+push_flash_nvds: reset_target
+	$(OPENOCD) -c "init; verify_rom_version; sydney_load_nvds flash_nvds.bin $(if $(NVDS_START),$(NVDS_START) $(if $(NVDS_SIZE),$(NVDS_SIZE))); exit"
+
+ifdef MPR_START
+.PHONY: pull_mpr_nvds
+pull_mpr_nvds: reset_target
+	$(OPENOCD) -c "init; verify_rom_version; sydney_dump_nvds $(DEF_MPR_BIN_FILE) $(if $(MPR_START),$(MPR_START) $(if $(MPR_SIZE),$(MPR_SIZE))); exit"
+
+.PHONY: show_mpr_nvds
+show_mpr_nvds:
+	$(NVDS_TOOL) $(NVDS_TOOL_MPR_F) -r $(DEF_MPR_BIN_FILE) -v
+
+.PHONY: show_pretty_mpr_nvds
+show_pretty_mpr_nvds:
+	$(NVDS_TOOL) $(NVDS_TOOL_MPR_F) -r $(DEF_MPR_BIN_FILE) -p
+endif # MPR_START
+
+ifdef USER_START
+.PHONY: erase_user
+erase_user: check_openocd reset_target
+	$(OPENOCD) -c "init; verify_rom_version; sydney_erase_nvds $(USER_START) $(USER_SIZE); exit"
+endif
+
+ifndef APP
+.PHONY: iar_gen keil_arm_gen keil_gcc_gen ses_gen
+iar_gen: ide_not_support
+keil_arm_gen: ide_not_support
+keil_gcc_gen: ide_not_support
+ses_gen: ide_not_support
+ide_not_support:
+	@echo "NVDS only application doesn't support IDE project generation"
+endif
+
+.PHONY: clean
+clean::
+	-rm -f $(TAG_DATA_DIR)/*/*.bin
+	-rm -f $(TAG_DATA_DIR)/*/*_pre_bond.*
+	-rm -f $(TAG_DATA_DIR)/b6-USER_APP/*.o
+	-rm -f $(TAG_DATA_DIR)/b6-USER_APP/*.d
+	-rm -f $(TAG_DATA_DIR)/b6-USER_APP/*.elf
+
+endif # __NVDS_MK__
diff --git a/platform/atm2/ATM22xx-x1x/user/profiles.mk b/platform/atm2/ATM22xx-x1x/user/profiles.mk
new file mode 100644
index 0000000..ba43def
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/user/profiles.mk
@@ -0,0 +1,238 @@
+################################################################################
+#
+# @file profiles.mk
+#
+# @brief Common BLE profile build settings
+#
+# Copyright (C) Atmosic 2020-2021
+#
+################################################################################
+
+ifndef __PROFILE_MK__
+__PROFILE_MK__ = 1
+
+ifdef PROFILES
+# Enable the profiles framework
+DRIVERS += profiles
+
+# $1 - common part of profile name
+# $2 - client/server part of profile name
+# $3 - common directory ($1 if empty)
+# $4 - define (uppercase $1$2 if empty)
+define profile_TEMPLATE
+$(eval A := $(if $3,$3,$1))
+$(eval B := $(if $4,$4,$(call to_upper,$1$2)))
+ifneq ($(filter $B,$(PROFILES)),)
+C_SRCS += $(BLE_PRF_DIR)/$A/$1$2/src/$1$2.c \
+    $(wildcard $(BLE_PRF_DIR)/$A/$1$2/src/$1$2_task.c)
+INCLUDES += $(BLE_PRF_DIR)/$A $(BLE_PRF_DIR)/$A/$1$2/api
+CFLAGS += -DCFG_PRF_$B
+endif
+$(eval $(if $(filter undefine,$(.FEATURES)),undefine A,A :=))
+$(eval $(if $(filter undefine,$(.FEATURES)),undefine B,B :=))
+endef
+
+
+#
+# Standard profiles
+#
+
+# ANCSC Apple Notification Center Service Client
+$(eval $(call profile_TEMPLATE,ancs,c))
+
+# ANPC Alert Notification Client
+$(eval $(call profile_TEMPLATE,anp,c))
+# ANPS Alert Notification Server
+$(eval $(call profile_TEMPLATE,anp,s))
+
+# BASC Battery Service Client
+$(eval $(call profile_TEMPLATE,bas,c))
+# BASS Battery Service Server
+$(eval $(call profile_TEMPLATE,bas,s))
+
+# BLPC Blood Pressure collector
+$(eval $(call profile_TEMPLATE,blp,c))
+# BLPS Blood Pressure Sensor
+$(eval $(call profile_TEMPLATE,blp,s))
+
+# BCSC Body Composition Client
+$(eval $(call profile_TEMPLATE,bcs,c))
+# BCSS Body Composition Server
+$(eval $(call profile_TEMPLATE,bcs,s))
+
+# CGMC Continuous Glucose Monitoring Client
+$(eval $(call profile_TEMPLATE,cgm,c))
+# CGMS Continuous Glucose Monitoring Server
+$(eval $(call profile_TEMPLATE,cgm,s))
+
+# CPPC Cycling Power Client
+$(eval $(call profile_TEMPLATE,cpp,c))
+# CPPS Cycling Power Server
+$(eval $(call profile_TEMPLATE,cpp,s))
+
+# CSCPC Cycling Speed and Cadence Client
+$(eval $(call profile_TEMPLATE,cscp,c))
+# CSCPS Cycling Speed and Cadence Server
+$(eval $(call profile_TEMPLATE,cscp,s))
+
+# DISC Device Information Service Client
+$(eval $(call profile_TEMPLATE,dis,c))
+# DISS (Device Information Service) Server
+$(eval $(call profile_TEMPLATE,dis,s))
+
+# ENVC Environmental Sensing Client
+$(eval $(call profile_TEMPLATE,env,c))
+# ENVS Environmental Sensing Server
+$(eval $(call profile_TEMPLATE,env,s))
+
+# FMPL Find me locator
+$(eval $(call profile_TEMPLATE,find,l,,FMPL))
+# FMPT Find me target
+$(eval $(call profile_TEMPLATE,find,t,,FMPT))
+
+# GLPC Glucose Collector
+$(eval $(call profile_TEMPLATE,glp,c))
+# GLPS Glucose Sensor
+$(eval $(call profile_TEMPLATE,glp,s))
+
+# HOGPD HID over GATT Profile Device
+$(eval $(call profile_TEMPLATE,hogp,d))
+# HOGPBH HID Profile Boot Host
+$(eval $(call profile_TEMPLATE,hogp,bh))
+# HOGPRH HID over GATT Report Profile Host
+$(eval $(call profile_TEMPLATE,hogp,rh))
+
+# HRPC Heart Rate collector
+$(eval $(call profile_TEMPLATE,hrp,c))
+# HRPS Heart Rate Sensor
+$(eval $(call profile_TEMPLATE,hrp,s))
+
+# HTPC Health thermometer collector
+$(eval $(call profile_TEMPLATE,htp,c))
+# HTPT Health Thermometer
+$(eval $(call profile_TEMPLATE,htp,t))
+
+# IPSC Internet Protocol Support Profile Client
+$(eval $(call profile_TEMPLATE,ips,c))
+# IPSS Internet Protocol Support Profile Server
+$(eval $(call profile_TEMPLATE,ips,s))
+
+# LANC Location and Navigation Client
+$(eval $(call profile_TEMPLATE,lan,c))
+# LANS Location and Navigation Server
+$(eval $(call profile_TEMPLATE,lan,s))
+
+# PASPC Phone Alert Status Client
+$(eval $(call profile_TEMPLATE,pasp,c))
+# PASPS Phone Alert Status Server
+$(eval $(call profile_TEMPLATE,pasp,s))
+
+# PLXC Pulse Oximeter Profile Client
+$(eval $(call profile_TEMPLATE,plx,c))
+# PLXS Pulse Oximeter Profile Server
+$(eval $(call profile_TEMPLATE,plx,s))
+
+# PXPM Proximity monitor
+$(eval $(call profile_TEMPLATE,prox,m,,PXPM))
+# PXPR Proximity reporter
+$(eval $(call profile_TEMPLATE,prox,r,,PXPR))
+
+# RSCPC Running Speed and Cadence Client
+$(eval $(call profile_TEMPLATE,rscp,c))
+# RSCPS Running Speed and Cadence Server
+$(eval $(call profile_TEMPLATE,rscp,s))
+
+# SCPPC Scan Parameter Client
+$(eval $(call profile_TEMPLATE,scpp,c))
+# SCPPS Scan Parameter Server
+$(eval $(call profile_TEMPLATE,scpp,s))
+
+# TIPC Time Client
+$(eval $(call profile_TEMPLATE,tip,c))
+# TIPS Time Server
+$(eval $(call profile_TEMPLATE,tip,s))
+
+# UDSC User Data Service Client
+$(eval $(call profile_TEMPLATE,uds,c))
+# UDSS User Data Service Server
+$(eval $(call profile_TEMPLATE,uds,s))
+
+# WPTC Wireless Power Transfer Profile Client
+$(eval $(call profile_TEMPLATE,wpt,c))
+# WPTS Wireless Power Transfer Profile Server
+$(eval $(call profile_TEMPLATE,wpt,s))
+
+# WSCC Weight Scale Client
+$(eval $(call profile_TEMPLATE,wsc,c,wscp))
+# WSCS Weight Scale Server
+$(eval $(call profile_TEMPLATE,wsc,s,wscp))
+
+#
+# Atmosic profiles
+#
+
+# AGPC Atmosic Generic Client
+$(eval $(call profile_TEMPLATE,agp,c))
+# AGPS Atmosic Generic Client
+$(eval $(call profile_TEMPLATE,agp,s))
+
+# ATVVS (Android TV Voice) Service
+$(eval $(call profile_TEMPLATE,atvv,s))
+
+# DTPS (Data Transfer Profile) Server
+ifneq ($(filter DTPS,$(PROFILES)),)
+C_SRCS += $(BLE_PRF_DIR)/dts/dts/src/dtps.c
+CFLAGS += -DCFG_PRF_DTPS
+DTS_SERVER_ROLE := 1
+endif # DTPS
+
+# OTAPS (Over the Air Upgrade Profile) Server
+$(eval $(call profile_TEMPLATE,otap,s))
+ifneq ($(filter OTAPS,$(PROFILES)),)
+CFLAGS += -DCFG_CRC
+LIBRARIES += upgrade crc
+DTS_SERVER_ROLE := 1
+ifdef OTA_DISCON_BEFORE_REBOOT
+CFLAGS += -DCFG_UPGD_REBOOT_POSTPONED
+endif
+endif # OTAPS
+
+# TPUTPC Throughput Testing Client
+$(eval $(call profile_TEMPLATE,tputp,c))
+ifneq ($(filter TPUTPC,$(PROFILES)),)
+DTS_CLIENT_ROLE := 1
+DTS_UTILS := 1
+endif # TPUTPC
+
+# TPUTPS Throughput Testing Server
+$(eval $(call profile_TEMPLATE,tputp,s))
+ifneq ($(filter TPUTPS,$(PROFILES)),)
+DTS_SERVER_ROLE := 1
+DTS_UTILS := 1
+endif # TPUTPS
+
+# DTSS (Data Transfer Service) server role library
+ifdef DTS_SERVER_ROLE
+# DTS server role support
+C_SRCS += $(BLE_PRF_DIR)/dts/dts/src/dts_server.c
+INCLUDES += $(BLE_PRF_DIR)/dts/dts/api
+endif  # DTS_SERVER_ROLE
+
+# DTSC (Data Transfer Service) client role library
+ifdef DTS_CLIENT_ROLE
+C_SRCS += $(BLE_PRF_DIR)/dts/dts/src/dts_client.c
+INCLUDES += $(BLE_PRF_DIR)/dts/dts/api
+endif # DTS_CLIENT_ROLE
+
+# DTS utility library
+ifdef DTS_UTILS
+C_SRCS += $(BLE_PRF_DIR)/dts/dts/src/dts_utils.c
+endif # DTS_UTILS
+
+ifneq (,$(or $(filter ANCSC BASS DISS HTPT OTAPS,$(PROFILES)),$(DTS_CLIENT_ROLE)))
+LIBRARIES += prf
+endif
+
+endif # PROFILES
+
+endif # __PROFILE_MK__
diff --git a/platform/atm2/ATM22xx-x1x/user/sections.ld b/platform/atm2/ATM22xx-x1x/user/sections.ld
new file mode 100644
index 0000000..4329c79
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/user/sections.ld
@@ -0,0 +1,186 @@
+/*
+ *-----------------------------------------------------------------------------
+ * The confidential and proprietary information contained in this file may
+ * only be used by a person authorised under and to the extent permitted
+ * by a subsisting licensing agreement from ARM Limited.
+ *
+ *            (C) COPYRIGHT 2010-2013 ARM Limited.
+ *                ALL RIGHTS RESERVED
+ *
+ * This entire notice must be reproduced on all copies of this file
+ * and copies of this file may only be made by a person if such person is
+ * permitted to do so under the terms of a subsisting license agreement
+ * from ARM Limited.
+ *
+ *      SVN Information
+ *
+ *      Checked In          : $Date: $
+ *
+ *      Revision            : $Revision: $
+ *
+ *      Release Information : Cortex-M System Design Kit-r1p0-00rel0
+ *-----------------------------------------------------------------------------
+ */
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+	.text :
+	{
+		KEEP(*(.isr_vector))
+		*(.text*)
+		KEEP(*(.KEEP.text*))
+
+		KEEP(*(.init))
+		KEEP(*(.fini))
+
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+		*(SORT(.ctors.*))
+		*(.ctors)
+
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+
+		*(SORT_BY_ALIGNMENT(.rodata*))
+
+		KEEP(*(.eh_frame*))
+	} > FLASH
+
+	. = ALIGN(4);
+	__atm_module_start = .;
+	.ATM.module :
+	{
+		KEEP(*(SORT(.atm_module.*)))
+	} > FLASH
+	__atm_module_end = .;
+
+        . = ALIGN(4);
+        __at_cmd_start = .;
+        .ATCOMMAND :
+        {
+                KEEP(*(SORT(.at_cmd.*)))
+        } > FLASH
+        __at_cmd_end = .;
+
+	.ARM.extab :
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
+
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > FLASH
+	__exidx_end = .;
+
+	.data :
+	{
+		__etext = LOADADDR(.data);
+		__data_start__ = .;
+		*(vtable)
+		*(SORT_BY_ALIGNMENT(.data*))
+
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
+
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
+
+
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
+
+		KEEP(*(.jcr*))
+		. = ALIGN(4);
+		/* All data end */
+		__data_end__ = .;
+
+	} >RAM AT>FLASH
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(SORT_BY_ALIGNMENT(.bss*))
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
+	} > RAM
+
+	.uninit (NOLOAD) :
+	{
+		. = ALIGN(4);
+		*(SORT_BY_ALIGNMENT(.uninit*))
+		. = ALIGN(4);
+	} > RAM
+
+	.heap (COPY):
+	{
+		__end__ = .;
+		end = __end__;
+		*(.heap*)
+		__HeapLimit = .;
+	} > RAM
+
+	/* .stack_dummy section doesn't contains any symbols. It is only
+	 * used for linker to calculate size of stack sections, and assign
+	 * values to stack symbols later */
+	.stack_dummy (COPY):
+	{
+		*(.stack*)
+	} > RAM
+
+	/* Set stack top to end of RAM, and stack limit move down by
+	 * size of stack_dummy section */
+	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
+	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
+	PROVIDE(__stack = __StackTop);
+
+	/* Check if data + heap + stack exceeds RAM limit */
+	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/platform/atm2/ATM22xx-x1x/user/tools.mk b/platform/atm2/ATM22xx-x1x/user/tools.mk
new file mode 100644
index 0000000..b7c95eb
--- /dev/null
+++ b/platform/atm2/ATM22xx-x1x/user/tools.mk
@@ -0,0 +1,150 @@
+
+ifndef __TOOLS_MK__
+__TOOLS_MK__ = 1
+
+ifeq ($(OS),Windows_NT)
+MD5SUM := md5sum
+SED := sed
+else
+ifeq ($(shell uname),Darwin)
+OS := Darwin
+MD5SUM := md5 -r
+SED := gsed
+else
+OS := Linux
+MD5SUM := md5sum
+SED := sed
+endif
+endif
+
+TOOLS_DIR := $(realpath $(PLATFORM_DIR)/../../../tools)
+
+ifeq ($(ATM_SDK_TOOLS_IN_PATH),)
+BINUTILS_DIR := $(TOOLS_DIR)/gcc-arm-none-eabi-10.3-2021.07/bin
+ifeq ($(BINUTILS_DIR),)
+$(error BINUTILS_DIR unset)
+endif
+endif
+
+BINUTILS_PREFIX_BASE := arm-none-eabi-
+ifeq ($(ATM_SDK_TOOLS_IN_PATH),)
+BINUTILS_PREFIX := $(BINUTILS_DIR)/$(BINUTILS_PREFIX_BASE)
+else
+BINUTILS_PREFIX := $(BINUTILS_PREFIX_BASE)
+WHICH_GCC := $(shell which $(BINUTILS_PREFIX_BASE)gcc)
+ifeq ($(OS),Windows_NT)
+BINUTILS_DIR_TXT := directory of $(WHICH_GCC)
+else
+BINUTILS_DIR_TXT := $(dir $(WHICH_GCC))
+endif
+endif
+
+ifeq ($(TOOLSET),IAR)
+IAR_DIR := $(TOOLS_DIR)/bxarm-9.10.2/arm/bin
+ASSEMBLE := $(IAR_DIR)/iasmarm
+COMPILE := $(IAR_DIR)/iccarm
+CXX := $(IAR_DIR)/iccarm --c++
+LINK := $(IAR_DIR)/ilinkarm
+else ifeq ($(TOOLSET),ARM)
+ARM_DIR := $(TOOLS_DIR)/ARMCompiler6.16/bin
+ASSEMBLE := $(ARM_DIR)/armasm
+COMPILE := $(ARM_DIR)/armclang --target=arm-arm-none-eabi
+CXX := $(ARM_DIR)/armclang --target=arm-arm-none-eabi -x c++
+LINK := $(ARM_DIR)/armlink
+else
+ASSEMBLE := $(BINUTILS_PREFIX)as
+COMPILE := $(BINUTILS_PREFIX)gcc
+CXX := $(BINUTILS_PREFIX)c++
+GCOV := $(BINUTILS_PREFIX)gcov
+LINK := $(BINUTILS_PREFIX)gcc
+PLUGIN := $(shell $(COMPILE) --print-file-name=liblto_plugin$(if $(filter Windows_NT,$(OS)),-0.dll,.so))
+endif
+
+GCC := $(BINUTILS_PREFIX)gcc
+GDB := $(BINUTILS_PREFIX)gdb
+NM := $(BINUTILS_PREFIX)nm
+OBJCOPY := $(BINUTILS_PREFIX)objcopy
+OBJDUMP := $(BINUTILS_PREFIX)objdump
+SIZE := $(BINUTILS_PREFIX)size
+AR := $(BINUTILS_PREFIX)ar
+RANLIB := $(BINUTILS_PREFIX)ranlib
+
+$(sort $(foreach t,ASSEMBLE COMPILE CXX GCOV LINK GCC GDB NM OBJCOPY OBJDUMP \
+    SIZE AR RANLIB,$(firstword $($t)))):
+ifneq ($(ATM_SDK_TOOLS_IN_PATH),)
+$(info Getting bin utils from $(BINUTILS_DIR_TXT))
+else
+	@echo
+	@echo "ERROR: Failed to find $@"
+	@echo
+	@echo "ERROR: Toolchain not found - needs to be downloaded and extracted."
+	@echo "ERROR: See $(TOOLS_DIR)/README for instructions."
+	@echo
+	@exit 1
+endif
+
+# FIXME: C removed due to problems on case-insensitive filesystems
+CXX_EXT := cc cp cxx cpp c++
+
+GDB_REMOTE ?= localhost:3333
+
+RTT_PORT ?= 9090
+
+OPENOCD_DIR := $(TOOLS_DIR)/openocd
+OPENOCD_EXE := $(OPENOCD_DIR)/bin/$(OS)/openocd
+OPENOCD_FLAGS += -s $(OPENOCD_DIR)/tcl -s $(OPENOCD_CFG_DIR)
+OPENOCD_FLAGS += -f atm2x_openocd.cfg
+ifneq ($(OPENOCD_DEBUG),)
+OPENOCD_FLAGS += -d
+endif
+OPENOCD := $(OPENOCD_EXE) $(OPENOCD_FLAGS)
+
+NVDS_TOOL := $(PLAT_TOOLS_DIR)/bin/$(OS)/nvds_tool
+
+ATM_ISP := $(TOOLS_DIR)/atm_isp
+
+IDE_PRJ_GEN := $(TOOLS_DIR)/ide_prj_gen/ide_prj_generator.py
+
+.PHONY: check_openocd
+check_openocd:
+ifeq ($(OS),Linux)
+	@if ! groups | grep -q plugdev; then \
+	    echo; \
+	    echo "ERROR: User $$USER is not a member of group plugdev."; \
+	    echo "ERROR: See $(TOOLS_DIR)/README for instructions."; \
+	    echo; \
+	    exit 1; \
+	fi
+endif
+
+.PHONY: openocd
+openocd: check_openocd
+	HTTP_KEEP_GOING=1 HTTP_NVDS_TOOL=$(NVDS_TOOL) HTTP_ATM_ISP=$(ATM_ISP) $(OPENOCD) -f servers.tcl
+
+.PHONY: segger_rtt_server
+segger_rtt_server: check_openocd
+	SWDIF=JLINK $(OPENOCD) -c 'init; rtt setup 0x20014000 0x4000 "SEGGER RTT"; rtt start; rtt server start $(RTT_PORT) 0'
+
+.PHONY: reset_target
+reset_target: check_openocd
+	FTDI_BENIGN_BOOT=1 FTDI_HARD_RESET=1 $(OPENOCD) -c "init; release_reset; sleep 100; set_normal_boot; exit"
+
+ARCH_ATM := arch.atm
+
+.PHONY: truncate_arch
+truncate_arch:
+	$(ATM_ISP) init -o $(ARCH_ATM) $(PLATFORM_FAMILY) $(PLATFORM_NAME)
+
+ATM_ISP_LOAD = $(if $1,$(ATM_ISP) load$2 $1 -i $(ARCH_ATM) -o $(ARCH_ATM))
+
+.PHONY: build_archive
+build_archive: truncate_arch
+
+.PHONY: show_archive
+show_archive:
+	$(ATM_ISP) decode -i $(ARCH_ATM)
+
+burn_archive:
+	$(ATM_ISP) burn -r $(realpath $(PLATFORM_DIR)/../../../) -i $(ARCH_ATM) $(if $(BURN_ARCH_VERIFY),-c) $(if $(BURN_ARCH_DEBUG),-v) $(if $(BURN_ARCH_ERASE_WORKAROUNDS),-e) $(if $(BURN_ARCH_PROGRAM_ONLY),-p) $(if $(BURN_ARCH_DEST_DIR),-d $(BURN_ARCH_DEST_DIR))
+
+endif # __TOOLS_MK__
diff --git a/stack/ble/ble_common.h b/stack/ble/ble_common.h
new file mode 100644
index 0000000..7bf31b9
--- /dev/null
+++ b/stack/ble/ble_common.h
@@ -0,0 +1,388 @@
+/******************************************************************************
+ * @file     ble_common.h
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+#ifndef BLE_COMMON_H
+#define BLE_COMMON_H
+
+#ifndef CFG_ATM_SDK
+#include "tl_common.h"
+#endif
+
+
+typedef enum {
+    BLE_SUCCESS = 0,
+
+//// HCI Status, See the Core_v5.0(Vol 2/Part D/1.3 "list of Error Codes") for more information)
+    HCI_ERR_UNKNOWN_HCI_CMD                                        = 0x01,
+    HCI_ERR_UNKNOWN_CONN_ID                                        = 0x02,
+    HCI_ERR_HW_FAILURE                                             = 0x03,
+    HCI_ERR_PAGE_TIMEOUT                                           = 0x04,
+    HCI_ERR_AUTH_FAILURE                                           = 0x05,
+    HCI_ERR_PIN_KEY_MISSING                                        = 0x06,
+    HCI_ERR_MEM_CAP_EXCEEDED                                       = 0x07,
+    HCI_ERR_CONN_TIMEOUT                                           = 0x08,
+    HCI_ERR_CONN_LIMIT_EXCEEDED                                    = 0x09,
+    HCI_ERR_SYNCH_CONN_LIMIT_EXCEEDED                              = 0x0A,
+    HCI_ERR_ACL_CONN_ALREADY_EXISTS                                = 0x0B,
+    HCI_ERR_CMD_DISALLOWED                                         = 0x0C,
+    HCI_ERR_CONN_REJ_LIMITED_RESOURCES                             = 0x0D,
+    HCI_ERR_CONN_REJECTED_SECURITY_REASONS                         = 0x0E,
+    HCI_ERR_CONN_REJECTED_UNACCEPTABLE_BDADDR                      = 0x0F,
+    HCI_ERR_CONN_ACCEPT_TIMEOUT_EXCEEDED                           = 0x10,
+    HCI_ERR_UNSUPPORTED_FEATURE_PARAM_VALUE                        = 0x11,
+    HCI_ERR_INVALID_HCI_CMD_PARAMS                                 = 0x12,
+    HCI_ERR_REMOTE_USER_TERM_CONN                                  = 0x13,
+    HCI_ERR_REMOTE_DEVICE_TERM_CONN_LOW_RESOURCES                  = 0x14,
+    HCI_ERR_REMOTE_DEVICE_TERM_CONN_POWER_OFF                      = 0x15,
+    HCI_ERR_CONN_TERM_BY_LOCAL_HOST                                = 0x16,
+    HCI_ERR_REPEATED_ATTEMPTS                                      = 0x17,
+    HCI_ERR_PAIRING_NOT_ALLOWED                                    = 0x18,
+    HCI_ERR_UNKNOWN_LMP_PDU                                        = 0x19,
+    HCI_ERR_UNSUPPORTED_REMOTE_FEATURE                             = 0x1A,
+    HCI_ERR_SCO_OFFSET_REJ                                         = 0x1B,
+    HCI_ERR_SCO_INTERVAL_REJ                                       = 0x1C,
+    HCI_ERR_SCO_AIR_MODE_REJ                                       = 0x1D,
+    HCI_ERR_INVALID_LMP_PARAMS                                     = 0x1E,
+    HCI_ERR_UNSPECIFIED_ERROR                                      = 0x1F,
+    HCI_ERR_UNSUPPORTED_LMP_PARAM_VAL                              = 0x20,
+    HCI_ERR_ROLE_CHANGE_NOT_ALLOWED                                = 0x21,
+    HCI_ERR_LMP_LL_RESP_TIMEOUT                                    = 0x22,
+    HCI_ERR_LMP_ERR_TRANSACTION_COLLISION                          = 0x23,
+    HCI_ERR_LMP_PDU_NOT_ALLOWED                                    = 0x24,
+    HCI_ERR_ENCRYPT_MODE_NOT_ACCEPTABLE                            = 0x25,
+    HCI_ERR_LINK_KEY_CAN_NOT_BE_CHANGED                            = 0x26,
+    HCI_ERR_REQ_QOS_NOT_SUPPORTED                                  = 0x27,
+    HCI_ERR_INSTANT_PASSED                                         = 0x28,
+    HCI_ERR_PAIRING_WITH_UNIT_KEY_NOT_SUPPORTED                    = 0x29,
+    HCI_ERR_DIFFERENT_TRANSACTION_COLLISION                        = 0x2A,
+    HCI_ERR_RESERVED1                                              = 0x2B,
+    HCI_ERR_QOS_UNACCEPTABLE_PARAM                                 = 0x2C,
+    HCI_ERR_QOS_REJ                                                = 0x2D,
+    HCI_ERR_CHAN_ASSESSMENT_NOT_SUPPORTED                          = 0x2E,
+    HCI_ERR_INSUFFICIENT_SECURITY                                  = 0x2F,
+    HCI_ERR_PARAM_OUT_OF_MANDATORY_RANGE                           = 0x30,
+    HCI_ERR_RESERVED2                                              = 0x31,
+    HCI_ERR_ROLE_SWITCH_PENDING                                    = 0x32,
+    HCI_ERR_RESERVED3                                              = 0x33,
+    HCI_ERR_RESERVED_SLOT_VIOLATION                                = 0x34,
+    HCI_ERR_ROLE_SWITCH_FAILED                                     = 0x35,
+    HCI_ERR_EXTENDED_INQUIRY_RESP_TOO_LARGE                        = 0x36,
+    HCI_ERR_SIMPLE_PAIRING_NOT_SUPPORTED_BY_HOST                   = 0x37,
+    HCI_ERR_HOST_BUSY_PAIRING                                      = 0x38,
+    HCI_ERR_CONN_REJ_NO_SUITABLE_CHAN_FOUND                        = 0x39,
+    HCI_ERR_CONTROLLER_BUSY                                        = 0x3A,
+    HCI_ERR_UNACCEPTABLE_CONN_INTERVAL                             = 0x3B,
+    HCI_ERR_ADVERTISING_TIMEOUT                                    = 0x3C,
+    HCI_ERR_CONN_TERM_MIC_FAILURE                                  = 0x3D,
+    HCI_ERR_CONN_FAILED_TO_ESTABLISH                               = 0x3E,
+    HCI_ERR_MAC_CONN_FAILED                                        = 0x3F,
+    HCI_ERR_COARSE_CLOCK_ADJUSTMENT_REJECT                         = 0x40,
+    HCI_ERR_TYPE0_SUBMAP_NOT_DEFINED                               = 0x41,
+    HCI_ERR_UNKNOWN_ADV_IDENTIFIER                                 = 0x42,
+    HCI_ERR_LIMIT_REACHED                                          = 0x43,
+    HCI_ERR_OP_CANCELLED_BY_HOST                                   = 0x44,
+    HCI_ERR_PACKET_TOO_LONG                                        = 0x45,
+
+
+
+
+
+///////////////////////// TELINK define status /////////////////////////////
+
+    //LL status
+    LL_ERR_CONNECTION_NOT_ESTABLISH                                = 0x80,
+    LL_ERR_TX_FIFO_NOT_ENOUGH,
+    LL_ERR_ENCRYPTION_BUSY,
+    LL_ERR_CURRENT_STATE_NOT_SUPPORTED_THIS_CMD,
+    LL_ERR_INVALID_PARAMETER,
+    LL_ERR_UNKNOWN_OPCODE,
+
+    LL_ERR_CIS_SYNC_FAIL,
+    LL_ERR_CIS_DISCONNECT,
+
+
+    //L2CAP status
+    L2CAP_ERR_INVALID_PARAMETER                                    = 0x90,
+    L2CAP_ERR_INVALID_HANDLE,
+    L2CAP_ERR_INSUFFICIENT_RESOURCES,
+    L2CAP_ERR_PSM_NOT_REGISTER,
+    L2CAP_ERR_CONTROL_NOT_READY,
+    L2CAP_ERR_PSM_HAVE_ESTABLISH,
+
+    //SMP status
+    SMP_ERR_INVALID_PARAMETER                                      = 0xA0,
+    SMP_ERR_PAIRING_BUSY,
+
+    //GATT status
+    GATT_ERR_INVALID_PARAMETER                                     = 0xB0,
+    GATT_ERR_PREVIOUS_INDICATE_DATA_HAS_NOT_CONFIRMED,
+    GATT_ERR_SERVICE_DISCOVERY_TIEMOUT,
+    GATT_ERR_NOTIFY_INDICATION_NOT_PERMITTED,
+    GATT_ERR_DATA_PENDING_DUE_TO_SERVICE_DISCOVERY_BUSY,
+    GATT_ERR_DATA_LENGTH_EXCEED_MTU_SIZE,
+
+    //GAP status
+    GAP_ERR_INVALID_PARAMETER                                      = 0xC0,
+    //IAL
+    IAL_ERR_SDU_LEN_EXCEED_SDU_MAX,
+    IAL_ERR_LOSS_SDU_INTRVEL,
+    IAL_ERR_ISO_TX_FIFO_NOT_ENOUGH,
+    IAL_ERR_SDU_BUFF_INVALID,
+
+    //Service status
+    SERVICE_ERR_INVALID_PARAMETER                                    = 0xD0,
+
+    //Application buffer check error code
+    LL_ACL_RX_BUF_NO_INIT                                                 = 0xE0,
+    LL_ACL_RX_BUF_PARAM_INVALID,
+    LL_ACL_RX_BUF_SIZE_NOT_MEET_MAX_RX_OCT,
+    LL_ACL_TX_BUF_NO_INIT,
+    LL_ACL_TX_BUF_PARAM_INVALID,
+    LL_ACL_TX_BUF_SIZE_MUL_NUM_EXCEED_4K,
+    LL_ACL_TX_BUF_SIZE_NOT_MEET_MAX_TX_OCT,
+
+} ble_sts_t;
+
+
+
+
+
+
+
+
+
+
+
+/////////////////////////////// BLE  MAC ADDRESS //////////////////////////////////////////////
+#define BLE_ADDR_PUBLIC                  0
+#define BLE_ADDR_RANDOM                  1
+#define BLE_ADDR_INVALID                 0xff
+#define BLE_ADDR_LEN                     6
+
+
+//Definition for BLE Common Address Type
+/*
+ *
+ *                |--public  ..................................................... BLE_DEVICE_ADDRESS_PUBLIC
+ *                |
+ * Address Type --|           |-- random static  ................................. BLE_DEVICE_ADDRESS_RANDOM_STATIC
+ *                |           |
+ *                |--random --|
+ *                            |                    |-- non_resolvable private  ... BLE_DEVICE_ADDRESS_NON_RESOLVABLE_PRIVATE
+ *                            |-- random private --|
+ *                                                 |-- resolvable private  ....... BLE_DEVICE_ADDRESS_RESOLVABLE_PRIVATE
+ *
+ */
+
+#define BLE_DEVICE_ADDRESS_PUBLIC                            1
+#define BLE_DEVICE_ADDRESS_RANDOM_STATIC                     2
+#define BLE_DEVICE_ADDRESS_NON_RESOLVABLE_PRIVATE            3
+#define BLE_DEVICE_ADDRESS_RESOLVABLE_PRIVATE                4
+
+
+
+#define IS_PUBLIC_ADDR(Type, Addr)                      ( (Type)==BLE_ADDR_PUBLIC) )
+#define IS_RANDOM_STATIC_ADDR(Type, Addr)               ( (Type)==BLE_ADDR_RANDOM && (Addr[5] & 0xC0) == 0xC0 )
+#define IS_NON_RESOLVABLE_PRIVATE_ADDR(Type, Addr)      ( (Type)==BLE_ADDR_RANDOM && (Addr[5] & 0xC0) == 0x00 )
+#define IS_RESOLVABLE_PRIVATE_ADDR(Type, Addr)          ( (Type)==BLE_ADDR_RANDOM && (Addr[5] & 0xC0) == 0x40 )
+
+
+#define        MAC_MATCH8(md,ms)    (md[0]==ms[0] && md[1]==ms[1] && md[2]==ms[2] && md[3]==ms[3] && md[4]==ms[4] && md[5]==ms[5])
+#define        MAC_MATCH16(md,ms)    (md[0]==ms[0] && md[1]==ms[1] && md[2]==ms[2])
+#define        MAC_MATCH32(md,ms)    (md[0]==ms[0] && md[1]==ms[1])
+/////////////////////////////////////////////////////////////////////////////
+
+/******************************************** ATT ***************************************************************/
+
+/**
+ *  @brief  Definition for Attribute protocol PDUs
+ */
+typedef enum{
+    ATT_OP_ERROR_RSP                    = 0x01,
+    ATT_OP_EXCHANGE_MTU_REQ                = 0x02,
+    ATT_OP_EXCHANGE_MTU_RSP                = 0x03,
+    ATT_OP_FIND_INFORMATION_REQ            = 0x04,        ATT_OP_FIND_INFO_REQ = 0x04,
+    ATT_OP_FIND_INFORMATION_RSP            = 0x05,        ATT_OP_FIND_INFO_RSP = 0x05,
+    ATT_OP_FIND_BY_TYPE_VALUE_REQ        = 0x06,
+    ATT_OP_FIND_BY_TYPE_VALUE_RSP        = 0x07,
+    ATT_OP_READ_BY_TYPE_REQ                = 0x08,
+    ATT_OP_READ_BY_TYPE_RSP                = 0x09,
+    ATT_OP_READ_REQ                        = 0x0A,
+    ATT_OP_READ_RSP                        = 0x0B,
+    ATT_OP_READ_BLOB_REQ                = 0x0C,
+    ATT_OP_READ_BLOB_RSP                = 0x0D,
+    ATT_OP_READ_MULTIPLE_REQ            = 0x0E,        ATT_OP_READ_MULTI_REQ = 0x0E,
+    ATT_OP_READ_MULTIPLE_RSP            = 0x0F,
+    ATT_OP_READ_BY_GROUP_TYPE_REQ        = 0x10,
+    ATT_OP_READ_BY_GROUP_TYPE_RSP        = 0x11,
+    ATT_OP_WRITE_REQ                    = 0x12,
+    ATT_OP_WRITE_RSP                    = 0x13,
+    ATT_OP_PREPARE_WRITE_REQ            = 0x16,
+    ATT_OP_PREPARE_WRITE_RSP            = 0x17,
+    ATT_OP_EXECUTE_WRITE_REQ            = 0x18,
+    ATT_OP_EXECUTE_WRITE_RSP            = 0x19,
+
+    ATT_OP_HANDLE_VALUE_NTF                = 0x1B,        ATT_OP_HANDLE_VALUE_NOTI = 0x1B,
+    ATT_OP_HANDLE_VALUE_IND                = 0x1D,
+    ATT_OP_HANDLE_VALUE_CFM                = 0x1E,
+
+    ATT_OP_READ_MULTIPLE_VARIABLE_REQ    = 0x20,    //core_5.2
+    ATT_OP_READ_MULTIPLE_VARIABLE_RSP    = 0x21, //core_5.2
+    ATT_OP_MULTIPLE_HANDLE_VALUE_NTF    = 0x23, //core_5.2
+
+    ATT_OP_WRITE_CMD                    = 0x52,
+    ATT_OP_SIGNED_WRITE_CMD                = 0xD2,
+}att_pdu_type;
+
+
+
+
+/******************************************** L2CAP ***************************************************************/
+
+/**
+ *  @brief  Definition for L2CAP CID name space for the LE-U
+ */
+typedef enum{
+    L2CAP_CID_NULL                = 0x0000,
+    L2CAP_CID_ATTR_PROTOCOL        = 0x0004,
+    L2CAP_CID_SIG_CHANNEL        = 0x0005,
+    L2CAP_CID_SMP                = 0x0006,
+}l2cap_cid_type;
+
+/**
+ *  @brief  Definition for L2CAP signal packet formats
+ */
+typedef enum{
+    L2CAP_COMMAND_REJECT_RSP                   = 0x01,
+    L2CAP_CONNECTION_REQ                     = 0x02,
+    L2CAP_CONNECTION_RSP                     = 0x03,
+    L2CAP_CONFIGURATION_REQ                    = 0x04,
+    L2CAP_CONFIGURATION_RSP                   = 0x05,
+    L2CAP_DISCONNECTION_REQ                   = 0x06,
+    L2CAP_DISCONNECTION_RSP                   = 0x07,
+    L2CAP_ECHO_REQ                           = 0x08,
+    L2CAP_ECHO_RSP                           = 0x09,
+    L2CAP_INFORMATION_REQ                   = 0x0A,
+    L2CAP_INFORMATION_RSP                   = 0x0B,
+    L2CAP_CREATE_CHANNEL_REQ                  = 0x0C,
+    L2CAP_CREATE_CHANNEL_RSP                   = 0x0D,
+    L2CAP_MOVE_CHANNEL_REQ                   = 0x0E,
+    L2CAP_MOVE_CHANNEL_RSP                   = 0x0F,
+    L2CAP_MOVE_CHANNEL_CONFIRMATION_REQ        = 0x10,
+    L2CAP_MOVE_CHANNEL_CONFIRMATION_RSP     = 0x11,
+    L2CAP_CONNECTION_PARAMETER_UPDATE_REQ    = 0x12,        L2CAP_CMD_CONN_UPD_PARA_REQ        = 0x12,
+    L2CAP_CONNECTION_PARAMETER_UPDATE_RSP    = 0x13,        L2CAP_CMD_CONN_UPD_PARA_RESP     = 0x13,
+    L2CAP_LE_CREDIT_BASED_CONNECTION_REQ     = 0x14,
+    L2CAP_LE_CREDIT_BASED_CONNECTION_RSP     = 0x15,
+    L2CAP_FLOW_CONTROL_CREDIT_IND             = 0x16,
+    L2CAP_CREDIT_BASED_CONNECTION_REQ         = 0x17,    //core_5.2
+    L2CAP_CREDIT_BASED_CONNECTION_RSP         = 0x18,    //core_5.2
+    L2CAP_CREDIT_BASED_RECONFIGURE_REQ         = 0x19,    //core_5.2
+    L2CAP_CREDIT_BASED_RECONFIGURE_RSP         = 0x1A,    //core_5.2
+}l2cap_sig_pkt_format;
+
+/******************************************** LINKLAYER ***************************************************************/
+
+/**
+ *  @brief  Definition for LL Control PDU Opcode
+ */                                                                        // rf_len without MIC
+#define                    LL_CONNECTION_UPDATE_REQ    0x00                            // 12
+#define                    LL_CHANNEL_MAP_REQ            0x01                            //    8
+#define                    LL_TERMINATE_IND            0x02                            //    2
+
+#define                 LL_ENC_REQ                   0x03    // encryption            //    23
+#define                 LL_ENC_RSP                   0x04    // encryption            //    13
+#define                 LL_START_ENC_REQ             0x05    // encryption            //    1
+#define                 LL_START_ENC_RSP             0x06    // encryption            //    1
+
+#define                 LL_UNKNOWN_RSP               0x07                            //    2
+#define                 LL_FEATURE_REQ               0x08                            //    9
+#define                 LL_FEATURE_RSP               0x09                            //    9
+
+#define                 LL_PAUSE_ENC_REQ             0x0A    // encryption            //    1
+#define                 LL_PAUSE_ENC_RSP             0x0B    // encryption            //    1
+
+#define                 LL_VERSION_IND               0x0C                              //    6
+#define                 LL_REJECT_IND                0x0D                              //    2
+#define                 LL_SLAVE_FEATURE_REQ         0x0E    //core_4.1                //    9
+#define                 LL_CONNECTION_PARAM_REQ      0x0F    //core_4.1                //    24
+#define                 LL_CONNECTION_PARAM_RSP      0x10    //core_4.1                //    24
+#define                 LL_REJECT_IND_EXT            0x11    //core_4.1                //    3
+#define                 LL_PING_REQ                  0x12    //core_4.1                //    1
+#define                 LL_PING_RSP                  0x13    //core_4.1                //    1
+#define                 LL_LENGTH_REQ                0x14    //core_4.2                //    9
+#define                 LL_LENGTH_RSP                0x15    //core_4.2                //    9
+#define                 LL_PHY_REQ                   0x16    //core_5.0                //    3
+#define                 LL_PHY_RSP                   0x17    //core_5.0                //    3
+#define                 LL_PHY_UPDATE_IND            0x18    //core_5.0                //    5
+#define                 LL_MIN_USED_CHN_IND          0x19    //core_5.0                //    3
+
+#define                 LL_CTE_REQ                   0x1A    //core_5.1                //    2
+#define                 LL_CTE_RSP                   0x1B    //core_5.1                //    2
+#define                 LL_PERIODIC_SYNC_IND         0x1C    //core_5.1                //    35
+#define                 LL_CLOCK_ACCURACY_REQ        0x1D    //core_5.1                //    2
+#define                 LL_CLOCK_ACCURACY_RSP        0x1E    //core_5.1                //    2
+
+
+#define                 LL_CIS_REQ                    0x1F    //core_5.2                //    36
+#define                 LL_CIS_RSP                    0x20    //core_5.2                //    9
+#define                 LL_CIS_IND                    0x21    //core_5.2                //    16
+#define                 LL_CIS_TERMINATE_IND          0x22    //core_5.2                //    4
+#define                 LL_POWER_CONTROL_REQ          0x23    //core_5.2                //    4
+#define                 LL_POWER_CONTROL_RSP          0x24    //core_5.2                //    5
+#define                 LL_POWER_CHANGE_IND           0x25    //core_5.2                //    5
+
+
+
+/******************************************** GAP ***************************************************************/
+
+// https://www.bluetooth.com/specifications/assigned-numbers/generic-access-profile/
+// EIR Data Type, Advertising Data Type (AD Type) and OOB Data Type Definitions
+
+typedef enum {
+    DT_FLAGS                                = 0x01,        //    Flag
+    DT_INCOMPLT_LIST_16BIT_SERVICE_UUID     = 0x02,        //    Incomplete List of 16-bit Service Class UUIDs
+    DT_COMPLETE_LIST_16BIT_SERVICE_UUID     = 0x03,        //    Complete List of 16-bit Service Class UUIDs
+    DT_INCOMPLT_LIST_32BIT_SERVICE_UUID     = 0x04,        //    Incomplete List of 32-bit Service Class UUIDs
+    DT_COMPLETE_LIST_32BIT_SERVICE_UUID     = 0x05,        //    Complete List of 32-bit Service Class UUIDs
+    DT_INCOMPLT_LIST_128BIT_SERVICE_UUID    = 0x06,        //    Incomplete List of 128-bit Service Class UUIDs
+    DT_COMPLETE_LIST_128BIT_SERVICE_UUID    = 0x07,        //    Complete List of 128-bit Service Class UUIDs
+    DT_SHORTENED_LOCAL_NAME                 = 0x08,        //    Shortened Local Name
+    DT_COMPLETE_LOCAL_NAME                  = 0x09,        //    Complete Local Name
+    DT_TX_POWER_LEVEL                       = 0x0A,        //    Tx Power Level
+
+    DT_CLASS_OF_DEVICE                      = 0x0D,        //    Class of Device
+
+    DT_APPEARANCE                           = 0x19,        //    Appearance
+
+    DT_BIGINFO                              = 0x2C,        //    BIGInfo
+    DT_BROADCAST_CODE                       = 0x2D,        //    Broadcast_Code
+    DT_3D_INFORMATION_DATA                  = 0x3D,        //    3D Information Data
+
+    DATA_TYPE_MANUFACTURER_SPECIFIC_DATA    = 0xFF,        //    Manufacturer Specific Data
+}data_type_t;
+
+
+#endif
diff --git a/stack/ble/ble_format.h b/stack/ble/ble_format.h
new file mode 100644
index 0000000..90ced84
--- /dev/null
+++ b/stack/ble/ble_format.h
@@ -0,0 +1,819 @@
+/******************************************************************************
+ * @file     ble_format.h
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *  Copyright (C) Atmosic 2022
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+#ifndef BLE_FORMAT_H
+#define BLE_FORMAT_H
+
+
+
+#include "stack/ble/ble_common.h"
+
+/******************************************** Link Layer **************************************************************/
+
+typedef struct {
+    u8 type;
+    u8 address[6];//BLE_ADDR_LEN];
+} addr_t;
+
+
+
+typedef struct {
+    u8 llid   :2;
+    u8 nesn   :1;
+    u8 sn     :1;
+    u8 md     :1;
+    u8 rfu1   :3;
+}rf_data_head_t;
+
+
+
+typedef struct {
+    u8 llid   :2;
+    u8 nesn   :1;
+    u8 sn     :1;
+    u8 md     :1;
+    u8 rfu1   :3;
+    u8 rf_len;
+}rf_acl_data_head_t;
+
+
+
+typedef struct {
+    u8 llid   :2;
+    u8 nesn   :1;
+    u8 sn     :1;
+    u8 cie    :1;
+    u8 rfu0   :1;
+    u8 npi    :1;
+    u8 rfu1   :1;
+    u8 rf_len;
+}rf_cis_data_hdr_t;
+
+
+
+typedef struct {
+    u8 llid   :2;
+    u8 cssn   :3;
+    u8 cstf   :1;
+    u8 rfu0   :2;
+    u8 rf_len;
+}rf_bis_data_hdr_t;
+
+
+
+typedef struct{
+    u32 dma_len;
+
+    u8 type   :4;
+    u8 rfu1   :1;
+    u8 chan_sel:1;
+    u8 txAddr :1;
+    u8 rxAddr :1;
+
+    u8  rf_len;                //LEN(6)_RFU(2)
+
+    u8    advA[6];            //address
+    u8    data[31];
+}rf_packet_adv_t;
+
+
+
+typedef struct{
+    u32 dma_len;
+
+    u8  type   :4;
+    u8  rfu1   :1;
+    u8  chan_sel:1;
+    u8  txAddr :1;
+    u8  rxAddr :1;
+
+    u8  rf_len;                //LEN(6)_RFU(2)
+
+    u8    scanA[6];            //
+    u8    advA[6];            //
+}rf_packet_scan_req_t;
+
+typedef struct{
+    u32 dma_len;
+
+    u8  type   :4;
+    u8  rfu1   :1;
+    u8  chan_sel:1;
+    u8  txAddr :1;
+    u8  rxAddr :1;
+
+    u8  rf_len;                //LEN(6)_RFU(2)
+
+    u8 advA[6];            //address
+    u8 data[31];            //0-31 byte
+}rf_packet_scan_rsp_t;
+
+typedef struct{
+    u32 dma_len;
+
+    u8 type   :4;
+    u8 rfu1   :1;
+    u8 chan_sel:1;
+    u8 txAddr :1;
+    u8 rxAddr :1;
+
+    u8 rf_len;                //LEN(6)_RFU(2)
+    u8 initA[6];            //scanA
+    u8 advA[6];            //
+    u8 accessCode[4];        // access code
+    u8 crcinit[3];
+    u8 winSize;
+    u16 winOffset;
+    u16 interval;
+    u16 latency;
+    u16 timeout;
+    u8 chm[5];
+    u8 hop;                //sca(3)_hop(5)
+}rf_packet_connect_t;
+
+typedef struct{
+    u32 dma_len;
+
+    u8  type   :4;
+    u8  rfu1   :1;
+    u8  chan_sel:1;
+    u8  txAddr :1;
+    u8  rxAddr :1;
+
+    u8  rf_len;                //LEN(6)_RFU(2)
+    u8    scanA[6];            //
+    u8    advA[6];            //
+    u8    aa[4];                // access code
+    u8    crcinit[3];
+    u8    wsize;
+    u16    woffset;
+    u16 interval;
+    u16 latency;
+    u16 timeout;
+    u8 chm[5];
+    u8 hop;                //sca(3)_hop(5)
+}rf_packet_ll_init_t;
+
+typedef struct {
+    u8 type;
+    u8 rf_len;
+    u8 opcode;
+    u8 winSize;
+    u16 winOffset;
+    u16 interval;
+    u16 latency;
+    u16 timeout;
+    u16 instant;
+} rf_packet_ll_updateConnPara_t;
+
+typedef struct {
+    u8     type;
+    u8  rf_len;
+    u8     opcode;
+    u8     winSize;
+    u16 winOffset;
+    u16 interval;
+    u16 latency;
+    u16 timeout;
+    u16 instant;
+}rf_packet_connect_upd_req_t;
+
+typedef struct {
+    u8     type;
+    u8  rf_len;
+    u8     opcode;
+    u8     chm[5];
+    u16 instant;
+} rf_packet_chm_upd_req_t;
+
+typedef struct {
+    u8     type;
+    u8  rf_len;
+    u8     opcode;
+    u8     rand[8];
+    u16 ediv;
+    u8    skdm[8];
+    u8    ivm[4];
+} rf_packet_ll_enc_req_t;
+
+typedef struct {
+    u8     type;
+    u8  rf_len;
+    u8     opcode;
+    u8    skds[8];
+    u8    ivs[4];
+} rf_packet_ll_enc_rsp_t;
+
+typedef struct {
+    u8     type;
+    u8  rf_len;
+    u8     opcode;
+    u8    unknownType;
+} rf_packet_ll_unknown_rsp_t;
+
+typedef struct {
+    u8     type;
+    u8  rf_len;
+    u8     opcode;
+    u8    featureSet[8];
+} rf_packet_ll_feature_exg_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u8     opcode;
+    u8  versNr;
+    u16 compId;
+    u16 subVersNr;
+}rf_packet_version_ind_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u8     opcode;
+    u8  errCode;
+}rf_packet_ll_reject_ind_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u8     opcode;
+    u8    rejectOpcode;
+    u8  errCode;
+}rf_packet_ll_reject_ext_ind_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u8    opcode;
+    u8    reason;
+}rf_packet_ll_terminate_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u8    opcode;
+    u8    cigId;
+    u8    cisId;
+    u8  phyM2S;
+    u8    phyS2M;
+
+    u32 maxSduM2S :12;
+    u32 rfu0       :3;
+    u32 framed    :1;
+    u32 maxSduS2M :12;
+    u32 rfu1      :4;
+
+    u8 sduIntvlM2S[3]; //SDU_Interval_M_To_S(20 bits) + RFU(4 bits)
+    u8 sduIntvlS2M[3]; //SDU_Interval_S_To_M(20 bits) + RFU(4 bits)
+
+    u16 maxPduM2S;
+    u16 maxPduS2M;
+    u8    nse;
+    u8    subIntvl[3];    //unit: uS
+
+    u8     bnM2S:4;
+    u8     bnS2M:4;
+    u8     ftM2S;
+    u8     ftS2M;
+    u16    isoIntvl;        //unit: 1.25 mS
+
+    u8    cisOffsetMin[3];
+    u8    cisOffsetMax[3];
+    u16    connEventCnt; //similar to instant
+
+}rf_packet_ll_cis_req_t;
+
+typedef struct{
+    u8    type;                //RA(1)_TA(1)_RFU(2)_TYPE(4)
+    u8  rf_len;                //LEN(6)_RFU(2)
+    u8     opcode;
+    u8  cisOffsetMin[3];
+    u8  cisOffsetMax[3];
+    u16    connEventCnt;
+}rf_packet_ll_cis_rsp_t;
+
+typedef struct{
+    u8    type;                //RA(1)_TA(1)_RFU(2)_TYPE(4)
+    u8  rf_len;                //LEN(6)_RFU(2)
+    u8     opcode;
+    u32 cisAccessAddr;      //Access Address of the CIS
+    u8  cisOffset[3];
+    u8  cigSyncDly[3];
+    u8  cisSyncDly[3];
+    u16 connEventCnt;
+}rf_packet_ll_cis_ind_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u8     opcode;
+    u8  cig_id;
+    u8    cis_id;
+    u8    errorCode;
+}rf_packet_ll_cis_terminate_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+
+    u8    opcode;                //
+    u8    dat[1];                //
+}rf_packet_ll_control_t;
+
+typedef struct{
+    union{
+        rf_bis_data_hdr_t  bisPduHdr;
+        rf_cis_data_hdr_t  cisPduHdr;
+        rf_acl_data_head_t aclPduHdr;
+        struct{
+            u8 type;
+            u8 rf_len;
+        }pduHdr;
+    }llPduHdr;        /* LL PDU Header: 2 */
+    u8     llPayload[1]; /* Max LL Payload length: 251 */
+}llPhysChnPdu_t;
+
+typedef struct{
+    u32 dma_len;
+    llPhysChnPdu_t llPhysChnPdu;
+}rf_packet_ll_data_t;
+
+
+
+
+//AuxPrt
+typedef struct{
+    u8  chn_index   :6;
+    u8  ca              :1;
+    u8  offset_unit    :1;
+    u16 aux_offset  :13;
+    u16    aux_phy        :3;
+} aux_ptr_t;
+
+
+typedef struct{
+    u32 dma_len;
+
+    u8 type   :4;
+    u8 rfu1   :1;
+    u8 chan_sel:1;
+    u8 txAddr :1;
+    u8 rxAddr :1;
+
+    u8  rf_len;
+    u8    ext_hdr_len        :6;
+    u8    adv_mode        :2;
+    u8    ext_hdr_flg;
+
+    u8    data[253];   //Extended Header + AdvData
+}rf_pkt_ext_adv_t;
+
+
+/******************************************** L2CAP **************************************************************/
+
+typedef struct{
+    rf_data_head_t    header;
+    u8 rf_len;
+    u16 l2capLen;
+    u16 chanId;
+    u8 opcode;
+    u8 data[1];
+}rf_packet_l2cap_t;
+
+#if !defined(CFG_ATM_SDK) && (MCU_CORE_TYPE == MCU_CORE_9518)
+typedef struct{
+    rf_data_head_t    header;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u16  handle;
+    u8    dat[20];
+}rf_packet_att_t;
+#elif defined(CFG_ATM_SDK) || (MCU_CORE_TYPE == MCU_CORE_825x || MCU_CORE_TYPE == MCU_CORE_827x)
+typedef struct{
+    rf_data_head_t    header;
+    u8  rf_len;
+    u16 l2capLen;
+    u16 chanId;
+    u8 opcode;
+    u8 handle0;
+    u8 handle1;
+    u8 dat[20];
+}rf_packet_att_t;
+#endif
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8 data[1];
+}rf_packet_l2cap_req_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  code;
+    u8  id;
+    u16 dataLen;
+    u16 result;
+}rf_pkt_l2cap_sig_connParaUpRsp_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  code;
+    u8  id;
+    u16 length;
+    u16 psm;
+    u16 mtu;
+    u16 mps;
+    u16 init_credits;
+    u16 scid[5];
+}rf_pkt_l2cap_credit_based_connection_req_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  code;
+    u8  id;
+    u16 length;
+    u16 mtu;
+    u16 mps;
+    u16 init_credits;
+    u16 result;
+    u16 dcid[5];
+}rf_pkt_l2cap_credit_based_connection_rsp_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  code;
+    u8  id;
+    u16 length;
+    u16 mtu;
+    u16 mps;
+    u16 dcid[5];
+}rf_pkt_l2cap_credit_based_reconfigure_req_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  code;
+    u8  id;
+    u16 length;
+    u16 result;
+}rf_pkt_l2cap_credit_based_reconfigure_rsp_t;
+
+typedef struct{
+    u8 type;
+    u8 rf_len;
+    u16 l2capLen;
+    u16 chanId;
+    u8 opcode;
+    u8 data[1];
+}rf_pkt_l2cap_req_t;
+
+typedef struct{
+    u8    llid;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8    id;
+    u16 data_len;
+    u16 min_interval;
+    u16 max_interval;
+    u16 latency;
+    u16 timeout;
+}rf_packet_l2cap_connParaUpReq_t;
+
+typedef struct{
+    u8    llid;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8    id;
+    u16 length;
+    u16 spsm;
+    u16 mtu;
+    u16 mps;
+    u16 init_credits;
+    u16 scid[5];
+}rf_packet_l2cap_credit_based_connection_req_t;
+
+typedef struct{
+    u8    llid;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8    id;
+    u16 data_len;
+    u16 result;
+}rf_packet_l2cap_connParaUpRsp_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2cap;
+    u16    chanid;
+
+    u8    att;
+    u16 handle;
+
+#ifdef CFG_ATM_SDK
+    u8 dat[256];
+#else
+    u8    dat[20];
+#endif
+
+}rf_packet_att_data_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8     errOpcode;
+    u16 errHandle;
+    u8 errReason;
+}rf_packet_att_errRsp_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+
+    u16 l2capLen;
+    u16 chanId;
+    u8 opcode;
+    u8 startingHandle;
+    u8 startingHandle1;
+    u8 endingHandle;
+    u8 endingHandle1;
+    u8 attType[2];                //
+}rf_packet_att_readByType_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+
+    u16 l2capLen;
+    u16 chanId;
+    u8 opcode;
+    u8 startingHandle;
+    u8 startingHandle1;
+    u8 endingHandle;
+    u8 endingHandle1;
+    u8 attType[2];
+    u8 attValue[2];
+}rf_packet_att_findByTypeReq_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+
+    u16 l2capLen;
+    u16 chanId;
+    u8 opcode;
+    u16 data[1];
+}rf_packet_att_findByTypeRsp_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8 handle;
+    u8 handle1;
+}rf_packet_att_read_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8 handle;
+    u8 handle1;
+    u8 offset0;
+    u8 offset1;
+}rf_packet_att_readBlob_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8     value[22];
+}rf_packet_att_readRsp_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8  datalen;
+    u8  data[1];            // character_handle / property / value_handle / value
+}rf_pkt_att_readByTypeRsp_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8  datalen;
+    u8  data[1];            // character_handle / property / value_handle / value
+}rf_packet_att_readByTypeRsp_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8  datalen;
+    u8  data[1];            // character_handle / property / value_handle / value
+}rf_packet_att_data_readByTypeRsp_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8  datalen;
+    u8  data[3];
+}rf_packet_att_readByGroupTypeRsp_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8  format;
+    u8  data[1];            // character_handle / property / value_handle / value
+}rf_packet_att_findInfoReq_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8 flags;
+}rf_packet_att_executeWriteReq_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8 handle;
+    u8 handle1;
+    u8 value;
+}rf_packet_att_write_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8 handle[2];
+    u8 data;
+}rf_packet_att_notification_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8  mtu[2];
+}rf_packet_att_mtu_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8 mtu[2];
+}rf_packet_att_mtu_exchange_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+}rf_packet_att_writeRsp_t;
+
+typedef struct{
+    u8    type;                //RA(1)_TA(1)_RFU(2)_TYPE(4)
+    u8  rf_len;                //LEN(6)_RFU(2)
+    u8     opcode;
+    u8    data[8];
+}rf_packet_feature_rsp_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8  datalen;
+    u8  data[1];            // character_handle / property / value_handle / value
+}att_readByTypeRsp_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8  format;
+    u8  data[1];            // character_handle / property / value_handle / value
+}att_findInfoRsp_t;
+
+typedef struct{
+    u8    type;
+    u8  rf_len;
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8     value[22];
+}att_readRsp_t;
+
+typedef struct{
+    u8    type;                //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+    u8  rf_len;                //LEN(5)_RFU(3)
+    u16    l2capLen;
+    u16    chanId;
+    u8  opcode;
+    u8    handle;
+    u8    hh;
+    u8     value[1];
+}att_notify_t;
+
+typedef struct {
+    u8    num;
+    u8    property;
+    u16    handle;
+    u16    uuid;
+    u16 ref;
+} att_db_uuid16_t;            //8-byte
+
+
+typedef struct {
+    u8    num;
+    u8    property;
+    u16    handle;
+    u8    uuid[16];
+} att_db_uuid128_t;            //20-byte
+#endif    /* BLE_FORMAT_H */
diff --git a/stack/ble/host/attr/att.h b/stack/ble/host/attr/att.h
new file mode 100644
index 0000000..e20d848
--- /dev/null
+++ b/stack/ble/host/attr/att.h
@@ -0,0 +1,225 @@
+/******************************************************************************
+ * @file     att.h
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *  Copyright (C) Atmosic 2022
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+#pragma once
+
+#ifdef CFG_ATM_SDK
+#include "refdesignrcu.h"
+#else
+#include "tl_common.h"
+#endif
+
+
+/** @defgroup ATT_PERMISSIONS_BITMAPS GAP ATT Attribute Access Permissions Bit Fields
+ * @{
+ * (See the Core_v5.0(Vol 3/Part C/10.3.1/Table 10.2) for more information)
+ */
+#define ATT_PERMISSIONS_AUTHOR                 0x10 //Attribute access(Read & Write) requires Authorization
+#define ATT_PERMISSIONS_ENCRYPT                 0x20 //Attribute access(Read & Write) requires Encryption
+#define ATT_PERMISSIONS_AUTHEN                 0x40 //Attribute access(Read & Write) requires Authentication(MITM protection)
+#define ATT_PERMISSIONS_SECURE_CONN             0x80 //Attribute access(Read & Write) requires Secure_Connection
+#define ATT_PERMISSIONS_SECURITY             (ATT_PERMISSIONS_AUTHOR | ATT_PERMISSIONS_ENCRYPT | ATT_PERMISSIONS_AUTHEN | ATT_PERMISSIONS_SECURE_CONN)
+
+//user can choose permission below
+#define ATT_PERMISSIONS_READ                 0x01 //!< Attribute is Readable
+#define ATT_PERMISSIONS_WRITE                0x02 //!< Attribute is Writable
+#define ATT_PERMISSIONS_RDWR                 (ATT_PERMISSIONS_READ | ATT_PERMISSIONS_WRITE)   //!< Attribute is Readable & Writable
+
+
+#define ATT_PERMISSIONS_ENCRYPT_READ         (ATT_PERMISSIONS_READ  | ATT_PERMISSIONS_ENCRYPT)         //!< Read requires Encryption
+#define ATT_PERMISSIONS_ENCRYPT_WRITE        (ATT_PERMISSIONS_WRITE | ATT_PERMISSIONS_ENCRYPT)         //!< Write requires Encryption
+#define ATT_PERMISSIONS_ENCRYPT_RDWR         (ATT_PERMISSIONS_RDWR  | ATT_PERMISSIONS_ENCRYPT)         //!< Read & Write requires Encryption
+
+
+#define ATT_PERMISSIONS_AUTHEN_READ          (ATT_PERMISSIONS_READ  | ATT_PERMISSIONS_ENCRYPT | ATT_PERMISSIONS_AUTHEN)         //!< Read requires Authentication
+#define ATT_PERMISSIONS_AUTHEN_WRITE         (ATT_PERMISSIONS_WRITE | ATT_PERMISSIONS_ENCRYPT | ATT_PERMISSIONS_AUTHEN)         //!< Write requires Authentication
+#define ATT_PERMISSIONS_AUTHEN_RDWR          (ATT_PERMISSIONS_RDWR  | ATT_PERMISSIONS_ENCRYPT | ATT_PERMISSIONS_AUTHEN)         //!< Read & Write requires Authentication
+
+
+#define ATT_PERMISSIONS_SECURE_CONN_READ     (ATT_PERMISSIONS_READ  | ATT_PERMISSIONS_SECURE_CONN | ATT_PERMISSIONS_ENCRYPT | ATT_PERMISSIONS_AUTHEN)   //!< Read requires Secure_Connection
+#define ATT_PERMISSIONS_SECURE_CONN_WRITE    (ATT_PERMISSIONS_WRITE | ATT_PERMISSIONS_SECURE_CONN | ATT_PERMISSIONS_ENCRYPT | ATT_PERMISSIONS_AUTHEN)  //!< Write requires Secure_Connection
+#define ATT_PERMISSIONS_SECURE_CONN_RDWR     (ATT_PERMISSIONS_RDWR  | ATT_PERMISSIONS_SECURE_CONN | ATT_PERMISSIONS_ENCRYPT | ATT_PERMISSIONS_AUTHEN)   //!< Read & Write requires Secure_Connection
+
+
+#define ATT_PERMISSIONS_AUTHOR_READ          (ATT_PERMISSIONS_READ | ATT_PERMISSIONS_AUTHOR)         //!< Read requires Authorization
+#define ATT_PERMISSIONS_AUTHOR_WRITE         (ATT_PERMISSIONS_WRITE | ATT_PERMISSIONS_AUTHEN)         //!< Write requires Authorization
+#define ATT_PERMISSIONS_AUTHOR_RDWR          (ATT_PERMISSIONS_RDWR | ATT_PERMISSIONS_AUTHOR)         //!< Read & Write requires Authorization
+
+
+/** @} End GAP_ATT_PERMISSIONS_BITMAPS */
+
+
+/** @ add to group GATT_Characteristic_Property GATT characteristic properties
+ * @{
+ */
+#define CHAR_PROP_BROADCAST              0x01 //!< permit broadcasts of the Characteristic Value
+#define CHAR_PROP_READ                   0x02 //!< permit reads of the Characteristic Value
+#define CHAR_PROP_WRITE_WITHOUT_RSP      0x04 //!< Permit writes of the Characteristic Value without response
+#define CHAR_PROP_WRITE                  0x08 //!< Permit writes of the Characteristic Value with response
+#define CHAR_PROP_NOTIFY                 0x10 //!< Permit notifications of a Characteristic Value without acknowledgement
+#define CHAR_PROP_INDICATE               0x20 //!< Permit indications of a Characteristic Value with acknowledgement
+#define CHAR_PROP_AUTHEN                 0x40 //!< permit signed writes to the Characteristic Value
+#define CHAR_PROP_EXTENDED               0x80 //!< additional characteristic properties are defined
+/** @} end of group GATT_Characteristic_Property */
+
+
+
+#if !defined(CFG_ATM_SDK) && (MCU_CORE_TYPE == MCU_CORE_9518)
+    typedef int (*att_readwrite_callback_t)(u16 connHandle, void* p);
+#elif defined(CFG_ATM_SDK) || (MCU_CORE_TYPE == MCU_CORE_825x || MCU_CORE_TYPE == MCU_CORE_827x)
+    typedef int (*att_readwrite_callback_t)(void* p);
+#endif
+
+typedef struct attribute
+{
+  u16  attNum;
+  u8   perm;
+  u8   uuidLen;
+  u32  attrLen;    //4 bytes aligned
+  u8* uuid;
+  u8* pAttrValue;
+  att_readwrite_callback_t w;
+  att_readwrite_callback_t r;
+} attribute_t;
+
+
+
+
+/**
+ * @brief    This function is used to define ATT MTU size exchange callback
+ */
+typedef int (*att_mtuSizeExchange_callback_t)(u16, u16);
+
+/**
+ * @brief    This function is used to define ATT Handle value confirm callback
+ */
+typedef int (*att_handleValueConfirm_callback_t)(void);
+
+
+
+
+/**
+ * @brief    This function is used to set ATT table
+ * @param    *p - the pointer of attribute table
+ * @return    none.
+ */
+void        bls_att_setAttributeTable (u8 *p);
+
+
+//mtu size
+/**
+ * @brief    This function is used to set RX MTU size
+ * @param    mtu_size - ATT MTU size
+ * @return    0: success
+ *             other: fail
+ */
+ble_sts_t    blc_att_setRxMtuSize(u16 mtu_size);
+
+
+
+/**
+ * @brief    This function is used to set prepare write buffer
+ * @param    *p - the pointer of buffer
+ * @param    len - the length of buffer
+ * @return    none.
+ */
+void          blc_att_setPrepareWriteBuffer(u8 *p, u16 len);
+
+/**
+ * @brief    This function is used to request MTU size exchange
+ * @param    connHandle - connect handle
+ * @param    mtu_size - ATT MTU size
+ * @return    0: success
+ *             other: fail
+ */
+//Attention: this API hide in stack, user no need use !!!
+ble_sts_t     blc_att_requestMtuSizeExchange (u16 connHandle, u16 mtu_size);
+
+/**
+ * @brief    This function is used to set effective ATT MTU size
+ * @param    connHandle - connect handle
+ * @param    effective_mtu - bltAtt.effective_MTU
+ * @return    none.
+ */
+void          blt_att_setEffectiveMtuSize(u16 connHandle, u8 effective_mtu);
+
+/**
+ * @brief    This function is used to reset effective ATT MTU size
+ * @param    connHandle - connect handle
+ * @return    none.
+ */
+void          blt_att_resetEffectiveMtuSize(u16 connHandle);
+
+/**
+ * @brief    This function is used to reset RX MTU size
+ * @param    mtu_size - ATT MTU size
+ * @return    0: success
+ *             other: fail
+ */
+void          blt_att_resetRxMtuSize(u16 connHandle);
+
+/**
+ * @brief   This function is used to get effective MTU size.
+ * @param    connHandle - connect handle
+ * @return  effective MTU value.
+ */
+u16  blc_att_getEffectiveMtuSize(u16 connHandle);
+
+#if(CFG_ATM_SDK || MCU_CORE_TYPE == MCU_CORE_825x || MCU_CORE_TYPE == MCU_CORE_827x)
+/**
+ * @brief      set device name
+ * @param[in]  p - the point of name
+ * @param[in]  len - the length of name
+ * @return     BLE_SUCCESS
+ */
+ble_sts_t     bls_att_setDeviceName(u8* pName,u8 len);  //only module/mesh/hci use
+
+ble_sts_t    blc_att_responseMtuSizeExchange (u16 connHandle, u16 mtu_size);
+ble_sts_t    bls_att_pushNotifyData (u16 attHandle, u8 *p, int len);
+ble_sts_t    bls_att_pushIndicateData (u16 attHandle, u8 *p, int len);
+
+        // 0x04: ATT_OP_FIND_INFO_REQ
+void     att_req_find_info(u8 *dat, u16 start_attHandle, u16 end_attHandle);
+        // 0x06: ATT_OP_FIND_BY_TYPE_VALUE_REQ
+void     att_req_find_by_type (u8 *dat, u16 start_attHandle, u16 end_attHandle, u8 *uuid, u8* attr_value, int len);
+        // 0x08: ATT_OP_READ_BY_TYPE_REQ
+void     att_req_read_by_type (u8 *dat, u16 start_attHandle, u16 end_attHandle, u8 *uuid, int uuid_len);
+        // 0x0a: ATT_OP_READ_REQ
+void     att_req_read (u8 *dat, u16 attHandle);
+        // 0x0c: ATT_OP_READ_BLOB_REQ
+void     att_req_read_blob (u8 *dat, u16 attHandle, u16 offset);
+        // 0x10: ATT_OP_READ_BY_GROUP_TYPE_REQ
+void     att_req_read_by_group_type (u8 *dat, u16 start_attHandle, u16 end_attHandle, u8 *uuid, int uuid_len);
+        // 0x12: ATT_OP_WRITE_REQ
+void     att_req_write (u8 *dat, u16 attHandle, u8 *buf, int len);
+        // 0x52: ATT_OP_WRITE_CMD
+void     att_req_write_cmd (u8 *dat, u16 attHandle, u8 *buf, int len);
+
+#endif
+
+
+
+
diff --git a/stack/ble/service/uuid.h b/stack/ble/service/uuid.h
new file mode 100644
index 0000000..1348e48
--- /dev/null
+++ b/stack/ble/service/uuid.h
@@ -0,0 +1,155 @@
+/******************************************************************************
+ * @file     uuid.h
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *  Copyright (C) Atmosic 2022
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+#ifndef SERVICE_UUID_H_
+#define SERVICE_UUID_H_
+
+
+/**
+ *  @brief  GATT 16 bit UUID definition
+ */
+#define GATT_UUID_PRIMARY_SERVICE        0x2800     //!< Primary Service
+#define GATT_UUID_SECONDARY_SERVICE      0x2801     //!< Secondary Service
+#define GATT_UUID_INCLUDE                0x2802     //!< Include
+#define GATT_UUID_CHARACTER              0x2803     //!< Characteristic
+#define GATT_UUID_CHAR_EXT_PROPS         0x2900     //!< Characteristic Extended Properties
+#define GATT_UUID_CHAR_USER_DESC         0x2901     //!< Characteristic User Description
+#define GATT_UUID_CLIENT_CHAR_CFG        0x2902     //!< Client Characteristic Configuration
+#define GATT_UUID_SERVER_CHAR_CFG        0x2903     //!< Server Characteristic Configuration
+#define GATT_UUID_CHAR_PRESENT_FORMAT    0x2904     //!< Characteristic Present Format
+#define GATT_UUID_CHAR_AGG_FORMAT        0x2905     //!< Characteristic Aggregate Format
+#define GATT_UUID_VALID_RANGE            0x2906     //!< Valid Range
+#define GATT_UUID_EXT_REPORT_REF         0x2907     //!< External Report Reference
+#define GATT_UUID_REPORT_REF             0x2908     //!< Report Reference
+
+#define GATT_UUID_DEVICE_NAME            0x2a00     //!< Report Reference
+#define GATT_UUID_APPEARANCE             0x2a01
+#define GATT_UUID_PERI_CONN_PARAM          0x2a04
+#define GATT_UUID_SERVICE_CHANGE         0x2a05
+#define    GATT_UUID_BATTERY_LEVEL             0x2A19
+#define    GATT_UUID_FIRMWARE_VER             0x2a26        //!<Firmware Version
+
+
+/**
+ *  @brief  Definition for Services UUID
+ */
+#define SERVICE_UUID_ALERT_NOTIFICATION                           0x1811
+#define SERVICE_UUID_BATTERY                                      0x180F
+#define SERVICE_UUID_BLOOD_PRESSURE                               0x1810
+#define SERVICE_UUID_CURRENT_TIME                                 0x1805
+#define SERVICE_UUID_CYCLING_POWER                                0x1818
+#define SERVICE_UUID_CYCLING_SPEED_AND_CADENCE                    0x1816
+#define SERVICE_UUID_DEVICE_INFORMATION                           0x180A
+#define SERVICE_UUID_GENERIC_ACCESS                               0x1800
+#define SERVICE_UUID_GENERIC_ATTRIBUTE                            0x1801
+#define SERVICE_UUID_GLUCOSE                                      0x1808
+#define SERVICE_UUID_HEALTH_THERMOMETER                           0x1809
+#define SERVICE_UUID_HEART_RATE                                   0x180D
+#define SERVICE_UUID_HUMAN_INTERFACE_DEVICE                       0x1812
+#define SERVICE_UUID_IMMEDIATE_ALERT                              0x1802
+#define SERVICE_UUID_LINK_LOSS                                    0x1803
+#define SERVICE_UUID_LOCATION_AND_NAVIGATION                      0x1819
+#define SERVICE_UUID_NEXT_DST_CHANGE                              0x1807
+#define SERVICE_UUID_PHONE_ALERT_STATUS                           0x180E
+#define SERVICE_UUID_REFERENCE_TIME_UPDATE                        0x1806
+#define SERVICE_UUID_RUNNING_SPEED_AND_CADENCE                    0x1814
+#define SERVICE_UUID_SCAN_PARAMETER                               0x1813
+#define SERVICE_UUID_TX_POWER                                     0x1804
+#define SERVICE_UUID_USER_DATA                                    0x181C
+#define SERVICE_UUID_CONTINUOUS_GLUCOSE_MONITORING                0x181F
+#define SERVICE_UUID_WEIGHT_SCALE                                 0x181D
+
+////////////////////////////////////
+// Telink Service
+////////////////////////////////////
+#if !defined(CFG_ATM_SDK) && (MCU_CORE_TYPE == MCU_CORE_9518)
+    #define WRAPPING_BRACES(__DATAS__)            { __DATAS__ }
+    #define TELINK_SPP_UUID_SERVICE               0x10,0x19,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00        //!< TELINK_SPP service
+    #define TELINK_AUDIO_UUID_SERVICE              0x11,0x19,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00        //!< TELINK_SPP service
+    #define TELINK_OTA_UUID_SERVICE               0x12,0x19,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00        //!< TELINK_OTA service
+    #define TELINK_MESH_UUID_SERVICE              0x20,0x19,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00        //!< TELINK_SPP service
+    #define TELINK_MESH_LT_UUID_SERVICE          0x21,0x19,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00        //!< TELINK_SPP service
+
+    #define TELINK_SPP_DATA_SERVER2CLIENT         0x10,0x2B,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00     //!< TELINK_SPP data from server to client
+    #define TELINK_SPP_DATA_CLIENT2SERVER         0x11,0x2B,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00     //!< TELINK_SPP data from client to server
+    #define TELINK_SPP_DATA_OTA                 0x12,0x2B,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00     //!< TELINK_SPP data for ota
+    #define TELINK_SPP_DATA_PAIR                 0x13,0x2B,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00     //!< TELINK_SPP data for ota
+    #define TELINK_SPP_DATA_DEFINE                 0x14,0x2B,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00     //!< TELINK_SPP data for userdefine data
+
+
+    #define TELINK_MIC_DATA                         0x18,0x2B,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00        //!< TELINK_SPP data from server to client
+    #define TELINK_SPEAKER_DATA                     0x19,0x2B,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00     //!< TELINK_SPP data from client to server
+
+
+    #define AUDIO_GOOGLE_SERVICE_UUID           0x64,0xB6,0x17,0xF6,0x01,0xAF,0x7D,0xBC,0x05,0x4F,0x21,0x5A,0x01,0x00,0x5E,0xAB
+    #define AUDIO_GOOGL_TX_CHAR_UUID            0x64,0xB6,0x17,0xF6,0x01,0xAF,0x7D,0xBC,0x05,0x4F,0x21,0x5A,0x02,0x00,0x5E,0xAB
+    #define AUDIO_GOOGL_RX_CHAR_UUID            0x64,0xB6,0x17,0xF6,0x01,0xAF,0x7D,0xBC,0x05,0x4F,0x21,0x5A,0x03,0x00,0x5E,0xAB
+    #define AUDIO_GOOGL_CTL_CHAR_UUID           0x64,0xB6,0x17,0xF6,0x01,0xAF,0x7D,0xBC,0x05,0x4F,0x21,0x5A,0x04,0x00,0x5E,0xAB
+
+#elif defined(CFG_ATM_SDK) || (MCU_CORE_TYPE == MCU_CORE_825x || MCU_CORE_TYPE == MCU_CORE_827x)
+    #define TELINK_SPP_UUID_SERVICE               {0x10,0x19,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00}        //!< TELINK_SPP service
+    #define TELINK_AUDIO_UUID_SERVICE              {0x11,0x19,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00}        //!< TELINK_SPP service
+    #define TELINK_OTA_UUID_SERVICE               {0x12,0x19,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00}        //!< TELINK_OTA service
+    #define TELINK_MESH_UUID_SERVICE              {0x20,0x19,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00}        //!< TELINK_SPP service
+    #define TELINK_MESH_LT_UUID_SERVICE          {0x21,0x19,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00}        //!< TELINK_SPP service
+
+    #define TELINK_SPP_DATA_SERVER2CLIENT         {0x10,0x2B,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00}         //!< TELINK_SPP data from server to client
+    #define TELINK_SPP_DATA_CLIENT2SERVER         {0x11,0x2B,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00}         //!< TELINK_SPP data from client to server
+    #define TELINK_SPP_DATA_OTA                  0x12,0x2B,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00        //!< TELINK_SPP data for ota
+    #define TELINK_SPP_DATA_PAIR                 {0x13,0x2B,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00}         //!< TELINK_SPP data for ota
+    #define TELINK_SPP_DATA_DEFINE                 {0x14,0x2B,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00}         //!< TELINK_SPP data for userdefine data
+
+    #define TELINK_MIC_DATA                         {0x18,0x2B,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00}         //!< TELINK_SPP data from server to client
+    #define TELINK_SPEAKER_DATA                     {0x19,0x2B,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00}         //!< TELINK_SPP data from client to server
+
+
+    #define AUDIO_GOOGLE_SERVICE_UUID           {0x64,0xB6,0x17,0xF6,0x01,0xAF,0x7D,0xBC,0x05,0x4F,0x21,0x5A,0x01,0x00,0x5E,0xAB}
+    #define AUDIO_GOOGL_TX_CHAR_UUID            0x64,0xB6,0x17,0xF6,0x01,0xAF,0x7D,0xBC,0x05,0x4F,0x21,0x5A,0x02,0x00,0x5E,0xAB
+    #define AUDIO_GOOGL_RX_CHAR_UUID            0x64,0xB6,0x17,0xF6,0x01,0xAF,0x7D,0xBC,0x05,0x4F,0x21,0x5A,0x03,0x00,0x5E,0xAB
+    #define AUDIO_GOOGL_CTL_CHAR_UUID           0x64,0xB6,0x17,0xF6,0x01,0xAF,0x7D,0xBC,0x05,0x4F,0x21,0x5A,0x04,0x00,0x5E,0xAB
+    #define TELINK_IR_UUID_SERVICE              0x64,0xb6,0x17,0xf6,0x01,0xaf,0x7d,0xbc,0x05,0x4f,0x21,0x5a,0xc0,0xbf,0x43,0xd3
+    #define TELINK_IR_PROG_CONTROL_UUID_SERVICE 0x64,0xb6,0x17,0xf6,0x01,0xaf,0x7d,0xbc,0x05,0x4f,0x21,0x5a,0xc1,0xbf,0x43,0xd3
+    #define TELINK_IR_KEY_ID_UUID_SERVICE       0x64,0xb6,0x17,0xf6,0x01,0xaf,0x7d,0xbc,0x05,0x4f,0x21,0x5a,0xc2,0xbf,0x43,0xd3
+    #define TELINK_IR_CODE_UUID_SERVICE         0x64,0xb6,0x17,0xf6,0x01,0xaf,0x7d,0xbc,0x05,0x4f,0x21,0x5a,0xc3,0xbf,0x43,0xd3
+    #define TELINK_IR_SUPPRESS_UUID_SERVICE     0x64,0xb6,0x17,0xf6,0x01,0xaf,0x7d,0xbc,0x05,0x4f,0x21,0x5a,0xc4,0xbf,0x43,0xd3
+    #define TELINK_IR_KEY_EVENT_UUID_SERVICE    0x64,0xb6,0x17,0xf6,0x01,0xaf,0x7d,0xbc,0x05,0x4f,0x21,0x5a,0xc5,0xbf,0x43,0xd3
+
+    #define GOOGLE_FMS_SERVfICE_UUID            0x64,0xB6,0x17,0xF6,0x01,0xAF,0x7D,0xBC,0x05,0x4F,0x21,0x5A,0x01,0x00,0x02,0x18
+    #define GOOGLE_FMS_CTL_CHAR_UUID            0x64,0xB6,0x17,0xF6,0x01,0xAF,0x7D,0xBC,0x05,0x4F,0x21,0x5A,0x02,0x00,0x02,0x18
+    #define GOOGLE_FMS_DATA_CHAR_UUID           0x64,0xB6,0x17,0xF6,0x01,0xAF,0x7D,0xBC,0x05,0x4F,0x21,0x5A,0x03,0x00,0x02,0x18
+
+#endif
+
+#if (MP_TEST_MODE)
+#define TEST_MODE_SERVICE_UUID                 0x10,0x30,0x0D,0x0C,0x0B,0x0A,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00
+#define TEST_MODE_TEST_DATA_UUID               0x11,0x30,0x0D,0x0C,0x0B,0x0A,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00
+#endif
+
+#define CHARACTERISTIC_UUID_BATTERY_LEVEL                    0x2A19
+#define CHARACTERISTIC_UUID_ALERT_LEVEL                         0x2A06
+
+
+#endif  /* SERVICE_UUID_H_ */
diff --git a/tools/README b/tools/README
new file mode 100644
index 0000000..e5a1c2c
--- /dev/null
+++ b/tools/README
@@ -0,0 +1,81 @@
+
+This Atmosic SDK needs an external toolchain download for building images
+and system configuration in order to access USB serial devices.
+
+### Arm GNU-RM toolchain ###
+
+The following two commands can be used to fetch and install it in the
+current tools directory:
+
+wget 'https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2'
+tar jfx gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
+
+
+If the direct link above does not work, find the 10.3-2021.07 version
+for Linux 64-bit from this location:
+
+https://developer.arm.com/open-source/gnu-toolchain/gnu-rm/downloads
+
+
+The toolchain download md5sum is:
+
+b56ae639d9183c340f065ae114a30202  gcc-arm-none-eabi-10.3-2021.07-x86_64-linux.tar.bz2
+
+
+### J-Link GDB Server ###
+
+Today, the J-Link GDB Server provides the best support for the atm23 and atm33
+families of platforms, which are based on the Arm CoreLink SSE-200 Subsystem.
+
+This GDB server can be obtained from https://www.segger.com/downloads/jlink.
+Download and install the J-Link Software Pack for your operating system.  The
+following shows how to integrate the J-Link Software Pack version V762a in the
+SDK for Linux.
+
+$ cd tools
+$ tar xzf JLink_Linux_V762a_x86_64.tgz
+
+Refer to a particular platform's examples README file,
+e.g. platform/atm23/ATM23xx-x1x/examples/README, on how to run GDB with a
+running target using the J-Link GDB Server.
+
+
+### OpenOCD ###
+
+This Atmosic SDK requires a version of openocd >= 0.11.0.  Many linux
+systems provide older versions, so a binary was included with this SDK.
+However, special udev and group permissions are required by openocd in
+order to access the USB FTDI SWD interface or J-Link OB(ATM3330).  The easiest way to set
+these up is to install the openocd version that is supported by the
+linux system.
+
+If openocd isn't easily available, the following commands (run from sudo
+or su) may be enough to make it work:
+
+# cp openocd/contrib/60-openocd.rules /etc/udev/rules.d/
+# groupadd plugdev
+# usermod -aG plugdev $USER
+
+
+### Python 3 and Google Protocol Buffer Version 3 ###
+
+The Atmosic ISP Tool requires Python 3 as well as Google Protocol
+Buffers Version 3 (proto3).  After installing Python 3, obtain the
+Python package for proto3 using:
+
+pip3 install protobuf
+
+See the platform-specific instructions for installing Python 3 on
+macOS and Windows in README.macOS and README.Windows, respectively.
+
+### MCUBoot ###
+
+Building applications with MCUBoot support requires Python 3.6+ and a few
+3rd party python libraries.  For installing Python 3, please see
+platform-specific instructions.
+
+To install the necessary libraries, please run the following commands from
+the top level SDK directory:
+
+pip3 install -r tools/mcuboot_utils/requirements.txt
+pip3 install -r contrib/mcuboot/scripts/requirements.txt
diff --git a/tools/README.ISP b/tools/README.ISP
new file mode 100644
index 0000000..e49ff17
--- /dev/null
+++ b/tools/README.ISP
@@ -0,0 +1,43 @@
+### Atmosic In-System Programming (ISP) Tool ###
+
+This SDK ships with a tool called Atmosic In-System Programming Tool
+(ISP) for bundling all three types of binaries -- OTP NVDS, flash
+NVDS, and flash -- into a single binary archive.  The ISP tool, which
+is also shipped as a stand-alone package, can then be used to unpack
+the components of the archive and download them on a device.
+
+In every platform example, e.g. BLE_adv, the makefiles have the
+following targets for building, examining, and burning an ISP archive,
+respectively.
+
+build_archive
+show_archive
+burn_archive
+
+build_archive bundles flash_nvds.bin, otp_nvds.nvm, and $(APP).bin
+where $(APP) is the name of the application directory.  This make
+target also allows choosing $(APP).elf instead of the $(APP).bin by
+setting the make variable ARCH_FLASH_TYPE=elf.
+
+For the last rule, defining the makefile variable BURN_ARCH_VERIFY
+tells the ISP tool to verify images after loading them on the device.
+BURN_ARCH_DEBUG makes the tool more verbose.  If there is OTP data
+available, setting BURN_ARCH_ERASE_WORKAROUNDS will erase any unlocked
+workaround tags (0xfc, 0xfd, and 0xfe) from OTP before burning the new
+contents.  Finally, defining BURN_ARCH_PROGRAM_ONLY prevents
+reset-hard-on-exit; it can be used to get a behavior similar to "make
+program_all" as opposed to "make run_all".
+
+The ISP tool has features and flexibilities not captured through the
+above makefile targets.  Directly invoke the atm_isp tool with the
+-h option to see the available subcommands and their options.  For
+example, running "atm_isp -h" will show that loadFlash is a subcommand,
+and running "atm_isp loadFlash -h" will show that the destination
+address is configurable.
+
+
+### External Package Dependencies ###
+
+Search for "ISP" in the top-level README for dependencies on any external
+packages.  (This is relevant only for users who manage their system packages.
+In particular, users of the Windows SDK installer need not be concerned.)
diff --git a/tools/README.Windows b/tools/README.Windows
new file mode 100644
index 0000000..89247fe
--- /dev/null
+++ b/tools/README.Windows
@@ -0,0 +1,239 @@
+
+This Atmosic SDK requires a Linux-like environment and an Arm GNU-RM
+toolchain.  It also requires a system configuration in order to access
+USB serial devices.
+
+### MSYS2 ###
+
+This SDK depends upon a Linux-like environment such as MSYS2
+(recommended) or Cygwin with Make and Vim installed.
+
+To get MSYS2, follow the installation instructions at
+https://www.msys2.org.
+
+Ensure the following packages are installed:
+
+-) Make
+-) Vim (for xxd)
+-) Unzip
+
+In MSYS2, use "pacman -Sy make vim unzip" to install them.  Execute
+the commands "which make", "which xxd", and "which unzip" from, say,
+the MSYS2 Bash shell to display their locations and verify these
+dependencies are met.
+
+Note that all of the make commands in
+platform/atm*/<platform>/examples/README should be run in a shell
+provided by MSYS or Cygwin.
+
+
+### Windows and MSYS Path Equivalence ###
+
+Every Windows drive is available in MSYS under the root directory,
+namely "/".  That is, a drive <D> is available as /<D> in MSYS.  For
+example, the Windows path C:\atmosic_sdk becomes /c/atmosic_sdk in
+MSYS.
+
+In Windows, MSYS's root directory is its installation location.  For
+example, if MSYS is installed in C:\msys64, the MSYS directory /home
+is accessible via C:\msys64\home in Windows.
+
+Note: Windows and MSYS create different home directories for a given
+user.  A user named "SDK User" has a Windows home directory
+"C:\Users\SDK User" and an MSYS home directory "/home/SDK User".  The
+former is accessible from MSYS via "/c/Users/SDK User"; the latter is
+accessible from Windows via "C:\msys64\home\SDK User".
+
+
+### Enabling Symbolic Links ###
+
+In Windows 10, under Settings, go to "Update & Security."  Then, under
+"For developers," set "Use developer features" to "Developer mode."
+
+Also, if using MSYS, make sure that the environment variable MSYS
+contains the string winsymlinks:nativestrict.  This can be done in one
+of two ways.  The best way is to define the variable in Windows by
+going to Control Panel -> System and Security -> System -> Advanced
+system settings -> Environment Variables, then add a new user variable
+named MSYS with winsymlinks:nativestrict as the value.  If MSYS is
+already defined, append winsymlinks and nativestrict to the end
+separating them with colons.
+
+The second way to add winsymlinks:nativestrict to the MSYS variable
+permanently is to add the following line to ~/.bash_profile,
+assuming you're using Bash.
+
+export MSYS=winsymlinks:nativestrict:"$MSYS"
+
+If using Cygwin, change MSYS to CYGWIN in the above instructions.
+
+
+### Arm GNU-RM toolchain ###
+
+Download GNU Arm Embedded Toolchain, Version 10.3-2021.07 from the
+following location.
+
+https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm/downloads
+
+At the time of this writing, the direct link below can also be used.
+
+https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07win32/gcc-arm-none-eabi-10.3-2021.07-win32.exe
+
+Install the toolchain in
+<atmosic_sdk>\tools\gcc-arm-none-eabi-10.3-2021.07
+
+
+### libusb-1.0.dll ###
+
+A dependency of openocd.exe included in this SDK is libusb-1.0.dll.
+If this DLL does not already exist in C:\Windows\system32, copy
+tools/openocd/libusb-1.0.dll from this SDK to C:\Windows\system32.
+
+Windows Administrator privileges are required for making said changes.
+
+### WinUSB(ATM3330) ###
+
+Microsoft by default will NOT have the j-link driver for the J-Link OB device
+on the Atmosic board. Download J-Link software pack from the following location.
+
+https://www.segger.com/downloads/jlink/
+
+The J-Link OB device driver must be replaced with WinUSB in order for it to
+become available as a USB device and usable by OpenOCD.
+This can be done using:
+1) Zadig
+2) Install RDI Interface(The windows installer will create this shortcut
+in "Start Menu">>"AtmosicSDK")
+
+Windows Administrator privileges are required for replacing a driver.
+
+Zadig can be obtained from:
+
+https://github.com/pbatard/libwdi/releases
+
+At the time of this writing, the latest version -- 2.4 -- can be
+obtained using the following direct link.
+
+https://github.com/pbatard/libwdi/releases/download/b721/zadig-2.4.exe
+
+To replace the driver:
+
+1) From the "Options" menu of Zadig, click "List all devices".
+2) From the drop-down menu, find "BULK interface" corresponding to
+   the Atmosic board.  It should show "jlink (v...)" as
+   the current driver on the left.
+3) Select "WinUSB (v...)" as the replacement on the right.
+4) Click "Replace Driver"
+
+Verify the successful installation of WinUSB by going to the Windows
+Device Manager and confirming that the "BULK interface" shows
+as such rather than "J-Link driver".  (In Device Manager, expand category
+"Universal Serial Bus devices" and look for "BULK interface".)
+
+For IDE environment, the J-Link OB device driver must use J-Link driver.
+This can be done using:
+1) Uninstall BULK interface driver manually
+2) Setup IDE Environment(The windows installer will create this shortcut
+in "Start Menu">>"AtmosicSDK")
+
+### WinUSB ###
+
+Microsoft by default installs the FTDIBUS driver for the FTDI device
+on the Atmosic board.  This makes the device show as a COM port in the
+Windows Device Manager.
+
+For Interface 0 of the Atmosic FTDI interface board, the FTDI driver
+must be replaced with WinUSB in order for it to become available as a
+USB device and usable by OpenOCD.  This can be done using Zadig.
+
+Windows Administrator privileges are required for replacing a driver.
+
+Zadig can be obtained from:
+
+https://github.com/pbatard/libwdi/releases
+
+At the time of this writing, the latest version -- 2.4 -- can be
+obtained using the following direct link.
+
+https://github.com/pbatard/libwdi/releases/download/b721/zadig-2.4.exe
+
+To replace the driver:
+
+1) From the "Options" menu of Zadig, click "List all devices".
+2) From the drop-down menu, find USB1, Interface 0 corresponding to
+   the Atmosic interface board.  It should show "FTDIBUS (v...)" as
+   the current driver on the left.
+3) Select "WinUSB (v...)" as the replacement on the right.
+4) Click "Replace Driver"
+
+Verify the successful installation of WinUSB by going to the Windows
+Device Manager and confirming that the Atmosic FTDI USB1 device shows
+as such rather than a COM port.  (In Device Manager, expand category
+"Universal Serial Bus devices" and look for "Atmosic RDI USB1".)
+Also, verify that the driver provider is libwdi.  (Right-click on
+"Atmosic RDI USB1", go to "Properties", go to the "Driver" tab, and
+check the "Driver Provider" line.)  Restart Windows if necessary.
+
+### Viewer for Console Output(ATM3330) ###
+
+Console output for current Atmosic ATM3330 goes to the JLink CDC UART
+serial port.  That is Interface 2 of J-Link OB USB on the Atmosic
+board.  In order to view the console output, use a serial terminal
+program such as PuTTY (available from
+https://www.chiark.greenend.org.uk/~sgtatham/putty) to connect to
+JLink CDC UART port generated by the interface 2 of J-Link OB USB
+with the baud rate set to 115200.
+
+If using PuTTY, open a session with the following three parameters:
+
+1) Serial line: <COM port> (see next paragraph)
+2) Speed: 115200
+3) Connection type: Serial
+
+A common way to determine <COM port> for parameter #1 above is to use
+the Windows Device Manager as follows.
+
+a) Under the "View" menu, choose "Devices by container"
+b) Under the container "J-Link", find "JLink CDC UART Port
+ (COM<N>)", where <N> is some COM port sequence number
+
+Then use "COM<N>" for the serial line parameter in PuTTY.
+
+### Viewer for Console Output ###
+
+Console output for all current Atmosic platforms goes to the UART1
+serial port.  That is Interface 1 of USB1 on the Atmosic interface
+board.  In order to view the console output, use a serial terminal
+program such as PuTTY (available from
+https://www.chiark.greenend.org.uk/~sgtatham/putty) to connect to
+UART1 with the baud rate set to 115200.
+
+If using PuTTY, open a session with the following three parameters:
+
+1) Serial line: <COM port> (see next paragraph)
+2) Speed: 115200
+3) Connection type: Serial
+
+A common way to determine <COM port> for parameter #1 above is to use
+the Windows Device Manager as follows.
+
+a) Under the "View" menu, choose "Devices by container"
+b) Under the container "Atmosic RDI USB1", find "USB Serial Port
+ (COM<N>)", where <N> is some COM port sequence number
+
+Then use "COM<N>" for the serial line parameter in PuTTY.
+
+
+### OpenOCD ###
+
+Informational: this Atmosic SDK requires a version of openocd >= 0.11.0.
+MSYS2 and other systems provide older versions, so a binary was included
+with this SDK -- tools/openocd/openocd.exe.
+
+
+### Python 3 and Google Protocol Buffers 3 ###
+
+The Atmosic ISP Tool requires Python 3.  It can be installed on MSYS2
+together with its package manager pip using:
+
+pacman -Sy python3 python3-pip
diff --git a/tools/README.macOS b/tools/README.macOS
new file mode 100644
index 0000000..ef2047a
--- /dev/null
+++ b/tools/README.macOS
@@ -0,0 +1,122 @@
+
+This Atmosic SDK needs an external toolchain download for building images.
+
+### Arm GNU-RM toolchain ###
+
+Download GNU Arm Embedded Toolchain, Version 10.3-2021.07 from the
+following location.
+
+https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm/downloads/
+
+At the time of this writing, the direct link below can also be used.
+
+https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-mac-10.14.6.tar.bz2
+
+The toolchain download md5sum is 86105798d4bea999e671285a556a7bde.
+
+The following shows how to download and test the toolchain.
+
+% curl --progress-bar -L https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.07/gcc-arm-none-eabi-10.3-2021.07-mac-10.14.6.tar.bz2 -o gcc-arm-none-eabi-10.3-2021.07-mac-10.14.6.tar.bz2
+% md5 -q gcc-arm-none-eabi-10.3-2021.07-mac-10.14.6.tar.bz2
+86105798d4bea999e671285a556a7bde
+% tar xf gcc-arm-none-eabi-10.3-2021.07-mac-10.14.6.tar.bz2 -C atmosic_sdk/tools/
+% atmosic_sdk/tools/gcc-arm-none-eabi-10.3-2021.07/bin/arm-none-eabi-gcc -dumpmachine
+arm-none-eabi
+%
+
+
+Users of macOS 10.15 and newer may experience difficulty running the
+toolchain for the first time due to GNU Arm being an unidentified
+developer to macOS.  The only known solution to this problem is that
+each executable in the toolchain has to be individually unblocked in
+"System Preferences > Security & Privacy" as described on the page
+linked below.
+
+https://support.apple.com/en-us/HT202491
+
+
+### Apple-Silicon Compatibility (optional) ###
+
+In order to use the Atmosic SDK the Rosetta Translation Environment is
+used to execute the internally built OpenOCD binary. Open Terminal
+with the Rosetta Enviorment as described on the page linked below. If
+Homebrew was previously installed, uninstall Homebrew before
+continuing with next steps.
+
+https://developer.apple.com/documentation/apple-silicon/about-the-rosetta-translation-environment
+
+
+### Homebrew (Optional) ###
+
+The macOS-related instructions in this SDK use the Homebrew package
+manager, which can be downloaded from https://brew.sh, to install
+dependencies.  Note, however, that any other method such as using a
+different package manager or manual installation, should work as well.
+
+
+### GNU sed (gsed) ###
+
+Various scripts in this SDK use sed.  While the standard sed in macOS
+is vary similar in behavior and syntax to GNU sed, there are subtle
+differences.  Using Homebrew, gsed can be installed with:
+
+brew install gnu-sed
+
+
+### realpath ###
+
+realpath is used by SDK to extract the relative path between two directories.
+It isn't included in macOS by default and can be installed with:
+
+brew install coreutils
+
+
+### OpenOCD ###
+
+This Atmosic SDK requires a version of openocd >= 0.11.0.  Various Mac
+package managers provide older versions, so a binary was included with
+this SDK.
+
+OpenOCD for macOS (tools/openocd/openocd.out) has the following
+dependencies.
+
+1) libusb-0.1
+2) libftdi
+3) hidapi
+
+Using the Homebrew package manager, the above dependencies can be
+satisfied using the following command:
+
+brew install libusb libusb-compat libftdi hidapi
+
+Homebrew's libusb is version 1.0, which is why libusb-compat also
+needs to be installed.
+
+
+### Python 3 and Google Protocol Buffers 3 ###
+
+The Atmosic ISP Tool requires Python 3.  It can be installed using Homebrew:
+
+brew install python3
+
+### USB connectivity(ATM3330) ####
+
+Connect EVK to Mac using Micro-USB port.
+
+Serial console will be on USB port (e.g. /dev/tty.usbmodem[12 serial number char.][1 char.])
+Use below command to find port for serial console
+
+bash-2.3$ ls -l /dev/tty* | grep usbmodem
+crw-rw-rw-  1 root  wheel   18, 104 Mar 30 08:56 /dev/tty.usbmodem[12 serial number char.][1]
+crw-rw-rw-  1 root  wheel   18, 106 Mar 30 08:56 /dev/tty.usbmodem[12 serial number char.][3]
+
+### USB connectivity ####
+
+Connect EVK to Mac using USB1 port.
+
+Serial console will be on USB1 port (e.g. /dev/tty.usbserial-ATRDIxxxUSBx1)
+Use below command to find port for serial console
+
+bash-2.3$ ls -l /dev/tty* |grep ATRDI
+crw-rw-rw-  1 root  wheel   18, 104 Mar 30 08:56 /dev/tty.usbserial-ATRDI338USB10
+crw-rw-rw-  1 root  wheel   18, 106 Mar 30 08:56 /dev/tty.usbserial-ATRDI338USB11
diff --git a/tools/atm_isp b/tools/atm_isp
new file mode 100644
index 0000000..79151ad
--- /dev/null
+++ b/tools/atm_isp
@@ -0,0 +1,570 @@
+#! /usr/bin/env python3
+
+# The Atmosic In-System Programming Tool (ISP) is for bundling all
+# three types of binaries -- OTP NVDS, flash NVDS, and flash -- into a
+# single binary archive.  The ISP tool can then be used to unpack the
+# components of the archive and download them on a device.  This is
+# particularly useful for separatating the separation of firmware
+# development and firmware downloading -- a developer will use the
+# Atmosic SDK to build the flash/OTP content and archive it and then
+# hands it off to a non-SDK user who only has access to this ISP tool
+# to program devices.
+#
+# Executing this atm_isp script with the -h option shows the available
+# subcommands.  Each subcommand also has a help menu that can be shown
+# by add -h after the subcommand name.
+
+import argparse
+import atm_isp_python.atm_isp_pb2 as ISP
+import os
+import os.path
+import sys
+import tempfile
+import time
+import pprint
+import platform
+
+def auto_int(x):
+    return int(x, 0)
+
+def parse_args(args=None, namespace=None):
+    output_base_parser = argparse.ArgumentParser(add_help=False)
+    output_base_parser\
+        .add_argument('-o', '--output',
+                      dest='output_path',
+                      metavar='NEW_ARCHIVE',
+                      help='Output archive file (default: stdout)')
+
+    base_parser = argparse.ArgumentParser(add_help=False)
+    base_parser\
+        .add_argument('-i', '--input',
+                      dest='input_path',
+                      metavar='ARCHIVE',
+                      default=os.devnull, help='Input archive file')
+
+    verbose_parser = argparse.ArgumentParser(add_help=False)
+    verbose_parser.add_argument('-v', '--verbose', dest='verbose', action="store_true", help="increase output verbosity")
+
+    openocd_load_base_parser = argparse.ArgumentParser(add_help=False, parents=[base_parser, output_base_parser, verbose_parser])
+    openocd_load_base_parser.add_argument('image', type=argparse.FileType('rb'), help='Path to image')
+
+    openocd_load_flash_base_parser = argparse.ArgumentParser(
+        add_help=False,
+        parents=[openocd_load_base_parser]
+    )
+    openocd_load_flash_base_parser.add_argument('region_start', type=auto_int, nargs='?', help='Start address of flash region to erase')
+    openocd_load_flash_base_parser.add_argument('region_size', type=auto_int, nargs='?', help='Size of flash region to erase')
+
+    parser = argparse.ArgumentParser(description='Atmosic ISP Tool')
+    subparsers = parser.add_subparsers(dest='opcode')
+
+    init_parser = subparsers.add_parser('init', parents=[output_base_parser])
+    init_parser.add_argument('family', help='Platform family (e.g. atm2)')
+    init_parser.add_argument('name', help='Full platform name (e.g. ATM2xxx-x0x)')
+
+    openocd_load_flash_parser = subparsers.add_parser(
+        'loadFlash',
+        parents=[openocd_load_flash_base_parser]
+    )
+
+    openocd_load_flash_parser.add_argument('address', type=auto_int, nargs='?',
+        help='Address where image should be loaded')
+    openocd_load_flash_parser.add_argument('-mpr_start', '--mpr_start',
+        dest='mpr_start', metavar='MPR_START', type=auto_int, required=False,  help='MPR_START')
+    openocd_load_flash_parser.add_argument('-mpr_size', '--mpr_size',
+        dest='mpr_size', metavar='MPR_SIZE', type=auto_int, required=False, help='MPR_SIZE')
+    openocd_load_flash_parser.add_argument('-mpr_lock_size', '--mpr_lock_size',
+        dest='mpr_lock_size', metavar='MPR_LOCK_SIZE', type=auto_int, required=False, help='MPR_LOCK_SIZE')
+
+    openocd_load_flash_nvds_parser = subparsers.add_parser(
+        'loadFlashNvds',
+        parents=[openocd_load_flash_base_parser]
+    )
+
+    openocd_load_otp_nvds_parser = subparsers.add_parser(
+        'loadOtpNvds',
+        parents=[openocd_load_base_parser]
+    )
+
+    decode_parser = subparsers.add_parser('decode', parents=[base_parser])
+
+    burn_parser = subparsers.add_parser('burn', parents=[base_parser])
+    burn_parser.add_argument('-r', '--openocd_pkg_root', help='Path to directory where openocd and its scripts are found')
+    burn_parser.add_argument('-E', '--openocd_script_only', action='store_true', help='Stop after preparing OpenOCD script')
+    burn_parser.add_argument('-e', '--erase_workarounds', action='store_true', help='Erase workaround tags in OTP before loading OTP')
+    burn_parser.add_argument('-v', '--verbose', action='store_true', help='Verbose mode')
+    burn_parser.add_argument('-c', '--check_image', action='store_true', help='Verify OTP/flash image after burning/loading')
+    burn_parser.add_argument('-t', '--tcl_script', help='Path to output Jim Tcl script for use by OpenOCD (generates Jim Tcl script only; delays all operations post-unpacking of archive to Tcl/OpenOCD); implies -E')
+    burn_parser.add_argument('-d', '--dst_dir', help='Use this directory to dump openocd script in; implies -E')
+    burn_parser.add_argument('-p', '--program_only', action='store_true', help='Program the device only (no reset hard on exit)')
+    return parser.parse_args(args, namespace)
+
+def strattr(a, attr=None, fmt=str, treat_0_as_undef=False):
+    if type(a) == int:
+        if a == 0 and treat_0_as_undef:
+            return ''
+    if attr is None:
+        return fmt(a)
+    return '%s=%s'%(attr, fmt(a))
+
+def imgstr(image):
+    maxBytes = 8
+    if len(image) > maxBytes:
+        return pprint.pformat(image[0:maxBytes]) + '...'
+    else:
+        return pprint.pformat(image)
+
+def imgsz(img):
+    return '(size=%u,content=%s)'%(len(img), imgstr(img))
+
+# Lists the contents of the archive
+class PrintArchive:
+    def __init__(self, out):
+        self.out = out
+    def print_cmd(self, opcode, image, op_specific_arg_names, op_specific_arg_values):
+        tokens = [opcode]
+        tokens.append(strattr(image, 'image', imgsz))
+        arg_names_rev = op_specific_arg_names
+        arg_names_rev.reverse()
+        tokens_op_spec_rev = []
+        for i, arg_name in enumerate(arg_names_rev):
+            token = strattr(op_specific_arg_values[-1 - i], arg_name, str, not tokens_op_spec_rev)
+            if token:
+                tokens_op_spec_rev.append(token)
+        tokens_op_spec_rev.reverse()
+        tokens.extend(tokens_op_spec_rev)
+        self.out.write(' '.join(filter(None, tokens)))
+        self.out.write('\n')
+    def LoadOtpNvds(self, image):
+        self.print_cmd('LoadOtpNvds', image)
+    def LoadFlashNvds(self, image, region_start, region_size):
+        self.print_cmd('LoadFlashNvds', image, ['region_start', 'region_size'], [region_start, region_size])
+    def LoadFlash(self, image, region_start, region_size, address):
+        self.print_cmd('LoadFlash', image, ['region_start', 'region_size', 'address'], [region_start, region_size, address])
+    def Platform(self, family, name):
+        self.out.write('Platform {} ({} family)\n'.format(name, family))
+
+# Executes a loadFlash* command from the archive
+def iter_archive_aux_flash(cmdName, cmd, handler):
+    image = cmd.commonLoadFlash.commonLoad.image
+    region_start = cmd.commonLoadFlash.region_start
+    region_size = cmd.commonLoadFlash.region_size
+    if cmdName == 'loadFlashNvds':
+        handler.LoadFlashNvds(image, region_start, region_size)
+    elif cmdName == 'loadFlash':
+        handler.LoadFlash(image, region_start, region_size, cmd.address)
+    else:
+        return False
+    return True
+
+# Executes a command from the archive
+def iter_archive_aux(cmdName, cmd, handler):
+    if cmdName == 'loadOtpNvds':
+        handler.LoadOtpNvds(cmd.commonLoad.image)
+    elif iter_archive_aux_flash(cmdName, cmd, handler):
+        pass
+    else:
+        return False
+    return True
+
+# Executes all commands in the archive
+def iter_archive(archive, handler):
+    platform = archive.meta.platform
+    handler.Platform(platform.family, platform.name)
+    for cmdUnion in archive.script:
+        cmdName = cmdUnion.WhichOneof("cmdUnion")
+        cmd = getattr(cmdUnion, cmdName)
+        if not iter_archive_aux(cmdName, cmd, handler):
+            raise Exception('[iter_archive] Unknown command name: %s'%cmdName)
+
+def serialize_archive(archive, output_path=None):
+    serialized_archive = archive.SerializeToString()
+    if not output_path:
+        sys.stdout.buffer.write(serialized_archive)
+    else:
+        with open(output_path, 'wb') as output:
+            output.write(serialized_archive)
+
+def remove_image_if_exists(imagepath):
+    if os.path.exists(imagepath):
+        os.remove(imagepath)
+
+def this_file():
+    if hasattr(sys, 'frozen') and hasattr(sys, '_MEIPASS'):
+        return sys.executable
+    return __file__
+
+# Utilities for locating and interacting with tools -- nvds_tool and openocd
+class Tools:
+    openocd_pkg_root = os.path.abspath(os.path.join(os.path.dirname(this_file()), '..'))
+    platform_family = 'plat_family'
+    platform_name = 'plat_name'
+    @staticmethod
+    def pfx(system = platform.system()):
+        if system == 'Linux':
+            return 'Linux'
+        if system == 'Darwin':
+            return 'Darwin'
+        if system == 'Windows' or \
+           system.startswith('MSYS') or \
+           system.startswith('MINGW'):
+            return 'Windows_NT'
+        raise Exception("Unknown platform '%s'"%system)
+    @staticmethod
+    def nvds_tool():
+        return os.path.join(Tools.platform_dir(), 'tools', 'bin', Tools.pfx(), 'nvds_tool')
+    @staticmethod
+    def set_openocd(openocd):
+        Tools.openocd = openocd
+    @staticmethod
+    def set_openocd_pkg_root(root):
+        Tools.openocd_pkg_root = root
+    @staticmethod
+    def set_platform(platform_name, platform_family):
+        Tools.platform_name = platform_name
+        Tools.platform_family = platform_family
+    @staticmethod
+    def openocd_dir():
+        openocd_pkg_root = Tools.openocd_pkg_root
+        return os.path.join(openocd_pkg_root, 'tools', 'openocd')
+    @staticmethod
+    def platform_dir():
+        openocd_pkg_root = Tools.openocd_pkg_root
+        platform_family = Tools.platform_family
+        platform_name = Tools.platform_name
+        platforms_dir = os.path.join(openocd_pkg_root, 'platform')
+        return os.path.join(platforms_dir, platform_family, platform_name)
+    @staticmethod
+    def openocd_flags():
+        openocd_dir = Tools.openocd_dir()
+        openocd_cfg_dir = os.path.join(Tools.platform_dir(), 'openocd')
+        flags = [
+            '-s', os.path.join(openocd_dir, 'tcl'),
+            '-s', openocd_cfg_dir,
+            '-f', '{}x_openocd.cfg'.format(Tools.platform_family),
+        ]
+        return flags
+    @staticmethod
+    def openocd():
+        openocd_dir = Tools.openocd_dir()
+        return os.path.join(openocd_dir, 'bin', Tools.pfx(), 'openocd')
+
+# Constructs nvds_tool commands
+class NvdsTool:
+    def __init__(self, in_nvds_path, out_nvds_path, new_nvds_paths = [], inverted = True):
+        self.in_nvds_path = in_nvds_path
+        self.out_nvds_path = out_nvds_path
+        self.new_nvds_paths = new_nvds_paths
+        self.inverted = inverted
+
+    def merge_cmd(self, erase_workarounds=False):
+        args = [Tools.nvds_tool()]
+        if self.inverted:
+            args.append('-i')
+        args.extend(['-r', self.in_nvds_path])
+        if erase_workarounds:
+            args.extend(['-E', 'all'])
+        for p in self.new_nvds_paths:
+            args.extend(['-r', p])
+        args.extend(['-b', '-o', self.out_nvds_path])
+        return ' '.join(args)
+
+# Constructs OpenOCD scripts for executing the commands in the archive
+class WriteOpenOcdScript:
+    otp_nvds = 'otp_nvds.nvm'
+    old_otp_nvds = 'old_' + otp_nvds
+    sydney_burn_nvm = 'sydney_burn_nvm'
+    sydney_dump_nvm = 'sydney_dump_nvm'
+    sydney_verify_nvm = 'sydney_verify_nvm'
+    exit_code_failure_base = 0x10
+    exit_code_failure_nvds_tool = exit_code_failure_base
+    def __init__(self, dirpath, must_be_empty=True, verbose=True, check_image=True, tcl_script=None, program_only=False):
+        self.dirpath = dirpath
+        self.verbose = verbose
+        self.check_image = check_image
+        self.tcl_script = tcl_script
+        self.program_only = program_only
+        if not os.path.exists(dirpath):
+            os.makedirs(dirpath)
+        elif os.path.isfile(dirpath):
+            raise Exception('"%s" is not a directory')
+        elif not os.access(dirpath, os.W_OK):
+            raise Exception('"%s" is not writable')
+        elif must_be_empty and os.listdir(dirpath):
+            raise Exception('"%s" is not empty')
+        if tcl_script:
+            script_path = tcl_script
+        else:
+            script_path = self.path('atm.tcl')
+        self.script = open(script_path, 'w')
+        if not tcl_script:
+            self.script.write('init\n')
+        self.script.write('set ::env(ERASE_UPGRADE_DATA) 1\n')# Make this opt'l?
+        self.image_counts = {
+            self.sydney_burn_nvm: 0,
+            'sydney_load_nvds': 0,
+            'sydney_load_flash': 0,
+        }
+    def finalize_script(self, erase_workarounds = False):
+        if self.image_counts[self.sydney_burn_nvm] > 0:
+            self.read_n_modify_otp(erase_workarounds)
+            self.print_cmd(self.sydney_burn_nvm, self.path(self.otp_nvds))
+            if self.check_image:
+                self.print_cmd(self.sydney_verify_nvm, self.path(self.otp_nvds))
+        if not self.tcl_script:
+            if not self.program_only:
+                self.script.write('set _RESET_HARD_ON_EXIT 1\n')
+            self.script.write('exit\n')
+        self.script.close()
+
+    def path(self, f):
+        return os.path.join(self.dirpath, f)
+
+    def trace(self, msg):
+        if self.verbose:
+            sys.stderr.write(msg + '\n')
+
+    def openocd_cmd(self, args):
+        openocd = Tools.openocd()
+        openocd_args = [openocd]
+        openocd_args.extend(Tools.openocd_flags())
+        openocd_args.extend(args)
+        return openocd_args
+
+    def exec_openocd(self, args, env_override=''):
+        openocd_cmd_args = self.openocd_cmd(args)
+        openocd_cmd = ' '.join(openocd_cmd_args)
+        self.trace('Executing "%s"'%openocd_cmd)
+        exit_code = os.system(env_override + ' ' + openocd_cmd if env_override else openocd_cmd)
+        if exit_code != 0:
+            msg1 = '%s command returned %u status'%(openocd_cmd_args[0], exit_code)
+            msg2 = 'Command was "%s"'%openocd_cmd
+            raise Exception(msg1, msg2)
+
+    def exec_openocd_cmd(self, cmd, env_override=''):
+        self.exec_openocd(['-c', cmd])
+
+    def exec_openocd_script(self, script):
+        self.exec_openocd(['-f', script])
+
+    def reset_target(self):
+        try:
+            self.exec_openocd_cmd("'init; exit'", 'FTDI_BENIGN_BOOT=1 FTDI_HARD_RESET=1')
+        except Exception as e:
+            self.trace(str(e));
+        try:
+            self.exec_openocd_cmd("'init; exit'", 'FTDI_BENIGN_BOOT=1 FTDI_HARD_RESET=0')
+        except Exception as e:
+            self.trace(str(e));
+        try:
+            self.exec_openocd_cmd("'init; set_normal_boot; exit'", 'FTDI_BENIGN_BOOT=1')
+        except Exception as e:
+            self.trace(str(e));
+            time.sleep(1)
+            try:
+                self.exec_openocd_cmd("'init; set_normal_boot; exit'", 'FTDI_BENIGN_BOOT=1')
+            except Exception as e:
+                self.trace(str(e));
+
+    def exec_script(self, reset_target=True):
+        sys.stderr.write('calling exec_script\n')
+        if reset_target:
+            self.reset_target();
+        self.exec_openocd_script(self.script.name)
+
+    def read_n_modify_otp_aux(self, old_otp_nvds_path, erase_workarounds):
+        # Read
+        if self.tcl_script:
+            cmd = self.sydney_dump_nvm
+            self.script.write('%s {%s}\n'%(cmd, old_otp_nvds_path))
+        else:
+            self.exec_openocd_cmd("'init; %s {%s}; exit'"%(self.sydney_dump_nvm, old_otp_nvds_path))
+        # Modify
+        otp_paths = []
+        self.iter_images(self.sydney_burn_nvm, lambda p: otp_paths.append(p))
+        nvds_tool = NvdsTool(old_otp_nvds_path, self.path(self.otp_nvds), otp_paths)
+        nvds_tool_cmd = nvds_tool.merge_cmd(erase_workarounds)
+        if self.tcl_script:
+            self.script_trace(nvds_tool_cmd)
+            self.script.write("""if {{ [catch {{exec {0}}} msg] }} {{
+    puts stderr "nvds_tool merge failed: $msg"
+    puts stderr "Command was '{0}'"
+}}\n""".format(nvds_tool_cmd))
+            return
+        self.trace('Executing "%s"'%nvds_tool_cmd)
+        exit_code = os.system(nvds_tool_cmd)
+        if exit_code != 0:
+            msgs = [
+                'nvds_tool merge returned %u status'%exit_code,
+                'Command was %s'%nvds_tool_cmd
+            ]
+            raise Exception('\n'.join(msgs))
+
+    def read_n_modify_otp(self, erase_workarounds, keep_old_otp_nvds=False):
+        if self.tcl_script:
+            self.read_n_modify_otp_aux(self.path(self.old_otp_nvds), erase_workarounds)
+            return
+        pulled_otp, old_otp_nvds = tempfile.mkstemp()
+        self.read_n_modify_otp_aux(old_otp_nvds, erase_workarounds)
+        os.close(pulled_otp)
+        if not keep_old_otp_nvds:
+            os.unlink(old_otp_nvds)
+
+    def script_trace(self, cmd):
+        if self.verbose:
+            self.script.write('puts {Executing \'%s\'}\n'%cmd)
+
+    def print_cmd(self, openocd_fcn, imagepath, *op_specific_data):
+        tokens = [openocd_fcn]
+        tokens.append('{%s}'%imagepath)
+        op_specific_data_rev = list(op_specific_data)
+        op_specific_data_rev.reverse()
+        tokens_op_spec_rev = []
+        for v in op_specific_data_rev:
+            token = strattr(v, None, str, not tokens_op_spec_rev)
+            if token:
+                tokens_op_spec_rev.append(token)
+        tokens_op_spec_rev.reverse()
+        tokens.extend(tokens_op_spec_rev)
+        cmd = ' '.join(tokens)
+        self.script_trace(cmd)
+        self.script.write(cmd + '\n')
+
+    def iter_images(self, openocd_fcn, callback, num_images=None):
+        if num_images is None:
+            num_images = self.image_counts.get(openocd_fcn)
+        for i in range(0, num_images):
+            callback(self.path(WriteOpenOcdScript.imgname(openocd_fcn, i)))
+
+    def iter_images_all(self, callback):
+        for openocd_fcn, count in self.image_counts.items():
+            self.iter_images(openocd_fcn, callback, count)
+
+    def clean(self):
+        self.iter_images_all(remove_image_if_exists)
+        remove_image_if_exists(self.path(self.script.name))
+        if self.image_counts[self.sydney_burn_nvm] > 0:
+            remove_image_if_exists(self.path(self.otp_nvds))
+
+    @staticmethod
+    def imgname(openocd_fcn, count):
+        return '%s.%d'%(openocd_fcn, count)
+    def save_image(self, openocd_fcn, image):
+        imagename = WriteOpenOcdScript.imgname(openocd_fcn, self.image_counts[openocd_fcn])
+        self.image_counts[openocd_fcn] += 1
+        imagepath = self.path(imagename)
+        with open(imagepath, 'wb') as imagefile:
+            imagefile.write(image)
+        return imagepath
+    def save_img_n_print_cmd(self, openocd_fcn, image, do_check_image, *op_specific_data):
+        imagepath = self.save_image(openocd_fcn, image)
+        self.print_cmd(openocd_fcn, imagepath, *op_specific_data)
+        if self.check_image and do_check_image:
+            openocd_fcn_verify = openocd_fcn.replace('load', 'verify')
+            addr = op_specific_data[2]
+            if addr:
+                self.print_cmd(openocd_fcn_verify, imagepath, addr)
+            else:
+                self.print_cmd(openocd_fcn_verify, imagepath)
+    def LoadOtpNvds(self, image):
+        self.save_image('sydney_burn_nvm', image)
+    def LoadFlashNvds(self, image, region_start, region_size):
+        self.save_img_n_print_cmd('sydney_load_nvds', image, False, region_start, region_size)
+    def LoadFlash(self, image, region_start, region_size, address):
+        self.save_img_n_print_cmd('sydney_load_flash', image, True, region_start, region_size, address)
+    def Platform(self, family, name):
+        Tools.set_platform(name, family)
+
+def burn_archive(archive, openocd_opts, verbose=False, check_image=False, tcl_script=None, dst_dir=None, program_only=False):
+    if openocd_opts.openocd_pkg_root is not None:
+        Tools.set_openocd_pkg_root(openocd_opts.openocd_pkg_root)
+    should_exec_oocd_script_and_cleanup = not (openocd_opts.openocd_script_only or tcl_script or dst_dir)
+    d = dst_dir if dst_dir else tempfile.mkdtemp(None, 'burn_arch_', Tools.openocd_pkg_root)
+    w = WriteOpenOcdScript(d, should_exec_oocd_script_and_cleanup, verbose, check_image, tcl_script, program_only)
+    iter_archive(archive, w)
+    w.finalize_script(openocd_opts.erase_workarounds)
+    if should_exec_oocd_script_and_cleanup:
+        w.exec_script()
+        w.clean()
+        os.rmdir(d)
+    elif not dst_dir:
+        print(d)
+
+def ext_and_serialize_archive(archive, opcode, op_specific_data):
+    if extend_archive(archive, opcode, op_specific_data.image, op_specific_data):
+        serialize_archive(archive, op_specific_data.output_path)
+        return True
+    return False
+
+def exec_cli_op(archive, opcode, op_specific_data):
+    if opcode == 'decode':
+        decode_mpr_meta_info(archive)
+        iter_archive(archive, PrintArchive(sys.stdout))
+    elif opcode == 'burn':
+        burn_archive(archive, op_specific_data, op_specific_data.verbose, op_specific_data.check_image, op_specific_data.tcl_script, op_specific_data.dst_dir, op_specific_data.program_only)
+    elif ext_and_serialize_archive(archive, opcode, op_specific_data):
+        pass
+    else:
+        raise Exception('Unknown openocd "%s"'%opcode)
+
+
+def decode_mpr_meta_info(archive):
+    sys.stdout.write('MPR start: {}, size: {}, lock_size: {}\n'.format(
+        archive.meta.mpr_start, archive.meta.mpr_size, archive.meta.mpr_lock_size))
+
+def extend_archive(archive, opcode, image, op_specific_data):
+    field = ISP.Archive.Command.DESCRIPTOR.fields_by_name[opcode]
+    cmdTy = field.message_type
+    cmdUnion = ISP.Archive.Command()
+    cmdAttr = getattr(cmdUnion, opcode)
+    cmd = getattr(ISP.Archive, cmdTy.name)()
+    if opcode == 'loadOtpNvds':
+        commonLoad = cmd.commonLoad
+    else:
+        commonLoad = cmd.commonLoadFlash.commonLoad
+    commonLoad.image = image.read()
+    if opcode.startswith('loadFlash'):
+        for attrName in ['region_start', 'region_size']:
+            attr = getattr(op_specific_data, attrName)
+            if attr is not None:
+                setattr(cmd.commonLoadFlash, attrName, attr)
+    if opcode == 'loadFlash':
+        if op_specific_data.address is not None:
+            cmd.address = op_specific_data.address
+
+            for attrName in ['mpr_start', 'mpr_size', 'mpr_lock_size']:
+                attr = getattr(op_specific_data, attrName)
+                if attr is not None:
+                    if op_specific_data.verbose:
+                        print('store meta {}={} '.format(attrName, attr))
+                    setattr(archive.meta, attrName, attr)
+    cmdAttr.CopyFrom(cmd)
+    archive.script.append(cmdUnion)
+    return archive
+
+def main(args=None, namespace=None):
+    args = parse_args(args, namespace)
+    archive = ISP.Archive()
+    if args.opcode == 'init':
+        archive.meta.platform.family = args.family
+        archive.meta.platform.name = args.name
+        serialize_archive(archive, args.output_path)
+        return
+    if args.input_path == '-':
+        input_archive = sys.stdin.buffer.read()
+    else:
+        with open(args.input_path, 'rb') as input_archive_file:
+            input_archive = input_archive_file.read()
+    archive.ParseFromString(input_archive)
+    platform = archive.meta.platform
+    if platform.family and platform.name:
+        exec_cli_op(archive, args.opcode, args)
+    else:
+        sys.stderr.write('Uninitialized archive "{}"\n'.format(args.input_path))
+        sys.exit(1)
+
+if __name__ == '__main__':
+    if sys.version_info[0] < 3:
+        sys.stderr.write('%s requires Python 3\n'%__file__)
+        sys.exit(2)
+    main()
diff --git a/tools/atm_isp_python/__init__.py b/tools/atm_isp_python/__init__.py
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/tools/atm_isp_python/__init__.py
diff --git a/tools/atm_isp_python/atm_isp_pb2.py b/tools/atm_isp_python/atm_isp_pb2.py
new file mode 100644
index 0000000..08ed301
--- /dev/null
+++ b/tools/atm_isp_python/atm_isp_pb2.py
@@ -0,0 +1,550 @@
+# -*- coding: utf-8 -*-
+# Generated by the protocol buffer compiler.  DO NOT EDIT!
+# source: atm_isp.proto
+
+from google.protobuf import descriptor as _descriptor
+from google.protobuf import message as _message
+from google.protobuf import reflection as _reflection
+from google.protobuf import symbol_database as _symbol_database
+# @@protoc_insertion_point(imports)
+
+_sym_db = _symbol_database.Default()
+
+
+
+
+DESCRIPTOR = _descriptor.FileDescriptor(
+  name='atm_isp.proto',
+  package='',
+  syntax='proto3',
+  serialized_options=b'\n\023com.example.atmosic',
+  create_key=_descriptor._internal_create_key,
+  serialized_pb=b'\n\ratm_isp.proto\"\xd4\x07\n\x07\x41rchive\x12\x1f\n\x04meta\x18\x01 \x01(\x0b\x32\x11.Archive.MetaInfo\x12 \n\x06script\x18\x02 \x03(\x0b\x32\x10.Archive.Command\x1a(\n\x08Platform\x12\x0e\n\x06\x66\x61mily\x18\x01 \x01(\t\x12\x0c\n\x04name\x18\x02 \x01(\t\x1a~\n\x08MetaInfo\x12\x11\n\tsignature\x18\x01 \x01(\t\x12#\n\x08platform\x18\x02 \x01(\x0b\x32\x11.Archive.Platform\x12\x11\n\tmpr_start\x18\x03 \x01(\r\x12\x10\n\x08mpr_size\x18\x04 \x01(\r\x12\x15\n\rmpr_lock_size\x18\x05 \x01(\r\x1a@\n\x19HiddenCmdNvdsReadModWrite\x12\x0e\n\x06invert\x18\x01 \x01(\x08\x12\x13\n\x0bnvdsContent\x18\x02 \x01(\x0c\x1a#\n\x12\x43mdOpenOcdLoadBase\x12\r\n\x05image\x18\x01 \x01(\x0c\x1au\n\x17\x43mdOpenOcdLoadFlashBase\x12/\n\ncommonLoad\x18\x01 \x01(\x0b\x32\x1b.Archive.CmdOpenOcdLoadBase\x12\x14\n\x0cregion_start\x18\x02 \x01(\r\x12\x13\n\x0bregion_size\x18\x03 \x01(\r\x1a\x61\n\x13\x43mdOpenOcdLoadFlash\x12\x39\n\x0f\x63ommonLoadFlash\x18\x01 \x01(\x0b\x32 .Archive.CmdOpenOcdLoadFlashBase\x12\x0f\n\x07\x61\x64\x64ress\x18\x02 \x01(\r\x1aT\n\x17\x43mdOpenOcdLoadFlashNvds\x12\x39\n\x0f\x63ommonLoadFlash\x18\x01 \x01(\x0b\x32 .Archive.CmdOpenOcdLoadFlashBase\x1aH\n\x15\x43mdOpenOcdLoadOtpNvds\x12/\n\ncommonLoad\x18\x01 \x01(\x0b\x32\x1b.Archive.CmdOpenOcdLoadBase\x1a\xfa\x01\n\x07\x43ommand\x12>\n\x10nvdsReadModWrite\x18\x01 \x01(\x0b\x32\".Archive.HiddenCmdNvdsReadModWriteH\x00\x12\x31\n\tloadFlash\x18\x02 \x01(\x0b\x32\x1c.Archive.CmdOpenOcdLoadFlashH\x00\x12\x39\n\rloadFlashNvds\x18\x03 \x01(\x0b\x32 .Archive.CmdOpenOcdLoadFlashNvdsH\x00\x12\x35\n\x0bloadOtpNvds\x18\x04 \x01(\x0b\x32\x1e.Archive.CmdOpenOcdLoadOtpNvdsH\x00\x42\n\n\x08\x63mdUnionB\x15\n\x13\x63om.example.atmosicb\x06proto3'
+)
+
+
+
+
+_ARCHIVE_PLATFORM = _descriptor.Descriptor(
+  name='Platform',
+  full_name='Archive.Platform',
+  filename=None,
+  file=DESCRIPTOR,
+  containing_type=None,
+  create_key=_descriptor._internal_create_key,
+  fields=[
+    _descriptor.FieldDescriptor(
+      name='family', full_name='Archive.Platform.family', index=0,
+      number=1, type=9, cpp_type=9, label=1,
+      has_default_value=False, default_value=b"".decode('utf-8'),
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+    _descriptor.FieldDescriptor(
+      name='name', full_name='Archive.Platform.name', index=1,
+      number=2, type=9, cpp_type=9, label=1,
+      has_default_value=False, default_value=b"".decode('utf-8'),
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+  ],
+  extensions=[
+  ],
+  nested_types=[],
+  enum_types=[
+  ],
+  serialized_options=None,
+  is_extendable=False,
+  syntax='proto3',
+  extension_ranges=[],
+  oneofs=[
+  ],
+  serialized_start=96,
+  serialized_end=136,
+)
+
+_ARCHIVE_METAINFO = _descriptor.Descriptor(
+  name='MetaInfo',
+  full_name='Archive.MetaInfo',
+  filename=None,
+  file=DESCRIPTOR,
+  containing_type=None,
+  create_key=_descriptor._internal_create_key,
+  fields=[
+    _descriptor.FieldDescriptor(
+      name='signature', full_name='Archive.MetaInfo.signature', index=0,
+      number=1, type=9, cpp_type=9, label=1,
+      has_default_value=False, default_value=b"".decode('utf-8'),
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+    _descriptor.FieldDescriptor(
+      name='platform', full_name='Archive.MetaInfo.platform', index=1,
+      number=2, type=11, cpp_type=10, label=1,
+      has_default_value=False, default_value=None,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+    _descriptor.FieldDescriptor(
+      name='mpr_start', full_name='Archive.MetaInfo.mpr_start', index=2,
+      number=3, type=13, cpp_type=3, label=1,
+      has_default_value=False, default_value=0,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+    _descriptor.FieldDescriptor(
+      name='mpr_size', full_name='Archive.MetaInfo.mpr_size', index=3,
+      number=4, type=13, cpp_type=3, label=1,
+      has_default_value=False, default_value=0,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+    _descriptor.FieldDescriptor(
+      name='mpr_lock_size', full_name='Archive.MetaInfo.mpr_lock_size', index=4,
+      number=5, type=13, cpp_type=3, label=1,
+      has_default_value=False, default_value=0,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+  ],
+  extensions=[
+  ],
+  nested_types=[],
+  enum_types=[
+  ],
+  serialized_options=None,
+  is_extendable=False,
+  syntax='proto3',
+  extension_ranges=[],
+  oneofs=[
+  ],
+  serialized_start=138,
+  serialized_end=264,
+)
+
+_ARCHIVE_HIDDENCMDNVDSREADMODWRITE = _descriptor.Descriptor(
+  name='HiddenCmdNvdsReadModWrite',
+  full_name='Archive.HiddenCmdNvdsReadModWrite',
+  filename=None,
+  file=DESCRIPTOR,
+  containing_type=None,
+  create_key=_descriptor._internal_create_key,
+  fields=[
+    _descriptor.FieldDescriptor(
+      name='invert', full_name='Archive.HiddenCmdNvdsReadModWrite.invert', index=0,
+      number=1, type=8, cpp_type=7, label=1,
+      has_default_value=False, default_value=False,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+    _descriptor.FieldDescriptor(
+      name='nvdsContent', full_name='Archive.HiddenCmdNvdsReadModWrite.nvdsContent', index=1,
+      number=2, type=12, cpp_type=9, label=1,
+      has_default_value=False, default_value=b"",
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+  ],
+  extensions=[
+  ],
+  nested_types=[],
+  enum_types=[
+  ],
+  serialized_options=None,
+  is_extendable=False,
+  syntax='proto3',
+  extension_ranges=[],
+  oneofs=[
+  ],
+  serialized_start=266,
+  serialized_end=330,
+)
+
+_ARCHIVE_CMDOPENOCDLOADBASE = _descriptor.Descriptor(
+  name='CmdOpenOcdLoadBase',
+  full_name='Archive.CmdOpenOcdLoadBase',
+  filename=None,
+  file=DESCRIPTOR,
+  containing_type=None,
+  create_key=_descriptor._internal_create_key,
+  fields=[
+    _descriptor.FieldDescriptor(
+      name='image', full_name='Archive.CmdOpenOcdLoadBase.image', index=0,
+      number=1, type=12, cpp_type=9, label=1,
+      has_default_value=False, default_value=b"",
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+  ],
+  extensions=[
+  ],
+  nested_types=[],
+  enum_types=[
+  ],
+  serialized_options=None,
+  is_extendable=False,
+  syntax='proto3',
+  extension_ranges=[],
+  oneofs=[
+  ],
+  serialized_start=332,
+  serialized_end=367,
+)
+
+_ARCHIVE_CMDOPENOCDLOADFLASHBASE = _descriptor.Descriptor(
+  name='CmdOpenOcdLoadFlashBase',
+  full_name='Archive.CmdOpenOcdLoadFlashBase',
+  filename=None,
+  file=DESCRIPTOR,
+  containing_type=None,
+  create_key=_descriptor._internal_create_key,
+  fields=[
+    _descriptor.FieldDescriptor(
+      name='commonLoad', full_name='Archive.CmdOpenOcdLoadFlashBase.commonLoad', index=0,
+      number=1, type=11, cpp_type=10, label=1,
+      has_default_value=False, default_value=None,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+    _descriptor.FieldDescriptor(
+      name='region_start', full_name='Archive.CmdOpenOcdLoadFlashBase.region_start', index=1,
+      number=2, type=13, cpp_type=3, label=1,
+      has_default_value=False, default_value=0,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+    _descriptor.FieldDescriptor(
+      name='region_size', full_name='Archive.CmdOpenOcdLoadFlashBase.region_size', index=2,
+      number=3, type=13, cpp_type=3, label=1,
+      has_default_value=False, default_value=0,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+  ],
+  extensions=[
+  ],
+  nested_types=[],
+  enum_types=[
+  ],
+  serialized_options=None,
+  is_extendable=False,
+  syntax='proto3',
+  extension_ranges=[],
+  oneofs=[
+  ],
+  serialized_start=369,
+  serialized_end=486,
+)
+
+_ARCHIVE_CMDOPENOCDLOADFLASH = _descriptor.Descriptor(
+  name='CmdOpenOcdLoadFlash',
+  full_name='Archive.CmdOpenOcdLoadFlash',
+  filename=None,
+  file=DESCRIPTOR,
+  containing_type=None,
+  create_key=_descriptor._internal_create_key,
+  fields=[
+    _descriptor.FieldDescriptor(
+      name='commonLoadFlash', full_name='Archive.CmdOpenOcdLoadFlash.commonLoadFlash', index=0,
+      number=1, type=11, cpp_type=10, label=1,
+      has_default_value=False, default_value=None,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+    _descriptor.FieldDescriptor(
+      name='address', full_name='Archive.CmdOpenOcdLoadFlash.address', index=1,
+      number=2, type=13, cpp_type=3, label=1,
+      has_default_value=False, default_value=0,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+  ],
+  extensions=[
+  ],
+  nested_types=[],
+  enum_types=[
+  ],
+  serialized_options=None,
+  is_extendable=False,
+  syntax='proto3',
+  extension_ranges=[],
+  oneofs=[
+  ],
+  serialized_start=488,
+  serialized_end=585,
+)
+
+_ARCHIVE_CMDOPENOCDLOADFLASHNVDS = _descriptor.Descriptor(
+  name='CmdOpenOcdLoadFlashNvds',
+  full_name='Archive.CmdOpenOcdLoadFlashNvds',
+  filename=None,
+  file=DESCRIPTOR,
+  containing_type=None,
+  create_key=_descriptor._internal_create_key,
+  fields=[
+    _descriptor.FieldDescriptor(
+      name='commonLoadFlash', full_name='Archive.CmdOpenOcdLoadFlashNvds.commonLoadFlash', index=0,
+      number=1, type=11, cpp_type=10, label=1,
+      has_default_value=False, default_value=None,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+  ],
+  extensions=[
+  ],
+  nested_types=[],
+  enum_types=[
+  ],
+  serialized_options=None,
+  is_extendable=False,
+  syntax='proto3',
+  extension_ranges=[],
+  oneofs=[
+  ],
+  serialized_start=587,
+  serialized_end=671,
+)
+
+_ARCHIVE_CMDOPENOCDLOADOTPNVDS = _descriptor.Descriptor(
+  name='CmdOpenOcdLoadOtpNvds',
+  full_name='Archive.CmdOpenOcdLoadOtpNvds',
+  filename=None,
+  file=DESCRIPTOR,
+  containing_type=None,
+  create_key=_descriptor._internal_create_key,
+  fields=[
+    _descriptor.FieldDescriptor(
+      name='commonLoad', full_name='Archive.CmdOpenOcdLoadOtpNvds.commonLoad', index=0,
+      number=1, type=11, cpp_type=10, label=1,
+      has_default_value=False, default_value=None,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+  ],
+  extensions=[
+  ],
+  nested_types=[],
+  enum_types=[
+  ],
+  serialized_options=None,
+  is_extendable=False,
+  syntax='proto3',
+  extension_ranges=[],
+  oneofs=[
+  ],
+  serialized_start=673,
+  serialized_end=745,
+)
+
+_ARCHIVE_COMMAND = _descriptor.Descriptor(
+  name='Command',
+  full_name='Archive.Command',
+  filename=None,
+  file=DESCRIPTOR,
+  containing_type=None,
+  create_key=_descriptor._internal_create_key,
+  fields=[
+    _descriptor.FieldDescriptor(
+      name='nvdsReadModWrite', full_name='Archive.Command.nvdsReadModWrite', index=0,
+      number=1, type=11, cpp_type=10, label=1,
+      has_default_value=False, default_value=None,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+    _descriptor.FieldDescriptor(
+      name='loadFlash', full_name='Archive.Command.loadFlash', index=1,
+      number=2, type=11, cpp_type=10, label=1,
+      has_default_value=False, default_value=None,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+    _descriptor.FieldDescriptor(
+      name='loadFlashNvds', full_name='Archive.Command.loadFlashNvds', index=2,
+      number=3, type=11, cpp_type=10, label=1,
+      has_default_value=False, default_value=None,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+    _descriptor.FieldDescriptor(
+      name='loadOtpNvds', full_name='Archive.Command.loadOtpNvds', index=3,
+      number=4, type=11, cpp_type=10, label=1,
+      has_default_value=False, default_value=None,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+  ],
+  extensions=[
+  ],
+  nested_types=[],
+  enum_types=[
+  ],
+  serialized_options=None,
+  is_extendable=False,
+  syntax='proto3',
+  extension_ranges=[],
+  oneofs=[
+    _descriptor.OneofDescriptor(
+      name='cmdUnion', full_name='Archive.Command.cmdUnion',
+      index=0, containing_type=None,
+      create_key=_descriptor._internal_create_key,
+    fields=[]),
+  ],
+  serialized_start=748,
+  serialized_end=998,
+)
+
+_ARCHIVE = _descriptor.Descriptor(
+  name='Archive',
+  full_name='Archive',
+  filename=None,
+  file=DESCRIPTOR,
+  containing_type=None,
+  create_key=_descriptor._internal_create_key,
+  fields=[
+    _descriptor.FieldDescriptor(
+      name='meta', full_name='Archive.meta', index=0,
+      number=1, type=11, cpp_type=10, label=1,
+      has_default_value=False, default_value=None,
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+    _descriptor.FieldDescriptor(
+      name='script', full_name='Archive.script', index=1,
+      number=2, type=11, cpp_type=10, label=3,
+      has_default_value=False, default_value=[],
+      message_type=None, enum_type=None, containing_type=None,
+      is_extension=False, extension_scope=None,
+      serialized_options=None, file=DESCRIPTOR,  create_key=_descriptor._internal_create_key),
+  ],
+  extensions=[
+  ],
+  nested_types=[_ARCHIVE_PLATFORM, _ARCHIVE_METAINFO, _ARCHIVE_HIDDENCMDNVDSREADMODWRITE, _ARCHIVE_CMDOPENOCDLOADBASE, _ARCHIVE_CMDOPENOCDLOADFLASHBASE, _ARCHIVE_CMDOPENOCDLOADFLASH, _ARCHIVE_CMDOPENOCDLOADFLASHNVDS, _ARCHIVE_CMDOPENOCDLOADOTPNVDS, _ARCHIVE_COMMAND, ],
+  enum_types=[
+  ],
+  serialized_options=None,
+  is_extendable=False,
+  syntax='proto3',
+  extension_ranges=[],
+  oneofs=[
+  ],
+  serialized_start=18,
+  serialized_end=998,
+)
+
+_ARCHIVE_PLATFORM.containing_type = _ARCHIVE
+_ARCHIVE_METAINFO.fields_by_name['platform'].message_type = _ARCHIVE_PLATFORM
+_ARCHIVE_METAINFO.containing_type = _ARCHIVE
+_ARCHIVE_HIDDENCMDNVDSREADMODWRITE.containing_type = _ARCHIVE
+_ARCHIVE_CMDOPENOCDLOADBASE.containing_type = _ARCHIVE
+_ARCHIVE_CMDOPENOCDLOADFLASHBASE.fields_by_name['commonLoad'].message_type = _ARCHIVE_CMDOPENOCDLOADBASE
+_ARCHIVE_CMDOPENOCDLOADFLASHBASE.containing_type = _ARCHIVE
+_ARCHIVE_CMDOPENOCDLOADFLASH.fields_by_name['commonLoadFlash'].message_type = _ARCHIVE_CMDOPENOCDLOADFLASHBASE
+_ARCHIVE_CMDOPENOCDLOADFLASH.containing_type = _ARCHIVE
+_ARCHIVE_CMDOPENOCDLOADFLASHNVDS.fields_by_name['commonLoadFlash'].message_type = _ARCHIVE_CMDOPENOCDLOADFLASHBASE
+_ARCHIVE_CMDOPENOCDLOADFLASHNVDS.containing_type = _ARCHIVE
+_ARCHIVE_CMDOPENOCDLOADOTPNVDS.fields_by_name['commonLoad'].message_type = _ARCHIVE_CMDOPENOCDLOADBASE
+_ARCHIVE_CMDOPENOCDLOADOTPNVDS.containing_type = _ARCHIVE
+_ARCHIVE_COMMAND.fields_by_name['nvdsReadModWrite'].message_type = _ARCHIVE_HIDDENCMDNVDSREADMODWRITE
+_ARCHIVE_COMMAND.fields_by_name['loadFlash'].message_type = _ARCHIVE_CMDOPENOCDLOADFLASH
+_ARCHIVE_COMMAND.fields_by_name['loadFlashNvds'].message_type = _ARCHIVE_CMDOPENOCDLOADFLASHNVDS
+_ARCHIVE_COMMAND.fields_by_name['loadOtpNvds'].message_type = _ARCHIVE_CMDOPENOCDLOADOTPNVDS
+_ARCHIVE_COMMAND.containing_type = _ARCHIVE
+_ARCHIVE_COMMAND.oneofs_by_name['cmdUnion'].fields.append(
+  _ARCHIVE_COMMAND.fields_by_name['nvdsReadModWrite'])
+_ARCHIVE_COMMAND.fields_by_name['nvdsReadModWrite'].containing_oneof = _ARCHIVE_COMMAND.oneofs_by_name['cmdUnion']
+_ARCHIVE_COMMAND.oneofs_by_name['cmdUnion'].fields.append(
+  _ARCHIVE_COMMAND.fields_by_name['loadFlash'])
+_ARCHIVE_COMMAND.fields_by_name['loadFlash'].containing_oneof = _ARCHIVE_COMMAND.oneofs_by_name['cmdUnion']
+_ARCHIVE_COMMAND.oneofs_by_name['cmdUnion'].fields.append(
+  _ARCHIVE_COMMAND.fields_by_name['loadFlashNvds'])
+_ARCHIVE_COMMAND.fields_by_name['loadFlashNvds'].containing_oneof = _ARCHIVE_COMMAND.oneofs_by_name['cmdUnion']
+_ARCHIVE_COMMAND.oneofs_by_name['cmdUnion'].fields.append(
+  _ARCHIVE_COMMAND.fields_by_name['loadOtpNvds'])
+_ARCHIVE_COMMAND.fields_by_name['loadOtpNvds'].containing_oneof = _ARCHIVE_COMMAND.oneofs_by_name['cmdUnion']
+_ARCHIVE.fields_by_name['meta'].message_type = _ARCHIVE_METAINFO
+_ARCHIVE.fields_by_name['script'].message_type = _ARCHIVE_COMMAND
+DESCRIPTOR.message_types_by_name['Archive'] = _ARCHIVE
+_sym_db.RegisterFileDescriptor(DESCRIPTOR)
+
+Archive = _reflection.GeneratedProtocolMessageType('Archive', (_message.Message,), {
+
+  'Platform' : _reflection.GeneratedProtocolMessageType('Platform', (_message.Message,), {
+    'DESCRIPTOR' : _ARCHIVE_PLATFORM,
+    '__module__' : 'atm_isp_pb2'
+    # @@protoc_insertion_point(class_scope:Archive.Platform)
+    })
+  ,
+
+  'MetaInfo' : _reflection.GeneratedProtocolMessageType('MetaInfo', (_message.Message,), {
+    'DESCRIPTOR' : _ARCHIVE_METAINFO,
+    '__module__' : 'atm_isp_pb2'
+    # @@protoc_insertion_point(class_scope:Archive.MetaInfo)
+    })
+  ,
+
+  'HiddenCmdNvdsReadModWrite' : _reflection.GeneratedProtocolMessageType('HiddenCmdNvdsReadModWrite', (_message.Message,), {
+    'DESCRIPTOR' : _ARCHIVE_HIDDENCMDNVDSREADMODWRITE,
+    '__module__' : 'atm_isp_pb2'
+    # @@protoc_insertion_point(class_scope:Archive.HiddenCmdNvdsReadModWrite)
+    })
+  ,
+
+  'CmdOpenOcdLoadBase' : _reflection.GeneratedProtocolMessageType('CmdOpenOcdLoadBase', (_message.Message,), {
+    'DESCRIPTOR' : _ARCHIVE_CMDOPENOCDLOADBASE,
+    '__module__' : 'atm_isp_pb2'
+    # @@protoc_insertion_point(class_scope:Archive.CmdOpenOcdLoadBase)
+    })
+  ,
+
+  'CmdOpenOcdLoadFlashBase' : _reflection.GeneratedProtocolMessageType('CmdOpenOcdLoadFlashBase', (_message.Message,), {
+    'DESCRIPTOR' : _ARCHIVE_CMDOPENOCDLOADFLASHBASE,
+    '__module__' : 'atm_isp_pb2'
+    # @@protoc_insertion_point(class_scope:Archive.CmdOpenOcdLoadFlashBase)
+    })
+  ,
+
+  'CmdOpenOcdLoadFlash' : _reflection.GeneratedProtocolMessageType('CmdOpenOcdLoadFlash', (_message.Message,), {
+    'DESCRIPTOR' : _ARCHIVE_CMDOPENOCDLOADFLASH,
+    '__module__' : 'atm_isp_pb2'
+    # @@protoc_insertion_point(class_scope:Archive.CmdOpenOcdLoadFlash)
+    })
+  ,
+
+  'CmdOpenOcdLoadFlashNvds' : _reflection.GeneratedProtocolMessageType('CmdOpenOcdLoadFlashNvds', (_message.Message,), {
+    'DESCRIPTOR' : _ARCHIVE_CMDOPENOCDLOADFLASHNVDS,
+    '__module__' : 'atm_isp_pb2'
+    # @@protoc_insertion_point(class_scope:Archive.CmdOpenOcdLoadFlashNvds)
+    })
+  ,
+
+  'CmdOpenOcdLoadOtpNvds' : _reflection.GeneratedProtocolMessageType('CmdOpenOcdLoadOtpNvds', (_message.Message,), {
+    'DESCRIPTOR' : _ARCHIVE_CMDOPENOCDLOADOTPNVDS,
+    '__module__' : 'atm_isp_pb2'
+    # @@protoc_insertion_point(class_scope:Archive.CmdOpenOcdLoadOtpNvds)
+    })
+  ,
+
+  'Command' : _reflection.GeneratedProtocolMessageType('Command', (_message.Message,), {
+    'DESCRIPTOR' : _ARCHIVE_COMMAND,
+    '__module__' : 'atm_isp_pb2'
+    # @@protoc_insertion_point(class_scope:Archive.Command)
+    })
+  ,
+  'DESCRIPTOR' : _ARCHIVE,
+  '__module__' : 'atm_isp_pb2'
+  # @@protoc_insertion_point(class_scope:Archive)
+  })
+_sym_db.RegisterMessage(Archive)
+_sym_db.RegisterMessage(Archive.Platform)
+_sym_db.RegisterMessage(Archive.MetaInfo)
+_sym_db.RegisterMessage(Archive.HiddenCmdNvdsReadModWrite)
+_sym_db.RegisterMessage(Archive.CmdOpenOcdLoadBase)
+_sym_db.RegisterMessage(Archive.CmdOpenOcdLoadFlashBase)
+_sym_db.RegisterMessage(Archive.CmdOpenOcdLoadFlash)
+_sym_db.RegisterMessage(Archive.CmdOpenOcdLoadFlashNvds)
+_sym_db.RegisterMessage(Archive.CmdOpenOcdLoadOtpNvds)
+_sym_db.RegisterMessage(Archive.Command)
+
+
+DESCRIPTOR._options = None
+# @@protoc_insertion_point(module_scope)
diff --git a/tools/openocd/contrib/60-openocd.rules b/tools/openocd/contrib/60-openocd.rules
new file mode 100644
index 0000000..c59bf43
--- /dev/null
+++ b/tools/openocd/contrib/60-openocd.rules
@@ -0,0 +1,179 @@
+# Copy this file to /etc/udev/rules.d/
+# If rules fail to reload automatically, you can refresh udev rules
+# with the command "udevadm control --reload"
+
+ACTION!="add|change", GOTO="openocd_rules_end"
+
+SUBSYSTEM=="gpio", MODE="0660", GROUP="plugdev", TAG+="uaccess"
+
+SUBSYSTEM!="usb|tty|hidraw", GOTO="openocd_rules_end"
+
+# Please keep this list sorted by VID:PID
+
+# opendous and estick
+ATTRS{idVendor}=="03eb", ATTRS{idProduct}=="204f", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT232/FT245 VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6001", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT2232 VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6010", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT4232 VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6011", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT232H VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6014", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# DISTORTEC JTAG-lock-pick Tiny 2
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8220", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# TUMPA, TUMPA Lite
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8a98", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8a99", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# XDS100v2
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="a6d0", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Xverve Signalyzer Tool (DT-USB-ST), Signalyzer LITE (DT-USB-SLITE)
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bca0", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bca1", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# TI/Luminary Stellaris Evaluation Board FTDI (several)
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bcd9", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# TI/Luminary Stellaris In-Circuit Debug Interface FTDI (ICDI) Board
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bcda", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# egnite Turtelizer 2
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bdc8", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Section5 ICEbear
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c140", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c141", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Amontec JTAGkey and JTAGkey-tiny
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="cff8", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Nuvoton NuLink
+ATTRS{idVendor}=="0416", ATTRS{idProduct}=="511b", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0416", ATTRS{idProduct}=="511c", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0416", ATTRS{idProduct}=="511d", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0416", ATTRS{idProduct}=="5200", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0416", ATTRS{idProduct}=="5201", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# TI ICDI
+ATTRS{idVendor}=="0451", ATTRS{idProduct}=="c32a", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# STMicroelectronics ST-LINK V1
+ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3744", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# STMicroelectronics ST-LINK/V2
+ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3748", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# STMicroelectronics ST-LINK/V2.1
+ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374b", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3752", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# STMicroelectronics STLINK-V3
+ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374d", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374e", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374f", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3753", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Cypress SuperSpeed Explorer Kit
+ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="0007", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Cypress KitProg in KitProg mode
+ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="f139", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Cypress KitProg in CMSIS-DAP mode
+ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="f138", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Hilscher NXHX Boards
+ATTRS{idVendor}=="0640", ATTRS{idProduct}=="0028", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Hitex STR9-comStick
+ATTRS{idVendor}=="0640", ATTRS{idProduct}=="002c", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Hitex STM32-PerformanceStick
+ATTRS{idVendor}=="0640", ATTRS{idProduct}=="002d", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Altera USB Blaster
+ATTRS{idVendor}=="09fb", ATTRS{idProduct}=="6001", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Amontec JTAGkey-HiSpeed
+ATTRS{idVendor}=="0fbb", ATTRS{idProduct}=="1000", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# SEGGER J-Link
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0101", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0102", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0103", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0104", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0105", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0107", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0108", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1010", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1011", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1012", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1013", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1014", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1015", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1016", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1017", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1018", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1050", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1051", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1061", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Raisonance RLink
+ATTRS{idVendor}=="138e", ATTRS{idProduct}=="9000", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Debug Board for Neo1973
+ATTRS{idVendor}=="1457", ATTRS{idProduct}=="5118", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Olimex ARM-USB-OCD
+ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="0003", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Olimex ARM-USB-OCD-TINY
+ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="0004", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Olimex ARM-JTAG-EW
+ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="001e", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Olimex ARM-USB-OCD-TINY-H
+ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="002a", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Olimex ARM-USB-OCD-H
+ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="002b", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# USBprog with OpenOCD firmware
+ATTRS{idVendor}=="1781", ATTRS{idProduct}=="0c63", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# TI/Luminary Stellaris In-Circuit Debug Interface (ICDI) Board
+ATTRS{idVendor}=="1cbe", ATTRS{idProduct}=="00fd", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# TI XDS110 Debug Probe (Launchpads and Standalone)
+ATTRS{idVendor}=="0451", ATTRS{idProduct}=="bef3", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0451", ATTRS{idProduct}=="bef4", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="1cbe", ATTRS{idProduct}=="02a5", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# TI Tiva-based ICDI and XDS110 probes in DFU mode
+ATTRS{idVendor}=="1cbe", ATTRS{idProduct}=="00ff", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Ambiq Micro EVK and Debug boards.
+ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="6010", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="6011", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="1106", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Marvell Sheevaplug
+ATTRS{idVendor}=="9e88", ATTRS{idProduct}=="9e8f", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Keil Software, Inc. ULink
+ATTRS{idVendor}=="c251", ATTRS{idProduct}=="2710", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="c251", ATTRS{idProduct}=="2750", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# CMSIS-DAP compatible adapters
+ATTRS{product}=="*CMSIS-DAP*", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+LABEL="openocd_rules_end"
diff --git a/tools/openocd/tcl/jimhttp/arguments.tcl b/tools/openocd/tcl/jimhttp/arguments.tcl
new file mode 100644
index 0000000..522f464
--- /dev/null
+++ b/tools/openocd/tcl/jimhttp/arguments.tcl
@@ -0,0 +1,51 @@
+# Process command line arguments.
+# Copyright (C) 2014, 2015, 2016 dbohdan.
+# License: MIT
+namespace eval ::arguments {
+    variable version 1.0.0
+}
+
+# Return a dict mapping varNames to command line argument values.
+# mandatoryArguments: a list {-arg varName ...}
+# optionalArguments: a dict {-optArg varName defaultValue ...}
+proc ::arguments::parse {mandatoryArguments optionalArguments argv} {
+    set result {}
+    set error [catch {
+        foreach {argument key defaultValue} $optionalArguments {
+            if {[dict exists $argv $argument]} {
+                lappend result $key [dict get $argv $argument]
+            } else {
+                lappend result $key $defaultValue
+            }
+            dict unset argv $argument
+        }
+        foreach {argument key} $mandatoryArguments {
+            if {[dict exists $argv $argument]} {
+                lappend result $key [dict get $argv $argument]
+            } else {
+                error "missing argument: $argument"
+            }
+            dict unset argv $argument
+        }
+    } errorMessage]
+    if {$error} {
+        error "cannot parse arguments ($errorMessage)"
+    }
+    if {$argv ne ""} {
+        error "unknown argument(s): $argv"
+    }
+    return [dict create {*}$result]
+}
+
+# Return a usage message.
+proc ::arguments::usage {mandatoryArguments optionalArguments argv0} {
+    set result {}
+    append result "usage: $argv0"
+    foreach {argument key} $mandatoryArguments {
+        append result " $argument $key"
+    }
+    foreach {argument key defaultValue} $optionalArguments {
+        append result " \[$argument $key\]"
+    }
+    return $result
+}
diff --git a/tools/openocd/tcl/jimhttp/http.tcl b/tools/openocd/tcl/jimhttp/http.tcl
new file mode 100644
index 0000000..d821858
--- /dev/null
+++ b/tools/openocd/tcl/jimhttp/http.tcl
@@ -0,0 +1,561 @@
+# An HTTP server and web framework for Jim Tcl.
+# Copyright (C) 2014, 2015, 2016 dbohdan.
+# License: MIT
+namespace eval ::http {
+    source mime.tcl
+
+    variable version 0.15.1
+
+    variable verbosity 0
+    variable crashOnError 0
+    variable maxRequestLength [expr 16*1024*1024]
+    variable routes {}
+    # A lambda run by ::http::serve before any communication with the client
+    # happens over a newly established connection's channel. Use
+    # [upvar 1 channel channel] to access the channel from the lambda.
+    variable newConnectionLambda {{} {}}
+
+    variable statusCodePhrases [dict create {*}{
+        100 Continue
+        200 OK
+        201 {Created}
+        301 {Moved Permanently}
+        400 {Bad Request}
+        401 {Unauthorized}
+        403 {Forbidden}
+        404 {Not Found}
+        405 {Method Not Allowed}
+        413 {Request Entity Too Large}
+        500 {Internal Server Error}
+    }]
+
+    variable requestFormat [dict create {*}{
+        Accept:                 accept
+        Accept-Charset:         acceptCharset
+        Accept-Encoding:        acceptEncoding
+        Accept-Language:        acceptLanguage
+        Connection:             connection
+        Content-Disposition:    contentDisposition
+        Content-Length:         contentLength
+        Content-Type:           contentType
+        Cookie:                 cookie
+        Expect:                 expect
+        Host:                   host
+        Referer:                referer
+        User-Agent:             userAgent
+    }]
+
+    variable cookieFields [dict create {*}{
+        Domain                  domain
+        Path                    path
+        Expires                 expires
+        Max-Age                 maxAge
+        Secure                  secure
+        HttpOnly                httpOnly
+    }]
+    variable cookieFieldsInv [lreverse $::http::cookieFields]
+    variable cookieDateFormat {%a, %d-%b-%Y %H:%M:%S GMT}
+
+    variable requestFormatLowerCase {}
+    foreach {key value} $requestFormat {
+        dict set requestFormatLowerCase [string tolower $key] $value
+    }
+
+    variable methods [list {*}{
+        OPTIONS GET HEAD POST PUT DELETE TRACE CONNECT
+    }]
+
+    # A list of lambdas. Each lambda takes a response body, a list of response
+    # headers and a list of request headers and return a list consisting of an
+    # updated response body and a list of updated response headers. Can be used
+    # to implement, e.g., compression. Applied in order.
+    variable responseFilters {}
+
+    # Sample filters. To active a filter add it to responseFilters.
+    variable sampleFilters {}
+    # Perform GZip compression of the content using an external gzip binary.
+    dict set sampleFilters gzipExternal {{body responseHeaders request} {
+        if {[dict exists $request acceptEncoding] &&
+                [string match *gzip* $request(acceptEncoding)]} {
+            dict set responseHeaders contentEncoding gzip
+            set body [exec gzip << $body]
+        }
+        return [list $body $responseHeaders]
+    }}
+    # Perform GZip compression of the content using the zlib module.
+    dict set sampleFilters gzipInternal {{body responseHeaders request} {
+        if {[dict exists $request acceptEncoding] &&
+                [string match *gzip* $request(acceptEncoding)]} {
+            dict set responseHeaders contentEncoding gzip
+            set body [zlib gzip $body]
+        }
+        return [list $body $responseHeaders]
+    }}
+    # Perform Deflate compression of the content using the zlib module.
+    dict set sampleFilters deflateInternal {{body responseHeaders request} {
+        if {[dict exists $request acceptEncoding] &&
+                [string match *deflate* $request(acceptEncoding)]} {
+            dict set responseHeaders contentEncoding deflate
+            set body [zlib deflate $body]
+        }
+        return [list $body $responseHeaders]
+    }}
+}
+
+# Return the text of an HTTP response with the body $body.
+proc ::http::make-response {body {headers {}} {request {}}} {
+    set ::http::responseTemplate \
+        {HTTP/1.1 $headers(code) $::http::statusCodePhrases($headers(code))
+Content-Type: $headers(contentType)
+Content-Length: $length}
+
+    set ::http::headerDefaults [dict create {*}{
+        code 200
+        contentType text/html
+    }]
+
+    set headers [dict merge $::http::headerDefaults $headers]
+
+    # Handle response processing, e.g., compression.
+    foreach lambda $::http::responseFilters {
+        lassign [apply $lambda $body $headers $request] body headers
+    }
+
+    set length [string bytelength $body]
+
+    set response [subst $::http::responseTemplate]
+
+    # TODO: Generalize for other possible fields in the headers.
+    if {[dict exists $headers cookies]} {
+        foreach cookie $headers(cookies) {
+            append response "\nSet-Cookie: [::http::make-cookie $cookie]"
+        }
+    }
+    if {[dict exists $headers contentEncoding]} {
+        append response \
+                "\nContent-Encoding: [dict get $headers contentEncoding]"
+    }
+
+    append response "\n\n$body"
+    return $response
+}
+
+# Write $message to stdout if $level <= $::http::verbosity. Levels 0 and lower
+# are for errors that are always reported.
+proc ::http::log {level message} \
+        [list [list levelNumber [dict create {*}{
+            debug 3 info 2 warning 1 error 0 critical -1
+        }]]] {
+    set levelNumber
+
+    if {$levelNumber($level) <= $::http::verbosity} {
+        puts [format "%-9s %s" "[string toupper $level]:" $message]
+    }
+}
+
+# From http://wiki.tcl-lang.org/14144.
+proc ::http::uri-decode str {
+    # rewrite "+" back to space
+    # protect \ from quoting another '\'
+    set str [string map [list + { } "\\" "\\\\"] $str]
+
+    # prepare to process all %-escapes
+    regsub -all -- {%([A-Fa-f0-9][A-Fa-f0-9])} $str {\\u00\1} str
+
+    # process \u unicode mapped chars
+    return [subst -novar -nocommand $str]
+}
+
+# Decode a POST/GET form.
+# string -> dict
+proc ::http::form-decode {formData} {
+    set result {}
+    foreach x [split $formData &] {
+        lassign [lmap y [split $x =] { uri-decode $y }] key value
+        dict set result $key $value
+    }
+    return $result
+}
+
+# Return the content up to but not including $separator in variable
+# $stringVarName. Remove this content and the separator following it from the
+# $stringVarName. If $separator isn't in $stringVarName's value return the whole
+# string.
+proc ::http::string-pop {stringVarName separator} {
+    upvar 1 $stringVarName str
+    set substrLength [string first $separator $str]
+    if {$substrLength > -1} {
+        set substr [string range $str 1 $substrLength-1]
+        set str [string range $str $substrLength+[string length $separator] end]
+    } else {
+        set substr $str
+        set str {}
+    }
+    return $substr
+}
+
+# Parse a cookie dict in the format of
+# {{name somecookie value "some value" expires 1727946435 domain foo path /
+# secure 0 httpOnly 1} ...} into an HTTP header Set-Cookie value.
+proc ::http::make-cookie cookieDict {
+    set result {}
+    append result "$cookieDict(name)=$cookieDict(value)"
+    dict unset cookieDict name
+    dict unset cookieDict value
+    foreach {field value} $cookieDict {
+        if {($field eq "secure") || ($field eq "httpOnly")} {
+            if {$value} {
+                append result "; $::http::cookieFieldsInv($field)"
+            }
+        } else {
+            append result "; $::http::cookieFieldsInv($field)"
+            if {$field eq "expires"} {
+                # TODO: adjust for the local timezone. clock format does not yet
+                # support the -gmt switch in Jim Tcl.
+                append result "=[clock format $value \
+                        -format $::http::cookieDateFormat]"
+            } else {
+                append result "=$value"
+            }
+        }
+    }
+    return $result
+}
+
+# Parse HTTP request headers presented as a list of lines into a dict.
+proc ::http::parse-headers {headerLines} {
+    set headers {}
+    set field {}
+    set value {}
+
+    foreach line $headerLines {
+        # Split $line on its first space.
+        regexp {^(.*?) (.*)$} $line _ field value
+        ::http::log debug [list $line]
+
+        if {[lsearch -exact $::http::methods $field] > -1} {
+            dict set headers method $field
+            lassign [split [lindex [split $value] 0] ?] headers(url) formData
+            dict set headers form [form-decode $formData]
+        } else {
+            # Translate "Content-Type:" to "contentType", etc.
+            set field [string tolower $field]
+            if {$field eq "cookie:"} {
+                if {![dict exists $headers cookies]} {
+                    dict set headers cookies {}
+                }
+                dict set headers cookies [dict merge $headers(cookies) \
+                        [::http::parse-value $value]]
+            } elseif {[dict exists $::http::requestFormatLowerCase $field]} {
+                dict set headers $::http::requestFormatLowerCase($field) $value
+            }
+        }
+    }
+    return $headers
+}
+
+# Convert an HTTP request value of type {string;key1=value1; key2="value2"} to
+# dict.
+proc ::http::parse-value {str} {
+    set result {}
+    foreach x [split $str ";"] {
+        set x [string trimleft $x " "] ;# For "; ".
+        if {[regexp {(.*?)="?([^"]*)"?} $x _ name value]} {
+            dict set result $name $value
+        } else {
+            dict set result $x 1
+        }
+    }
+    return $result
+}
+
+# Return the files and formPost fields in encoded in a multipart/form-data form.
+# Very hacky.
+proc ::http::parse-multipart-data {postString contentType newline} {
+    set result {}
+    if {[catch {set boundary [dict get \
+            [::http::parse-value $contentType] boundary]}]} {
+        error {no boundary specified in Content-Type}
+    }
+    set boundaryLength [string length $boundary]
+    while {[set part [string-pop postString $boundary]] ne {}} {
+        set partHeader [::http::parse-headers \
+                [split [string-pop part "$newline$newline"] $newline]]
+        # Trim "(\r)\n--" in content.
+        set part [string range $part 0 end-[string length "$newline--"]]
+        if {$part ne {}} {
+            set m [::http::parse-value $partHeader(contentDisposition)]
+            if {[dict exists $m form-data] &&
+                        [dict exists $m name]} {
+                # Store files and form fields separately.
+                if {[dict exists $m filename]} {
+                    dict set result files \
+                            $m(name) filename $m(filename)
+                    dict set result files \
+                            $m(name) content $part
+                } else {
+                    dict set result formPost $m(name) $part
+                }
+            }
+        }
+    }
+    return $result
+}
+
+# Return error responses.
+proc ::http::error-response {code {customMessage ""} {request {}}} {
+    return [::http::make-response \
+            "<h1>Error $code: $::http::statusCodePhrases($code)</h1>\
+                    $customMessage" \
+            [list code $code] \
+            $request]
+}
+
+# Call ::http::serve. Catch and report any unhandled errors.
+proc ::http::serve-and-trap-errors {channel clientAddr clientPort} {
+    set error [catch {
+        ::http::serve $channel $clientAddr $clientPort
+    } errorMessage errorOptions]
+    if {$error} {
+        ::http::log critical \
+                "Unhandled ::http::serve error: $errorMessage."
+        catch {close $channel}
+        if {$::http::crashOnError} {
+            ::http::log info "Exiting due to error."
+            exit 1
+        }
+    }
+}
+
+# Handle HTTP requests over a channel and send responses. A hacky HTTP
+# implementation.
+proc ::http::serve {channel clientAddr clientPort} {
+    # "Preprocess" the channel before anything else is done with it, e.g., to
+    # initiate a TLS connection.
+    apply $::http::newConnectionLambda
+
+    ::http::log info "Client connected: $clientAddr"
+
+    set newline \r\n
+
+    set headerLines {}
+    set firstLine 1
+    while {[gets $channel buf]} {
+        if {$firstLine} {
+            # Change the newline variable when the incoming request has
+            # nonstandard \n newlines. This happens, e.g., when you use netcat.
+            if {[string index $buf end] ne "\r"} {
+                set newline "\n"
+                ::http::log debug \
+                        {The client uses \n instead of \r\n for newline.}
+            }
+            set firstLine 0
+        }
+        if {$newline eq "\r\n"} {
+            set buf [string trimright $buf \r]
+        }
+        if {$buf eq {}} {
+            break
+        }
+        lappend headerLines $buf
+    }
+
+    set request [::http::parse-headers $headerLines]
+    set error 0
+
+    if {(![dict exists $request method]) || (![dict exists $request url])} {
+        ::http::log error "Bad request."
+        set error 400
+    }
+
+    # Process POST data.
+    if {($error == 0) && ($request(method) eq "POST")} {
+        set request [dict merge {contentType application/x-www-form-urlencoded
+                contentLength 0} $request]
+
+        if {[string is integer $request(contentLength)] &&
+                ($request(contentLength) > 0)} {
+            if {$request(contentLength) <= $::http::maxRequestLength} {
+                if {[dict exists $request expect] &&
+                            ($request(expect) eq "100-continue")} {
+                    puts $channel "HTTP/1.1 100 Continue\n"
+                }
+
+                set postString [read $channel $request(contentLength)]
+                if {$request(contentType) eq
+                        "application/x-www-form-urlencoded"} {
+                    ::http::log debug "POST request: {$postString}\n"
+                    dict set request formPost [form-decode $postString]
+                } elseif {[string match "multipart/form-data*" \
+                        $request(contentType)]} {
+                    ::http::log debug \
+                            "POST request: (multipart/form-data skipped)"
+                    # Call ::http::parse-multipart-data to parse the data.
+                    set multipartDataError [catch {
+                        set request [dict merge $request \
+                                [::http::parse-multipart-data \
+                                        $postString \
+                                        $request(contentType) \
+                                        $newline]]
+                    } errorMessage]
+                    if {$multipartDataError} {
+                        ::http::log error \
+                                "Bad request: multipart/form-data parse error:\
+                                        $errorMessage."
+                        set error 400
+                    }
+                } else {
+                    # Put content of other types (e.g., application/json) into
+                    # request(formPost) as is.
+                    ::http::log debug \
+                            "POST request: ($request(contentType) skipped)"
+                    dict set request formPost $postString
+                }
+            } else {
+                ::http::log error \
+                        "Request too large: $request(contentLength)."
+                set error 413
+            }
+        } else {
+            ::http::log error "Bad request: Content-Length is invalid\
+                    (\"$request(contentLength)\")."
+            set error 400
+        }
+    } else {
+        dict set request formPost {}
+    }
+
+    if {[dict exists $request cookies]} {
+        ::http::log debug "cookies: $request(cookies)"
+    }
+
+
+    if {!$error} {
+        ::http::log info "Responding."
+        set matchResult [::http::route $channel $request]
+        lassign $matchResult route
+        if {$matchResult eq {0} ||
+                [dict get $::http::routes $route $request(method) close]} {
+            close $channel
+        }
+    } else {
+        puts -nonewline $channel [::http::error-response $error]
+        close $channel
+    }
+}
+
+# Start the HTTP server binding it to $ipAddress and $port.
+proc ::http::start-server {ipAddress port} {
+    set ::http::serverSocket [socket stream.server $ipAddress:$port]
+    $::http::serverSocket readable {
+        set client [$::http::serverSocket accept addr]
+        ::http::serve-and-trap-errors $client {*}[split $addr :]
+    }
+    ::http::log info "Started server on $ipAddress:$port."
+    vwait ::http::done
+    ::http::log info "The server has shut down."
+}
+
+# Call route handler for the request url if available and pass $channel to it.
+# Otherwise write a 404 error message to the channel.
+proc ::http::route {channel request} {
+    # Don't show the contents of large files in the debug message.
+    if {[dict exists $request files] &&
+                [string length $request(files)] > 8*1024} {
+        set requestPrime $request
+        dict set requestPrime files "(not shown here)"
+        ::http::log debug "request: $requestPrime"
+        set requestPrime {}
+    } else {
+        ::http::log debug "request: $request"
+    }
+
+    set url [dict get $request url]
+    if {$url eq {}} {
+        set url /
+    }
+
+    set matchResult [::http::match-route \
+            [dict keys $::http::routes] $url]
+    if {$matchResult != 0} {
+        set procName [dict get $::http::routes \
+                [lindex $matchResult 0] $request(method) handler]
+        $procName $channel $request [lindex $matchResult 1]
+    } else {
+        puts -nonewline $channel [::http::error-response 404]
+    }
+
+    return $matchResult
+}
+
+# Return route variables contained in the url if it can be parsed as route
+# $route. Return 0 otherwise.
+proc ::http::get-route-variables {route url} {
+    set routeVars {}
+    foreach routeSegment [split $route /] urlSegment [split $url /] {
+        if {[string index $routeSegment 0] eq ":"} {
+            dict set routeVars [string range $routeSegment 1 end] $urlSegment
+        } else {
+            # Static parts of the URL and the route should be equal.
+            if {$urlSegment ne $routeSegment} {
+                return 0
+            }
+        }
+    }
+    return $routeVars
+}
+
+# Return the first route out of the list $routeList that matches $url.
+proc ::http::match-route {routeList url} {
+    foreach route $routeList {
+        set routeVars [::http::get-route-variables $route $url]
+        if {$routeVars != 0} {
+            return [list $route $routeVars]
+        }
+    }
+    return 0
+}
+
+# Create a proc to handle the route $route with body $script.
+proc ::http::add-handler {methods routes {statics {}} script} {
+    set procName "handler::${methods}::${routes}"
+    proc $procName {channel request routeVars} $statics $script
+    foreach method $methods {
+        foreach route $routes {
+            dict set ::http::routes $route $method handler $procName
+            dict set ::http::routes $route $method close 1
+        }
+    }
+}
+
+# Return the contents of $filename.
+proc ::http::read-file {filename} {
+    set fpvar [open $filename r]
+    fconfigure $fpvar -translation binary
+    set content [read $fpvar]
+    close $fpvar
+    return $content
+}
+
+# Add handler to return the contents of a static file. The file is either
+# $filename or [file tail $route] if no filename is given.
+proc ::http::add-static-file {route {filename {}}} {
+    if {$filename eq {}} {
+        set filename [file tail $route]
+    }
+    ::http::add-handler GET $route [list apply {{filename mimeType} {
+        upvar 1 channel channel
+        upvar 1 request request
+        puts -nonewline $channel \
+                [::http::make-response \
+                        [::http::read-file $filename] \
+                        [list contentType $mimeType] \
+                        $request]
+    }} $filename [::mime::type $filename]]
+}
+
+# A convenience procedure to use from route handlers.
+proc ::http::respond {response} {
+    upvar 1 channel channel
+    puts -nonewline $channel $response
+}
diff --git a/tools/openocd/tcl/jimhttp/mime.tcl b/tools/openocd/tcl/jimhttp/mime.tcl
new file mode 100644
index 0000000..e79397b
--- /dev/null
+++ b/tools/openocd/tcl/jimhttp/mime.tcl
@@ -0,0 +1,77 @@
+# MIME type detection by filename extension.
+# Copyright (C) 2014, 2015, 2016 dbohdan.
+# License: MIT
+
+namespace eval ::mime {
+    variable version 1.2.0
+
+    variable mimeDataInverted {
+        text/plain {
+            makefile
+            COPYING
+            LICENSE
+            README
+            Makefile
+            .c
+            .conf
+            .h
+            .log
+            .md
+            .sh
+            .tcl
+            .terms
+            .tm
+            .txt
+            .wiki
+            .LICENSE
+            .README
+        }
+        text/css                .css
+        text/csv                .csv
+        image/gif               .gif
+        application/gzip        .gz
+        text/html {
+            .htm
+            .html
+        }
+        image/jpeg {
+            .jpg
+            .jpeg
+        }
+        application/javascript  .js
+        application/json        .json
+        application/pdf         .pdf
+        image/png               .png
+        application/postscript  .ps
+        application/xhtml       .xhtml
+        application/xml         .xml
+        application/zip         .zip
+    }
+
+    variable byFilename {}
+    variable byExtension {}
+    foreach {mimeType files} $mimeDataInverted {
+        foreach file $files {
+            if {[string index $file 0] eq "."} {
+                lappend byExtension $file $mimeType
+            } else {
+                lappend byFilename $file $mimeType
+            }
+        }
+    }
+    unset mimeDataInverted
+}
+
+proc ::mime::type {filename} {
+    variable byFilename
+    variable byExtension
+    set tail [file tail $filename]
+    set ext [file extension $filename]
+    if {[dict exists $byFilename $tail]} {
+        return [dict get $byFilename $tail]
+    } elseif {[dict exists $byExtension $ext]} {
+        return [dict get $byExtension $ext]
+    } else {
+        return application/octet-stream
+    }
+}
diff --git a/tools/openocd/tcl/mem_helper.tcl b/tools/openocd/tcl/mem_helper.tcl
new file mode 100644
index 0000000..5955793
--- /dev/null
+++ b/tools/openocd/tcl/mem_helper.tcl
@@ -0,0 +1,42 @@
+# Helper for common memory read/modify/write procedures
+
+# mrw: "memory read word", returns value of $reg
+proc mrw {reg} {
+	set value ""
+	mem2array value 32 $reg 1
+	return $value(0)
+}
+
+add_usage_text mrw "address"
+add_help_text mrw "Returns value of word in memory."
+
+# mrh: "memory read halfword", returns value of $reg
+proc mrh {reg} {
+	set value ""
+	mem2array value 16 $reg 1
+	return $value(0)
+}
+
+add_usage_text mrh "address"
+add_help_text mrh "Returns value of halfword in memory."
+
+# mrb: "memory read byte", returns value of $reg
+proc mrb {reg} {
+	set value ""
+	mem2array value 8 $reg 1
+	return $value(0)
+}
+
+add_usage_text mrb "address"
+add_help_text mrb "Returns value of byte in memory."
+
+# mmw: "memory modify word", updates value of $reg
+#       $reg <== ((value & ~$clearbits) | $setbits)
+proc mmw {reg setbits clearbits} {
+	set old [mrw $reg]
+	set new [expr ($old & ~$clearbits) | $setbits]
+	mww $reg $new
+}
+
+add_usage_text mmw "address setbits clearbits"
+add_help_text mmw "Modify word in memory. new_val = (old_val & ~clearbits) | setbits;"
diff --git a/tools/openocd/tcl/target/swj-dp.tcl b/tools/openocd/tcl/target/swj-dp.tcl
new file mode 100644
index 0000000..3fb0263
--- /dev/null
+++ b/tools/openocd/tcl/target/swj-dp.tcl
@@ -0,0 +1,35 @@
+# ARM Debug Interface V5 (ADI_V5) utility
+# ... Mostly for SWJ-DP (not SW-DP or JTAG-DP, since
+# SW-DP and JTAG-DP targets don't need to switch based
+# on which transport is active.
+#
+# declare a JTAG or SWD Debug Access Point (DAP)
+# based on the transport in use with this session.
+# You can't access JTAG ops when SWD is active, etc.
+
+# params are currently what "jtag newtap" uses
+# because OpenOCD internals are still strongly biased
+# to JTAG ....  but for SWD, "irlen" etc are ignored,
+# and the internals work differently
+
+# for now, ignore non-JTAG and non-SWD transports
+# (e.g. initial flash programming via SPI or UART)
+
+# split out "chip" and "tag" so we can someday handle
+# them more uniformly irlen too...)
+
+if [catch {transport select}] {
+  echo "Error: unable to select a session transport. Can't continue."
+  shutdown
+}
+
+proc swj_newdap {chip tag args} {
+ if [using_jtag] {
+     eval jtag newtap $chip $tag $args
+ } elseif [using_swd] {
+     eval swd newdap $chip $tag $args
+ } else {
+     echo "Error: transport '[ transport select ]' not supported by swj_newdap"
+     shutdown
+ }
+}
diff --git a/vendor/827x_ble_remote/app_att.c b/vendor/827x_ble_remote/app_att.c
new file mode 100644
index 0000000..4a5bdaf
--- /dev/null
+++ b/vendor/827x_ble_remote/app_att.c
@@ -0,0 +1,998 @@
+/******************************************************************************
+ * @file     app_att.c
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *  Copyright (C) Atmosic 2022
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+
+#ifdef CFG_ATM_SDK
+#include "refdesignrcu.h"
+#include "bridge_att.h"
+#include "bridge_audio.h"
+#include "ble_att.h"
+#include "app_att.h"
+#include "app_config.h"
+#include "app_ir.h"
+#include "stack/ble/ble_common.h"
+#include "stack/ble/ble_format.h"
+#include "stack/ble/host/attr/att.h"
+#include "stack/ble/service/uuid.h"
+#ifdef CFG_ATVRC_FIND_ME
+#include "./app_find_me/app_fms.h"
+#endif
+#else
+#include "tl_common.h"
+#include "application/audio/audio_config.h"
+#include "stack/ble/ble.h"
+#include "app_audio.h"
+#include "app_ui.h"
+#include "app_ota.h"
+#include "app_ir.h"
+#include "app_custom.h"
+#include "app_test.h"
+#include "./app_find_me/app_fms.h"
+#include "../../version.h"
+#endif
+
+typedef struct
+{
+  /** Minimum value for the connection event (interval. 0x0006 - 0x0C80 * 1.25 ms) */
+  u16 intervalMin;
+  /** Maximum value for the connection event (interval. 0x0006 - 0x0C80 * 1.25 ms) */
+  u16 intervalMax;
+  /** Number of LL latency connection events (0x0000 - 0x03e8) */
+  u16 latency;
+  /** Connection Timeout (0x000A - 0x0C80 * 10 ms) */
+  u16 timeout;
+} gap_periConnectParams_t;
+
+static const u16 clientCharacterCfgUUID = GATT_UUID_CLIENT_CHAR_CFG;
+
+static const u16 extReportRefUUID = GATT_UUID_EXT_REPORT_REF;
+
+static const u16 reportRefUUID = GATT_UUID_REPORT_REF;
+
+static const u16 characterPresentFormatUUID = GATT_UUID_CHAR_PRESENT_FORMAT;
+
+static const u16 userdesc_UUID    = GATT_UUID_CHAR_USER_DESC;
+
+static const u16 serviceChangeUUID = GATT_UUID_SERVICE_CHANGE;
+
+static const u16 my_primaryServiceUUID = GATT_UUID_PRIMARY_SERVICE;
+
+static const u16 my_characterUUID = GATT_UUID_CHARACTER;
+
+#ifndef CFG_ATM_SDK
+static const u16 my_devServiceUUID = SERVICE_UUID_DEVICE_INFORMATION;
+
+static const u16 my_PnPUUID = CHARACTERISTIC_UUID_PNP_ID;
+
+static const u16 my_SysIDUUID = CHARACTERISTIC_UUID_SYSTEM_ID;
+
+static const u16 my_ModelNUMUUID = CHARACTERISTIC_UUID_MODEL_NUM_STRING;
+
+static const u16 my_SerialNUMUUID = CHARACTERISTIC_UUID_SERIAL_NUM_STRING;
+
+static const u16 my_FWRevUUID = CHARACTERISTIC_UUID_FW_REVISION_STRING;
+
+static const u16 my_HWRevUUID = CHARACTERISTIC_UUID_HW_REVISION_STRING;
+
+static const u16 my_SWRevUUID = CHARACTERISTIC_UUID_SW_REVISION_STRING;
+
+static const u16 my_ManuNameUUID = CHARACTERISTIC_UUID_MANU_NAME_STRING;
+
+static const u16 my_IEEE11073UUID = CHARACTERISTIC_UUID_IEEE_11073_CERT_LIST;
+
+
+static const u16 my_devNameUUID = GATT_UUID_DEVICE_NAME;
+
+static const u16 my_gapServiceUUID = SERVICE_UUID_GENERIC_ACCESS;
+
+static const u16 my_appearanceUIID = GATT_UUID_APPEARANCE;
+
+static const u16 my_periConnParamUUID = GATT_UUID_PERI_CONN_PARAM;
+
+static const u16 my_appearance = GAP_APPEARE_UNKNOWN;
+
+static const u16 my_gattServiceUUID = SERVICE_UUID_GENERIC_ATTRIBUTE;
+
+static u16 serviceChangeVal[2] = {0};
+
+static u8 serviceChangeCCC[2] = {0,0};
+
+static const gap_periConnectParams_t my_periConnParameters = {8, 11, 0, 1000};
+
+
+ _attribute_data_retention_ u8 my_FWRevtrs []     = {'V','1','.','1','1'};
+// _attribute_data_retention_ u8 my_SWRevtrs []     = {'V','1','.','0','2'};
+ static const u8  my_SWRevtrs []     = {'V', 0x30+((FW_VERSION>>8)&0x0f), '.', 0x30+((FW_VERSION>>4)&0x0f), 0x30+(FW_VERSION&0x0f)};
+
+ static const u8 my_HWRevtrs []     = {'V','1','.','0'};
+ static const u8 my_ManuNametrs []  = {'T','e','l','i','n','k'};
+
+//////////////////////// Battery /////////////////////////////////////////////////
+static const u16 my_batServiceUUID        = SERVICE_UUID_BATTERY;
+static const u16 my_batCharUUID             = CHARACTERISTIC_UUID_BATTERY_LEVEL;
+static u8 batteryValueInCCC[2];
+_attribute_data_retention_ u8 my_batVal[1]     = {99};
+
+//////////////////////// HID /////////////////////////////////////////////////////
+
+static const u16 my_hidServiceUUID        = SERVICE_UUID_HUMAN_INTERFACE_DEVICE;
+
+static const u16 hidServiceUUID           = SERVICE_UUID_HUMAN_INTERFACE_DEVICE;
+static const u16 hidProtocolModeUUID      = CHARACTERISTIC_UUID_HID_PROTOCOL_MODE;
+static const u16 hidReportUUID            = CHARACTERISTIC_UUID_HID_REPORT;
+static const u16 hidReportMapUUID         = CHARACTERISTIC_UUID_HID_REPORT_MAP;
+static const u16 hidbootKeyInReportUUID   = CHARACTERISTIC_UUID_HID_BOOT_KEY_INPUT;
+static const u16 hidbootKeyOutReportUUID  = CHARACTERISTIC_UUID_HID_BOOT_KEY_OUTPUT;
+static const u16 hidbootMouseInReportUUID = CHARACTERISTIC_UUID_HID_BOOT_MOUSE_INPUT;
+static const u16 hidinformationUUID       = CHARACTERISTIC_UUID_HID_INFORMATION;
+static const u16 hidCtrlPointUUID         = CHARACTERISTIC_UUID_HID_CONTROL_POINT;
+static const u16 hidIncludeUUID           = GATT_UUID_INCLUDE;
+
+static const u8 protocolMode               = DFLT_HID_PROTOCOL_MODE;
+
+// Key in Report characteristic variables
+static u8 reportKeyIn[8];
+static u8 reportKeyInCCC[2];
+// HID Report Reference characteristic descriptor, key input
+static const u8 reportRefKeyIn[2] =
+             { HID_REPORT_ID_KEYBOARD_INPUT, HID_REPORT_TYPE_INPUT };
+
+// Key out Report characteristic variables
+static u8 reportKeyOut[1];
+static const u8 reportRefKeyOut[2] =
+             { HID_REPORT_ID_KEYBOARD_INPUT, HID_REPORT_TYPE_OUTPUT };
+
+// Consumer Control input Report
+static u8 reportConsumerControlIn[2];
+static u8 reportConsumerControlInCCC[2];
+static const u8 reportRefConsumerControlIn[2] =
+             { HID_REPORT_ID_CONSUME_CONTROL_INPUT, HID_REPORT_TYPE_INPUT };
+
+// Boot Keyboard Input Report
+static u8 bootKeyInReport;
+static u8 bootKeyInReportCCC[2];
+
+// Boot Keyboard Output Report
+static u8 bootKeyOutReport;
+
+// HID Information characteristic
+static const u8 hidInformation[] =
+{
+  U16_LO(0x0111), U16_HI(0x0111),             // bcdHID (USB HID version)
+  0x00,                                       // bCountryCode
+  0x01                                        // Flags
+};
+
+// HID Control Point characteristic
+static u8 controlPoint;
+
+// HID Report Map characteristic
+// Keyboard report descriptor (using format for Boot interface descriptor)
+
+static const u8 reportMap[] =
+{
+    //keyboard report in
+    0x05, 0x01,     // Usage Pg (Generic Desktop)
+    0x09, 0x06,     // Usage (Keyboard)
+    0xA1, 0x01,     // Collection: (Application)
+    0x85, HID_REPORT_ID_KEYBOARD_INPUT,     // Report Id (keyboard)
+                  //
+    0x05, 0x07,     // Usage Pg (Key Codes)
+    0x19, 0xE0,     // Usage Min (224)  VK_CTRL:0xe0
+    0x29, 0xE7,     // Usage Max (231)  VK_RWIN:0xe7
+    0x15, 0x00,     // Log Min (0)
+    0x25, 0x01,     // Log Max (1)
+                  //
+                  // Modifier byte
+    0x75, 0x01,     // Report Size (1)   1 bit * 8
+    0x95, 0x08,     // Report Count (8)
+    0x81, 0x02,     // Input: (Data, Variable, Absolute)
+                  //
+                  // Reserved byte
+    0x95, 0x01,     // Report Count (1)
+    0x75, 0x08,     // Report Size (8)
+    0x81, 0x01,     // Input: (static constant)
+
+    //keyboard output
+    //5 bit led ctrl: NumLock CapsLock ScrollLock Compose kana
+    0x95, 0x05,    //Report Count (5)
+    0x75, 0x01,    //Report Size (1)
+    0x05, 0x08,    //Usage Pg (LEDs )
+    0x19, 0x01,    //Usage Min
+    0x29, 0x05,    //Usage Max
+    0x91, 0x02,    //Output (Data, Variable, Absolute)
+    //3 bit reserved
+    0x95, 0x01,    //Report Count (1)
+    0x75, 0x03,    //Report Size (3)
+    0x91, 0x01,    //Output (static constant)
+
+    // Key arrays (6 bytes)
+    0x95, 0x06,     // Report Count (6)
+    0x75, 0x08,     // Report Size (8)
+    0x15, 0x1e,     // Log Min (0)
+    0x25, 0xF1,     // Log Max (241)
+    0x05, 0x07,     // Usage Pg (Key Codes)
+    0x19, 0x1e,     // Usage Min (0)
+    0x29, 0xf1,     // Usage Max (241)
+    0x81, 0x00,     // Input: (Data, Array)
+
+    0xC0,            // End Collection
+
+#if (TL_AUDIO_MODE & TL_AUDIO_MASK_HID_SERVICE_CHANNEL)                            //HID Service
+    //consumer report in
+    0x05, 0x0C,   // Usage Page (Consumer)
+    0x09, 0x01,   // Usage (Consumer Control)
+    0xA1, 0x01,   // Collection (Application)
+    0x85, HID_REPORT_ID_CONSUME_CONTROL_INPUT,   //     Report Id
+    0x75,0x10,     //global, report size 16 bits
+    0x95,0x0A,     //global, report count 1
+    0x15,0x01,     //global, min  0x01
+    0x26,0x8c,0x02,  //global, max  0x28c
+    0x19,0x01,     //local, min   0x01
+    0x2a,0x8c,0x02,  //local, max    0x28c
+    0x81,0x00,     //main,  input data variable, absolute
+    0xc0,        //main, end collection
+
+    //audio 3
+    0x05, 0x0c,
+    0x09, 0x01,
+    0xA1, 0x01,
+    0x85, HID_REPORT_ID_AUDIO_THIRD_INPUT,
+    0x95, 0x14,
+    0x75, 0x08,
+    0x15, 0x00,
+    0x26, 0xff, 0x00,
+    0x81, 0x00,
+    0xC0,
+    //audio 1
+    0x05, 0x0c,
+    0x09, 0x01,
+    0xA1, 0x01,
+    0x85, HID_REPORT_ID_AUDIO_FIRST_INPUT,
+    0x95, 0x14,
+    0x75, 0x08,
+    0x15, 0x00,
+    0x26, 0xff, 0x00,
+    0x81, 0x00,
+    0xC0,
+    //audio 2
+    0x05, 0x0c,
+    0x09, 0x01,
+    0xA1, 0x01,
+    0x85, HID_REPORT_ID_AUDIO_SECND_INPUT,
+    0x95, 0x14,
+    0x75, 0x08,
+    0x15, 0x00,
+    0x26, 0xff, 0x00,
+    0x81, 0x00,
+    0xC0,
+#else
+    //consumer report in
+    0x05, 0x0C,   // Usage Page (Consumer)
+    0x09, 0x01,   // Usage (Consumer Control)
+    0xA1, 0x01,   // Collection (Application)
+    0x85, HID_REPORT_ID_CONSUME_CONTROL_INPUT,   //     Report Id
+    0x75,0x10,     //global, report size 16 bits
+    0x95,0x02,     //global, report count 2
+    0x15,0x01,     //global, min  0x01
+    0x26,0x8c,0x02,  //global, max  0x28c
+    0x19,0x01,     //local, min   0x01
+    0x2a,0x8c,0x02,  //local, max    0x28c
+    0x81,0x00,     //main,  input data variable, absolute
+    0xc0,        //main, end collection
+#endif
+
+
+};
+
+// HID External Report Reference Descriptor for report map
+static u16 extServiceUUID;
+
+
+/////////////////////////////////////////////////////////
+
+static const u8 my_OtaUUID[16]           = {TELINK_SPP_DATA_OTA};
+static const u8 my_OtaServiceUUID[16]    = TELINK_OTA_UUID_SERVICE;
+
+static u8 my_OtaData         = 0x00;
+_attribute_data_retention_ u16 my_Otaccc = 0;
+
+static const u8  my_OtaName[] = {'O', 'T', 'A'};
+
+#if (MP_TEST_MODE)
+static const u8 my_TestModeServiceUUID[16] = {TEST_MODE_SERVICE_UUID};
+static const u8 my_TestDataUUID[16] = {TEST_MODE_TEST_DATA_UUID};
+
+static u8 my_TestData = 0x00;
+static u8 my_TestDataCCC[2] = { 0x00, };
+#endif
+
+
+// Include attribute (Battery service)
+static const u16 include[3] = {BATT_PS_H, BATT_LEVEL_INPUT_CCB_H, SERVICE_UUID_BATTERY};
+
+
+//// GAP attribute values
+static const u8 my_devNameCharVal[5] = {
+    CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+    U16_LO(GenericAccess_DeviceName_DP_H), U16_HI(GenericAccess_DeviceName_DP_H),
+    U16_LO(GATT_UUID_DEVICE_NAME), U16_HI(GATT_UUID_DEVICE_NAME)
+};
+static const u8 my_appearanceCharVal[5] = {
+    CHAR_PROP_READ,
+    U16_LO(GenericAccess_Appearance_DP_H), U16_HI(GenericAccess_Appearance_DP_H),
+    U16_LO(GATT_UUID_APPEARANCE), U16_HI(GATT_UUID_APPEARANCE)
+};
+static const u8 my_periConnParamCharVal[5] = {
+    CHAR_PROP_READ,
+    U16_LO(CONN_PARAM_DP_H), U16_HI(CONN_PARAM_DP_H),
+    U16_LO(GATT_UUID_PERI_CONN_PARAM), U16_HI(GATT_UUID_PERI_CONN_PARAM)
+};
+
+
+//// GATT attribute values
+static const u8 my_serviceChangeCharVal[5] = {
+    CHAR_PROP_INDICATE,
+    U16_LO(GenericAttribute_ServiceChanged_DP_H), U16_HI(GenericAttribute_ServiceChanged_DP_H),
+    U16_LO(GATT_UUID_SERVICE_CHANGE), U16_HI(GATT_UUID_SERVICE_CHANGE)
+};
+
+//// device Information  attribute values
+static const u8 my_PnCharVal[5] = {
+    CHAR_PROP_READ,
+    U16_LO(DeviceInformation_pnpID_DP_H), U16_HI(DeviceInformation_pnpID_DP_H),
+    U16_LO(CHARACTERISTIC_UUID_PNP_ID), U16_HI(CHARACTERISTIC_UUID_PNP_ID)
+};
+
+static const u8 my_FWRevCharVal[5] = {
+    CHAR_PROP_READ,
+    U16_LO(DeviceInformation_firmwareRev_DP_H), U16_HI(DeviceInformation_firmwareRev_DP_H),
+    U16_LO(CHARACTERISTIC_UUID_FW_REVISION_STRING), U16_HI(CHARACTERISTIC_UUID_FW_REVISION_STRING)
+};
+
+
+static const u8 my_HWRevCharVal[5] = {
+    CHAR_PROP_READ,
+    U16_LO(DeviceInformation_hardwareRev_DP_H), U16_HI(DeviceInformation_hardwareRev_DP_H),
+    U16_LO(CHARACTERISTIC_UUID_HW_REVISION_STRING), U16_HI(CHARACTERISTIC_UUID_HW_REVISION_STRING)
+};
+
+static const u8 my_SWRevCharVal[5] = {
+    CHAR_PROP_READ,
+    U16_LO(DeviceInformation_softwareRev_DP_H), U16_HI(DeviceInformation_softwareRev_DP_H),
+    U16_LO(CHARACTERISTIC_UUID_SW_REVISION_STRING), U16_HI(CHARACTERISTIC_UUID_SW_REVISION_STRING)
+};
+
+
+
+//// HID attribute values
+static const u8 my_hidProtocolModeCharVal[5] = {
+    CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP,
+    U16_LO(HID_PROTOCOL_MODE_DP_H), U16_HI(HID_PROTOCOL_MODE_DP_H),
+    U16_LO(CHARACTERISTIC_UUID_HID_PROTOCOL_MODE), U16_HI(CHARACTERISTIC_UUID_HID_PROTOCOL_MODE)
+};
+static const u8 my_hidbootKeyInReporCharVal[5] = {
+    CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+    U16_LO(HID_BOOT_KB_REPORT_INPUT_DP_H), U16_HI(HID_BOOT_KB_REPORT_INPUT_DP_H),
+    U16_LO(CHARACTERISTIC_UUID_HID_BOOT_KEY_INPUT), U16_HI(CHARACTERISTIC_UUID_HID_BOOT_KEY_INPUT)
+};
+static const u8 my_hidbootKeyOutReporCharVal[5] = {
+    CHAR_PROP_READ | CHAR_PROP_WRITE | CHAR_PROP_WRITE_WITHOUT_RSP,
+    U16_LO(HID_BOOT_KB_REPORT_OUTPUT_DP_H), U16_HI(HID_BOOT_KB_REPORT_OUTPUT_DP_H),
+    U16_LO(CHARACTERISTIC_UUID_HID_BOOT_KEY_OUTPUT), U16_HI(CHARACTERISTIC_UUID_HID_BOOT_KEY_OUTPUT)
+};
+static const u8 my_hidReportCCinCharVal[5] = {
+    CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+    U16_LO(HID_CONSUME_REPORT_INPUT_DP_H), U16_HI(HID_CONSUME_REPORT_INPUT_DP_H),
+    U16_LO(CHARACTERISTIC_UUID_HID_REPORT), U16_HI(CHARACTERISTIC_UUID_HID_REPORT)
+};
+static const u8 my_hidReportKEYinCharVal[5] = {
+    CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+    U16_LO(HID_NORMAL_KB_REPORT_INPUT_DP_H), U16_HI(HID_NORMAL_KB_REPORT_INPUT_DP_H),
+    U16_LO(CHARACTERISTIC_UUID_HID_REPORT), U16_HI(CHARACTERISTIC_UUID_HID_REPORT)
+};
+static const u8 my_hidReportKEYoutCharVal[5] = {
+    CHAR_PROP_READ | CHAR_PROP_WRITE | CHAR_PROP_WRITE_WITHOUT_RSP,
+    U16_LO(HID_NORMAL_KB_REPORT_OUTPUT_DP_H), U16_HI(HID_NORMAL_KB_REPORT_OUTPUT_DP_H),
+    U16_LO(CHARACTERISTIC_UUID_HID_REPORT), U16_HI(CHARACTERISTIC_UUID_HID_REPORT)
+};
+static const u8 my_hidReportMapCharVal[5] = {
+    CHAR_PROP_READ,
+    U16_LO(HID_REPORT_MAP_DP_H), U16_HI(HID_REPORT_MAP_DP_H),
+    U16_LO(CHARACTERISTIC_UUID_HID_REPORT_MAP), U16_HI(CHARACTERISTIC_UUID_HID_REPORT_MAP)
+};
+static const u8 my_hidinformationCharVal[5] = {
+    CHAR_PROP_READ,
+    U16_LO(HID_INFORMATION_DP_H), U16_HI(HID_INFORMATION_DP_H),
+    U16_LO(CHARACTERISTIC_UUID_HID_INFORMATION), U16_HI(CHARACTERISTIC_UUID_HID_INFORMATION)
+};
+static const u8 my_hidCtrlPointCharVal[5] = {
+    CHAR_PROP_WRITE_WITHOUT_RSP,
+    U16_LO(HID_CONTROL_POINT_DP_H), U16_HI(HID_CONTROL_POINT_DP_H),
+    U16_LO(CHARACTERISTIC_UUID_HID_CONTROL_POINT), U16_HI(CHARACTERISTIC_UUID_HID_CONTROL_POINT)
+};
+
+
+//// Battery attribute values
+static const u8 my_batCharVal[5] = {
+    CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+    U16_LO(BATT_LEVEL_INPUT_DP_H), U16_HI(BATT_LEVEL_INPUT_DP_H),
+    U16_LO(CHARACTERISTIC_UUID_BATTERY_LEVEL), U16_HI(CHARACTERISTIC_UUID_BATTERY_LEVEL)
+};
+
+
+//// OTA attribute values
+static const u8 my_OtaCharVal[19] = {
+//    CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP | CHAR_PROP_NOTIFY,
+
+    CHAR_PROP_READ | CHAR_PROP_NOTIFY | CHAR_PROP_WRITE_WITHOUT_RSP,
+    U16_LO(OTA_CMD_OUT_DP_H), U16_HI(OTA_CMD_OUT_DP_H),
+    TELINK_SPP_DATA_OTA,
+};
+
+#if (MP_TEST_MODE)
+/// Test Mode attribute values
+static const u8 my_TestCharVal[19] = {
+    CHAR_PROP_READ | CHAR_PROP_WRITE | CHAR_PROP_WRITE_WITHOUT_RSP | CHAR_PROP_NOTIFY,
+    U16_LO(TEST_MODE_DP_H), U16_HI(TEST_MODE_DP_H),
+    TEST_MODE_TEST_DATA_UUID,
+};
+#endif
+
+#endif // CFG_ATM_SDK
+
+#if APP_IR_OVER_BLE
+static const u8 my_IrUUID[16]      = {TELINK_IR_UUID_SERVICE};
+static const u8 my_Ir_ProgControlUUID[16]   = {TELINK_IR_PROG_CONTROL_UUID_SERVICE};
+static const u8 my_Ir_KeyIdUUID[16]          = {TELINK_IR_KEY_ID_UUID_SERVICE};
+static const u8 my_Ir_CodeUUID[16]          = {TELINK_IR_CODE_UUID_SERVICE};
+static const u8 my_Ir_SuppressUUID[16]      = {TELINK_IR_SUPPRESS_UUID_SERVICE};
+static const u8 my_Ir_KeyEventUUID[16]      = {TELINK_IR_KEY_EVENT_UUID_SERVICE};
+
+
+static const u8 my_Ir_ProgControl_CharVal[19] = {
+    CHAR_PROP_WRITE,
+    U16_LO(IR_PROG_OUT_CONTROL_H), U16_HI(IR_PROG_OUT_CONTROL_H),
+    TELINK_IR_PROG_CONTROL_UUID_SERVICE
+};
+static const u8 my_Ir_Key_Id_CharVal[19] = {
+    CHAR_PROP_WRITE,
+    U16_LO(IR_KEY_ID_H), U16_HI(IR_KEY_ID_H),
+    TELINK_IR_KEY_ID_UUID_SERVICE
+};
+static const u8 my_Ir_Code_CharVal[19] = {
+    CHAR_PROP_WRITE,
+    U16_LO(IR_CODE_H), U16_HI(IR_CODE_H),
+    TELINK_IR_CODE_UUID_SERVICE
+};
+static const u8 my_Ir_Suppress_CharVal[19] = {
+    CHAR_PROP_WRITE,
+    U16_LO(IR_SUPPRESS_H), U16_HI(IR_SUPPRESS_H),
+    TELINK_IR_SUPPRESS_UUID_SERVICE
+};
+static const u8 my_Ir_Key_Event_CharVal[19] = {
+    CHAR_PROP_NOTIFY,
+    U16_LO(IR_KEY_EVENT_H), U16_HI(IR_KEY_EVENT_H),
+    TELINK_IR_KEY_EVENT_UUID_SERVICE
+};
+u8      ir_data[1] = {0};
+#endif
+
+
+#if BLE_AUDIO_ENABLE
+//// Audio attribute values
+    #include "application/audio/gl_audio.h"
+
+    u8      atv_char_tx_data[20] = {0};
+    u8      atv_char_rx_data[1] = {0};
+    u8      atv_char_ctl_data[1] = {0};
+
+    static const u8 ATVV_Server_UUID[16]         = AUDIO_GOOGLE_SERVICE_UUID;
+
+    static const u8 ATVV_Char_UUID_TX[16]         = {AUDIO_GOOGL_TX_CHAR_UUID};
+    static const u8 ATVV_Char_UUID_RX[16]         = {AUDIO_GOOGL_RX_CHAR_UUID};
+    static const u8 ATVV_Char_UUID_CTL[16]        = {AUDIO_GOOGL_CTL_CHAR_UUID};
+
+    static const u8 my_MicCharTx[20] = {
+        CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP | CHAR_PROP_NOTIFY,
+        U16_LO(AUDIO_GOOGLE_TX_DP_H), U16_HI(AUDIO_GOOGLE_TX_DP_H),
+        AUDIO_GOOGL_TX_CHAR_UUID,
+    };
+
+    static const u8 my_MicCharRx[20] = {
+        CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+        U16_LO(AUDIO_GOOGLE_RX_DP_H), U16_HI(AUDIO_GOOGLE_RX_DP_H),
+        AUDIO_GOOGL_RX_CHAR_UUID,
+    };
+
+    static const u8 my_MicCharCtl[20] = {
+        CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+        U16_LO(AUDIO_GOOGLE_CTL_DP_H), U16_HI(AUDIO_GOOGLE_CTL_DP_H),
+        AUDIO_GOOGL_CTL_CHAR_UUID,
+    };
+
+#endif
+
+#if FIND_ME_ENABLE
+
+static const u8 FMS_Server_UUID[16]    = {GOOGLE_FMS_SERVfICE_UUID};
+static const u8 FMS_Char_UUID_CTL[16]  = {GOOGLE_FMS_CTL_CHAR_UUID};
+static const u8 FMS_Char_UUID_DATA[16] = {GOOGLE_FMS_DATA_CHAR_UUID};
+
+_attribute_data_retention_ u16 my_fms_data_ccc = 0;
+
+static const u8 my_fms_CharCtlVal[19] = {
+    CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP,
+    U16_LO(FMS_GOOGLE_CTL_DP_H), U16_HI(FMS_GOOGLE_CTL_DP_H),
+    GOOGLE_FMS_CTL_CHAR_UUID
+};
+
+static const u8 my_fms_CharDataVal[19] = {
+    CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP | CHAR_PROP_NOTIFY,
+    U16_LO(FMS_GOOGLE_DATA_DP_H), U16_HI(FMS_GOOGLE_DATA_DP_H),
+    GOOGLE_FMS_DATA_CHAR_UUID
+};
+
+#endif
+
+extern void app_set_mtusize(void);
+extern void ir_fallback_process(u16 handle, u8* buf, u16 len);
+int app_ir_callback(void *p)
+{
+    u16 handle,len;
+    u16 printf_len;
+
+    rf_packet_att_data_t *pw = (rf_packet_att_data_t *)p;
+    handle = pw->handle;
+
+    //printf("handle = %x\r\n",handle);
+    //printf("pw->l2cap=%x\r\n",pw->l2cap-3);
+    //printf("dat=\r\n");
+
+    len = pw->l2cap-3;//pw->rf_len-7;
+    printf_len = len;
+    #if 0
+    if(printf_len > 6)
+        printf_len = 6;
+    for(u16 i=0;i<printf_len;i++)
+        printf(" %x",pw->dat[i]);
+    #endif
+    //printf("len=%x\r\n",len);
+#ifndef CFG_ATM_SDK
+    app_set_mtusize();
+#endif
+    ir_fallback_process(handle,pw->dat,len);
+
+    return 0;
+}
+
+
+int app_necir_or_dataupdate(void *p)
+{
+    u16 handle,len;
+    u16 printf_len;
+
+    rf_packet_att_data_t *pw = (rf_packet_att_data_t *)p;
+    handle = pw->handle;
+
+    //printf("handle = %x\r\n",handle);
+    //printf("pw->l2cap=%x\r\n",pw->l2cap-3);
+    //printf("app_nec_ir_table_callback handle=%x\r\n",handle);
+
+    len = pw->l2cap-3;//pw->rf_len-7;
+    printf_len = len;
+
+    #if 0
+    printf("len=%x\r\n",len);
+    for(u8 i=0;i<printf_len;i++)
+        printf(" %x",pw->dat[i]);
+    #endif
+
+#if APP_IR_OVER_BLE
+    ir_nec_ir_table_process(pw->dat,len);
+#endif
+
+#if APP_DATA_UPDATE_OVER_BLE
+    app_custom_data_update_process(pw->dat,len);
+#endif
+
+    return 0;
+}
+
+int app_ota_handle(void * p){
+
+    int result=0;
+
+    app_necir_or_dataupdate(p);
+
+    result = app_ota_write(p);
+
+    return result;
+}
+
+    static const attribute_t my_Attributes[] = {
+#if (MP_TEST_MODE)
+        {ATT_END_H - 1 - 4, 0,0,0,0,0},    // total num of attribute
+#else
+        {ATT_END_H - 1, 0,0,0,0,0},    // total num of attribute
+#endif
+#ifndef CFG_ATM_SDK
+        // 0001 - 0007  gap         (1-7)
+        {7,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID),     (u8*)(&my_gapServiceUUID), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_devNameCharVal),(u8*)(&my_characterUUID), (u8*)(my_devNameCharVal), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(_custom_data.device_name), (u8*)(&my_devNameUUID), (u8*)(_custom_data.device_name), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_appearanceCharVal),(u8*)(&my_characterUUID), (u8*)(my_appearanceCharVal), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof (my_appearance), (u8*)(&my_appearanceUIID),     (u8*)(&my_appearance), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_periConnParamCharVal),(u8*)(&my_characterUUID), (u8*)(my_periConnParamCharVal), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof (my_periConnParameters),(u8*)(&my_periConnParamUUID),     (u8*)(&my_periConnParameters), 0},
+
+
+        // 0008 - 000b gatt         (8-11)
+        {4,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID),     (u8*)(&my_gattServiceUUID), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_serviceChangeCharVal),(u8*)(&my_characterUUID),         (u8*)(my_serviceChangeCharVal), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof (serviceChangeVal), (u8*)(&serviceChangeUUID),     (u8*)(&serviceChangeVal), 0},
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof (serviceChangeCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(serviceChangeCCC), 0},
+
+        // 000c - 000e  device Information Service
+        //PnP ID                    (12-14)
+
+        {9,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID),     (u8*)(&my_devServiceUUID), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_PnCharVal),(u8*)(&my_characterUUID), (u8*)(my_PnCharVal), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof (_custom_data.pnp_id),(u8*)(&my_PnPUUID), (u8*)(_custom_data.pnp_id), 0},
+
+        //firmware revision string  (15-16)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_FWRevCharVal),(u8*)(&my_characterUUID), (u8*)(my_FWRevCharVal), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof (my_FWRevtrs),(u8*)(&my_FWRevUUID), (u8*)(my_FWRevtrs), 0},
+
+        //software revision string  (17-18)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_SWRevCharVal),(u8*)(&my_characterUUID), (u8*)(my_SWRevCharVal), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof (my_SWRevtrs),(u8*)(&my_SWRevUUID), (u8*)(my_SWRevtrs), 0},
+
+        //hardware revision string  (19-20)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_HWRevCharVal),(u8*)(&my_characterUUID), (u8*)(my_HWRevCharVal), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof (my_HWRevtrs),(u8*)(&my_HWRevUUID), (u8*)(my_HWRevtrs), 0},
+
+        /////////////////////////////////// 4. HID Service /////////////////////////////////////////////////////////
+        // 000f                     (21)
+        //{27, ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID),     (u8*)(&my_hidServiceUUID), 0},
+        {HID_CONTROL_POINT_DP_H - HID_PS_H + 1, ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID),     (u8*)(&my_hidServiceUUID), 0},
+
+        // 0010  include battery service  (22)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(include),(u8*)(&hidIncludeUUID),     (u8*)(include), 0},
+
+        // 0011 - 0012  protocol mode (23-24)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidProtocolModeCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidProtocolModeCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_READ,2, sizeof(protocolMode),(u8*)(&hidProtocolModeUUID),     (u8*)(&protocolMode), 0},    //value
+
+        // 0013 - 0015  boot keyboard input report (char-val-client)   (25-27)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidbootKeyInReporCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidbootKeyInReporCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_READ,2,sizeof(bootKeyInReport),(u8*)(&hidbootKeyInReportUUID),     (u8*)(&bootKeyInReport), 0},    //value
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(bootKeyInReportCCC),(u8*)(&clientCharacterCfgUUID),     (u8*)(bootKeyInReportCCC), 0},    //value
+
+        // 0016 - 0017   boot keyboard output report (char-val)        (28-29)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidbootKeyOutReporCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidbootKeyOutReporCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_RDWR,2, sizeof(bootKeyOutReport), (u8*)(&hidbootKeyOutReportUUID),     (u8*)(&bootKeyOutReport), 0},    //value
+
+
+        // 0018 - 001b. consume report in: 4 (char-val-client-ref)     (30-33)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportCCinCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportCCinCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_READ,2, sizeof(reportConsumerControlIn),(u8*)(&hidReportUUID),     (u8*)(reportConsumerControlIn), 0},    //value
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportConsumerControlInCCC),(u8*)(&clientCharacterCfgUUID),     (u8*)(reportConsumerControlInCCC), 0},    //value
+        {0,ATT_PERMISSIONS_READ,2,sizeof(reportRefConsumerControlIn),(u8*)(&reportRefUUID),     (u8*)(reportRefConsumerControlIn), 0},    //value
+
+        // 001c - 001f . keyboard report in : 4 (char-val-client-ref)   (34-37)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportKEYinCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportKEYinCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_READ,2, sizeof(reportKeyIn),(u8*)(&hidReportUUID),     (u8*)(reportKeyIn), 0},    //value
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportKeyInCCC),(u8*)(&clientCharacterCfgUUID),     (u8*)(reportKeyInCCC), 0},    //value
+        {0,ATT_PERMISSIONS_READ,2,sizeof(reportRefKeyIn),(u8*)(&reportRefUUID),     (u8*)(reportRefKeyIn), 0},    //value
+
+        // 0020 - 0022 . keyboard report out: 3 (char-val-ref)         (38-40)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportKEYoutCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportKEYoutCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportKeyOut),(u8*)(&hidReportUUID),     (u8*)(reportKeyOut), 0},    //value
+        {0,ATT_PERMISSIONS_READ,2,sizeof(reportRefKeyOut),(u8*)(&reportRefUUID),     (u8*)(reportRefKeyOut), 0},    //value
+
+        // 0023 - 0025 . report map: 3                                  (41-43)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportMapCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportMapCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_READ,2,sizeof(reportMap),(u8*)(&hidReportMapUUID),     (u8*)(reportMap), 0},    //value
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(extServiceUUID),(u8*)(&extReportRefUUID),     (u8*)(&extServiceUUID), 0},    //value
+
+        // 0026 - 0027 . hid information: 2                            (44-45)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidinformationCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidinformationCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_READ,2, sizeof(hidInformation),(u8*)(&hidinformationUUID),     (u8*)(hidInformation), 0},    //value
+
+        // 0028 - 0029 . control point: 2                               (46-47)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidCtrlPointCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidCtrlPointCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_WRITE,2, sizeof(controlPoint),(u8*)(&hidCtrlPointUUID),     (u8*)(&controlPoint), 0},    //value
+
+
+        ////////////////////////////////////// Battery Service /////////////////////////////////////////////////////
+        // 002a - 002d                                                  (48-51)
+        {4,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID),     (u8*)(&my_batServiceUUID), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_batCharVal),(u8*)(&my_characterUUID), (u8*)(my_batCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_batVal),(u8*)(&my_batCharUUID),     (u8*)(my_batVal), 0},    //value
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(batteryValueInCCC),(u8*)(&clientCharacterCfgUUID),     (u8*)(batteryValueInCCC), 0},    //value
+
+        ////////////////////////////////////// OTA /////////////////////////////////////////////////////
+        // 002e - 0031                                                  (52-56)
+        {5,ATT_PERMISSIONS_READ, 2,16,(u8*)(&my_primaryServiceUUID),     (u8*)(&my_OtaServiceUUID), 0},
+        {0,ATT_PERMISSIONS_READ, 2, sizeof(my_OtaCharVal),(u8*)(&my_characterUUID), (u8*)(my_OtaCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_RDWR,16,sizeof(my_OtaData),(u8*)(&my_OtaUUID),    (&my_OtaData), &app_ota_handle, 0},//&otaRead},            //value
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(my_Otaccc),(u8*)(&clientCharacterCfgUUID),(u8*)(&my_Otaccc), &att_ccc_control},
+        {0,ATT_PERMISSIONS_READ, 2,sizeof (my_OtaName),(u8*)(&userdesc_UUID), (u8*)(my_OtaName), 0},
+#endif // CFG_ATM_SDK
+
+        ////////////////////////////////////// Audio /////////////////////////////////////////////////////
+        /********************************************************************************************
+        * GOOGLE AUDIO service
+        ********************************************************************************************/
+#if BLE_AUDIO_ENABLE
+        //0032                                                           (57-65)
+        {9,ATT_PERMISSIONS_READ,2,16, (u8*)(&my_primaryServiceUUID), (u8*)(&ATVV_Server_UUID), 0},
+        //TX 0033-0034
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(my_MicCharTx),(u8*)(&my_characterUUID),(u8*)(my_MicCharTx), 0},
+        {0,ATT_PERMISSIONS_RDWR,16,sizeof(atv_char_tx_data),(u8*)(&ATVV_Char_UUID_TX),(u8*)(&atv_char_tx_data), &app_auido_google_callback},    //value
+        //RX 0035 - 0037
+#ifdef CFG_ATM_SDK
+        {0,ATT_PERMISSIONS_READ,2,256,(u8*)(&my_characterUUID),(u8*)(my_MicCharRx), 0},
+#else
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_MicCharRx),(u8*)(&my_characterUUID),(u8*)(my_MicCharRx), 0},
+#endif
+        {0,ATT_PERMISSIONS_READ,16,sizeof(atv_char_rx_data),(u8*)(&ATVV_Char_UUID_RX),(u8*)(&atv_char_rx_data), 0},
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(atv_char_rx_ccc),(u8*)(&clientCharacterCfgUUID),(u8*)(&atv_char_rx_ccc), &att_ccc_control},
+//        {0,ATT_PERMISSIONS_RDWR,2,sizeof(atv_char_rx_ccc),(u8*)(&clientCharacterCfgUUID),(u8*)(&atv_char_rx_ccc), 0},
+
+        //CTRL 0038 -003A
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_MicCharCtl),(u8*)(&my_characterUUID),(u8*)(my_MicCharCtl), 0},
+        {0,ATT_PERMISSIONS_READ,16,sizeof(atv_char_ctl_data),(u8*)(&ATVV_Char_UUID_CTL),(u8*)(&atv_char_ctl_data), 0},
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(atv_char_ctl_ccc),(u8*)(&clientCharacterCfgUUID),(u8*)(&atv_char_ctl_ccc), &att_ccc_control},
+//        {0,ATT_PERMISSIONS_RDWR,2,sizeof(atv_char_ctl_ccc),(u8*)(&clientCharacterCfgUUID),(u8*)(&atv_char_ctl_ccc), 0},
+#endif
+
+        ////////////////////////////////////// IR /////////////////////////////////////////////////////
+#if APP_IR_OVER_BLE
+        //IR 003C                                                       (66-77)
+        {12,ATT_PERMISSIONS_READ,2,16,(u8*)(&my_primaryServiceUUID),     (u8*)(&my_IrUUID), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_Ir_ProgControl_CharVal),(u8*)(&my_characterUUID), (u8*)(my_Ir_ProgControl_CharVal), 0},        //prop
+        {0,ATT_PERMISSIONS_RDWR,16,sizeof(ir_data),(u8*)(&my_Ir_ProgControlUUID), (u8*)(ir_data), &app_ir_callback},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_Ir_Key_Id_CharVal),(u8*)(&my_characterUUID), (u8*)(my_Ir_Key_Id_CharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_RDWR,16,sizeof(ir_data),(u8*)(&my_Ir_KeyIdUUID), (u8*)(ir_data), &app_ir_callback},
+#ifdef CFG_ATM_SDK
+	// Fix incorrect attribute data size
+        {0,ATT_PERMISSIONS_READ,2,256,(u8*)(&my_characterUUID), (u8*)(my_Ir_Code_CharVal), 0},                    //prop
+#else
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_Ir_Code_CharVal),(u8*)(&my_characterUUID), (u8*)(my_Ir_Code_CharVal), 0},                    //prop
+#endif
+        {0,ATT_PERMISSIONS_RDWR,16,sizeof(ir_data),(u8*)(&my_Ir_CodeUUID), (u8*)(ir_data),&app_ir_callback},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_Ir_Suppress_CharVal),(u8*)(&my_characterUUID),     (u8*)(my_Ir_Suppress_CharVal), 0},            //prop
+        {0,ATT_PERMISSIONS_RDWR,16,sizeof(ir_data),(u8*)(&my_Ir_SuppressUUID), (u8*)(ir_data), &app_ir_callback},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_Ir_Key_Event_CharVal),(u8*)(&my_characterUUID),    (u8*)(my_Ir_Key_Event_CharVal), 0},            //prop
+        {0,ATT_PERMISSIONS_RDWR,16,sizeof(ir_data),(u8*)(&my_Ir_KeyEventUUID), (u8*)(ir_data), 0},
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(ir_data),(u8*)(&clientCharacterCfgUUID), (u8*)(ir_data), &app_ir_callback},
+#endif
+
+#if FIND_ME_ENABLE
+        {6,ATT_PERMISSIONS_READ,2,16,(u8*)(&my_primaryServiceUUID),     (u8*)(&FMS_Server_UUID), 0},
+
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_fms_CharCtlVal),(u8*)(&my_characterUUID), (u8*)(my_fms_CharCtlVal), 0},
+        {0,ATT_PERMISSIONS_RDWR,16,2,(u8*)(&FMS_Char_UUID_CTL),(u8 *) g_p_app_fms_ctrl_val, &app_fms_att_ctl_cb},
+
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_fms_CharDataVal),(u8*)(&my_characterUUID),(u8*)(my_fms_CharDataVal), 0},
+        {0,ATT_PERMISSIONS_RDWR,16,2,(u8*)(&FMS_Char_UUID_DATA),(u8 *)g_p_app_fms_data_val, &app_fms_att_data_cb},
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(my_fms_data_ccc),(u8*)(&clientCharacterCfgUUID),(u8*)(&my_fms_data_ccc), &att_ccc_control},
+
+#endif
+
+    };
+
+#if (MP_TEST_MODE)
+    static const attribute_t my_test_dome_Attributes[] = {
+
+        {ATT_END_H - 1, 0,0,0,0,0},    // total num of attribute
+
+
+        /////////////////////////////////// 1. Gap /////////////////////////////////////////////////////////
+        // 0001 - 0007              (1-7)
+        {7,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID),     (u8*)(&my_gapServiceUUID), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_devNameCharVal),(u8*)(&my_characterUUID), (u8*)(my_devNameCharVal), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(_custom_data.device_name), (u8*)(&my_devNameUUID), (u8*)(_custom_data.device_name), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_appearanceCharVal),(u8*)(&my_characterUUID), (u8*)(my_appearanceCharVal), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof (my_appearance), (u8*)(&my_appearanceUIID),     (u8*)(&my_appearance), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_periConnParamCharVal),(u8*)(&my_characterUUID), (u8*)(my_periConnParamCharVal), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof (my_periConnParameters),(u8*)(&my_periConnParamUUID),     (u8*)(&my_periConnParameters), 0},
+
+
+        /////////////////////////////////// 2. Gatt ////////////////////////////////////////////////////////
+        // 0008 - 000b              (8-11)
+        {4,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID),     (u8*)(&my_gattServiceUUID), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_serviceChangeCharVal),(u8*)(&my_characterUUID),         (u8*)(my_serviceChangeCharVal), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof (serviceChangeVal), (u8*)(&serviceChangeUUID),     (u8*)(&serviceChangeVal), 0},
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof (serviceChangeCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(serviceChangeCCC), 0},
+
+
+        /////////////////////////////////// 3. Device Information Service //////////////////////////////////
+        // 000c - 0014
+        // PnP ID                   (12-14)
+        {9,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID),     (u8*)(&my_devServiceUUID), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_PnCharVal),(u8*)(&my_characterUUID), (u8*)(my_PnCharVal), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof (_custom_data.pnp_id),(u8*)(&my_PnPUUID), (u8*)(_custom_data.pnp_id), 0},
+
+        // firmware revision string (15-16)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_FWRevCharVal),(u8*)(&my_characterUUID), (u8*)(my_FWRevCharVal), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof (my_FWRevtrs),(u8*)(&my_FWRevUUID), (u8*)(my_FWRevtrs), 0},
+
+        // software revision string (17-18)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_SWRevCharVal),(u8*)(&my_characterUUID), (u8*)(my_SWRevCharVal), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof (my_SWRevtrs),(u8*)(&my_SWRevUUID), (u8*)(my_SWRevtrs), 0},
+
+        // hardware revision string (19-20)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_HWRevCharVal),(u8*)(&my_characterUUID), (u8*)(my_HWRevCharVal), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof (my_HWRevtrs),(u8*)(&my_HWRevUUID), (u8*)(my_HWRevtrs), 0},
+
+
+        /////////////////////////////////// 4. HID Service /////////////////////////////////////////////////
+        // 0015 - 002F
+        // primary                  (21)
+        {HID_CONTROL_POINT_DP_H - HID_PS_H + 1, ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID),     (u8*)(&my_hidServiceUUID), 0},
+
+        // include battery service  (22)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(include),(u8*)(&hidIncludeUUID),     (u8*)(include), 0},
+
+        // protocol mode            (23-24)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidProtocolModeCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidProtocolModeCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_RDWR,2, sizeof(protocolMode),(u8*)(&hidProtocolModeUUID),     (u8*)(&protocolMode), 0},    //value
+
+        // boot keyboard input report (char-val-client)   (25-27)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidbootKeyInReporCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidbootKeyInReporCharVal), 0},            //prop
+        {0,ATT_PERMISSIONS_READ,2,sizeof(bootKeyInReport),(u8*)(&hidbootKeyInReportUUID),     (u8*)(&bootKeyInReport), 0},    //value
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(bootKeyInReportCCC),(u8*)(&clientCharacterCfgUUID),     (u8*)(bootKeyInReportCCC), 0},    //value
+
+        // boot keyboard output report (char-val)         (28-29)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidbootKeyOutReporCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidbootKeyOutReporCharVal), 0},          //prop
+        {0,ATT_PERMISSIONS_RDWR,2, sizeof(bootKeyOutReport), (u8*)(&hidbootKeyOutReportUUID),     (u8*)(&bootKeyOutReport), 0},    //value
+
+        // consume report in: 4 (char-val-client-ref)     (30-33)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportCCinCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportCCinCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_READ,2, sizeof(reportConsumerControlIn),(u8*)(&hidReportUUID),     (u8*)(reportConsumerControlIn), 0},    //value
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportConsumerControlInCCC),(u8*)(&clientCharacterCfgUUID),     (u8*)(reportConsumerControlInCCC), 0},    //value
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportRefConsumerControlIn),(u8*)(&reportRefUUID),     (u8*)(reportRefConsumerControlIn), 0},    //value
+
+        // keyboard report in : 4 (char-val-client-ref)   (34-37)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportKEYinCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportKEYinCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_READ,2, sizeof(reportKeyIn),(u8*)(&hidReportUUID),     (u8*)(reportKeyIn), 0},    //value
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportKeyInCCC),(u8*)(&clientCharacterCfgUUID),     (u8*)(reportKeyInCCC), 0},    //value
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportRefKeyIn),(u8*)(&reportRefUUID),     (u8*)(reportRefKeyIn), 0},    //value
+
+        // keyboard report out: 3 (char-val-ref)          (38-40)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportKEYoutCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportKEYoutCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportKeyOut),(u8*)(&hidReportUUID),     (u8*)(reportKeyOut), 0},    //value
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportRefKeyOut),(u8*)(&reportRefUUID),     (u8*)(reportRefKeyOut), 0},    //value
+
+        // report map: 3            (41-43)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportMapCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportMapCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_READ,2,sizeof(reportMap),(u8*)(&hidReportMapUUID),     (u8*)(reportMap), 0},    //value
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(extServiceUUID),(u8*)(&extReportRefUUID),     (u8*)(&extServiceUUID), 0},    //value
+
+        // hid information: 2       (44-45)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidinformationCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidinformationCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_READ,2, sizeof(hidInformation),(u8*)(&hidinformationUUID),     (u8*)(hidInformation), 0},    //value
+
+        // control point: 2         (46-47)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidCtrlPointCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidCtrlPointCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_WRITE,2, sizeof(controlPoint),(u8*)(&hidCtrlPointUUID),     (u8*)(&controlPoint), 0},    //value
+
+
+        /////////////////////////////////// 5. Battery Service /////////////////////////////////////////////
+        // 0030 - 0033              (48-51)
+        {4,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID),     (u8*)(&my_batServiceUUID), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_batCharVal),(u8*)(&my_characterUUID), (u8*)(my_batCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_batVal),(u8*)(&my_batCharUUID),     (u8*)(my_batVal), 0},    //value
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(batteryValueInCCC),(u8*)(&clientCharacterCfgUUID),     (u8*)(batteryValueInCCC), 0},    //value
+
+
+        /////////////////////////////////// 6. OTA /////////////////////////////////////////////////////////
+        // 0034 - 0038              (52-56)
+        {5,ATT_PERMISSIONS_READ, 2,16,(u8*)(&my_primaryServiceUUID),     (u8*)(&my_OtaServiceUUID), 0},
+        {0,ATT_PERMISSIONS_READ, 2, sizeof(my_OtaCharVal),(u8*)(&my_characterUUID), (u8*)(my_OtaCharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_RDWR,16,sizeof(my_OtaData),(u8*)(&my_OtaUUID),    (&my_OtaData), &app_ota_write, 0},//&otaRead},            //value
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(my_Otaccc),(u8*)(&clientCharacterCfgUUID),(u8*)(&my_Otaccc), &att_ccc_control},
+        {0,ATT_PERMISSIONS_READ, 2,sizeof (my_OtaName),(u8*)(&userdesc_UUID), (u8*)(my_OtaName), 0},
+
+
+        /////////////////////////////////// 7. Audio ///////////////////////////////////////////////////////
+        /********************************************************************************************
+        * GOOGLE AUDIO service
+        ********************************************************************************************/
+        // 0039 - 0041
+        // primary                  (57)
+#if BLE_AUDIO_ENABLE
+        {9,ATT_PERMISSIONS_READ,2,16, (u8*)(&my_primaryServiceUUID), (u8*)(&ATVV_Server_UUID), 0},
+
+        // TX                       (58-59)
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(my_MicCharTx),(u8*)(&my_characterUUID),(u8*)(my_MicCharTx), 0},
+        {0,ATT_PERMISSIONS_RDWR,16,sizeof(atv_char_tx_data),(u8*)(&ATVV_Char_UUID_TX),(u8*)(&atv_char_tx_data), &app_auido_google_callback},    //value
+
+        // RX                       (60-62)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_MicCharRx),(u8*)(&my_characterUUID),(u8*)(my_MicCharRx), 0},
+        {0,ATT_PERMISSIONS_READ,16,sizeof(atv_char_rx_data),(u8*)(&ATVV_Char_UUID_RX),(u8*)(&atv_char_rx_data), 0},
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(atv_char_rx_ccc),(u8*)(&clientCharacterCfgUUID),(u8*)(&atv_char_rx_ccc), &att_ccc_control},
+
+        // CTRL                     (63-65)
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_MicCharCtl),(u8*)(&my_characterUUID),(u8*)(my_MicCharCtl), 0},
+        {0,ATT_PERMISSIONS_READ,16,sizeof(atv_char_ctl_data),(u8*)(&ATVV_Char_UUID_CTL),(u8*)(&atv_char_ctl_data), 0},
+        {0,ATT_PERMISSIONS_RDWR,2,sizeof(atv_char_ctl_ccc),(u8*)(&clientCharacterCfgUUID),(u8*)(&atv_char_ctl_ccc), &att_ccc_control},
+#endif
+
+        /////////////////////////////////// 8. IR //////////////////////////////////////////////////////////
+        // 0042 - 004D              (66-77)
+#if APP_IR_OVER_BLE
+        {12,ATT_PERMISSIONS_READ,2,16,(u8*)(&my_primaryServiceUUID),     (u8*)(&my_IrUUID), 0},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_Ir_ProgControl_CharVal),(u8*)(&my_characterUUID), (u8*)(my_Ir_ProgControl_CharVal), 0},        //prop
+        {0,ATT_PERMISSIONS_RDWR,16,0,(u8*)(&my_Ir_ProgControlUUID), 0, &app_ir_callback},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_Ir_Key_Id_CharVal),(u8*)(&my_characterUUID), (u8*)(my_Ir_Key_Id_CharVal), 0},                //prop
+        {0,ATT_PERMISSIONS_RDWR,16,0,(u8*)(&my_Ir_KeyIdUUID), 0, &app_ir_callback},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_Ir_Code_CharVal),(u8*)(&my_characterUUID), (u8*)(my_Ir_Code_CharVal), 0},                    //prop
+        {0,ATT_PERMISSIONS_RDWR,16,0,(u8*)(&my_Ir_CodeUUID), 0,&app_ir_callback},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_Ir_Suppress_CharVal),(u8*)(&my_characterUUID),     (u8*)(my_Ir_Suppress_CharVal), 0},            //prop
+        {0,ATT_PERMISSIONS_RDWR,16,0,(u8*)(&my_Ir_SuppressUUID), 0, &app_ir_callback},
+        {0,ATT_PERMISSIONS_READ,2,sizeof(my_Ir_Key_Event_CharVal),(u8*)(&my_characterUUID),    (u8*)(my_Ir_Key_Event_CharVal), 0},            //prop
+        {0,ATT_PERMISSIONS_RDWR,16,0,(u8*)(&my_Ir_KeyEventUUID), 0, 0},
+        {0,ATT_PERMISSIONS_RDWR,2,0,(u8*)(&clientCharacterCfgUUID), 0, &app_ir_callback},
+#endif
+
+        /////////////////////////////////// 9. TEST MODE ///////////////////////////////////////////////////
+        // 004E - 0051              (78-81)
+        {4, ATT_PERMISSIONS_READ, 2, 16, (u8*)(&my_primaryServiceUUID), (u8*)(&my_TestModeServiceUUID), 0},
+        {0, ATT_PERMISSIONS_READ, 2, sizeof(my_TestCharVal), (u8*)(&my_characterUUID), (u8*)(my_TestCharVal), 0},        //prop
+        {0, ATT_PERMISSIONS_WRITE, 16, sizeof(my_TestData), (u8*)(&my_TestDataUUID), (&my_TestData), &test_write_cb, 0}, //value
+        {0, ATT_PERMISSIONS_RDWR, 2, sizeof(my_TestDataCCC), (u8*)(&clientCharacterCfgUUID), (u8*)(my_TestDataCCC), 0},
+
+    };
+#endif
+
+
+void my_att_init (void)
+{
+#if (MP_TEST_MODE)
+    if (test_get_mode() == MODE_TEST) bls_att_setAttributeTable((u8 *)my_test_dome_Attributes);
+    else
+#endif
+    bls_att_setAttributeTable ((u8 *)my_Attributes);
+}
+
+#ifndef CFG_ATM_SDK
+void init_device_info (void)
+{
+    //u8 my_FWRevtrs []     = {'V','1','.','1','.','1'};
+    //u8 my_SWRevtrs []     = {'V','1','.','0','2'};
+    my_FWRevtrs[1] = ((FW_VERSION>>28)&0x0f) + 48;
+    //my_FWRevtrs[3] = ((FW_VERSION>>24)&0x0f) + 48;
+    //my_FWRevtrs[5] = ((FW_VERSION>>20)&0x0f) + 48;
+
+//    my_SWRevtrs[1] = ((FW_VERSION>>8)&0x0f) + 48;
+//    my_SWRevtrs[3] = ((FW_VERSION>>4)&0x0f) + 48;
+//    my_SWRevtrs[4] = (FW_VERSION&0x0f) + 48;
+}
+#endif
diff --git a/vendor/827x_ble_remote/app_att.h b/vendor/827x_ble_remote/app_att.h
new file mode 100644
index 0000000..80ea77f
--- /dev/null
+++ b/vendor/827x_ble_remote/app_att.h
@@ -0,0 +1,215 @@
+/******************************************************************************
+ * @file     app_att.h
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *  Copyright (C) Atmosic 2022
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+#ifndef APP_ATT_H_
+#define APP_ATT_H_
+
+#include "app_config.h"
+
+///////////////////////////////////// ATT  HANDLER define ///////////////////////////////////////
+typedef enum
+{
+    ATT_H_START = 0,
+
+#ifndef CFG_ATM_SDK
+    //// Gap ////
+    /**********************************************************************************************/
+    GenericAccess_PS_H,                     //UUID: 2800,     VALUE: uuid 1800
+    GenericAccess_DeviceName_CD_H,          //UUID: 2803,     VALUE:              Prop: Read | Notify
+    GenericAccess_DeviceName_DP_H,          //UUID: 2A00,     VALUE: device name
+    GenericAccess_Appearance_CD_H,          //UUID: 2803,     VALUE:              Prop: Read
+    GenericAccess_Appearance_DP_H,          //UUID: 2A01,     VALUE: appearance
+    CONN_PARAM_CD_H,                        //UUID: 2803,     VALUE:              Prop: Read
+    CONN_PARAM_DP_H,                        //UUID: 2A04,     VALUE: connParameter
+
+
+    //// gatt ////
+    /**********************************************************************************************/
+    GenericAttribute_PS_H,                  //UUID: 2800,     VALUE: uuid 1801
+    GenericAttribute_ServiceChanged_CD_H,   //UUID: 2803,     VALUE:              Prop: Indicate
+    GenericAttribute_ServiceChanged_DP_H,   //UUID: 2A05,     VALUE: service change
+    GenericAttribute_ServiceChanged_CCB_H,  //UUID: 2902,     VALUE: serviceChangeCCC
+
+
+    //// device information ////
+    /**********************************************************************************************/
+    DeviceInformation_PS_H,                 //UUID: 2800,     VALUE: uuid 180A
+    DeviceInformation_pnpID_CD_H,           //UUID: 2803,     VALUE:              Prop: Read
+    DeviceInformation_pnpID_DP_H,           //UUID: 2A50,     VALUE: PnPtrs
+
+    DeviceInformation_firmwareRev_CD_H,     //UUID: 2803,     VALUE:              Prop: Read
+    DeviceInformation_firmwareRev_DP_H,     //UUID: 2A50,     VALUE: PnPtrs
+
+    DeviceInformation_softwareRev_CD_H,     //UUID: 2803,     VALUE:              Prop: Read
+    DeviceInformation_softwareRev_DP_H,     //UUID: 2A50,     VALUE: PnPtrs
+
+    DeviceInformation_hardwareRev_CD_H,     //UUID: 2803,     VALUE:              Prop: Read
+    DeviceInformation_hardwareRev_DP_H,     //UUID: 2A50,     VALUE: PnPtrs
+
+    //// HID ////
+    /**********************************************************************************************/
+    HID_PS_H,                               //UUID: 2800,     VALUE: uuid 1812
+
+    //include
+    HID_INCLUDE_H,                          //UUID: 2802,     VALUE: include
+
+    //protocol
+    HID_PROTOCOL_MODE_CD_H,                 //UUID: 2803,     VALUE:              Prop: read | write_without_rsp
+    HID_PROTOCOL_MODE_DP_H,                 //UUID: 2A4E,     VALUE: protocolMode
+
+    //boot keyboard input report
+    HID_BOOT_KB_REPORT_INPUT_CD_H,          //UUID: 2803,     VALUE:              Prop: Read | Notify
+    HID_BOOT_KB_REPORT_INPUT_DP_H,          //UUID: 2A22,     VALUE: bootKeyInReport
+    HID_BOOT_KB_REPORT_INPUT_CCB_H,         //UUID: 2902,     VALUE: bootKeyInReportCCC
+
+    //boot keyboard output report
+    HID_BOOT_KB_REPORT_OUTPUT_CD_H,         //UUID: 2803,     VALUE:              Prop: Read | write| write_without_rsp
+    HID_BOOT_KB_REPORT_OUTPUT_DP_H,         //UUID: 2A32,     VALUE: bootKeyOutReport
+
+    //consume report in
+    HID_CONSUME_REPORT_INPUT_CD_H,          //UUID: 2803,     VALUE:              Prop: Read | Notify
+    HID_CONSUME_REPORT_INPUT_DP_H,          //UUID: 2A4D,     VALUE: reportConsumerIn
+    HID_CONSUME_REPORT_INPUT_CCB_H,         //UUID: 2902,     VALUE: reportConsumerInCCC
+    HID_CONSUME_REPORT_INPUT_REF_H,         //UUID: 2908      VALUE: REPORT_ID_CONSUMER, TYPE_INPUT
+
+    //keyboard report in
+    HID_NORMAL_KB_REPORT_INPUT_CD_H,        //UUID: 2803,     VALUE:              Prop: Read | Notify
+    HID_NORMAL_KB_REPORT_INPUT_DP_H,        //UUID: 2A4D,     VALUE: reportKeyIn
+    HID_NORMAL_KB_REPORT_INPUT_CCB_H,       //UUID: 2902,     VALUE: reportKeyInInCCC
+    HID_NORMAL_KB_REPORT_INPUT_REF_H,       //UUID: 2908      VALUE: REPORT_ID_KEYBOARD, TYPE_INPUT
+
+    //keyboard report out
+    HID_NORMAL_KB_REPORT_OUTPUT_CD_H,       //UUID: 2803,     VALUE:              Prop: Read | write| write_without_rsp
+    HID_NORMAL_KB_REPORT_OUTPUT_DP_H,       //UUID: 2A4D,     VALUE: reportKeyOut
+    HID_NORMAL_KB_REPORT_OUTPUT_REF_H,      //UUID: 2908      VALUE: REPORT_ID_KEYBOARD, TYPE_OUTPUT
+
+    // report map
+    HID_REPORT_MAP_CD_H,                    //UUID: 2803,     VALUE:              Prop: Read
+    HID_REPORT_MAP_DP_H,                    //UUID: 2A4B,     VALUE: reportKeyIn
+    HID_REPORT_MAP_EXT_REF_H,               //UUID: 2907      VALUE: extService
+
+    //hid information
+    HID_INFORMATION_CD_H,                   //UUID: 2803,     VALUE:              Prop: read
+    HID_INFORMATION_DP_H,                   //UUID: 2A4A      VALUE: hidInformation
+
+    //control point
+    HID_CONTROL_POINT_CD_H,                 //UUID: 2803,     VALUE:              Prop: write_without_rsp
+    HID_CONTROL_POINT_DP_H,                 //UUID: 2A4C      VALUE: controlPoint
+#if (BLE_AUDIO_ENABLE)
+    #if (TL_AUDIO_MODE & TL_AUDIO_MASK_HID_SERVICE_CHANNEL)
+    //audio report in 1
+    HID_AUDIO_REPORT_INPUT_FIRST_CD_H,      //UUID: 2803,     VALUE:              Prop: Read | Notify
+    HID_AUDIO_REPORT_INPUT_FIRST_DP_H,      //UUID: 2A4D,     VALUE: reportKeyIn
+    HID_AUDIO_REPORT_INPUT_FIRST_CCB_H,     //UUID: 2902,     VALUE: reportKeyInInCCC
+    HID_AUDIO_REPORT_INPUT_FIRST_REF_H,     //UUID: 2908      VALUE: REPORT_ID_KEYBOARD, TYPE_INPUT
+    //audio report in 2
+    HID_AUDIO_REPORT_INPUT_SECND_CD_H,      //UUID: 2803,     VALUE:              Prop: Read | Notify
+    HID_AUDIO_REPORT_INPUT_SECND_DP_H,      //UUID: 2A4D,     VALUE: reportKeyIn
+    HID_AUDIO_REPORT_INPUT_SECND_CCB_H,     //UUID: 2902,     VALUE: reportKeyInInCCC
+    HID_AUDIO_REPORT_INPUT_SECND_REF_H,     //UUID: 2908      VALUE: REPORT_ID_KEYBOARD, TYPE_INPUT
+    //audio report in 3
+    HID_AUDIO_REPORT_INPUT_THIRD_CD_H,      //UUID: 2803,     VALUE:              Prop: Read | Notify
+    HID_AUDIO_REPORT_INPUT_THIRD_DP_H,      //UUID: 2A4D,     VALUE: reportKeyIn
+    HID_AUDIO_REPORT_INPUT_THIRD_CCB_H,     //UUID: 2902,     VALUE: reportKeyInInCCC
+    HID_AUDIO_REPORT_INPUT_THIRD_REF_H,     //UUID: 2908      VALUE: REPORT_ID_KEYBOARD, TYPE_INPUT
+    #endif
+#endif
+    //// battery service ////
+    /**********************************************************************************************/
+    BATT_PS_H,                              //UUID: 2800,     VALUE: uuid 180f
+    BATT_LEVEL_INPUT_CD_H,                  //UUID: 2803,     VALUE:              Prop: Read | Notify
+    BATT_LEVEL_INPUT_DP_H,                  //UUID: 2A19      VALUE: batVal
+    BATT_LEVEL_INPUT_CCB_H,                 //UUID: 2902,     VALUE: batValCCC
+
+
+    //// Ota ////
+    /**********************************************************************************************/
+    OTA_PS_H,                               //UUID: 2800,     VALUE: telink ota service uuid
+    OTA_CMD_OUT_CD_H,                       //UUID: 2803,     VALUE:              Prop: read | write_without_rsp
+    OTA_CMD_OUT_DP_H,                       //UUID: telink ota uuid,  VALUE: otaData
+    OTA_CMD_OUT_CCC_H,
+    OTA_CMD_OUT_DESC_H,                     //UUID: 2901,     VALUE: otaName
+#endif // CFG_ATM_SDK
+
+
+#if (BLE_AUDIO_ENABLE)
+    /********************************************************************************************
+    * GOOGLE AUDIO service 9:
+    ********************************************************************************************/
+    AUDIO_GOOGLE_PS_H ,
+    AUDIO_GOOGLE_TX_CD_H,
+    AUDIO_GOOGLE_TX_DP_H ,
+    AUDIO_GOOGLE_RX_CD_H ,
+    AUDIO_GOOGLE_RX_DP_H,
+    AUDIO_GOOGLE_RX_CCC_H,
+    AUDIO_GOOGLE_CTL_CD_H,
+    AUDIO_GOOGLE_CTL_DP_H,
+    AUDIO_GOOGLE_CTL_CCC_H,
+#endif
+
+#if APP_IR_OVER_BLE
+
+    //ir
+    IR_PS_H,                                //UUID: 2800,     VALUE: telink audio service uuid
+    IR_PROG_OUT_CONTROL_CD_H,               //UUID: 2800,     VALUE: telink audio service uui
+    IR_PROG_OUT_CONTROL_H,
+    IR_KEY_ID_CD_H,
+    IR_KEY_ID_H,
+    IR_CODE_CD_H,
+    IR_CODE_H,
+    IR_SUPPRESS_CD_H,
+    IR_SUPPRESS_H,
+    IR_KEY_EVENT_CD_H,
+    IR_KEY_EVENT_H,
+    IR_KEY_EVENT_CCC_H,
+
+#endif
+
+#if FIND_ME_ENABLE
+    FMS_GOOGLE_PS_H ,
+    FMS_GOOGLE_CTL_CD_H,
+    FMS_GOOGLE_CTL_DP_H,
+    FMS_GOOGLE_DATA_CD_H ,
+    FMS_GOOGLE_DATA_DP_H,
+    FMS_GOOGLE_DATA_CCC_H,
+#endif
+
+#if (MP_TEST_MODE)
+    //// Test Mode ////
+    /**********************************************************************************************/
+    TEST_MODE_PS_H,                         //UUID: 2800,     VALUE: test mode service uuid
+    TEST_MODE_CD_H,                         //UUID: 2803,     VALUE: Prop: read | write | write_without_rsp | notify
+    TEST_MODE_DP_H,                         //UUID: test mode uuid,  VALUE: testData
+    TEST_MODE_CCB_H,                        //UUID: 2902,     VALUE: testDataCCC
+#endif
+
+
+    ATT_END_H,
+
+}ATT_HANDLE;
+
+
+#endif /* APP_ATT_H_ */
diff --git a/vendor/827x_ble_remote/app_audio.h b/vendor/827x_ble_remote/app_audio.h
new file mode 100644
index 0000000..14a9d0a
--- /dev/null
+++ b/vendor/827x_ble_remote/app_audio.h
@@ -0,0 +1,51 @@
+/******************************************************************************
+ * @file     app_audio.h
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+
+#ifndef APP_AUDIO_H_
+#define APP_AUDIO_H_
+
+#define APP_AUDIO_BT_OPEN    0x01
+#define APP_AUDIO_BT_CLOSE   0x00
+#define APP_AUDIO_BT_CONFIG  0x02
+
+extern    unsigned int         key_voice_pressTick;
+extern    unsigned char        ui_mic_enable;
+extern    unsigned char        key_voice_press;
+
+void dmic_gpio_reset (void);
+void amic_gpio_reset (void);
+void ui_enable_mic (int en);
+void voice_press_proc(void);
+void task_audio (void);
+void blc_checkConnParamUpdate(void);
+void proc_audio(void);
+int server2client_auido_proc(void* p);
+void audio_state_check(void);
+void voice_key_release(void);
+void voice_key_press(void);
+
+
+#endif /* APP_AUDIO_H_ */
diff --git a/vendor/827x_ble_remote/app_config.h b/vendor/827x_ble_remote/app_config.h
new file mode 100644
index 0000000..28d54eb
--- /dev/null
+++ b/vendor/827x_ble_remote/app_config.h
@@ -0,0 +1,484 @@
+/******************************************************************************
+ * @file     app_config.h
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *  Copyright (C) Atmosic 2022
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+
+#pragma once
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#ifndef CFG_ATM_SDK
+#include  "application/audio/audio_common.h"
+#include  "application/usbstd/usbkeycode.h"
+#endif
+
+
+
+#define APP_TEST_SECT_ADDR                    0x73000
+
+#define APP_CUSTOM_ADDR                       0x78000
+
+#define APP_WOBLE_ADV_TYPE_ADDR               0x780F8
+#define APP_PERIODIC_WAKE_UP_TIMER            0x780F9
+#define APP_EN_PERIODIC_WAKE_UP               0x780FB
+#define APP_EN_SLAVE_RPA                      0x780FC
+#define APP_EN_BLE_ADV                        0x780FD
+#define APP_EN_GOOGLE_WAKEUPPACK              0x780FE
+#define APP_EN_CACHEKEY                       0x780FF
+#define APP_AUTHENTICATION_ADDR               0x78100
+#define APP_ENCRYPTION_ADDR                   0x78200
+#define APP_ECDSA_PUBKEY_ADDR                 0x78300
+
+#define APP_NEC_IR_CODE_TABLE                 0x79000
+#define APP_DATA_UPDATE_OVER_OTA_ADDR         0x7a000
+
+#define APP_DATA_UPDATE_ADDR_OFFSET           APP_DATA_UPDATE_OVER_OTA_ADDR - APP_CUSTOM_ADDR
+
+
+#define IR_DATA_SECT_0_EXT_ADDR               0x38000
+#define IR_DATA_SECT_1_EXT_ADDR               0x39000
+#define IR_DATA_SECT_2_EXT_ADDR               0x3a000
+#define IR_DATA_SECT_3_EXT_ADDR               0x3b000
+
+#define IR_DATA_SECT_0_ADDR                   0x3c000
+#define IR_DATA_SECT_1_ADDR                   0x3d000
+#define IR_DATA_SECT_2_ADDR                   0x3e000
+#define IR_DATA_SECT_3_ADDR                   0x3f000
+
+#define IR_SECTOR_ADD_OFFSET                  IR_DATA_SECT_0_ADDR-IR_DATA_SECT_0_EXT_ADDR
+
+#define MAC_DATA_SECT_ADDR                    0x7b000
+#define WAKEUP_KEYINDEX_DATA_SECT_ADDR        0x7c000
+#define IR_KEY_EVENT_NOTIFY_SECT_ADDR         0x7d000
+#define CCC_DATA_AREA                         0x7e000
+
+
+#define IR_DATA_SECT_MAX_NUM                  12   //Each sector can be written 3 times ,4*3
+#define IR_DATA_SECT_NUM                      4
+#define IR_DATA_NEED_ERASE_NUM                6
+
+
+/////////////////// FEATURE SELECT /////////////////////////////////
+#define BLE_REMOTE_PM_ENABLE                  1
+#define PM_DEEPSLEEP_RETENTION_ENABLE         1
+#define BLE_REMOTE_SECURITY_ENABLE            1
+#ifdef CFG_ATM_SDK
+#define BLE_REMOTE_OTA_ENABLE                 0
+#else
+#define BLE_REMOTE_OTA_ENABLE                 1
+#endif
+#define REMOTE_IR_ENABLE                      1
+#define BATT_CHECK_ENABLE                     1   //must enable
+#if defined(CFG_ATM_SDK) && !defined(CFG_ATVRC_AUDIO)
+#define BLE_AUDIO_ENABLE                      0
+#define TL_AUDIO_MODE 0
+#else
+#define BLE_AUDIO_ENABLE                      1
+#endif
+#if defined(CFG_ATM_SDK) && defined(CFG_ATVRC_UNI_IR)
+#define APP_IR_OVER_BLE                       1
+#else
+#define APP_IR_OVER_BLE                       0
+#endif
+#define APP_DATA_UPDATE_OVER_BLE              1
+#define BLT_APP_LED_ENABLE                    1
+#define BLT_TEST_SOFT_TIMER_ENABLE            1
+#if defined(CFG_ATM_SDK) && !defined(CFG_ATVRC_FIND_ME)
+#define FIND_ME_ENABLE                        0
+#else
+#define FIND_ME_ENABLE                        1
+#endif
+#define DEVICE_INFO                           0
+
+#define UNUSED_GPIO_PULLDOWN_ENABLE           0
+
+//flash firmware_check
+#define FIRMWARE_CHECK_ENABLE                 0
+
+//firmware check
+#define FIRMWARES_SIGNATURE_ENABLE            0
+
+#define AUDIO_TRANS_USE_2M_PHY_ENABLE         0
+
+#define REMOTE_G10                            1
+#define REMOTE_G20                            2
+
+#if defined(CFG_ATM_SDK) && !defined(CFG_ATVRC_MP_TEST)
+#define MP_TEST_MODE                          0
+#else
+#define MP_TEST_MODE                          1
+#endif
+
+/////////////////// TEST MODE & DUT ////////////////////////////////
+#if (MP_TEST_MODE)
+#define MODE_TEST                             0xFF
+#define MODE_USER                             0x00
+
+#define DUT_INPUT_PORT                        GPIO_PB2
+#define PB2_INPUT_ENABLE                      1
+#endif
+/////////////////// DEEP SAVE FLG //////////////////////////////////
+#define USED_DEEP_ANA_REG                     DEEP_ANA_REG0 //u8,can save 8 bit info when deep
+#define LOW_BATT_FLG                          BIT(0) //if 1: low battery
+#define CONN_DEEP_FLG                         BIT(1) //if 1: conn deep, 0: adv deep
+#define IR_MODE_DEEP_FLG                      BIT(2) //if 1: IR mode, 0: BLE mode
+#define LOW_BATT_SUSPEND_FLG                  BIT(3) //if 1 : low battery, < 1.8v
+#define OTA_FLG                               BIT(4) //if 1: OTA SUCCESS
+#define POWER_ON_FLG                          BIT(5)
+
+#if (BATT_CHECK_ENABLE)
+#if 0//(__PROJECT_8278_BLE_REMOTE__)
+    //use VBAT(8278) , then adc measure this VBAT voltage
+    #define ADC_INPUT_PCHN                    VBAT    //corresponding  ADC_InputPchTypeDef in adc.h
+#else
+    //telink device: you must choose one gpio with adc function to output high level(voltage will equal to vbat), then use adc to measure high level voltage
+    //use PB7(8258) output high level, then adc measure this high level voltage
+    #define GPIO_VBAT_DETECT                  GPIO_PB7
+    #define PB7_FUNC                          AS_GPIO
+    #define PB7_INPUT_ENABLE                  0
+    #define ADC_INPUT_PCHN                    B7P    //corresponding  ADC_InputPchTypeDef in adc.h
+#endif
+#endif
+
+//#define IR_KEY_SEQUENCE_ADDR                0x71000
+
+//////////////////// LED CONFIG (RCU board)///////////////////////////
+#if (BLT_APP_LED_ENABLE)
+    #define LED_ON_LEVAL                      1             //gpio output high voltage to turn on led
+    #define GPIO_LED                          GPIO_PD6
+    #define PD6_FUNC                          AS_GPIO
+
+    #define GPIO_LED2                         GPIO_PD5
+    #define PD5_FUNC                          AS_GPIO
+    #define PD5_OUTPUT_ENABLE                 1
+    #define PD5_INPUT_ENABLE                  0
+#endif
+
+#if (BLT_TEST_SOFT_TIMER_ENABLE)
+    #define BLT_SOFTWARE_TIMER_ENABLE         1
+#endif
+
+////////////////////////// AUDIO CONFIG (RCU board) /////////////////////////////
+#if (BLE_AUDIO_ENABLE)
+    #define BLE_DMIC_ENABLE                   0  //0: Amic   1: Dmic
+    #define IIR_FILTER_ENABLE                 0
+
+    #if BLE_DMIC_ENABLE
+        #define GPIO_DMIC_BIAS                GPIO_PC4
+        #define GPIO_DMIC_DI                  GPIO_PA0
+        #define GPIO_DMIC_CK                  GPIO_PA1
+    #else
+        #define GPIO_AMIC_BIAS                GPIO_PC4// need check ,v1.0 PC4, V1.1 PC0
+        #define GPIO_AMIC_C1                  GPIO_PC1
+    #endif
+
+    /* RCU Audio MODE:
+     * TL_AUDIO_RCU_ADPCM_GATT_TLEINK
+     * TL_AUDIO_RCU_ADPCM_GATT_GOOGLE
+     * TL_AUDIO_RCU_ADPCM_HID
+     * TL_AUDIO_RCU_SBC_HID                        //need config 32k retention
+     * TL_AUDIO_RCU_ADPCM_HID_DONGLE_TO_STB
+     * TL_AUDIO_RCU_SBC_HID_DONGLE_TO_STB          //need config 32k retention
+     * TL_AUDIO_RCU_MSBC_HID                       //need config 32k retention
+     */
+#ifndef CFG_ATM_SDK
+    #define TL_AUDIO_MODE                     TL_AUDIO_RCU_ADPCM_GATT_GOOGLE
+#endif
+#endif
+
+//PB3 IRout 100K pulldown when  IR not working,  when IR begin, disable this 100K pulldown
+#define PULL_WAKEUP_SRC_PB3                   PM_PIN_PULLDOWN_100K
+
+
+
+//////////////////////////// KEYSCAN/MIC  GPIO //////////////////////////////////
+#define MATRIX_ROW_PULL                       PM_PIN_PULLUP_1M//PM_PIN_PULLDOWN_100K//PM_PIN_PULLUP_1M
+#define MATRIX_COL_PULL                       PM_PIN_PULLDOWN_100K//PM_PIN_PULLUP_10K//PM_PIN_PULLDOWN_100K
+
+#define KB_LINE_HIGH_VALID                    1   //dirve pin output 0 when keyscan, scanpin read 0 is valid
+#define DEEPBACK_FAST_KEYSCAN_ENABLE          0   //proc fast scan when deepsleep back trigged by key press, in case key loss
+#define LONG_PRESS_KEY_POWER_OPTIMIZE         1   //lower power when pressing key without release
+
+//stuck key
+#define STUCK_KEY_PROCESS_ENABLE              1
+#define STUCK_KEY_ENTERDEEP_TIME              30  //in s
+
+//repeat key
+#define KB_REPEAT_KEY_ENABLE                  0
+#define KB_REPEAT_KEY_INTERVAL_MS             200
+#define KB_REPEAT_KEY_NUM                     1
+#define KB_MAP_REPEAT                         {VK_1, }
+
+
+#define CR_VOL_UP                             0x80
+#define CR_VOL_DN                             0x81
+#define CR_PERIOD                             0x37
+
+#define CR_MEDIA_KEY_INDEX                    CR_NOTIFICATION
+
+//device layout
+#define CR_NOTIFICATION                       0xdd
+#define CR_LIVETV                             0xde
+#define CR_TELETEXT                           0xdf
+#define CR_USERPROFILE                        0xe0
+#define CR_ALLAPPS                            0xe1
+#define CR_FASTREWIND                         0xe2
+#define CR_RECORD                             0xe3
+#define CR_PLAYPAUSE                          0xe4
+#define CR_FASTFORWARD                        0xe5
+
+//G20
+#define CR_INFO                               0xe6
+#define CR_SUBTITLE                           0xe7
+#define CR_RED                                0xe8
+#define CR_GREEN                              0xe9
+#define CR_YELLOW                             0xea
+#define CR_BLUE                               0xeb
+
+//G10
+#define CR_YOUTUBE                            0xec
+#define CR_NETFLIX                            0xed
+#define CR_DISNEY                             0xee
+#define CR_HBOMAX                             0xef
+#define CR_UP                                 0xf0
+#define CR_DN                                 0xf1
+#define CR_LEFT                               0xf2
+#define CR_RIGHT                              0xf3
+#define CR_CENTER                             0xf4
+#define CR_HOME                               0xf5
+#define CR_BACK                               0xf6
+#define CR_POWER                              0xf7
+#define CR_VOL_MUTE                           0xf8
+#define CR_CHN_UP                             0xf9
+#define CR_CHN_DN                             0xfa
+#define CR_GUIDE                              0xfb
+#define CR_BOOKMARK                           0xfc
+#define CR_ASSIST                             0xfd
+#define CR_INPUT                              0xfe
+#define CR_DASHBOARD                          0xff
+
+//special key
+#define VOICE                                 0xc0
+#define KEY_MODE_SWITCH                       0xc1
+#define PHY_TEST                              0xc2
+#define VOICE_PTT                             0xc3
+#define VOICE_HTT                             0xc4
+#define VOICE_ON_REQ                          0xc5
+#define AES_TEST                              0xc6
+
+#ifndef CFG_ATM_SDK
+#define IR_VK_0                               0x0A
+#define IR_VK_1                               0x01
+#define IR_VK_2                               0x02
+#define IR_VK_3                               0x03
+#define IR_VK_4                               0x04
+#define IR_VK_5                               0x05
+#define IR_VK_6                               0x06
+#define IR_VK_7                               0x07
+#define IR_VK_8                               0x08
+#define IR_VK_9                               0x09
+
+#define IR_UP                                 0x15
+#define IR_DN                                 0x16
+#define IR_LEFT                               0x17
+#define IR_RIGHT                              0x18
+#define IR_CENTER                             0x19
+
+#define IR_POWER                              0x21
+#define IR_HOME                               0x47
+#define IR_BACK                               0x48
+#define IR_VOL_UP                             0x23
+#define IR_VOL_DN                             0x24
+#define IR_CHN_UP                             0x33
+#define IR_CHN_DN                             0x34
+#define IR_ASSIST                             0x46
+#define IR_YOUTUBE                            0x64
+#define IR_NETFLIX                            0x63
+#define IR_DISNEY                             0x67
+#define IR_HBOMAX                             0x68
+#define IR_GUIDE                              0x32
+#define IR_BOOKMARK                           0x74
+#define IR_INPUT                              0x60
+#define IR_MUTE                               0x25
+#define IR_DASHBOARD                          0x0F
+
+#define T_VK_CH_UP                            0xd0
+#define T_VK_CH_DN                            0xd1
+
+//G20
+#define IR_INFO                               0x29
+#define IR_SUBTITLE                           0x58
+#define IR_RED                                0x4b
+#define IR_GREEN                              0x4a
+#define IR_YELLOW                             0x49
+#define IR_BLUE                               0x4c
+
+//device lyaout
+#define IR_PERIOD                             0X2a
+#define IR_NOTIFICATION                       0x10
+#define IR_LIVETV                             0x61
+#define IR_TELETEXT                           0x75
+#define IR_USERPROFILE                        0x59
+#define IR_ALLAPPS                            0x57
+#define IR_FASTREWIND                         0x51
+#define IR_RECORD                             0x54
+#define IR_PLAYPAUSE                          0x52
+#define IR_FASTFORWARD                        0x53
+#endif
+
+#define KB_SCAN_PINS   {GPIO_PA1, GPIO_PA2, GPIO_PA3, GPIO_PA4, GPIO_PA5, GPIO_PA6,GPIO_PB5,GPIO_PB6}
+
+
+//drive pin as gpio
+
+#define PD2_FUNC                              AS_GPIO
+#define PD3_FUNC                              AS_GPIO
+#define PD4_FUNC                              AS_GPIO
+#define PD7_FUNC                              AS_GPIO
+#define PA0_FUNC                              AS_GPIO
+#define PD1_FUNC                              AS_GPIO
+
+
+//drive pin need 100K pulldown
+#define PULL_WAKEUP_SRC_PD2                   MATRIX_ROW_PULL
+#define PULL_WAKEUP_SRC_PD3                   MATRIX_ROW_PULL
+#define PULL_WAKEUP_SRC_PD4                   MATRIX_ROW_PULL
+#define PULL_WAKEUP_SRC_PD7                   MATRIX_ROW_PULL
+#define PULL_WAKEUP_SRC_PA0                   MATRIX_ROW_PULL
+#define PULL_WAKEUP_SRC_PD1                   MATRIX_ROW_PULL
+
+
+//drive pin open input to read gpio wakeup level
+#define PD2_INPUT_ENABLE                      1
+#define PD3_INPUT_ENABLE                      1
+#define PD4_INPUT_ENABLE                      1
+#define PD7_INPUT_ENABLE                      1
+#define PA0_INPUT_ENABLE                      1
+#define PD1_INPUT_ENABLE                      1
+
+
+//scan pin as gpio
+#define PA1_FUNC                              AS_GPIO
+#define PA2_FUNC                              AS_GPIO
+#define PA3_FUNC                              AS_GPIO
+#define PA4_FUNC                              AS_GPIO
+#define PA5_FUNC                              AS_GPIO
+#define PA6_FUNC                              AS_GPIO
+#define PB5_FUNC                              AS_GPIO
+#define PB6_FUNC                              AS_GPIO
+
+
+//scan  pin need 10K pullup
+#define PULL_WAKEUP_SRC_PA1                   MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PA2                   MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PA3                   MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PA4                   MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PA5                   MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PA6                   MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PB5                   MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PB6                   MATRIX_COL_PULL
+
+
+
+//scan pin open input to read gpio level
+#define PA1_INPUT_ENABLE                      1
+#define PA2_INPUT_ENABLE                      1
+#define PA3_INPUT_ENABLE                      1
+#define PA4_INPUT_ENABLE                      1
+#define PA5_INPUT_ENABLE                      1
+#define PA6_INPUT_ENABLE                      1
+#define PB5_INPUT_ENABLE                      1
+#define PB6_INPUT_ENABLE                      1
+
+
+
+//#define KB_MAP_NUM                            KB_MAP_NORMAL
+//#define KB_MAP_FN                             KB_MAP_NORMAL
+
+/////////////////// Clock  /////////////////////////////////
+#if !defined(CFG_ATM_SDK) && (TL_AUDIO_MODE & (TL_AUDIO_MASK_SBC_MODE | TL_AUDIO_MASK_MSBC_MODE))
+#define CLOCK_SYS_CLOCK_HZ                    32000000
+#else
+#define CLOCK_SYS_CLOCK_HZ                    16000000
+#endif
+enum{
+    CLOCK_SYS_CLOCK_1S = CLOCK_SYS_CLOCK_HZ,
+    CLOCK_SYS_CLOCK_1MS = (CLOCK_SYS_CLOCK_1S / 1000),
+    CLOCK_SYS_CLOCK_1US = (CLOCK_SYS_CLOCK_1S / 1000000),
+};
+
+#define CLOCK_32K_CLOCK_HZ                    (32000)
+enum{
+    CLOCK_32K_CLOCK_1MS   = (CLOCK_32K_CLOCK_HZ / 1000),
+    CLOCK_32K_CLOCK_1S    = CLOCK_32K_CLOCK_HZ,
+    CLOCK_32K_CLOCK_1MIN  = (CLOCK_32K_CLOCK_1S * 60),
+    CLOCK_32K_CLOCK_1HOUR = (CLOCK_32K_CLOCK_1MIN * 60),
+};
+
+
+/////////////////// watchdog  //////////////////////////////
+#define MODULE_WATCHDOG_ENABLE                0
+#define WATCHDOG_INIT_TIMEOUT                 500  //ms
+
+
+
+
+#if (MP_TEST_MODE)
+#define BLE_PHYTEST_MODE                      PHYTEST_MODE_THROUGH_2_WIRE_UART
+#else
+#define BLE_PHYTEST_MODE                      PHYTEST_MODE_DISABLE
+#endif
+
+
+#define UART_PRINT_ENABLE                     0   //uart_tx as uart print func
+#define UART_PRINT_DEBUG_ENABLE               1   //GPIO simulate uart print func
+
+#if (UART_PRINT_DEBUG_ENABLE)
+
+    //the baud rate should not bigger than 1M(system timer clock is constant 16M)
+    #define PRINT_BAUD_RATE                   1000000
+    #define DEBUG_INFO_TX_PIN                 GPIO_PB1
+    #define PULL_WAKEUP_SRC_PB1               PM_PIN_PULLUP_10K
+    #define PB1_OUTPUT_ENABLE                 1
+    #define PB1_DATA_OUT                      1 //must
+#ifndef CFG_ATM_SDK
+    #include "application/print/u_printf.h"
+#endif
+#endif
+
+
+
+#include "app_att.h"
+#ifndef CFG_ATM_SDK
+#include "../common/default_config.h"
+#endif
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
diff --git a/vendor/827x_ble_remote/app_find_me/app_fms.c b/vendor/827x_ble_remote/app_find_me/app_fms.c
new file mode 100644
index 0000000..204eb97
--- /dev/null
+++ b/vendor/827x_ble_remote/app_find_me/app_fms.c
@@ -0,0 +1,321 @@
+/******************************************************************************
+ * @file     app_fms.c
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+#ifdef CFG_ATM_SDK
+#include "refdesignrcu.h"
+#include "bridge_att.h"
+#else
+#include "tl_common.h"
+#include "drivers.h"
+#endif
+#include "../app_config.h"
+#include "stack/ble/ble.h"
+
+#include "app_fms.h"
+
+extern own_addr_type_t   app_own_address_type;
+
+/**********************************************************************
+ * LOCAL MARCO
+ */
+
+#define s_p_app_fms_ctrl     ((app_buzzer_ctrl_t *)(app_fms_buf+0x10))
+
+
+
+/**********************************************************************
+ * LOCAL TYPES
+ */
+
+typedef struct {
+    u16 count;
+    u16 adv_interval_min;
+    u16 adv_interval_max;
+
+    u8 adv_type;
+    u8 reserved;
+}app_fms_adv_timer_table_t;
+
+
+/**********************************************************************
+ * GLOBAL VARIABLES
+ */
+
+_attribute_data_retention_ u8 g_p_app_fms_ctrl_val[2] = {0};
+
+//const app_fms_ctrl_t g_app_fms_ctrl = {
+//    en_periodic_wakeup:0,
+//    reserved:0,
+//    periodic_wakeup_interval:0,
+//};
+
+/**********************************************************************
+ * LOCAL VARIABLES
+ */
+
+_attribute_data_retention_ static app_fms_mode_callback_t s_fms_mode_cb = app_imc_alert_cb;
+//
+//_attribute_data_retention_ u8 s_fms_adv_table_index = 0;
+//_attribute_data_retention_ u16 s_fms_adv_count = 0;
+
+#ifndef CFG_ATM_SDK
+const app_fms_adv_timer_table_t app_fms_adv_timer_table[] = {
+/*  count adv_interval_min    adv_interval_max    adv_type                                reserved  */
+    {15,  ADV_INTERVAL_20MS,  ADV_INTERVAL_25MS,  ADV_TYPE_CONNECTABLE_DIRECTED_LOW_DUTY, 0},
+    {45,  ADV_INTERVAL_100MS, ADV_INTERVAL_150MS, ADV_TYPE_CONNECTABLE_DIRECTED_LOW_DUTY, 0},
+    {120, ADV_INTERVAL_1S,    ADV_INTERVAL_1S5,   ADV_TYPE_CONNECTABLE_DIRECTED_LOW_DUTY, 0},
+};
+#endif
+
+
+
+/**********************************************************************
+ * LOCAL FUNCTIONS
+ */
+
+void app_fms_buffer_init(void){
+//    memcpy((u8 *)g_p_app_fms_ctrl, &g_app_fms_ctrl, sizeof(app_fms_ctrl_t));
+//    memset((u8 *)g_p_app_fms_ctrl_val, 0x00 ,2);
+
+    memset((u8 *)g_p_app_fms_ctrl, 0x00, sizeof(app_fms_ctrl_t));
+    memset((u8 *)g_p_app_fms_data_val, 0x00 ,2);
+
+    s_p_app_fms_flag_adv[0] = 0;
+    s_p_app_fms_adv_table_index[0] = 0;
+    s_p_app_fms_adv_count[0] = 0;
+#ifndef CFG_ATM_SDK
+    app_buzzer_buffer_init();
+#endif
+}
+
+void app_fms_set_mode(APP_FMS_MODE_T mode, app_fms_mode_callback_t fms_cb){
+
+    g_p_app_fms_ctrl_val[0] = U16_HI(mode);
+    g_p_app_fms_ctrl_val[1] = U16_LO(mode);
+    s_fms_mode_cb = fms_cb;
+}
+
+void app_fms_notify_error_code(APP_FMS_ERROR_CODE_T error_code){
+
+    u8 my_error_code[] = {  U16_HI(APP_FMS_NOTIFY_DATA_TYPE_ERROR_CODE),
+                            U16_LO(APP_FMS_NOTIFY_DATA_TYPE_ERROR_CODE),
+                            U16_HI(error_code),
+                            U16_LO(error_code),};
+
+    bls_att_pushNotifyData(FMS_GOOGLE_DATA_DP_H, my_error_code, sizeof(my_error_code));
+
+}
+
+void app_fms_notify_data_type(APP_FMS_NOTIFY_DATA_TYPE_T data_type, APP_FMS_ERROR_CODE_T error_code){
+    u8 my_error_code[] = {  U16_HI(data_type),
+                            U16_LO(data_type),
+                            U16_HI(error_code),
+                            U16_LO(error_code),};
+
+    bls_att_pushNotifyData(FMS_GOOGLE_DATA_DP_H, my_error_code, sizeof(my_error_code));
+}
+
+
+void app_fms_init(void){
+    if(g_p_app_fms_ctrl->en_periodic_wakeup){
+        app_fms_set_mode(APP_FMS_MODE_ALERT, app_imc_alert_cb);
+    }else{
+        app_fms_set_mode(APP_FMS_MODE_ALL_DISABLE, NULL);
+    }
+}
+
+
+
+int app_fms_att_ctl_cb(void * p){
+    rf_packet_att_data_t *pw = (rf_packet_att_data_t *)p;
+
+    u16 len = pw->l2cap-3;//pw->rf_len-7;
+    array_printf(pw->dat,len);
+
+    u16 my_fms_mode = (pw->dat[0]<<8) | (pw->dat[1]);
+
+    switch (my_fms_mode) {
+        case APP_FMS_MODE_ALL_DISABLE:
+            app_fms_set_mode(APP_FMS_MODE_ALL_DISABLE, NULL);
+
+            break;
+        case APP_FMS_MODE_ALERT:
+            printf(" APP_FMS_MODE_ALERT en_periodic_wakeup: 0x%x \n", g_p_app_fms_ctrl->en_periodic_wakeup);
+            if(g_p_app_fms_ctrl->en_periodic_wakeup){
+                app_fms_set_mode(APP_FMS_MODE_ALERT, app_imc_alert_cb);
+            }else{
+                app_fms_notify_data_type(APP_FMS_NOTIFY_DATA_TYPE_ERROR_CODE, APP_FMS_ERROR_CODE_ALERT_MODE_NOT_SUPPORTED);
+            }
+            break;
+        default:
+            app_fms_set_mode(APP_FMS_MODE_ALL_DISABLE, NULL);
+            break;
+    }
+    return 0;
+}
+
+int app_fms_att_data_cb(void * p){
+    rf_packet_att_data_t *pw = (rf_packet_att_data_t *)p;
+
+    u16 len = pw->l2cap-3;//pw->rf_len-7;
+    array_printf(pw->dat,len);
+
+    if(!s_fms_mode_cb){
+        app_fms_notify_data_type(APP_FMS_NOTIFY_DATA_TYPE_ERROR_CODE, APP_FMS_ERROR_CODE_ALL_MODES_DISABLED);
+    }else{
+        s_fms_mode_cb(pw->dat, len);
+    }
+
+    return 0;
+}
+
+
+
+
+#ifndef CFG_ATM_SDK
+void app_fms_adv_settings(u8 interval_min, u8 interval_max){
+
+    u8 bond_number = blc_smp_param_getCurrentBondingDeviceNumber();  //get bonded device number
+    bls_ll_setAdvEnable(0);  // ADV disable
+
+    if(bond_number){
+
+        smp_param_save_t  bondInfo;
+        bls_smp_param_loadByIndex( bond_number - 1, &bondInfo);  //get the latest bonding device (index: bond_number-1 )
+        ll_resolvingList_add(bondInfo.peer_id_adrType,bondInfo.peer_id_addr,bondInfo.peer_irk,bondInfo.local_irk);
+        ll_whiteList_reset();
+
+        u8 status = 0;
+
+        // TODO check setting host address
+        if (memcmp(bondInfo.peer_id_addr, bondInfo.peer_addr, 6) == 0){
+            status = bls_ll_setAdvParam(interval_min, interval_max,
+                                        ADV_TYPE_CONNECTABLE_DIRECTED_LOW_DUTY, OWN_ADDRESS_PUBLIC,
+                                        bondInfo.peer_addr_type,  bondInfo.peer_addr,
+                                        BLT_ENABLE_ADV_ALL,
+                                        ADV_FP_NONE);
+        }else{
+            ll_resolvingList_reset();
+            status = ll_resolvingList_add(bondInfo.peer_id_adrType, bondInfo.peer_id_addr, bondInfo.peer_irk, bondInfo.local_irk);
+            status = ll_resolvingList_setAddrResolutionEnable(1);
+
+            extern u8 en_slave_rpa;
+            if(en_slave_rpa) {
+                app_own_address_type = OWN_ADDRESS_RESOLVE_PRIVATE_PUBLIC;
+            }else{
+                app_own_address_type = OWN_ADDRESS_PUBLIC;
+            }
+
+            status = bls_ll_setAdvParam(interval_min, interval_max,
+                                        ADV_TYPE_CONNECTABLE_DIRECTED_LOW_DUTY, app_own_address_type,
+                                        bondInfo.peer_id_adrType,  bondInfo.peer_id_addr,
+                                        BLT_ENABLE_ADV_ALL,
+                                        ADV_FP_NONE);
+        }
+
+        if(status != BLE_SUCCESS) {      while(1); }  //debug: adv setting err
+
+        bls_ll_setAdvEnable(1);  //adv enable
+        s_p_app_fms_flag_adv[0] = 1;
+    }
+}
+
+
+
+int app_fms_adv_timer(void){
+
+    if(!s_p_app_fms_flag_adv[0]){
+        printf("[NOTICE] FMS ADV flag is disabled !!! \n");
+        return -1;
+    }
+
+    s_p_app_fms_adv_count[0]++;
+
+//    printf("%s count: %d  s_fms_adv_count: %d \n",__FUNCTION__, s_fms_adv_count, my_table_cnt);
+
+    if(s_p_app_fms_adv_count[0] >= app_fms_adv_timer_table[s_p_app_fms_adv_table_index[0]].count){
+        s_p_app_fms_adv_table_index[0]++;
+
+        u8 my_table_cnt = sizeof(app_fms_adv_timer_table)/sizeof(app_fms_adv_timer_table_t);
+        if(s_p_app_fms_adv_table_index[0] >= my_table_cnt ){
+            bls_ll_setAdvEnable(0);
+            printf(" End fms direct adv \n");
+            s_p_app_fms_flag_adv[0] = 0;
+            return -1;
+        }
+
+        printf("FMS ADV parameter table_index: %d adv_interval_IDX MIN: %d  MAX: %d \n",
+                                s_p_app_fms_adv_table_index[0],
+                                app_fms_adv_timer_table[s_p_app_fms_adv_table_index[0]].adv_interval_min,
+                                app_fms_adv_timer_table[s_p_app_fms_adv_table_index[0]].adv_interval_max);
+
+        app_fms_adv_settings(   app_fms_adv_timer_table[s_p_app_fms_adv_table_index[0]].adv_interval_min,
+                                app_fms_adv_timer_table[s_p_app_fms_adv_table_index[0]].adv_interval_max);
+    }
+    return 0;
+}
+
+void app_fms_try_connect(void){
+
+    printf("%s \n", __FUNCTION__ );
+
+    s_p_app_fms_adv_count[0] = 0;
+    s_p_app_fms_adv_table_index[0] = 0;
+
+    printf("FMS ADV parameter table_index: %d adv_interval_IDX MIN: %d  MAX: %d \n",
+                            s_p_app_fms_adv_table_index[0],
+                            app_fms_adv_timer_table[s_p_app_fms_adv_table_index[0]].adv_interval_min,
+                            app_fms_adv_timer_table[s_p_app_fms_adv_table_index[0]].adv_interval_max);
+
+    app_fms_adv_settings(   app_fms_adv_timer_table[s_p_app_fms_adv_table_index[0]].adv_interval_min,
+                            app_fms_adv_timer_table[s_p_app_fms_adv_table_index[0]].adv_interval_max);
+    blt_soft_timer_add(app_fms_adv_timer, 1000000);
+
+}
+
+void app_fms_delete_adv_task(void){
+    s_p_app_fms_flag_adv[0] = 0;
+}
+
+
+void app_fms_periodic_wake_up(void){
+    /* FMS periodic wake up disabled */
+
+    if(!g_p_app_fms_ctrl->en_periodic_wakeup) return;
+
+    /* periodic wakeup interval out of range */
+    if(g_p_app_fms_ctrl->periodic_wakeup_interval <5 || g_p_app_fms_ctrl->periodic_wakeup_interval > 1440) return;
+
+    u8 bond_number = blc_smp_param_getCurrentBondingDeviceNumber();  //get bonded device number
+
+    if(bond_number){
+        printf("[NOTICE] FMS periodic wake up time: %d min \n", g_p_app_fms_ctrl->periodic_wakeup_interval);
+
+//        analog_write(USED_DEEP_ANA_REG, analog_read(USED_DEEP_ANA_REG) | (PERIODIC_WAKE_UP));
+        cpu_long_sleep_wakeup_32k_rc(DEEPSLEEP_MODE,PM_WAKEUP_TIMER|PM_WAKEUP_PAD,g_p_app_fms_ctrl->periodic_wakeup_interval*CLOCK_32K_CLOCK_1MIN);
+//        cpu_long_sleep_wakeup_32k_rc(DEEPSLEEP_MODE,PM_WAKEUP_TIMER|PM_WAKEUP_PAD,g_p_app_fms_ctrl->periodic_wakeup_interval*CLOCK_32K_CLOCK_1S);   // for testing
+    }
+}
+#endif
diff --git a/vendor/827x_ble_remote/app_find_me/app_fms.h b/vendor/827x_ble_remote/app_find_me/app_fms.h
new file mode 100644
index 0000000..ac11895
--- /dev/null
+++ b/vendor/827x_ble_remote/app_find_me/app_fms.h
@@ -0,0 +1,76 @@
+/******************************************************************************
+ * @file     app_fms.h
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+
+#ifndef APP_FMS_H_
+#define APP_FMS_H_
+
+#include "app_fms_define.h"
+#include "app_imc.h"
+#include "app_buzzer.h"
+#ifndef CFG_ATM_SDK
+#include "stack/ble/ble.h"
+#endif
+
+
+/**********************************************************************
+ * LOCAL MARCO
+ */
+
+#ifdef CFG_ATM_SDK
+#include "bridge_fms.h"
+extern uint8_t atm_fms_buf[ATM_FMS_BUF_SIZE];
+#define app_fms_buf atm_fms_buf
+#else
+#define reserve_buf4                    (u8 *)((u32)phy_test_2_wire_rx_from_uart + 3 + 0x840000)    // 0x3c
+#define app_fms_buf                     (reserve_buf4)
+#endif
+
+//#define g_p_app_fms_ctrl_val          ((volatile u8 *)(app_fms_buf+0x20))
+#define g_p_app_fms_data_val            ((volatile u8 *)(app_fms_buf+0x22))
+#define g_p_app_fms_ctrl                ((volatile app_fms_ctrl_t *)(app_fms_buf+0x24))
+//#define s_p_app_fms_mode_cb           ((app_fms_mode_callback_t)(app_fms_buf+0x18))
+#define s_p_app_fms_flag_adv            ((volatile u8 *)(app_fms_buf+0x2c))
+#define s_p_app_fms_adv_table_index     ((volatile u8 *)(app_fms_buf+0x2d))
+#define s_p_app_fms_adv_count           ((volatile u16 *)(app_fms_buf+0x2e))
+
+
+extern u8 g_p_app_fms_ctrl_val[2];
+
+
+int app_fms_att_ctl_cb(void * p);
+int app_fms_att_data_cb(void * p);
+
+
+void app_fms_buffer_init(void);
+void app_fms_init(void);
+
+void app_fms_notify_data_type(APP_FMS_NOTIFY_DATA_TYPE_T data_type, APP_FMS_ERROR_CODE_T error_code);
+
+void app_fms_try_connect(void);
+void app_fms_delete_adv_task(void);
+void app_fms_periodic_wake_up(void);
+
+#endif /* APP_FMS_H_ */
diff --git a/vendor/827x_ble_remote/app_find_me/app_fms_define.h b/vendor/827x_ble_remote/app_find_me/app_fms_define.h
new file mode 100644
index 0000000..86a32c7
--- /dev/null
+++ b/vendor/827x_ble_remote/app_find_me/app_fms_define.h
@@ -0,0 +1,78 @@
+/******************************************************************************
+ * @file     app_fms_define.h
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+
+#ifndef APP_FMS_DEFINE_H_
+#define APP_FMS_DEFINE_H_
+
+typedef enum{
+    APP_FMS_MODE_ALL_DISABLE                        = 0,
+    APP_FMS_MODE_ALERT                              = 0xE100,
+
+}APP_FMS_MODE_T;
+
+typedef enum{
+    APP_FMS_ALERT_CMD_STOP                          = 0,
+    APP_FMS_ALERT_CMD_LVL_LOW                       = 0xE101,
+    APP_FMS_ALERT_CMD_LVL_MEDIUM                    = 0xE102,
+    APP_FMS_ALERT_CMD_LVL_HIGH                      = 0xE103,
+
+}APP_FMS_ALERT_CMD_T;
+
+
+typedef enum{
+    APP_FMS_ALERT_STATUS_STOP                       = 0,
+    APP_FMS_ALERT_STATUS_LVL_LOW                    = 0xE181,
+    APP_FMS_ALERT_STATUS_LVL_MEDIUM                 = 0xE182,
+    APP_FMS_ALERT_STATUS_LVL_HIGH                   = 0xE183,
+
+}APP_FMS_ALERT_STATUS_T;
+
+typedef enum{
+    APP_FMS_NOTIFY_DATA_TYPE_ALERT_STATUS           = 0xE180,
+
+    APP_FMS_NOTIFY_DATA_TYPE_ERROR_CODE             = 0x0F00,
+
+}APP_FMS_NOTIFY_DATA_TYPE_T;
+
+
+
+typedef enum{
+    APP_FMS_ERROR_CODE_NO_ERROR = 0,
+    APP_FMS_ERROR_CODE_ALL_MODES_DISABLED           = 0x0F01,
+    APP_FMS_ERROR_CODE_UNKNOWN_CMD                  = 0x0F02,
+    APP_FMS_ERROR_CODE_ALERT_MODE_NOT_SUPPORTED     = 0x0F03,
+
+}APP_FMS_ERROR_CODE_T;
+
+typedef int (*app_fms_mode_callback_t)(u8 *buf, u8 len);
+
+typedef struct {
+    u8 en_periodic_wakeup;
+    u8 reserved;
+    u16 periodic_wakeup_interval;
+}app_fms_ctrl_t;
+
+#endif /* APP_FMS_DEFINE_H_ */
diff --git a/vendor/827x_ble_remote/app_find_me/app_imc.c b/vendor/827x_ble_remote/app_find_me/app_imc.c
new file mode 100644
index 0000000..11076a5
--- /dev/null
+++ b/vendor/827x_ble_remote/app_find_me/app_imc.c
@@ -0,0 +1,119 @@
+/******************************************************************************
+ * @file     app_imc.c
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+#ifdef CFG_ATM_SDK
+#include "refdesignrcu.h"
+#include "bridge_fms.h"
+#else
+#include "tl_common.h"
+#include "drivers.h"
+#endif
+#include "../app_config.h"
+#include "stack/ble/ble.h"
+
+#include "app_fms.h"
+
+
+
+#if FIND_ME_ENABLE
+extern u8  device_in_connection_state;
+
+/**********************************************************************
+ * LOCAL MARCO
+ */
+
+/**********************************************************************
+ * LOCAL TYPES
+ */
+
+/**********************************************************************
+ * GLOBAL VARIABLES
+ */
+
+/**********************************************************************
+ * LOCAL VARIABLES
+ */
+
+
+
+/**********************************************************************
+ * LOCAL FUNCTIONS
+ */
+
+
+void app_imc_start_alert(APP_FMS_ALERT_CMD_T alert_cmd){
+
+    switch (alert_cmd) {
+        case APP_FMS_ALERT_CMD_LVL_LOW:
+            printf("APP_FMS_ALERT_CMD_LVL_LOW \n");
+            app_buzzer_play(APP_BUZZER_STATUS_FIND_ME,BUZZER_VOLUME_LOW);
+            app_fms_notify_data_type(APP_FMS_NOTIFY_DATA_TYPE_ALERT_STATUS, APP_FMS_ALERT_STATUS_LVL_LOW);
+            break;
+        case APP_FMS_ALERT_CMD_LVL_MEDIUM:
+            printf("APP_FMS_ALERT_CMD_LVL_MEDIUM \n");
+            app_buzzer_play(APP_BUZZER_STATUS_FIND_ME,BUZZER_VOLUME_MEDIUM);
+            app_fms_notify_data_type(APP_FMS_NOTIFY_DATA_TYPE_ALERT_STATUS, APP_FMS_ALERT_STATUS_LVL_MEDIUM);
+            break;
+        case APP_FMS_ALERT_CMD_LVL_HIGH:
+            printf("APP_FMS_ALERT_CMD_LVL_HIGH \n");
+            app_buzzer_play(APP_BUZZER_STATUS_FIND_ME,BUZZER_VOLUME_HIGH);
+            app_fms_notify_data_type(APP_FMS_NOTIFY_DATA_TYPE_ALERT_STATUS, APP_FMS_ALERT_STATUS_LVL_HIGH);
+            break;
+        default:
+            break;
+    }
+}
+
+void app_imc_stop_alert(void){
+    app_fms_notify_data_type(APP_FMS_NOTIFY_DATA_TYPE_ALERT_STATUS, APP_FMS_ALERT_STATUS_STOP);
+    app_buzzer_stop();
+}
+
+
+int app_imc_alert_cb(u8 *buf, u8 len){
+
+    u16 my_alert_cmd = (buf[0]<<8) | (buf[1]);
+
+    switch (my_alert_cmd) {
+        case APP_FMS_ALERT_CMD_STOP:
+            printf("APP_FMS_ALERT_STOP \n");
+            app_imc_stop_alert();
+            break;
+        case APP_FMS_ALERT_CMD_LVL_LOW:
+        case APP_FMS_ALERT_CMD_LVL_MEDIUM:
+        case APP_FMS_ALERT_CMD_LVL_HIGH:
+            app_imc_start_alert(my_alert_cmd);
+            break;
+        default:
+        {
+            app_fms_notify_data_type(APP_FMS_NOTIFY_DATA_TYPE_ERROR_CODE, APP_FMS_ERROR_CODE_UNKNOWN_CMD);
+        }
+            break;
+    }
+    return 0;
+}
+
+
+#endif /* FIND_ME_ENABLE */
diff --git a/vendor/827x_ble_remote/app_find_me/app_imc.h b/vendor/827x_ble_remote/app_find_me/app_imc.h
new file mode 100644
index 0000000..a271f86
--- /dev/null
+++ b/vendor/827x_ble_remote/app_find_me/app_imc.h
@@ -0,0 +1,33 @@
+/******************************************************************************
+ * @file     app_imc.h
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+
+#ifndef APP_IMC_H_
+#define APP_IMC_H_
+
+int app_imc_alert_cb(u8 *buf, u8 len);
+void app_imc_stop_alert(void);
+
+#endif /* APP_IMC_H_ */
diff --git a/vendor/827x_ble_remote/app_ir.c b/vendor/827x_ble_remote/app_ir.c
new file mode 100644
index 0000000..3f5f8d1
--- /dev/null
+++ b/vendor/827x_ble_remote/app_ir.c
@@ -0,0 +1,1795 @@
+/******************************************************************************
+ * @file     app_ir.c
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *  Copyright (C) Atmosic 2022-2023
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+
+#ifdef CFG_ATM_SDK
+#include "refdesignrcu.h"
+#include "app_att.h"
+#include "app_ir.h"
+#include "bridge_att.h"
+#include "bridge_ir.h"
+#include "timer.h"
+#include "../common/blt_soft_timer.h"
+#else
+#include "tl_common.h"
+#include "drivers.h"
+#include "../common/blt_soft_timer.h"
+#include "app_ir.h"
+#include "rc_ir.h"
+#include "app_ir.h"
+#include "app_flash_write.h"
+#include "app_ui.h"
+#include "app_custom.h"
+#include "../../stack/ble/host/attr/att.h"
+#endif
+
+#if APP_IR_OVER_BLE
+
+extern void google_reset_rsp_delay(void);
+extern u8 is_mic_enable(void);
+
+//programming timeout 30s
+#define PROGRAMMING_TIMEOUT 30000000
+
+//Regularly query whether the current time can be erased
+#define FLASH_ERASE_TIMEOUT 100000
+
+#define INVALID_KEY_ID      0xFF00
+#define MAX_CODE_LENGTH     300            /*  The maximum number of ir codes for each key. */
+#define MAX_KEY_COUNT       5              /*  The maximum number of key for ir programming.*/
+
+#define KEY_IDX_NULL        0xff
+
+typedef struct{
+    u16 key_id;                    //Key ID, comes from ATV (host keyid)
+    u16 code_size;
+    u8  button_idx;                //button index, based on enum in firmware
+    u8  code[MAX_CODE_LENGTH];
+}key_code_t;
+
+typedef struct{
+    u32 release_timer;
+    u32 repeat_delay;
+}ir_repeat_delay_t;
+
+typedef struct {
+    u8 programming_start;
+    u8 programmed_key_count;
+    u8 key_notification_flag;
+    u16 current_programming_key_id;
+}ir_programming_key_t;
+
+typedef struct {
+    u16 ir_code_pos;
+    u16 ir_keycode_total_len;
+    u8 ir_current_button;
+}ir_keycode_merge_t;
+
+typedef struct {
+    u8  ir_save_en;
+    u8  ir_save_button;
+    u16 ir_save_pos;
+}ir_save_t;
+
+
+typedef struct {
+    u8  duty_cycle;
+    u16 carrier_frequency;
+    u8  current_programming_key_send;
+    u8  odd_or_even_press;
+    u8  is_key_programming;
+    u8  programming_timer;
+    u8  ir_suppress[MAX_KEY_COUNT];
+    ir_repeat_delay_t ir_repeat_delay;
+    ir_programming_key_t ir_programming;
+    ir_keycode_merge_t   ir_merge;
+    ir_save_t ir_save;
+}ir_app_parm_t;
+
+typedef struct {
+    u16 key_id;
+    u8  button_idx;
+    u8  button;
+}key_button_pair_t;
+
+typedef enum
+{
+    APP_NEC_IR_TABLE_PREPARE=1,
+    APP_NEC_IR_TABLE_PREPARE_END,
+    APP_NEC_IR_TABLE_START,
+    APP_NEC_IR_TABLE_WRITEFAIL,
+    APP_NEC_IR_TABLE_END
+}app_nec_ir_table_sts;
+
+_attribute_data_retention_ app_nec_ir_table_sts nec_ir_table_start = APP_NEC_IR_TABLE_END;
+
+//keyid: receive from the host. button_idx: Corresponding to the key index in the memory ir_table[].button:The actual keyid corresponding to the board
+const key_button_pair_t key_button_map_g10[MAX_KEY_COUNT] = {
+    {0x0018, KEY_IDX_VOLUP, 0x10},
+    {0x0019, KEY_IDX_VOLDN, 0x02},
+    {0x00A4, KEY_IDX_MUTE, 0x16},
+    {0x001A, KEY_IDX_POWER, 0 },
+    {0x00B2, KEY_IDX_INPUT, 0x03}
+};
+
+//keyid: receive from the host. button_idx: Corresponding to the key index in the memory ir_table[].button:The actual keyid corresponding to the board
+const key_button_pair_t key_button_map_g20[MAX_KEY_COUNT] = {
+    {0x0018, KEY_IDX_VOLUP, 0x1f},
+    {0x0019, KEY_IDX_VOLDN, 0x02},
+    {0x00A4, KEY_IDX_MUTE,  0x2B},
+    {0x001A, KEY_IDX_POWER, 0 },
+    {0x00B2, KEY_IDX_INPUT, 0x06}
+};
+
+//The following address corresponds to the flash memory address written each time. Upto 5 keys can be written at a time, and each key occupies a maximum of 256 bytes.
+const u32 if_flash_sect_addr[IR_DATA_SECT_MAX_NUM] ={IR_DATA_SECT_0_ADDR+256,IR_DATA_SECT_0_ADDR+1536,IR_DATA_SECT_0_ADDR+2816,IR_DATA_SECT_1_ADDR+256,IR_DATA_SECT_1_ADDR+1536,IR_DATA_SECT_1_ADDR+2816, \
+                                                 IR_DATA_SECT_2_ADDR+256,IR_DATA_SECT_2_ADDR+1536,IR_DATA_SECT_2_ADDR+2816,IR_DATA_SECT_3_ADDR+256,IR_DATA_SECT_3_ADDR+1536,IR_DATA_SECT_3_ADDR+2816};
+
+
+static _attribute_data_retention_ ir_app_parm_t  ir_app_parm={0};
+
+static _attribute_data_retention_ key_code_t ir_table[MAX_KEY_COUNT]={{0},{0},{0},{0},{0}};
+extern u32    ir_flash_erase_tick;
+
+
+/*
+    "ir_flash_index" is used to record the current ir code programming times.(The maximum value of
+    "ir_flash_index" is 12,when the value of "ir_flash_index" is 6,the erase operation must be performed.)
+*/
+_attribute_data_retention_ u8 ir_flash_index=0;
+
+/*
+    ir_flash_need_erase_sector:0 -> erase the IR_DATA_SECT_0_ADDR,IR_DATA_SECT_1_ADDR sector
+    ir_flash_need_erase_sector:2 -> erase the IR_DATA_SECT_2_ADDR,IR_DATA_SECT_3_ADDR sector
+
+*/
+_attribute_data_retention_ u8 ir_flash_need_erase_sector=0;
+_attribute_data_retention_ u8 ir_flash_erase_sector_step=0;
+
+_attribute_data_retention_ u8 ir_flash_erase_flag=0;
+_attribute_data_retention_ u8 ir_save_error_flag=0;
+
+
+extern _attribute_data_retention_    u8 device_in_connection_state;
+extern int     blt_soft_timer_delete(blt_timer_callback_t func);
+extern int bls_ll_requestConnBrxEventDisable(void);
+extern void  bls_ll_disableConnBrxEvent(void);
+extern void  bls_ll_restoreConnBrxEvent(void);
+
+#if(BLT_TEST_SOFT_TIMER_ENABLE == 0)
+int blt_soft_timer_add(blt_timer_callback_t func, u32 interval_us)
+{
+}
+
+int     blt_soft_timer_delete(blt_timer_callback_t func)
+{
+}
+
+#endif
+
+_attribute_data_retention_ app_ir_programming_end_Cb_t    app_ir_programming_end_Cb = NULL;
+
+/**
+ * @brief       This function servers to register the callback at the end of ir programming
+ * @param[in]   Callback function that needs to be registered
+ * @return      none
+ */
+void app_ir_programming_end_register(app_ir_programming_end_Cb_t cb)
+{
+    app_ir_programming_end_Cb = cb;
+}
+
+/**
+ * @brief       This function set the programming flag
+ * @param[in]   flag the progtamming key. 0x55:current key is a programming key 0:current key not is a propramming key
+ * @return      none
+ */
+void programming_key_set(u8 data)
+{
+    ir_app_parm.is_key_programming = data;
+}
+
+/**
+ * @brief       This function is used to determine whether the current key is a programming key
+ * @param[in]   none
+ * @return      1: programming key
+ *              0: not a programming key
+ */
+u8 is_programming_key_send(void)
+{
+    if(ir_app_parm.is_key_programming == 0x55)
+        return 1;
+    else
+        return 0;
+}
+
+/**
+ * @brief       This function is used to get the corresponding button index by board keyid
+ * @param[in]   button: keyid on the board
+ * @return      index 0-4
+ */
+u8 ir_get_button_idx_from_button(u8 button)
+{
+    u8 i;
+    for(i = 0; i < MAX_KEY_COUNT; i++)
+    {
+        if(app_custom_get_device_type() == REMOTE_G10)
+        {
+            if (key_button_map_g10[i].button == button)
+            {
+                return key_button_map_g10[i].button_idx;
+            }
+        }
+        else
+        {
+            if (key_button_map_g20[i].button == button)
+            {
+                return key_button_map_g20[i].button_idx;
+            }
+        }
+    }
+    return KEY_IDX_NULL;
+}
+
+/**
+ * @brief       This function is used to get the corresponding button index by host keyid
+ * @param[in]   button: keyid issued by host
+ * @return      index 0-4
+ */
+u8 ir_get_button_idx_from_key_id(u16 key_id)
+{
+    u8 i;
+    for(i = 0; i < MAX_KEY_COUNT; i++)
+    {
+        if(app_custom_get_device_type() == REMOTE_G10)
+        {
+            if (key_button_map_g10[i].key_id == key_id)
+            {
+                return key_button_map_g10[i].button_idx;
+            }
+        }
+        else
+        {
+            if (key_button_map_g20[i].key_id == key_id)
+            {
+                return key_button_map_g20[i].button_idx;
+            }
+        }
+    }
+    return KEY_IDX_NULL;
+}
+
+/**
+ * @brief       This function is used to get the corresponding ir data by board keyid
+ * @param[in]   key_idx: keyid on the board
+ * @return      ir data
+ */
+key_code_t* ir_get_key_code_from_keyid_idx(u8 key_idx)
+{
+    u8 i;
+    if(key_idx == 0) //powerkey
+    {
+        if(ir_table[KEY_IDX_POWER].button_idx == KEY_IDX_POWER)
+        {
+            ir_app_parm.current_programming_key_send = KEY_IDX_POWER;
+            return &ir_table[KEY_IDX_POWER];
+        }
+    }
+    else
+    {
+        for(i = 0; i < MAX_KEY_COUNT; i++)
+        {
+            if(ir_table[i].key_id == key_idx)
+            {
+                if(ir_table[i].button_idx == i)
+                {
+                    ir_app_parm.current_programming_key_send = i;
+                    return &ir_table[i];
+                }
+            }
+        }
+    }
+    return NULL;
+}
+
+/**
+ * @brief       This function is used to get the corresponding button index by board keyid
+ * @param[in]   key_idx: keyid on the board
+ * @return      button index
+ */
+u8 ir_get_suppress_index_from_keyid_idx(u8 key_idx)
+{
+    u8 i;
+    //printf("ir_app_parm.ir_programming.programmed_key_count=%x\r\n",ir_app_parm.ir_programming.programmed_key_count);
+    if(key_idx == 0) //powerkey
+    {
+        if(ir_table[KEY_IDX_POWER].button_idx == KEY_IDX_POWER)
+        {
+            //printf("ir power key\r\n");
+            return KEY_IDX_POWER;
+        }
+    }
+    else
+    {
+        for(i = 0; i < MAX_KEY_COUNT; i++)
+        {
+            if(ir_table[i].key_id == key_idx)
+            {
+                if(ir_table[i].button_idx == i)
+                {
+                    //printf("button index i=%x\r\n",i);
+                    return i;
+                }
+            }
+        }
+    }
+    return KEY_IDX_NULL;
+}
+
+/**
+ * @brief       This function is init the ir buffer
+ * @param[in]   none
+ * @return      none
+ */
+void ir_table_init(void)
+{
+    u8 i;
+    memset(ir_table, 0, sizeof(key_code_t) * MAX_KEY_COUNT);
+    for (i = 0; i < MAX_KEY_COUNT; i++)
+    {
+        ir_table[i].key_id = INVALID_KEY_ID;
+    }
+    ir_app_parm.ir_save.ir_save_en = 0;
+    ir_app_parm.ir_save.ir_save_pos = 0;
+    ir_app_parm.ir_save.ir_save_button = 0xff;
+    ir_app_parm.programming_timer = NULL;
+    ir_app_parm.ir_programming.programmed_key_count = 0;
+    ir_app_parm.ir_programming.current_programming_key_id = INVALID_KEY_ID;
+    ir_app_parm.ir_merge.ir_current_button = MAX_KEY_COUNT;
+}
+
+
+/*
+1)A total of 6 flash sectors are used to store ir code. Each sector can store ir code
+  programming three times. Each ir code programming occupies 5*256 bytes. 5 means that
+  each programming supports up to 5 keys, 256 Indicates the maximum number of ir codes
+  for each key.
+2)The first 6 bytes of each sector are used to check whether the ir code programming
+  data is valid for 3 times. If the value is 0xa5,0xxx, the ir code programming data for
+  this time is valid. If the value is 0x00,0xxx this time The data is invalid
+  (0xxx is a reserved byte, to be expanded).
+3)The api "ir_flash_set_flag" is used for set the ir code data to invalid. The variable
+  "ir_flash_index" is used to record the current ir code programming times.(The maximum value of
+  "ir_flash_index" is 12,when the value of "ir_flash_index" is 6,the erase operation must be performed.)
+4)Use 16 bytes as a unit for flash write operation.
+*/
+
+#define APP_IR_DATA_HEAD          0xa5
+#define APP_IR_DATA_HEAD_INVALID  0x0
+
+/**
+ * @brief       Write a flag to indicate that the ir data is invalid
+ * @param[in]   0:indicate the ir data is invalid 1:indicate the ir data is valid
+ * @return      none
+ */
+void ir_flash_set_flag(u8 flag)
+{
+    u8 sect= ir_flash_index/3;
+    u8 sect_index = ir_flash_index%3;
+    u8 data;
+
+    //printf("ir_flash_set_flag =%x,ir_flash_index =%x\r\n",flag,ir_flash_index);
+    u32 addr = IR_DATA_SECT_0_ADDR+sect*0x1000+sect_index*2;
+    if(flag == 0)
+    {
+        data = APP_IR_DATA_HEAD_INVALID;
+        flash_write_page(addr,1,&data);
+    }
+    else
+    {
+        data = APP_IR_DATA_HEAD;
+        flash_write_page(addr,1,&data);
+        //printf("ir_flash_set_flag addr =%x\r\n",addr);
+    }
+}
+
+/**
+ * @brief       Read the ir data from the flash
+ * @param[in]   flash addr
+ * @return      none
+ */
+void ir_flash_check(u32 addr)
+{
+    u8 button_index=0,i;
+    u16 code_size=0;
+    u8 buf[300];
+    u16 key_id=0;
+
+    for(i=0;i<MAX_KEY_COUNT;i++)
+    {
+#ifdef CFG_ATM_SDK
+	if(!atm_ir_read_code(i, buf, sizeof(key_code_t))) {
+	    continue;
+	}
+	button_index = ir_get_button_idx_from_key_id(buf[0]);
+#else
+        flash_read_page(addr+i*256, 256, buf);
+        button_index = ir_get_button_idx_from_button(buf[0]);
+#endif
+        if (button_index == KEY_IDX_NULL)
+        {
+            continue;
+        }
+        code_size = *(u16*)&buf[2];
+        key_id  = buf[0]|(buf[1]<<8);
+        ir_table[button_index].key_id = key_id;
+        ir_table[button_index].code_size =  code_size;
+        ir_table[button_index].button_idx = button_index;
+#ifndef CFG_ATM_SDK
+        if(code_size>256)
+        {
+            printf("addr=%x\r\n",addr-IR_SECTOR_ADD_OFFSET+i*256);
+            flash_read_page(addr-IR_SECTOR_ADD_OFFSET+i*256, code_size-251, &buf[256]);
+        }
+#endif
+        memcpy(ir_table[button_index].code, &buf[5], code_size);
+
+
+        printf("button =%x \r\n",button_index);
+        /*
+        for(u16 k=0;k<code_size;k++ )
+        {
+            printf(" %x",ir_table[button_index].code[k]);
+        }
+        printf("\r\n");
+        */
+    }
+}
+
+/**
+ * @brief       Read the flag from the flash,and find the address which backup the valid ir data
+ * @param[in]   none
+ * @return      none
+ */
+void ir_param_init(void)
+{
+    u32 addr;
+    u8 data[6],i,j;
+    u8 nodata_flag=0;
+    u8 find_flag=0;
+
+    ir_flash_index = IR_DATA_SECT_MAX_NUM;
+    printf("ir flash head=\r\n");
+    for(i=0;i<IR_DATA_SECT_NUM;i++)
+    {
+        flash_read_page(IR_DATA_SECT_0_ADDR+i*0x1000, 6, data);
+        for(u8 k=0;k<6;k++)
+            printf(" %x",data[k]);
+        for(j=0;j<3;j++)
+        {
+            if(data[j*2] == APP_IR_DATA_HEAD)
+            {
+                ir_flash_index= i*3+j;
+                nodata_flag = 0;
+                find_flag = 1;
+                break;
+            }
+            if(data[j*2] == APP_IR_DATA_HEAD_INVALID)
+            {
+                ir_flash_index = i*3+j;
+                nodata_flag = 1;
+            }
+        }
+        if(find_flag == 1) break;
+    }
+    if(ir_flash_index == IR_DATA_SECT_MAX_NUM)
+    {
+        ir_flash_index = 0;
+        printf("\r\nno ir data\r\n");
+        return;
+    }
+
+    if(ir_flash_index >= IR_DATA_NEED_ERASE_NUM)
+    {
+        flash_read_page(IR_DATA_SECT_0_ADDR,1,&data[0]);
+        flash_read_page(IR_DATA_SECT_0_EXT_ADDR,1,&data[1]);
+        flash_read_page(IR_DATA_SECT_1_EXT_ADDR,1,&data[2]);
+        if(data[0] != 0xff)
+        {
+            printf("erase 1 part flash\r\n");
+            flash_erase_sector(IR_DATA_SECT_0_ADDR);
+            flash_erase_sector(IR_DATA_SECT_1_ADDR);
+        }
+        if(data[1]!= 0xff)
+        {
+            flash_erase_sector(IR_DATA_SECT_0_EXT_ADDR);
+        }
+        if(data[2]!= 0xff)
+        {
+            flash_erase_sector(IR_DATA_SECT_1_EXT_ADDR);
+        }
+    }
+    if(ir_flash_index < IR_DATA_NEED_ERASE_NUM)
+    {
+        flash_read_page(IR_DATA_SECT_2_ADDR,1,&data[0]);
+        flash_read_page(IR_DATA_SECT_2_EXT_ADDR,1,&data[1]);
+        flash_read_page(IR_DATA_SECT_3_EXT_ADDR,1,&data[2]);
+        if((data[0] != 0xff))
+        {
+            printf("erase 2 part flash\r\n");
+            flash_erase_sector(IR_DATA_SECT_2_ADDR);
+            flash_erase_sector(IR_DATA_SECT_3_ADDR);
+        }
+        if(data[1]!= 0xff)
+        {
+            flash_erase_sector(IR_DATA_SECT_2_EXT_ADDR);
+        }
+        if(data[2]!= 0xff)
+        {
+            flash_erase_sector(IR_DATA_SECT_3_EXT_ADDR);
+        }
+    }
+
+    if(nodata_flag == 1)
+    {
+        printf("\r\nno ir data, but ir_flash_index =%x\r\n",ir_flash_index);
+    }
+    else
+    {
+        addr = if_flash_sect_addr[ir_flash_index];
+        printf("current sector= %x app_ir_param_init addr=%x\r\n",ir_flash_index,addr);
+        ir_flash_check(addr);
+    }
+}
+
+void ir_flash_save_en(u8 button_index)
+{
+    ir_app_parm.ir_save.ir_save_en |= 1<<button_index;
+    printf("ir_flash_save_en ir_save_en=%x\r\n",ir_app_parm.ir_save.ir_save_en);
+
+}
+
+void ir_flash_save_flag_for_ext_sector(void)
+{
+    u8 index;
+    u32 addr;
+    u8 data;
+
+    index = ir_flash_index/3;
+    addr = IR_DATA_SECT_0_EXT_ADDR + index*0x1000;
+    flash_read_page(addr,1,&data);
+    if(data != APP_IR_DATA_HEAD)
+    {
+       data = APP_IR_DATA_HEAD;
+       flash_write_page(addr,1,&data);
+       printf("ir_flash_save_flag_for_ext_sector =%x",index);
+    }
+}
+
+void ir_flash_save(u8 button)
+{
+    u32 flash_addr;
+    u8 write_len_per;
+
+    flash_addr = if_flash_sect_addr[ir_flash_index] + button*256;
+    if(((ir_table[button].code_size+5) - ir_app_parm.ir_save.ir_save_pos) >= 16)
+    {
+        write_len_per = 16;
+    }
+    else
+    {
+        write_len_per = ir_table[button].code_size + 5 - ir_app_parm.ir_save.ir_save_pos;
+    }
+    if(ir_app_parm.ir_save.ir_save_pos<256)
+    {
+        if(bls_ll_requestConnBrxEventDisable() > 2)
+        {
+            bls_ll_disableConnBrxEvent();
+            //device_led_on(1);
+            flash_write_page(flash_addr+ir_app_parm.ir_save.ir_save_pos,write_len_per,(((u8*)(&ir_table[button]))+ir_app_parm.ir_save.ir_save_pos));
+            //device_led_off(1);
+            bls_ll_restoreConnBrxEvent();
+        }
+        else
+            return;
+    }
+    else
+    {
+        if(bls_ll_requestConnBrxEventDisable() > 2)
+        {
+
+            bls_ll_disableConnBrxEvent();
+            //device_led_on(1);
+            flash_write_page(flash_addr-IR_SECTOR_ADD_OFFSET+ir_app_parm.ir_save.ir_save_pos-256,write_len_per,(((u8*)(&ir_table[button]))+ir_app_parm.ir_save.ir_save_pos));
+            //device_led_off(1);
+            bls_ll_restoreConnBrxEvent();
+            ir_flash_save_flag_for_ext_sector();
+        }
+        else
+            return;
+    }
+    ir_app_parm.ir_save.ir_save_pos += write_len_per;
+    ir_app_parm.ir_save.ir_save_button = button;
+    //printf("pos=%x,button=%x\r\n",ir_app_parm.ir_save.ir_save_pos,ir_app_parm.ir_save.ir_save_button);
+    if(ir_app_parm.ir_save.ir_save_pos == (ir_table[button].code_size+5))
+    {
+        printf("\r\n w butt=%x\r\n",button);
+        ir_app_parm.ir_save.ir_save_en &= ~(1<<button);
+        ir_app_parm.ir_save.ir_save_button = 0xff;
+    }
+}
+
+
+/**
+ * @brief       Backup the ir data in flash
+ * @param[in]   none
+ * @return      none
+ */
+int ir_flash_save_timeoutcb(void)
+{
+    u32 flash_addr;
+    u8 i,buf;
+    u8 ir_save_flag;
+
+    if((ir_app_parm.ir_save.ir_save_button == 0xff) && (ir_app_parm.ir_save.ir_save_pos == 0))
+    {
+        if(ir_save_error_flag == 0xaa)
+        {
+            if((ir_flash_erase_tick == 0) && (ir_flash_erase_sector_step == 0))
+            {
+                ir_flash_index = 0;
+                ir_save_error_flag = 0;
+            }
+            return 0;
+        }
+        else
+        {
+            flash_addr = if_flash_sect_addr[ir_flash_index];
+            flash_read_page(flash_addr, 1, &buf);
+            if(buf != 0xff)
+            {
+                printf("ir_flash_save error\r\n");
+                printf("ir_flash_save error\r\n");
+                ir_save_error_flag = 0xaa;
+                if(ir_flash_index >= IR_DATA_NEED_ERASE_NUM)
+                {
+                    flash_addr = if_flash_sect_addr[0];
+                    flash_read_page(flash_addr, 1, &buf);
+                    if(buf == 0xff)
+                    {
+                       ir_flash_need_erase_sector = 2;
+                       ir_flash_erase_tick = clock_time() | 1;
+                       ir_flash_index = 0;
+                    }
+                    else
+                    {
+                       //erase all
+                       ir_flash_need_erase_sector = 4;
+                    }
+                }
+                else
+                {
+                    flash_addr = if_flash_sect_addr[IR_DATA_NEED_ERASE_NUM];
+                    flash_read_page(flash_addr, 1, &buf);
+                    if(buf == 0xff)
+                    {
+                       ir_flash_need_erase_sector = 0;
+                       ir_flash_erase_tick = clock_time() | 1;
+                       ir_flash_index = IR_DATA_NEED_ERASE_NUM;
+                    }
+                    else
+                    {
+                       //erase all
+                       ir_flash_need_erase_sector = 4;
+                    }
+                }
+                return 0;
+            }
+        }
+    }
+    ir_save_flag = ir_app_parm.ir_save.ir_save_en;
+    if((ir_app_parm.ir_save.ir_save_button != 0xff) && (ir_app_parm.ir_save.ir_save_button <= 4))
+    {
+        ir_flash_save(ir_app_parm.ir_save.ir_save_button);
+        return 0;
+    }
+    else
+    {
+        for(i=0;i<MAX_KEY_COUNT;i++)
+        {
+            if(ir_save_flag & 0x01)
+            {
+                if(ir_app_parm.ir_save.ir_save_button == 0xff)
+                    ir_app_parm.ir_save.ir_save_pos = 0;
+                ir_app_parm.ir_save.ir_save_button = i;
+                ir_flash_save(ir_app_parm.ir_save.ir_save_button);
+                return 0;
+            }
+            else
+            {
+               ir_save_flag = ir_save_flag>>1;
+            }
+        }
+        return -1;
+    }
+}
+
+
+void ir_init_key_event_notify(u8 value)
+{
+    ir_app_parm.ir_programming.key_notification_flag = value;
+}
+
+/**
+ * @brief       Erase the flash sector
+ * @return      0: not erase success
+               -1: erase success
+ */
+int ir_flash_erase_timeoutcb(void)
+{
+#ifdef CFG_ATM_SDK
+    // TODO: erase IR data
+#else
+    //printf("ir_flash_erase_timeoutcb\r\n");
+    //u32 time;
+    u8 data;
+    u32 pos_addr=0;
+
+    if(is_mic_enable() == 1)
+        return 0;
+
+    //u32 erase_time=clock_time();
+    //printf("flash erase sector=%x \r\n",ir_flash_need_erase_sector);
+   // time = bls_ll_requestConnBrxEventDisable();
+    if(ir_flash_need_erase_sector == 0)
+    {
+        pos_addr = 0;
+    }
+    else if(ir_flash_need_erase_sector == 2)
+    {
+        pos_addr = 0x2000;
+    }
+    else
+    {
+        //erase all
+        if(bls_ll_requestConnBrxEventDisable() > 150)
+        {
+            bls_ll_disableConnBrxEvent();
+            if(ir_flash_erase_sector_step == 0)
+            {
+                flash_erase_sector(IR_DATA_SECT_0_ADDR);
+                flash_erase_sector(IR_DATA_SECT_1_ADDR);
+                ir_flash_erase_sector_step = 1;
+            }
+            else if(ir_flash_erase_sector_step == 1)
+            {
+                flash_erase_sector(IR_DATA_SECT_0_EXT_ADDR);
+                flash_erase_sector(IR_DATA_SECT_1_EXT_ADDR);
+                ir_flash_erase_sector_step = 2;
+            }
+            else if(ir_flash_erase_sector_step == 2)
+            {
+                flash_erase_sector(IR_DATA_SECT_2_ADDR);
+                flash_erase_sector(IR_DATA_SECT_3_ADDR);
+                ir_flash_erase_sector_step = 3;
+            }
+            else
+            {
+                flash_erase_sector(IR_DATA_SECT_2_EXT_ADDR);
+                flash_erase_sector(IR_DATA_SECT_3_EXT_ADDR);
+                ir_flash_erase_sector_step = 0;
+            }
+            bls_ll_restoreConnBrxEvent();
+
+           if(ir_flash_erase_sector_step)
+               return 0;
+           else
+               return -1;
+        }
+    }
+    if(bls_ll_requestConnBrxEventDisable() > 70)
+    {
+        //device_led_on(1);
+        bls_ll_disableConnBrxEvent();
+        //printf("flash erase sector=%x \r\n",ir_flash_need_erase_sector);
+
+       if(ir_flash_erase_sector_step == 0)
+       {
+           flash_erase_sector(IR_DATA_SECT_0_ADDR + pos_addr);
+           ir_flash_erase_sector_step = 1;
+       }
+       else if(ir_flash_erase_sector_step == 1)
+       {
+           flash_erase_sector(IR_DATA_SECT_1_ADDR + pos_addr);
+           ir_flash_erase_sector_step = 2;
+       }
+       else
+       {
+           if(ir_flash_erase_sector_step == 2)
+           {
+               flash_read_page(IR_DATA_SECT_0_EXT_ADDR + pos_addr,1,&data);
+               if(data == APP_IR_DATA_HEAD)
+               {
+                   printf("step_2\r\n");
+                   flash_erase_sector(IR_DATA_SECT_0_EXT_ADDR + pos_addr);
+                   ir_flash_erase_sector_step = 3;
+               }
+               else
+               {
+                   printf("step_2_2\r\n");
+                   flash_read_page(IR_DATA_SECT_1_EXT_ADDR + pos_addr,1,&data);
+                   if(data == APP_IR_DATA_HEAD)
+                   {
+                       flash_erase_sector(IR_DATA_SECT_1_EXT_ADDR + pos_addr);
+                       ir_flash_erase_sector_step = 0;
+                       printf("erase_succ\r\n");
+                   }
+                   else
+                   {
+                        printf("step_2_2_2\r\n");
+                        ir_flash_erase_sector_step = 0;
+                   }
+               }
+           }
+           else
+           {
+               printf("step_3\r\n");
+               flash_read_page(IR_DATA_SECT_1_EXT_ADDR + pos_addr,1,&data);
+               if(data == APP_IR_DATA_HEAD)
+               {
+                   printf("step_3_3\r\n");
+                   flash_erase_sector(IR_DATA_SECT_1_EXT_ADDR + pos_addr);
+                   ir_flash_erase_sector_step = 0;
+                   printf("erase_succ\r\n");
+               }
+               else
+               {
+                    printf("step_3_3_3\r\n");
+                    ir_flash_erase_sector_step = 0;
+               }
+           }
+        }
+        bls_ll_restoreConnBrxEvent();
+        if(ir_flash_erase_sector_step)
+            return 0;
+        else
+            return -1;
+    }
+#endif
+    return 0;
+}
+
+#if 0
+/**
+ * @brief       Add a timer for erase flash
+ * @return      none
+ */
+void ir_flash_erase(void)
+{
+    printf("ir_flash_erase\r\n");
+    //blt_soft_timer_add(ir_flash_erase_timeoutcb, FLASH_ERASE_TIMEOUT);
+    ir_flash_erase_timeoutcb();
+}
+#endif
+
+/**
+ * @brief       Ir flash factory
+ * @return      none
+ */
+void ir_flash_factory(void)
+{
+    printf("ir_flash_factory\r\n");
+#ifdef CFG_ATM_SDK
+    atm_ir_del_code();
+#else
+    ir_flash_set_flag(0);
+#endif
+}
+
+
+/**
+ * @brief       Erase the flash sector
+ * @return      0: not erase success
+               -1: erase success
+ */
+int ir_key_event_notify_erase_timeoutcb(void)
+{
+    printf("ir_key_event_notify_erase_timeoutcb\r\n");
+#ifdef CFG_ATM_SDK
+    // TODO: port erase IR key event notify
+#else
+    if(bls_ll_requestConnBrxEventDisable() > 120)
+    {
+        bls_ll_disableConnBrxEvent();
+        flash_erase_sector(IR_KEY_EVENT_NOTIFY_SECT_ADDR);
+        printf("erase_succ\r\n");
+        bls_ll_restoreConnBrxEvent();
+        write_ir_key_event_notify(ir_app_parm.ir_programming.key_notification_flag);
+        return -1;
+    }
+#endif
+
+    return 0;
+}
+
+
+/**
+ * @brief       ir_programming_timeoutcb
+ * @return      -1: exit the timer
+                 0: exit the timer this time
+ */
+int ir_programming_timeoutcb(void)
+{
+    printf("ir_programming_timeoutcb\r\n");
+    ir_app_parm.ir_programming.programming_start = 0;
+
+    if (ir_app_parm.programming_timer)
+    {
+        ir_app_parm.programming_timer = NULL;
+    }
+    return -1;
+}
+
+/**
+ * @brief       Recognize the programming key is IR mode or BLE HID modes
+ * @param[in]   button_index: which button
+ * @return      1: BLE HID mode
+                0: IR mode
+ */
+u8 ir_key_is_suppress(u8 key_idx)
+{
+    u8 index;
+    index = ir_get_suppress_index_from_keyid_idx(key_idx);
+    if (index == KEY_IDX_NULL) return KEY_IDX_NULL;
+    if(ir_app_parm.ir_suppress[index])
+        return true;
+    else
+        return false;
+}
+void ir_suppress_reinit(void)
+{
+    u8 i;
+    for (i = 0; i < MAX_KEY_COUNT; i++)
+    {
+        ir_app_parm.ir_suppress[i] = 0;
+    }
+}
+/**
+ * @brief       ir_type_read
+ * @param[in]   none
+ * @return      1 or 0
+ */
+int ir_type_read(void)
+{
+    u8 type;
+    u8* code = ir_table[ir_app_parm.current_programming_key_send].code;
+
+    type = code[0];
+
+    if(type == 1) //one time ir seqnence
+    {
+        return 0;
+    }
+    else if(type == 3)  //one time + repeated ir sequence
+    {
+#ifndef CFG_ATM_SDK
+       u16 sequence_length = ((u16)code[4] << 8 | code[5])<<2;
+       sequence_length += 8;
+       u8* p_sequence = &code[sequence_length];
+       sequence_length = ((u16)code[6] << 8 | code[7]);
+       T_dmaData_buf.data_num = 0;
+       for(u8 i = 0; i < sequence_length; i++)
+       {
+            T_dmaData_buf.data[T_dmaData_buf.data_num ++] = \
+                pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL,(u16)(p_sequence[0]<<8) | p_sequence[1]);
+            T_dmaData_buf.data[T_dmaData_buf.data_num ++] = \
+                pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL,(u16)(p_sequence[2]<<8) | p_sequence[3]);
+            p_sequence += 4;
+       }
+       T_dmaData_buf.dma_len = T_dmaData_buf.data_num * 2;
+#endif
+    }
+    else if(type == 4)  // two repeated ir sequence
+    {
+
+    }
+
+    return 1;
+
+}
+
+/**
+ * @brief       Obtain the duty,frequency,repear delay
+ * @param[in]   none
+ * @return      none
+ */
+void ir_fallback_get_protocol_configure(unsigned char* p_duty_cycle, unsigned short* p_carrier_frequency,
+                                        unsigned short* p_repeat_delay)
+{
+    *p_duty_cycle = ir_app_parm.duty_cycle;
+    *p_carrier_frequency = ir_app_parm.carrier_frequency;
+    *p_repeat_delay = ir_app_parm.ir_repeat_delay.repeat_delay;
+}
+
+#ifndef CFG_ATM_SDK
+/**
+ * @brief       Load ir data to ir send buffer
+ * @param[in]   ir data
+ * @return      none
+ */
+void ir_send_key_code(key_code_t* p_key_code)
+{
+    u8* code = p_key_code->code;
+    u16 sequence_length,sequence_length2,length;    //4 bytes per sequence
+    u8* p_sequence;
+
+    T_dmaData_buf.data_num = 0;
+
+    u8  type = code[0];
+    if(type)
+    {
+        ir_app_parm.duty_cycle = code[1]; //as percentage
+        ir_app_parm.carrier_frequency = ((u16)code[2] << 8 | code[3]) * 100; //in unit of 100Hz
+        sequence_length = (u16)code[4] << 8 | code[5];
+    }
+    //disable button
+    if (type == 0)
+    {
+       return;
+    }
+    //one time ir sequence
+    else if (type == 1)
+    {
+        p_sequence = &code[6];
+        for(u8 i = 0; i < sequence_length; i++)
+        {
+            T_dmaData_buf.data[T_dmaData_buf.data_num ++] = \
+                pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL,(u16)(p_sequence[0]<<8) | p_sequence[1]);
+            T_dmaData_buf.data[T_dmaData_buf.data_num ++] = \
+                pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL,(u16)(p_sequence[2]<<8) | p_sequence[3]);
+            p_sequence += 4;
+        }
+    }
+    //repeat ir sequence
+    else if (type == 2)
+    {
+        ir_app_parm.ir_repeat_delay.repeat_delay = (u16)code[6] << 8 | code[7];
+        //printf("ir_app_parm.ir_repeat_delay_cycle=%x\r\n",ir_app_parm.ir_repeat_delay.repeat_delay);
+        ir_app_parm.ir_repeat_delay.repeat_delay = \
+            ir_app_parm.ir_repeat_delay.repeat_delay*(1000000/ir_app_parm.carrier_frequency);
+        //printf("ir_repeat_delay_us=%x\r\n",ir_app_parm.ir_repeat_delay.repeat_delay);
+        p_sequence = &code[8];
+
+        for(u8 i = 0; i < sequence_length; i++)
+        {
+            T_dmaData_buf.data[T_dmaData_buf.data_num ++] = \
+                pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL,(u16)(p_sequence[0]<<8) | p_sequence[1]);
+            T_dmaData_buf.data[T_dmaData_buf.data_num ++] = \
+                pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL,(u16)(p_sequence[2]<<8) | p_sequence[3]);
+            p_sequence += 4;
+        }
+        //printf("duty_cycle=%x\r\n",ir_app_parm.duty_cycle);
+        //printf("carrier_frequency=%x\r\n",ir_app_parm.carrier_frequency);
+        //printf("sequence_length=%x\r\n",sequence_length);
+    }
+    //one time + repeat ir sequence
+    else if (type == 3)
+    {
+        sequence_length2 = (u16)code[6] << 8 | code[7];
+        //printf("sequence_length=%x\r\n",sequence_length);
+        p_sequence = &code[8];
+
+        for(u8 i = 0; i < sequence_length; i++)
+        {
+            T_dmaData_buf.data[T_dmaData_buf.data_num ++] = \
+                pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL,(u16)(p_sequence[0]<<8) | p_sequence[1]);
+            T_dmaData_buf.data[T_dmaData_buf.data_num ++] = \
+                pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL,(u16)(p_sequence[2]<<8) | p_sequence[3]);
+            p_sequence += 4;
+        }
+    }
+    else
+    {
+        sequence_length2 = (u16)code[6] << 8 | code[7];
+        if(ir_app_parm.odd_or_even_press % 2 == 1)
+        {
+            p_sequence = &code[8];
+            length = sequence_length;
+        }
+        else
+        {
+            length = sequence_length*4 + 8;
+            p_sequence = &code[length];
+            length = sequence_length2;
+
+        }
+        for(u8 i = 0; i < length; i++)
+        {
+            T_dmaData_buf.data[T_dmaData_buf.data_num ++] = \
+                pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL,(u16)(p_sequence[0]<<8) | p_sequence[1]);
+            T_dmaData_buf.data[T_dmaData_buf.data_num ++] = \
+                pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL,(u16)(p_sequence[2]<<8) | p_sequence[3]);
+            p_sequence += 4;
+        }
+        ir_app_parm.odd_or_even_press++;
+    }
+
+    ir_send_specil(ir_app_parm.carrier_frequency,ir_app_parm.duty_cycle);
+}
+#endif
+
+extern void app_ota_status(u8 status);
+_attribute_data_retention_ u8  ir_cache_key[3]={0};
+
+/**
+ * @brief       Ir_repeat_delay_release_time
+ * @param[in]   none
+ * @return      0
+ */
+int ir_cache_key_timer(void)
+{
+    printf("ir_cache_key_timer\r\n");
+    if(device_in_connection_state)
+    {
+        printf("send cachekey_notify\r\n");
+        ir_cache_key[0] = 0;   //down
+        bls_att_pushNotifyData(ATV_IR_KEY_EVENT_IDX, ir_cache_key, sizeof(ir_cache_key));
+#ifdef CFG_ATM_SDK
+	atm_timer_udelay(100);
+#else
+        sleep_us(100);
+#endif
+        ir_cache_key[0] = 1;   //up
+        bls_att_pushNotifyData(ATV_IR_KEY_EVENT_IDX, ir_cache_key, sizeof(ir_cache_key));
+        return -1;
+    }
+    printf("send cachekey_notify timeout\r\n");
+    return -1;
+}
+
+/**
+ * @brief       send ir data and send nofity
+ * @param[in]   1: down 0:up
+ * @return      0
+ */
+int ir_fallback_send(u8 key_down)
+{
+    key_code_t* p_key_code = &ir_table[ir_app_parm.current_programming_key_send];
+    u16 key_id;
+
+    //printf("ir_fallback_send\r\n");
+#ifndef CFG_ATM_SDK
+    if(key_down)
+        app_ota_status(0);
+    else
+        app_ota_status(1);
+#endif
+    if(key_down)
+    {
+        printf("key down\r\n");
+#ifdef CFG_ATM_SDK
+	atm_ir_send_key_code(p_key_code->key_id, p_key_code->code,
+	    p_key_code->code_size);
+#else
+        ir_send_key_code(p_key_code);
+#endif
+    }
+
+    if (ir_app_parm.ir_programming.key_notification_flag)
+    {
+        //Besides sending IR code, also notify ATV that the key event
+        printf("send notify\r\n");
+        if(app_custom_get_device_type() == REMOTE_G10)
+            key_id = key_button_map_g10[ir_app_parm.current_programming_key_send].key_id;
+        else
+            key_id = key_button_map_g20[ir_app_parm.current_programming_key_send].key_id;
+        //printf("key_id=%x\r\n",key_id);
+        ir_cache_key[0] = key_down ? 0:1;
+        ir_cache_key[1] = (key_id >> 8);
+        ir_cache_key[2] = key_id;
+        if(device_in_connection_state)
+            bls_att_pushNotifyData(ATV_IR_KEY_EVENT_IDX, ir_cache_key, sizeof(ir_cache_key));
+        else
+        {
+            if(key_down == 1)
+            {
+                printf("add cache key\r\n");
+                blt_soft_timer_delete(ir_cache_key_timer);
+                blt_soft_timer_add(ir_cache_key_timer, 5000000);
+            }
+        }
+    }
+    return 0;
+}
+
+/**
+ * @brief       Ir_repeat_delay_release_time
+ * @param[in]   none
+ * @return      0
+ */
+int ir_repeat_delay_release_time(void)
+{
+    ir_app_parm.ir_repeat_delay.release_timer = clock_time();
+    //printf("ir_app_parm.ir_repeat_delay_release_time=%x\r\n",ir_app_parm.ir_repeat_delay.release_timer);
+    return 0;
+}
+
+/**
+ * @brief       ir_repeat_delay_timer
+ * @param[in]   none
+ * @return      -1
+ */
+int ir_repeat_delay_timer(void)
+{
+    printf("ir_repeat_delay_timer\r\n");
+    if(app_is_key_released())
+    {
+        programming_key_set(0x55);
+        ir_fallback_send(1);
+    }
+    return -1;
+}
+
+/**
+ * @brief       ir_fallback_send_key_code
+ * @param[in]   button_idx
+ * @param[in]   key_down  1:down 0:up
+ * @return      false or true
+ */
+#ifdef CFG_ATM_SDK
+u8 ir_fallback_send_key_code(u8 button_idx, bool key_down)
+#else
+u8 ir_fallback_send_key_code(u8 button_idx, u8 key_down)
+#endif
+{
+    u8 last_key_send = ir_app_parm.current_programming_key_send;
+    u32 current_time;
+    u32 time;
+    key_code_t* p_key_code = ir_get_key_code_from_keyid_idx(button_idx);
+    //printf("current_programming_key=%x\r\n",ir_app_parm.current_programming_key_send);
+    u8* code = ir_table[ir_app_parm.current_programming_key_send].code;
+
+    u8 type = code[0];
+    if (p_key_code == NULL)
+    {
+        return false;
+    }
+#ifndef CFG_ATM_SDK
+    if(type == 2)
+    {
+        if((last_key_send == ir_app_parm.current_programming_key_send))
+        {
+             current_time = clock_time();
+             /*
+             printf("current_time=%x\r\n",current_time);
+             printf("current_time - ir_app_parm.ir_repeat_delay.release_timer=%x\r\n",\
+                 current_time - ir_app_parm.ir_repeat_delay.release_timer);
+             */
+             time = (current_time - ir_app_parm.ir_repeat_delay.release_timer)>>4;
+             if(time < ir_app_parm.ir_repeat_delay.repeat_delay)
+             {
+                 time = ir_app_parm.ir_repeat_delay.repeat_delay - time;
+                 //printf("need delay=%x\r\n",time);
+                 blt_soft_timer_add(ir_repeat_delay_timer, time);
+             }
+             else
+             {
+                 //printf("exceed delay time\r\n");
+                 programming_key_set(0x55);
+                 ir_fallback_send(key_down);
+             }
+        }
+        else
+        {
+             programming_key_set(0x55);
+             ir_fallback_send(key_down);
+        }
+    }
+    else
+#endif
+    {
+        programming_key_set(0x55);
+        ir_fallback_send(key_down);
+    }
+    return true;
+}
+
+/**
+ * @brief       ir_code_merge
+ * @param[in]   key_id
+ * @param[in]   button_index
+ * @param[in]   code size: ir data length
+ * @param[in]   code: ir data
+ * @return      none
+ */
+void ir_code_merge(u16 key_id,u8 button_index,u16 code_size,u8* code)
+{
+    //u32 flash_addr_pos=0;
+    u32 len;
+
+
+    //printf("ir_code_merge,ir_app_parm.ir_merge.ir_current_button=%x,button_index=%x\r\n",ir_app_parm.ir_merge.ir_current_button,button_index);
+    if(ir_app_parm.ir_merge.ir_current_button != button_index)
+    {
+        ir_app_parm.ir_merge.ir_code_pos = 0;
+        ir_app_parm.ir_merge.ir_keycode_total_len = 0;
+        if(code[0] == 1)
+        {
+            ir_app_parm.ir_merge.ir_keycode_total_len =  ((u16)code[4] << 8 | code[5])*4 + 6;
+        }
+        else if(code[0] == 2)
+        {
+            ir_app_parm.ir_merge.ir_keycode_total_len =  ((u16)code[4] << 8 | code[5])*4 + 8;
+        }
+        else if((code[0] == 3) || (code[0] == 4))
+        {
+            ir_app_parm.ir_merge.ir_keycode_total_len =  ((u16)code[4] << 8 | code[5])*4 + ((u16)code[6] << 8 | code[7])*4 + 8;
+        }
+        //printf(" ir_app_parm.ir_merge.ir_keycode_total_len=%x,codesize=%x\r\n", ir_app_parm.ir_merge.ir_keycode_total_len,code_size);
+        memcpy(ir_table[button_index].code + ir_app_parm.ir_merge.ir_code_pos, code, code_size);
+        ir_app_parm.ir_merge.ir_code_pos += code_size;
+
+    }
+    else
+    {
+         memcpy(ir_table[button_index].code + ir_app_parm.ir_merge.ir_code_pos, code, code_size);
+         ir_app_parm.ir_merge.ir_code_pos += code_size;
+    }
+   // printf("ir_code_merge: ir_app_parm.ir_merge.ir_code_pos=%x,ir_app_parm.ir_merge.ir_keycode_total_len=%x,code_size=%x",ir_app_parm.ir_merge.ir_code_pos,ir_app_parm.ir_merge.ir_keycode_total_len,code_size);
+    if(ir_app_parm.ir_merge.ir_code_pos == ir_app_parm.ir_merge.ir_keycode_total_len)
+    {
+         len = ir_app_parm.ir_merge.ir_keycode_total_len;
+         ir_table[button_index].key_id = key_id;
+         ir_table[button_index].code_size = len;
+         ir_table[button_index].button_idx = button_index;
+         //flash_addr_pos += button_index*256;
+         //ir_flash_save(button_index,flash_addr_pos,len+5);
+#ifdef CFG_ATM_SDK
+	atm_ir_write_code(button_index, (u8*)&ir_table[button_index],
+	    sizeof(key_code_t));
+#else
+         ir_flash_save_en(button_index);
+#endif
+        /*
+         for(u8 i=0;i<len;i++ )
+         {
+             printf(" %x\r\n",*(ir_table[button_index].code+i));
+         }
+         */
+         ir_app_parm.ir_programming.programmed_key_count++;
+         //printf("add key\r\n");
+    }
+}
+
+/**
+ * @brief       ir_table_add_key
+ * @param[in]   key_id,code_size,code
+ * @return      0,11
+ */
+u8 ir_table_add_key(u16 key_id, u16 code_size, u8* code)
+{
+    u8 button_index=0;
+    u16 button;
+
+    button_index = ir_get_button_idx_from_key_id(key_id);
+    if (button_index == KEY_IDX_NULL)
+    {
+        return false;
+    }
+    if ((ir_app_parm.ir_programming.programmed_key_count < MAX_KEY_COUNT)
+        && (code_size <= MAX_CODE_LENGTH))
+    {
+        if(app_custom_get_device_type() == REMOTE_G10)
+        {
+#ifdef CFG_ATM_SDK
+            button = key_button_map_g10[button_index].key_id;
+#else
+            button = key_button_map_g10[button_index].button;
+#endif
+            //printf("ir_table[button_index].key_id=%x \r\n",button);
+        }
+        else
+        {
+#ifdef CFG_ATM_SDK
+            button = key_button_map_g20[button_index].key_id;
+#else
+            button = key_button_map_g20[button_index].button;
+#endif
+           // printf("ir_table[button_index].key_id=%x \r\n",button);
+        }
+        //printf("ir_table[button_index].button_idx=%x \r\n",button_index);
+
+        ir_code_merge(button,button_index,code_size,code);
+    }
+    return true;
+}
+
+/**
+ * @brief       ir_key_event_notify_erase
+ * @param[in]   none
+ * @return      none
+ */
+void ir_key_event_notify_erase(void)
+{
+    blt_soft_timer_add(ir_key_event_notify_erase_timeoutcb, 100000);
+}
+
+
+/**
+ * @brief       Receive ATV commands and processed
+ * @param[in]   handle :ATV command
+ * @param[in]   buf:command
+ * @param[in]   len: command data length
+ * @return      false or true
+ */
+void ir_fallback_process(u16 handle, u8* buf, u16 len)
+{
+    u8 index,data;
+  //  u8 testdata[6],i;
+  //  u32 addr;
+    u8 k;
+
+    switch (handle)
+    {
+        case ATV_IR_PROG_CONTROL_IDX:
+        {
+            if (len == 1)
+            {
+                ir_app_parm.ir_programming.programming_start = *buf;
+                if (ir_app_parm.ir_programming.programming_start == 1)
+                {
+                    printf("ir table programming start\r\n");
+                    #if BLE_AUDIO_ENABLE
+                    google_reset_rsp_delay();
+                    #endif
+                    ir_table_init();
+#ifdef CFG_ATM_SDK
+		    atm_disable_slave_latency(true);
+#else
+                    ir_flash_set_flag(0);
+                    if(ir_flash_index == 0)
+                    {
+                        flash_read_page(IR_DATA_SECT_0_ADDR,1,&data);
+                        if(data == APP_IR_DATA_HEAD_INVALID)
+                         ir_flash_index++;
+                    }
+                    else
+                        ir_flash_index++;
+
+                    if(ir_flash_index >= IR_DATA_SECT_MAX_NUM)
+                        ir_flash_index = 0;
+                    printf("ir_flash_index=%x\r\n",ir_flash_index);
+#endif
+                    if (ir_app_parm.programming_timer)
+                    {
+                        blt_soft_timer_delete(ir_programming_timeoutcb);
+                        ir_app_parm.programming_timer = NULL;
+                    }
+
+                    ir_app_parm.programming_timer = 1;
+                    blt_soft_timer_add(ir_programming_timeoutcb, PROGRAMMING_TIMEOUT);
+                }
+                else
+                {
+                    printf("ir table programming end\r\n");
+#ifdef CFG_ATM_SDK
+		    atm_disable_slave_latency(false);
+#else
+                    extern u32    ir_flash_erase_tick;
+                    if(ir_app_parm.ir_programming.programmed_key_count == 0)
+                    {
+                        ir_flash_set_flag(0);
+                        printf(" empty ir programming\r\n");
+                    }
+                    if(ir_app_parm.ir_programming.programmed_key_count >= 1)
+                    {
+                        ir_flash_set_flag(1);
+                    }
+                    if(ir_flash_index == IR_DATA_NEED_ERASE_NUM)
+                    {
+                        ir_flash_need_erase_sector = 0;
+                        ir_flash_erase_tick = clock_time() | 1;
+                    }
+                    if(ir_flash_index == 0)
+                    {
+                        ir_flash_need_erase_sector = 2;
+                        ir_flash_erase_tick = clock_time() | 1;
+                    }
+#endif
+                    if (ir_app_parm.programming_timer)
+                    {
+                        blt_soft_timer_delete(ir_programming_timeoutcb);
+                        ir_app_parm.programming_timer = NULL;
+                    }
+#ifndef CFG_ATM_SDK
+                    printf("ir_flash_erase_tick=%x\r\n",ir_flash_erase_tick);
+                    /*
+                    for(i=0;i<IR_DATA_SECT_NUM;i++)
+                    {
+                        addr = IR_DATA_SECT_0_ADDR+i*0x1000;
+                        flash_read_page(addr, 6, testdata);
+                        printf("sect i=%x addr =%x\r\n",i,addr);
+                        for(k=0;k<6;k++)
+                            //printf(" %x",testdata[k]);
+                    }
+                    */
+                    if(app_ir_programming_end_Cb != NULL)
+                    {
+                        app_ir_programming_end_Cb();
+                    }
+#endif
+                }
+            }
+            break;
+        }
+        case ATV_IR_KEY_ID_IDX:
+        {
+            if ((ir_app_parm.ir_programming.programming_start == 1)
+                //&& (ir_app_parm.ir_programming.current_programming_key_id == INVALID_KEY_ID)
+                && (len == 2))
+            {
+                ir_app_parm.ir_programming.current_programming_key_id = buf[0];
+                ir_app_parm.ir_programming.current_programming_key_id <<= 8;
+                ir_app_parm.ir_programming.current_programming_key_id |= buf[1];
+                if (ir_app_parm.programming_timer)
+                {
+                     blt_soft_timer_delete(ir_programming_timeoutcb);
+                     ir_app_parm.programming_timer = NULL;
+                }
+                blt_soft_timer_add(ir_programming_timeoutcb, PROGRAMMING_TIMEOUT);
+                ir_app_parm.programming_timer = 1;
+            }
+            break;
+        }
+        case ATV_IR_CODE_IDX:
+        {
+            if ((ir_app_parm.ir_programming.programming_start == 1) && (len > 0))
+            {
+                if (ir_app_parm.ir_programming.current_programming_key_id != INVALID_KEY_ID)
+                {
+                    u8 return_value;
+                    return_value = ir_table_add_key(ir_app_parm.ir_programming.current_programming_key_id, len, buf);
+                    ir_app_parm.ir_programming.current_programming_key_id = INVALID_KEY_ID;
+                }
+                else
+                {
+                   //response error
+                }
+                if (ir_app_parm.programming_timer)
+                {
+                     blt_soft_timer_delete(ir_programming_timeoutcb);
+                     ir_app_parm.programming_timer = NULL;
+                }
+                blt_soft_timer_add(ir_programming_timeoutcb, PROGRAMMING_TIMEOUT);
+                ir_app_parm.programming_timer = 1;
+            }
+            break;
+        }
+        case ATV_IR_SUPPRESS_IDX:
+        {
+            if(len)
+            {
+                printf("switch to ble\r\n");
+                if(len%2 == 0)
+            {
+                    for(k=0;k<len/2;k++)
+                    {
+                        u16 id = (buf[2*k]<<8) | buf[2*k+1];
+                        index = ir_get_button_idx_from_key_id(id);
+                        printf("index=%x\r\n",index);
+                        if(ir_app_parm.ir_suppress[index] == 0)
+                {
+                            ir_app_parm.ir_suppress[index] = 1;
+                }
+                    }
+            }
+        }
+                else
+            {
+                printf("switch to ir\r\n");
+                for(k=0;k<MAX_KEY_COUNT;k++)
+                {
+                    if(ir_app_parm.ir_suppress[k])
+                    {
+                        ir_app_parm.ir_suppress[k] = 0;
+                    }
+                }
+            }
+            break;
+        }
+        case ATV_IR_KEY_EVENT_CCCD_IDX:
+        {
+            if (len == 2)
+            {
+                printf("ccc buf[0]=%x\r\n",buf[0]);
+                if(buf[0] != ir_app_parm.ir_programming.key_notification_flag)
+                {
+                    ir_app_parm.ir_programming.key_notification_flag = buf[0];
+#ifdef CFG_ATM_SDK
+		    atm_ir_write_ccc(buf[0]);
+#else
+                    if(is_ir_key_event_notify_flash_info_full() == 1)
+                    {
+                        ir_key_event_notify_erase();
+                    }
+                    else
+                        write_ir_key_event_notify(buf[0]);
+#endif
+                }
+            }
+            break;
+        }
+        default:
+        {
+            //printf("!!unhandled IDX\r\n");
+        }
+        break;
+    }
+}
+#ifndef CFG_ATM_SDK
+void ir_flash_save_loop(void)
+{
+    if(ir_app_parm.ir_save.ir_save_en)
+    {
+        ir_flash_save_timeoutcb();
+    }
+}
+
+void ir_flash_erase_loop(void)
+{
+    if((ir_flash_erase_tick) && (ir_send_ctrl.is_sending== 0))
+    {
+        if(ir_flash_erase_timeoutcb() == -1)
+        {
+            ir_flash_erase_tick = 0;
+        }
+    }
+}
+
+u8 ir_flash_busy(void)
+{
+     if(ir_app_parm.ir_save.ir_save_en || ir_flash_erase_tick || ir_app_parm.ir_programming.programming_start)
+        return 1;
+     else
+        return 0;
+}
+#endif
+
+#define APP_IR_CMD_OTA_NEC_IR_TABLE_PREPARE      0xEF00
+#define APP_IR_CMD_OTA_NEC_IR_TABLE_START        0xEF01
+#define APP_IR_CMD_OTA_NEC_IR_TABLE_END          0xEF02
+
+void ir_nec_ir_table_process(u8 *data,u16 len)
+{
+#ifndef CFG_ATM_SDK
+    u8 datasend[3];
+    u16 crc=0;
+    u32 flash_addr=0,pos=0;
+    u8 readdata[16];
+    u8 result=0;
+    u16 cmd = data[0] | (data[1]<<8);
+
+    if(cmd == APP_IR_CMD_OTA_NEC_IR_TABLE_PREPARE)
+    {
+        nec_ir_table_start = APP_NEC_IR_TABLE_PREPARE;
+    }
+    else if(cmd == APP_IR_CMD_OTA_NEC_IR_TABLE_START)
+    {
+        nec_ir_table_start = APP_NEC_IR_TABLE_START;
+    }
+    else if(((data[0] == 2) && (data[1] == 0xEF)))  //IR end
+    {
+        datasend[0] = 0xEE;
+        datasend[1] = 2;
+        datasend[2] = 0;
+        bls_att_pushNotifyData(OTA_CMD_OUT_DP_H, datasend, sizeof(datasend));
+        if(nec_ir_table_start == APP_NEC_IR_TABLE_START)
+        {
+            app_custom_set_new_ir_table();
+        }
+        nec_ir_table_start = APP_NEC_IR_TABLE_END;
+    }
+
+    if(nec_ir_table_start == APP_NEC_IR_TABLE_START)
+    {
+        if(len == 20)
+        {
+            crc = (data[19]<<8) | data[18];
+            pos = (data[0]) | (data[1]<<8);
+            extern unsigned short crc16 (unsigned char *pD, int len);
+            if(crc == crc16(data,18))
+            {
+                flash_addr = APP_NEC_IR_CODE_TABLE +  pos*16;
+                flash_write_page(flash_addr,16,&data[2]);
+                flash_read_page(flash_addr,16, readdata);
+                if(memcmp(&data[2],readdata,16))
+                {
+                    result = 1;
+                }
+            }
+            else
+            {
+                result = 1;
+            }
+            if(result == 1)
+            {
+                datasend[0] = 0xEE;
+                datasend[1] = 2;
+                datasend[2] = 1;
+                bls_att_pushNotifyData(OTA_CMD_OUT_DP_H, datasend, sizeof(datasend));
+                nec_ir_table_start = APP_NEC_IR_TABLE_WRITEFAIL;   //data invalid, must erase
+            }
+        }
+    }
+#endif // CFG_ATM_SDK
+}
+
+int ir_nec_ir_table_erase_timeoutcb(void)
+{
+#ifdef CFG_ATM_SDK
+    // TODO: erase IR table
+#else
+    if(is_mic_enable() == 1)
+        return 0;
+    if(bls_ll_requestConnBrxEventDisable() > 120)
+    {
+        printf("ir_nec_ir_table_erase_timeoutcb\r\n");
+        bls_ll_disableConnBrxEvent();
+        flash_erase_sector(APP_NEC_IR_CODE_TABLE);
+        bls_ll_restoreConnBrxEvent();
+        return -1;
+    }
+#endif
+    return 0;
+}
+
+void ir_nec_ir_table_erase_loop(void)
+{
+#ifndef CFG_ATM_SDK
+    u8 datasend[3];
+    if((nec_ir_table_start == APP_NEC_IR_TABLE_PREPARE) || (nec_ir_table_start == APP_NEC_IR_TABLE_WRITEFAIL))
+    {
+        if(ir_send_ctrl.is_sending == 0)
+        {
+            if(ir_nec_ir_table_erase_timeoutcb() == -1)
+            {
+                if(device_in_connection_state && (nec_ir_table_start == APP_NEC_IR_TABLE_PREPARE))
+                {
+                    //printf("ir_nec_ir_table_erase_end\r\n");
+                    datasend[0] = 0XEE;
+                    datasend[1] = 0;
+                    datasend[2] = 0;
+                    bls_att_pushNotifyData(OTA_CMD_OUT_DP_H, datasend, sizeof(datasend));
+                }
+                nec_ir_table_start = APP_NEC_IR_TABLE_PREPARE_END;
+            }
+        }
+    }
+#endif
+}
+
+#endif
+
diff --git a/vendor/827x_ble_remote/app_ir.h b/vendor/827x_ble_remote/app_ir.h
new file mode 100644
index 0000000..30c46cb
--- /dev/null
+++ b/vendor/827x_ble_remote/app_ir.h
@@ -0,0 +1,76 @@
+/******************************************************************************
+ * @file     app_ir.h
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+#if APP_IR_OVER_BLE
+
+#ifndef APP_IR_H_
+#define APP_IR_H_
+
+
+typedef enum{
+    ATV_IR_SERVICE_IDX      = IR_PS_H,
+    ATV_IR_PROG_CONTROL_IDX = ATV_IR_SERVICE_IDX+2,
+    ATV_IR_KEY_ID_IDX       = ATV_IR_PROG_CONTROL_IDX+2,
+    ATV_IR_CODE_IDX         = ATV_IR_KEY_ID_IDX+2,
+    ATV_IR_SUPPRESS_IDX     = ATV_IR_CODE_IDX+2,
+    ATV_IR_KEY_EVENT_IDX    = ATV_IR_SUPPRESS_IDX+2,
+    ATV_IR_KEY_EVENT_CCCD_IDX,
+}ATV_IR_IDX;
+
+
+
+typedef enum{
+    KEY_IDX_VOLUP,
+    KEY_IDX_VOLDN,
+    KEY_IDX_MUTE,
+    KEY_IDX_POWER,
+    KEY_IDX_INPUT
+}ATV_IR_KEY_IDX;
+
+typedef void (*app_ir_programming_end_Cb_t)(void);
+extern void ir_flash_set_flag(u8 flag);
+extern void programming_key_set(u8 data);
+extern u8 ir_key_is_suppress(u8 key_idx);
+extern u8 ir_fallback_send_key_code(u8 button_idx, bool key_down);
+extern u8 ir_key_is_suppress(u8 key_idx);
+extern int ir_repeat_delay_release_time(void);
+extern u8 is_programming_key_send(void);
+extern int ir_type_read(void);
+extern void ir_table_init(void);
+extern void ir_flash_factory(void);
+extern void ir_param_init(void);
+extern void ir_flash_erase(void);
+extern void app_ir_programming_end_register(app_ir_programming_end_Cb_t cb);
+extern void ir_init_key_event_notify(u8 value);
+extern int ir_flash_erase_timeoutcb(void);
+extern void ir_flash_save_loop(void);
+extern u8 ir_flash_busy(void);
+extern void ir_nec_ir_table_process(u8 *data,u16 len);
+extern void ir_nec_ir_table_erase_loop(void);
+extern void ir_flash_erase_loop(void);
+extern void app_custom_set_new_ir_table(void);
+extern void ir_suppress_reinit(void);
+#endif
+#endif
diff --git a/vendor/common/blt_soft_timer.h b/vendor/common/blt_soft_timer.h
new file mode 100644
index 0000000..a949478
--- /dev/null
+++ b/vendor/common/blt_soft_timer.h
@@ -0,0 +1,147 @@
+/******************************************************************************
+ * @file     blt_soft_timer.h
+ *
+ * @brief    for TLSR chips
+ *
+ * @author   public@telink-semi.com;
+ * @date     Sep. 30, 2010
+ *
+ * @attention
+ *
+ *  Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
+ *  Copyright (C) Atmosic 2022
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *****************************************************************************/
+
+#ifndef BLT_SOFT_TIMER_H_
+#define BLT_SOFT_TIMER_H_
+
+
+#ifndef CFG_ATM_SDK
+#include "vendor/common/user_config.h"
+#endif
+
+//user define
+#ifndef BLT_SOFTWARE_TIMER_ENABLE
+#define BLT_SOFTWARE_TIMER_ENABLE                    0   //enable or disable
+#endif
+
+
+#define     MAX_TIMER_NUM                            6  //timer max number
+
+
+#define     MAINLOOP_ENTRY                           0
+#define     CALLBACK_ENTRY                           1
+
+
+
+//if t1 < t2  return 1
+#define        TIME_COMPARE_SMALL(t1,t2)   ( (u32)((t2) - (t1)) < BIT(30)  )
+
+// if t1 > t2 return 1
+#define        TIME_COMPARE_BIG(t1,t2)     ( (u32)((t1) - (t2)) < BIT(30)  )
+
+
+#define        BLT_TIMER_SAFE_MARGIN_PRE      (SYSTEM_TIMER_TICK_1US<<7)  //128 us
+#define        BLT_TIMER_SAFE_MARGIN_POST      (SYSTEM_TIMER_TICK_1S<<2)   // 4S
+
+/**
+ * @brief        This function is used to check the current time is what the timer expects or not
+ * @param[in]    t - the time is expired for setting
+ * @param[in]   now - Current system clock time
+ * @return        0 - The current time isn't what the timer expects
+ *                 1 - The current time is what the timer expects
+ */
+static int inline blt_is_timer_expired(u32 t, u32 now) {
+    return ((u32)(now + BLT_TIMER_SAFE_MARGIN_PRE - t) < BLT_TIMER_SAFE_MARGIN_POST);
+}
+
+
+
+
+typedef int (*blt_timer_callback_t)(void);
+
+
+
+
+typedef struct blt_time_event_t {
+    blt_timer_callback_t    cb;
+    u32                     t;
+    u32                     interval;
+} blt_time_event_t;
+
+
+// timer table managemnt
+typedef struct blt_soft_timer_t {
+    blt_time_event_t    timer[MAX_TIMER_NUM];  //timer0 - timer3
+    u8                    currentNum;  //total valid timer num
+} blt_soft_timer_t;
+
+
+
+
+//////////////////////// USER  INTERFACE ///////////////////////////////////
+//return 0 means Fail, others OK
+/**
+ * @brief        This function is used to add new software timer task
+ * @param[in]    func - callback function for software timer task
+ * @param[in]    interval_us - the interval for software timer task
+ * @return      0 - timer task is full, add fail
+ *                 1 - create successfully
+ */
+int     blt_soft_timer_add(blt_timer_callback_t func, u32 interval_us);
+/**
+ * @brief        This function is used to delete timer tasks
+ * @param[in]    func - callback function for software timer task
+ * @return      0 - delete fail
+ *                 1 - delete successfully
+ */
+int     blt_soft_timer_delete(blt_timer_callback_t func);
+
+
+
+
+//////////////////////// SOFT TIMER MANAGEMENT  INTERFACE ///////////////////////////////////
+/**
+ * @brief        This function is used to register the call back for pm_appWakeupLowPowerCb
+ * @param[in]    none
+ * @return      none
+ */
+void     blt_soft_timer_init(void);
+/**
+ * @brief        This function is used to manage software timer tasks
+ * @param[in]    type - the type for trigger
+ * @return      none
+ */
+void     blt_soft_timer_process(int type);
+/**
+ * @brief        Timer tasks are originally ordered. When deleting, it will
+ *                 be overwritten forward, so the order will not be destroyed
+ *                 and there is no need to reorder
+ * @param[in]    index - the index for some software timer task
+ * @return      0 - delete fail
+ *                 other - delete successfully
+ */
+int     blt_soft_timer_delete_by_index(u8 index);
+
+/**
+ * @brief        This function is used to check the current time is what the timer expects or not
+ * @param[in]    e - callback function for software timer task
+ * @return        none
+ */
+int is_timer_expired(blt_timer_callback_t *e);
+
+
+#endif /* BLT_SOFT_TIMER_H_ */