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authorIkjoon Jang <ikjn@google.com>2024-04-09 05:48:40 +0000
committerIkjoon Jang <ikjn@google.com>2024-04-09 09:05:19 +0000
commitfa016935fc9953f24b14c9a6a690aae2d3acfcb6 (patch)
treeb7d084951f067c9be8fe755d7921a9603137d6fe
parent08c84eece740536f426cb5428c09ab16a29bad60 (diff)
downloaduwb-fa016935fc9953f24b14c9a6a690aae2d3acfcb6.tar.gz
Determine chip type
Move parsing code of DEVICE_INFO_RSP::UWB_CHIP_ID to each chip implementation. Bug: 332268554 Test: build sr100 and sr200 + check uwb log on sr200 Merged-in: Id997fabad42024066a8aa180c71e0a79757eb54d Change-Id: Id997fabad42024066a8aa180c71e0a79757eb54d
-rw-r--r--halimpl/hal/phNxpUciHal.cc12
-rw-r--r--halimpl/hal/phNxpUciHal.h7
-rw-r--r--halimpl/hal/sr1xx/NxpUwbChipSr1xx.cc14
-rw-r--r--halimpl/inc/NxpUwbChip.h11
4 files changed, 26 insertions, 18 deletions
diff --git a/halimpl/hal/phNxpUciHal.cc b/halimpl/hal/phNxpUciHal.cc
index baf64b5..8b759c8 100644
--- a/halimpl/hal/phNxpUciHal.cc
+++ b/halimpl/hal/phNxpUciHal.cc
@@ -1063,17 +1063,7 @@ static bool cacheDevInfoRsp()
break;
if (paramId == DEVICE_NAME_PARAM_ID && length >= 6) {
- switch(packet[i + 5]) {
- case DEVICE_TYPE_SR1xxS:
- nxpucihal_ctrl.device_type = DEVICE_TYPE_SR1xxS;
- break;
- case DEVICE_TYPE_SR1xxT:
- nxpucihal_ctrl.device_type = DEVICE_TYPE_SR1xxT;
- break;
- default:
- nxpucihal_ctrl.device_type = DEVICE_TYPE_UNKNOWN;
- break;
- }
+ nxpucihal_ctrl.device_type = nxpucihal_ctrl.uwb_chip->get_device_type(&packet[i], length);
} else if (paramId == FW_VERSION_PARAM_ID && length >= 3) {
nxpucihal_ctrl.fw_version.major_version = packet[i];
nxpucihal_ctrl.fw_version.minor_version = packet[i + 1];
diff --git a/halimpl/hal/phNxpUciHal.h b/halimpl/hal/phNxpUciHal.h
index bba708f..87ee996 100644
--- a/halimpl/hal/phNxpUciHal.h
+++ b/halimpl/hal/phNxpUciHal.h
@@ -83,13 +83,6 @@
#define DEVICE_NAME_PARAM_ID 0x00
-typedef enum {
- DEVICE_TYPE_UNKNOWN = '\0',
- DEVICE_TYPE_SR1xxT = 'T',
- DEVICE_TYPE_SR1xxS = 'S',
- DEVICE_TYPE_SR200 = '2',
-} device_type_t;
-
/* Mem alloc. with 8 byte alignment */
#define nxp_malloc(x) malloc(((x - 1) | 7) + 1)
diff --git a/halimpl/hal/sr1xx/NxpUwbChipSr1xx.cc b/halimpl/hal/sr1xx/NxpUwbChipSr1xx.cc
index fcdc531..3dd0955 100644
--- a/halimpl/hal/sr1xx/NxpUwbChipSr1xx.cc
+++ b/halimpl/hal/sr1xx/NxpUwbChipSr1xx.cc
@@ -418,6 +418,7 @@ public:
tHAL_UWB_STATUS chip_init();
tHAL_UWB_STATUS core_init();
+ device_type_t get_device_type(const uint8_t *param, size_t param_len);
tHAL_UWB_STATUS read_otp(extcal_param_id_t id, uint8_t *data, size_t data_len, size_t *retlen);
tHAL_UWB_STATUS apply_calibration(extcal_param_id_t id, const uint8_t ch, const uint8_t *data, size_t data_len);
@@ -605,6 +606,19 @@ tHAL_UWB_STATUS NxpUwbChipSr1xx::core_init()
return check_binding();
}
+device_type_t NxpUwbChipSr1xx::get_device_type(const uint8_t *param, size_t param_len)
+{
+ // 'SR100S' or 'SR1..T'
+ if (param_len >= 6) {
+ const uint8_t marker = param[5];
+ if (marker == 'S')
+ return DEVICE_TYPE_SR1xxS;
+ else if (marker == 'T')
+ return DEVICE_TYPE_SR1xxT;
+ }
+ return DEVICE_TYPE_UNKNOWN;
+}
+
tHAL_UWB_STATUS NxpUwbChipSr1xx::read_otp(extcal_param_id_t id, uint8_t *data, size_t data_len, size_t *retlen)
{
return sr1xx_read_otp(id, data, data_len, retlen);
diff --git a/halimpl/inc/NxpUwbChip.h b/halimpl/inc/NxpUwbChip.h
index 36d0c92..25ac505 100644
--- a/halimpl/inc/NxpUwbChip.h
+++ b/halimpl/inc/NxpUwbChip.h
@@ -8,6 +8,14 @@
#include "phUwbTypes.h"
+// Chip type
+typedef enum {
+ DEVICE_TYPE_UNKNOWN,
+ DEVICE_TYPE_SR1xxT,
+ DEVICE_TYPE_SR1xxS,
+ DEVICE_TYPE_SR200,
+} device_type_t;
+
// SW defined data structures
typedef enum {
// 6 bytes
@@ -49,6 +57,9 @@ public:
// Binding check, life cycle check.
virtual tHAL_UWB_STATUS core_init() = 0;
+ // Determine device_type_t from DEVICE_INFO_RSP::UWB_CHIP_ID
+ virtual device_type_t get_device_type(const uint8_t* param, size_t param_len) = 0;
+
// Read Calibration parameters storead at OTP
virtual tHAL_UWB_STATUS read_otp(extcal_param_id_t id,
uint8_t *data,