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author | Bernhard Rosenkränzer <Bernhard.Rosenkranzer@linaro.org> | 2013-03-19 16:07:22 +0100 |
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committer | Bernhard Rosenkränzer <Bernhard.Rosenkranzer@linaro.org> | 2013-03-20 11:42:09 +0100 |
commit | d46a8b12c4db7b3f1b493d4b4c8eba1a7c68e0fb (patch) | |
tree | 05930589bb29f582366c6b4ce12958f463640443 | |
parent | 65c9312f0d78bc49c5c74c40b16815814e91aa7f (diff) | |
download | binutils-current-linaro-2.23.51.0.9.tar.gz |
binutils: Fix build with texinfo 5.xlinaro-2.23.51.0.9
Change-Id: I6e21cbe51c6886f34c06c54ab6da20ae86efd503
Signed-off-by: Bernhard Rosenkränzer <Bernhard.Rosenkranzer@linaro.org>
-rw-r--r-- | gas/doc/c-arc.texi | 6 | ||||
-rw-r--r-- | gas/doc/c-arm.texi | 48 | ||||
-rw-r--r-- | gas/doc/c-tic54x.texi | 8 |
3 files changed, 31 insertions, 31 deletions
diff --git a/gas/doc/c-arc.texi b/gas/doc/c-arc.texi index ec7eff4e6..0ff2b099a 100644 --- a/gas/doc/c-arc.texi +++ b/gas/doc/c-arc.texi @@ -199,10 +199,10 @@ and 60, with the following as valid values for @var{mode} The other parameter gives a description of the register having a @var{shortcut} in the pipeline. The valid values are: -@table @code +@itemize @bullet @item can_shortcut @item cannot_shortcut -@end table +@end itemize For example: @@ -220,7 +220,7 @@ The extension instructions are not macros. The assembler creates encodings for use of these instructions according to the specification by the user. The parameters are: -@table @bullet +@table @samp @item @var{name} Name of the extension instruction diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi index 983434f16..aecf7b688 100644 --- a/gas/doc/c-arm.texi +++ b/gas/doc/c-arm.texi @@ -388,7 +388,7 @@ ARM and THUMB instructions had their own, separate syntaxes. The new, @code{unified} syntax, which can be selected via the @code{.syntax} directive, and has the following main features: -@table @bullet +@itemize @bullet @item Immediate operands do not require a @code{#} prefix. @@ -413,7 +413,7 @@ The @code{.N} and @code{.W} suffixes are recognized and honored. @item All instructions set the flags if and only if they have an @code{s} affix. -@end table +@end itemize @node ARM-Chars @subsection Special Characters @@ -449,28 +449,6 @@ Either @samp{#} or @samp{$} can be used to indicate immediate operands. @cindex register names, ARM *TODO* Explain about ARM register naming, and the predefined names. -@node ARM-Neon-Alignment -@subsection NEON Alignment Specifiers - -@cindex alignment for NEON instructions -Some NEON load/store instructions allow an optional address -alignment qualifier. -The ARM documentation specifies that this is indicated by -@samp{@@ @var{align}}. However GAS already interprets -the @samp{@@} character as a "line comment" start, -so @samp{: @var{align}} is used instead. For example: - -@smallexample - vld1.8 @{q0@}, [r0, :128] -@end smallexample - -@node ARM Floating Point -@section Floating Point - -@cindex floating point, ARM (@sc{ieee}) -@cindex ARM floating point (@sc{ieee}) -The ARM family uses @sc{ieee} floating-point numbers. - @node ARM-Relocations @subsection ARM relocation generation @@ -517,6 +495,28 @@ respectively. For example to load the 32-bit address of foo into r0: MOVT r0, #:upper16:foo @end smallexample +@node ARM-Neon-Alignment +@subsection NEON Alignment Specifiers + +@cindex alignment for NEON instructions +Some NEON load/store instructions allow an optional address +alignment qualifier. +The ARM documentation specifies that this is indicated by +@samp{@@ @var{align}}. However GAS already interprets +the @samp{@@} character as a "line comment" start, +so @samp{: @var{align}} is used instead. For example: + +@smallexample + vld1.8 @{q0@}, [r0, :128] +@end smallexample + +@node ARM Floating Point +@section Floating Point + +@cindex floating point, ARM (@sc{ieee}) +@cindex ARM floating point (@sc{ieee}) +The ARM family uses @sc{ieee} floating-point numbers. + @node ARM Directives @section ARM Machine Directives diff --git a/gas/doc/c-tic54x.texi b/gas/doc/c-tic54x.texi index 998c4a705..d2e43fbf5 100644 --- a/gas/doc/c-tic54x.texi +++ b/gas/doc/c-tic54x.texi @@ -109,7 +109,7 @@ In this example, x is replaced with SYM2; SYM2 is replaced with SYM1, and SYM1 is replaced with x. At this point, x has already been encountered and the substitution stops. -@smallexample @code +@smallexample .asg "x",SYM1 .asg "SYM1",SYM2 .asg "SYM2",x @@ -126,14 +126,14 @@ Substitution may be forced in situations where replacement might be ambiguous by placing colons on either side of the subsym. The following code: -@smallexample @code +@smallexample .eval "10",x LAB:X: add #x, a @end smallexample When assembled becomes: -@smallexample @code +@smallexample LAB10 add #10, a @end smallexample @@ -309,7 +309,7 @@ The @code{LDX} pseudo-op is provided for loading the extended addressing bits of a label or address. For example, if an address @code{_label} resides in extended program memory, the value of @code{_label} may be loaded as follows: -@smallexample @code +@smallexample ldx #_label,16,a ; loads extended bits of _label or #_label,a ; loads lower 16 bits of _label bacc a ; full address is in accumulator A |