7 files changed, 100 insertions, 4 deletions
diff --git a/gcc/testsuite/gcc.target/arm/arm.exp b/gcc/testsuite/gcc.target/arm/arm.exp
index 0838d37b3..de5289210 100644
--- a/gcc/testsuite/gcc.target/arm/arm.exp
+++ b/gcc/testsuite/gcc.target/arm/arm.exp
@@ -30,6 +30,11 @@ if ![info exists DEFAULT_CFLAGS] then {
     set DEFAULT_CFLAGS " -ansi -pedantic-errors"
 }
 
+# This variable should only apply to tests called in this exp file.
+global dg_runtest_extra_prunes
+set dg_runtest_extra_prunes ""
+lappend dg_runtest_extra_prunes "warning: switch -m(cpu|arch)=.* conflicts with -m(cpu|arch)=.* switch"
+
 # Initialize `dg'.
 dg-init
 
@@ -38,4 +43,5 @@ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \
 	"" $DEFAULT_CFLAGS
 
 # All done.
+set dg_runtest_extra_prunes ""
 dg-finish
diff --git a/gcc/testsuite/gcc.target/i386/pr54592.c b/gcc/testsuite/gcc.target/i386/pr54592.c
new file mode 100644
index 000000000..20dc11c23
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr54592.c
@@ -0,0 +1,17 @@
+/* PR target/54592 */
+/* { dg-do compile } */
+/* { dg-options "-Os -msse2" } */
+/* { dg-require-effective-target sse2 } */
+
+#include <emmintrin.h>
+
+void
+func (__m128i * foo, size_t a, size_t b, int *dst)
+{
+  __m128i x = foo[a];
+  __m128i y = foo[b];
+  __m128i sum = _mm_add_epi32 (x, y);
+  *dst = _mm_cvtsi128_si32 (sum);
+}
+
+/* { dg-final { scan-assembler "paddd\[^\n\r\]*(\\(\[^\n\r\]*\\)|XMMWORD PTR)" } } */
diff --git a/gcc/testsuite/gcc.target/mips/pr37362.c b/gcc/testsuite/gcc.target/mips/pr37362.c
index a37836640..da34b9d21 100644
--- a/gcc/testsuite/gcc.target/mips/pr37362.c
+++ b/gcc/testsuite/gcc.target/mips/pr37362.c
@@ -1,5 +1,5 @@
 /* mips*-sde-elf doesn't have 128-bit long doubles.  */
-/* { dg-do compile { target { ! mips*-sde-elf } } } */
+/* { dg-do compile { target { ! mips*-sde-elf mips*-mti-elf } } } */
 /* { dg-options "-march=mips64r2 -mabi=n32" } */
 
 typedef float TFtype __attribute__((mode(TF)));
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-get-timebase.c b/gcc/testsuite/gcc.target/powerpc/ppc-get-timebase.c
new file mode 100644
index 000000000..9de8929af
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-get-timebase.c
@@ -0,0 +1,20 @@
+/* { dg-do run { target { powerpc*-*-* } } } */
+
+/* Test if __builtin_ppc_get_timebase () is compatible with the current
+   processor and if it's changing between reads.  A read failure might indicate
+   a Power ISA or binutils change.  */
+
+#include <inttypes.h>
+
+int
+main (void)
+{
+  uint64_t t = __builtin_ppc_get_timebase ();
+  int j;
+
+  for (j = 0; j < 1000000; j++)
+    if (t != __builtin_ppc_get_timebase ())
+      return 0;
+
+  return 1;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-mftb.c b/gcc/testsuite/gcc.target/powerpc/ppc-mftb.c
new file mode 100644
index 000000000..f64e45d1d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-mftb.c
@@ -0,0 +1,18 @@
+/* { dg-do run { target { powerpc*-*-* } } } */
+
+/* Test if __builtin_ppc_mftb () is compatible with the current processor and
+   if it's changing between reads.  A read failure might indicate a Power
+   ISA or binutils change.  */
+
+int
+main (void)
+{
+  unsigned long t = __builtin_ppc_mftb ();
+  int j;
+
+  for (j = 0; j < 1000000; j++)
+    if (t != __builtin_ppc_mftb ())
+      return 0;
+
+  return 1;
+}
diff --git a/gcc/testsuite/gcc.target/sh/pr54089-1.c b/gcc/testsuite/gcc.target/sh/pr54089-1.c
index 2101c5358..77924554f 100644
--- a/gcc/testsuite/gcc.target/sh/pr54089-1.c
+++ b/gcc/testsuite/gcc.target/sh/pr54089-1.c
@@ -2,7 +2,8 @@
 /* { dg-do compile { target "sh*-*-*" } } */
 /* { dg-options "-O1" } */
 /* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } }  */
-/* { dg-final { scan-assembler-times "rotcr" 11 } } */
+/* { dg-final { scan-assembler-times "rotcr" 15 } } */
+/* { dg-final { scan-assembler-times "shll\t" 1 } } */
 
 typedef char bool;
 
@@ -81,3 +82,30 @@ test_10 (int a, int b)
   bool r = a == b;
   return r << 31;
 }
+
+unsigned int
+test_11 (unsigned int a, int b)
+{
+  /* 1x shlr, 1x rotcr  */
+  return (a >> 1) | (b << 31);
+}
+
+unsigned int
+test_12 (unsigned int a, int b)
+{
+  return (a >> 2) | (b << 31);
+}
+
+unsigned int
+test_13 (unsigned int a, int b)
+{
+  return (a >> 3) | (b << 31);
+}
+
+unsigned int
+test_14 (unsigned int a, int b)
+{
+  /* 1x shll, 1x rotcr  */
+  bool r = b < 0;
+  return ((a >> 1) | (r << 31));
+}
diff --git a/gcc/testsuite/gcc.target/sh/pr54236-1.c b/gcc/testsuite/gcc.target/sh/pr54236-1.c
index 3a7453c0d..748b6c9f2 100644
--- a/gcc/testsuite/gcc.target/sh/pr54236-1.c
+++ b/gcc/testsuite/gcc.target/sh/pr54236-1.c
@@ -4,9 +4,9 @@
 /* { dg-do compile { target "sh*-*-*" } } */
 /* { dg-options "-O1" } */
 /* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
-/* { dg-final { scan-assembler-times "addc" 3 } } */
+/* { dg-final { scan-assembler-times "addc" 4 } } */
 /* { dg-final { scan-assembler-times "subc" 3 } } */
-/* { dg-final { scan-assembler-times "sett" 4 } } */
+/* { dg-final { scan-assembler-times "sett" 5 } } */
 /* { dg-final { scan-assembler-times "negc" 1 } } */
 /* { dg-final { scan-assembler-not "movt" } } */
 
@@ -74,3 +74,10 @@ test_07 (int *vec)
 
   return vi;
 }
+
+int
+test_08 (int a)
+{
+  /* 1x addc, 1x sett  */
+  return (a << 1) + 1;
+}