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authorRaphael Zinsly <rzinsly@ventanamicro.com>2024-06-10 07:03:00 -0600
committerJeff Law <jlaw@ventanamicro.com>2024-06-10 07:03:00 -0600
commit3472c1b500cf9184766237bfd3d102aa8451b99f (patch)
treeed4f1f3bbee306ded8d55d0f9a3e35f975f516b9 /libssp/gets-chk.c
parent818e760528d436ea8f6c28ef620e2bb82d456ea1 (diff)
downloadgcc-upstream-master.tar.gz
[to-be-committed] [RISC-V] Use bext for extracting a bit into a SImode objectHEADtrunkmaster
bext is defined as (src >> n) & 1. With that formulation, particularly the "&1" means the result is implicitly zero extended. So we can safely use it on SI objects for rv64 without the need to do any explicit extension. This patch adds the obvious pattern and a few testcases. I think one of the tests is derived from coremark, the other two from spec2017. This has churned through Ventana's CI system repeatedly since it was first written. Assuming pre-commit CI doesn't complain, I'll commit it on Raphael's behalf later today or Monday. gcc/ * config/riscv/bitmanip.md (*bextdisi): New pattern. gcc/testsuite * gcc.target/riscv/bext-ext.c: New test.
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