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2024-04-18Refactored sym-exec: Added comments, changed members' names ...devel/jlaw/crcMariam Arutunian
2023-03-21Many more comments. Use a vec<bool> when we only care about 0/1.Jeff Law
2023-03-21Use word mode.Jeff Law
2023-03-21NFC: Formatting fixesJeff Law
2023-03-21Changes in CRC code generation v6:Mariam Arutunian
2023-03-21Changes in CRC code generation v5:Mariam Arutunian
2023-03-21Changes in CRC code generation v4:Mariam Arutunian
2023-03-21Changes in CRC code generation v3:Mariam Arutunian
2023-03-21CRC code generation v2:Mariam Arutunian
2023-03-21CRC code generation v1: - Added CRC_IFN, with not complete function body. - R...Mariam Arutunian
2023-03-21Addition in testsuit: - Added gcc/testsuite/gcc.dg/crc-misc.c test - In crc-2...Mariam Arutunian
2023-03-21Changes in LFSR matching v6:Mariam Arutunian
2023-03-21sym-exec v14 - Added utilities for complementing bits of value which has spec...matevos
2023-03-21Changes in CRC detection v6:Mariam Arutunian
2023-03-21sym-exec v13 - Some code refactored - Fixed memory leaks - Added checks for r...matevos
2023-03-21Changes in CRC detection v5:Mariam Arutunian
2023-03-21sym-exec v12: - Made expression to work with various argument sizes - Fixed b...matevos
2023-03-21Refactored all files. Renamed gcc/symb-execute-all-paths.cc/h files to gcc/gc...Mariam Arutunian
2023-03-21sym-exec v11 - Fixed assignment expression - Removed condition_type enum: use...matevos
2023-03-21Changes in LFSR matching v3:Mariam Arutunian
2023-03-21sym-exec v10 - Added sign number support - Done a fix in XOR optimization - D...matevos
2023-03-21Chnages in testsuit: - Added -fdisable-tree-phiopt2 -fdisable-tree-phiopt3 fl...Mariam Arutunian
2023-03-21sym-exec v9 - Added conditions printing support - Optimized conditions adding...matevos
2023-03-21Added LFSR matching v1:Mariam Arutunian
2023-03-21sym-exec v7 - Fixed constant value to bit conversion - Fixed shift left and x...matevos
2023-03-21Added LFSR creation v1:Mariam Arutunian
2023-03-21Added Extract polynomial v1: - Execute crc loop with concete numbers to calcu...Mariam Arutunian
2023-03-21Changes in Traverse and execute CRC function v6: - Changed symbolic execution...Mariam Arutunian
2023-03-21sym-exec v5: - Added last added condition status saving support - Save only c...matevos
2023-03-21Changes in CRC detection v3: - Changed get_dep and other functions called in ...Mariam Arutunian
2023-03-21Changes in Traverse and execute CRC function v5: - Determine phi's value depe...Mariam Arutunian
2023-03-21sym-exec v4: - Fixed condition adding - Returning expression doing and condit...matevos
2023-03-21Changes in Traverse and execute CRC function v4: - Don't add values for virtu...Mariam Arutunian
2023-03-21Changes in Traverse and execute CRC function v3: - Assign value to phi's resu...Mariam Arutunian
2023-03-21sym-exec v3: - Refactored code and fixed style - Added util functions - Fixed...matevos
2023-03-21Changes in Traverse and execute CRC function v2: - Added support of traversin...Mariam Arutunian
2023-03-21sym-exec v2: - Done refactoring in expression.* and state.* - Added is-a-help...Mariam Arutunian
2023-03-21Traverse and execute CRC function v1: - Added get_function_local_ssa_vars and...Mariam Arutunian
2023-03-21symb_exec v1: - Added gcc/sym-exec/expression.h/.cc and gcc/sym-exec/state.h/...Mariam Arutunian
2023-03-21CRC detection v1: - Added pass_crc_optimization. Detects CRC-like functions. ...Mariam Arutunian
2023-03-05Fortran: fix CLASS attribute handling [PR106856]Harald Anlauf
2023-03-05testsuite: Fix up syntax error in scan-tree-dump-times target selectorJakub Jelinek
2023-03-06RISC-V: Fix ICE for avl_single-86/avl_single-88/avl_single-90Ju-Zhe Zhong
2023-03-06RISC-V: Implement ZKSH and ZKSED extensionsLiao Shihua
2023-03-06RISC-V: Implement ZKNH extensionLiao Shihua
2023-03-06RISC-V: Implement ZKND and ZKNE extensionsLiao Shihua
2023-03-06RISC-V: Implement ZBKB, ZBKC and ZBKX extensionsLiao Shihua
2023-03-06RISC-V: Add prototypes for RISC-V Crypto built-in functionsLiao Shihua
2023-03-05RISC-V: costs: miscomputed shiftadd_cost triggering synth_mult [PR/108987]Vineet Gupta
2023-03-05RISC-V: Add RVV misc intrinsic supportJu-Zhe Zhong