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authorCraig Topper <craig.topper@intel.com>2018-03-01 00:08:38 +0000
committerYi Kong <yikong@google.com>2018-03-27 16:41:38 -0700
commit5154c3238e4c7df6c62294dd338e76a3afb9a621 (patch)
tree3795c4c276a0350e0a32294d139a1112b21da2df
parentf08e14a6c79bf8fc7998e74f05f479cfcc54ce70 (diff)
downloadllvm-5154c3238e4c7df6c62294dd338e76a3afb9a621.tar.gz
[X86] Make sure we don't combine (fneg (fma X, Y, Z)) to a target specific node when there are no FMA instructions.
This would cause a 'cannot select' error at isel when we should have emitted a lib call and an xor. Fixes PR36553. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326393 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp2
-rw-r--r--test/CodeGen/X86/pr36553.ll20
2 files changed, 21 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 6600cc5dfb3..01a5f467a4f 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -34321,7 +34321,7 @@ static SDValue combineFneg(SDNode *N, SelectionDAG &DAG,
// If we're negating an FMA node, then we can adjust the
// instruction to include the extra negation.
unsigned NewOpcode = 0;
- if (Arg.hasOneUse()) {
+ if (Arg.hasOneUse() && Subtarget.hasAnyFMA()) {
switch (Arg.getOpcode()) {
case ISD::FMA: NewOpcode = X86ISD::FNMSUB; break;
case X86ISD::FMSUB: NewOpcode = X86ISD::FNMADD; break;
diff --git a/test/CodeGen/X86/pr36553.ll b/test/CodeGen/X86/pr36553.ll
new file mode 100644
index 00000000000..827f80a3e07
--- /dev/null
+++ b/test/CodeGen/X86/pr36553.ll
@@ -0,0 +1,20 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
+
+; Make sure we don't crash because we negated an fma when we didn't have any fma instructions.
+
+define float @pr36553(float %a, float %b, float %c) nounwind {
+; CHECK-LABEL: pr36553:
+; CHECK: ## %bb.0: ## %entry
+; CHECK-NEXT: pushq %rax
+; CHECK-NEXT: callq _fmaf
+; CHECK-NEXT: xorps {{.*}}(%rip), %xmm0
+; CHECK-NEXT: popq %rax
+; CHECK-NEXT: retq
+entry:
+ %0 = tail call float @llvm.fma.f32(float %a, float %b, float %c)
+ %sub = fsub float -0.000000e+00, %0
+ ret float %sub
+}
+
+declare float @llvm.fma.f32(float, float, float)