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authorAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>2015-03-20 12:28:49 +0000
committerAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>2015-03-20 12:28:49 +0000
commitb385e06ccd2b2e58f9af0c443379b1dc03df450d (patch)
tree6acc9a5ea965fac9b8b7c183848495b6adc54d27
parentaf546269c0ece2f4f8ee80e8079b89f28b60ca17 (diff)
downloadllvm-b385e06ccd2b2e58f9af0c443379b1dc03df450d.tar.gz
[release_36] Cherry-pick r231219.
Original message: [DAGCombine] Fix a bug in a BUILD_VECTOR combine When trying to convert a BUILD_VECTOR into a shuffle, we try to split a single source vector that is twice as wide as the destination vector. We can not do this when we also need the zero vector to create a blend. This fixes PR22774. Differential Revision: http://reviews.llvm.org/D8040 git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@232807 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/SelectionDAG/DAGCombiner.cpp5
-rw-r--r--test/CodeGen/X86/pr22774.ll20
2 files changed, 23 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index a71825836bd..e84608476cb 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -11047,7 +11047,9 @@ SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) {
} else if (VecInT.getSizeInBits() == VT.getSizeInBits() * 2) {
// If the input vector is too large, try to split it.
// We don't support having two input vectors that are too large.
- if (VecIn2.getNode())
+ // If the zero vector was used, we can not split the vector,
+ // since we'd need 3 inputs.
+ if (UsesZeroVector || VecIn2.getNode())
return SDValue();
if (!TLI.isExtractSubvectorCheap(VT, VT.getVectorNumElements()))
@@ -11059,7 +11061,6 @@ SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) {
DAG.getConstant(VT.getVectorNumElements(), TLI.getVectorIdxTy()));
VecIn1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, VecIn1,
DAG.getConstant(0, TLI.getVectorIdxTy()));
- UsesZeroVector = false;
} else
return SDValue();
}
diff --git a/test/CodeGen/X86/pr22774.ll b/test/CodeGen/X86/pr22774.ll
new file mode 100644
index 00000000000..426fcc43e30
--- /dev/null
+++ b/test/CodeGen/X86/pr22774.ll
@@ -0,0 +1,20 @@
+; RUN: llc -mattr=avx %s -o - | FileCheck %s
+
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-pc-linux-gnu"
+
+@in = global <4 x i64> <i64 -1, i64 -1, i64 -1, i64 -1>, align 32
+@out = global <2 x i64> zeroinitializer, align 16
+
+define i32 @_Z3foov() {
+entry:
+; CHECK: {{vmovdqa|vmovaps}} in(%rip), %ymm0
+; CHECK-NEXT: vmovq %xmm0, %xmm0
+; CHECK-NEXT: {{vmovdqa|vmovaps}} %xmm0, out(%rip)
+ %0 = load <4 x i64>* @in, align 32
+ %vecext = extractelement <4 x i64> %0, i32 0
+ %vecinit = insertelement <2 x i64> undef, i64 %vecext, i32 0
+ %vecinit1 = insertelement <2 x i64> %vecinit, i64 0, i32 1
+ store <2 x i64> %vecinit1, <2 x i64>* @out, align 16
+ ret i32 0
+}