Reland r306095: [mips] Fix reg positions in the aui/daui instructions

After fixing (r306173) a failing test in the lld test suite (r306173),
reland r306095.

Original commit message:

  [mips] Fix register positions in the aui/daui instructions

  Swapped the position of the rt and rs register in the aui/daui
  instructions for mips32r6 and mips64r6. With this change, the format of
  the generated instructions complies with specifications and GCC.
  Patch by Milos Stojanovic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306174 91177308-0d34-0410-b5e6-96231b3b80d8

7 files changed, 12 insertions, 12 deletions

diff --git a/lib/Target/Mips/Mips32r6InstrInfo.td b/lib/Target/Mips/Mips32r6InstrInfo.td
index 3272319ad50..7daea163b8a 100644
--- a/lib/Target/Mips/Mips32r6InstrInfo.td
+++ b/lib/Target/Mips/Mips32r6InstrInfo.td
@@ -326,9 +326,9 @@ class AUIPC_DESC : ALUIPC_DESC_BASE<"auipc", GPR32Opnd, II_AUIPC>;
 class AUI_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
                     InstrItinClass itin = NoItinerary>
       : MipsR6Arch<instr_asm> {
-  dag OutOperandList = (outs GPROpnd:$rs);
-  dag InOperandList = (ins GPROpnd:$rt, uimm16:$imm);
-  string AsmString = !strconcat(instr_asm, "\t$rs, $rt, $imm");
+  dag OutOperandList = (outs GPROpnd:$rt);
+  dag InOperandList = (ins GPROpnd:$rs, uimm16:$imm);
+  string AsmString = !strconcat(instr_asm, "\t$rt, $rs, $imm");
   list<dag> Pattern = [];
   InstrItinClass Itinerary = itin;
 }
diff --git a/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt b/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
index 30f85c20f80..946e8d885bb 100644
--- a/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
+++ b/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
@@ -4,7 +4,7 @@
 0x0a 0x00 0x29 0x25 # CHECK: addiu $9, $9, 10
 0xa0 0x22 0x43 0x7c # CHECK: align $4, $2, $3, 2
 0x38 0x00 0x7f 0xec # CHECK: aluipc $3, 56
-0xe9 0xff 0x62 0x3c # CHECK: aui $3, $2, 65513
+0xe9 0xff 0x43 0x3c # CHECK: aui $3, $2, 65513
 0xff 0xff 0x7e 0xec # CHECK: auipc $3, -1
 0x9b 0x14 0x11 0x04 # CHECK: bal 21104
 0xb8 0x96 0x37 0xe8 # CHECK: balc 14572260
diff --git a/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt b/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
index efc2b401a30..7d2d62714c1 100644
--- a/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
+++ b/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
@@ -60,7 +60,7 @@
 0x25 0x29 0x00 0x0a # CHECK: addiu $9, $9, 10
 0x30 0x42 0x00 0x04 # CHECK: andi $2, $2, 4
 0x34 0x42 0x00 0x04 # CHECK: ori $2, $2, 4
-0x3c 0x62 0xff 0xe9 # CHECK: aui $3, $2, 65513
+0x3c 0x43 0xff 0xe9 # CHECK: aui $3, $2, 65513
 0x40 0x08 0x78 0x01 # CHECK: mfc0 $8, $15, 1
 0x40 0x08 0x80 0x03 # CHECK: mfc0 $8, $16, 3
 0x40 0x89 0x78 0x01 # CHECK: mtc0 $9, $15, 1
diff --git a/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt b/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
index f436b873aa1..eefd8c6e761 100644
--- a/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
+++ b/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
@@ -4,7 +4,7 @@
 0xa0 0x22 0x43 0x7c # CHECK: align $4, $2, $3, 2
 0x38 0x00 0x7f 0xec # CHECK: aluipc $3, 56
 0x04 0x00 0x42 0x30 # CHECK: andi $2, $2, 4
-0xe9 0xff 0x62 0x3c # CHECK: aui $3, $2, 65513
+0xe9 0xff 0x43 0x3c # CHECK: aui $3, $2, 65513
 0xff 0xff 0x7e 0xec # CHECK: auipc $3, -1
 0x9b 0x14 0x11 0x04 # CHECK: bal 21104
 0xb8 0x96 0x37 0xe8 # CHECK: balc 14572260
@@ -97,7 +97,7 @@
 0x78 0x56 0x66 0x04 # CHECK: dahi $3, $3, 22136
 0xcd 0xab 0x7e 0x04 # CHECK: dati $3, $3, 43981
 0x64 0x23 0x43 0x7c # CHECK: dalign $4, $2, $3, 5
-0x34 0x12 0x62 0x74 # CHECK: daui $3, $2, 4660
+0x34 0x12 0x43 0x74 # CHECK: daui $3, $2, 4660
 0x24 0x20 0x02 0x7c # CHECK: dbitswap $4, $2
 0x53 0x90 0xc0 0x00 # CHECK: dclo $18, $6
 0x52 0x80 0x20 0x03 # CHECK: dclz $16, $25
diff --git a/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt b/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
index 15c9ca1082e..89c49e28dc6 100644
--- a/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
+++ b/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
@@ -77,7 +77,7 @@
 0x25 0x29 0x00 0x0a # CHECK: addiu $9, $9, 10
 0x30 0x42 0x00 0x04 # CHECK: andi $2, $2, 4
 0x34 0x42 0x00 0x04 # CHECK: ori $2, $2, 4
-0x3c 0x62 0xff 0xe9 # CHECK: aui $3, $2, 65513
+0x3c 0x43 0xff 0xe9 # CHECK: aui $3, $2, 65513
 0x40 0x08 0x78 0x01 # CHECK: mfc0 $8, $15, 1
 0x40 0x08 0x80 0x03 # CHECK: mfc0 $8, $16, 3
 0x40 0x38 0x50 0x00 # CHECK: dmfc0 $24, $10, 0
@@ -197,7 +197,7 @@
 0x60 0x82 0x00 0x01 # CHECK: bnvc $4, $2, 8
 0x60 0xa6 0x00 0x40 # CHECK: bnec $5, $6, 260
 0x60 0x43 0xff 0xfa # CHECK: bnec $2, $3, -20
-0x74 0x62 0x12 0x34 # CHECK: daui $3, $2, 4660
+0x74 0x43 0x12 0x34 # CHECK: daui $3, $2, 4660
 0x7c 0x02 0x20 0x20 # CHECK: bitswap $4, $2
 0x7c 0x02 0x20 0x24 # CHECK: dbitswap $4, $2
 0x7c 0x43 0x22 0xa0 # CHECK: align $4, $2, $3, 2
diff --git a/test/MC/Mips/mips32r6/valid.s b/test/MC/Mips/mips32r6/valid.s
index 5a3e9dff0ad..f9fc16d4a26 100644
--- a/test/MC/Mips/mips32r6/valid.s
+++ b/test/MC/Mips/mips32r6/valid.s
@@ -20,7 +20,7 @@ a:
         addu    $9,10            # CHECK: addiu $9, $9, 10    # encoding: [0x25,0x29,0x00,0x0a]
         align   $4, $2, $3, 2    # CHECK: align $4, $2, $3, 2 # encoding: [0x7c,0x43,0x22,0xa0]
         aluipc  $3, 56           # CHECK: aluipc $3, 56       # encoding: [0xec,0x7f,0x00,0x38]
-        aui     $3, $2, 23       # CHECK: aui $3, $2, 23      # encoding: [0x3c,0x62,0x00,0x17]
+        aui     $3, $2, 23       # CHECK: aui $3, $2, 23      # encoding: [0x3c,0x43,0x00,0x17]
         auipc   $3, -1           # CHECK: auipc $3, -1        # encoding: [0xec,0x7e,0xff,0xff]
         bal     21100            # CHECK: bal 21100           # encoding: [0x04,0x11,0x14,0x9b]
         balc 14572256            # CHECK: balc 14572256       # encoding: [0xe8,0x37,0x96,0xb8]
diff --git a/test/MC/Mips/mips64r6/valid.s b/test/MC/Mips/mips64r6/valid.s
index 3b365a75431..a86b3c915e8 100644
--- a/test/MC/Mips/mips64r6/valid.s
+++ b/test/MC/Mips/mips64r6/valid.s
@@ -20,7 +20,7 @@ a:
         align   $4, $2, $3, 2    # CHECK: align $4, $2, $3, 2 # encoding: [0x7c,0x43,0x22,0xa0]
         aluipc  $3, 56           # CHECK: aluipc $3, 56       # encoding: [0xec,0x7f,0x00,0x38]
         and     $2,4             # CHECK: andi $2, $2, 4      # encoding: [0x30,0x42,0x00,0x04]
-        aui     $3, $2, 23       # CHECK: aui $3, $2, 23      # encoding: [0x3c,0x62,0x00,0x17]
+        aui     $3, $2, 23       # CHECK: aui $3, $2, 23      # encoding: [0x3c,0x43,0x00,0x17]
         auipc   $3, -1           # CHECK: auipc $3, -1        # encoding: [0xec,0x7e,0xff,0xff]
         bal     21100            # CHECK: bal 21100           # encoding: [0x04,0x11,0x14,0x9b]
         balc 14572256            # CHECK: balc 14572256       # encoding: [0xe8,0x37,0x96,0xb8]
@@ -106,7 +106,7 @@ a:
         dahi    $3, $3, 0x5678   # CHECK: dahi $3, $3, 22136     # encoding: [0x04,0x66,0x56,0x78]
         dalign  $4,$2,$3,5       # CHECK: dalign $4, $2, $3, 5 # encoding: [0x7c,0x43,0x23,0x64]
         dati     $3, $3, 0xabcd  # CHECK: dati $3, $3, 43981   # encoding: [0x04,0x7e,0xab,0xcd]
-        daui     $3, $2, 0x1234  # CHECK: daui $3, $2, 4660    # encoding: [0x74,0x62,0x12,0x34]
+        daui     $3, $2, 0x1234  # CHECK: daui $3, $2, 4660    # encoding: [0x74,0x43,0x12,0x34]
         dbitswap $4, $2          # CHECK: dbitswap $4, $2    # encoding: [0x7c,0x02,0x20,0x24]
         dclo    $s2,$a2          # CHECK: dclo $18, $6           # encoding: [0x00,0xc0,0x90,0x53]
         dclz    $s0,$25          # CHECK: dclz $16, $25          # encoding: [0x03,0x20,0x80,0x52]