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Diffstat (limited to 'test/CodeGen/Hexagon/cmp-to-genreg.ll')
-rw-r--r--test/CodeGen/Hexagon/cmp-to-genreg.ll8
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/Hexagon/cmp-to-genreg.ll b/test/CodeGen/Hexagon/cmp-to-genreg.ll
index d0df1681513..a3658fb0c83 100644
--- a/test/CodeGen/Hexagon/cmp-to-genreg.ll
+++ b/test/CodeGen/Hexagon/cmp-to-genreg.ll
@@ -2,7 +2,7 @@
; Check that we generate compare to general register.
define i32 @compare1(i32 %a) nounwind {
-; CHECK: r{{[0-9]+}}{{ *}}={{ *}}cmp.eq(r{{[0-9]+}},{{ *}}#120)
+; CHECK: r{{[0-9]+}} = cmp.eq(r{{[0-9]+}},#120)
entry:
%cmp = icmp eq i32 %a, 120
%conv = zext i1 %cmp to i32
@@ -10,7 +10,7 @@ entry:
}
define i32 @compare2(i32 %a) nounwind readnone {
-; CHECK: r{{[0-9]+}}{{ *}}={{ *}}!cmp.eq(r{{[0-9]+}},{{ *}}#120)
+; CHECK: r{{[0-9]+}} = !cmp.eq(r{{[0-9]+}},#120)
entry:
%cmp = icmp ne i32 %a, 120
%conv = zext i1 %cmp to i32
@@ -18,7 +18,7 @@ entry:
}
define i32 @compare3(i32 %a, i32 %b) nounwind readnone {
-; CHECK: r{{[0-9]+}}{{ *}}={{ *}}cmp.eq(r{{[0-9]+}},{{ *}}r{{[0-9]+}})
+; CHECK: r{{[0-9]+}} = cmp.eq(r{{[0-9]+}},r{{[0-9]+}})
entry:
%cmp = icmp eq i32 %a, %b
%conv = zext i1 %cmp to i32
@@ -26,7 +26,7 @@ entry:
}
define i32 @compare4(i32 %a, i32 %b) nounwind readnone {
-; CHECK: r{{[0-9]+}}{{ *}}={{ *}}!cmp.eq(r{{[0-9]+}},{{ *}}r{{[0-9]+}})
+; CHECK: r{{[0-9]+}} = !cmp.eq(r{{[0-9]+}},r{{[0-9]+}})
entry:
%cmp = icmp ne i32 %a, %b
%conv = zext i1 %cmp to i32