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Summary:
This rule was always in the old SysV i386 ABI docs and the new ones that
H.J. Lu has put together, but we never noticed:
EAX scratch register; also used to return integer and pointer values
from functions; also stores the address of a returned struct or union
Fixes PR23491.
Reviewers: majnemer
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D9715
Change-Id: Iee9c022600e3df39560ad07b61ebce37501451c5
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Change-Id: If5351b76e0fcbf81296cef7a4b21176a50c0f8bc
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Fix a problem where the AArch64 ELF assembler was failing with
-no-exec-stack. This was due to it not deriving from the correct asm
info base class and missing the override for the exec stack section
query. Added another line to the noexec test line to make sure this
doesn't regress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227074 91177308-0d34-0410-b5e6-96231b3b80d8
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Cross compiler for windows may run on case-sensitive OS
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eg. fseeko is defined as fseeko64 mingw/include/stdio.h and
collide with other member in enum Func of the same name
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To match gcc behavior and avoid ld warning like this on project using
prebuilts/ndk 's libc++
.../ld: warning: creating a DT_TEXTREL in a shared object.
(*1)
switch_to_exception_section (const char * ARG_UNUSED (fnname))
{
....
if (EH_TABLES_CAN_BE_READ_ONLY)
{
int tt_format =
ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0, /*global=*/1); # DW_EH_PE_indirect which is 0x80
flags = ((! flag_pic
|| ((tt_format & 0x70) != DW_EH_PE_absptr/*0x00*/
&& (tt_format & 0x70) != DW_EH_PE_aligned/*0x50*/))
? 0 : SECTION_WRITE);
}
else
flags = SECTION_WRITE;
...
}
Note that PIC is the default for Android toolchain. For MIPS,
ASM_PREFERRED_EH_DATA_FORMAT returns 0x80 and fails condition
about "DW_EH_PE_absptr"
The exact reason why .gcc_except_table contain reloc (and causes
ld warning turns in to error thanks to -Wl,--fatal-warnings when it
isn't writable thus requires load-time fixup in read-only section
and security concern) isn't well understood, though
Change-Id: I5e05ee052af48f06e8c4e3a01c317f4010a2ddaf
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.. to python26 python2 python as some distros have python == python3
Change-Id: I2e1fbb6aa23614abc6df1581097400a31b7badac
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See previous CLs for details about Cortex-A53 erratum (835769)
Flag aarch64-fix-cortex-a53-835769 is set to 1 or 0 by clang,
depending on the presence of -mfix-cortex-a53-835769 or
-mno-fix-cortex-a53-835769. If neither is given,
this CL changes the default to "true" for aarch64-fix-cortex-a53-835769.
It makes sense to have this workaround enabled by default in Android
when apps generated by NDK toolchains can potentially run on affected A53.
Android platform clang can specify -mno-fix-cortex-a53-835769 to disable this
workaround for A53 known to be not affected.
This changes also match the behavior in GCC r216079 when it's configured with
--enable-fix-cortex-a53-835769, which is the case for NDK toolchains.
Change-Id: I56d6c273f79c25d18e2cdd1b61015f35082bbb23
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This assertion is valid on single bitcode codegen.
However, if we uses llvm-link many bitcodes, then llc.
It may bump this assertion failure but everything should be fine.
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This is ported from release_35 branch with following commits:
* [ndk][pndk] Unknown arch support for 64bit. Also add PIE support.
WenHan Gu <Wenhan.gu@mediatek.com>
* [ndk][pndk] Fix ndk-link after rebasing to LLVM upstream 6/25.
Logan Chien <tzuhsiang.chien@gmail.com>
* [ndk][pndk] Implement ndk-translate on unknown 64-bit abi.
WenHan Gu <Wenhan.gu@mediatek.com>
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So $NDK/build/tools/build-llvm.sh can add -DDISABLE_FUTIMENS
to remove dependencies of llvm binraries to futimens@GLIBC_2.6
doesn't exist in libc.so of some old linux systems.
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Change-Id: Ie055ec1890350cd65cd496fe6416031a1248efb0
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Add an option --enable-shrink-binary-size to reduce the cross-
compiled LLVM binaries size.
This patch will pass -fdata-sections and -ffunction-sections to $(CXX)
and --gc-sections to the $(LD) when --enable-shrink-binary-size is
enabled. This option is disabled by default; otherwise, the LLVM tools
might not be able to load plugins (eg. LLVMPolly.so)
This is ported from release_33 and release_34 branch, and squashing
following patches:
[1bb7be3] (release_33) WenHan Gu <Wenhan.gu@mediatek.com>
Shrink binary sizes when cross-compiling.
[6230037] (release_33) Ray Donnelly <mingw.android@gmail.com>
Fixes for "Shrink binary sizes when cross-compiling."
[43153c9] (release_33) Ray Donnelly <mingw.android@gmail.com>
Fix config comment about -Wl,--gc-sections.
[d44086b] (release_34) Lai Wei-Chih <Robert.Lai@mediatek.com>
Add an option --enable-shrink-binary-size to configure.
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1. Add new two new flags: CFLAGS_FOR_BUILD and LDFLAGS_FOR_BUILD
and use them in $BUILD_CC test.
2. Unset $LDFLAGS in cross-compile-build-tools.
3. $ARCH can be overrided by environment variable.
Cherry-picked from release_34 branch.
Regenerated with ./autoconf/AutoRegen.sh.
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Author: Lai Wei-Chih <Robert.Lai@mediatek.com>
Author: WenHan Gu <Wenhan.gu@mediatek.com>
Author: Andrew Hsieh <andrewhsieh@google.com>
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Author: Lai Wei-Chih <Robert.Lai@mediatek.com>;
Author: WenHan Gu <Wenhan.gu@mediatek.com>;
Author: Logan Chien <loganchien@google.com>;
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* kAndroidBitcodeType
Generate this bitcode for shared object or executable.
* kAndroidLDFlags
Store linker flags for this bitcode.
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source:
https://android.googlesource.com/platform/frameworks/compile/libbcc/
commit: 25b7205e16e422469da74f88e74ad79e7c284ac7
libbcc/bcinfo
libbcc/include/bcinfo
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Change-Id: I1b09d34632e59997402b034e7e652998ef8a8faa
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Add an option to store the stack protector cookie
in the global variable.
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NDK armeabi default use -msoft-float, and it cannot truely use
fenv.h since it has vmrs,vmsr inline asm.
Change-Id: If49045f2bfed0f33f7dc9156d5eea3bda89ad90a
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Original message:
[DAGCombine] Fix a bug in a BUILD_VECTOR combine
When trying to convert a BUILD_VECTOR into a shuffle, we try to split a single source vector that is twice as wide as the destination vector.
We can not do this when we also need the zero vector to create a blend.
This fixes PR22774.
Differential Revision: http://reviews.llvm.org/D8040
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@232807 91177308-0d34-0410-b5e6-96231b3b80d8
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Original message:
[X86] Fix wrong target specific combine on SETCC nodes.
Part of the folding logic implemented by function 'PerformISDSETCCCombine'
only worked under the assumption that the condition code in input could have
been either SETNE or SETEQ.
Unfortunately that assumption was incorrect, and in some cases the algorithm
ended up incorrectly folding SETCC nodes.
The incorrect folding only affected SETCC dag nodes where:
- one of the operands was a build_vector of all zeroes;
- the other operand was a SIGN_EXTEND from a vector of MVT:i1 elements;
- the condition code was neither SETNE nor SETEQ.
Example:
(setcc (v4i32 (sign_extend v4i1:%A)), (v4i32 VectorOfAllZeroes), setge)
Before this patch, the entire dag node sequence from the example was
incorrectly folded to node %A.
With this patch, the dag node sequence is folded to a
(xor %A, (v4i1 VectorOfAllOnes)).
Added test setcc-combine.ll.
Thanks to Greg Bedwell for spotting this issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@232804 91177308-0d34-0410-b5e6-96231b3b80d8
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Original commit message:
[X86][AVX] Fix wrong lowering of VPERM2X128 nodes
There were cases where the backend computed a wrong permute mask for a VPERM2X128 node.
Example:
\code
define <8 x float> @foo(<8 x float> %a, <8 x float> %b) {
%shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 undef, i32 undef, i32 6, i32 7, i32 undef, i32 undef, i32 6, i32 7>
ret <8 x float> %shuffle
}
\code end
Before this patch, llc (with -mattr=+avx) emitted the following vperm2f128:
vperm2f128 $0, %ymm0, %ymm0, %ymm0 # ymm0 = ymm0[0,1,0,1]
With this patch, llc emits a vperm2f128 with a correct permute mask:
vperm2f128 $17, %ymm0, %ymm0, %ymm0 # ymm0 = ymm0[2,3,2,3]
Differential Revision: http://reviews.llvm.org/D8119
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@232803 91177308-0d34-0410-b5e6-96231b3b80d8
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Original commit message:
[X86][AVX] Fix wrong lowering of v4x64 shuffles into concat_vector plus extract_subvector nodes.
This patch fixes a bug in the shuffle lowering logic implemented by function
'lowerV2X128VectorShuffle'.
The are few cases where function 'lowerV2X128VectorShuffle' wrongly expands a
shuffle of two v4X64 vectors into a CONCAT_VECTORS of two EXTRACT_SUBVECTOR
nodes. The problematic expansion only occurs when the shuffle mask M has an
'undef' element at position 2, and M is equivalent to mask <0,1,4,5>.
In that case, the algorithm propagates the wrong vector to one of the two
new EXTRACT_SUBVECTOR nodes.
Example:
;;
define <4 x double> @test(<4 x double> %A, <4 x double> %B) {
entry:
%0 = shufflevector <4 x double> %A, <4 x double> %B, <4 x i32><i32 undef, i32 1, i32 undef, i32 5>
ret <4 x double> %0
}
;;
Before this patch, llc (-mattr=+avx) generated:
vinsertf128 $1, %xmm0, %ymm0, %ymm0
With this patch, llc correctly generates:
vinsertf128 $1, %xmm1, %ymm0, %ymm0
Added test lower-vec-shuffle-bug.ll
Differential Revision: http://reviews.llvm.org/D8259
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@232753 91177308-0d34-0410-b5e6-96231b3b80d8
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Original commit message:
Summary:
ScalarEvolutionExpander assumes that the header block of a loop is a
legal place to have a use for a phi node. This is true only for phis
that are either in the header or dominate the header block, but it is
not true for phi nodes that are strictly internal to the loop body.
This change teaches ScalarEvolutionExpander to place uses of PHI nodes
in the basic block the PHI nodes belong to. This is always legal, and
`hoistIVInc` ensures that the said position dominates `IsomorphicInc`.
Reviewers: atrick
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D8311
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@232416 91177308-0d34-0410-b5e6-96231b3b80d8
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Original commit message:
[X86] Fix a regression introduced by r223641.
The permps and permd instructions have their operands swapped compared to the
intrinsic definition. Therefore, they do not fall into the INTR_TYPE_2OP
category.
I did not create a new category for those two, as they are the only one AFAICT
in that case.
<rdar://problem/20108262>
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r227089 | vkalintiris | 2015-01-26 13:33:22 +0100 (Mon, 26 Jan 2015) | 15 lines
[mips] Enable arithmetic and binary operations for the i128 data type.
Summary:
This patch adds support for some operations that were missing from
128-bit integer types (add/sub/mul/sdiv/udiv... etc.). With these
changes we can support the __int128_t and __uint128_t data types
from C/C++.
Depends on D7125
Reviewers: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D7143
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@231860 91177308-0d34-0410-b5e6-96231b3b80d8
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r227087 | vkalintiris | 2015-01-26 13:04:40 +0100 (Mon, 26 Jan 2015) | 7 lines
[mips] Add tests for bitwise binary and integer arithmetic operators.
Reviewers: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D7125
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@231857 91177308-0d34-0410-b5e6-96231b3b80d8
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[DAGCombiner] Fix wrong folding of AND dag nodes.
This patch fixes the logic in the DAGCombiner that folds an AND node according
to rule: (and (X (load V)), C) -> (X (load V))
An AND between a vector load 'X' and a constant build_vector 'C' can be folded
into the load itself only if we can prove that the AND operation is redundant.
The algorithm implemented by 'visitAND' firstly computes the splat value 'S'
from C, and then checks if S has the lower 'B' bits set (where B is the size in
bits of the vector element type). The algorithm takes into account also the
'undef' bits in the splat mask.
Unfortunately, the algorithm only worked under the assumption that the size of S
is a multiple of the vector element type. With this patch, we conservatively
avoid folding the AND if the splat bits are not compatible with the vector
element type.
Added X86 test and-load-fold.ll
Differential Revision: http://reviews.llvm.org/D8085
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@231702 91177308-0d34-0410-b5e6-96231b3b80d8
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LoopRotate: When reconstructing loop simplify form don't split edges
from indirectbrs.
Yet another chapter in the endless story. While this looks like we leave
the loop in a non-canonical state this replicates the logic in
LoopSimplify so it doesn't diverge from the canonical form in any way.
PR21968
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MC: Allow multiple comma-separated expressions on the .uleb128
directive.
For compatiblity with GNU as. Binutils documents this as
'.uleb128 expressions'. Subtle, isn't it?
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Filip Pizlo pointed out that this changes the C API.
It's too late in the release process to figure out how we want to
handle this. Reverting the patch is essentially a way of buying time:
we don't change the API at the source level for now, we're not
trying to fix it with a last-minute patch with a risk of unintended
effects, and we preserve our options for fixing this in 3.6.1.
This is not ideal, but I think it's the best compromise at this stage.
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r229731 | sanjoy | 2015-02-18 11:32:25 -0800 (Wed, 18 Feb 2015) | 10 lines
Partial fix for bug 22589
Don't spend the entire iteration space in the scalar loop prologue if
computing the trip count overflows. This change also gets rid of the
backedge check in the prologue loop and the extra check for
overflowing trip-count.
Differential Revision: http://reviews.llvm.org/D7715
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