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2019-10-22[InstCombine] Signed saturation patternsupstream-masterDavid Green
This adds an instcombine matcher for code that attempts to perform signed saturating arithmetic by casting to a higher type. Unsigned cases are already matched, this adds extra matches for the more complex signed cases, which involves matching the min(max(add a b)) nodes with proper extends to ensure legality. Differential Revision: https://reviews.llvm.org/D68651 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375505 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22[InstCombine] Signed saturation tests. NFCDavid Green
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375503 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22[MIParser] Set RegClassOrRegBank during instruction parsingPetar Avramovic
MachineRegisterInfo::createGenericVirtualRegister sets RegClassOrRegBank to static_cast<RegisterBank *>(nullptr). MIParser on the other hand doesn't. When we attempt to constrain Register Class on such VReg, additional COPY is generated. This way we avoid COPY instructions showing in test that have MIR input while they are not present with llvm-ir input that was used to create given MIR for a -run-pass test. Differential Revision: https://reviews.llvm.org/D68946 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375502 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22[MIPS GlobalISel] Select MSA vector generic and builtin addPetar Avramovic
Select vector G_ADD for MIPS32 with MSA. We have to set bank for vector operands to fprb and selectImpl will do the rest. __builtin_msa_addv_<format> will be transformed into G_ADD in legalizeIntrinsic and selected in the same way. __builtin_msa_addvi_<format> will be directly selected into ADDVI_<format> in legalizeIntrinsic. MIR tests for it have unnecessary additional copies. Capture current state of tests with run-pass=legalizer with a test in test/CodeGen/MIR/Mips. Differential Revision: https://reviews.llvm.org/D68984 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375501 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22[ThinLTO] Add code comment. NFCEugene Leviant
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375500 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22[Alignment][NFC] Convert StoreInst to MaybeAlignGuillaume Chatelet
Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: hiraditya, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69303 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375499 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22[Alignment][NFC] Convert LoadInst to MaybeAlignGuillaume Chatelet
Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: hiraditya, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69302 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375498 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22[PowerPC] Turn on CR-Logical reducer passNemanja Ivanovic
This re-commits r375152 which was pulled in r375233 because it broke the EXPENSIVE_CHECKS bot on Windows. The reason for the failure was a bug in the pass that the commit turned on by default. This patch fixes that bug and turns the pass back on. This patch has been verified on the buildbot that originally failed thanks to Simon Pilgrim. Differential revision: https://reviews.llvm.org/D52431 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375497 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22[Alignment][NFC] Use MaybeAlign in AttrBuilderGuillaume Chatelet
Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69300 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375496 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22[Alignment][NFC] Attributes use Align/MaybeAlignGuillaume Chatelet
Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: jholewinski, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69278 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375495 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22[ThinLTO] Don't internalize during promotionEugene Leviant
Differential revision: https://reviews.llvm.org/D69107 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375493 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22[LLVMDebugInfoPDB] - Use cantFail() instead of assert().George Rimar
Currently injected-sources-native.test fails with "Expected<T> value was in success state. (Note: Expected<T> values in success mode must still be checked prior to being destroyed)" when llvm is compiled with LLVM_ENABLE_ABI_BREAKING_CHECKS in Release. The problem is that getStringForID returns Expected<StringRef> and Expected value must always be checked, even if it is in success state. Checking with assert only helps in Debug and is wrong. Differential revision: https://reviews.llvm.org/D69251 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375492 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22[CMake] [WinMsvc] Look for includes and libs in ${MSVC_BASE}/atlmfcMartin Storsjo
This is necessary if building with the DIA SDK enabled. Differential Revision: https://reviews.llvm.org/D69240 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375486 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22[CMake] Allow overriding MSVC_DIA_SDK_DIR via CMakeMartin Storsjo
This eases using it in cross-msvc setups. Differential Revision: https://reviews.llvm.org/D69239 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375485 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22gn build: Merge r375483GN Sync Bot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375484 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22[lit] Move increase_process_limit to ParallelRunJulian Lettner
Increasing the process limit only makes sense when we use multiple processes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375474 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[X86][BMI] Pull out schedule classes from bmi_andn<> and bmi_bls<>Simon Pilgrim
Stop hardwiring classes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375470 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[X86][SSE] Add OR(EXTRACTELT(X,0),OR(EXTRACTELT(X,1))) -> MOVMSK+CMP ↵Simon Pilgrim
reduction combine git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375463 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[X86][SSE] Add OR(EXTRACTELT(X,0),OR(EXTRACTELT(X,1))) movmsk v2X64 testsSimon Pilgrim
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375462 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[examples] Add a dependency on ExecutionEngine to LLJITWithObjectCache example.Lang Hames
ExecutionEngine.cpp contains the anchor() for the ObjectCache base class, so we need an explicit dependency on it. Patch by Stephen Neuendorffer. Thanks Stephen! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375461 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21AMDGPU/GlobalISel: Legalize fast unsafe FDIVAustin Kerbow
Reviewers: arsenm Reviewed By: arsenm Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka, dstuttard, tpr, t-tye, hiraditya, Petar.Avramovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69231 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375460 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[lit] Simplify test scheduling via multiprocessing.PoolJulian Lettner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375458 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21AMDGPU: Select basic interp directly from intrinsicsMatt Arsenault
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375457 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[lit] Remove redundancy from names and commentsJulian Lettner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375456 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[CVP] No-wrap deduction for `shl`Roman Lebedev
Summary: This is the last `OverflowingBinaryOperator` for which we don't deduce flags. D69217 taught `ConstantRange::makeGuaranteedNoWrapRegion()` about it. The effect is better than of the `mul` patch (D69203): | statistic | old | new | delta | % change | | correlated-value-propagation.NumAddNUW | 7145 | 7144 | -1 | -0.0140% | | correlated-value-propagation.NumAddNW | 12126 | 12125 | -1 | -0.0082% | | correlated-value-propagation.NumAnd | 443 | 446 | 3 | 0.6772% | | correlated-value-propagation.NumNSW | 5986 | 7158 | 1172 | 19.5790% | | correlated-value-propagation.NumNUW | 10512 | 13304 | 2792 | 26.5601% | | correlated-value-propagation.NumNW | 16498 | 20462 | 3964 | 24.0272% | | correlated-value-propagation.NumShlNSW | 0 | 1172 | 1172 | | | correlated-value-propagation.NumShlNUW | 0 | 2793 | 2793 | | | correlated-value-propagation.NumShlNW | 0 | 3965 | 3965 | | | instcount.NumAShrInst | 13824 | 13790 | -34 | -0.2459% | | instcount.NumAddInst | 277584 | 277586 | 2 | 0.0007% | | instcount.NumAndInst | 66061 | 66056 | -5 | -0.0076% | | instcount.NumBrInst | 709153 | 709147 | -6 | -0.0008% | | instcount.NumICmpInst | 483709 | 483708 | -1 | -0.0002% | | instcount.NumSExtInst | 79497 | 79496 | -1 | -0.0013% | | instcount.NumShlInst | 40691 | 40654 | -37 | -0.0909% | | instcount.NumSubInst | 61997 | 61996 | -1 | -0.0016% | | instcount.NumZExtInst | 68208 | 68211 | 3 | 0.0044% | | instcount.TotalBlocks | 843916 | 843910 | -6 | -0.0007% | | instcount.TotalInsts | 7387528 | 7387448 | -80 | -0.0011% | Reviewers: nikic, reames, sanjoy, timshen Reviewed By: nikic Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69277 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375455 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[GISel][CombinerHelper] Add a combine turning shuffle_vector into concat_vectorsQuentin Colombet
Teach the CombinerHelper how to turn shuffle_vectors, that concatenate vectors, into concat_vectors and add this combine to the AArch64 pre-legalizer combiner. Differential Revision: https://reviews.llvm.org/D69149 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375452 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21AMDGPU: Use CopyToReg for interp intrinsic loweringMatt Arsenault
This doesn't use the default value, so doesn't benefit from the hack to help optimize it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375450 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21AMDGPU: Erase redundant redefs of m0 in SIFoldOperandsMatt Arsenault
Only handle simple inter-block redefs of m0 to the same value. This avoids interference from redefs of m0 in SILoadStoreOptimzer. I was initially teaching that pass to ignore redefs of m0, but having them not exist beforehand is much simpler. This is in preparation for deleting the current special m0 handling in SIFixSGPRCopies to allow the register coalescer to handle the difficult cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375449 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21AMDGPU: Stop adding m0 implicit def to SGPR spillsMatt Arsenault
r375293 removed the SGPR spilling with scalar stores path, so this is no longer necessary. This also always had the defect of adding the def even when this path wasn't in use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375448 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21AMDGPU: Slightly restructure m0 init codeMatt Arsenault
This will allow using another operation to produce the glue in a future change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375447 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[AMDGPU] Select AGPR in PHI operand legalizationStanislav Mekhanoshin
If a PHI defines AGPR legalize its operands to AGPR. At the moment we can get an AGPR PHI with VGPR operands. I am not aware of any problems as it seems to be handled gracefully in RA, but this is not right anyway. It also slightly decreases VGPR pressure in some cases because we do not have to a copy via VGPR. Differential Revision: https://reviews.llvm.org/D69206 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375446 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[X86] Rename matchBitOpReduction to matchScalarReduction. NFCI.Simon Pilgrim
This doesn't need to be just for bitops, but the ops do need to be fully associative. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375445 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21Reverted r375425 as it broke some buildbots.Sander de Smalen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375444 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[NFC][CVP] Add `shl` no-wrap deduction test coverageRoman Lebedev
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375441 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21Prune Pass.h include from DataLayout.h. NFCIBjorn Pettersson
Summary: Reduce include dependencies by no longer including Pass.h from DataLayout.h. That include seemed irrelevant to DataLayout, as well as being irrelevant to several users of DataLayout. Reviewers: rnk Reviewed By: rnk Subscribers: mehdi_amini, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D69261 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375436 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[PowerPC] Regenerate test for D52431Simon Pilgrim
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375435 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[NFC] Add missing include to fix modules buildRaphael Isemann
This header doesn't seem to be parsable on its own and breaks the module build therefore with the following error: While building module 'LLVM_Backend' imported from llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp:14: In file included from <module-includes>:62: llvm-project/llvm/include/llvm/CodeGen/MachinePipeliner.h:91:20: error: declaration of 'AAResultsWrapperPass' must be imported from module 'LLVM_Analysis.AliasAnalysis' before it is required AU.addRequired<AAResultsWrapperPass>(); ^ llvm-project/llvm/include/llvm/Analysis/AliasAnalysis.h:1157:7: note: previous declaration is here class AAResultsWrapperPass : public FunctionPass { ^ llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp:14:10: fatal error: could not build module 'LLVM_Backend' ~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 2 errors generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375433 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21SystemZISelLowering - supportedAddressingMode - silence static analyzer ↵Simon Pilgrim
dyn_cast<> null dereference warning. NFCI. The static analyzer is warning about a potential null dereference, but we should be able to use cast<> directly and if not assert will fire for us. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375430 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21GVNHoist - silence static analyzer dyn_cast<> null dereference warning in ↵Simon Pilgrim
hasEHOrLoadsOnPath call. NFCI. The static analyzer is warning about a potential null dereference, but we should be able to use cast<> directly and if not assert will fire for us. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375429 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21GuardWidening - silence static analyzer null dereference warning with ↵Simon Pilgrim
assertion. NFCI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375428 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21CrossDSOCFI - silence static analyzer dyn_cast<> null dereference warning. NFCI.Simon Pilgrim
The static analyzer is warning about a potential null dereference, but we should be able to use cast<> directly and if not assert will fire for us. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375427 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21IndVarSimplify - silence static analyzer dyn_cast<> null dereference ↵Simon Pilgrim
warning. NFCI. The static analyzer is warning about a potential null dereference, but we should be able to use cast<> directly and if not assert will fire for us. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375426 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[AArch64][DebugInfo] Do not recompute CalleeSavedStackSize (Take 2)Sander de Smalen
Commit message from D66935: This patch fixes a bug exposed by D65653 where a subsequent invocation of `determineCalleeSaves` ends up with a different size for the callee save area, leading to different frame-offsets in debug information. In the invocation by PEI, `determineCalleeSaves` tries to determine whether it needs to spill an extra callee-saved register to get an emergency spill slot. To do this, it calls 'estimateStackSize' and manually adds the size of the callee-saves to this. PEI then allocates the spill objects for the callee saves and the remaining frame layout is calculated accordingly. A second invocation in LiveDebugValues causes estimateStackSize to return the size of the stack frame including the callee-saves. Given that the size of the callee-saves is added to this, these callee-saves are counted twice, which leads `determineCalleeSaves` to believe the stack has become big enough to require spilling an extra callee-save as emergency spillslot. It then updates CalleeSavedStackSize with a larger value. Since CalleeSavedStackSize is used in the calculation of the frame offset in getFrameIndexReference, this leads to incorrect offsets for variables/locals when this information is recalculated after PEI. This patch fixes the lldb unit tests in `functionalities/thread/concurrent_events/*` Changes after D66935: Ensures AArch64FunctionInfo::getCalleeSavedStackSize does not return the uninitialized CalleeSavedStackSize when running `llc` on a specific pass where the MIR code has already been expected to have gone through PEI. Instead, getCalleeSavedStackSize (when passed the MachineFrameInfo) will try to recalculate the CalleeSavedStackSize from the CalleeSavedInfo. In debug mode, the compiler will assert the recalculated size equals the cached size as calculated through a call to determineCalleeSaves. This fixes two tests: test/DebugInfo/AArch64/asan-stack-vars.mir test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir that otherwise fail when compiled using msan. Reviewed By: omjavaid, efriedma Tags: #llvm Differential Revision: https://reviews.llvm.org/D68783 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375425 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[NFC] Cleanup with variable name IsPPC64 & IsDarwinXiangling Liao
Clean up PPCAsmPrinter with IsPPC64 and IsDarwin. Differential Revision: https://reviews.llvm.org/D69259 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375420 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[Alignment][NFC] Finish transition for `Loads`Guillaume Chatelet
Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: hiraditya, asbirlea, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69253 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375419 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21Pre-commit test cases for D64713.Jay Foad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375418 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[Types] Define a getWithNewBitWidth for Types and make use of itDavid Green
This is designed to change the bitwidth of a type without altering the number of vector lanes. Also useful in D68651. Otherwise an NFC. Differential Revision: https://reviews.llvm.org/D69139 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375417 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[Alignment][NFC] Instructions::getLoadStoreAlignmentGuillaume Chatelet
Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69256 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375416 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[ARM] Extra qdadd patternsDavid Green
This adds some new qdadd patterns to go along with the other recently added qadd's. Differential Revision: https://reviews.llvm.org/D68999 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375414 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21[Alignment][NFC] Add a helper function to DataLayoutGuillaume Chatelet
Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69258 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375413 91177308-0d34-0410-b5e6-96231b3b80d8
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