diff options
Diffstat (limited to 'plat/imx/imx8m/imx8mm/include/platform_def.h')
| -rw-r--r-- | plat/imx/imx8m/imx8mm/include/platform_def.h | 24 |
1 files changed, 20 insertions, 4 deletions
diff --git a/plat/imx/imx8m/imx8mm/include/platform_def.h b/plat/imx/imx8m/imx8mm/include/platform_def.h index ed693b9fc..65749f348 100644 --- a/plat/imx/imx8m/imx8mm/include/platform_def.h +++ b/plat/imx/imx8m/imx8mm/include/platform_def.h @@ -6,6 +6,8 @@ #include <arch.h> #include <common/tbbr/tbbr_img_def.h> +#include <lib/utils_def.h> +#include <plat/common/common_def.h> #define PLATFORM_LINKER_FORMAT "elf64-littleaarch64" #define PLATFORM_LINKER_ARCH aarch64 @@ -39,9 +41,9 @@ #if defined(NEED_BL2) #define BL2_BASE U(0x920000) -#define BL2_LIMIT U(0x940000) +#define BL2_SIZE SZ_128K +#define BL2_LIMIT (BL2_BASE + BL2_SIZE) #define BL31_BASE U(0x900000) -#define BL31_LIMIT U(0x920000) #define IMX_FIP_BASE U(0x40310000) #define IMX_FIP_SIZE U(0x000300000) #define IMX_FIP_LIMIT U(FIP_BASE + FIP_SIZE) @@ -52,9 +54,11 @@ #define PLAT_IMX8MM_BOOT_MMC_BASE U(0x30B50000) /* SD */ #else #define BL31_BASE U(0x920000) -#define BL31_LIMIT U(0x940000) #endif +#define BL31_SIZE SZ_128K +#define BL31_LIMIT (BL31_BASE + BL31_SIZE) + /* non-secure uboot base */ #define PLAT_NS_IMAGE_OFFSET U(0x40200000) #define PLAT_NS_IMAGE_SIZE U(0x00200000) @@ -85,7 +89,7 @@ #define IMX_AIPSTZ4 U(0x32df0000) #define IMX_AIPS_BASE U(0x30000000) -#define IMX_AIPS_SIZE U(0xC00000) +#define IMX_AIPS_SIZE U(0x3000000) #define IMX_GPV_BASE U(0x32000000) #define IMX_GPV_SIZE U(0x800000) #define IMX_AIPS1_BASE U(0x30200000) @@ -105,7 +109,17 @@ #define IMX_DDRC_BASE U(0x3d400000) #define IMX_DDRPHY_BASE U(0x3c000000) #define IMX_DDR_IPS_BASE U(0x3d000000) +#define IMX_DDR_IPS_SIZE U(0x1800000) +#define IMX_VPUMIX_BASE U(0x38330000) +#define IMX_VPUMIX_SIZE U(0x100000) #define IMX_ROM_BASE U(0x0) +#define IMX_ROM_SIZE U(0x40000) +#define IMX_NS_OCRAM_BASE U(0x900000) +#define IMX_NS_OCRAM_SIZE U(0x20000) +#define IMX_CAAM_RAM_BASE U(0x100000) +#define IMX_CAAM_RAM_SIZE U(0x10000) +#define IMX_DRAM_BASE U(0x40000000) +#define IMX_DRAM_SIZE U(0xc0000000) #define GPV_BASE U(0x32000000) #define GPV_SIZE U(0x800000) @@ -140,12 +154,14 @@ #define GPR_TZASC_EN_LOCK BIT(16) #define ANAMIX_MISC_CTL U(0x124) +#define DRAM_PLL_CTRL (IMX_ANAMIX_BASE + 0x50) #define MAX_CSU_NUM U(64) #define OCRAM_S_BASE U(0x00180000) #define OCRAM_S_SIZE U(0x8000) #define OCRAM_S_LIMIT (OCRAM_S_BASE + OCRAM_S_SIZE) +#define SAVED_DRAM_TIMING_BASE OCRAM_S_BASE #define COUNTER_FREQUENCY 8000000 /* 8MHz */ |