diff options
| author | Armelle Laine <armellel@google.com> | 2023-03-01 07:36:41 +0000 |
|---|---|---|
| committer | Andrei Homescu <ahomescu@google.com> | 2023-03-15 18:12:15 +0000 |
| commit | 4dea08bf53ef917f5f22f519a7c96e720b6d4cd3 (patch) | |
| tree | 0f684e31f2e6544fc2b5532c4dd91efd31d3198c /arch | |
| parent | 340260e877c41e92b5a690a384b890ec18ad7850 (diff) | |
| download | common-4dea08bf53ef917f5f22f519a7c96e720b6d4cd3.tar.gz | |
arm&arm64: Pass crash reason to trusty_app_crash
Bug: 259517277
Change-Id: Ide67899aea85162333e49f0cd99516163ec6ebce
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/arm/faults.c | 32 | ||||
| -rw-r--r-- | arch/arm64/exceptions_c.c | 2 |
2 files changed, 23 insertions, 11 deletions
diff --git a/arch/arm/arm/faults.c b/arch/arm/arm/faults.c index d77a8368..85718d4b 100644 --- a/arch/arm/arm/faults.c +++ b/arch/arm/arm/faults.c @@ -128,37 +128,49 @@ static void dump_iframe(struct arm_iframe *frame) dump_mode_regs(frame->spsr, (uintptr_t)(frame + 1), frame->lr); } -static void halt_thread(uint32_t spsr) +/* + * Differentiate between crashes coming from different exception handlers + * using the high order bits. DFSR and IFSR have the high order bits + * reserved/zeroed, so it should be fine to overwrite them. + */ +enum crash_reason_bits { + CRASH_REASON_SYSCALL = 0x00000000, + CRASH_REASON_UNDEFINED = 0x10000000, + CRASH_REASON_DATA_ABORT = 0x20000000, + CRASH_REASON_PREFETCH_ABORT = 0x30000000, +}; + +static void halt_thread(uint32_t spsr, uint32_t crash_reason) { if ((spsr & CPSR_MODE_MASK) == CPSR_MODE_USR) { arch_enable_fiqs(); arch_enable_ints(); - trusty_app_crash(); + trusty_app_crash(crash_reason); } panic("fault\n"); for (;;); } -static void exception_die(struct arm_fault_frame *frame, const char *msg) +static void exception_die(struct arm_fault_frame *frame, const char *msg, uint32_t crash_reason) { dprintf(CRITICAL, "%s", msg); dump_fault_frame(frame); - halt_thread(frame->spsr); + halt_thread(frame->spsr, crash_reason); } -static void exception_die_iframe(struct arm_iframe *frame, const char *msg) +static void exception_die_iframe(struct arm_iframe *frame, const char *msg, uint32_t crash_reason) { dprintf(CRITICAL, "%s", msg); dump_iframe(frame); - halt_thread(frame->spsr); + halt_thread(frame->spsr, crash_reason); } __WEAK void arm_syscall_handler(struct arm_fault_frame *frame) { - exception_die(frame, "unhandled syscall, halting\n"); + exception_die(frame, "unhandled syscall, halting\n", CRASH_REASON_SYSCALL); } void arm_undefined_handler(struct arm_iframe *frame) @@ -203,7 +215,7 @@ void arm_undefined_handler(struct arm_iframe *frame) } #endif - exception_die_iframe(frame, "undefined abort, halting\n"); + exception_die_iframe(frame, "undefined abort, halting\n", CRASH_REASON_UNDEFINED); } void arm_data_abort_handler(struct arm_fault_frame *frame) @@ -266,7 +278,7 @@ void arm_data_abort_handler(struct arm_fault_frame *frame) dprintf(CRITICAL, "DFAR 0x%x (fault address)\n", far); dprintf(CRITICAL, "DFSR 0x%x (fault status register)\n", fsr); - exception_die(frame, "halting\n"); + exception_die(frame, "halting\n", CRASH_REASON_DATA_ABORT | fsr); } void arm_data_abort_handler_stack_overflow(struct arm_fault_frame *frame) @@ -334,5 +346,5 @@ void arm_prefetch_abort_handler(struct arm_fault_frame *frame) dprintf(CRITICAL, "IFAR 0x%x (fault address)\n", far); dprintf(CRITICAL, "IFSR 0x%x (fault status register)\n", fsr); - exception_die(frame, "halting\n"); + exception_die(frame, "halting\n", CRASH_REASON_PREFETCH_ABORT | fsr); } diff --git a/arch/arm64/exceptions_c.c b/arch/arm64/exceptions_c.c index c3a1a481..f684e222 100644 --- a/arch/arm64/exceptions_c.c +++ b/arch/arm64/exceptions_c.c @@ -532,7 +532,7 @@ void arm64_sync_exception(struct arm64_iframe_long *iframe, bool from_lower) if (from_lower) { arch_enable_fiqs(); arch_enable_ints(); - trusty_app_crash(); + trusty_app_crash(esr); } panic("die\n"); } |