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| author | Arve Hjønnevåg <arve@android.com> | 2018-06-28 16:26:58 -0700 |
|---|---|---|
| committer | Matthew Maurer <mmaurer@google.com> | 2019-06-27 00:06:32 +0000 |
| commit | 999dd4c8dd2f8a7255378e50e55fec9f9c24de7a (patch) | |
| tree | 2da9a12d2705d991ca7773a44c550f4a0fac14c2 /dev | |
| parent | 50d3d5f48b393ecf1ca956fbb91af6475a8fc8ac (diff) | |
| download | common-999dd4c8dd2f8a7255378e50e55fec9f9c24de7a.tar.gz | |
[arch][arm/arm64] Add ARM_MERGE_FIQ_IRQ build flag
Set this flag to true to work with interrupt controllers (gicv3 and
gicv4) that deliver non-secure interrupts as FIQs instead of IRQs while
running in secure mode.
Change-Id: Iad5339314f3f2cc52bb1f78dad2bbdf4eac1c97c
Diffstat (limited to 'dev')
| -rw-r--r-- | dev/interrupt/arm_gic/arm_gic.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/dev/interrupt/arm_gic/arm_gic.c b/dev/interrupt/arm_gic/arm_gic.c index b6dae376..0e0c4f20 100644 --- a/dev/interrupt/arm_gic/arm_gic.c +++ b/dev/interrupt/arm_gic/arm_gic.c @@ -53,6 +53,7 @@ #define IFRAME_PC(frame) ((frame)->elr) #endif +void platform_fiq(struct iframe *frame); static status_t arm_gic_set_secure_locked(u_int irq, bool secure); static spin_lock_t gicd_lock; @@ -413,6 +414,17 @@ enum handler_return platform_irq(struct iframe *frame) struct int_handler_struct *h; uint cpu = arch_curr_cpu_num(); +#if ARM_MERGE_FIQ_IRQ + { + uint32_t hppir = GICREG(0, GICC_HPPIR); + uint32_t pending_fiq = hppir & 0x3ff; + if (pending_fiq < MAX_INT) { + platform_fiq(frame); + return INT_NO_RESCHEDULE; + } + } +#endif + LTRACEF("ahppir %d\n", ahppir); if (pending_irq < MAX_INT && get_int_handler(pending_irq, cpu)->handler) { enum handler_return ret = 0; |