diff options
| author | klemens <ka7@github.com> | 2016-08-15 17:55:40 +0200 |
|---|---|---|
| committer | Travis Geiselbrecht <geist@foobox.com> | 2016-08-25 17:30:34 -0700 |
| commit | d0b90c2d6897bd31f330958ffa416cb9265a9e89 (patch) | |
| tree | 64850601fcc80ab5ebdb80980750c070cafd6972 /platform | |
| parent | d90cb4e7c6340539838f06307e0680470e6eb8a8 (diff) | |
| download | common-d0b90c2d6897bd31f330958ffa416cb9265a9e89.tar.gz | |
[spelling] spelling-fixes. (not external/)
Diffstat (limited to 'platform')
| -rw-r--r-- | platform/alterasoc/include/platform/alterasoc.h | 2 | ||||
| -rw-r--r-- | platform/mediatek/mt6797/include/platform/mt_uart.h | 2 | ||||
| -rw-r--r-- | platform/pc/timer.c | 4 | ||||
| -rw-r--r-- | platform/stm32f1xx/vectab.c | 2 | ||||
| -rw-r--r-- | platform/zynq/spiflash.c | 2 |
5 files changed, 6 insertions, 6 deletions
diff --git a/platform/alterasoc/include/platform/alterasoc.h b/platform/alterasoc/include/platform/alterasoc.h index 37e2ec8e..7f555547 100644 --- a/platform/alterasoc/include/platform/alterasoc.h +++ b/platform/alterasoc/include/platform/alterasoc.h @@ -24,7 +24,7 @@ #include <reg.h> -/* common addres space regions */ +/* common address space regions */ #define FPGASLAVES_BASE (0xc0000000) #define PERIPH_BASE (0xfc000000) #define LWPFGASLAVES_BASE (0xff200000) diff --git a/platform/mediatek/mt6797/include/platform/mt_uart.h b/platform/mediatek/mt6797/include/platform/mt_uart.h index 5c8c9a2f..6a6d6bb9 100644 --- a/platform/mediatek/mt6797/include/platform/mt_uart.h +++ b/platform/mediatek/mt6797/include/platform/mt_uart.h @@ -73,7 +73,7 @@ typedef enum { /* IER */ -#define UART_IER_ERBFI (1 << 0) /* RX buffer conatins data int. */ +#define UART_IER_ERBFI (1 << 0) /* RX buffer contains data int. */ #define UART_IER_ETBEI (1 << 1) /* TX FIFO threshold trigger int. */ #define UART_IER_ELSI (1 << 2) /* BE, FE, PE, or OE int. */ #define UART_IER_EDSSI (1 << 3) /* CTS change (DCTS) int. */ diff --git a/platform/pc/timer.c b/platform/pc/timer.c index 47b29bb5..fd263323 100644 --- a/platform/pc/timer.c +++ b/platform/pc/timer.c @@ -51,7 +51,7 @@ static uint16_t divisor; #define INTERNAL_FREQ_3X 3579546ULL /* Maximum amount of time that can be program on the timer to schedule the next - * interrupt, in miliseconds */ + * interrupt, in milliseconds */ #define MAX_TIMER_INTERVAL 55 @@ -190,7 +190,7 @@ status_t platform_set_oneshot_timer(platform_timer_callback callback, divisor = count & 0xffff; timer_delta_time = (3685982306ULL * count) >> 10; - /* Program PIT in teh software strobe configuration, to send one pulse + /* Program PIT in the software strobe configuration, to send one pulse * after the count reach 0 */ outp(I8253_CONTROL_REG, 0x38); outp(I8253_DATA_REG, divisor & 0xff); // LSB diff --git a/platform/stm32f1xx/vectab.c b/platform/stm32f1xx/vectab.c index f0e3e01e..02a335be 100644 --- a/platform/stm32f1xx/vectab.c +++ b/platform/stm32f1xx/vectab.c @@ -329,7 +329,7 @@ const void *const __SECTION(".text.boot.vectab2") vectab2[] = { VECTAB_ENTRY(DMA2_Channel3_IRQ), /*!< DMA2 Channel 3 global Interrupt */ VECTAB_ENTRY(DMA2_Channel4_5_IRQ), /*!< DMA2 Channel 4 and Channel 5 global Interrupt */ VECTAB_ENTRY(DMA2_Channel5_IRQ), /*!< DMA2 Channel 5 global Interrupt (DMA2 Channel 5 is - mapped at postion 60 only if the MISC_REMAP bit in + mapped at position 60 only if the MISC_REMAP bit in the AFIO_MAPR2 register is set) */ #endif /* STM32F10X_HD_VL */ diff --git a/platform/zynq/spiflash.c b/platform/zynq/spiflash.c index 1690fee5..ffcec663 100644 --- a/platform/zynq/spiflash.c +++ b/platform/zynq/spiflash.c @@ -350,7 +350,7 @@ static ssize_t spiflash_bdev_read(struct bdev *bdev, void *buf, off_t offset, si if (len == 0) return 0; - // XXX handle not mulitple of 4 + // XXX handle not multiple of 4 qspi_rd32(&flash.qspi, offset, buf, len / 4); return len; |