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| author | Sricharan R <r.sricharan@ti.com> | 2013-05-28 10:32:23 +0530 |
|---|---|---|
| committer | Lokesh Vutla <lokeshvutla@ti.com> | 2013-05-29 15:04:54 +0530 |
| commit | 21d6e010f1de9453a8b6f31eaa1f46cab8490f30 (patch) | |
| tree | bae5424ccda9ad3d2ea7f446e8a5deeae56a6354 | |
| parent | b9ae28adb93127d89dba7b63526146cd18907e82 (diff) | |
| download | jacinto6evm-21d6e010f1de9453a8b6f31eaa1f46cab8490f30.tar.gz | |
ARM: DRA7xx: Correct the SYS_CLK to 20MHZ
The sys_clk on the dra evm board is 20MHZ.
Changing the configuration for the same.
Signed-off-by: Sricharan R <r.sricharan@ti.com>
| -rw-r--r-- | include/configs/dra7xx_evm.h | 4 | ||||
| -rw-r--r-- | include/configs/omap5_common.h | 1 | ||||
| -rw-r--r-- | include/configs/omap5_uevm.h | 3 |
3 files changed, 7 insertions, 1 deletions
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index b142049a6c..b0b0bdacf6 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -38,4 +38,8 @@ #define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_COM1 UART1_BASE #define CONFIG_BAUDRATE 115200 + +/* Clock Defines */ +#define V_OSCK 20000000 /* Clock output from T2 */ + #endif /* __CONFIG_DRA7XX_EVM_H */ diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h index d57c0daed1..9fef21c7d9 100644 --- a/include/configs/omap5_common.h +++ b/include/configs/omap5_common.h @@ -46,7 +46,6 @@ #define CONFIG_DISPLAY_BOARDINFO /* Clock Defines */ -#define V_OSCK 19200000 /* Clock output from T2 */ #define V_SCLK V_OSCK #define CONFIG_MISC_INIT_R diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index ba81e30bb1..4f2d4253c7 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -58,5 +58,8 @@ #define CONFIG_SYS_PROMPT "OMAP5430 EVM # " +/* Clock Defines */ +#define V_OSCK 19200000 /* Clock output from T2 */ + #define CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC 16296 #endif /* __CONFIG_OMAP5_EVM_H */ |