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author | Praneeth Bajjuri <praneeth@ti.com> | 2017-08-28 18:05:10 -0500 |
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committer | Praneeth Bajjuri <praneeth@ti.com> | 2017-08-28 18:05:10 -0500 |
commit | 897c50416cb47553fd149ae95ede41149ae8fbaa (patch) | |
tree | 862d462158291cbd41102d541554304ed42a4eaa /arch/arm/dts/dra7-evm-common.dtsi | |
parent | 28c2b55c045daa86413fe9fa73299b1d47564615 (diff) | |
parent | 50becb1a9d088359a55d6068a47ed3fc8605253c (diff) | |
download | jacinto6evm-6AM.1.3-rvc-video.tar.gz |
Merge branch 'p-ti-u-boot-2016.05' of git://git.omapzoom.org/repo/u-boot into 6AM.1.3-rvc-video6AM.1.3-rvc-video-j6e-aug6AM.1.3-rvc-video
* 'p-ti-u-boot-2016.05' of git://git.omapzoom.org/repo/u-boot: (62 commits)
am57x: android: add vendor partition
arm: omap: enable high speed mode support in SPL for the eMMC on DRA76x
ARM: dts: dra76-evm: add higher speed MMC/SD modes
ARM: dts: dra76-evm: shift to using common IOdelay data
ARM: dts: dra76x: create a common file with MMC/SD IOdelay data
ARM: DRA72x: Add support for detection of DRA71x SR 2.1
dra7xx: android: add vendor partition
fastboot: sparse: remove session-id logic
ARM: dts: dra76-evm: Add initial support
ARM: dts: dra7-evm: sync DT with Linux
configs: ti_omap5_common: Select dtb name for dra76
board: ti: dra76-evm: Add support for powering on mmc ldo
board: ti: dra76-evm: Add the pinmux data
board: ti: dra76-evm: Add DDR data
board: ti: dra76-evm: Add the pmic data
board: ti: dra76-evm: Add epprom support
arm: dra76: Add support for ES1.0 detection
configs: dra7xx: Enable LP87565 related configs
power: regulator: palmas: Add smps12 dual regulator for tps65917
power: regulator: lp87565: add regulator support
...
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Diffstat (limited to 'arch/arm/dts/dra7-evm-common.dtsi')
-rw-r--r-- | arch/arm/dts/dra7-evm-common.dtsi | 190 |
1 files changed, 190 insertions, 0 deletions
diff --git a/arch/arm/dts/dra7-evm-common.dtsi b/arch/arm/dts/dra7-evm-common.dtsi new file mode 100644 index 0000000000..78ffafd143 --- /dev/null +++ b/arch/arm/dts/dra7-evm-common.dtsi @@ -0,0 +1,190 @@ +/* + * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + chosen { + stdout-path = &uart1; + tick-timer = &timer2; + }; + + extcon_usb1: extcon_usb1 { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>; + }; + + extcon_usb2: extcon_usb2 { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>; + }; + + leds { + compatible = "gpio-leds"; + led@0 { + label = "dra7:usr1"; + gpios = <&pcf_lcd 4 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + led@1 { + label = "dra7:usr2"; + gpios = <&pcf_lcd 5 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + led@2 { + label = "dra7:usr3"; + gpios = <&pcf_lcd 6 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + led@3 { + label = "dra7:usr4"; + gpios = <&pcf_lcd 7 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + autorepeat; + + USER1 { + label = "btnUser1"; + linux,code = <BTN_0>; + gpios = <&pcf_lcd 2 GPIO_ACTIVE_LOW>; + }; + + USER2 { + label = "btnUser2"; + linux,code = <BTN_1>; + gpios = <&pcf_lcd 3 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&dra7_pmx_core { + dcan1_pins_default: dcan1_pins_default { + pinctrl-single,pins = < + 0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */ + 0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */ + >; + }; + + dcan1_pins_sleep: dcan1_pins_sleep { + pinctrl-single,pins = < + 0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */ + 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */ + >; + }; +}; + +&i2c3 { + status = "okay"; + clock-frequency = <400000>; +}; + +&mcspi1 { + status = "okay"; +}; + +&mcspi2 { + status = "okay"; +}; + +&uart1 { + status = "okay"; + interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, + <&dra7_pmx_core 0x3e0>; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + + +&qspi { + status = "okay"; + + spi-max-frequency = <76800000>; + m25p80@0 { + compatible = "s25fl256s1"; + spi-max-frequency = <76800000>; + reg = <0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + + /* MTD partition table. + * The ROM checks the first four physical blocks + * for a valid file to boot and the flash here is + * 64KiB block size. + */ + partition@0 { + label = "QSPI.SPL"; + reg = <0x00000000 0x000040000>; + }; + partition@1 { + label = "QSPI.u-boot"; + reg = <0x00040000 0x00100000>; + }; + partition@2 { + label = "QSPI.u-boot-spl-os"; + reg = <0x00140000 0x00080000>; + }; + partition@3 { + label = "QSPI.u-boot-env"; + reg = <0x001c0000 0x00010000>; + }; + partition@4 { + label = "QSPI.u-boot-env.backup1"; + reg = <0x001d0000 0x0010000>; + }; + partition@5 { + label = "QSPI.kernel"; + reg = <0x001e0000 0x0800000>; + }; + partition@6 { + label = "QSPI.file-system"; + reg = <0x009e0000 0x01620000>; + }; + }; +}; + +&omap_dwc3_1 { + extcon = <&extcon_usb1>; +}; + +&omap_dwc3_2 { + extcon = <&extcon_usb2>; +}; + +&usb1 { + dr_mode = "peripheral"; +}; + +&usb2 { + dr_mode = "host"; +}; + +&dcan1 { + status = "ok"; + pinctrl-names = "default", "sleep", "active"; + pinctrl-0 = <&dcan1_pins_sleep>; + pinctrl-1 = <&dcan1_pins_sleep>; + pinctrl-2 = <&dcan1_pins_default>; +}; |