diff options
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r-- | arch/arm/include/asm/arch-am33xx/mmc_host_def.h | 4 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-omap4/mmc_host_def.h | 6 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-omap5/clock.h | 9 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-omap5/mmc_host_def.h | 6 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-omap5/omap.h | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-omap5/sys_proto.h | 7 | ||||
-rw-r--r-- | arch/arm/include/asm/omap_common.h | 10 | ||||
-rw-r--r-- | arch/arm/include/asm/omap_mmc.h | 6 |
8 files changed, 40 insertions, 10 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h index 724e252946..5a2ea8faef 100644 --- a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h +++ b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h @@ -21,8 +21,8 @@ /* * OMAP HSMMC register definitions */ -#define OMAP_HSMMC1_BASE 0x48060100 -#define OMAP_HSMMC2_BASE 0x481D8100 +#define OMAP_HSMMC1_BASE 0x48060000 +#define OMAP_HSMMC2_BASE 0x481D8000 #if defined(CONFIG_TI814X) #undef MMC_CLOCK_REFERENCE diff --git a/arch/arm/include/asm/arch-omap4/mmc_host_def.h b/arch/arm/include/asm/arch-omap4/mmc_host_def.h index 9c8ccb6c83..d06779956f 100644 --- a/arch/arm/include/asm/arch-omap4/mmc_host_def.h +++ b/arch/arm/include/asm/arch-omap4/mmc_host_def.h @@ -31,8 +31,8 @@ * OMAP HSMMC register definitions */ -#define OMAP_HSMMC1_BASE 0x4809C100 -#define OMAP_HSMMC2_BASE 0x480B4100 -#define OMAP_HSMMC3_BASE 0x480AD100 +#define OMAP_HSMMC1_BASE 0x4809C000 +#define OMAP_HSMMC2_BASE 0x480B4000 +#define OMAP_HSMMC3_BASE 0x480AD000 #endif /* MMC_HOST_DEF_H */ diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h index 4c0e890194..489815e644 100644 --- a/arch/arm/include/asm/arch-omap5/clock.h +++ b/arch/arm/include/asm/arch-omap5/clock.h @@ -341,6 +341,9 @@ /* Offset is 0.73V for LP873x */ #define LP873X_BUCK_BASE_VOLT_UV 730000 +/* Offset is 0.73V for LP87565 */ +#define LP87565_BUCK_BASE_VOLT_UV 730000 + /* TPS659038 */ #define TPS659038_I2C_SLAVE_ADDR 0x58 #define TPS659038_REG_ADDR_SMPS12 0x23 @@ -354,6 +357,7 @@ #define TPS65917_REG_ADDR_SMPS1 0x23 #define TPS65917_REG_ADDR_SMPS2 0x27 #define TPS65917_REG_ADDR_SMPS3 0x2F +#define TPS65917_REG_ADDR_SMPS4 0x33 /* LP873X */ #define LP873X_I2C_SLAVE_ADDR 0x60 @@ -361,6 +365,11 @@ #define LP873X_REG_ADDR_BUCK1 0x7 #define LP873X_REG_ADDR_LDO1 0xA +/* LP87565 */ +#define LP87565_I2C_SLAVE_ADDR 0x61 +#define LP87565_REG_ADDR_BUCK01 0xA +#define LP87565_REG_ADDR_BUCK23 0xE + /* TPS */ #define TPS62361_I2C_SLAVE_ADDR 0x60 #define TPS62361_REG_ADDR_SET0 0x0 diff --git a/arch/arm/include/asm/arch-omap5/mmc_host_def.h b/arch/arm/include/asm/arch-omap5/mmc_host_def.h index 9c8ccb6c83..d06779956f 100644 --- a/arch/arm/include/asm/arch-omap5/mmc_host_def.h +++ b/arch/arm/include/asm/arch-omap5/mmc_host_def.h @@ -31,8 +31,8 @@ * OMAP HSMMC register definitions */ -#define OMAP_HSMMC1_BASE 0x4809C100 -#define OMAP_HSMMC2_BASE 0x480B4100 -#define OMAP_HSMMC3_BASE 0x480AD100 +#define OMAP_HSMMC1_BASE 0x4809C000 +#define OMAP_HSMMC2_BASE 0x480B4000 +#define OMAP_HSMMC3_BASE 0x480AD000 #endif /* MMC_HOST_DEF_H */ diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index b5e5519fbd..0fd3d85d29 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -58,11 +58,13 @@ #define OMAP5430_CONTROL_ID_CODE_ES2_0 0x1B94202F #define OMAP5432_CONTROL_ID_CODE_ES1_0 0x0B99802F #define OMAP5432_CONTROL_ID_CODE_ES2_0 0x1B99802F +#define DRA762_CONTROL_ID_CODE_ES1_0 0x0BB5002F #define DRA752_CONTROL_ID_CODE_ES1_0 0x0B99002F #define DRA752_CONTROL_ID_CODE_ES1_1 0x1B99002F #define DRA752_CONTROL_ID_CODE_ES2_0 0x2B99002F #define DRA722_CONTROL_ID_CODE_ES1_0 0x0B9BC02F #define DRA722_CONTROL_ID_CODE_ES2_0 0x1B9BC02F +#define DRA722_CONTROL_ID_CODE_ES2_1 0x2B9BC02F /* UART */ #define UART1_BASE (OMAP54XX_L4_PER_BASE + 0x6a000) diff --git a/arch/arm/include/asm/arch-omap5/sys_proto.h b/arch/arm/include/asm/arch-omap5/sys_proto.h index c870a72980..fb563ee542 100644 --- a/arch/arm/include/asm/arch-omap5/sys_proto.h +++ b/arch/arm/include/asm/arch-omap5/sys_proto.h @@ -35,6 +35,13 @@ struct pad_conf_entry { u32 val; }; +struct omap_hsmmc_pinctrl_state { + struct pad_conf_entry *padconf; + int npads; + struct iodelay_cfg_entry *iodelay; + int niodelays; +}; + struct omap_sysinfo { char *board_string; }; diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 3e178be954..951a407515 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -602,6 +602,7 @@ extern struct omap_sys_ctrl_regs const dra7xx_ctrl; extern struct pmic_data tps659038; extern struct pmic_data lp8733; +extern struct pmic_data lp87565; void hw_data_init(void); @@ -702,6 +703,7 @@ static inline u8 is_omap54xx(void) #define DRA7XX 0x07000000 #define DRA72X 0x07200000 +#define DRA76X 0x07600000 static inline u8 is_dra7xx(void) { @@ -714,6 +716,12 @@ static inline u8 is_dra72x(void) extern u32 *const omap_si_rev; return (*omap_si_rev & 0xFFF00000) == DRA72X; } + +static inline u8 is_dra76x(void) +{ + extern u32 *const omap_si_rev; + return (*omap_si_rev & 0xFFF00000) == DRA76X; +} #endif /* @@ -741,11 +749,13 @@ static inline u8 is_dra72x(void) #define OMAP5432_ES2_0 0x54320200 /* DRA7XX */ +#define DRA762_ES1_0 0x07620100 #define DRA752_ES1_0 0x07520100 #define DRA752_ES1_1 0x07520110 #define DRA752_ES2_0 0x07520200 #define DRA722_ES1_0 0x07220100 #define DRA722_ES2_0 0x07220200 +#define DRA722_ES2_1 0x07220210 /* * SRAM scratch space entries diff --git a/arch/arm/include/asm/omap_mmc.h b/arch/arm/include/asm/omap_mmc.h index 767f8ec50a..abfdc2ef4f 100644 --- a/arch/arm/include/asm/omap_mmc.h +++ b/arch/arm/include/asm/omap_mmc.h @@ -26,7 +26,7 @@ #define OMAP_MMC_H_ struct hsmmc { -#ifdef CONFIG_DM_MMC +#ifndef CONFIG_OMAP34XX unsigned int hl_rev; unsigned int hl_hwinfo; unsigned int hl_sysconfig; @@ -225,7 +225,9 @@ struct hsmmc { int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio, int wp_gpio); - int platform_fixup_disable_uhs_mode(void); +struct omap_hsmmc_pinctrl_state *platform_fixup_get_pinctrl_by_mode + (struct hsmmc *base, const char *mode); void vmmc_pbias_config(uint voltage); +void board_mmc_poweron_ldo(uint voltage); #endif /* OMAP_MMC_H_ */ |