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author | Catalin Marinas <catalin.marinas@arm.com> | 2012-09-05 15:31:37 +0100 |
---|---|---|
committer | Catalin Marinas <catalin.marinas@arm.com> | 2012-09-05 16:20:47 +0100 |
commit | 56e4258184cf78f704907d6ab6142fd9dd1df3bc (patch) | |
tree | 4a0e2f75d55a90d5e457e479c953507b2ac5655a | |
parent | 95844fca8b8a7566b39973dfd15ea219932afe01 (diff) | |
download | linux-aarch64-56e4258184cf78f704907d6ab6142fd9dd1df3bc.tar.gz |
arm64: Move the architecture-specific code out of arm_generic.c
The msr/mrs instructions for accessing the generic timers are
AArch64-specific. The rest of the code however can be share with the
AArch32 generic timers (Cortex-A15). This patch separates the
architecture-specific code into the asm/arm_generic.h file.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
-rw-r--r-- | arch/arm64/include/asm/arm_generic.h | 100 | ||||
-rw-r--r-- | drivers/clocksource/arm_generic.c | 82 |
2 files changed, 102 insertions, 80 deletions
diff --git a/arch/arm64/include/asm/arm_generic.h b/arch/arm64/include/asm/arm_generic.h new file mode 100644 index 00000000000..e4cec9d30f2 --- /dev/null +++ b/arch/arm64/include/asm/arm_generic.h @@ -0,0 +1,100 @@ +/* + * arch/arm64/include/asm/arm_generic.h + * + * Copyright (C) 2012 ARM Ltd. + * Author: Marc Zyngier <marc.zyngier@arm.com> + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ +#ifndef __ASM_ARM_GENERIC_H +#define __ASM_ARM_GENERIC_H + +#include <linux/clocksource.h> + +#define ARCH_TIMER_CTRL_ENABLE (1 << 0) +#define ARCH_TIMER_CTRL_IMASK (1 << 1) +#define ARCH_TIMER_CTRL_ISTATUS (1 << 2) + +#define ARCH_TIMER_REG_CTRL 0 +#define ARCH_TIMER_REG_FREQ 1 +#define ARCH_TIMER_REG_TVAL 2 + +static inline void arch_timer_reg_write(int reg, u32 val) +{ + switch (reg) { + case ARCH_TIMER_REG_CTRL: + asm volatile("msr cntp_ctl_el0, %0" : : "r" (val)); + break; + case ARCH_TIMER_REG_TVAL: + asm volatile("msr cntp_tval_el0, %0" : : "r" (val)); + break; + default: + BUILD_BUG(); + } + + isb(); +} + +static inline u32 arch_timer_reg_read(int reg) +{ + u32 val; + + switch (reg) { + case ARCH_TIMER_REG_CTRL: + asm volatile("mrs %0, cntp_ctl_el0" : "=r" (val)); + break; + case ARCH_TIMER_REG_FREQ: + asm volatile("mrs %0, cntfrq_el0" : "=r" (val)); + break; + case ARCH_TIMER_REG_TVAL: + asm volatile("mrs %0, cntp_tval_el0" : "=r" (val)); + break; + default: + BUILD_BUG(); + } + + return val; +} + +static inline void __cpuinit arch_counter_enable_user_access(void) +{ + u32 cntkctl; + + /* Disable user access to the timers and the virtual counter. */ + asm volatile("mrs %0, cntkctl_el1" : "=r" (cntkctl)); + cntkctl &= ~((3 << 8) | (1 << 1)); + + /* Enable user access to the physical counter and frequency. */ + cntkctl |= 1; + asm volatile("msr cntkctl_el1, %0" : : "r" (cntkctl)); +} + +static inline cycle_t arch_counter_get_cntpct(void) +{ + cycle_t cval; + + asm volatile("mrs %0, cntpct_el0" : "=r" (cval)); + + return cval; +} + +static inline cycle_t arch_counter_get_cntvct(void) +{ + cycle_t cval; + + asm volatile("mrs %0, cntvct_el0" : "=r" (cval)); + + return cval; +} + +#endif diff --git a/drivers/clocksource/arm_generic.c b/drivers/clocksource/arm_generic.c index 596bc233965..c4d9f9566c6 100644 --- a/drivers/clocksource/arm_generic.c +++ b/drivers/clocksource/arm_generic.c @@ -31,60 +31,13 @@ #include <clocksource/arm_generic.h> +#include <asm/arm_generic.h> + static u32 arch_timer_rate; static u64 sched_clock_mult __read_mostly; static DEFINE_PER_CPU(struct clock_event_device, arch_timer_evt); static int arch_timer_ppi; -/* - * Architected system timer support. - */ - -#define ARCH_TIMER_CTRL_ENABLE (1 << 0) -#define ARCH_TIMER_CTRL_IMASK (1 << 1) -#define ARCH_TIMER_CTRL_ISTATUS (1 << 2) - -#define ARCH_TIMER_REG_CTRL 0 -#define ARCH_TIMER_REG_FREQ 1 -#define ARCH_TIMER_REG_TVAL 2 - -static void arch_timer_reg_write(int reg, u32 val) -{ - switch (reg) { - case ARCH_TIMER_REG_CTRL: - asm volatile("msr cntp_ctl_el0, %0" : : "r" (val)); - break; - case ARCH_TIMER_REG_TVAL: - asm volatile("msr cntp_tval_el0, %0" : : "r" (val)); - break; - default: - BUG(); - } - - isb(); -} - -static u32 arch_timer_reg_read(int reg) -{ - u32 val; - - switch (reg) { - case ARCH_TIMER_REG_CTRL: - asm volatile("mrs %0, cntp_ctl_el0" : "=r" (val)); - break; - case ARCH_TIMER_REG_FREQ: - asm volatile("mrs %0, cntfrq_el0" : "=r" (val)); - break; - case ARCH_TIMER_REG_TVAL: - asm volatile("mrs %0, cntp_tval_el0" : "=r" (val)); - break; - default: - BUG(); - } - - return val; -} - static irqreturn_t arch_timer_handle_irq(int irq, void *dev_id) { struct clock_event_device *evt = dev_id; @@ -138,19 +91,6 @@ static int arch_timer_set_next_event(unsigned long evt, return 0; } -static void __cpuinit arch_counter_enable_user_access(void) -{ - u32 cntkctl; - - /* Disable user access to the timers and the virtual counter. */ - asm volatile("mrs %0, cntkctl_el1" : "=r" (cntkctl)); - cntkctl &= ~((3 << 8) | (1 << 1)); - - /* Enable user access to the physical counter and frequency. */ - cntkctl |= 1; - asm volatile("msr cntkctl_el1, %0" : : "r" (cntkctl)); -} - static void __cpuinit arch_timer_setup(struct clock_event_device *clk) { /* Let's make sure the timer is off before doing anything else */ @@ -193,24 +133,6 @@ static void __init arch_timer_calibrate(void) arch_timer_rate / 1000000, (arch_timer_rate / 10000) % 100); } -static inline cycle_t arch_counter_get_cntpct(void) -{ - cycle_t cval; - - asm volatile("mrs %0, cntpct_el0" : "=r" (cval)); - - return cval; -} - -static inline cycle_t arch_counter_get_cntvct(void) -{ - cycle_t cval; - - asm volatile("mrs %0, cntvct_el0" : "=r" (cval)); - - return cval; -} - static cycle_t arch_counter_read(struct clocksource *cs) { return arch_counter_get_cntpct(); |