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AgeCommit message (Expand)Author
2022-02-03Fix Wbitwise-instead-of-logicalandroid-t-preview-2android-t-preview-1android-t-beta-3android-s-v2-beta-3android-s-qpr3-beta-1android-t-preview-1android-s-v2-beta-3android-s-qpr3-beta-1Pirama Arumuga Nainar
2021-02-19[sve] Fix while simulation corner caseMartyn Capewell
2020-11-10Merge remote-tracking branch 'aosp/upstream-master' into masterArtem Serov
2020-11-10Revert^2 "Merge remote-tracking branch 'aosp/upstream-master' into..."Artem Serov
2020-11-10Remove use of "dummy"Martyn Capewell
2020-11-05Make the stack size configurable.Jacob Bramley
2020-11-05Fix FPRoundInt's handling of INT64_MAX.Jacob Bramley
2020-10-30Don't simulate invalid logical immediate instructionsMartyn Capewell
2020-10-28Revert "Merge remote-tracking branch 'aosp/upstream-master' into..."Ulyana Trafimovich
2020-10-20Fix undefined behaviour in HalveMartyn Capewell
2020-10-15Simplify the command-line disassembly example UI.Jacob Bramley
2020-09-23Define values for unallocated prefetch modesMartyn Capewell
2020-08-21Merge remote-tracking branch 'aosp/upstream-master' into masterArtem Serov
2020-08-14Optimise single handler tables in the decoder.Martyn Capewell
2020-08-13[sve] Disallow dup with shift on byte-sized lanesMartyn Capewell
2020-08-03Remove undefined behaviour in add/sub immediateMartyn Capewell
2020-07-29Revert optimisation for add/sub immediatesMartyn Capewell
2020-07-24Fix initialisation order for ID register fields.Jacob Bramley
2020-07-23Fix add/sub immediate for min-int caseMartyn Capewell
2020-07-16Add missing aliases for SVE 0.0 moves.Jacob Bramley
2020-07-16Fix and enable CanTakeSVEMovprfx.Jacob Bramley
2020-07-16Support more than 64 CPU features.Jacob Bramley
2020-07-16Fix CPUFeature iterator behaviour.Jacob Bramley
2020-07-16Add support for AT_HWCAP2.Jacob Bramley
2020-07-16Add CPUFeatures up to Armv8.6.Jacob Bramley
2020-07-13Emit pairs of add/sub for larger immediatesMartyn Capewell
2020-07-13Use segments in SVE indexed fmul simulationMartyn Capewell
2020-07-06Fix numerous issues related to CAS* instructions.Jacob Bramley
2020-07-06Make assembler more strict about SVE prefetch argumentsMartyn Capewell
2020-07-03Use PgLow8 rather than Pg<12, 10>.Jacob Bramley
2020-07-03Always assert that 'pg' does not have a lane size.Jacob Bramley
2020-07-02Disallow x31/xzr for SVE prefetch scalar offset registerMartyn Capewell
2020-07-02Fix simulation of FCMNE.Jacob Bramley
2020-07-02Require an immediate (0.0) for compare-with-zero instructions.Jacob Bramley
2020-07-02Prefer to use 'rd' as a scratch.Jacob Bramley
2020-07-02Fix CPURegister::GetArchitecturalName().Jacob Bramley
2020-07-02Fix simulation of FTSMUL.Jacob Bramley
2020-07-01Fix simulation of BRKNS.Jacob Bramley
2020-06-30[sve] Restore LaneSize to predicate logical operations.Martyn Capewell
2020-06-26[sve] Improve disasm substitution for sign-extending loadsMartyn Capewell
2020-06-25[sve] Remove generated comments from the disassemblerMartyn Capewell
2020-06-25[sve] Remove extra spaces from load/store register lists.Jacob Bramley
2020-06-25[sve] Remove redundant 'USE' macros.Jacob Bramley
2020-06-25[sve] Ternary substitution for disassemblerMartyn Capewell
2020-06-24Merge branch 'master' into sveJacob Bramley
2020-06-24[sve] Make modifiers lower case in disassemblyMartyn Capewell
2020-06-23[sve] Implement 32-bit scatter store (scalar plus vector mode).TatWai Chong
2020-06-22[sve] Implement 64-bit scatter store (scalar plus vector mode).Martyn Capewell
2020-06-22[sve] Complete remaining gather loads.Martyn Capewell
2020-06-22[sve] Fix the index specifier decoding error in the gather load helper.TatWai Chong