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authorAditya Nandakumar <aditya_nandakumar@apple.com>2019-02-05 22:14:40 +0000
committerAditya Nandakumar <aditya_nandakumar@apple.com>2019-02-05 22:14:40 +0000
commit1c10dc8b9c632bdaec06499c72ab22c389cc6685 (patch)
tree58f0a14252b09ff4048e06b65b72f4f4d20a0516 /include/llvm/CodeGen
parent9b24317c894b51d0cf94c7a0bf9242a4a3097113 (diff)
downloadllvm-1c10dc8b9c632bdaec06499c72ab22c389cc6685.tar.gz
[NFC][GlobalISel]: Add a convenience method to MachineInstrBuilder to simplify getOperand(i).getReg()
https://reviews.llvm.org/D57608 It's a common pattern in GISel to have a MachineInstrBuilder from which we get various regs (commonly MIB->getOperand(0).getReg()). This adds a helper method and the above can be replaced with MIB.getReg(0). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353223 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen')
-rw-r--r--include/llvm/CodeGen/MachineInstrBuilder.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/MachineInstrBuilder.h b/include/llvm/CodeGen/MachineInstrBuilder.h
index bbafeab1577..4a8cd6861a9 100644
--- a/include/llvm/CodeGen/MachineInstrBuilder.h
+++ b/include/llvm/CodeGen/MachineInstrBuilder.h
@@ -79,6 +79,11 @@ public:
/// explicitly.
MachineInstr *getInstr() const { return MI; }
+ /// Get the register for the operand index.
+ /// The operand at the index should be a register (asserted by
+ /// MachineOperand).
+ unsigned getReg(unsigned Idx) { return MI->getOperand(Idx).getReg(); }
+
/// Add a new virtual register operand.
const MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
unsigned SubReg = 0) const {