aboutsummaryrefslogtreecommitdiff
path: root/lib
diff options
context:
space:
mode:
authorKonstantin Zhuravlyov <kzhuravl_dev@outlook.com>2017-10-14 15:59:07 +0000
committerKonstantin Zhuravlyov <kzhuravl_dev@outlook.com>2017-10-14 15:59:07 +0000
commit473d951406163926637ec621337201bf470d5c77 (patch)
tree6219065c08b7f825c47bd202d356a5e4f53308f1 /lib
parenteb211af0572ea5f2ddda4a80b283053812d7665d (diff)
downloadllvm-473d951406163926637ec621337201bf470d5c77.tar.gz
AMDGPU: Do not emit deprecated notes for code object v3
Differential Revision: https://reviews.llvm.org/D38749 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315810 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/AMDGPU/AMDGPU.td7
-rw-r--r--lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp30
-rw-r--r--lib/Target/AMDGPU/AMDGPUSubtarget.cpp1
-rw-r--r--lib/Target/AMDGPU/AMDGPUSubtarget.h5
-rw-r--r--lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp4
-rw-r--r--lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h4
6 files changed, 40 insertions, 11 deletions
diff --git a/lib/Target/AMDGPU/AMDGPU.td b/lib/Target/AMDGPU/AMDGPU.td
index 1f6f59c1058..ba936dd834c 100644
--- a/lib/Target/AMDGPU/AMDGPU.td
+++ b/lib/Target/AMDGPU/AMDGPU.td
@@ -408,6 +408,13 @@ def FeatureAutoWaitcntBeforeBarrier : SubtargetFeature <
"Hardware automatically inserts waitcnt before barrier"
>;
+def FeatureCodeObjectV3 : SubtargetFeature <
+ "code-object-v3",
+ "CodeObjectV3",
+ "true",
+ "Generate code object version 3"
+>;
+
// Dummy feature used to disable assembler instructions.
def FeatureDisable : SubtargetFeature<"",
"FeatureDisable","true",
diff --git a/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index bbe0879499e..ca828b45c54 100644
--- a/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -112,23 +112,31 @@ AMDGPUTargetStreamer& AMDGPUAsmPrinter::getTargetStreamer() const {
}
void AMDGPUAsmPrinter::EmitStartOfAsmFile(Module &M) {
- AMDGPU::IsaInfo::IsaVersion ISA =
- AMDGPU::IsaInfo::getIsaVersion(getSTI()->getFeatureBits());
+ if (TM.getTargetTriple().getArch() != Triple::amdgcn)
+ return;
- if (TM.getTargetTriple().getOS() == Triple::AMDPAL) {
+ if (TM.getTargetTriple().getOS() != Triple::AMDHSA &&
+ TM.getTargetTriple().getOS() != Triple::AMDPAL)
+ return;
+
+ if (TM.getTargetTriple().getOS() == Triple::AMDHSA)
+ HSAMetadataStream.begin(M);
+
+ if (TM.getTargetTriple().getOS() == Triple::AMDPAL)
readPALMetadata(M);
- // AMDPAL wants an HSA_ISA .note.
- getTargetStreamer().EmitDirectiveHSACodeObjectISA(
- ISA.Major, ISA.Minor, ISA.Stepping, "AMD", "AMDGPU");
- }
- if (TM.getTargetTriple().getOS() != Triple::AMDHSA)
+
+ // Deprecated notes are not emitted for code object v3.
+ if (IsaInfo::hasCodeObjectV3(getSTI()->getFeatureBits()))
return;
- getTargetStreamer().EmitDirectiveHSACodeObjectVersion(2, 1);
+ // HSA emits NT_AMDGPU_HSA_CODE_OBJECT_VERSION for code objects v2.
+ if (TM.getTargetTriple().getOS() == Triple::AMDHSA)
+ getTargetStreamer().EmitDirectiveHSACodeObjectVersion(2, 1);
+
+ // HSA and PAL emit NT_AMDGPU_HSA_ISA for code objects v2.
+ IsaInfo::IsaVersion ISA = IsaInfo::getIsaVersion(getSTI()->getFeatureBits());
getTargetStreamer().EmitDirectiveHSACodeObjectISA(
ISA.Major, ISA.Minor, ISA.Stepping, "AMD", "AMDGPU");
-
- HSAMetadataStream.begin(M);
}
void AMDGPUAsmPrinter::EmitEndOfAsmFile(Module &M) {
diff --git a/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
index 59f9baf9af0..ddc1cd457b4 100644
--- a/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
+++ b/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
@@ -110,6 +110,7 @@ AMDGPUSubtarget::AMDGPUSubtarget(const Triple &TT, StringRef GPU, StringRef FS,
DX10Clamp(false),
FlatForGlobal(false),
AutoWaitcntBeforeBarrier(false),
+ CodeObjectV3(false),
UnalignedScratchAccess(false),
UnalignedBufferAccess(false),
diff --git a/lib/Target/AMDGPU/AMDGPUSubtarget.h b/lib/Target/AMDGPU/AMDGPUSubtarget.h
index 0f725c181b7..52e08e538f7 100644
--- a/lib/Target/AMDGPU/AMDGPUSubtarget.h
+++ b/lib/Target/AMDGPU/AMDGPUSubtarget.h
@@ -119,6 +119,7 @@ protected:
bool DX10Clamp;
bool FlatForGlobal;
bool AutoWaitcntBeforeBarrier;
+ bool CodeObjectV3;
bool UnalignedScratchAccess;
bool UnalignedBufferAccess;
bool HasApertureRegs;
@@ -399,6 +400,10 @@ public:
return AutoWaitcntBeforeBarrier;
}
+ bool hasCodeObjectV3() const {
+ return CodeObjectV3;
+ }
+
bool hasUnalignedBufferAccess() const {
return UnalignedBufferAccess;
}
diff --git a/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
index ce9dc4f744d..018cb5d0c36 100644
--- a/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+++ b/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
@@ -162,6 +162,10 @@ void streamIsaVersion(const MCSubtargetInfo *STI, raw_ostream &Stream) {
Stream.flush();
}
+bool hasCodeObjectV3(const FeatureBitset &Features) {
+ return Features.test(FeatureCodeObjectV3);
+}
+
unsigned getWavefrontSize(const FeatureBitset &Features) {
if (Features.test(FeatureWavefrontSize16))
return 16;
diff --git a/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h b/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
index aaa7b1495d7..60a7af837fb 100644
--- a/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+++ b/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
@@ -58,6 +58,10 @@ IsaVersion getIsaVersion(const FeatureBitset &Features);
/// \brief Streams isa version string for given subtarget \p STI into \p Stream.
void streamIsaVersion(const MCSubtargetInfo *STI, raw_ostream &Stream);
+/// \returns True if given subtarget \p Features support code object version 3,
+/// false otherwise.
+bool hasCodeObjectV3(const FeatureBitset &Features);
+
/// \returns Wavefront size for given subtarget \p Features.
unsigned getWavefrontSize(const FeatureBitset &Features);