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| author | Craig Topper <craig.topper@intel.com> | 2017-10-14 04:18:11 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-10-14 04:18:11 +0000 |
| commit | e793e68e9b961efd428b136618b868e10a0dcf5f (patch) | |
| tree | 0a552d38d2f2ffd12f299d80910adec0c7559aef /lib | |
| parent | ea981acc7812159293bd5c213e78f2633cc8687c (diff) | |
| download | llvm-e793e68e9b961efd428b136618b868e10a0dcf5f.tar.gz | |
[X86] Remove some patterns for bitcasted alignednonedtemporalloads.
These select the same instruction as the non-bitcasted pattern. So this provides no additional value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315799 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/X86/X86InstrAVX512.td | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/lib/Target/X86/X86InstrAVX512.td b/lib/Target/X86/X86InstrAVX512.td index a7396d65635..9af9ad85929 100644 --- a/lib/Target/X86/X86InstrAVX512.td +++ b/lib/Target/X86/X86InstrAVX512.td @@ -4033,12 +4033,6 @@ let Predicates = [HasAVX512], AddedComplexity = 400 in { (VMOVNTDQAZrm addr:$src)>; def : Pat<(v8i64 (alignednontemporalload addr:$src)), (VMOVNTDQAZrm addr:$src)>; - def : Pat<(v16i32 (bitconvert (v8i64 (alignednontemporalload addr:$src)))), - (VMOVNTDQAZrm addr:$src)>; - def : Pat<(v32i16 (bitconvert (v8i64 (alignednontemporalload addr:$src)))), - (VMOVNTDQAZrm addr:$src)>; - def : Pat<(v64i8 (bitconvert (v8i64 (alignednontemporalload addr:$src)))), - (VMOVNTDQAZrm addr:$src)>; } let Predicates = [HasVLX], AddedComplexity = 400 in { @@ -4055,12 +4049,6 @@ let Predicates = [HasVLX], AddedComplexity = 400 in { (VMOVNTDQAZ256rm addr:$src)>; def : Pat<(v4i64 (alignednontemporalload addr:$src)), (VMOVNTDQAZ256rm addr:$src)>; - def : Pat<(v8i32 (bitconvert (v4i64 (alignednontemporalload addr:$src)))), - (VMOVNTDQAZ256rm addr:$src)>; - def : Pat<(v16i16 (bitconvert (v4i64 (alignednontemporalload addr:$src)))), - (VMOVNTDQAZ256rm addr:$src)>; - def : Pat<(v32i8 (bitconvert (v4i64 (alignednontemporalload addr:$src)))), - (VMOVNTDQAZ256rm addr:$src)>; def : Pat<(alignednontemporalstore (v4i32 VR128X:$src), addr:$dst), (VMOVNTDQZ128mr addr:$dst, VR128X:$src)>; @@ -4075,12 +4063,6 @@ let Predicates = [HasVLX], AddedComplexity = 400 in { (VMOVNTDQAZ128rm addr:$src)>; def : Pat<(v2i64 (alignednontemporalload addr:$src)), (VMOVNTDQAZ128rm addr:$src)>; - def : Pat<(v4i32 (bitconvert (v2i64 (alignednontemporalload addr:$src)))), - (VMOVNTDQAZ128rm addr:$src)>; - def : Pat<(v8i16 (bitconvert (v2i64 (alignednontemporalload addr:$src)))), - (VMOVNTDQAZ128rm addr:$src)>; - def : Pat<(v16i8 (bitconvert (v2i64 (alignednontemporalload addr:$src)))), - (VMOVNTDQAZ128rm addr:$src)>; } //===----------------------------------------------------------------------===// |