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| author | Reid Kleckner <rnk@google.com> | 2017-10-10 00:57:36 +0000 |
|---|---|---|
| committer | Reid Kleckner <rnk@google.com> | 2017-10-10 00:57:36 +0000 |
| commit | 726d93c06ce9c05a0601a8c0dc6ed49d2150c1e6 (patch) | |
| tree | b6a599221877810c55c4811f64063f4d0317d568 /test/CodeGen/X86/bitcast-setcc-512.ll | |
| parent | 520952c51d50ff6bd8aaa0955f06011986ea3ebd (diff) | |
| download | llvm-726d93c06ce9c05a0601a8c0dc6ed49d2150c1e6.tar.gz | |
[MC] Suppress .Lcfi labels when emitting textual assembly
Summary:
This suppresses the generation of .Lcfi labels in our textual assembler.
It was annoying that this generated cascading .Lcfi labels:
llc foo.ll -o - | llvm-mc | llvm-mc
After three trips through MCAsmStreamer, we'd have three labels in the
output when none are necessary. We should only bother creating the
labels and frame data when making a real object file.
This supercedes D38605, which moved the entire .seh_ implementation into
MCObjectStreamer.
This has the advantage that we do more checking when emitting textual
assembly, as a minor efficiency cost. Outputting textual assembly is not
performance critical, so this shouldn't matter.
Reviewers: majnemer, MatzeB
Subscribers: qcolombet, nemanjai, javed.absar, eraman, hiraditya, JDevlieghere, llvm-commits
Differential Revision: https://reviews.llvm.org/D38638
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315259 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/bitcast-setcc-512.ll')
| -rw-r--r-- | test/CodeGen/X86/bitcast-setcc-512.ll | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/test/CodeGen/X86/bitcast-setcc-512.ll b/test/CodeGen/X86/bitcast-setcc-512.ll index 32044a83910..4262bdf3fa5 100644 --- a/test/CodeGen/X86/bitcast-setcc-512.ll +++ b/test/CodeGen/X86/bitcast-setcc-512.ll @@ -52,12 +52,9 @@ define i32 @v32i16(<32 x i16> %a, <32 x i16> %b) { ; AVX512F-LABEL: v32i16: ; AVX512F: # BB#0: ; AVX512F-NEXT: pushq %rbp -; AVX512F-NEXT: .Lcfi0: ; AVX512F-NEXT: .cfi_def_cfa_offset 16 -; AVX512F-NEXT: .Lcfi1: ; AVX512F-NEXT: .cfi_offset %rbp, -16 ; AVX512F-NEXT: movq %rsp, %rbp -; AVX512F-NEXT: .Lcfi2: ; AVX512F-NEXT: .cfi_def_cfa_register %rbp ; AVX512F-NEXT: andq $-32, %rsp ; AVX512F-NEXT: subq $32, %rsp @@ -560,12 +557,9 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8> %b) { ; AVX1-LABEL: v64i8: ; AVX1: # BB#0: ; AVX1-NEXT: pushq %rbp -; AVX1-NEXT: .Lcfi0: ; AVX1-NEXT: .cfi_def_cfa_offset 16 -; AVX1-NEXT: .Lcfi1: ; AVX1-NEXT: .cfi_offset %rbp, -16 ; AVX1-NEXT: movq %rsp, %rbp -; AVX1-NEXT: .Lcfi2: ; AVX1-NEXT: .cfi_def_cfa_register %rbp ; AVX1-NEXT: andq $-32, %rsp ; AVX1-NEXT: subq $64, %rsp @@ -781,12 +775,9 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8> %b) { ; AVX2-LABEL: v64i8: ; AVX2: # BB#0: ; AVX2-NEXT: pushq %rbp -; AVX2-NEXT: .Lcfi0: ; AVX2-NEXT: .cfi_def_cfa_offset 16 -; AVX2-NEXT: .Lcfi1: ; AVX2-NEXT: .cfi_offset %rbp, -16 ; AVX2-NEXT: movq %rsp, %rbp -; AVX2-NEXT: .Lcfi2: ; AVX2-NEXT: .cfi_def_cfa_register %rbp ; AVX2-NEXT: andq $-32, %rsp ; AVX2-NEXT: subq $64, %rsp @@ -998,12 +989,9 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8> %b) { ; AVX512F-LABEL: v64i8: ; AVX512F: # BB#0: ; AVX512F-NEXT: pushq %rbp -; AVX512F-NEXT: .Lcfi3: ; AVX512F-NEXT: .cfi_def_cfa_offset 16 -; AVX512F-NEXT: .Lcfi4: ; AVX512F-NEXT: .cfi_offset %rbp, -16 ; AVX512F-NEXT: movq %rsp, %rbp -; AVX512F-NEXT: .Lcfi5: ; AVX512F-NEXT: .cfi_def_cfa_register %rbp ; AVX512F-NEXT: andq $-32, %rsp ; AVX512F-NEXT: subq $64, %rsp |