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| author | Gadi Haber <gadi.haber@intel.com> | 2017-10-17 06:47:04 +0000 |
|---|---|---|
| committer | Gadi Haber <gadi.haber@intel.com> | 2017-10-17 06:47:04 +0000 |
| commit | 9e68191ef66c8a6bfacb80ab9d762bac0152d130 (patch) | |
| tree | 7c31d098c69607a2f9991455d2a7705ae3c1d498 /test/MC | |
| parent | c596921f1a1a2aad1c325c27582977500b4762a0 (diff) | |
| download | llvm-9e68191ef66c8a6bfacb80ab9d762bac0152d130.tar.gz | |
[X86][SKL] Updated scheduling information for the SkylakeClient target
Updated the scheduling information for the SkylakeClient target with the following changes:
1. regrouped the instructions after adding load and store latencies.
2. regrouped the instructions after adding identified missing ports in several groups.
The changes were made after revisiting the latencies impact of all the load and store uOps.
Reviewers: zvi, RKSimon, craig.topper
Differential Revision: https://reviews.llvm.org/D38727
Change-Id: I778a308cc11e490e8fa5e27e2047412a1dca029f
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315978 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
0 files changed, 0 insertions, 0 deletions