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| author | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-08-15 15:10:31 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-08-15 15:10:31 +0000 |
| commit | 97c5e76113c6a763d424220166ba7bf941228fab (patch) | |
| tree | 3fd6c9dfbd954146d1f04afc7da1185aa67d44a2 /test/TableGen | |
| parent | b5378b63e391d27ad4a6ebed1e504b4ca6886624 (diff) | |
| download | llvm-97c5e76113c6a763d424220166ba7bf941228fab.tar.gz | |
Revert r310919 - [globalisel][tablegen] Support zero-instruction emission.
As expected, this failed on the windows bots but the instrumentation showed
something interesting. The ADD8ri and INC8r rules are never directly compared
on the windows machines. That implies that the issue lies in transitivity of
the Compare predicate. I believe I've already verified that but maybe I missed
something.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310922 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/TableGen')
| -rw-r--r-- | test/TableGen/GlobalISelEmitter.td | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/test/TableGen/GlobalISelEmitter.td b/test/TableGen/GlobalISelEmitter.td index b479240d765..b9163d1945d 100644 --- a/test/TableGen/GlobalISelEmitter.td +++ b/test/TableGen/GlobalISelEmitter.td @@ -83,13 +83,6 @@ def HasC : Predicate<"Subtarget->hasC()"> { let RecomputePerFunction = 1; } // CHECK-NEXT: return Features; // CHECK-NEXT: } -// CHECK-LABEL: enum { -// CHECK-NEXT: GILLT_s32, -// CHECK-NEXT: } -// CHECK-NEXT: const static LLT TypeObjects[] = { -// CHECK-NEXT: LLT::scalar(32), -// CHECK-NEXT: }; - // CHECK: bool MyTargetInstructionSelector::selectImpl(MachineInstr &I) const { // CHECK-NEXT: MachineFunction &MF = *I.getParent()->getParent(); // CHECK-NEXT: MachineRegisterInfo &MRI = MF.getRegInfo(); |