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2018-03-12Merge commit 195a164675allvm-svn.326829Chih-Hung Hsieh
2018-03-12Revert to previous base 04d162f71f6.Chih-Hung Hsieh
2018-03-07Revert "[mips] Reordering callseq* nodes to be linear"Aleksandar Beserminji
2018-03-07[mips] Fix PR35071Simon Dardis
2018-03-06[Hexagon] Remove {{ *}} from testcasesKrzysztof Parzyszek
2018-03-06[InstCombine] simplify min/max canonicalization; NFCISanjay Patel
2018-03-06[X86] Reject registers that require a REX prefix in inline asm constraints in...Craig Topper
2018-03-06[AMDGPU] Add default ISA version targetsStanislav Mekhanoshin
2018-03-06[CodeView] Emit UdtSourceLine information for enumsAaron Smith
2018-03-06[PatternMatch] define m_Not using m_Xor and cst_pred_tySanjay Patel
2018-03-06Refactor check for dllimport in the Verifier.Rafael Espindola
2018-03-06[ValueTracking] move helpers for SelectPatterns from InstCombine to ValueTrac...Sanjay Patel
2018-03-06[AArch64] define isExtractSubvectorCheapSebastian Pop
2018-03-06[Asm] Fix another layering violation in assmebly macro dumpingOliver Stannard
2018-03-06[Pipeliner] Test commit: fixed spelling mistake in commentsRoorda, Jan-Willem
2018-03-06[AMDGPU] Fix lowering OpenCL enqueue_kernelYaxun Liu
2018-03-06[ARM][Asm] Fix layering violation introduced by r326795Oliver Stannard
2018-03-06[ARM]Decoding MSR with unpredictable destination register causes an assertSimi Pallipurath
2018-03-06test commit: fix typo in comment Simi Pallipurath
2018-03-06[Asm] Add debug printing for assembler macrosOliver Stannard
2018-03-06[Asm] Refactor debug printing of AsmTokenOliver Stannard
2018-03-06[CallSiteSplitting] Do not crash when BB's terminator changes.Florian Hahn
2018-03-06TableGen: Add !foldl operationNicolai Haehnle
2018-03-06TableGen: Remove the ResolveFirst mechanismNicolai Haehnle
2018-03-06TableGen: Delay instantiating inline anonymous recordsNicolai Haehnle
2018-03-06TableGen: Move getNewAnonymousName into RecordKeeperNicolai Haehnle
2018-03-06TableGen: Explicitly check whether a record has been resolvedNicolai Haehnle
2018-03-06TableGen: Allow !cast of records, cleanup conversion machineryNicolai Haehnle
2018-03-06TableGen: Simplify BitsInit::resolveReferencesNicolai Haehnle
2018-03-06TableGen: Generalize record types to fix typeIsConvertibleTo et al.Nicolai Haehnle
2018-03-06Fixup for rL326769 (RegState::Debug is being truncated to a bool)Bjorn Pettersson
2018-03-06[CloneFunction] Support BB == PredBB in DuplicateInstructionsInSplit.Florian Hahn
2018-03-06[AVR] Remove the earlyclobber flag from LDDWRdYQDylan McKay
2018-03-06[DebugInfo] Discard invalid DBG_VALUE instructions in LiveDebugVariablesBjorn Pettersson
2018-03-06[WebAssebmly] Remove reloc ordering constraintSam Clegg
2018-03-06[X86] Handle EAX being live when calling chkstk for x86_64Martin Storsjo
2018-03-06Updated docs in CrashRecoveryContext.hSerge Pavlov
2018-03-06Revert "[DWARFv5] Emit file 0 to the line table."Paul Robinson
2018-03-06[MergeICmp] Simplify how BCECmpBlock instructions are blacklistedXin Tong
2018-03-06[MergeICmp] Fix printing. NFCXin Tong
2018-03-06[DWARFv5] Emit file 0 to the line table.Paul Robinson
2018-03-05Disable llvm-opt-fuzzer/exec-options.ll on Windows, it is too flakyReid Kleckner
2018-03-05[X86] cvttpd2dq lowering has been supported for some timeSimon Pilgrim
2018-03-05[InstSimplify] remove redundant foldsSanjay Patel
2018-03-05GlobalISel: IRTranslate llvm.fabs.* intrinsicVolkan Keles
2018-03-05[RewriteStatepoints] Fix stale parse pointsDaniel Neilson
2018-03-05[X86] Add silvermont fp arithmetic cost model testsSimon Pilgrim
2018-03-05[AMDGPU] Remove unused AMDOpenCL triple environmentTony Tye
2018-03-05[AVR] Fix the test suite after r326500.Dylan McKay
2018-03-05[SLP] Additional tests for stores vectorization, NFC.Alexey Bataev
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