diff options
author | Travis Geiselbrecht <geist@foobox.com> | 2016-03-30 20:28:18 -0700 |
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committer | Travis Geiselbrecht <geist@foobox.com> | 2016-03-30 20:28:18 -0700 |
commit | 2423845505d5aa1f797cd84900bfadcdcc10a3e6 (patch) | |
tree | 00f0ad6c4a6c5713856e6e7211f53b6c3f3fba80 /platform | |
parent | 7d06370f75b07fbda3cccb345dd28530e98fe6da (diff) | |
parent | 648684f63dfab7f9467c747f1287735c962b357b (diff) | |
download | common-2423845505d5aa1f797cd84900bfadcdcc10a3e6.tar.gz |
[merge] merge in cortex-m fpu support changes
Diffstat (limited to 'platform')
-rw-r--r-- | platform/stellaris/rules.mk | 6 | ||||
-rw-r--r-- | platform/stm32f7xx/init.c | 4 | ||||
-rw-r--r-- | platform/stm32f7xx/rules.mk | 2 |
3 files changed, 5 insertions, 7 deletions
diff --git a/platform/stellaris/rules.mk b/platform/stellaris/rules.mk index b6aef260..b602342c 100644 --- a/platform/stellaris/rules.mk +++ b/platform/stellaris/rules.mk @@ -10,8 +10,10 @@ ifeq ($(STELLARIS_CHIP),LM4F120H5QR) MEMSIZE ?= 32768 MEMBASE := 0x20000000 ROMBASE := 0x00000000 -ARM_CPU := cortex-m3 -GLOBAL_DEFINES += TARGET_IS_BLIZZARD_RA1 +ARM_CPU := cortex-m4f +GLOBAL_DEFINES += \ + TARGET_IS_BLIZZARD_RA1 \ + __FPU_PRESENT=1 endif ifeq ($(STELLARIS_CHIP),LM3S6965) MEMSIZE ?= 65536 diff --git a/platform/stm32f7xx/init.c b/platform/stm32f7xx/init.c index 012eeb96..e8ef5649 100644 --- a/platform/stm32f7xx/init.c +++ b/platform/stm32f7xx/init.c @@ -41,10 +41,6 @@ extern const sdram_config_t target_sdram_config; void SystemInit(void) { - /* FPU settings ------------------------------------------------------------*/ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ -#endif /* Reset the RCC clock configuration to the default reset state ------------*/ /* Set HSION bit */ RCC->CR |= (uint32_t)0x00000001; diff --git a/platform/stm32f7xx/rules.mk b/platform/stm32f7xx/rules.mk index 79ee999e..f040a492 100644 --- a/platform/stm32f7xx/rules.mk +++ b/platform/stm32f7xx/rules.mk @@ -10,7 +10,7 @@ MEMBASE ?= 0x20010000 MEMSIZE ?= 0x40000 ARCH := arm -ARM_CPU := cortex-m7 +ARM_CPU := cortex-m7-fpu-sp-d16 ifeq ($(STM32_CHIP),stm32f746) GLOBAL_DEFINES += STM32F746xx |