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| author | Colin LeMahieu <colinl@codeaurora.org> | 2017-03-16 00:35:28 +0000 |
|---|---|---|
| committer | Colin LeMahieu <colinl@codeaurora.org> | 2017-03-16 00:35:28 +0000 |
| commit | 731cac0fcbca0218c161fbcc666f6e9c37cea9df (patch) | |
| tree | 5860639982badd49b85877f30e81bad4f5589874 /test/MC/Hexagon | |
| parent | e79427160e7786445bfcd58ba68802316fe5cef0 (diff) | |
| download | llvm-731cac0fcbca0218c161fbcc666f6e9c37cea9df.tar.gz | |
[Hexagon] Updating inline saturate lanes for v62 version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297920 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Hexagon')
| -rw-r--r-- | test/MC/Hexagon/bug20416.s | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/test/MC/Hexagon/bug20416.s b/test/MC/Hexagon/bug20416.s new file mode 100644 index 00000000000..e4fb194bbf1 --- /dev/null +++ b/test/MC/Hexagon/bug20416.s @@ -0,0 +1,13 @@ +# RUN: not llvm-mc -mv60 -mhvx -filetype=asm %s 2>%t; FileCheck %s --check-prefix=CHECK-V60-ERROR <%t +# RUN: llvm-mc -mv62 -mhvx -filetype=asm %s | FileCheck %s + +// for this a v60+/hvx instruction sequence, make sure fails with v60 +// but passes with v62. this is because this instruction uses different +// itinerary between v60 and v62 +{ + v0.h=vsat(v5.w,v9.w) + v16.h=vsat(v6.w,v26.w) +} +# CHECK-V60-ERROR: rror: invalid instruction packet: slot error +# CHECK: v0.h = vsat(v5.w,v9.w) +# CHECK: v16.h = vsat(v6.w,v26.w) |