Remove unneeded architecture-specific files.

This includes: * Everything microblaze, mips, and or1k related. * All non-generic platforms and targets. * All projects. * All scripts. Bug: 113121731 Change-Id: I06949f0b70d8bb9b208e4c8b2f22d53136b77e93
author: Nick Bray <ncbray@google.com> 2018-08-23 14:19:10 -0700
committer: Nick Bray <ncbray@google.com> 2018-10-08 13:29:11 -0700
commit: 8007cb550a559cb7e6aa347b8e0c30c30bcee1ee (patch)
tree: 73b2592fac9a701b827ba967017982e7344026c4 /platform
parent: dbfc27fcd8d5fd5c8031ab27201c6b2165c773b8 (diff)
download: common-8007cb550a559cb7e6aa347b8e0c30c30bcee1ee.tar.gz
258 files changed, 0 insertions, 32827 deletions
diff --git a/platform/alterasoc/clocks.c b/platform/alterasoc/clocks.c
deleted file mode 100644
index 3aa27fea..00000000
--- a/platform/alterasoc/clocks.c
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <stdio.h>
-#include <reg.h>
-#include <kernel/thread.h>
-#include <platform/debug.h>
-#include <platform/alterasoc.h>
-#include <target/debugconfig.h>
-
diff --git a/platform/alterasoc/debug.c b/platform/alterasoc/debug.c
deleted file mode 100644
index ff29b51b..00000000
--- a/platform/alterasoc/debug.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * Copyright (c) 2008-2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <stdio.h>
-#include <kernel/thread.h>
-#include <dev/uart.h>
-#include <platform/debug.h>
-#include <target/debugconfig.h>
-#include <reg.h>
-
-void platform_dputc(char c)
-{
-    if (c == '\n')
-        uart_putc(DEBUG_UART, '\r');
-    uart_putc(DEBUG_UART, c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    int ret = uart_getc(DEBUG_UART, wait);
-    if (ret == -1)
-        return -1;
-    *c = ret;
-    return 0;
-}
diff --git a/platform/alterasoc/include/platform/alterasoc.h b/platform/alterasoc/include/platform/alterasoc.h
deleted file mode 100644
index 7f555547..00000000
--- a/platform/alterasoc/include/platform/alterasoc.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <reg.h>
-
-/* common address space regions */
-#define FPGASLAVES_BASE   (0xc0000000)
-#define PERIPH_BASE       (0xfc000000)
-#define LWPFGASLAVES_BASE (0xff200000)
-
-/* hardware base addresses */
-#define STM_BASE            (0xfc000000)
-#define DAP_BASE            (0xff000000)
-#define EMAC0_BASE          (0xff700000)
-#define EMAC1_BASE          (0xff702000)
-#define SDMMC_BASE          (0xff704000)
-#define QSPI_BASE           (0xff705000)
-#define FPGAMGRREGS_BASE    (0xff706000)
-#define ACPIDMAP_BASE       (0xff707000)
-#define GPIO0_BASE          (0xff708000)
-#define GPIO1_BASE          (0xff709000)
-#define GPIO2_BASE          (0xff70a000)
-#define L3REGS_BASE         (0xff800000)
-#define NANDDATA_BASE       (0xff900000)
-#define QSPIDATA_BASE       (0xffa00000)
-#define USB0_BASE           (0xffb00000)
-#define USB1_BASE           (0xffb40000)
-#define NANDREGS_BASE       (0xffb80000)
-#define FPGAMGRDATA_BASE    (0xffb90000)
-#define CAN0_BASE           (0xffc00000)
-#define CAN1_BASE           (0xffc01000)
-#define UART0_BASE          (0xffc02000)
-#define UART1_BASE          (0xffc03000)
-#define I2C0_BASE           (0xffc04000)
-#define I2C1_BASE           (0xffc05000)
-#define I2C2_BASE           (0xffc06000)
-#define I2C3_BASE           (0xffc07000)
-#define SPTIMER0_BASE       (0xffc08000)
-#define SPTIMER1_BASE       (0xffc09000)
-#define SDRREGS_BASE        (0xffc20000)
-#define OSC1TIMER0_BASE     (0xffd00000)
-#define OSC1TIMER1_BASE     (0xffd01000)
-#define L4WD0_BASE          (0xffd02000)
-#define L4WD1_BASE          (0xffd03000)
-#define CLKMGR_BASE         (0xffd04000)
-#define RSTMGR_BASE         (0xffd05000)
-#define SYSMGR_BASE         (0xffd08000)
-#define DMANONSECURE_BASE   (0xffe00000)
-#define DMASECURE_BASE      (0xffe01000)
-#define SPIS0_BASE          (0xffe02000)
-#define SPIS1_BASE          (0xffe03000)
-#define SPIM0_BASE          (0xfff00000)
-#define SPIM1_BASE          (0xfff01000)
-#define SCANMGR_BASE        (0xfff02000)
-#define ROM_BASE            (0xfffd0000)
-#define MPUSCU_BASE         (0xfffec000)
-#define MPUL2_BASE          (0xfffef000)
-#define OCRAM_BASE          (0xffff0000)
-
-#define CPUPRIV_BASE        (MPUSCU_BASE)
-#define SCU_CONTROL_BASE    (CPUPRIV_BASE + 0x0000)
-#define GIC_PROC_BASE       (CPUPRIV_BASE + 0x0100)
-#define GLOBAL_TIMER_BASE   (CPUPRIV_BASE + 0x0200)
-#define PRIV_TIMER_BASE     (CPUPRIV_BASE + 0x0600)
-#define GIC_DISTRIB_BASE    (CPUPRIV_BASE + 0x1000)
-
-/* interrupts */
-
-#define FPGA_INT(n) (72 + (n))
-
-#define SPI0_INT        186
-#define SPI1_INT        187
-#define SPI2_INT        188
-#define SPI3_INT        189
-#define I2C0_INT        190
-#define I2C1_INT        191
-#define I2C2_INT        192
-#define I2C3_INT        193
-#define UART0_INT       194
-#define UART1_INT       195
-#define GPIO0_INT       196
-#define GPIO1_INT       197
-#define GPIO2_INT       198
-#define TIMER_L4SP0_INT 199
-#define TIMER_L4SP1_INT 200
-#define TIMER_OSC0_INT  201
-#define TIMER_OSC1_INT  202
-#define WDOG0_INT       203
-#define WDOG1_INT       204
-#define CLKMGR_INT      205
-#define MPUWAKEUP_INT   206
-#define FPGA_MAN_INT    207
-
-#define MAX_INT 212
-
diff --git a/platform/alterasoc/include/platform/gic.h b/platform/alterasoc/include/platform/gic.h
deleted file mode 100644
index 0a3942f2..00000000
--- a/platform/alterasoc/include/platform/gic.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <platform/alterasoc.h>
-
-#define GICBASE(n)  (CPUPRIV_BASE)
-#define GICC_OFFSET (0x0100)
-#define GICD_OFFSET (0x1000)
-
diff --git a/platform/alterasoc/platform.c b/platform/alterasoc/platform.c
deleted file mode 100644
index 13a78a47..00000000
--- a/platform/alterasoc/platform.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * Copyright (c) 2012-2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <debug.h>
-#include <assert.h>
-#include <trace.h>
-#include <arch/arm/mmu.h>
-#include <dev/uart.h>
-#include <dev/interrupt/arm_gic.h>
-#include <dev/timer/arm_cortex_a9.h>
-#include <kernel/vm.h>
-#include <platform.h>
-#include <platform/alterasoc.h>
-#include "platform_p.h"
-
-/* initial memory mappings. parsed by start.S */
-struct mmu_initial_mapping mmu_initial_mappings[] = {
-    /* 1GB of sdram space */
-    {
-        .phys = 0x0,
-        .virt = KERNEL_BASE,
-        .size = 1024*1024*1024,
-        .flags = 0,
-        .name = "memory"
-    },
-
-    /* HPS peripherals */
-    {
-        .phys = 0xfc000000,
-        .virt = 0xfc000000,
-        .size = 0x04000000,
-        .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
-        .name = "hps_periphs"
-    },
-
-    /* identity map to let the boot code run */
-    {
-        .phys = 0,
-        .virt = 0,
-        .size = 1024*1024*1024,
-        .flags = MMU_INITIAL_MAPPING_TEMPORARY
-    },
-
-    /* null entry to terminate the list */
-    { 0 }
-};
-
-static pmm_arena_t sdram_arena = {
-    .name = "sdram",
-    .base = 0,
-    .size = MEMSIZE,
-    .flags = PMM_ARENA_FLAG_KMAP
-};
-
-void platform_init_mmu_mappings(void)
-{
-}
-
-void platform_early_init(void)
-{
-    uart_init_early();
-
-    printf("stat 0x%x\n", *REG32(0xffd05000));
-
-    /* initialize the interrupt controller */
-    arm_gic_init();
-
-    /* initialize the timer block */
-    arm_cortex_a9_timer_init(CPUPRIV_BASE, TIMER_CLOCK_FREQ);
-
-    pmm_add_arena(&sdram_arena);
-
-    /* start the secondary cpu */
-    *REG32(0xffd05010) = 0;
-}
-
-void platform_init(void)
-{
-    uart_init();
-}
-
diff --git a/platform/alterasoc/platform_p.h b/platform/alterasoc/platform_p.h
deleted file mode 100644
index d811618b..00000000
--- a/platform/alterasoc/platform_p.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <sys/types.h>
-
-void platform_init_timer(uint32_t freq);
-
diff --git a/platform/alterasoc/rules.mk b/platform/alterasoc/rules.mk
deleted file mode 100644
index 3cf03131..00000000
--- a/platform/alterasoc/rules.mk
+++ /dev/null
@@ -1,26 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-ARCH := arm
-ARM_CPU := cortex-a9-neon
-WITH_SMP := 1
-
-MODULE_DEPS := \
-	lib/cbuf \
-	dev/interrupt/arm_gic \
-	dev/timer/arm_cortex_a9
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/clocks.c \
-	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/platform.c \
-	$(LOCAL_DIR)/uart.c
-
-MEMBASE := 0x0
-MEMSIZE ?= 0x10000000	# 256MB
-
-LINKER_SCRIPT += \
-	$(BUILDDIR)/system-onesegment.ld
-
-include make/module.mk
diff --git a/platform/alterasoc/uart.c b/platform/alterasoc/uart.c
deleted file mode 100644
index cf131c45..00000000
--- a/platform/alterasoc/uart.c
+++ /dev/null
@@ -1,155 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <bits.h>
-#include <stdio.h>
-#include <trace.h>
-#include <lib/cbuf.h>
-#include <kernel/thread.h>
-#include <kernel/spinlock.h>
-#include <platform/interrupts.h>
-#include <platform/debug.h>
-#include <platform/alterasoc.h>
-
-#define UART_THR (0x00)
-#define UART_RBR (0x00)
-#define UART_DLL (0x00)
-#define UART_IER (0x04)
-#define UART_DLH (0x04)
-#define UART_IIR (0x08)
-#define UART_FCR (0x08)
-#define UART_LCR (0x0c)
-#define UART_MCR (0x10)
-#define UART_LSR (0x14)
-#define UART_MSR (0x18)
-#define UART_SCR (0x1c)
-#define UART_USR (0x7c)
-#define UART_TFL (0x80)
-#define UART_RFL (0x84)
-#define UART_SRR (0x88)
-
-#define UARTREG(base, reg)  (*REG32((base)  + (reg)))
-
-#define RXBUF_SIZE 16
-
-static cbuf_t uart0_rx_buf;
-static cbuf_t uart1_rx_buf;
-
-static inline uintptr_t uart_to_ptr(unsigned int n) { return (n == 0) ? UART0_BASE : UART1_BASE; }
-static inline cbuf_t *uart_to_rxbuf(unsigned int n) { return (n == 0) ? &uart0_rx_buf : &uart1_rx_buf; }
-
-static spin_lock_t lock = SPIN_LOCK_INITIAL_VALUE;
-
-static enum handler_return uart_irq(void *arg)
-{
-    bool resched = false;
-    uint port = (uint)arg;
-    uintptr_t base = uart_to_ptr(port);
-
-    /* read interrupt identity */
-    uint32_t iir = UARTREG(base, UART_IIR);
-
-    /* receive data available */
-    if (BITS(iir, 3, 0) == 0x4) {
-        cbuf_t *rxbuf = uart_to_rxbuf(port);
-
-        /* while receive fifo not empty, read a char */
-        while ((UARTREG(base, UART_USR) & (1<<3))) {
-            char c = UARTREG(base, UART_RBR);
-            cbuf_write_char(rxbuf, c, false);
-
-            resched = true;
-        }
-    }
-
-    return resched ? INT_RESCHEDULE : INT_NO_RESCHEDULE;
-}
-
-void uart_init(void)
-{
-    cbuf_initialize(&uart0_rx_buf, RXBUF_SIZE);
-    cbuf_initialize(&uart1_rx_buf, RXBUF_SIZE);
-
-    register_int_handler(UART0_INT, &uart_irq, (void *)0);
-    register_int_handler(UART1_INT, &uart_irq, (void *)1);
-
-    // enable the fifo
-    UARTREG(uart_to_ptr(0), UART_FCR) = (1<<0); // enable rx fifo, set tx trigger to 0, set rx trigger to 0
-    UARTREG(uart_to_ptr(1), UART_FCR) = (1<<0); // enable rx fifo, set tx trigger to 0, set rx trigger to 0
-
-    // enable rx interrupt
-    UARTREG(uart_to_ptr(0), UART_IER) = (1<<0); // receive data interrupt
-    UARTREG(uart_to_ptr(1), UART_IER) = (1<<0); // receive data interrupt
-
-    unmask_interrupt(UART0_INT);
-    unmask_interrupt(UART1_INT);
-}
-
-void uart_init_early(void)
-{
-#if 0
-    UARTREG(uart_to_ptr(0), UART_CR) = (1<<4); // txen
-    UARTREG(uart_to_ptr(1), UART_CR) = (1<<4); // txen
-#endif
-}
-
-int uart_putc(int port, char c)
-{
-    uintptr_t base = uart_to_ptr(port);
-
-    spin_lock_saved_state_t state;
-    spin_lock_irqsave(&lock, state);
-
-    /* spin while fifo is full */
-    while ((UARTREG(base, UART_USR) & (1<<1)) == 0) {
-    }
-    UARTREG(base, UART_THR) = c;
-
-    spin_unlock_irqrestore(&lock, state);
-
-    return 1;
-}
-
-int uart_getc(int port, bool wait)
-{
-    cbuf_t *rxbuf = uart_to_rxbuf(port);
-
-    char c;
-    if (cbuf_read_char(rxbuf, &c, wait) == 1)
-        return c;
-
-    return -1;
-}
-
-void uart_flush_tx(int port)
-{
-}
-
-void uart_flush_rx(int port)
-{
-}
-
-void uart_init_port(int port, uint baud)
-{
-}
-
diff --git a/platform/armemu/blkdev.c b/platform/armemu/blkdev.c
deleted file mode 100644
index bf733316..00000000
--- a/platform/armemu/blkdev.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * Copyright (c) 2010 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <debug.h>
-#include <trace.h>
-#include <platform.h>
-#include "platform_p.h"
-#include <platform/armemu.h>
-#include <lib/bio.h>
-#include <reg.h>
-
-static bdev_t dev;
-
-static uint64_t get_blkdev_len(void)
-{
-    return *REG64(BDEV_LEN);
-}
-
-ssize_t read_block(struct bdev *dev, void *buf, bnum_t block, uint count)
-{
-    /* assume args have been validated by layer above */
-    *REG32(BDEV_CMD_ADDR) = (uint32_t)buf;
-    *REG64(BDEV_CMD_OFF) = (uint64_t)((uint64_t)block * dev->block_size);
-    *REG32(BDEV_CMD_LEN) = count * dev->block_size;
-
-    *REG32(BDEV_CMD) = BDEV_CMD_READ;
-
-    uint32_t err = *REG32(BDEV_CMD) & BDEV_CMD_ERRMASK;
-    if (err == BDEV_CMD_ERR_NONE)
-        return count * dev->block_size;
-    else
-        return ERR_IO;
-}
-
-ssize_t write_block(struct bdev *dev, const void *buf, bnum_t block, uint count)
-{
-    /* assume args have been validated by layer above */
-    *REG32(BDEV_CMD_ADDR) = (uint32_t)buf;
-    *REG64(BDEV_CMD_OFF) = (uint64_t)((uint64_t)block * dev->block_size);
-    *REG32(BDEV_CMD_LEN) = count * dev->block_size;
-
-    *REG32(BDEV_CMD) = BDEV_CMD_WRITE;
-
-    uint32_t err = *REG32(BDEV_CMD) & BDEV_CMD_ERRMASK;
-    if (err == BDEV_CMD_ERR_NONE)
-        return count * dev->block_size;
-    else
-        return ERR_IO;
-}
-
-void platform_init_blkdev(void)
-{
-    if ((*REG32(SYSINFO_FEATURES) & SYSINFO_FEATURE_BLOCKDEV) == 0)
-        return; // no block device
-
-    TRACEF("device len %lld\n", get_blkdev_len());
-
-    if (get_blkdev_len() == 0)
-        return;
-
-    bio_initialize_bdev(&dev, "block0", 512, get_blkdev_len() / 512, 0, NULL,
-                        BIO_FLAGS_NONE);
-
-    // fill in hooks
-    dev.read_block = &read_block;
-    dev.write_block = &write_block;
-
-    bio_register_device(&dev);
-}
-
diff --git a/platform/armemu/debug.c b/platform/armemu/debug.c
deleted file mode 100644
index c47ec38e..00000000
--- a/platform/armemu/debug.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <stdio.h>
-#include <kernel/thread.h>
-#include <platform/armemu/memmap.h>
-#include <platform/debug.h>
-
-void platform_dputc(char c)
-{
-    *REG8(DEBUG_STDOUT) = c;
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    for (;;) {
-        int8_t result = (int8_t)*REG8(DEBUG_STDIN);
-
-        if (result == -1) {
-            if (wait)
-                continue;
-            else
-                return -1;
-        }
-
-        *c = (char)result;
-        return 0;
-    }
-}
-
-void debug_dump_regs(void)
-{
-    *REG32(DEBUG_REGDUMP) = 1;
-}
-
-void platform_halt(void)
-{
-    *REG32(DEBUG_HALT) = 1;
-    for (;;);
-}
-
-void debug_dump_memory_bytes(void *mem, int len)
-{
-    *REG32(DEBUG_MEMDUMPADDR) = (unsigned int)mem;
-    *REG32(DEBUG_MEMDUMPLEN) = len;
-    *REG32(DEBUG_MEMDUMP_BYTE) = 1;
-}
-
-void debug_dump_memory_halfwords(void *mem, int len)
-{
-    len /= 2;
-
-    *REG32(DEBUG_MEMDUMPADDR) = (unsigned int)mem;
-    *REG32(DEBUG_MEMDUMPLEN) = len;
-    *REG32(DEBUG_MEMDUMP_HALFWORD) = 1;
-}
-
-void debug_dump_memory_words(void *mem, int len)
-{
-    len /= 4;
-
-    *REG32(DEBUG_MEMDUMPADDR) = (unsigned int)mem;
-    *REG32(DEBUG_MEMDUMPLEN) = len;
-    *REG32(DEBUG_MEMDUMP_WORD) = 1;
-}
-
-void debug_set_trace_level(int trace_type, int level)
-{
-    if (trace_type < 0 || trace_type >= 4)
-        return;
-
-    *REG32(DEBUG_SET_TRACELEVEL_CPU + trace_type * 4) = level;
-}
-
-uint32_t debug_cycle_count(void)
-{
-    return *REG32(DEBUG_CYCLE_COUNT);
-}
diff --git a/platform/armemu/display.c b/platform/armemu/display.c
deleted file mode 100644
index fed1ccf6..00000000
--- a/platform/armemu/display.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * Copyright (c) 2010 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <debug.h>
-#include <trace.h>
-#include <platform.h>
-#include "platform_p.h"
-#include <platform/armemu.h>
-#include <dev/display.h>
-#include <lib/gfx.h>
-#include <reg.h>
-#include <assert.h>
-
-#define DRAW_TEST_PATTERN 0
-
-static int display_w, display_h;
-static void *display_fb;
-
-inline static int has_display(void)
-{
-    return *REG32(SYSINFO_FEATURES) & SYSINFO_FEATURE_DISPLAY;
-}
-
-void platform_init_display(void)
-{
-    if (!has_display())
-        return;
-
-    display_fb = (void *)DISPLAY_FRAMEBUFFER;
-    display_w = *REG32(DISPLAY_WIDTH);
-    display_h = *REG32(DISPLAY_HEIGHT);
-
-#if DRAW_TEST_PATTERN
-    gfx_draw_pattern();
-#endif
-}
-
-status_t display_get_framebuffer(struct display_framebuffer *fb)
-{
-    DEBUG_ASSERT(fb);
-    if (!has_display())
-        return ERR_NOT_FOUND;
-
-    fb->image.format = IMAGE_FORMAT_RGB_x888;
-    fb->image.pixels = display_fb;
-    fb->image.width = display_w;
-    fb->image.height = display_h;
-    fb->image.stride = display_w;
-    fb->image.rowbytes = display_w * 4;
-    fb->flush = NULL;
-    fb->format = DISPLAY_FORMAT_RGB_x888;
-
-    return NO_ERROR;
-}
-
-status_t display_get_info(struct display_info *info)
-{
-    DEBUG_ASSERT(info);
-    if (!has_display())
-        return ERR_NOT_FOUND;
-
-    info->format = DISPLAY_FORMAT_RGB_x888;
-    info->width = display_w;
-    info->height = display_h;
-
-    return NO_ERROR;
-}
-
-status_t display_present(struct display_image *image, uint starty, uint endy)
-{
-  TRACEF("display_present - not implemented");
-  DEBUG_ASSERT(false);
-  return NO_ERROR;
-}
diff --git a/platform/armemu/include/platform/armemu.h b/platform/armemu/include/platform/armemu.h
deleted file mode 100644
index ed90c300..00000000
--- a/platform/armemu/include/platform/armemu.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_ARMEMU_H
-#define __PLATFORM_ARMEMU_H
-
-#include <platform/armemu/memmap.h>
-
-void debug_dump_regs(void);
-
-void debug_dump_memory_bytes(void *mem, int len);
-void debug_dump_memory_halfwords(void *mem, int len);
-void debug_dump_memory_words(void *mem, int len);
-
-void debug_set_trace_level(int trace_type, int level);
-
-#endif
-
diff --git a/platform/armemu/include/platform/armemu/memmap.h b/platform/armemu/include/platform/armemu/memmap.h
deleted file mode 100644
index abf73810..00000000
--- a/platform/armemu/include/platform/armemu/memmap.h
+++ /dev/null
@@ -1,175 +0,0 @@
-/*
- * Copyright (c) 2005-2010 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __MEMMAP_H
-#define __MEMMAP_H
-
-#define MEMBANK_SIZE (4*1024*1024)
-
-/* some helpful macros */
-#define REG(x) ((volatile unsigned int *)(x))
-#define REG_H(x) ((volatile unsigned short *)(x))
-#define REG_B(x) ((volatile unsigned char *)(x))
-
-/* memory map of our generic arm system */
-// XXX make more dynamic
-#define MAINMEM_BASE 0x0
-#define MAINMEM_SIZE (MEMBANK_SIZE)
-
-/* peripherals are all mapped here */
-#define PERIPHERAL_BASE   (0xf0000000)
-
-/* system info */
-#define SYSINFO_REGS_BASE (PERIPHERAL_BASE)
-#define SYSINFO_REGS_SIZE MEMBANK_SIZE
-#define SYSINFO_FEATURES  (SYSINFO_REGS_BASE + 0)
-#define SYSINFO_FEATURE_DISPLAY 0x00000001
-#define SYSINFO_FEATURE_CONSOLE 0x00000002
-#define SYSINFO_FEATURE_NETWORK 0x00000004
-#define SYSINFO_FEATURE_BLOCKDEV 0x00000008
-
-/* a write to this register latches the current emulator system time, so the next two regs can be read atomically */
-#define SYSINFO_TIME_LATCH (SYSINFO_REGS_BASE + 4)
-/* gettimeofday() style time values */
-#define SYSINFO_TIME_SECS  (SYSINFO_REGS_BASE + 8)
-#define SYSINFO_TIME_USECS (SYSINFO_REGS_BASE + 12)
-
-/* display */
-#define DISPLAY_BASE      (SYSINFO_REGS_BASE + SYSINFO_REGS_SIZE)
-#define DISPLAY_SIZE      MEMBANK_SIZE
-#define DISPLAY_FRAMEBUFFER DISPLAY_BASE
-#define DISPLAY_REGS_BASE (DISPLAY_BASE + DISPLAY_SIZE)
-#define DISPLAY_REGS_SIZE MEMBANK_SIZE
-
-#define DISPLAY_WIDTH     (DISPLAY_REGS_BASE + 0) // pixels width/height read/only
-#define DISPLAY_HEIGHT    (DISPLAY_REGS_BASE + 4)
-#define DISPLAY_BPP       (DISPLAY_REGS_BASE + 8) // bits per pixel (16/32)
-
-/* console (keyboard controller */
-#define CONSOLE_REGS_BASE (DISPLAY_REGS_BASE + DISPLAY_REGS_SIZE)
-#define CONSOLE_REGS_SIZE MEMBANK_SIZE
-#define KYBD_STAT         (CONSOLE_REGS_BASE + 0)
-#define KYBD_DATA         (CONSOLE_REGS_BASE + 4)
-
-/* programmable timer */
-#define PIT_REGS_BASE     (CONSOLE_REGS_BASE + CONSOLE_REGS_SIZE)
-#define PIT_REGS_SIZE     MEMBANK_SIZE
-#define PIT_STATUS        (PIT_REGS_BASE + 0) // status bit
-#define PIT_CLEAR         (PIT_REGS_BASE + 4) // a nonzero write clears any pending timer
-#define PIT_CLEAR_INT     (PIT_REGS_BASE + 8) // a nonzero write clears the pending interrupt
-#define PIT_INTERVAL      (PIT_REGS_BASE + 12) // set the countdown interval, and what the interval is reset to if periodic
-#define PIT_START_ONESHOT (PIT_REGS_BASE + 16) // a nonzero write starts a oneshot countdown
-#define PIT_START_PERIODIC (PIT_REGS_BASE + 20) // a nonzero write starts a periodic countdown
-
-#define PIT_STATUS_ACTIVE    0x1
-#define PIT_STATUS_INT_PEND  0x2
-
-/* interrupt controller */
-#define PIC_REGS_BASE     (PIT_REGS_BASE + PIT_REGS_SIZE)
-#define PIC_REGS_SIZE     MEMBANK_SIZE
-
-/* Current vector mask, read-only */
-#define PIC_MASK          (PIC_REGS_BASE + 0)
-/* Mask any of the 32 interrupt vectors by writing a 1 in the appropriate bit */
-#define PIC_MASK_LATCH    (PIC_REGS_BASE + 4)
-/* Unmask any of the 32 interrupt vectors by writing a 1 in the appropriate bit */
-#define PIC_UNMASK_LATCH  (PIC_REGS_BASE + 8)
-/* each bit corresponds to the current status of the interrupt line */
-#define PIC_STAT          (PIC_REGS_BASE + 12)
-/* one bit set for the highest priority non-masked active interrupt */
-#define PIC_CURRENT_BIT   (PIC_REGS_BASE + 16)
-/* holds the current interrupt number of the highest priority non-masked active interrupt,
- * or 0xffffffff if no interrupt is active
- */
-#define PIC_CURRENT_NUM   (PIC_REGS_BASE + 20)
-
-/* interrupt map */
-#define INT_PIT      0
-#define INT_KEYBOARD 1
-#define INT_NET      2
-#define PIC_MAX_INT 32
-
-/* debug interface */
-#define DEBUG_REGS_BASE (PIC_REGS_BASE + PIC_REGS_SIZE)
-#define DEBUG_REGS_SIZE MEMBANK_SIZE
-#define DEBUG_STDOUT (DEBUG_REGS_BASE + 0) /* writes to this register are sent through to stdout */
-#define DEBUG_STDIN  (DEBUG_REGS_BASE + 0) /* reads from this register return the contents of stdin
-                                            * or -1 if no data is pending */
-#define DEBUG_REGDUMP (DEBUG_REGS_BASE + 4) /* writes to this register cause the emulator to dump registers */
-#define DEBUG_HALT    (DEBUG_REGS_BASE + 8) /* writes to this register will halt the emulator */
-
-#define DEBUG_MEMDUMPADDR (DEBUG_REGS_BASE + 12)      /* set the base address of memory to dump */
-#define DEBUG_MEMDUMPLEN  (DEBUG_REGS_BASE + 16)      /* set the length of memory to dump */
-#define DEBUG_MEMDUMP_BYTE  (DEBUG_REGS_BASE + 20)    /* trigger a memory dump in byte format */
-#define DEBUG_MEMDUMP_HALFWORD (DEBUG_REGS_BASE + 24) /* trigger a memory dump in halfword format */
-#define DEBUG_MEMDUMP_WORD (DEBUG_REGS_BASE + 28)     /* trigger a memory dump in word format */
-
-/* lets you set the trace level of the various subsystems from within the emulator */
-/* only works on emulator builds that support dynamic trace levels */
-#define DEBUG_SET_TRACELEVEL_CPU (DEBUG_REGS_BASE + 32)
-#define DEBUG_SET_TRACELEVEL_UOP (DEBUG_REGS_BASE + 36)
-#define DEBUG_SET_TRACELEVEL_SYS (DEBUG_REGS_BASE + 40)
-#define DEBUG_SET_TRACELEVEL_MMU (DEBUG_REGS_BASE + 44)
-
-#define DEBUG_CYCLE_COUNT (DEBUG_REGS_BASE + 48)
-#define DEBUG_INS_COUNT (DEBUG_REGS_BASE + 52)
-
-/* network interface */
-#define NET_REGS_BASE (DEBUG_REGS_BASE + DEBUG_REGS_SIZE)
-#define NET_REGS_SIZE MEMBANK_SIZE
-
-#define NET_BUF_LEN 2048
-#define NET_IN_BUF_COUNT 32
-
-#define NET_HEAD    (NET_REGS_BASE + 0)     /* current next buffer the hardware will write to */
-#define NET_TAIL    (NET_REGS_BASE + 4)     /* currently selected input buffer */
-#define NET_SEND    (NET_REGS_BASE + 8)     /* writes to this register sends whatever is in the out buf */
-#define NET_SEND_LEN (NET_REGS_BASE + 12)   /* length of packet to send */
-#define NET_OUT_BUF (NET_REGS_BASE + NET_BUF_LEN)
-
-#define NET_IN_BUF_LEN (NET_REGS_BASE + 16) /* length of the currently selected in buffer, via tail register */
-#define NET_IN_BUF  (NET_REGS_BASE + NET_BUF_LEN*2)
-
-/* block device interface */
-#define BDEV_REGS_BASE (NET_REGS_BASE + NET_REGS_SIZE)
-#define BDEV_REGS_SIZE MEMBANK_SIZE
-
-#define BDEV_CMD    (BDEV_REGS_BASE + 0)    /* command */
-#define BDEV_CMD_ADDR   (BDEV_REGS_BASE + 4)    /* address of next transfer, 32bit */
-#define BDEV_CMD_OFF    (BDEV_REGS_BASE + 8)    /* offset of next transfer, 64bit */
-#define BDEV_CMD_LEN    (BDEV_REGS_BASE + 16)   /* length of next transfer, 32bit */
-
-#define BDEV_LEN    (BDEV_REGS_BASE + 20)   /* length of block device, 64bit */
-
-/* BDEV_CMD bits */
-#define BDEV_CMD_MASK   (0x3)
-#define BDEV_CMD_NOP    (0)
-#define BDEV_CMD_READ   (1)
-#define BDEV_CMD_WRITE  (2)
-#define BDEV_CMD_ERASE  (3)
-#define BDEV_CMD_ERRSHIFT   16
-#define BDEV_CMD_ERRMASK    (0xffff << BDEV_CMD_ERRSHIFT)
-#define BDEV_CMD_ERR_NONE (0 << BDEV_CMD_ERRSHIFT)
-#define BDEV_CMD_ERR_GENERAL (1 << BDEV_CMD_ERRSHIFT)
-#define BDEV_CMD_ERR_BAD_OFFSET (2 << BDEV_CMD_ERRSHIFT)
-
-#endif
diff --git a/platform/armemu/interrupts.c b/platform/armemu/interrupts.c
deleted file mode 100644
index 6d2426b8..00000000
--- a/platform/armemu/interrupts.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <sys/types.h>
-#include <debug.h>
-#include <reg.h>
-#include <kernel/thread.h>
-#include <kernel/debug.h>
-#include <platform/interrupts.h>
-#include <platform/armemu.h>
-#include <arch/ops.h>
-#include <arch/arm.h>
-#include "platform_p.h"
-
-struct int_handler_struct {
-    int_handler handler;
-    void *arg;
-};
-
-static struct int_handler_struct int_handler_table[PIC_MAX_INT];
-
-void platform_init_interrupts(void)
-{
-    // mask all the interrupts
-    *REG32(PIC_MASK_LATCH) = 0xffffffff;
-}
-
-status_t mask_interrupt(unsigned int vector)
-{
-    if (vector >= PIC_MAX_INT)
-        return ERR_INVALID_ARGS;
-
-//  dprintf("%s: vector %d\n", __PRETTY_FUNCTION__, vector);
-
-    *REG32(PIC_MASK_LATCH) = 1 << vector;
-
-    return NO_ERROR;
-}
-
-status_t unmask_interrupt(unsigned int vector)
-{
-    if (vector >= PIC_MAX_INT)
-        return ERR_INVALID_ARGS;
-
-//  dprintf("%s: vector %d\n", __PRETTY_FUNCTION__, vector);
-
-    *REG32(PIC_UNMASK_LATCH) = 1 << vector;
-
-    return NO_ERROR;
-}
-
-enum handler_return platform_irq(struct arm_iframe *frame)
-{
-    // get the current vector
-    unsigned int vector = *REG32(PIC_CURRENT_NUM);
-    if (vector == 0xffffffff)
-        return INT_NO_RESCHEDULE;
-
-    THREAD_STATS_INC(interrupts);
-    KEVLOG_IRQ_ENTER(vector);
-
-//  printf("platform_irq: spsr 0x%x, pc 0x%x, currthread %p, vector %d\n", frame->spsr, frame->pc, current_thread, vector);
-
-    // deliver the interrupt
-    enum handler_return ret;
-
-    ret = INT_NO_RESCHEDULE;
-    if (int_handler_table[vector].handler)
-        ret = int_handler_table[vector].handler(int_handler_table[vector].arg);
-
-//  dprintf("platform_irq: exit %d\n", ret);
-
-    KEVLOG_IRQ_EXIT(vector);
-
-    return ret;
-}
-
-void platform_fiq(struct arm_iframe *frame)
-{
-    panic("FIQ: unimplemented\n");
-}
-
-void register_int_handler(unsigned int vector, int_handler handler, void *arg)
-{
-    if (vector >= PIC_MAX_INT)
-        panic("register_int_handler: vector out of range %d\n", vector);
-
-    int_handler_table[vector].handler = handler;
-    int_handler_table[vector].arg = arg;
-}
-
diff --git a/platform/armemu/net.c b/platform/armemu/net.c
deleted file mode 100644
index e2f1eedd..00000000
--- a/platform/armemu/net.c
+++ /dev/null
@@ -1,397 +0,0 @@
-#if WITH_LWIP
-/*
- * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
- * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
- * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- * OF SUCH DAMAGE.
- *
- * This file is part of the lwIP TCP/IP stack.
- *
- * Author: Adam Dunkels <adam@sics.se>
- *
- */
-
-/*
- * This file is a skeleton for developing Ethernet network interface
- * drivers for lwIP. Add code to the low_level functions and do a
- * search-and-replace for the word "ethernetif" to replace it with
- * something that better describes your network interface.
- */
-/*
- * ARMEMU bits
- * Copyright (c) 2006 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <malloc.h>
-#include <dev/ethernet.h>
-#include <err.h>
-#include <reg.h>
-#include <string.h>
-#include <platform/interrupts.h>
-#include <platform/armemu/memmap.h>
-
-#include "lwip/opt.h"
-#include "lwip/def.h"
-#include "lwip/mem.h"
-#include "lwip/pbuf.h"
-#include "lwip/sys.h"
-#include <lwip/stats.h>
-
-#include "netif/etharp.h"
-
-/* Define those to better describe your network interface. */
-#define IFNAME0 'e'
-#define IFNAME1 'n'
-
-struct ethernetif {
-    struct eth_addr *ethaddr;
-    /* Add whatever per-interface state that is needed here. */
-};
-
-static const struct eth_addr ethbroadcast = {{0xff,0xff,0xff,0xff,0xff,0xff}};
-
-/* Forward declarations. */
-static void  ethernetif_input(struct netif *netif);
-static err_t ethernetif_output(struct netif *netif, struct pbuf *p,
-                               struct ip_addr *ipaddr);
-
-static void
-low_level_init(struct netif *netif)
-{
-    struct ethernetif *ethernetif = netif->state;
-
-    /* set MAC hardware address length */
-    netif->hwaddr_len = 6;
-
-    /* set MAC hardware address */
-    netif->hwaddr[0] = 0;
-    netif->hwaddr[1] = 0x01;
-    netif->hwaddr[2] = 0x02;
-    netif->hwaddr[3] = 0x03;
-    netif->hwaddr[4] = 0x04;
-    netif->hwaddr[5] = 0x05;
-
-    /* maximum transfer unit */
-    netif->mtu = 1500;
-
-    /* broadcast capability */
-    netif->flags = NETIF_FLAG_BROADCAST;
-
-    /* Do whatever else is needed to initialize interface. */
-}
-
-/*
- * low_level_output():
- *
- * Should do the actual transmission of the packet. The packet is
- * contained in the pbuf that is passed to the function. This pbuf
- * might be chained.
- *
- */
-
-static err_t
-low_level_output(struct netif *netif, struct pbuf *p)
-{
-    struct ethernetif *ethernetif = netif->state;
-    struct pbuf *q;
-    int i;
-    int j;
-
-#if ETH_PAD_SIZE
-    pbuf_header(p, -ETH_PAD_SIZE);            /* drop the padding word */
-#endif
-
-    /* XXX maybe just a mutex? */
-    enter_critical_section();
-
-    i = 0;
-    for (q = p; q != NULL; q = q->next) {
-        /* Send the data from the pbuf to the interface, one pbuf at a
-           time. The size of the data in each pbuf is kept in the ->len
-           variable. */
-//  debug_dump_memory_bytes(q->payload, q->len);
-        for (j = 0; j < q->len; j++)
-            *REG8(NET_OUT_BUF + i + j) = ((unsigned char *)q->payload)[j];
-        i += q->len;
-    }
-
-    *REG(NET_SEND_LEN) = i;
-    *REG(NET_SEND) = 1;
-
-    exit_critical_section();
-
-#if ETH_PAD_SIZE
-    pbuf_header(p, ETH_PAD_SIZE);         /* reclaim the padding word */
-#endif
-
-#if LINK_STATS
-    lwip_stats.link.xmit++;
-#endif /* LINK_STATS */
-
-    return ERR_OK;
-}
-
-/*
- * low_level_input():
- *
- * Should allocate a pbuf and transfer the bytes of the incoming
- * packet from the interface into the pbuf.
- *
- */
-
-static struct pbuf *
-low_level_input(struct netif *netif)
-{
-    struct ethernetif *ethernetif = netif->state;
-    struct pbuf *p, *q;
-    u16_t len;
-    int i;
-    int head, tail;
-
-    /* get the head and tail pointers from the ethernet interface */
-    head = *REG(NET_HEAD);
-    tail = *REG(NET_TAIL);
-
-    if (tail == head)
-        return NULL; // false alarm
-
-    /* Obtain the size of the packet and put it into the "len"
-       variable. */
-    len = *REG(NET_IN_BUF_LEN);
-
-#if ETH_PAD_SIZE
-    len += ETH_PAD_SIZE;                      /* allow room for Ethernet padding */
-#endif
-
-    /* We allocate a pbuf chain of pbufs from the pool. */
-    p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
-    if (p != NULL) {
-
-#if ETH_PAD_SIZE
-        pbuf_header(p, -ETH_PAD_SIZE);          /* drop the padding word */
-#endif
-
-        /* We iterate over the pbuf chain until we have read the entire
-         * packet into the pbuf. */
-        int pos = 0;
-        for (q = p; q != NULL; q = q->next) {
-            /* Read enough bytes to fill this pbuf in the chain. The
-             * available data in the pbuf is given by the q->len
-             * variable. */
-            for (i=0; i < q->len; i++) {
-                ((unsigned char *)q->payload)[i] = *REG8(NET_IN_BUF + pos);
-                pos++;
-            }
-        }
-
-#if ETH_PAD_SIZE
-        pbuf_header(p, ETH_PAD_SIZE);           /* reclaim the padding word */
-#endif
-
-#if LINK_STATS
-        lwip_stats.link.recv++;
-#endif /* LINK_STATS */
-    } else {
-#if LINK_STATS
-        lwip_stats.link.memerr++;
-        lwip_stats.link.drop++;
-#endif /* LINK_STATS */
-    }
-
-    /* push the tail pointer up by one, giving the buffer back to the hardware */
-    *REG(NET_TAIL) = (tail + 1) % NET_IN_BUF_COUNT;
-
-    return p;
-}
-
-/*
- * ethernetif_output():
- *
- * This function is called by the TCP/IP stack when an IP packet
- * should be sent. It calls the function called low_level_output() to
- * do the actual transmission of the packet.
- *
- */
-
-static err_t
-ethernetif_output(struct netif *netif, struct pbuf *p,
-                  struct ip_addr *ipaddr)
-{
-//  dprintf("ethernetif_output: netif %p, pbuf %p, ipaddr %p\n", netif, p, ipaddr);
-
-    /* resolve hardware address, then send (or queue) packet */
-    return etharp_output(netif, ipaddr, p);
-
-}
-
-/*
- * ethernetif_input():
- *
- * This function should be called when a packet is ready to be read
- * from the interface. It uses the function low_level_input() that
- * should handle the actual reception of bytes from the network
- * interface.
- *
- */
-
-static void
-ethernetif_input(struct netif *netif)
-{
-    struct ethernetif *ethernetif;
-    struct eth_hdr *ethhdr;
-    struct pbuf *p;
-
-    ethernetif = netif->state;
-
-    /* move received packet into a new pbuf */
-    p = low_level_input(netif);
-    /* no packet could be read, silently ignore this */
-    if (p == NULL) return;
-    /* points to packet payload, which starts with an Ethernet header */
-    ethhdr = p->payload;
-
-#if LINK_STATS
-    lwip_stats.link.recv++;
-#endif /* LINK_STATS */
-
-    ethhdr = p->payload;
-
-//  dprintf("ethernetif_input: type 0x%x\n", htons(ethhdr->type));
-
-    switch (htons(ethhdr->type)) {
-            /* IP packet? */
-        case ETHTYPE_IP:
-            /* update ARP table */
-            etharp_ip_input(netif, p);
-            /* skip Ethernet header */
-            pbuf_header(p, -sizeof(struct eth_hdr));
-            /* pass to network layer */
-            netif->input(p, netif);
-            break;
-
-        case ETHTYPE_ARP:
-            /* pass p to ARP module  */
-            etharp_arp_input(netif, ethernetif->ethaddr, p);
-            break;
-        default:
-            pbuf_free(p);
-            p = NULL;
-            break;
-    }
-}
-
-static enum handler_return ethernet_int(void *arg)
-{
-    struct netif *netif = (struct netif *)arg;
-
-    ethernetif_input(netif);
-
-    return INT_RESCHEDULE;
-}
-
-
-
-/*
- * ethernetif_init():
- *
- * Should be called at the beginning of the program to set up the
- * network interface. It calls the function low_level_init() to do the
- * actual setup of the hardware.
- *
- */
-
-static err_t
-ethernetif_init(struct netif *netif)
-{
-    struct ethernetif *ethernetif;
-
-    ethernetif = mem_malloc(sizeof(struct ethernetif));
-
-    if (ethernetif == NULL) {
-        LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_init: out of memory\n"));
-        return ERR_MEM;
-    }
-
-    netif->state = ethernetif;
-    netif->name[0] = IFNAME0;
-    netif->name[1] = IFNAME1;
-    netif->output = ethernetif_output;
-    netif->linkoutput = low_level_output;
-
-    ethernetif->ethaddr = (struct eth_addr *)&(netif->hwaddr[0]);
-
-    low_level_init(netif);
-
-    return ERR_OK;
-}
-
-status_t ethernet_init(void)
-{
-    /* check to see if the ethernet feature is turned on */
-    if ((*REG(SYSINFO_FEATURES) & SYSINFO_FEATURE_NETWORK) == 0)
-        return ERR_NOT_FOUND;
-
-    struct netif *netif = calloc(sizeof(struct netif), 1);
-    struct ip_addr *ipaddr = calloc(sizeof(struct ip_addr), 1);
-    struct ip_addr *netmask = calloc(sizeof(struct ip_addr), 1);
-    struct ip_addr *gw = calloc(sizeof(struct ip_addr), 1);
-
-    struct netif *netifret = netif_add(netif, ipaddr, netmask, gw, NULL, &ethernetif_init, &ip_input);
-    if (netifret == NULL) {
-        free(netif);
-        free(ipaddr);
-        free(netmask);
-        free(gw);
-        return ERR_NOT_FOUND;
-    }
-
-    /* register for interrupt handlers */
-    register_int_handler(INT_NET, ethernet_int, netif);
-
-    netif_set_default(netif);
-
-    unmask_interrupt(INT_NET, NULL);
-
-    return NO_ERROR;
-}
-
-#endif // WITH_LWIP
diff --git a/platform/armemu/platform.c b/platform/armemu/platform.c
deleted file mode 100644
index ce93d021..00000000
--- a/platform/armemu/platform.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <debug.h>
-#include <platform.h>
-#include "platform_p.h"
-
-void platform_init_mmu_mappings(void)
-{
-}
-
-void platform_early_init(void)
-{
-    /* initialize the interrupt controller */
-    platform_init_interrupts();
-
-    /* initialize the timer block */
-    platform_init_timer();
-
-    /* initialize the display */
-    platform_init_display();
-}
-
-void platform_init(void)
-{
-    platform_init_blkdev();
-}
-
diff --git a/platform/armemu/platform_p.h b/platform/armemu/platform_p.h
deleted file mode 100644
index 28f72109..00000000
--- a/platform/armemu/platform_p.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_P_H
-#define __PLATFORM_P_H
-
-void platform_init_interrupts(void);
-void platform_init_timer(void);
-void platform_init_blkdev(void);
-void platform_init_display(void);
-
-#endif
-
diff --git a/platform/armemu/rules.mk b/platform/armemu/rules.mk
deleted file mode 100644
index 4af5cb0c..00000000
--- a/platform/armemu/rules.mk
+++ /dev/null
@@ -1,35 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-ARCH := arm
-ARM_CPU := armemu
-CPU := generic
-
-WITH_KERNEL_VM := 0
-KERNEL_BASE := 0x0
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/interrupts.c \
-	$(LOCAL_DIR)/platform.c \
-	$(LOCAL_DIR)/timer.c \
-	$(LOCAL_DIR)/blkdev.c \
-	$(LOCAL_DIR)/display.c \
-
-#	$(LOCAL_DIR)/console.c \
-	$(LOCAL_DIR)/net.c \
-
-GLOBAL_DEFINES += \
-	WITH_DEV_DISPLAY=1
-
-MODULE_DEPS += \
-	lib/gfx
-
-MEMBASE := 0x0
-MEMSIZE := 0x400000	# 4MB
-
-LINKER_SCRIPT += \
-	$(BUILDDIR)/system-onesegment.ld
-
-include make/module.mk
diff --git a/platform/armemu/timer.c b/platform/armemu/timer.c
deleted file mode 100644
index b7b413a3..00000000
--- a/platform/armemu/timer.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <sys/types.h>
-#include <err.h>
-#include <kernel/thread.h>
-#include <platform.h>
-#include <platform/interrupts.h>
-#include <platform/timer.h>
-#include <platform/armemu.h>
-#include "platform_p.h"
-
-static platform_timer_callback t_callback;
-
-status_t platform_set_periodic_timer(platform_timer_callback callback, void *arg, lk_time_t interval)
-{
-    t_callback = callback;
-
-    *REG(PIT_CLEAR) = 1;
-    *REG(PIT_INTERVAL) = interval;
-    *REG(PIT_START_PERIODIC) = 1;
-
-    unmask_interrupt(INT_PIT);
-
-    return NO_ERROR;
-}
-
-lk_bigtime_t current_time_hires(void)
-{
-    lk_bigtime_t time;
-    *REG(SYSINFO_TIME_LATCH) = 1;
-    time = *REG(SYSINFO_TIME_SECS) * 1000000ULL;
-    time += *REG(SYSINFO_TIME_USECS);
-
-    return time;
-}
-
-lk_time_t current_time(void)
-{
-    lk_time_t time;
-    *REG(SYSINFO_TIME_LATCH) = 1;
-    time = *REG(SYSINFO_TIME_SECS) * 1000;
-    time += *REG(SYSINFO_TIME_USECS) / 1000;
-
-    return time;
-}
-
-static enum handler_return platform_tick(void *arg)
-{
-    *REG(PIT_CLEAR_INT) = 1;
-    if (t_callback) {
-        return t_callback(arg, current_time());
-    } else {
-        return INT_NO_RESCHEDULE;
-    }
-}
-
-void platform_init_timer(void)
-{
-    register_int_handler(INT_PIT, &platform_tick, NULL);
-}
-
diff --git a/platform/bcm28xx/gpio.c b/platform/bcm28xx/gpio.c
deleted file mode 100644
index 49c31df9..00000000
--- a/platform/bcm28xx/gpio.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright (c) 2016 Adam Barth
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <dev/gpio.h>
-#include <errno.h>
-#include <platform/bcm28xx.h>
-#include <reg.h>
-
-#define NUM_PINS     54
-#define BITS_PER_REG 32
-#define BITS_PER_PIN 3
-#define PINS_PER_REG (BITS_PER_REG / BITS_PER_PIN)
-#define GPIOREG(base, nr) (REG32(base) + (nr / BITS_PER_REG))
-
-int gpio_config(unsigned nr, unsigned flags)
-{
-    unsigned mask = 0x7;
-    if (nr >= NUM_PINS || flags & ~mask)
-        return -EINVAL;
-    unsigned register_number = nr / PINS_PER_REG;
-    unsigned offset = (nr % PINS_PER_REG) * BITS_PER_PIN;
-    unsigned shifted_mask = mask << offset;
-    volatile uint32_t *reg = REG32(GPIO_GPFSEL0) + register_number;
-    *reg = (*reg & ~shifted_mask) | (flags << offset);
-    return 0;
-}
-
-void gpio_set(unsigned nr, unsigned on)
-{
-    unsigned offset = nr % BITS_PER_REG;
-    *GPIOREG(on ? GPIO_GPSET0 : GPIO_GPCLR0, nr) = 1 << offset;
-}
-
-int gpio_get(unsigned nr)
-{
-    unsigned offset = nr % BITS_PER_REG;
-    return (*GPIOREG(GPIO_GPLEV0, nr) & (1 << offset)) >> offset;
-}
diff --git a/platform/bcm28xx/include/platform/bcm28xx.h b/platform/bcm28xx/include/platform/bcm28xx.h
deleted file mode 100644
index a0d33b32..00000000
--- a/platform/bcm28xx/include/platform/bcm28xx.h
+++ /dev/null
@@ -1,221 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#define SDRAM_BASE 0
-/* Note: BCM2836/BCM2837 use different peripheral base than BCM2835 */
-#define BCM_PERIPH_BASE_PHYS    (0x3f000000U)
-#define BCM_PERIPH_SIZE         (0x01100000U)
-
-#if BCM2836
-#define BCM_PERIPH_BASE_VIRT    (0xe0000000U)
-#elif BCM2837
-#define BCM_PERIPH_BASE_VIRT    (0xffffffffc0000000ULL)
-#define MEMORY_APERTURE_SIZE    (1024 * 1024 * 1024)
-#else
-#error Unknown BCM28XX Variant
-#endif
-
-#define BCM_SDRAM_BUS_ADDR_BASE_NO_L2 0xc0000000
-#define BCM_SDRAM_BUS_ADDR_BASE (BCM_SDRAM_BUS_ADDR_BASE_NO_L2)
-
-/* pointer to 'local' peripherals at 0x40000000 */
-#define BCM_LOCAL_PERIPH_BASE_VIRT (BCM_PERIPH_BASE_VIRT + 0x01000000)
-
-#define IC0_BASE                (BCM_PERIPH_BASE_VIRT + 0x2000)
-#define ST_BASE                 (BCM_PERIPH_BASE_VIRT + 0x3000)
-#define MPHI_BASE               (BCM_PERIPH_BASE_VIRT + 0x6000)
-#define DMA_BASE                (BCM_PERIPH_BASE_VIRT + 0x7000)
-#define ARM_BASE                (BCM_PERIPH_BASE_VIRT + 0xB000)
-#define PM_BASE                 (BCM_PERIPH_BASE_VIRT + 0x100000)
-#define PCM_CLOCK_BASE          (BCM_PERIPH_BASE_VIRT + 0x101098)
-#define RNG_BASE                (BCM_PERIPH_BASE_VIRT + 0x104000)
-#define GPIO_BASE               (BCM_PERIPH_BASE_VIRT + 0x200000)
-#define UART0_BASE              (BCM_PERIPH_BASE_VIRT + 0x201000)
-#define MMCI0_BASE              (BCM_PERIPH_BASE_VIRT + 0x202000)
-#define I2S_BASE                (BCM_PERIPH_BASE_VIRT + 0x203000)
-#define SPI0_BASE               (BCM_PERIPH_BASE_VIRT + 0x204000)
-#define BSC0_BASE               (BCM_PERIPH_BASE_VIRT + 0x205000)
-#define AUX_BASE                (BCM_PERIPH_BASE_VIRT + 0x215000)
-#define MINIUART_BASE           (BCM_PERIPH_BASE_VIRT + 0x215040)
-#define EMMC_BASE               (BCM_PERIPH_BASE_VIRT + 0x300000)
-#define SMI_BASE                (BCM_PERIPH_BASE_VIRT + 0x600000)
-#define BSC1_BASE               (BCM_PERIPH_BASE_VIRT + 0x804000)
-#define USB_BASE                (BCM_PERIPH_BASE_VIRT + 0x980000)
-#define MCORE_BASE              (BCM_PERIPH_BASE_VIRT + 0x0000)
-
-#define ARMCTRL_BASE            (ARM_BASE + 0x000)
-#define ARMCTRL_INTC_BASE       (ARM_BASE + 0x200)
-#define ARMCTRL_TIMER0_1_BASE   (ARM_BASE + 0x400)
-#define ARMCTRL_0_SBM_BASE      (ARM_BASE + 0x800)
-
-/* Videocore (GPU) mailbox registers for core0 */
-#define ARM0_MAILBOX_BASE       (ARM_BASE + 0x0880)
-#define ARM0_MAILBOX_READ       (ARM0_MAILBOX_BASE + 0x00)
-#define ARM0_MAILBOX_PEEK       (ARM0_MAILBOX_BASE + 0x10)
-#define ARM0_MAILBOX_CONFIG     (ARM0_MAILBOX_BASE + 0x1C)
-#define ARM0_MAILBOX_STATUS     (ARM0_MAILBOX_BASE + 0x18)
-#define ARM0_MAILBOX_WRITE      (ARM0_MAILBOX_BASE + 0x20)
-
-#define ARM_LOCAL_BASE          (BCM_LOCAL_PERIPH_BASE_VIRT)
-
-/* interrupts */
-#define ARM_IRQ1_BASE                  0
-#define INTERRUPT_TIMER0               (ARM_IRQ1_BASE + 0)
-#define INTERRUPT_TIMER1               (ARM_IRQ1_BASE + 1)
-#define INTERRUPT_TIMER2               (ARM_IRQ1_BASE + 2)
-#define INTERRUPT_TIMER3               (ARM_IRQ1_BASE + 3)
-#define INTERRUPT_CODEC0               (ARM_IRQ1_BASE + 4)
-#define INTERRUPT_CODEC1               (ARM_IRQ1_BASE + 5)
-#define INTERRUPT_CODEC2               (ARM_IRQ1_BASE + 6)
-#define INTERRUPT_VC_JPEG              (ARM_IRQ1_BASE + 7)
-#define INTERRUPT_ISP                  (ARM_IRQ1_BASE + 8)
-#define INTERRUPT_VC_USB               (ARM_IRQ1_BASE + 9)
-#define INTERRUPT_VC_3D                (ARM_IRQ1_BASE + 10)
-#define INTERRUPT_TRANSPOSER           (ARM_IRQ1_BASE + 11)
-#define INTERRUPT_MULTICORESYNC0       (ARM_IRQ1_BASE + 12)
-#define INTERRUPT_MULTICORESYNC1       (ARM_IRQ1_BASE + 13)
-#define INTERRUPT_MULTICORESYNC2       (ARM_IRQ1_BASE + 14)
-#define INTERRUPT_MULTICORESYNC3       (ARM_IRQ1_BASE + 15)
-#define INTERRUPT_DMA0                 (ARM_IRQ1_BASE + 16)
-#define INTERRUPT_DMA1                 (ARM_IRQ1_BASE + 17)
-#define INTERRUPT_VC_DMA2              (ARM_IRQ1_BASE + 18)
-#define INTERRUPT_VC_DMA3              (ARM_IRQ1_BASE + 19)
-#define INTERRUPT_DMA4                 (ARM_IRQ1_BASE + 20)
-#define INTERRUPT_DMA5                 (ARM_IRQ1_BASE + 21)
-#define INTERRUPT_DMA6                 (ARM_IRQ1_BASE + 22)
-#define INTERRUPT_DMA7                 (ARM_IRQ1_BASE + 23)
-#define INTERRUPT_DMA8                 (ARM_IRQ1_BASE + 24)
-#define INTERRUPT_DMA9                 (ARM_IRQ1_BASE + 25)
-#define INTERRUPT_DMA10                (ARM_IRQ1_BASE + 26)
-#define INTERRUPT_DMA11                (ARM_IRQ1_BASE + 27)
-#define INTERRUPT_DMA12                (ARM_IRQ1_BASE + 28)
-#define INTERRUPT_AUX                  (ARM_IRQ1_BASE + 29)
-#define INTERRUPT_ARM                  (ARM_IRQ1_BASE + 30)
-#define INTERRUPT_VPUDMA               (ARM_IRQ1_BASE + 31)
-
-#define ARM_IRQ2_BASE                  32
-#define INTERRUPT_HOSTPORT             (ARM_IRQ2_BASE + 0)
-#define INTERRUPT_VIDEOSCALER          (ARM_IRQ2_BASE + 1)
-#define INTERRUPT_CCP2TX               (ARM_IRQ2_BASE + 2)
-#define INTERRUPT_SDC                  (ARM_IRQ2_BASE + 3)
-#define INTERRUPT_DSI0                 (ARM_IRQ2_BASE + 4)
-#define INTERRUPT_AVE                  (ARM_IRQ2_BASE + 5)
-#define INTERRUPT_CAM0                 (ARM_IRQ2_BASE + 6)
-#define INTERRUPT_CAM1                 (ARM_IRQ2_BASE + 7)
-#define INTERRUPT_HDMI0                (ARM_IRQ2_BASE + 8)
-#define INTERRUPT_HDMI1                (ARM_IRQ2_BASE + 9)
-#define INTERRUPT_PIXELVALVE1          (ARM_IRQ2_BASE + 10)
-#define INTERRUPT_I2CSPISLV            (ARM_IRQ2_BASE + 11)
-#define INTERRUPT_DSI1                 (ARM_IRQ2_BASE + 12)
-#define INTERRUPT_PWA0                 (ARM_IRQ2_BASE + 13)
-#define INTERRUPT_PWA1                 (ARM_IRQ2_BASE + 14)
-#define INTERRUPT_CPR                  (ARM_IRQ2_BASE + 15)
-#define INTERRUPT_SMI                  (ARM_IRQ2_BASE + 16)
-#define INTERRUPT_GPIO0                (ARM_IRQ2_BASE + 17)
-#define INTERRUPT_GPIO1                (ARM_IRQ2_BASE + 18)
-#define INTERRUPT_GPIO2                (ARM_IRQ2_BASE + 19)
-#define INTERRUPT_GPIO3                (ARM_IRQ2_BASE + 20)
-#define INTERRUPT_VC_I2C               (ARM_IRQ2_BASE + 21)
-#define INTERRUPT_VC_SPI               (ARM_IRQ2_BASE + 22)
-#define INTERRUPT_VC_I2SPCM            (ARM_IRQ2_BASE + 23)
-#define INTERRUPT_VC_SDIO              (ARM_IRQ2_BASE + 24)
-#define INTERRUPT_VC_UART              (ARM_IRQ2_BASE + 25)
-#define INTERRUPT_SLIMBUS              (ARM_IRQ2_BASE + 26)
-#define INTERRUPT_VEC                  (ARM_IRQ2_BASE + 27)
-#define INTERRUPT_CPG                  (ARM_IRQ2_BASE + 28)
-#define INTERRUPT_RNG                  (ARM_IRQ2_BASE + 29)
-#define INTERRUPT_VC_ARASANSDIO        (ARM_IRQ2_BASE + 30)
-#define INTERRUPT_AVSPMON              (ARM_IRQ2_BASE + 31)
-
-/* ARM interrupts, which are mostly mirrored from bank 1 and 2 */
-#define ARM_IRQ0_BASE                  64
-#define INTERRUPT_ARM_TIMER            (ARM_IRQ0_BASE + 0)
-#define INTERRUPT_ARM_MAILBOX          (ARM_IRQ0_BASE + 1)
-#define INTERRUPT_ARM_DOORBELL_0       (ARM_IRQ0_BASE + 2)
-#define INTERRUPT_ARM_DOORBELL_1       (ARM_IRQ0_BASE + 3)
-#define INTERRUPT_VPU0_HALTED          (ARM_IRQ0_BASE + 4)
-#define INTERRUPT_VPU1_HALTED          (ARM_IRQ0_BASE + 5)
-#define INTERRUPT_ILLEGAL_TYPE0        (ARM_IRQ0_BASE + 6)
-#define INTERRUPT_ILLEGAL_TYPE1        (ARM_IRQ0_BASE + 7)
-#define INTERRUPT_PENDING1             (ARM_IRQ0_BASE + 8)
-#define INTERRUPT_PENDING2             (ARM_IRQ0_BASE + 9)
-#define INTERRUPT_JPEG                 (ARM_IRQ0_BASE + 10)
-#define INTERRUPT_USB                  (ARM_IRQ0_BASE + 11)
-#define INTERRUPT_3D                   (ARM_IRQ0_BASE + 12)
-#define INTERRUPT_DMA2                 (ARM_IRQ0_BASE + 13)
-#define INTERRUPT_DMA3                 (ARM_IRQ0_BASE + 14)
-#define INTERRUPT_I2C                  (ARM_IRQ0_BASE + 15)
-#define INTERRUPT_SPI                  (ARM_IRQ0_BASE + 16)
-#define INTERRUPT_I2SPCM               (ARM_IRQ0_BASE + 17)
-#define INTERRUPT_SDIO                 (ARM_IRQ0_BASE + 18)
-#define INTERRUPT_UART                 (ARM_IRQ0_BASE + 19)
-#define INTERRUPT_ARASANSDIO           (ARM_IRQ0_BASE + 20)
-
-#define ARM_IRQ_LOCAL_BASE             96
-#define INTERRUPT_ARM_LOCAL_CNTPSIRQ   (ARM_IRQ_LOCAL_BASE + 0)
-#define INTERRUPT_ARM_LOCAL_CNTPNSIRQ  (ARM_IRQ_LOCAL_BASE + 1)
-#define INTERRUPT_ARM_LOCAL_CNTHPIRQ   (ARM_IRQ_LOCAL_BASE + 2)
-#define INTERRUPT_ARM_LOCAL_CNTVIRQ    (ARM_IRQ_LOCAL_BASE + 3)
-#define INTERRUPT_ARM_LOCAL_MAILBOX0   (ARM_IRQ_LOCAL_BASE + 4)
-#define INTERRUPT_ARM_LOCAL_MAILBOX1   (ARM_IRQ_LOCAL_BASE + 5)
-#define INTERRUPT_ARM_LOCAL_MAILBOX2   (ARM_IRQ_LOCAL_BASE + 6)
-#define INTERRUPT_ARM_LOCAL_MAILBOX3   (ARM_IRQ_LOCAL_BASE + 7)
-#define INTERRUPT_ARM_LOCAL_GPU_FAST   (ARM_IRQ_LOCAL_BASE + 8)
-#define INTERRUPT_ARM_LOCAL_PMU_FAST   (ARM_IRQ_LOCAL_BASE + 9)
-#define INTERRUPT_ARM_LOCAL_ZERO       (ARM_IRQ_LOCAL_BASE + 10)
-#define INTERRUPT_ARM_LOCAL_TIMER      (ARM_IRQ_LOCAL_BASE + 11)
-
-#define MAX_INT INTERRUPT_ARM_LOCAL_TIMER
-
-/* GPIO */
-
-#define GPIO_GPFSEL0   (GPIO_BASE + 0x00)
-#define GPIO_GPFSEL1   (GPIO_BASE + 0x04)
-#define GPIO_GPFSEL2   (GPIO_BASE + 0x08)
-#define GPIO_GPFSEL3   (GPIO_BASE + 0x0C)
-#define GPIO_GPFSEL4   (GPIO_BASE + 0x10)
-#define GPIO_GPFSEL5   (GPIO_BASE + 0x14)
-#define GPIO_GPSET0    (GPIO_BASE + 0x1C)
-#define GPIO_GPSET1    (GPIO_BASE + 0x20)
-#define GPIO_GPCLR0    (GPIO_BASE + 0x28)
-#define GPIO_GPCLR1    (GPIO_BASE + 0x2C)
-#define GPIO_GPLEV0    (GPIO_BASE + 0x34)
-#define GPIO_GPLEV1    (GPIO_BASE + 0x38)
-#define GPIO_GPEDS0    (GPIO_BASE + 0x40)
-#define GPIO_GPEDS1    (GPIO_BASE + 0x44)
-#define GPIO_GPREN0    (GPIO_BASE + 0x4C)
-#define GPIO_GPREN1    (GPIO_BASE + 0x50)
-#define GPIO_GPFEN0    (GPIO_BASE + 0x58)
-#define GPIO_GPFEN1    (GPIO_BASE + 0x5C)
-#define GPIO_GPHEN0    (GPIO_BASE + 0x64)
-#define GPIO_GPHEN1    (GPIO_BASE + 0x68)
-#define GPIO_GPLEN0    (GPIO_BASE + 0x70)
-#define GPIO_GPLEN1    (GPIO_BASE + 0x74)
-#define GPIO_GPAREN0   (GPIO_BASE + 0x7C)
-#define GPIO_GPAREN1   (GPIO_BASE + 0x80)
-#define GPIO_GPAFEN0   (GPIO_BASE + 0x88)
-#define GPIO_GPAFEN1   (GPIO_BASE + 0x8C)
-#define GPIO_GPPUD     (GPIO_BASE + 0x94)
-#define GPIO_GPPUDCLK0 (GPIO_BASE + 0x98)
-#define GPIO_GPPUDCLK1 (GPIO_BASE + 0x9C)
diff --git a/platform/bcm28xx/include/platform/mailbox.h b/platform/bcm28xx/include/platform/mailbox.h
deleted file mode 100644
index 1f9b411d..00000000
--- a/platform/bcm28xx/include/platform/mailbox.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
- * Copyright (c) 2017 Eric Holland
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-#include <platform/bcm28xx.h>
-
-
-#define VCORE_MAILBOX_PHYSICAL_ADDRESS (ARMCTRL_0_SBM_BASE + 0x80)
-
-
-#define VCORE_TAG_REQUEST 0x00000000
-#define VCORE_ENDTAG	  0x00000000
-
-#define VCORE_TAG_GET_FIRMWARE_REV			0x00000001
-#define VCORE_TAG_GET_FIRMWARE_REV_REQ_LEN	0x00000000
-#define VCORE_TAG_GET_FIRMWARE_REV_RSP_LEN	0x00000004
-
-#define VCORE_MAILBOX_FULL	0x80000000
-#define VCORE_MAILBOX_EMPTY	0x40000000
-
-#define VC_FB_CHANNEL 0x01
-#define ARM_TO_VC_CHANNEL 0x08
-#define VC_TO_ARM_CHANNEL 0x09
-
-#define VCORE_SUCCESS			0
-#define VCORE_ERR_MBOX_FULL 	1
-#define VCORE_ERR_MBOX_TIMEOUT 	2
-
-#define VCORE_READ_ATTEMPTS 0xffffffff
-
-
-#define MAILBOX_READ               0
-#define MAILBOX_PEEK               2
-#define MAILBOX_CONDIG             4
-#define MAILBOX_STATUS             6
-#define MAILBOX_WRITE              8
-
-
-#define MAILBOX_FULL               0x80000000
-#define MAILBOX_EMPTY              0x40000000
-
-#define MAX_MAILBOX_READ_ATTEMPTS  8
-
-enum mailbox_channel {
-    ch_power               = 0,
-    ch_framebuffer         = 1,
-    ch_vuart               = 2,
-    ch_vchic               = 3,
-    ch_leds                = 4,
-    ch_buttons             = 5,
-    ch_touchscreen         = 6,
-    ch_unused              = 7,
-    ch_propertytags_tovc   = 8,
-    ch_propertytags_fromvc = 9,
-};
-
-typedef struct {
-	uint32_t phys_width;	//request
-	uint32_t phys_height;	//request
-	uint32_t virt_width;	//request
-	uint32_t virt_height;	//request
-	uint32_t pitch;			//response
-	uint32_t depth;			//request
-	uint32_t virt_x_offs;	//request
-	uint32_t virt_y_offs;	//request
-	uint32_t fb_p;			//response
-	uint32_t fb_size;		//response
-} fb_mbox_t;
-
-uint32_t get_vcore_framebuffer(fb_mbox_t * fb_mbox);
-status_t init_framebuffer(void);
-uint32_t _get_vcore_single(uint32_t tag, uint32_t req_len, uint8_t * rsp, uint32_t rsp_len);
-
diff --git a/platform/bcm28xx/intc.c b/platform/bcm28xx/intc.c
deleted file mode 100644
index c1273ceb..00000000
--- a/platform/bcm28xx/intc.c
+++ /dev/null
@@ -1,296 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <trace.h>
-#include <assert.h>
-#include <err.h>
-#include <bits.h>
-#include <kernel/spinlock.h>
-#include <kernel/thread.h>
-#include <kernel/mp.h>
-#include <platform/interrupts.h>
-#include <platform/bcm28xx.h>
-
-#if defined (BCM2836)
-#include <arch/arm.h>
-typedef struct arm_iframe arm_platform_iframe_t;
-#elif defined (BCM2837)
-#include <arch/arm64.h>
-typedef struct arm64_iframe_long arm_platform_iframe_t;
-#else
-#error Unknown BCM28XX Variant
-#endif
-
-
-#define LOCAL_TRACE 0
-
-/* global interrupt controller */
-#define INTC_PEND0  (ARMCTRL_INTC_BASE + 0x0)
-#define INTC_PEND1  (ARMCTRL_INTC_BASE + 0x4)
-#define INTC_PEND2  (ARMCTRL_INTC_BASE + 0x8)
-#define INTC_FAST   (ARMCTRL_INTC_BASE + 0xc)
-#define INTC_ENABLE1   (ARMCTRL_INTC_BASE + 0x10)
-#define INTC_ENABLE2   (ARMCTRL_INTC_BASE + 0x14)
-#define INTC_ENABLE3   (ARMCTRL_INTC_BASE + 0x18)
-#define INTC_DISABLE1   (ARMCTRL_INTC_BASE + 0x1c)
-#define INTC_DISABLE2   (ARMCTRL_INTC_BASE + 0x20)
-#define INTC_DISABLE3   (ARMCTRL_INTC_BASE + 0x24)
-
-/* per-cpu local interrupt controller bits.
- * each is repeated 4 times, one per cpu.
- */
-#define INTC_LOCAL_TIMER_INT_CONTROL0 (ARM_LOCAL_BASE + 0x40)
-#define INTC_LOCAL_TIMER_INT_CONTROL1 (ARM_LOCAL_BASE + 0x44)
-#define INTC_LOCAL_TIMER_INT_CONTROL2 (ARM_LOCAL_BASE + 0x48)
-#define INTC_LOCAL_TIMER_INT_CONTROL3 (ARM_LOCAL_BASE + 0x4c)
-
-#define INTC_LOCAL_MAILBOX_INT_CONTROL0 (ARM_LOCAL_BASE + 0x50)
-#define INTC_LOCAL_MAILBOX_INT_CONTROL1 (ARM_LOCAL_BASE + 0x54)
-#define INTC_LOCAL_MAILBOX_INT_CONTROL2 (ARM_LOCAL_BASE + 0x58)
-#define INTC_LOCAL_MAILBOX_INT_CONTROL3 (ARM_LOCAL_BASE + 0x5c)
-
-#define INTC_LOCAL_IRQ_PEND0 (ARM_LOCAL_BASE + 0x60)
-#define INTC_LOCAL_IRQ_PEND1 (ARM_LOCAL_BASE + 0x64)
-#define INTC_LOCAL_IRQ_PEND2 (ARM_LOCAL_BASE + 0x68)
-#define INTC_LOCAL_IRQ_PEND3 (ARM_LOCAL_BASE + 0x6c)
-
-#define INTC_LOCAL_FIQ_PEND0 (ARM_LOCAL_BASE + 0x70)
-#define INTC_LOCAL_FIQ_PEND1 (ARM_LOCAL_BASE + 0x74)
-#define INTC_LOCAL_FIQ_PEND2 (ARM_LOCAL_BASE + 0x78)
-#define INTC_LOCAL_FIQ_PEND3 (ARM_LOCAL_BASE + 0x7c)
-
-#define INTC_LOCAL_MAILBOX0_SET0 (ARM_LOCAL_BASE + 0x80)
-#define INTC_LOCAL_MAILBOX0_SET1 (ARM_LOCAL_BASE + 0x90)
-#define INTC_LOCAL_MAILBOX0_SET2 (ARM_LOCAL_BASE + 0xa0)
-#define INTC_LOCAL_MAILBOX0_SET3 (ARM_LOCAL_BASE + 0xb0)
-
-#define INTC_LOCAL_MAILBOX0_CLR0 (ARM_LOCAL_BASE + 0xc0)
-#define INTC_LOCAL_MAILBOX0_CLR1 (ARM_LOCAL_BASE + 0xd0)
-#define INTC_LOCAL_MAILBOX0_CLR2 (ARM_LOCAL_BASE + 0xe0)
-#define INTC_LOCAL_MAILBOX0_CLR3 (ARM_LOCAL_BASE + 0xf0)
-
-struct int_handler_struct {
-    int_handler handler;
-    void *arg;
-};
-
-static struct int_handler_struct int_handler_table[MAX_INT];
-
-static spin_lock_t lock = SPIN_LOCK_INITIAL_VALUE;
-
-status_t mask_interrupt(unsigned int vector)
-{
-    LTRACEF("vector %u\n", vector);
-
-    spin_lock_saved_state_t state;
-    spin_lock_irqsave(&lock, state);
-
-    if (vector >= INTERRUPT_ARM_LOCAL_CNTPSIRQ && vector <= INTERRUPT_ARM_LOCAL_CNTVIRQ) {
-        // local timer interrupts, mask on all cpus
-        for (uint cpu = 0; cpu < 4; cpu++) {
-            uintptr_t reg = INTC_LOCAL_TIMER_INT_CONTROL0 + cpu * 4;
-
-            *REG32(reg) &= (1 << (vector - INTERRUPT_ARM_LOCAL_CNTPSIRQ));
-        }
-    } else if (/* vector >= ARM_IRQ1_BASE && */ vector < (ARM_IRQ0_BASE + 32)) {
-        uintptr_t reg;
-        if (vector >= ARM_IRQ0_BASE)
-            reg = INTC_DISABLE3;
-        else if (vector >= ARM_IRQ2_BASE)
-            reg = INTC_DISABLE2;
-        else
-            reg = INTC_DISABLE1;
-
-        *REG32(reg) = 1 << (vector % 32);
-    } else {
-        PANIC_UNIMPLEMENTED;
-    }
-
-    spin_unlock_irqrestore(&lock, state);
-
-    return NO_ERROR;
-}
-
-status_t unmask_interrupt(unsigned int vector)
-{
-    LTRACEF("vector %u\n", vector);
-
-    spin_lock_saved_state_t state;
-    spin_lock_irqsave(&lock, state);
-
-    if (vector >= INTERRUPT_ARM_LOCAL_CNTPSIRQ && vector <= INTERRUPT_ARM_LOCAL_CNTVIRQ) {
-        // local timer interrupts, unmask for all cpus
-        for (uint cpu = 0; cpu < 4; cpu++) {
-            uintptr_t reg = INTC_LOCAL_TIMER_INT_CONTROL0 + cpu * 4;
-
-            *REG32(reg) |= (1 << (vector - INTERRUPT_ARM_LOCAL_CNTPSIRQ));
-        }
-    } else if (/* vector >= ARM_IRQ1_BASE && */ vector < (ARM_IRQ0_BASE + 32)) {
-        uintptr_t reg;
-        if (vector >= ARM_IRQ0_BASE)
-            reg = INTC_ENABLE3;
-        else if (vector >= ARM_IRQ2_BASE)
-            reg = INTC_ENABLE2;
-        else
-            reg = INTC_ENABLE1;
-
-        *REG32(reg) = 1 << (vector % 32);
-    } else {
-        PANIC_UNIMPLEMENTED;
-    }
-
-    spin_unlock_irqrestore(&lock, state);
-
-    return NO_ERROR;
-}
-
-void register_int_handler(unsigned int vector, int_handler handler, void *arg)
-{
-    if (vector >= MAX_INT)
-        panic("register_int_handler: vector out of range %d\n", vector);
-
-    spin_lock_saved_state_t state;
-    spin_lock_irqsave(&lock, state);
-
-    int_handler_table[vector].handler = handler;
-    int_handler_table[vector].arg = arg;
-
-    spin_unlock_irqrestore(&lock, state);
-}
-
-enum handler_return platform_irq(arm_platform_iframe_t *frame)
-{
-    uint vector;
-    uint cpu = arch_curr_cpu_num();
-
-    THREAD_STATS_INC(interrupts);
-
-    // see what kind of irq it is
-    uint32_t pend = *REG32(INTC_LOCAL_IRQ_PEND0 + cpu * 4);
-
-    pend &= ~(1 << (INTERRUPT_ARM_LOCAL_GPU_FAST % 32)); // mask out gpu interrupts
-
-    if (pend != 0) {
-        // it's a local interrupt
-        LTRACEF("local pend 0x%x\n", pend);
-        vector = ARM_IRQ_LOCAL_BASE + ctz(pend);
-        goto decoded;
-    }
-
-    // XXX disable for now, since all of the interesting irqs are mirrored into the other banks
-#if 0
-    // look in bank 0 (ARM interrupts)
-    pend = *REG32(INTC_PEND0);
-    LTRACEF("pend0 0x%x\n", pend);
-    pend &= ~((1<<8)|(1<<9)); // mask out bit 8 and 9
-    if (pend != 0) {
-        // it's a bank 0 interrupt
-        vector = ARM_IRQ0_BASE + ctz(pend);
-        goto decoded;
-    }
-#endif
-
-    // look for VC interrupt bank 1
-    pend = *REG32(INTC_PEND1);
-    LTRACEF("pend1 0x%x\n", pend);
-    if (pend != 0) {
-        // it's a bank 1 interrupt
-        vector = ARM_IRQ1_BASE + ctz(pend);
-        goto decoded;
-    }
-
-    // look for VC interrupt bank 2
-    pend = *REG32(INTC_PEND2);
-    LTRACEF("pend2 0x%x\n", pend);
-    if (pend != 0) {
-        // it's a bank 2 interrupt
-        vector = ARM_IRQ2_BASE + ctz(pend);
-        goto decoded;
-    }
-
-    vector = 0xffffffff;
-
-decoded:
-    LTRACEF("cpu %u vector %u\n", cpu, vector);
-
-    // dispatch the irq
-    enum handler_return ret = INT_NO_RESCHEDULE;
-
-#if WITH_SMP
-    if (vector == INTERRUPT_ARM_LOCAL_MAILBOX0) {
-        pend = *REG32(INTC_LOCAL_MAILBOX0_CLR0 + 0x10 * cpu);
-        LTRACEF("mailbox0 clr 0x%x\n", pend);
-
-        // ack it
-        *REG32(INTC_LOCAL_MAILBOX0_CLR0 + 0x10 * cpu) = pend;
-
-        if (pend & (1 << MP_IPI_GENERIC)) {
-            PANIC_UNIMPLEMENTED;
-        }
-        if (pend & (1 << MP_IPI_RESCHEDULE)) {
-            ret = mp_mbx_reschedule_irq();
-        }
-    } else
-#endif // WITH_SMP
-        if (vector == 0xffffffff) {
-            ret = INT_NO_RESCHEDULE;
-        } else if (int_handler_table[vector].handler) {
-            ret = int_handler_table[vector].handler(int_handler_table[vector].arg);
-        } else {
-            panic("irq %u fired on cpu %u but no handler set!\n", vector, cpu);
-        }
-
-    return ret;
-}
-
-enum handler_return platform_fiq(arm_platform_iframe_t *frame)
-{
-    PANIC_UNIMPLEMENTED;
-}
-
-void bcm28xx_send_ipi(uint irq, uint cpu_mask)
-{
-    LTRACEF("irq %u, cpu_mask 0x%x\n", irq, cpu_mask);
-
-    for (uint i = 0; i < 4; i++) {
-        if (cpu_mask & (1<<i)) {
-            LTRACEF("sending to cpu %u\n", i);
-            *REG32(INTC_LOCAL_MAILBOX0_SET0 + 0x10 * i) = (1 << irq);
-        }
-    }
-}
-
-void intc_init(void)
-{
-    // mask everything
-    *REG32(INTC_DISABLE1) = 0xffffffff;
-    *REG32(INTC_DISABLE2) = 0xffffffff;
-    *REG32(INTC_DISABLE3) = 0xffffffff;
-
-#if WITH_SMP
-    // unable mailbox irqs on all cores
-    for (uint i = 0; i < 4; i++) {
-        *REG32(INTC_LOCAL_MAILBOX_INT_CONTROL0 + 0x4 * i) = 0x1;
-    }
-#endif
-}
-
diff --git a/platform/bcm28xx/mailbox.c b/platform/bcm28xx/mailbox.c
deleted file mode 100644
index d0db1ba5..00000000
--- a/platform/bcm28xx/mailbox.c
+++ /dev/null
@@ -1,171 +0,0 @@
-/*
- * Copyright (c) 2017 Eric Holland
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <reg.h>
-#include <err.h>
-#include <debug.h>
-#include <trace.h>
-
-#include <arch.h>
-#include <platform.h>
-#include <arch/ops.h>
-#include <kernel/vm.h>
-#include <dev/display.h>
-
-#include <platform/bcm28xx.h>
-#include <platform/mailbox.h>
-
-
-static volatile uint32_t* mailbox_regs = (uint32_t*)ARM0_MAILBOX_BASE;
-static fb_mbox_t fb_desc __ALIGNED(16);
-
-static inline void* vc_bus_to_kvaddr(uint32_t bus_addr) {
-    return (paddr_to_kvaddr(bus_addr & 0x3fffffff));
-}
-
-static inline uint32_t kvaddr_to_vc_bus(addr_t kvaddr) {
-    return (uint32_t)((kvaddr & 0x3fffffff)+BCM_SDRAM_BUS_ADDR_BASE);
-}
-
-#define MAILBOX_WAIT_TIMEOUT_US 500000
-#define MAILBOX_MAX_READ_ATTEMPTS 20
-
-static status_t mailbox_write(const enum mailbox_channel ch, uint32_t value) {
-    value = value | ch;
-
-    lk_time_t now = current_time();
-
-    // Wait for there to be space in the FIFO.
-    while (mailbox_regs[MAILBOX_STATUS] & MAILBOX_FULL) {
-        if ( (now + MAILBOX_WAIT_TIMEOUT_US) < current_time()) {
-            return ERR_TIMED_OUT;
-        }
-    }
-
-    // Write the value to the mailbox.
-    mailbox_regs[MAILBOX_WRITE] = value;
-
-    return NO_ERROR;
-}
-
-static status_t mailbox_read(enum mailbox_channel ch, uint32_t* result) {
-    uint32_t local_result = 0;
-    uint32_t attempts = 0;
-
-    lk_time_t deadline;
-
-    do {
-        deadline = current_time() + MAILBOX_WAIT_TIMEOUT_US;
-        while (mailbox_regs[MAILBOX_STATUS] & MAILBOX_EMPTY) {
-            if (current_time() > deadline)
-                return ERR_TIMED_OUT;
-        }
-
-        local_result = mailbox_regs[MAILBOX_READ];
-
-        attempts++;
-
-    } while ((((local_result)&0xF) != ch) && (attempts < MAILBOX_MAX_READ_ATTEMPTS));
-
-    *result = (local_result);
-
-    return attempts < MAX_MAILBOX_READ_ATTEMPTS ? NO_ERROR : ERR_IO;
-}
-
-
-static status_t mailbox_get_framebuffer(fb_mbox_t* fb_desc) {
-    status_t ret = NO_ERROR;
-
-        arch_clean_cache_range((addr_t)fb_desc,sizeof(fb_mbox_t));
-
-        ret = mailbox_write(ch_framebuffer, kvaddr_to_vc_bus((addr_t)fb_desc));
-        if (ret != NO_ERROR)
-            return ret;
-
-        uint32_t ack = 0x0;
-        ret = mailbox_read(ch_framebuffer, &ack);
-        if (ret != NO_ERROR)
-            return ret;
-
-        arch_invalidate_cache_range((addr_t)fb_desc,sizeof(fb_mbox_t));
-
-    return ret;
-}
-
-status_t init_framebuffer(void) {
-
-    fb_desc.phys_width = 800;
-    fb_desc.phys_height = 480;
-    fb_desc.virt_width = 800;
-    fb_desc.virt_height = 480;
-    fb_desc.pitch = 0;
-    fb_desc.depth = 32;
-    fb_desc.virt_x_offs = 0;
-    fb_desc.virt_y_offs = 0;
-    fb_desc.fb_p = 0;
-    fb_desc.fb_size = 0;
-
-    status_t ret = mailbox_get_framebuffer(&fb_desc);
-
-    return ret;
-}
-
-void dispflush(void) {
-
-    //arch_clean_cache_range(fb_desc,sizeof(fb_mbox_t));
-
-}
-
-/* LK display (lib/gfx.h) calls this function */
-status_t display_get_framebuffer(struct display_framebuffer *fb)
-{
-    // VideoCore returns 32-bit bus address, which needs to be converted to kernel virtual
-    fb->image.pixels = paddr_to_kvaddr(fb_desc.fb_p & 0x3fffffff);
-
-    fb->format = DISPLAY_FORMAT_ARGB_8888;
-    fb->image.format = IMAGE_FORMAT_ARGB_8888;
-    fb->image.rowbytes = fb_desc.phys_width * fb_desc.depth/8;
-
-    fb->image.width = fb_desc.phys_width;
-    fb->image.height = fb_desc.phys_height;
-    fb->image.stride = fb_desc.phys_width;
-    fb->flush = NULL;
-
-    return NO_ERROR;
-}
-
-status_t display_get_info(struct display_info *info)
-{
-    info->format = DISPLAY_FORMAT_ARGB_8888;
-    info->width = fb_desc.phys_width;
-    info->height = fb_desc.phys_height;
-
-    return NO_ERROR;
-}
-
-status_t display_present(struct display_image *image, uint starty, uint endy)
-{
-  return NO_ERROR;
-}
-
-
-
diff --git a/platform/bcm28xx/miniuart.c b/platform/bcm28xx/miniuart.c
deleted file mode 100644
index b8f229be..00000000
--- a/platform/bcm28xx/miniuart.c
+++ /dev/null
@@ -1,176 +0,0 @@
-/*
- * Copyright (c) 2016 Gurjant Kalsi
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-// TODO(gkalsi): Unify the two UART codepaths and use the port parameter to
-// select between the real uart and the miniuart.
-
-#include <assert.h>
-#include <kernel/thread.h>
-#include <lib/cbuf.h>
-#include <platform/bcm28xx.h>
-#include <platform/debug.h>
-#include <platform/interrupts.h>
-#include <reg.h>
-#include <stdio.h>
-#include <trace.h>
-
-#define RXBUF_SIZE 16
-
-static cbuf_t uart_rx_buf;
-
-struct bcm283x_mu_regs {
-    uint32_t io;
-    uint32_t ier;
-    uint32_t iir;
-    uint32_t lcr;
-    uint32_t mcr;
-    uint32_t lsr;
-    uint32_t msr;
-    uint32_t scratch;
-    uint32_t cntl;
-    uint32_t stat;
-    uint32_t baud;
-};
-
-struct bcm283x_aux_regs {
-    uint32_t auxirq;
-    uint32_t auxenb;
-};
-
-#define AUX_IRQ_MINIUART     (1 << 0)
-#define AUX_ENB_MINIUART     (1 << 0)
-
-#define MU_IIR_BYTE_AVAIL    (1 << 2)   // For reading
-#define MU_IIR_CLR_XMIT_FIFO (1 << 2)   // For writing.
-#define MU_IIR_CLR_RECV_FIFO (1 << 1)
-
-#define MU_IIR_EN_RX_IRQ     (1 << 0)   // Enable the recv interrupt.
-
-#define MU_LSR_TX_EMPTY      (1 << 5)
-
-static enum handler_return aux_irq(void *arg)
-{
-    volatile struct bcm283x_mu_regs *mu_regs =
-        (struct bcm283x_mu_regs *)MINIUART_BASE;
-    volatile struct bcm283x_aux_regs *aux_regs =
-        (struct bcm283x_aux_regs *)AUX_BASE;
-
-    // Make sure this interrupt is intended for the miniuart.
-    uint32_t auxirq = readl(&aux_regs->auxirq);
-    if ((auxirq & AUX_IRQ_MINIUART) == 0) {
-        return INT_NO_RESCHEDULE;
-    }
-
-    bool resched = false;
-
-    while (true) {
-        uint32_t iir = readl(&mu_regs->iir);
-        if ((iir & MU_IIR_BYTE_AVAIL) == 0) break;
-
-        resched = true;
-        char ch = readl(&mu_regs->io);
-        cbuf_write_char(&uart_rx_buf, ch, false);
-    }
-
-    return resched ? INT_RESCHEDULE : INT_NO_RESCHEDULE;
-}
-
-int uart_putc(int port, char c)
-{
-    // There's only one UART for now.
-    // TODO(gkalsi): Unify the two UART code paths using the port.
-    struct bcm283x_mu_regs *regs = (struct bcm283x_mu_regs *)MINIUART_BASE;
-
-    /* Wait until there is space in the FIFO */
-    while (!(readl(&regs->lsr) & MU_LSR_TX_EMPTY))
-        ;
-
-    /* Send the character */
-    writel(c, &regs->io);    
-
-    return 1;
-}
-
-void uart_init(void)
-{
-    volatile struct bcm283x_mu_regs *mu_regs =
-        (struct bcm283x_mu_regs *)MINIUART_BASE;
-    volatile struct bcm283x_aux_regs *aux_regs =
-        (struct bcm283x_aux_regs *)AUX_BASE;
-
-    // Create circular buffer to hold received data.
-    cbuf_initialize(&uart_rx_buf, RXBUF_SIZE);
-
-    // AUX Interrupt handler handles interrupts for SPI1, SPI2, and miniuart
-    // Interrupt handler must decode IRQ.
-    register_int_handler(INTERRUPT_AUX, &aux_irq, NULL);
-
-    // Enable the Interrupt.
-    unmask_interrupt(INTERRUPT_AUX);
-
-    writel(MU_IIR_CLR_RECV_FIFO | MU_IIR_CLR_XMIT_FIFO, &mu_regs->iir);
-
-    // Enable the miniuart peripheral. This also enables Miniuart register
-    // access. It's likely that the VideoCore chip already enables this 
-    // peripheral for us, but we hit the enable bit just to be sure.
-    writel(AUX_ENB_MINIUART, &aux_regs->auxenb);
-
-    // Enable the receive interrupt on the UART peripheral. 
-    writel(MU_IIR_EN_RX_IRQ, &mu_regs->ier);
-}
-
-void uart_init_early(void)
-{
-}
-
-int uart_getc(int port, bool wait)
-{
-    cbuf_t *rxbuf = &uart_rx_buf;
-
-    char c;
-    if (cbuf_read_char(rxbuf, &c, wait) == 1)
-        return c;
-
-    return -1;
-}
-
-void uart_flush_tx(int port)
-{
-    volatile struct bcm283x_mu_regs *mu_regs =
-        (struct bcm283x_mu_regs *)MINIUART_BASE;
-    writel(MU_IIR_CLR_XMIT_FIFO, &mu_regs->iir);
-}
-
-void uart_flush_rx(int port)
-{
-    volatile struct bcm283x_mu_regs *mu_regs =
-        (struct bcm283x_mu_regs *)MINIUART_BASE;
-    writel(MU_IIR_CLR_RECV_FIFO, &mu_regs->iir);
-}
-
-void uart_init_port(int port, uint baud)
-{
-}
-
-
-
diff --git a/platform/bcm28xx/platform.c b/platform/bcm28xx/platform.c
deleted file mode 100644
index e2139077..00000000
--- a/platform/bcm28xx/platform.c
+++ /dev/null
@@ -1,237 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <err.h>
-#include <debug.h>
-#include <trace.h>
-
-#include <dev/uart.h>
-#include <arch.h>
-#include <lk/init.h>
-#include <kernel/vm.h>
-#include <kernel/spinlock.h>
-#include <dev/timer/arm_generic.h>
-#include <platform.h>
-#include <platform/interrupts.h>
-#include <platform/bcm28xx.h>
-
-#if BCM2836
-#include <arch/arm.h>
-#include <arch/arm/mmu.h>
-
-/* initial memory mappings. parsed by start.S */
-struct mmu_initial_mapping mmu_initial_mappings[] = {
-    /* 1GB of sdram space */
-    {
-        .phys = SDRAM_BASE,
-        .virt = KERNEL_BASE,
-        .size = MEMSIZE,
-        .flags = 0,
-        .name = "memory"
-    },
-
-    /* peripherals */
-    {
-        .phys = BCM_PERIPH_BASE_PHYS,
-        .virt = BCM_PERIPH_BASE_VIRT,
-        .size = BCM_PERIPH_SIZE,
-        .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
-        .name = "bcm peripherals"
-    },
-
-    /* identity map to let the boot code run */
-    {
-        .phys = SDRAM_BASE,
-        .virt = SDRAM_BASE,
-        .size = 16*1024*1024,
-        .flags = MMU_INITIAL_MAPPING_TEMPORARY
-    },
-    /* null entry to terminate the list */
-    { 0 }
-};
-
-#define DEBUG_UART 0
-
-#elif BCM2837
-#include <libfdt.h>
-#include <arch/arm64.h>
-#include <arch/arm64/mmu.h>
-#include <platform/mailbox.h>
-
-/* initial memory mappings. parsed by start.S */
-struct mmu_initial_mapping mmu_initial_mappings[] = {
- /* 1GB of sdram space */
- {
-     .phys = SDRAM_BASE,
-     .virt = KERNEL_BASE,
-     .size = MEMORY_APERTURE_SIZE,
-     .flags = 0,
-     .name = "memory"
- },
-
- /* peripherals */
- {
-     .phys = BCM_PERIPH_BASE_PHYS,
-     .virt = BCM_PERIPH_BASE_VIRT,
-     .size = BCM_PERIPH_SIZE,
-     .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
-     .name = "bcm peripherals"
- },
-
- /* null entry to terminate the list */
- { 0 }
-};
-
-#define DEBUG_UART 1
-
-#else
-#error Unknown BCM28XX Variant
-#endif
-
-extern void intc_init(void);
-extern void arm_reset(void);
-
-
-static pmm_arena_t arena = {
-    .name = "sdram",
-    .base = SDRAM_BASE,
-    .size = MEMSIZE,
-    .flags = PMM_ARENA_FLAG_KMAP,
-};
-
-void platform_init_mmu_mappings(void)
-{
-}
-
-void platform_early_init(void)
-{
-    uart_init_early();
-
-    intc_init();
-
-#if BCM2837
-    arm_generic_timer_init(INTERRUPT_ARM_LOCAL_CNTPNSIRQ, 0);
-
-   /* look for a flattened device tree just before the kernel */
-    const void *fdt = (void *)KERNEL_BASE;
-    int err = fdt_check_header(fdt);
-    if (err >= 0) {
-        /* walk the nodes, looking for 'memory' */
-        int depth = 0;
-        int offset = 0;
-        for (;;) {
-            offset = fdt_next_node(fdt, offset, &depth);
-            if (offset < 0)
-                break;
-
-            /* get the name */
-            const char *name = fdt_get_name(fdt, offset, NULL);
-            if (!name)
-                continue;
-
-            /* look for the 'memory' property */
-            if (strcmp(name, "memory") == 0) {
-                printf("Found memory in fdt\n");
-                int lenp;
-                const void *prop_ptr = fdt_getprop(fdt, offset, "reg", &lenp);
-                if (prop_ptr && lenp == 0x10) {
-                    /* we're looking at a memory descriptor */
-                    //uint64_t base = fdt64_to_cpu(*(uint64_t *)prop_ptr);
-                    uint64_t len = fdt64_to_cpu(*((const uint64_t *)prop_ptr + 1));
-
-                    /* trim size on certain platforms */
-#if ARCH_ARM
-                    if (len > 1024*1024*1024U) {
-                        len = 1024*1024*1024; /* only use the first 1GB on ARM32 */
-                        printf("trimming memory to 1GB\n");
-                    }
-#endif
-
-                    /* set the size in the pmm arena */
-                    arena.size = len;
-                }
-            }
-        }
-    }
-
-#elif BCM2836
-    arm_generic_timer_init(INTERRUPT_ARM_LOCAL_CNTPNSIRQ, 1000000);
-#else
-#error Unknown BCM28XX Variant
-#endif
-
-    /* add the main memory arena */
-    pmm_add_arena(&arena);
-
-#if BCM2837
-    /* reserve the first 64k of ram, which should be holding the fdt */
-    struct list_node list = LIST_INITIAL_VALUE(list);
-    pmm_alloc_range(MEMBASE, 0x80000 / PAGE_SIZE, &list);
-#endif
-
-#if WITH_SMP
-#if BCM2837
-    uintptr_t sec_entry = (uintptr_t)(&arm_reset - KERNEL_ASPACE_BASE);
-    unsigned long long *spin_table = (void *)(KERNEL_ASPACE_BASE + 0xd8);
-
-    for (uint i = 1; i <= 3; i++) {
-        spin_table[i] = sec_entry;
-        __asm__ __volatile__ ("" : : : "memory");
-        arch_clean_cache_range(0xffff000000000000,256);
-        __asm__ __volatile__("sev");
-    }
-#else
-    /* start the other cpus */
-    uintptr_t sec_entry = (uintptr_t)&arm_reset;
-    sec_entry -= (KERNEL_BASE - MEMBASE);
-    for (uint i = 1; i <= 3; i++) {
-        *REG32(ARM_LOCAL_BASE + 0x8c + 0x10 * i) = sec_entry;
-    }
-#endif
-#endif
-}
-
-void platform_init(void)
-{
-    uart_init();
-#if BCM2837
-    init_framebuffer();
-#endif
-}
-
-void platform_dputc(char c)
-{
-    if (c == '\n')
-        uart_putc(DEBUG_UART, '\r');
-    uart_putc(DEBUG_UART, c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    int ret = uart_getc(DEBUG_UART, wait);
-    if (ret == -1)
-        return -1;
-    *c = ret;
-    return 0;
-}
-
diff --git a/platform/bcm28xx/rules.mk b/platform/bcm28xx/rules.mk
deleted file mode 100644
index cab755e3..00000000
--- a/platform/bcm28xx/rules.mk
+++ /dev/null
@@ -1,73 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-WITH_SMP := 1
-#LK_HEAP_IMPLEMENTATION ?= dlmalloc
-
-MODULE_DEPS := \
-	dev/timer/arm_generic \
-	lib/cbuf
-
-
-#lib/bio \
-	lib/cbuf \
-	lib/minip \
-	dev/interrupt/arm_gic \
-	dev/timer/arm_cortex_a9
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/gpio.c \
-	$(LOCAL_DIR)/intc.c \
-	$(LOCAL_DIR)/platform.c \
-	$(LOCAL_DIR)/mailbox.c \
-
-
-MEMBASE := 0x00000000
-
-GLOBAL_DEFINES += \
-	ARM_ARCH_WAIT_FOR_SECONDARIES=1
-
-LINKER_SCRIPT += \
-	$(BUILDDIR)/system-onesegment.ld
-
-ifeq ($(TARGET),rpi2)
-ARCH := arm
-ARM_CPU := cortex-a7
-# put our kernel at 0x80000000
-KERNEL_BASE = 0x80000000
-KERNEL_LOAD_OFFSET := 0x00008000
-MEMSIZE ?= 0x10000000 # 256MB
-SMP_CPU_ID_BITS := 8
-GLOBAL_DEFINES += \
-	BCM2836=1
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/uart.c
-
-else ifeq ($(TARGET),rpi3)
-ARCH := arm64
-ARM_CPU := cortex-a53
-
-KERNEL_LOAD_OFFSET := 0x00080000
-MEMSIZE ?= 0x40000000 # 1GB
-
-GLOBAL_DEFINES += \
-    MEMBASE=$(MEMBASE) \
-    MEMSIZE=$(MEMSIZE) \
-    MMU_WITH_TRAMPOLINE=1 \
-	BCM2837=1
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/miniuart.c
-
-MODULE_DEPS += \
-		app/shell \
-	    app/tests \
-	    lib/fdt
-
-WITH_CPP_SUPPORT=true
-
-endif
-
-include make/module.mk
diff --git a/platform/bcm28xx/uart.c b/platform/bcm28xx/uart.c
deleted file mode 100644
index 7ef0effb..00000000
--- a/platform/bcm28xx/uart.c
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <stdio.h>
-#include <trace.h>
-#include <lib/cbuf.h>
-#include <kernel/thread.h>
-#include <platform/interrupts.h>
-#include <platform/debug.h>
-#include <platform/bcm28xx.h>
-
-/* TODO: extract this into a generic PL011 driver */
-
-/* PL011 implementation */
-#define UART_DR    (0x00)
-#define UART_RSR   (0x04)
-#define UART_TFR   (0x18)
-#define UART_ILPR  (0x20)
-#define UART_IBRD  (0x24)
-#define UART_FBRD  (0x28)
-#define UART_LCRH  (0x2c)
-#define UART_CR    (0x30)
-#define UART_IFLS  (0x34)
-#define UART_IMSC  (0x38)
-#define UART_TRIS  (0x3c)
-#define UART_TMIS  (0x40)
-#define UART_ICR   (0x44)
-#define UART_DMACR (0x48)
-
-#define UARTREG(base, reg)  (*REG32((base)  + (reg)))
-
-#define RXBUF_SIZE 16
-#define NUM_UART 1
-
-static cbuf_t uart_rx_buf[NUM_UART];
-
-static inline uintptr_t uart_to_ptr(unsigned int n)
-{
-    switch (n) {
-        default:
-        case 0:
-            return UART0_BASE;
-    }
-}
-
-static enum handler_return uart_irq(void *arg)
-{
-    bool resched = false;
-    uint port = (uint)arg;
-    uintptr_t base = uart_to_ptr(port);
-
-    /* read interrupt status and mask */
-    uint32_t isr = UARTREG(base, UART_TMIS);
-
-    if (isr & ((1<<6) | (1<<4))) { // rtmis, rxmis
-        UARTREG(base, UART_ICR) = (1<<4);
-        cbuf_t *rxbuf = &uart_rx_buf[port];
-
-        /* while fifo is not empty, read chars out of it */
-        while ((UARTREG(base, UART_TFR) & (1<<4)) == 0) {
-            char c = UARTREG(base, UART_DR);
-            cbuf_write_char(rxbuf, c, false);
-
-            resched = true;
-        }
-    }
-
-    return resched ? INT_RESCHEDULE : INT_NO_RESCHEDULE;
-}
-
-void uart_init(void)
-{
-    for (size_t i = 0; i < NUM_UART; i++) {
-        // create circular buffer to hold received data
-        cbuf_initialize(&uart_rx_buf[i], RXBUF_SIZE);
-
-        // assumes interrupts are contiguous
-        register_int_handler(INTERRUPT_VC_UART + i, &uart_irq, (void *)i);
-
-        // clear all irqs
-        UARTREG(uart_to_ptr(i), UART_ICR) = 0x3ff;
-
-        // set fifo trigger level
-        UARTREG(uart_to_ptr(i), UART_IFLS) = 0; // 1/8 rxfifo, 1/8 txfifo
-
-        // enable rx interrupt
-        UARTREG(uart_to_ptr(i), UART_IMSC) = (1<<6)|(1<<4); // rtim, rxim
-
-        // enable receive
-        UARTREG(uart_to_ptr(i), UART_CR) |= (1<<9); // rxen
-
-        // enable interrupt
-        unmask_interrupt(INTERRUPT_VC_UART + i);
-    }
-}
-
-void uart_init_early(void)
-{
-    for (size_t i = 0; i < NUM_UART; i++) {
-        UARTREG(uart_to_ptr(i), UART_CR) = (1<<8)|(1<<0); // tx_enable, uarten
-    }
-}
-
-int uart_putc(int port, char c)
-{
-    uintptr_t base = uart_to_ptr(port);
-
-    /* spin while fifo is full */
-    while (UARTREG(base, UART_TFR) & (1<<5))
-        ;
-    UARTREG(base, UART_DR) = c;
-
-    return 1;
-}
-
-int uart_getc(int port, bool wait)
-{
-    cbuf_t *rxbuf = &uart_rx_buf[port];
-
-    char c;
-    if (cbuf_read_char(rxbuf, &c, wait) == 1)
-        return c;
-
-    return -1;
-}
-
-void uart_flush_tx(int port)
-{
-}
-
-void uart_flush_rx(int port)
-{
-}
-
-void uart_init_port(int port, uint baud)
-{
-}
-
-
diff --git a/platform/cc13xx/debug.c b/platform/cc13xx/debug.c
deleted file mode 100644
index b2540140..00000000
--- a/platform/cc13xx/debug.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (c) 2016 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <kernel/thread.h>
-#include <platform/debug.h>
-
-#include <driverlib/uart.h>
-
-#define UART0_BASE 0x40001000
-
-void platform_dputc(char c) {
-	UARTCharPut(UART0_BASE, c);
-}
-
-int platform_dgetc(char *c, bool wait) {
-	int n;
-	for (;;) {
-		if ((n = UARTCharGetNonBlocking(UART0_BASE)) < 0) {
-			if (wait) {
-				thread_yield();
-			} else {
-				return -1;
-			}
-		} else {
-			*c = n;
-			return 0;
-		}
-	}
-}
diff --git a/platform/cc13xx/default-opts-ccfg.bin b/platform/cc13xx/default-opts-ccfg.bin
deleted file mode 100644
index a1e2b820..00000000
--- a/platform/cc13xx/default-opts-ccfg.bin
+++ /dev/null
diff --git a/platform/cc13xx/gpio.c b/platform/cc13xx/gpio.c
deleted file mode 100644
index 5b225750..00000000
--- a/platform/cc13xx/gpio.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (c) 2016 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <dev/gpio.h>
-
-#include <driverlib/gpio.h>
-#include <driverlib/ioc.h>
-
-int gpio_config(unsigned nr, unsigned flags) {
-	if (flags & GPIO_INPUT) {
-		IOCPortConfigureSet(nr, IOC_PORT_GPIO, IOC_INPUT_ENABLE);
-	} else {
-		IOCPortConfigureSet(nr, IOC_PORT_GPIO, 0);
-	}
-	if (flags & GPIO_OUTPUT) {
-		GPIO_setOutputEnableDio(nr, GPIO_OUTPUT_ENABLE);
-	} else {
-		GPIO_setOutputEnableDio(nr, GPIO_OUTPUT_DISABLE);
-	}
-	return 0;
-}
-
-void gpio_set(unsigned nr, unsigned on) {
-	GPIO_writeDio(nr, on);
-}
-
-int gpio_get(unsigned nr) {
-	return GPIO_readDio(nr);
-}
diff --git a/platform/cc13xx/include/platform/defirq.h b/platform/cc13xx/include/platform/defirq.h
deleted file mode 100644
index fc53794a..00000000
--- a/platform/cc13xx/include/platform/defirq.h
+++ /dev/null
@@ -1,34 +0,0 @@
-DEFIRQ(aon_gpio_edge)
-DEFIRQ(i2c)
-DEFIRQ(rfc_cpe_1)
-DEFIRQ(unused0)
-DEFIRQ(aon_rtc_comb)
-DEFIRQ(uart0_comb)
-DEFIRQ(aux_swev0)
-DEFIRQ(ssi0_comb)
-DEFIRQ(ssi1_comb)
-DEFIRQ(rfc_cpe_0)
-DEFIRQ(rfc_hw_comb)
-DEFIRQ(rfc_cmd_ack)
-DEFIRQ(i2s)
-DEFIRQ(aux_swev1)
-DEFIRQ(wdt)
-DEFIRQ(gpt0a)
-DEFIRQ(gpt0b)
-DEFIRQ(gpt1a)
-DEFIRQ(gpt1b)
-DEFIRQ(gpt2a)
-DEFIRQ(gpt2b)
-DEFIRQ(gpt3a)
-DEFIRQ(gpt3b)
-DEFIRQ(crypto_result_avail)
-DEFIRQ(dma_done_comb)
-DEFIRQ(dma_err)
-DEFIRQ(flash)
-DEFIRQ(swev0)
-DEFIRQ(aux_comb)
-DEFIRQ(aon_prog0)
-DEFIRQ(prog0)
-DEFIRQ(aux_compa)
-DEFIRQ(aux_adc)
-DEFIRQ(trng)
diff --git a/platform/cc13xx/include/platform/platform_cm.h b/platform/cc13xx/include/platform/platform_cm.h
deleted file mode 100644
index 55571e2d..00000000
--- a/platform/cc13xx/include/platform/platform_cm.h
+++ /dev/null
@@ -1,19 +0,0 @@
-#pragma once
-
-#define __NVIC_PRIO_BITS	3
-
-#define DEFIRQ(x) x##_IRQn,
-typedef enum {
-        Reset_IRQn = -15,
-        NonMaskableInt_IRQn = -14,
-        HardFault_IRQn = -13,
-        MemoryManagement_IRQn = -12,
-        BusFault_IRQn = -11,
-        UsageFault_IRQn = -10,
-        SVCall_IRQn = -5,
-        DebugMonitor_IRQn = -4,
-        PendSV_IRQn = -2,
-        SysTick_IRQn = -1,
-#include <platform/defirq.h>
-} IRQn_Type;
-#undef DEFIRQ
diff --git a/platform/cc13xx/include/platform/radio.h b/platform/cc13xx/include/platform/radio.h
deleted file mode 100644
index 118c5bc2..00000000
--- a/platform/cc13xx/include/platform/radio.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (c) 2016 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-#include <platform/ti-rf.h>
-#include <platform/ti-rf-prop.h>
-
-void radio_init(void);
-
-uint32_t radio_send_cmd(uint32_t cmd);
-void radio_wait_cmd(uint16_t *status);
-
-
-
diff --git a/platform/cc13xx/include/platform/ti-rf-prop.h b/platform/cc13xx/include/platform/ti-rf-prop.h
deleted file mode 100644
index 1cf35358..00000000
--- a/platform/cc13xx/include/platform/ti-rf-prop.h
+++ /dev/null
@@ -1,169 +0,0 @@
-/*
- * Copyright (c) 2016 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-// Standard Packet Format
-// [ Preamble ][ Sync Word ][ Length Field ][ Address ][ Payload ][ CRC ]
-// 0-30 bytes  0-32 bytes   opt byte        opt byte   0-255      opt 16bit
-
-#define CMD_PROP_TX			0x3801
-#define CMD_PROP_RX			0x3802
-#define CMD_PROP_TX_ADV			0x3803
-#define CMD_PROP_RX_ADV			0x3804
-#define CMD_PROP_CS			0x3805 // cc13xx only
-#define CMD_PROP_RADIO_SETUP		0x3806 // cc26xx only
-#define CMD_PROP_RADIO_DIV_SETUP	0x3807 // cc13xx only
-
-#define CMD_PROP_SET_LEN		0x3401
-#define CMD_PROP_RESTART_RX		0x3402
-
-#define PROP_DONE_OK			0x3400
-#define PROP_DONE_RXTIMEOUT		0x3401
-#define PROP_DONE_BREAK			0x3402 // tx abort due to timeout
-#define PROP_DONE_ENDED			0x3403 // rx end trigger
-#define PROP_DONE_STOPPED		0x3404 // stopped by CMD_STOP
-#define PROP_DONE_ABORT			0x3405 // stopped by CMD_ABORT
-#define PROP_DONE_RXERR			0x3406 // crc error
-#define PROP_DONE_IDLE			0x3407 // CS ended because idle (cc13xx only)
-#define PROP_DONE_BUSY			0x3408 // CS ended because busy (cc13xx only)
-#define PROP_DONE_IDLETIMEOUT		0x3409 // CS (cc13xx only)
-#define PROP_DONE_BUSYTIMEOUT		0x3409 // CS (cc13xx only)
-
-#define PROP_ERROR_PAR			0x3800 // illegal parameter
-#define PROP_ERROR_TXBUF		0x3801 // no available tx buffer at sop
-#define PROP_ERROR_RXFULL		0x3802 // out of rx buffers during rx
-#define PROP_ERROR_NO_SETUP		0x3803 // radio not in proprietary mode
-#define PROP_ERROR_NO_FS		0x3804 // freq synth was off
-#define PROP_ERROR_RXOVF		0x3805 // rx overflow
-#define PROP_ERROR_TXUNF		0x3806 // tx underflow
-
-typedef struct rf_op_prop_tx rf_op_prop_tx_t;
-typedef struct rf_op_prop_tx_adv rf_op_prop_tx_adv_t;
-typedef struct rf_op_prop_rx rf_op_prop_rx_t;
-typedef struct rf_prop_output rf_prop_output_t;
-
-#define PROP_TX_FS_ON		(0 << 0) // leave freq synth on after
-#define PROP_TX_FS_OFF		(1 << 0) // turn freq synth off after
-#define PROP_TX_USE_CRC		(1 << 3) // append CRC to packet
-#define PROP_TX_VAR_LEN		(1 << 4) // send pkt_len as first byte
-
-struct rf_op_prop_tx {
-	uint16_t cmd;
-	uint16_t status;
-	void *next_op;
-	uint32_t start_time;
-	uint8_t start_trig;
-	uint8_t cond;
-
-	uint8_t config;
-	uint8_t pkt_len;
-	uint32_t sync_word;
-	void *data;
-};
-
-#define PROP_TXA_FS_ON		(0 << 0) // leave freq synth on after
-#define PROP_TXA_FS_OFF		(1 << 0) // turn off freq synth after
-#define PROP_TXA_USE_CRC	(1 << 3) // append crc to packet
-#define PROP_TXA_CRC_INC_SW	(1 << 4) // include sync word in crc calc
-#define PROP_TXT_CRC_INC_HDR	(1 << 5) // include header in crc calc
-
-struct rf_op_prop_tx_adv {
-	uint16_t cmd;
-	uint16_t status;
-	void *next_op;
-	uint32_t start_time;
-	uint8_t start_trig;
-	uint8_t cond;
-
-	uint8_t config;
-	uint8_t num_hdr_bits; // 0-32
-	uint16_t pkt_len; // 0 = unlimited
-	uint8_t start_conf; // 0
-	uint8_t pre_trig; // trigger for preamble->sync, NOW = one preamble
-	uint32_t pre_time;
-	uint32_t sync_word;
-	void *data; // packet data, or TX queue for unlimited length
-};
-
-#define PROP_RX_FS_ON		(0 << 0) // leave freq synth on after
-#define PROP_RX_FS_OFF		(1 << 0) // turn off freq synth after
-#define PROP_RX_REPEAT_OK	(1 << 1) // continue receiving after success
-#define PROP_RX_REPEAT_NOT_OK	(1 << 2) // continue receiving after failure
-#define PROP_RX_USE_CRC		(1 << 3) // check crc
-#define PROP_RX_VAR_LEN		(1 << 4) // first byte is packet length
-#define PROP_RX_CHECK_ADDRESS	(1 << 5)
-#define PROP_RX_END_STOP	(1 << 6) // packet discarded if end trg during rx
-#define PROP_RX_KEEP_BAD_ADDR	(1 << 7) // receive (but mark ignored) if addr mismatch
-
-#define PROP_RX_AUTOFLUSH_IGNORED	(1 << 0) // discard ignored packets
-#define PROP_RX_AUTOFLUSH_CRC_ERR	(1 << 1) // discard CRC error packets
-#define PROP_RX_INC_HDR			(1 << 3) // include header byte in rxdata
-#define PROP_RX_INC_CRC			(1 << 4) // include crc field in rxdata
-#define PROP_RX_INC_RSSI		(1 << 5) // include rssi byte
-#define PROP_RX_INC_TIMESTAMP		(1 << 6) // include timestamp word
-#define PROP_RX_INC_STATUS		(1 << 7) // include status byte
-
-#define PROP_STATUS_ADDR_INDEX_MASK	0x1F
-#define PROP_STATUS_ALT_SYNC_WORD	0x20
-#define PROP_STATUS_MASK		0xC0
-#define PROP_STATUS_RX_OK		0x00
-#define PROP_STATUS_CRC_ERR		0x40
-#define PROP_STATUS_IGNORE		0x80
-#define PROP_STATUS_EX_ABORTED		0xC0
-
-struct rf_op_prop_rx {
-	uint16_t cmd;
-	uint16_t status;
-	void *next_op;
-	uint32_t start_time;
-	uint8_t start_trig;
-	uint8_t cond;
-
-	uint8_t config;
-	uint8_t rx_config;
-	uint32_t sync_word;
-	uint8_t max_pkt_len; // 0 = unknown/unlimited
-	uint8_t addr0;
-	uint8_t addr1;
-	uint8_t end_trig;
-	uint32_t end_time;
-	rf_queue_t *queue;
-	rf_prop_output_t *output;
-};
-
-struct rf_prop_output {
-	uint16_t num_rx_ok;
-	uint16_t num_rx_err;
-	uint8_t num_rx_ignored; // ignored due to addr mismatch
-	uint8_t num_rx_stopped; // rx fail due to addr mismatch or bad length
-	uint8_t num_rx_full; // discarded due to lack of buffer space
-	uint8_t last_rssi; // rssi at last sync word match
-	uint32_t timestamp; // of last rx'd packet
-};
-
-STATIC_ASSERT(sizeof(rf_op_prop_tx_t) == 24);
-STATIC_ASSERT(sizeof(rf_op_prop_tx_adv_t) == 32);
-STATIC_ASSERT(sizeof(rf_op_prop_rx_t) == 36);
-//STATIC_ASSERT(sizeof(rf_op_prop_rx_adv_t) == 48);
-STATIC_ASSERT(sizeof(rf_prop_output_t) == 12);
diff --git a/platform/cc13xx/include/platform/ti-rf.h b/platform/cc13xx/include/platform/ti-rf.h
deleted file mode 100644
index d668aece..00000000
--- a/platform/cc13xx/include/platform/ti-rf.h
+++ /dev/null
@@ -1,333 +0,0 @@
-/*
- * Copyright (c) 2016 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-#include <compiler.h>
-
-// trigger control byte (TRM 23.3.2.5.1)
-
-#define TRG_NOW			0x00
-#define TRG_NEVER		0x01 // except for CMD_TRIGGER if enabled
-#define TRG_ABSTIME		0x02
-#define TRG_REL_SUBMIT		0x03 // relative to command submission time
-#define TRG_REL_START		0x04 // relative to command start (end trg only)
-#define TRG_REL_PREVSTART	0x05 // relative to start of previous command
-#define TRG_REL_FIRSTSTART	0x06 // relative to first command in chain
-#define TRG_REL_PREVEND		0x07 // relative to end of previous command
-#define TRG_REL_EVT1		0x08 // relative to prev command evt1
-#define TRG_REL_EVT2		0x09 // relative to prev command evt1
-#define TRG_EXTERNAL		0x0A // TRG_EXT_* in timer parameter
-
-#define TRG_ENA_CMD_O		0x10 // CMD_TRIGGER #0 enabled as alt trigger
-#define TRG_ENA_CMD_1		0x30 // CMD_TRIGGER #1 enabled as alt trigger
-#define TRG_ENA_CMD_2		0x50 // CMD_TRIGGER #2 enabled as alt trigger
-#define TRG_ENA_CMD_3		0x70 // CMD_TRIGGER #3 enabled as alt trigger
-
-#define TRG_PAST_OK		0x80 // trigger in the past happens asap
-#define TRG_PAST_DISALLOW	0x00 // never happens, or for start trg is an error
-
-#define TRG_EXT_RISING		0x00
-#define TRG_EXT_FALLING		0x40
-#define TRG_EXT_BOTH_EDGE	0x80
-#define TRG_SRC_RFC_GPI0	(22 << 8)
-#define TRG_SRC_RFC_GPI1	(23 << 8)
-
-// condition byte (TRM 23.3.2.5.2)
-// - commands return TRUE, FALSE, or ABORT as defined for each command
-// - a skip of 0 = re-exec current, 1 = exec next, 2 = skip next
-#define CND_ALWAYS		0x00
-#define CND_NEVER		0x01
-#define CND_STOP_ON_FALSE	0x02
-#define CND_STOP_ON_TRUE	0x03
-#define CND_SKIP_ON_FALSE	0x04 // if false, skip N commands
-#define CND_SKIP_ON_TRUE	0x05 // if true, skip N commands
-#define CND_SKIP(n)		(((n) & 0xF) << 4)
-
-
-#define QE_STATUS_PENDING	0x00 // set before submitting by SysCPU
-#define QE_STATUS_ACTIVE	0x01 // entry in queue by RadioCPU
-#define QE_STATUS_BUSY		0x02 // entry is actively being r/w by RadioCPU
-#define QE_STATUS_DONE		0x03 // RadioCPU is done, SysCPU may reclaim
-
-#define QE_CONFIG_GENERAL	0x00
-#define QE_CONFIG_MULTI		0x01
-#define QE_CONFIG_POINTER	0x02
-#define QE_CONFIG_LEN_SZ_0	0x00 // no length prefix
-#define QE_CONFIG_LEN_SZ_1	0x04 // 1-byte length prefix
-#define QE_CONFIG_LEN_SZ_2	0x08 // 2-byte length prefix
-
-typedef struct rf_queue rf_queue_t;
-typedef struct rf_queue_entry rf_queue_entry_t;
-
-struct rf_queue {
-	rf_queue_entry_t *curr;
-	rf_queue_entry_t *last;
-};
-
-struct rf_queue_entry {
-	rf_queue_entry_t *next;
-	uint8_t status;
-	uint8_t config;
-	uint16_t length;
-	union {
-		uint8_t data[4];
-		uint8_t *ptr;
-	};
-};
-
-#define IMM_CMD(cmd,arg,ext)	(((cmd) << 16) | \
-				((arg & 0xFF) << 8) | \
-				((ext & 0x3F) << 2) | \
-				0x01)
-
-// direct commands
-#define CMD_ABORT		0x0401 // stop asap
-#define CMD_STOP		0x0402 // stop once active rx/tx completes
-#define CMD_GET_RSSI		0x0403
-#define CMD_TRIGGER		0x0404
-#define CMD_TRIGGER_N(n)	(0x0404 | (((n) & 3) << 16))
-#define CMD_START_RAT		0x0405
-#define CMD_PING		0x0406 // no op
-
-// immediate commands
-#define CMD_UPDATE_RADIO_SETUP	0x0001
-#define CMD_GET_FW_INFO		0x0002
-#define CMD_READ_RFREG		0x0601
-#define CMD_SET_RAT_CMP		0x000A
-#define CMD_SET_RAT_CPT		0x0603
-#define CMD_DISABLE_RAT_CH	0x0408
-#define CMD_SET_RAT_OUTPUT	0x0604
-#define CMD_ARM_RAT_CH		0x0409
-#define CMD_DISARM_RAT_CH	0x040A
-#define CMD_SET_TX_POWER	0x0010
-#define CMD_UPDATE_FS		0x0011
-#define CMD_BUS_REQUEST		0x040E
-#define CMD_ADD_DATA_ENTRY	0x0005
-#define CMD_REMOVE_DATA_ENTRY	0x0006
-#define CMD_FLUSH_QUEUE		0x0007
-#define CMD_CLEAR_RX		0x0008
-#define CMD_REMOVE_PENDING	0x0009
-
-// queued commands
-#define CMD_NOP			0x0801 // rf_op_basic_t
-#define CMD_FS			0x0803 // rf_op_fs_t
-#define CMD_FS_OFF		0x0804 // rf_op_basic_t
-#define CMD_RADIO_SETUP		0x0802 // rf_op_radio_setup_t
-#define CMD_FS_POWERUP		0x080C // rf_op_fs_power_t
-#define CMD_FS_POWERDOWN	0x080D // rf_op_fs_power_t
-#define CMD_SYNC_STOP_RAT	0x0809 // rf_op_sync_rat_t
-#define CMD_SYNC_START_RAT	0x080A // rf_op_sync_rat_t
-#define CMD_COUNT		0x080B // rf_op_count_t
-#define CMD_PATTERN_CHECK	0x0813 // rf_op_pattern_check_t
-
-// status
-#define DONE_OK			0x0400 // success
-#define DONE_COUNTDOWN		0x0401 // count == 0
-#define DONE_RXERR		0x0402 // crc error
-#define DONE_TIMEOUT		0x0403
-#define DONE_STOPPED		0x0404 // stopped by CMD_DONE
-#define DONE_ABORT		0x0405 // stopped by CMD_ABORT
-#define DONE_FAILED		0x0406
-
-#define ERROR_PAST_START	0x0800 // start trigger is in the past
-#define ERROR_START_TRIG	0x0801 // bad trigger parameter
-#define ERROR_CONDITION		0x0802 // bad condition parameter
-#define ERROR_PAR		0x0803 // invalid parameter (command specific)
-#define ERROR_POINTER		0x0804 // invalid pointer to next op
-#define ERROR_CMD_ID		0x0805 // bad command id
-#define ERROR_WRONG_BG		0x0806 // fg cmd cannot run w/ active bg cmd
-#define ERROR_NO_SETUP		0x0807 // tx/rx without radio setup
-#define ERROR_NO_FS		0x0808 // tx/rx with freq synth off
-#define ERROR_SYNTH_PROG	0x0809 // freq synth calibration failure
-#define ERROR_TXUNF		0x080A // tx underflow
-#define ERROR_TXOVF		0x080B // rx overflow
-#define ERROR_NO_RX		0x080C // no rx data available
-#define ERROR_PENDING		0x080D // other commands already pending
-
-typedef struct rf_op_basic rf_op_basic_t;
-typedef struct rf_op_radio_setup rf_op_radio_setup_t;
-typedef struct rf_op_fs rf_op_fs_t;
-typedef struct rf_op_fs_power rf_op_fs_power_t;
-typedef struct rf_op_sync_rat rf_op_sync_rat_t;
-typedef struct rf_op_count rf_op_count_t;
-typedef struct rf_op_pattern_check rf_op_pattern_check_t;
-typedef struct rf_op_fw_info rf_op_fw_info_t;
-
-struct rf_op_basic {
-	uint16_t cmd;
-	uint16_t status;
-	void *next_op;
-	uint32_t start_time;
-	uint8_t start_trig;
-	uint8_t cond;
-} __PACKED;
-
-struct rf_op_fw_info {
-	uint16_t cmd;
-
-	uint16_t version;
-	uint16_t free_ram_start;
-	uint16_t free_ram_size;
-	uint16_t avail_rat_ch;
-} __PACKED;
-
-#if 0
-// warning - docs / headers disagree
-#define RF_MODE_BLE		0x00
-#define RF_MODE_802_15_4	0x01
-#define RF_MODE_2MBPS_GFSK	0x02
-#define RF_MODE_5MBPS_8FSK	0x05
-#define RF_MODE_NO_CHANGE	0xFF
-#endif
-
-#define RF_CFG_FE_MODE(n)	((n) & 7)
-#define RF_CFG_INT_BIAS		(0 << 3)
-#define RF_CFG_EXT_BIAS		(1 << 3)
-#define RF_CFG_FS_POWERUP	(0 << 10)
-#define RF_CFG_FS_NO_POWERUP	(1 << 10)
-
-#define TX_PWR_IB(n)		((n) & 0x3F)
-#define TX_PWR_GC(n)		(((n) & 3) << 6)
-#define TX_PWR_TEMP_COEFF(n)	(((n) & 0xFF) << 8)
-
-struct rf_op_radio_setup {
-	uint16_t cmd;
-	uint16_t status;
-	void *next_op;
-	uint32_t start_time;
-	uint8_t start_trig;
-	uint8_t cond;
-
-	uint8_t mode;
-	uint8_t io_div; // cc13xx (0,2,5,6,10,12,5,30), cc26xx (0,2)
-	uint16_t config;
-	uint16_t tx_pwr;
-	void *reg_override;
-} __PACKED;
-
-struct rf_op_fs {
-	uint16_t cmd;
-	uint16_t status;
-	void *next_op;
-	uint32_t start_time;
-	uint8_t start_trig;
-	uint8_t cond;
-
-	uint16_t frequency;
-	uint16_t fract_freq;
-	uint8_t synth_conf;
-	uint8_t reserved;
-	uint8_t mid_precal;
-	uint8_t kt_precal;
-	uint16_t tdc_precal;
-};
-
-struct rf_op_fs_power {
-	uint16_t cmd;
-	uint16_t status;
-	void *next_op;
-	uint32_t start_time;
-	uint8_t start_trig;
-	uint8_t cond;
-
-	uint16_t reserved;
-	void *reg_override;
-};
-
-struct rf_op_sync_rat {
-	uint16_t cmd;
-	uint16_t status;
-	void *next_op;
-	uint32_t start_time;
-	uint8_t start_trig;
-	uint8_t cond;
-
-	uint16_t reserved;
-	uint32_t rat0;
-};
-
-// - on start, if count == 0 -> ERROR_PARAM (ABORT?), else count--
-// - if count > 0, status = DONE_OK, res = TRUE
-// - if count == 0, status = DONE_COUNTDOWN, res = FALSE
-
-struct rf_op_count {
-	uint16_t cmd;
-	uint16_t status;
-	void *next_op;
-	uint32_t start_time;
-	uint8_t start_trig;
-	uint8_t cond;
-
-	uint16_t counter;
-};
-
-#define PTN_OP_EQ		(0 << 0)
-#define PTN_OP_LT		(1 << 0)
-#define PTN_OP_GT		(2 << 0)
-#define PTN_BYTE_REV		(1 << 2) // 0=LE, 1=BE
-#define PTN_BIT_REV		(1 << 3)
-#define PTN_SIGN_EXT(n)		(((n) & 31) << 4)
-#define PTN_USE_IDX		(1 << 9)
-#define PTN_USE_PTR		(0 << 9)
-
-// 1. read word x from pointer or index from start of last committed rx data
-// 2. byteswap x, if requested
-// 3. bitswap x, if requested
-// 4. x = x & mask
-// 5. if sign extend != 0, extend that bit through 31
-// 6. result = x OP value
-// if result TRUE, status = DONE_OK
-// if result FALSE, status = DONE_FAILED
-// if USE_IDX but no RX data available, status = ERROR_NO_RX, result = ABORT
-
-struct rf_op_pattern_check {
-	uint16_t cmd;
-	uint16_t status;
-	void *next_op;
-	uint32_t start_time;
-	uint8_t start_trig;
-	uint8_t cond;
-
-	uint16_t pattern;
-	void *next_op_if_true;
-	union {
-		void *ptr;
-		int32_t idx;
-	};
-	uint32_t mask;
-	uint32_t value;
-};
-
-// multi element is <COUNT:2> [ <NEXT-DATA-INDEX:2> <DATA:1> ... ]
-
-STATIC_ASSERT(sizeof(rf_queue_t) == 8);
-STATIC_ASSERT(sizeof(rf_queue_entry_t) == 12);
-STATIC_ASSERT(sizeof(rf_op_basic_t) == 14);
-STATIC_ASSERT(sizeof(rf_op_radio_setup_t) == 24);
-STATIC_ASSERT(sizeof(rf_op_fs_t) == 24);
-STATIC_ASSERT(sizeof(rf_op_fs_power_t) == 20);
-STATIC_ASSERT(sizeof(rf_op_sync_rat_t) == 20);
-STATIC_ASSERT(sizeof(rf_op_count_t) == 16);
-STATIC_ASSERT(sizeof(rf_op_pattern_check_t) == 32);
-STATIC_ASSERT(sizeof(rf_op_fw_info_t) == 10);
diff --git a/platform/cc13xx/init.c b/platform/cc13xx/init.c
deleted file mode 100644
index 03c1edcd..00000000
--- a/platform/cc13xx/init.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * Copyright (c) 2016 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <debug.h>
-#include <platform.h>
-#include <arch/arm/cm.h>
-
-#include <driverlib/prcm.h>
-#include <driverlib/ioc.h>
-#include <driverlib/uart.h>
-#include <driverlib/osc.h>
-
-// if GPIO_UART_?R are defined, route UART there
-#include <target/gpioconfig.h>
-
-void trimDevice(void);
-
-#define UART0_BASE 0x40001000
-
-void platform_early_init(void) {
-	trimDevice();
-
-	PRCMPowerDomainOn(PRCM_DOMAIN_SERIAL);
-	while (PRCMPowerDomainStatus(PRCM_DOMAIN_SERIAL) != PRCM_DOMAIN_POWER_ON) ;
-
-	PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH);
-	while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_ON) ;
-
-	PRCMPeripheralRunEnable(PRCM_PERIPH_UART0);
-	PRCMPeripheralRunEnable(PRCM_PERIPH_GPIO);
-	PRCMLoadSet();
-
-#ifdef GPIO_UART_TX
-	IOCPortConfigureSet(GPIO_UART_TX, IOC_PORT_MCU_UART0_TX, 0);
-#endif
-#ifdef GPIO_UART_RX
-	IOCPortConfigureSet(GPIO_UART_RX, IOC_PORT_MCU_UART0_RX, IOC_INPUT_ENABLE);
-#endif
-
-	UARTConfigSetExpClk(UART0_BASE, 48000000, 115200,
-		UART_CONFIG_WLEN_8 | UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE);
-	UARTEnable(UART0_BASE);
-
-	arm_cm_systick_init(48000000);
-
-	// switch to 24MHz XOSC
-	OSCInterfaceEnable();
-	OSCClockSourceSet(OSC_SRC_CLK_HF, OSC_XOSC_HF);
-	OSCHfSourceSwitch();
-
-#if 0
-	dprintf(INFO, "hf clk src %d\n", OSCClockSourceGet(OSC_SRC_CLK_HF));
-	dprintf(INFO, "mf clk src %d\n", OSCClockSourceGet(OSC_SRC_CLK_MF));
-	dprintf(INFO, "lf clk src %d\n", OSCClockSourceGet(OSC_SRC_CLK_LF));
-#endif
-}
-
-void platform_init(void) {
-}
-
diff --git a/platform/cc13xx/radio.c b/platform/cc13xx/radio.c
deleted file mode 100644
index 1809d4b1..00000000
--- a/platform/cc13xx/radio.c
+++ /dev/null
@@ -1,176 +0,0 @@
-/*
- * Copyright (c) 2016 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <app.h>
-#include <debug.h>
-#include <reg.h>
-#include <kernel/thread.h>
-#include <kernel/event.h>
-#include <arch/arm/cm.h>
-
-#include <driverlib/prcm.h>
-#include <driverlib/rfc.h>
-#include <driverlib/rf_mailbox.h>
-#include <inc/hw_rfc_dbell.h>
-
-#include <rf_patches/rf_patch_cpe_genfsk.h>
-
-#include <platform/radio.h>
-
-#define RADIO_POLLED_MODE 0
-
-#define CPE0_MASK (IRQ_BOOT_DONE | IRQ_RX_OK | IRQ_LAST_COMMAND_DONE | IRQ_COMMAND_DONE)
-
-static event_t ack_evt = EVENT_INITIAL_VALUE(ack_evt, 0, EVENT_FLAG_AUTOUNSIGNAL);
-
-static event_t cpe0_evt = EVENT_INITIAL_VALUE(cpe0_evt, 0, EVENT_FLAG_AUTOUNSIGNAL);
-
-void ti_cc_rfc_cpe_0_irq(void) {
-	arm_cm_irq_entry();
-	event_signal(&cpe0_evt, false);
-
-	// disable IRQ until thread handles and re-enables them in response to event
-	NVIC_DisableIRQ(rfc_cpe_0_IRQn);
-
-	// reschedule if we woke a thread (indicated by !signaled)
-	arm_cm_irq_exit(!cpe0_evt.signaled);
-}
-
-static inline uint32_t cpe0_reason(void) {
-	uint32_t n = HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) & CPE0_MASK;
-	HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) = ~n;
-	return n;
-}
-
-static inline uint32_t cpe0_wait_irq(void) {
-	NVIC_EnableIRQ(rfc_cpe_0_IRQn);
-	event_wait(&cpe0_evt);
-	return cpe0_reason();
-}
-
-void ti_cc_rfc_cpe_1_irq(void) {
-	arm_cm_irq_entry();
-}
-
-void ti_cc_rfc_cmd_ack_irq(void) {
-	arm_cm_irq_entry();
-	HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG) = 0;
-	event_signal(&ack_evt, false);
-	// reschedule if we woke a thread (indicated by !signaled)
-	arm_cm_irq_exit(!ack_evt.signaled);
-}
-
-uint32_t radio_send_cmd(uint32_t cmd) {
-#if RADIO_POLLED_MODE
-	while (HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDR) != 0) {}
-	HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG) = 0;
-	HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDR) = cmd;
-	while (!HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG)) {}
-	HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG) = 0;
-	return HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA);
-#else
-	while(HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDR) != 0) {}
-	HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG) = 0;
-	event_unsignal(&ack_evt);
-	HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDR) = cmd;
-	event_wait(&ack_evt);
-#endif
-	return HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA);
-}
-
-void radio_wait_cmd(uint16_t *status) {
-	uint32_t addr = (uint32_t) status;
-	uint16_t val;
-#if RADIO_POLLED_MODE
-	for (;;) {
-		val = *REG16(addr);
-		if (val < 3) {
-			// idle, waiting to start, or running
-			thread_yield();
-		} else {
-			break;
-		}
-	}
-#else
-	for (;;) {
-		uint32_t x = cpe0_wait_irq();
-		val = *REG16(addr);
-		if (val > 3) {
-			break;
-		}
-	}
-#endif
-	if ((val != 0x0400) && (val != 0x3400)) {
-		dprintf(INFO, "Cmd Status %04x\n", val);
-	}
-}
-
-void radio_init(void) {
-#if !RADIO_POLLED_MODE
-	// route all IRQs to CPE0
-	HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEISL) = 0;
-	HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIEN) = CPE0_MASK;
-
-	// clear any pending
-	HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) = 0;
-	HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG) = 0;
-
-	//NVIC_EnableIRQ(rfc_cpe_0_IRQn);
-	//NVIC_EnableIRQ(rfc_cpe_1_IRQn);
-	NVIC_EnableIRQ(rfc_cmd_ack_IRQn);
-#endif
-
-	// Power RF domain
-	PRCMPowerDomainOn(PRCM_DOMAIN_RFCORE);
-	while (PRCMPowerDomainStatus(PRCM_DOMAIN_RFCORE) != PRCM_DOMAIN_POWER_ON) ;
-	dprintf(INFO, "power on\n");
-
-	// enable the RF top clock
-	PRCMDomainEnable(PRCM_DOMAIN_RFCORE);
-	PRCMLoadSet();
-	dprintf(INFO, "top clock on\n");
-
-	// enable all RF sub clocks
-	RFCClockEnable();
-	dprintf(INFO, "clocks on\n");
-
-	thread_sleep(1000);
-	rf_patch_cpe_genfsk();
-	dprintf(INFO, "patched\n");
-
-	unsigned n = radio_send_cmd(IMM_CMD(CMD_PING, 0, 0));
-	dprintf(INFO, "RESPONSE %08x\n", n);
-	n = radio_send_cmd(IMM_CMD(CMD_PING, 0, 0));
-	dprintf(INFO, "RESPONSE %08x\n", n);
-
-	rf_op_fw_info_t fwinfo;
-	memset(&fwinfo, 0, sizeof(fwinfo));
-	fwinfo.cmd = CMD_GET_FW_INFO;
-	n = radio_send_cmd((uint32_t) &fwinfo);
-	dprintf(INFO, "FW %d %04x %04x %04x %04x\n",
-		n, fwinfo.version, fwinfo.free_ram_start,
-		fwinfo.free_ram_size, fwinfo.avail_rat_ch);
-
-	n = radio_send_cmd(IMM_CMD(CMD_START_RAT, 0, 0));
-	dprintf(INFO, "START RAT %d\n", n);
-}
diff --git a/platform/cc13xx/rules.mk b/platform/cc13xx/rules.mk
deleted file mode 100644
index d2fc310b..00000000
--- a/platform/cc13xx/rules.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-ARCH := arm
-ARM_CPU := cortex-m3
-
-MEMBASE := 0x20000000
-ROMBASE := 0x00000000
-MEMSIZE := 0x5000
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/init.c \
-	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/vectab.c \
-	$(LOCAL_DIR)/gpio.c \
-	$(LOCAL_DIR)/radio.c
-
-LINKER_SCRIPT += \
-	$(BUILDDIR)/system-twosegment.ld
-
-MODULE_DEPS += \
-	arch/arm/arm-m/systick \
-	platform/cc13xx/cc13xxware
-
-GLOBAL_COMPILEFLAGS += -DWITH_NO_FP=1
-#GLOBAL_COMPILEFLAGS +=  -DDISABLE_DEBUG_OUTPUT=1
-
-include make/module.mk
-
diff --git a/platform/cc13xx/vectab.c b/platform/cc13xx/vectab.c
deleted file mode 100644
index 6e8ec48b..00000000
--- a/platform/cc13xx/vectab.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Copyright (c) 2016 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <debug.h>
-#include <compiler.h>
-#include <arch/arm/cm.h>
-
-static void ti_cc_dummy_irq(void) {
-	arm_cm_irq_entry();
-	panic("unhandled irq");
-}
-
-#define DEFAULT_HANDLER(x) \
-	void ti_cc_##x##_irq(void) __WEAK_ALIAS("ti_cc_dummy_irq")
-
-#define DEFIRQ(n) DEFAULT_HANDLER(n);
-#include <platform/defirq.h>
-#undef DEFIRQ
-
-#define VECTAB_ENTRY(x) ti_cc_##x##_irq
-
-const void * const __SECTION(".text.boot.vectab2") vectab2[] = {
-#define DEFIRQ(n) VECTAB_ENTRY(n),
-#include <platform/defirq.h>
-#undef DEFIRQ
-};
diff --git a/platform/lpc15xx/debug.c b/platform/lpc15xx/debug.c
deleted file mode 100644
index cbf9a48f..00000000
--- a/platform/lpc15xx/debug.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <debug.h>
-#include <stdio.h>
-#include <compiler.h>
-#include <lib/cbuf.h>
-#include <kernel/thread.h>
-#include <platform/debug.h>
-#include <arch/ops.h>
-#include <arch/arm/cm.h>
-#include <target/debugconfig.h>
-
-#include <platform/lpc.h>
-
-static cbuf_t debug_rx_buf;
-
-/* this code is only set up to handle UART0 as the debug uart */
-STATIC_ASSERT(DEBUG_UART == LPC_USART0);
-
-void lpc_debug_early_init(void)
-{
-    /* Use main clock rate as base for UART baud rate divider */
-    Chip_Clock_SetUARTBaseClockRate(Chip_Clock_GetMainClockRate(), false);
-
-    /* Setup UART */
-    Chip_UART_Init(DEBUG_UART);
-    Chip_UART_ConfigData(DEBUG_UART, UART_CFG_DATALEN_8 | UART_CFG_PARITY_NONE | UART_CFG_STOPLEN_1);
-    Chip_UART_SetBaud(DEBUG_UART, 115200);
-    Chip_UART_Enable(DEBUG_UART);
-    Chip_UART_TXEnable(DEBUG_UART);
-}
-
-void lpc_debug_init(void)
-{
-    cbuf_initialize(&debug_rx_buf, 16);
-
-    /* enable uart interrupts */
-    Chip_UART_IntEnable(DEBUG_UART, UART_INTEN_RXRDY);
-
-    NVIC_EnableIRQ(UART0_IRQn);
-}
-
-void lpc_UART0_irq(void)
-{
-    arm_cm_irq_entry();
-
-    /* read the rx buffer until it's empty */
-    while ((Chip_UART_GetStatus(DEBUG_UART) & UART_STAT_RXRDY) != 0) {
-        uint8_t c = Chip_UART_ReadByte(DEBUG_UART);
-        cbuf_write_char(&debug_rx_buf, c, false);
-    }
-
-    arm_cm_irq_exit(true);
-}
-
-void platform_dputc(char c)
-{
-    if (c == '\n') {
-        platform_dputc('\r');
-    }
-
-    Chip_UART_SendBlocking(DEBUG_UART, &c, 1);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-#if 1
-    return cbuf_read_char(&debug_rx_buf, c, wait);
-#else
-    uint8_t data;
-
-    if (Chip_UART_Read(DEBUG_UART, &data, 1) == 1) {
-        *c = data;
-        return 1;
-    }
-    return -1;
-#endif
-}
-
diff --git a/platform/lpc15xx/include/platform/gpio.h b/platform/lpc15xx/include/platform/gpio.h
deleted file mode 100644
index 8ee02952..00000000
--- a/platform/lpc15xx/include/platform/gpio.h
+++ /dev/null
@@ -1,36 +0,0 @@
-#pragma once
-
-#if 0
-/* helper defines for Stellaris platforms */
-
-/* flag to gpio_configure */
-#define GPIO_STELLARIS_OD (0x1 << 12)
-#define GPIO_STELLARIS_AF_ENABLE (0x2 << 12)
-
-#define GPIO_STELLARIS_AF(x) (((x) & 0xf) << 8)
-
-/* gpio port/pin is packed into a single unsigned int in 20x:4alternatefunc:4port:4pin format */
-#define GPIO(port, pin) ((unsigned int)(((port) << 4) | (pin)))
-
-#define GPIO_PORT(gpio) (((gpio) >> 4) & 0xf)
-#define GPIO_PIN(gpio) ((gpio) & 0xf)
-
-#define GPIO_PORT_A 0
-#define GPIO_PORT_B 1
-#define GPIO_PORT_C 2
-#define GPIO_PORT_D 3
-#define GPIO_PORT_E 4
-#define GPIO_PORT_F 5
-#define GPIO_PORT_G 6
-#define GPIO_PORT_H 7
-/* discontinuity */
-#define GPIO_PORT_J 8
-#define GPIO_PORT_K 9
-#define GPIO_PORT_L 10
-#define GPIO_PORT_M 11
-#define GPIO_PORT_N 12
-/* discontinuity */
-#define GPIO_PORT_P 13
-#define GPIO_PORT_Q 14
-#endif
-
diff --git a/platform/lpc15xx/include/platform/lpc.h b/platform/lpc15xx/include/platform/lpc.h
deleted file mode 100644
index 7f053e1b..00000000
--- a/platform/lpc15xx/include/platform/lpc.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#pragma once
-
-#define CORE_M3 1
-
-/* from lpcopen */
-#include "chip.h"
diff --git a/platform/lpc15xx/include/platform/platform_cm.h b/platform/lpc15xx/include/platform/platform_cm.h
deleted file mode 100644
index bad6e128..00000000
--- a/platform/lpc15xx/include/platform/platform_cm.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-/* include cmsis.h in platform/lpc space */
-#include <cmsis.h>
-
diff --git a/platform/lpc15xx/init.c b/platform/lpc15xx/init.c
deleted file mode 100644
index 31f212b4..00000000
--- a/platform/lpc15xx/init.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <err.h>
-#include <stdio.h>
-#include <debug.h>
-#include <platform.h>
-#include <platform/lpc.h>
-#include <arch/arm/cm.h>
-
-void lpc_debug_early_init(void);
-void lpc_debug_init(void);
-
-void lpc_gpio_early_init(void);
-void lpc_gpio_init(void);
-
-void lpc_usbc_early_init(void);
-void lpc_usbc_init(void);
-
-void platform_early_init(void)
-{
-    /* set up clocking for a board with an external oscillator */
-    Chip_SetupXtalClocking();
-
-    /* Set USB PLL input to main oscillator */
-    Chip_Clock_SetUSBPLLSource(SYSCTL_PLLCLKSRC_MAINOSC);
-    /* Setup USB PLL  (FCLKIN = 12MHz) * 4 = 48MHz
-       MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2)
-       FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz
-       FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */
-    Chip_Clock_SetupUSBPLL(3, 1);
-
-    /* Powerup USB PLL */
-    Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPLL_PD);
-
-    /* Wait for PLL to lock */
-    while (!Chip_Clock_IsUSBPLLLocked()) {}
-
-    /* Set default system tick divder to 1 */
-    Chip_Clock_SetSysTickClockDiv(1);
-
-    /* start the generic systick driver */
-    arm_cm_systick_init(Chip_Clock_GetMainClockRate());
-
-    lpc_debug_early_init();
-}
-
-void platform_init(void)
-{
-    lpc_debug_init();
-}
-
-// vim: set ts=4 sw=4 expandtab:
diff --git a/platform/lpc15xx/lpccheck.py b/platform/lpc15xx/lpccheck.py
deleted file mode 100755
index 495515d1..00000000
--- a/platform/lpc15xx/lpccheck.py
+++ /dev/null
@@ -1,23 +0,0 @@
-#!/usr/bin/env python
-
-import sys, os, struct
-
-if len(sys.argv) < 2:
-    print "not enough args, usage:"
-    print "%s <binfile>" % sys.argv[0]
-    sys.exit(1)
-
-f = open(sys.argv[1], "r+b")
-
-a = struct.unpack('iiiiiii', f.read(7*4))
-
-s = 0
-for i in a:
-    s += i
-s = -s
-
-f.seek(7*4)
-f.write(struct.pack('i', s))
-
-f.close()
-
diff --git a/platform/lpc15xx/rules.mk b/platform/lpc15xx/rules.mk
deleted file mode 100644
index b17d5ceb..00000000
--- a/platform/lpc15xx/rules.mk
+++ /dev/null
@@ -1,66 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-# ROMBASE, MEMBASE, and MEMSIZE are required for the linker script
-
-ARCH := arm
-
-ifeq ($(LPC_CHIP),LPC1549)
-MEMSIZE ?= 36864
-MEMBASE := 0x02000000
-ROMBASE := 0x00000000
-ARM_CPU := cortex-m3
-endif
-
-MODULE_DEFINES += PART_$(LPC_CHIP)
-
-ifeq ($(MEMSIZE),)
-$(error need to define MEMSIZE)
-endif
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/init.c \
-	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/vectab.c \
-
-#	$(LOCAL_DIR)/gpio.c \
-	$(LOCAL_DIR)/usbc.c \
-
-
-#	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/interrupts.c \
-	$(LOCAL_DIR)/platform_early.c \
-	$(LOCAL_DIR)/platform.c \
-	$(LOCAL_DIR)/timer.c \
-	$(LOCAL_DIR)/init_clock.c \
-	$(LOCAL_DIR)/init_clock_48mhz.c \
-	$(LOCAL_DIR)/mux.c \
-	$(LOCAL_DIR)/emac_dev.c
-
-# use a two segment memory layout, where all of the read-only sections 
-# of the binary reside in rom, and the read/write are in memory. The 
-# ROMBASE, MEMBASE, and MEMSIZE make variables are required to be set 
-# for the linker script to be generated properly.
-#
-LINKER_SCRIPT += \
-	$(BUILDDIR)/system-twosegment.ld
-
-MODULE_DEPS += \
-	arch/arm/arm-m/systick \
-	platform/lpc15xx/lpcopen \
-	lib/cbuf
-
-LPCSIGNEDBIN := $(OUTBIN).sign
-LPCCHECK := $(LOCAL_DIR)/lpccheck.py
-EXTRA_BUILDDEPS += $(LPCSIGNEDBIN)
-GENERATED += $(LPCSIGNEDBIN)
-
-$(LPCSIGNEDBIN): $(OUTBIN) $(LPCCHECK)
-	@$(MKDIR)
-	$(NOECHO)echo generating $@; \
-	cp $< $@.tmp; \
-	$(LPCCHECK) $@.tmp; \
-	mv $@.tmp $@
-
-include make/module.mk
diff --git a/platform/lpc15xx/vectab.c b/platform/lpc15xx/vectab.c
deleted file mode 100644
index c96dfbb1..00000000
--- a/platform/lpc15xx/vectab.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/*
- * Copyright (c) 2013-2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <debug.h>
-#include <compiler.h>
-#include <arch/arm/cm.h>
-
-/* from cmsis.h */
-#if 0
-WDT_IRQn                      = 0,      /*!< Watchdog timer Interrupt                         */
-WWDT_IRQn                     = WDT_IRQn,   /*!< Watchdog timer Interrupt alias for WDT_IRQn    */
-BOD_IRQn                      = 1,      /*!< Brown Out Detect(BOD) Interrupt                  */
-FMC_IRQn                      = 2,      /*!< FLASH Interrupt                                  */
-FLASHEEPROM_IRQn              = 3,      /*!< EEPROM controller interrupt                      */
-DMA_IRQn                      = 4,      /*!< DMA Interrupt                                    */
-GINT0_IRQn                    = 5,      /*!< GPIO group 0 Interrupt                           */
-GINT1_IRQn                    = 6,      /*!< GPIO group 1 Interrupt                           */
-PIN_INT0_IRQn                 = 7,      /*!< Pin Interrupt 0                                  */
-PIN_INT1_IRQn                 = 8,      /*!< Pin Interrupt 1                                  */
-PIN_INT2_IRQn                 = 9,      /*!< Pin Interrupt 2                                  */
-PIN_INT3_IRQn                 = 10,     /*!< Pin Interrupt 3                                  */
-PIN_INT4_IRQn                 = 11,     /*!< Pin Interrupt 4                                  */
-PIN_INT5_IRQn                 = 12,     /*!< Pin Interrupt 5                                  */
-PIN_INT6_IRQn                 = 13,     /*!< Pin Interrupt 6                                  */
-PIN_INT7_IRQn                 = 14,     /*!< Pin Interrupt 7                                  */
-RITIMER_IRQn                  = 15,     /*!< RITIMER interrupt                                */
-SCT0_IRQn                     = 16,     /*!< SCT0 interrupt                                   */
-SCT_IRQn                      = SCT0_IRQn,  /*!< Optional alias for SCT0_IRQn                  */
-SCT1_IRQn                     = 17,     /*!< SCT1 interrupt                                   */
-SCT2_IRQn                     = 18,     /*!< SCT2 interrupt                                   */
-SCT3_IRQn                     = 19,     /*!< SCT3 interrupt                                   */
-MRT_IRQn                      = 20,     /*!< MRT interrupt                                    */
-UART0_IRQn                    = 21,     /*!< UART0 Interrupt                                  */
-UART1_IRQn                    = 22,     /*!< UART1 Interrupt                                  */
-UART2_IRQn                    = 23,     /*!< UART2 Interrupt                                  */
-I2C0_IRQn                     = 24,     /*!< I2C0 Interrupt                                   */
-I2C_IRQn                      = I2C0_IRQn,  /*!< Optional alias for I2C0_IRQn                  */
-SPI0_IRQn                     = 25,     /*!< SPI0 Interrupt                                   */
-SPI1_IRQn                     = 26,     /*!< SPI1 Interrupt                                   */
-CAN_IRQn                      = 27,     /*!< CAN Interrupt                                    */
-USB0_IRQn                     = 28,     /*!< USB IRQ interrupt                                */
-USB_IRQn                      = USB0_IRQn,  /*!< Optional alias for USB0_IRQn                  */
-USB0_FIQ_IRQn                 = 29,     /*!< USB FIQ interrupt                                */
-USB_FIQ_IRQn                  = USB0_FIQ_IRQn,  /*!< Optional alias for USB0_FIQ_IRQn         */
-USB_WAKEUP_IRQn               = 30,     /*!< USB wake-up interrupt Interrupt                  */
-ADC0_SEQA_IRQn                = 31,     /*!< ADC0_A sequencer Interrupt                       */
-ADC0_A_IRQn                   = ADC0_SEQA_IRQn, /*!< Optional alias for ADC0_SEQA_IRQn        */
-ADC_A_IRQn                    = ADC0_SEQA_IRQn, /*!< Optional alias for ADC0_SEQA_IRQn        */
-ADC0_SEQB_IRQn                = 32,     /*!< ADC0_B sequencer Interrupt                       */
-ADC0_B_IRQn                   = ADC0_SEQB_IRQn, /*!< Optional alias for ADC0_SEQB_IRQn        */
-ADC_B_IRQn                    = ADC0_SEQB_IRQn, /*!< Optional alias for ADC0_SEQB_IRQn        */
-ADC0_THCMP                    = 33,     /*!< ADC0 threshold compare interrupt                 */
-ADC0_OVR                      = 34,     /*!< ADC0 overrun interrupt                           */
-ADC1_SEQA_IRQn                = 35,     /*!< ADC1_A sequencer Interrupt                       */
-ADC1_A_IRQn                   = ADC1_SEQA_IRQn, /*!< Optional alias for ADC1_SEQA_IRQn        */
-ADC1_SEQB_IRQn                = 36,     /*!< ADC1_B sequencer Interrupt                       */
-ADC1_B_IRQn                   = ADC1_SEQB_IRQn, /*!< Optional alias for ADC1_SEQB_IRQn        */
-ADC1_THCMP                    = 37,     /*!< ADC1 threshold compare interrupt                 */
-ADC1_OVR                      = 38,     /*!< ADC1 overrun interrupt                           */
-DAC_IRQ                       = 39,     /*!< DAC interrupt                                    */
-CMP0_IRQ                      = 40,     /*!< Analog comparator 0 interrupt                    */
-CMP_IRQn                      = CMP0_IRQ,   /*!< Optional alias for CMP0_IRQ                    */
-CMP1_IRQ                      = 41,     /*!< Analog comparator 1 interrupt                    */
-CMP2_IRQ                      = 42,     /*!< Analog comparator 2 interrupt                    */
-CMP3_IRQ                      = 43,     /*!< Analog comparator 3 interrupt                    */
-QEI_IRQn                      = 44,     /*!< QEI interrupt                                    */
-RTC_ALARM_IRQn                = 45,     /*!< RTC alarm interrupt                              */
-RTC_WAKE_IRQn                 = 46,     /*!< RTC wake-up interrupt                            */
-#endif
-
-/* un-overridden irq handler */
-void lpc_dummy_irq(void)
-{
-    arm_cm_irq_entry();
-
-    panic("unhandled irq\n");
-}
-
-extern void lpc_uart_irq(void);
-
-/* a list of default handlers that are simply aliases to the dummy handler */
-#define DEFAULT_HANDLER(x) \
-void lpc_##x##_irq(void) __WEAK_ALIAS("lpc_dummy_irq")
-
-DEFAULT_HANDLER(WDT);
-DEFAULT_HANDLER(BOD);
-DEFAULT_HANDLER(FMC);
-DEFAULT_HANDLER(FLASHEEPROM);
-DEFAULT_HANDLER(DMA);
-DEFAULT_HANDLER(GINT0);
-DEFAULT_HANDLER(GINT1);
-DEFAULT_HANDLER(PIN_INT0);
-DEFAULT_HANDLER(PIN_INT1);
-DEFAULT_HANDLER(PIN_INT2);
-DEFAULT_HANDLER(PIN_INT3);
-DEFAULT_HANDLER(PIN_INT4);
-DEFAULT_HANDLER(PIN_INT5);
-DEFAULT_HANDLER(PIN_INT6);
-DEFAULT_HANDLER(PIN_INT7);
-DEFAULT_HANDLER(RITIMER);
-DEFAULT_HANDLER(SCT0);
-DEFAULT_HANDLER(SCT1);
-DEFAULT_HANDLER(SCT2);
-DEFAULT_HANDLER(SCT3);
-DEFAULT_HANDLER(MRT);
-DEFAULT_HANDLER(UART0);
-DEFAULT_HANDLER(UART1);
-DEFAULT_HANDLER(UART2);
-DEFAULT_HANDLER(I2C0);
-DEFAULT_HANDLER(SPI0);
-DEFAULT_HANDLER(SPI1);
-DEFAULT_HANDLER(CAN);
-DEFAULT_HANDLER(USB0);
-DEFAULT_HANDLER(USB0_FIQ);
-DEFAULT_HANDLER(USB_WAKEUP);
-DEFAULT_HANDLER(ADC0_SEQA);
-DEFAULT_HANDLER(ADC0_SEQB);
-DEFAULT_HANDLER(ADC0_THCMP);
-DEFAULT_HANDLER(ADC0_OVR);
-DEFAULT_HANDLER(ADC1_SEQA);
-DEFAULT_HANDLER(ADC1_SEQB);
-DEFAULT_HANDLER(ADC1_THCMP);
-DEFAULT_HANDLER(ADC1_OVR);
-DEFAULT_HANDLER(DAC);
-DEFAULT_HANDLER(CMP0);
-DEFAULT_HANDLER(CMP1);
-DEFAULT_HANDLER(CMP2);
-DEFAULT_HANDLER(CMP3);
-DEFAULT_HANDLER(QEI);
-DEFAULT_HANDLER(RTC_ALARM);
-DEFAULT_HANDLER(RTC_WAKE);
-
-#define VECTAB_ENTRY(x) lpc_##x##_irq
-
-const void *const __SECTION(".text.boot.vectab2") vectab2[] = {
-    VECTAB_ENTRY(WDT),
-    VECTAB_ENTRY(BOD),
-    VECTAB_ENTRY(FMC),
-    VECTAB_ENTRY(FLASHEEPROM),
-    VECTAB_ENTRY(DMA),
-    VECTAB_ENTRY(GINT0),
-    VECTAB_ENTRY(GINT1),
-    VECTAB_ENTRY(PIN_INT0),
-    VECTAB_ENTRY(PIN_INT1),
-    VECTAB_ENTRY(PIN_INT2),
-    VECTAB_ENTRY(PIN_INT3),
-    VECTAB_ENTRY(PIN_INT4),
-    VECTAB_ENTRY(PIN_INT5),
-    VECTAB_ENTRY(PIN_INT6),
-    VECTAB_ENTRY(PIN_INT7),
-    VECTAB_ENTRY(RITIMER),
-    VECTAB_ENTRY(SCT0),
-    VECTAB_ENTRY(SCT1),
-    VECTAB_ENTRY(SCT2),
-    VECTAB_ENTRY(SCT3),
-    VECTAB_ENTRY(MRT),
-    VECTAB_ENTRY(UART0),
-    VECTAB_ENTRY(UART1),
-    VECTAB_ENTRY(UART2),
-    VECTAB_ENTRY(I2C0),
-    VECTAB_ENTRY(SPI0),
-    VECTAB_ENTRY(SPI1),
-    VECTAB_ENTRY(CAN),
-    VECTAB_ENTRY(USB0),
-    VECTAB_ENTRY(USB0_FIQ),
-    VECTAB_ENTRY(USB_WAKEUP),
-    VECTAB_ENTRY(ADC0_SEQA),
-    VECTAB_ENTRY(ADC0_SEQB),
-    VECTAB_ENTRY(ADC0_THCMP),
-    VECTAB_ENTRY(ADC0_OVR),
-    VECTAB_ENTRY(ADC1_SEQA),
-    VECTAB_ENTRY(ADC1_SEQB),
-    VECTAB_ENTRY(ADC1_THCMP),
-    VECTAB_ENTRY(ADC1_OVR),
-    VECTAB_ENTRY(DAC),
-    VECTAB_ENTRY(CMP0),
-    VECTAB_ENTRY(CMP1),
-    VECTAB_ENTRY(CMP2),
-    VECTAB_ENTRY(CMP3),
-    VECTAB_ENTRY(QEI),
-    VECTAB_ENTRY(RTC_ALARM),
-    VECTAB_ENTRY(RTC_WAKE),
-};
diff --git a/platform/lpc43xx/debug.c b/platform/lpc43xx/debug.c
deleted file mode 100644
index f0c2f145..00000000
--- a/platform/lpc43xx/debug.c
+++ /dev/null
@@ -1,181 +0,0 @@
-/*
- * Copyright (c) 2015 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <debug.h>
-#include <reg.h>
-#include <kernel/thread.h>
-#include <lib/cbuf.h>
-
-#include <arch/arm/cm.h>
-#include <platform/lpc43xx-uart.h>
-#include <platform/lpc43xx-clocks.h>
-
-static cbuf_t console_rx_buf;
-
-#ifndef TARGET_DEBUG_BAUDRATE
-#define TARGET_DEBUG_BAUDRATE 115200
-#endif
-
-#if TARGET_DEBUG_UART == 1
-#define UART_BASE UART0_BASE
-#define UART_IRQ lpc43xx_USART0_IRQ
-#define UART_IRQn USART0_IRQn
-#elif TARGET_DEBUG_UART == 2
-#define UART_BASE UART1_BASE
-#define UART_IRQ lpc43xx_UART1_IRQ
-#define UART_IRQn UART1_IRQn
-#elif TARGET_DEBUG_UART == 3
-#define UART_BASE UART2_BASE
-#define UART_IRQ lpc43xx_USART2_IRQ
-#define UART_IRQn USART2_IRQn
-#elif TARGET_DEBUG_UART == 4
-#define UART_BASE UART3_BASE
-#define UART_IRQ lpc43xx_USART3_IRQ
-#define UART_IRQn USART3_IRQn
-#else
-#warning TARGET_DEBUG_UART unspecified
-#endif
-
-static u32 base_uart_clk[4] = {
-    BASE_UART0_CLK,
-    BASE_UART1_CLK,
-    BASE_UART2_CLK,
-    BASE_UART3_CLK
-};
-
-extern uint8_t __lpc43xx_main_clock_sel;
-extern uint32_t __lpc43xx_main_clock_mhz;
-
-#define ITM_STIM0   0xE0000000
-#define ITM_TER     0xE0000E00
-#define ITM_TCR     0xE0000E80
-#define ITM_LAR     0xE0000FB0
-
-#define TPI_ACPR    0xE0040010
-#define TPI_SPPR    0xE00400F0
-#define TPI_FFCR    0xE0040304
-
-#define DEMCR       0xE000EDFC
-#define DEMCR_TRCENA    (1 << 24)
-
-void lpc43xx_debug_early_init(void)
-{
-    // ensure ITM and DWT are enabled
-    writel(readl(DEMCR) | DEMCR_TRCENA, DEMCR);
-
-    writel((1 << 9) | (1 << 16) | (2 << 10), DWT_CTRL);
-
-    // configure TPIU for one-wire, nrz, 6mbps
-    writel((__lpc43xx_main_clock_mhz / 6000000) - 1, TPI_ACPR);
-    writel(2, TPI_SPPR);
-    writel(0x100, TPI_FFCR);
-
-    // configure ITM
-    writel(0xC5ACCE55, ITM_LAR); // unlock regs
-    writel(0x0001000D, ITM_TCR); // ID=1, enable ITM, SYNC, DWT events
-    writel(0xFFFFFFFF, ITM_TER); // enable all trace ports
-
-#ifdef UART_BASE
-#if TARGET_DEBUG_BAUDRATE == 115200
-    // config for 115200-n-8-1 from 12MHz clock
-    writel(BASE_CLK_SEL(CLK_IRC), base_uart_clk[TARGET_DEBUG_UART - 1]);
-    writel(LCR_DLAB, UART_BASE + REG_LCR);
-    writel(4, UART_BASE + REG_DLL);
-    writel(0, UART_BASE + REG_DLM);
-    writel(FDR_DIVADDVAL(5) | FDR_MULVAL(8), UART_BASE + REG_FDR);
-#else
-    uint32_t div = __lpc43xx_main_clock_mhz / 16 / TARGET_DEBUG_BAUDRATE;
-    writel(BASE_CLK_SEL(__lpc43xx_main_clock_sel),
-           base_uart_clk[TARGET_DEBUG_UART - 1]);
-    writel(LCR_DLAB, UART_BASE + REG_LCR);
-    writel(div & 0xFF, UART_BASE + REG_DLL);
-    writel((div >> 8) & 0xFF, UART_BASE + REG_DLM);
-#endif
-    writel(LCR_WLS_8 | LCR_SBS_1, UART_BASE + REG_LCR);
-    writel(FCR_FIFOEN | FCR_RX_TRIG_1, UART_BASE + REG_FCR);
-    writel(IER_RBRIE, UART_BASE + REG_IER);
-    NVIC_EnableIRQ(UART_IRQn);
-#endif
-}
-
-void lpc43xx_debug_init(void)
-{
-    cbuf_initialize(&console_rx_buf, 64);
-}
-
-#ifdef UART_BASE
-void UART_IRQ (void)
-{
-    arm_cm_irq_entry();
-    while (readl(UART_BASE + REG_LSR) & LSR_RDR) {
-        unsigned c = readl(UART_BASE + REG_RBR);
-        if (cbuf_space_avail(&console_rx_buf)) {
-            cbuf_write_char(&console_rx_buf, c, false);
-        }
-    }
-    arm_cm_irq_exit(1);
-}
-#endif
-
-void platform_dputc(char c)
-{
-    // if ITM is enabled, send character to STIM0
-    if (readl(ITM_TCR) & 1) {
-        while (!readl(ITM_STIM0)) ;
-        writeb(c, ITM_STIM0);
-    }
-#ifdef UART_BASE
-    while (!(readl(UART_BASE + REG_LSR) & LSR_THRE)) ;
-    writel(c, UART_BASE + REG_THR);
-#endif
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    if (cbuf_read_char(&console_rx_buf, c, wait) == 0)
-        return -1;
-    return 0;
-}
-
-#define DCRDR 0xE000EDF8
-
-void _debugmonitor(void)
-{
-    u32 n;
-    arm_cm_irq_entry();
-    n = readl(DCRDR);
-    if (n & 0x80000000) {
-        switch (n >> 24) {
-            case 0x80: // write to console
-                if (cbuf_space_avail(&console_rx_buf)) {
-                    cbuf_write_char(&console_rx_buf, n & 0xFF, false);
-                }
-                n = 0;
-                break;
-            default:
-                n = 0x01000000;
-        }
-        writel(n, DCRDR);
-    }
-    arm_cm_irq_exit(1);
-}
diff --git a/platform/lpc43xx/gpio.c b/platform/lpc43xx/gpio.c
deleted file mode 100644
index f964a790..00000000
--- a/platform/lpc43xx/gpio.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Copyright (c) 2015 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <reg.h>
-#include <platform/lpc43xx-gpio.h>
-
-inline int gpio_config(unsigned nr, unsigned flags)
-{
-    unsigned m = _GPIOm(nr);
-    unsigned n = _GPIOn(nr);
-    if (flags & GPIO_INPUT) {
-        writel(readl(GPIO_DIR(m)) & (~(1 << n)), GPIO_DIR(m));
-    } else {
-        writel(readl(GPIO_DIR(m)) | (1 << n), GPIO_DIR(m));
-    }
-    return 0;
-}
-
-inline void gpio_set(unsigned nr, unsigned on)
-{
-    writel(on, GPIO_WORD(nr));
-}
-
-inline int gpio_get(unsigned nr)
-{
-    return readl(GPIO_WORD(nr)) & 1;
-}
diff --git a/platform/lpc43xx/include/platform/defirq.h b/platform/lpc43xx/include/platform/defirq.h
deleted file mode 100644
index 112466fd..00000000
--- a/platform/lpc43xx/include/platform/defirq.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * Copyright (c) 2015 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-DEFIRQ(DAC)
-DEFIRQ(M0APP)
-DEFIRQ(DMA)
-DEFIRQ(RESERVED03)
-DEFIRQ(FLASHEEPROM)
-DEFIRQ(ETHERNET)
-DEFIRQ(SDIO)
-DEFIRQ(LCD)
-DEFIRQ(USB0)
-DEFIRQ(USB1)
-DEFIRQ(SCT)
-DEFIRQ(RITIMER)
-DEFIRQ(TIMER0)
-DEFIRQ(TIMER1)
-DEFIRQ(TIMER2)
-DEFIRQ(TIMER3)
-DEFIRQ(MCPWM)
-DEFIRQ(ADC0)
-DEFIRQ(I2C0)
-DEFIRQ(I2C1)
-DEFIRQ(SPI_INT)
-DEFIRQ(ADC1)
-DEFIRQ(SSP0)
-DEFIRQ(SSP1)
-DEFIRQ(USART0)
-DEFIRQ(UART1)
-DEFIRQ(USART2)
-DEFIRQ(USART3)
-DEFIRQ(I2S0)
-DEFIRQ(I2S1)
-DEFIRQ(SPIFI)
-DEFIRQ(SGPIO_INT)
-DEFIRQ(PIN_INT0)
-DEFIRQ(PIN_INT1)
-DEFIRQ(PIN_INT2)
-DEFIRQ(PIN_INT3)
-DEFIRQ(PIN_INT4)
-DEFIRQ(PIN_INT5)
-DEFIRQ(PIN_INT6)
-DEFIRQ(PIN_INT7)
-DEFIRQ(GINT0)
-DEFIRQ(GINT1)
-DEFIRQ(EVENTROUTER)
-DEFIRQ(C_CAN1)
-DEFIRQ(RESERVED44)
-DEFIRQ(ADCHS)
-DEFIRQ(ATIMER)
-DEFIRQ(RTC)
-DEFIRQ(RESERVED48)
-DEFIRQ(WWDT)
-DEFIRQ(M0SUB)
-DEFIRQ(C_CAN0)
-DEFIRQ(QEI)
diff --git a/platform/lpc43xx/include/platform/lpc43xx-clocks.h b/platform/lpc43xx/include/platform/lpc43xx-clocks.h
deleted file mode 100644
index 5b760afa..00000000
--- a/platform/lpc43xx/include/platform/lpc43xx-clocks.h
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * Copyright (c) 2015 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-#define FREQ_MON		0x40050014
-#define XTAL_OSC_CTRL		0x40050018
-
-#define PLL0USB_STAT		0x4005001C
-#define PLL0USB_CTRL		0x40050020
-#define PLL0USB_MDIV		0x40050024
-#define PLL0USB_NP_DIV		0x40050028
-
-#define PLL0AUDIO_STAT		0x4005002C
-#define PLL0AUDIO_CTRL		0x40050030
-#define PLL0AUDIO_MDIV		0x40050034
-#define PLL0AUDIO_NP_DIV	0x40050038
-#define PLL0AUDIO_FRAC		0x4005003C
-
-#define PLL1_STAT		0x40050040
-#define PLL1_CTRL		0x40050044
-
-#define IDIVA_CTRL		0x40050048 // /(1..4)   IRC, CLKIN, XTAL, PLLs
-#define IDIVB_CTRL		0x4005004C // /(1..16)  IRC, CLKIN, XTAL, PLL0AUDIO, PLL1, IDIVA
-#define IDIVC_CTRL		0x40050050 // /(1..16)  "
-#define IDIVD_CTRL		0x40050054 // /(1..16)  "
-#define IDIVE_CTRL		0x40050058 // /(1..256) IRC, CLKIN, XTAL, PLL0AUDIO, PLL1, IDIVA
-
-#define BASE_SAFE_CLK		0x4005005C // only CLK_IRC allowed
-#define BASE_USB0_CLK		0x40050060 // only CLK_PLL0USB allowed
-#define BASE_PERIPH_CLK		0x40050064
-#define BASE_USB1_CLK		0x40050068
-#define BASE_M4_CLK		0x4005006C
-#define BASE_SPIFI_CLK		0x40050070
-#define BASE_SPI_CLK		0x40050074
-#define BASE_PHY_RX_CLK		0x40050078
-#define BASE_PHY_TX_CLK		0x4005008C
-#define BASE_APB1_CLK		0x40050080
-#define BASE_APB3_CLK		0x40050084
-#define BASE_LCD_CLK		0x40050088
-#define BASE_ADCHS_CLK		0x4005008C
-#define BASE_SDIO_CLK		0x40050090
-#define BASE_SSP0_CLK		0x40050094
-#define BASE_SSP1_CLK		0x40050098
-#define BASE_UART0_CLK		0x4005009C
-#define BASE_UART1_CLK		0x400500A0
-#define BASE_UART2_CLK		0x400500A4
-#define BASE_UART3_CLK		0x400500A8
-#define BASE_OUT_CLK		0x400500AC
-#define BASE_AUDIO_CLK		0x400500C0
-#define BASE_CGU_OUT0_CLK	0x400500C4
-#define BASE_CGU_OUT1_CLK	0x400500C8
-
-#define BASE_PD			(1 << 0) // power-down
-#define BASE_AUTOBLOCK		(1 << 11)
-#define BASE_CLK_SEL(n)		((n) << 24)
-
-#define PLL0_STAT_LOCK		(1 << 0)
-#define PLL0_STAT_FR		(1 << 1)
-
-#define PLL0_CTRL_PD		(1 << 0) // power down
-#define PLL0_CTRL_BYPASS	(1 << 1) // input sent to post-div
-#define PLL0_CTRL_DIRECTI	(1 << 2)
-#define PLL0_CTRL_DIRECTO	(1 << 3)
-#define PLL0_CTRL_CLKEN		(1 << 4)
-#define PLL0_CTRL_FRM		(1 << 6) // free running mode
-#define PLL0_CTRL_AUTOBLOCK	(1 << 11)
-#define PLL0_CTRL_CLK_SEL(n)	((n) << 24) // input clock select
-// PLL0AUDIO only:
-#define PLL0_CTRL_PLLFRACT_REQ	(1 << 12)
-#define PLL0_CTRL_SEL_EXT	(1 << 13)
-#define PLL0_CTRL_MOD_PD	(1 << 14)
-
-#define PLL1_STAT_LOCK		(1 << 0)
-
-#define PLL1_CTRL_PD		(1 << 0)
-#define PLL1_CTRL_BYPASS	(1 << 1)
-#define PLL1_CTRL_FBSEL		(1 << 6)
-#define PLL1_CTRL_DIRECT	(1 << 7)
-#define PLL1_CTRL_PSEL_1	(0 << 8)
-#define PLL1_CTRL_PSEL_2	(1 << 8)
-#define PLL1_CTRL_PSEL_4	(2 << 8)
-#define PLL1_CTRL_PSEL_8	(3 << 8)
-#define PLL1_CTRL_AUTOBLOCK	(1 << 11)
-#define PLL1_CTRL_NSEL_1	(0 << 12)
-#define PLL1_CTRL_NSEL_2	(1 << 12)
-#define PLL1_CTRL_NSEL_3	(2 << 12)
-#define PLL1_CTRL_NSEL_4	(3 << 12)
-#define PLL1_CTRL_MSEL(m)	(((m) - 1) << 16)
-#define PLL1_CTRL_CLK_SEL(c)	((c) << 24)
-
-#define IDIV_PD			(1 << 0)
-#define IDIV_N(n)		(((n) - 1) << 2)
-#define IDIV_AUTOBLOCK		(1 << 11)
-#define IDIV_CLK_SEL(c)		((c) << 24)
-
-#define CLK_32K			0x00
-#define CLK_IRC			0x01 // 12MHz internal RC OSC
-#define CLK_ENET_RX		0x02
-#define CLK_ENET_TX		0x03
-#define CLK_GP_CLKIN		0x04
-#define CLK_XTAL		0x06 // crystal oscillator
-#define CLK_PLL0USB		0x07 // only for BASE_{USB0,USB1,OUT}_CLK
-#define CLK_PLL0AUDIO		0x08
-#define CLK_PLL1		0x09
-#define CLK_IDIVA		0x0C
-#define CLK_IDIVB		0x0D
-#define CLK_IDIVC		0x0E
-#define CLK_IDIVD		0x0F
-#define CLK_IDIVE		0x10
-
diff --git a/platform/lpc43xx/include/platform/lpc43xx-gpdma.h b/platform/lpc43xx/include/platform/lpc43xx-gpdma.h
deleted file mode 100644
index 949b90b1..00000000
--- a/platform/lpc43xx/include/platform/lpc43xx-gpdma.h
+++ /dev/null
@@ -1,174 +0,0 @@
-/*
- * Copyright (c) 2015 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-// these are bitmasks of ch0..ch7 in bit0..bit7
-#define DMA_INTSTAT		0x40002000 // ro: INTTCSTAT | INTERRSTAT
-#define DMA_INTTCSTAT		0x40002004
-#define DMA_INTTCCLR		0x40002008 // wtc
-#define DMA_INTERRSTAT		0x4000200C
-#define DMA_INTERRCLR		0x40002010 // wtc
-#define DMA_INTTCRAW		0x40002014 // not masked
-#define DMA_INTERRRAW		0x40002018 // not masked
-#define DMA_ENABLED		0x4000201C
-
-#define DMA_CONFIG		0x40002030
-#define DMA_CONFIG_EN		(1 << 0) // enable controller
-#define DMA_CONFIG_M0_BE	(1 << 1) // master0 big-endian mode
-#define DMA_CONFIG_M1_BE	(1 << 2) // master1 big-endian mode
-
-#define DMA_SRC(n)		(0x40002100 + ((n) * 0x20))
-#define DMA_DST(n)		(0x40002104 + ((n) * 0x20))
-#define DMA_LLI(n)		(0x40002108 + ((n) * 0x20))
-#define DMA_CTL(n)		(0x4000210C + ((n) * 0x20))
-#define DMA_CFG(n)		(0x40002110 + ((n) * 0x20))
-
-// DMA_CTL bits
-#define BURST_1			0
-#define BURST_4			1
-#define BURST_8			2
-#define BURST_16		3
-#define BURST_32		4
-#define BURST_64		5
-#define BURST_128		6
-#define BURST_256		7
-
-#define DMA_XFER_SIZE(n)	((n) & 0xFFF)
-#define DMA_SRC_BURST(sz)	(((sz) & 7) << 12)
-#define DMA_DST_BURST(sz)	(((sz) & 7) << 15)
-#define DMA_SRC_BYTE		(0 << 18)
-#define DMA_SRC_HALF		(1 << 18)
-#define DMA_SRC_WORD		(2 << 18)
-#define DMA_DST_BYTE		(0 << 21)
-#define DMA_DST_HALF		(1 << 21)
-#define DMA_DST_WORD		(2 << 21)
-#define DMA_SRC_MASTER0		(0 << 24)
-#define DMA_SRC_MASTER1		(1 << 24)
-#define DMA_DST_MASTER0		(0 << 25) // memory only
-#define DMA_DST_MASTER1		(1 << 25)
-#define DMA_SRC_INCR		(1 << 26)
-#define DMA_DST_INCR		(1 << 27)
-#define DMA_PROT1		(1 << 28) // Privileged
-#define DMA_PROT2		(1 << 29) // Bufferable
-#define DMA_PROT3		(1 << 30) // Cacheable
-#define DMA_TC_IE		(1 << 31) // enable irq on terminal count
-
-// DMA_CFG bits
-#define DMA_ENABLE		(1 << 0)
-#define DMA_SRC_PERIPH(n)	(((n) & 15) << 1)
-#define DMA_DST_PERIPH(n)	(((n) & 15) << 6)
-#define DMA_FLOW_M2M_DMAc	(0 << 11) // dma ctl
-#define DMA_FLOW_M2P_DMAc	(1 << 11) // dma ctl
-#define DMA_FLOW_P2M_DMAc	(2 << 11) // dma ctl
-#define DMA_FLOW_P2P_DMAc	(3 << 11) // dma ctl
-#define DMA_FLOW_P2P_DPc	(4 << 11) // dst per ctl
-#define DMA_FLOW_M2P_DPc	(5 << 11) // dst per ctl
-#define DMA_FLOW_P2M_SPc	(6 << 11) // src per ctl
-#define DMA_FLOW_P2P_SPc	(7 << 11) // src per ctl
-#define DMA_ERR_IRQ_EN		(1 << 14)
-#define DMA_TC_IRQ_EN		(1 << 15)
-#define DMA_LOCK_XFER		(1 << 16)
-#define DMA_ACTIVE		(1 << 17) // ro: data in fifo
-#define DMA_HALT		(1 << 18) // ignore source dreqs, drain fifo
-
-
-#define DMAMUX_REG	0x4004311C
-
-#define DMAMUX_P(n,v)	(((v) & 3) << (((n) & 15) << 1))
-#define DMAMUX_M(n)	(~DMAMUX_P(n,3))
-
-#define P0_SPIFI	0
-#define P0_SCT_OUT2	1
-#define P0_SGPIO14	2
-#define P0_TIMER3_M1	3
-
-#define P1_TIMER0_M0	0
-#define P1_USART0_TX	1
-#define P1_AES_IN	3
-
-#define P2_TIMER0_M1	0
-#define P2_USART0_RX	1
-#define P2_AES_OUT	3
-
-#define P3_TIMER1_M0	0
-#define P3_UART1_TX	1
-#define P3_I2S1_DMA1	2
-#define P3_SSP1_TX	3
-
-#define P4_TIMER1_M1	0
-#define P4_UART1_RX	1
-#define P4_I2S1_DMA2	2
-#define P4_SSP1_RX	3
-
-#define P5_TIMER2_M0	0
-#define P5_USART2_TX	1
-#define P5_SSP1_TX	2
-#define P5_SGPIO15	3
-
-#define P6_TIMER2_M1	0
-#define P6_USART2_RX	1
-#define P6_SSP1_RX	2
-#define P6_SGPIO14	3
-
-#define P7_TIMER3_M0	0
-#define P7_USART3_TX	1
-#define P7_SCT_DMA0	2
-#define P7_ADCHS_WR	3
-
-#define P8_TIMER3_M1	0
-#define P8_USART3_RX	1
-#define P8_SCT_DMA1	2
-#define P8_ADCHS_RD	3
-
-#define P9_SSP0_RX	0
-#define P9_I2S0_DMA1	1
-#define P9_SCT_DMA1	2
-
-#define P10_SSP0_RX	0
-#define P10_I2S0_DMA2	1
-#define P10_SCT_DMA0	2
-
-#define P11_SSP1_RX	0
-#define P11_SGPIO14	1
-#define P11_USART0_TX	2
-
-#define P12_SSP1_RX	0
-#define P12_SGPIO15	1
-#define P12_USART0_RX	2
-
-#define P13_ADC0	0
-#define P13_AES_IN	1
-#define P13_SSP1_RX	2
-#define P13_USART3_RX	3
-
-#define P14_ADC1	0
-#define P14_AES_OUT	1
-#define P14_SSP1_TX	2
-#define P14_USART3_TX	3
-
-#define P15_DAC		0
-#define P15_SCT_OUT3	1
-#define P15_SGPIO15	2
-#define P15_TIMER3_M0	3
-
diff --git a/platform/lpc43xx/include/platform/lpc43xx-gpio.h b/platform/lpc43xx/include/platform/lpc43xx-gpio.h
deleted file mode 100644
index a53b3581..00000000
--- a/platform/lpc43xx/include/platform/lpc43xx-gpio.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright (c) 2015 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-#include <dev/gpio.h>
-
-// pinmux
-#define PIN(m,n)	((((m) & 0xFF) << 8) | ((n) & 0xFF))
-#define _PINm(nr)	(((nr) >> 8) & 0xFF)
-#define _PINn(nr)	((nr) & 0xFF)
-
-#define _PIN_CFG(m,n)	(0x40086000 + ((m) * 0x80) + ((n) * 4))
-#define PIN_CFG(nr)	_PIN_CFG(_PINm(nr),_PINn(nr))
-
-#define PIN_MODE(n)	((n) & 7)
-#define PIN_PULLUP	(0 << 3) // pull-up, no pull-down
-#define PIN_REPEATER	(1 << 3) // repeater mode
-#define PIN_PLAIN	(2 << 3) // no pull-up, no pull-down
-#define PIN_PULLDOWN	(3 << 3) // pull-down, no pull-up
-#define PIN_SLOW	(0 << 5) // slow slew rate (low noise, medium speed)
-#define PIN_FAST	(1 << 5) // fast slew rate (medium noise, fast speed)
-#define PIN_INPUT	(1 << 6) // enable input buffer, required for inputs
-#define PIN_FILTER	(1 << 7) // enable glitch filter, not for >30MHz signals
-
-static inline void pin_config(unsigned nr, unsigned flags) {
-	writel(flags, PIN_CFG(nr));
-}
-
-// gpio
-#define GPIO(m,n) ((((m) & 0xFF) << 8) | ((n) & 0xFF))
-#define _GPIOm(nr)	(((nr) >> 8) & 0xFF)
-#define _GPIOn(nr)	((nr) & 0xFF)
-
-// each GPIO as a single byte or word register
-// write zero to clear
-// write non-zero to set
-// reads as zero if input is low
-// reads as FF (byte) or FFFFFFFF (word) if input is high
-#define _GPIO_BYTE(m,n)	(0x400F4000 + ((m) * 0x20) + (n))
-#define _GPIO_WORD(m,n)	(0x400F5000 + ((m) * 0x80) + ((n) * 4))
-#define GPIO_BYTE(nr)	_GPIO_BYTE(_GPIOm(nr),_GPIOn(nr))
-#define GPIO_WORD(nr)	_GPIO_WORD(_GPIOm(nr),_GPIOn(nr))
-
-// GPIOs grouped by port, with one bit per pin
-#define GPIO_DIR(m)	(0x400F6000 + ((m) * 4)) // 1 = output, 0 = input
-#define GPIO_MASK(m)	(0x400F6080 + ((m) * 4)) // 1s disable MPIN() bits
-#define GPIO_PIN(m)	(0x400F6100 + ((m) * 4)) // r/w value at pins
-#define GPIO_MPIN(m)	(0x400F6180 + ((m) * 4)) // r value at pins & ~MASK
-						 // w only MASK bits
-#define GPIO_SET(m)	(0x400F6200 + ((m) * 4)) // write 1s to set
-#define GPIO_CLR(m)	(0x400F6280 + ((m) * 4)) // write 1s to clear
-#define GPIO_NOT(m)	(0x400F6300 + ((m) * 4)) // write 1s to invert
diff --git a/platform/lpc43xx/include/platform/lpc43xx-sgpio.h b/platform/lpc43xx/include/platform/lpc43xx-sgpio.h
deleted file mode 100644
index cac3e83e..00000000
--- a/platform/lpc43xx/include/platform/lpc43xx-sgpio.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- * Copyright (c) 2015 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-#define SGPIO_OUT_CFG(n)	(0x40101000 + ((n) * 4))
-#define CFG_OUT_M1		0x00
-#define CFG_OUT_M2A		0x01
-#define CFG_OUT_M2B		0x02
-#define CFG_OUT_M2C		0x03
-#define CFG_OUT_GPIO		0x04
-#define CFG_OUT_M4A		0x05
-#define CFG_OUT_M4B		0x06
-#define CFG_OUT_M4C		0x07
-#define CFG_OUT_CLK		0x08
-#define CFG_OUT_M8A		0x09
-#define CFG_OUT_M8B		0x0A
-#define CFG_OUT_M8C		0x0B
-#define CFG_OE_GPIO		0x00
-#define CFG_OE_M1		0x40
-#define CFG_OE_M2		0x50
-#define CFG_OE_M4		0x60
-#define CFG_OE_M8		0x70
-
-#define SLICE_CFG1(n) 		(0x40101040 + ((n) * 4))
-#define CLK_USE_SLICE		(0 << 0)
-#define CLK_USE_PIN		(1 << 0)
-#define CLK_PIN_SGPIO8		(0 << 1)
-#define CLK_PIN_SGPIO9		(1 << 1)
-#define CLK_PIN_SGPIO10		(2 << 1)
-#define CLK_PIN_SGPIO11		(3 << 1)
-#define CLK_SLICE_D		(0 << 3)
-#define CLK_SLICE_H		(1 << 3)
-#define CLK_SLICE_O		(2 << 3)
-#define CLK_SLICE_P		(3 << 3)
-#define QUAL_ENABLE		(0 << 5)
-#define QUAL_DISABLE		(1 << 5)
-#define QUAL_USE_SLICE		(2 << 5)
-#define QUAL_USE_PIN		(3 << 5)
-#define QUAL_PIN_SGPIO8		(0 << 7)
-#define QUAL_PIN_SGPIO9		(1 << 7)
-#define QUAL_PIN_SGPIO10	(2 << 7)
-#define QUAL_PIN_SGPIO11	(3 << 7)
-#define QUAL_SLICE_A		(0 << 9) // D for SLICE A
-#define QUAL_SLICE_H		(1 << 9) // O for SLICE H
-#define QUAL_SLICE_I		(2 << 9) // D for SLICE I
-#define QUAL_SLICE_P		(3 << 9) // O for SLICE P
-#define CONCAT_PIN		(0 << 11)
-#define CONCAT_SLICE		(1 << 11)
-#define CONCAT_LOOP		(0 << 12)
-#define CONCAT_2_SLICE		(1 << 12)
-#define CONCAT_4_SLICE		(2 << 12)
-#define CONCAT_8_SLICE		(3 << 12)
-
-#define SLICE_CFG2(n)		(0x40101080 + ((n) * 4))
-#define MATCH_MODE		(1 << 0)
-#define CLK_GEN_INTERNAL	(0 << 2) // from COUNTER
-#define CLK_GEN_EXTERNAL	(1 << 2) // from PIN or SLICE
-#define INV_CLK_OUT		(1 << 3)
-#define SHIFT_1BPC		(0 << 6)
-#define SHIFT_2BPC		(1 << 6)
-#define SHIFT_4BPC		(2 << 6)
-#define SHIFT_8BPC		(3 << 6)
-#define INVERT_QUALIFIER	(1 << 8)
-
-#define SLICE_REG(n)		(0x401010C0 + ((n) * 4)) // main shift reg
-#define SLICE_SHADOW(n)		(0x40101100 + ((n) * 4)) // swapped @ POS underflow
-#define SLICE_PRESET(n)		(0x40101140 + ((n) * 4)) // 12bit -> COUNT @ 0
-#define SLICE_COUNT(n)		(0x40101180 + ((n) * 4)) // 12 bit downcount
-#define SLICE_POS(n)		(0x401011C0 + ((n) * 4))
-#define POS_POS(n)		((n) << 0) // value at start
-#define POS_RESET(n)		((n) << 8) // load at underflow
-
-#define SGPIO_IN		(0x40101210)
-#define SGPIO_OUT		(0x40101214)
-#define SGPIO_OEN		(0x40101218)
-#define SLICE_CTRL_ENABLE	(0x4010121C)
-#define SLICE_CTRL_DISABLE	(0x40101220)
-#define SLICE_XHG_STS		(0x40101F2C)
-#define SLICE_XHG_STS_CLR	(0x40101F30)
-#define SLICE_XHG_STS_SET	(0x40101F34)
-
-#define SLC_A			0
-#define SLC_B			1
-#define SLC_C			2
-#define SLC_D			3
-#define SLC_E			4
-#define SLC_F			5
-#define SLC_G			6
-#define SLC_H			7
-#define SLC_I			8
-#define SLC_J			9
-#define SLC_K			10
-#define SLC_L			11
-#define SLC_M			12
-#define SLC_N			13
-#define SLC_O			14
-#define SLC_P			15
-
diff --git a/platform/lpc43xx/include/platform/lpc43xx-spifi.h b/platform/lpc43xx/include/platform/lpc43xx-spifi.h
deleted file mode 100644
index 6902ab46..00000000
--- a/platform/lpc43xx/include/platform/lpc43xx-spifi.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (c) 2015 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-#define SPIFI_CTRL		0x40003000 // Control
-#define SPIFI_CMD		0x40003004 // Command
-#define SPIFI_ADDR		0x40003008 // Address
-#define SPIFI_IDATA		0x4000300C // Intermediate Data
-#define SPIFI_CLIMIT		0x40003010 // Cache Limit
-#define SPIFI_DATA		0x40003014 // Data
-#define SPIFI_MCMD		0x40003018 // Memory Command
-#define SPIFI_STAT		0x4000301C // Status
-
-#define CTRL_TIMEOUT(n)		((n) & 0xFFFF)
-#define CTRL_CSHIGH(n)		(((n) & 0xF) << 16) // Minimum /CS high time (serclks - 1)
-#define CTRL_D_PRFTCH_DIS	(1 << 21) // Disable Prefetch of Data
-#define CTRL_INTEN		(1 << 22) // Enable IRQ on end of command
-#define CTRL_MODE3		(1 << 23) // 0=SCK low after +edge of last bit, 1=high
-#define CTRL_PRFTCH_DIS		(1 << 27) // Disable Prefetch
-#define CTRL_DUAL		(1 << 28) // 0=Quad 1=Dual (bits in "wide" ops)
-#define CTRL_QUAD		(0 << 28)
-#define CTRL_RFCLK		(1 << 29) // 1=sample read data on -edge clock
-#define CTRL_FBCLK		(1 << 30) // use feedback clock from SCK pin for sampling
-#define CTRL_DMAEN		(1 << 31) // enable DMA request output
-
-#define CMD_DATALEN(n)		((n) & 0x3FFF)
-#define CMD_POLL		(1 << 14) // if set, read byte repeatedly until condition
-#define CMD_POLLBIT(n)		((n) & 7) // which bit# to check
-#define CMD_POLLSET		(1 << 3)  // condition is bit# set
-#define CMD_POLLCLR		(0 << 3)  // condition is bit# clear
-#define CMD_DOUT		(1 << 15) // 1=data phase output, 0=data phase input
-#define CMD_DIN			(0 << 15)
-#define CMD_INTLEN(n)		(((n) & 7) << 16) // count of intermediate bytes
-#define CMD_FF_SERIAL		(0 << 19) // all command fields serial
-#define CMD_FF_WIDE_DATA	(1 << 19) // data is wide, all other fields serial
-#define CMD_FF_SERIAL_OPCODE	(2 << 19) // opcode is serial, all other fields wide
-#define CMD_FF_WIDE		(3 << 19) // all command fields wide
-#define CMD_FR_OP		(1 << 21) // frame format: opcode only
-#define CMD_FR_OP_1B		(2 << 21) // opcode, lsb addr
-#define CMD_FR_OP_2B		(3 << 21) // opcode, 2 lsb addr
-#define CMD_FR_OP_3B		(4 << 21) // opcode, 3 lsb addr
-#define CMD_FR_OP_4B		(5 << 21) // opcode, 4b address
-#define CMD_FR_3B		(6 << 21) // 3 lsb addr
-#define CMD_FR_4B		(7 << 21) // 4 lsb addr
-#define CMD_OPCODE(n)		((n) << 24)
-
-// MCMD register defines CMD for automatic reads
-// Similar to CMD, but
-// DATALEN, POLL, DOUT must be 0
-
-#define STAT_MCINIT		(1 << 0) // set on sw write to MCMD, clear on RST, wr(0)
-#define STAT_CMD		(1 << 1) // set when CMD written, clear on CS, RST
-#define STAT_RESET		(1 << 4) // write 1 to abort current txn or memory mode
-#define STAT_INTRQ		(1 << 5) // read IRQ status, wr(1) to clear
-
-// 1. Write ADDR
-// 2. Write CMD
-// 3. Read/Write DATA necessary number of times to transfer DATALEN bytes
-//    (byte/half/word ops move 1/2/4 bytes at a time)
-
diff --git a/platform/lpc43xx/include/platform/lpc43xx-uart.h b/platform/lpc43xx/include/platform/lpc43xx-uart.h
deleted file mode 100644
index 26a7ea10..00000000
--- a/platform/lpc43xx/include/platform/lpc43xx-uart.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Copyright (c) 2015 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-#define UART0_BASE	0x40081000
-#define UART1_BASE	0x40082000
-#define UART2_BASE	0x400C1000
-#define UART3_BASE	0x400C2000
-
-#define REG_RBR		0x00 // RO Recv Buffer       (DLAB==0)
-#define REG_THR		0x00 // WO Xmit Holding      (DLAB==0)
-#define REG_IER		0x04 // RW Interrupt Enable  (DLAB==0)
-#define REG_DLL		0x00 // RW Divisor Latch LSB (DLAB==1)
-#define REG_DLM		0x04 // RW Divisor Latch MSB (DLAB==1)
-#define REG_IIR		0x08 // RO Interrupt ID
-#define REG_FCR		0x08 // WO Fifo Control
-#define REG_LCR		0x0C // RW Line Control
-#define REG_MCR		0x10 // RW Modem Control (UART1 only)
-#define REG_LSR		0x14 // RO Line Status
-#define REG_MSR		0x18 // RO Modem Status (UART1 only)
-#define REG_SCR		0x1C // RW Scratcpad (no hw use)
-#define REG_ACR		0x20 // RW Auto-baud Control
-#define REG_ICR		0x24 // RW IrDA Control
-#define REG_FDR		0x28 // RW Fractional Divider
-#define REG_OSR		0x2C // RW Oversampling (REG0/2/3 only)
-
-#define IER_RBRIE	(1 << 0) // enable receive data avail
-#define IER_THREIE	(1 << 1) // enable THRE irq
-#define IER_RXIE	(1 << 2) // enable RX Line Status IRQs
-
-#define IIR_INTSTATUS	(1 << 0) // 0=IRQ Pending
-#define IIR_INTID_MASK	(3 << 1)
-#define IIR_INTID_RLS	(3 << 1) // Receive Line Status
-				 // Cleared on LSR Read
-#define IIR_INTID_RDA	(2 << 1) // Receive Data Available
-				 // Cleared when FIFO < trigger level
-#define IIR_INTID_CTI	(6 << 1) // Character Timeout
-				 // data in FIFO, and 3.5-4.5 char times idle
-#define IIR_INTID_THRE	(1 << 1) // Transmit Holding Register Empty
-#define IIR_INTID_NONE	(0 << 1)
-
-#define FCR_FIFOEN	(1 << 0) // enable FIFO
-#define FCR_RXFIFORES	(1 << 1) // RX FIFO reset
-#define FCR_TXFIFORES	(1 << 2) // TX FIFO reset
-#define FCR_DMAMODE	(1 << 3) // select DMA mode
-#define FCR_RX_TRIG_1	(0 << 6) // RX Trigger at 1 byte
-#define FCR_RX_TRIG_4	(1 << 6) // RX Trigger at 4 bytes
-#define FCR_RX_TRIG_8	(2 << 6) // RX Trigger at 8 bytes
-#define FCR_RX_TRIG_14	(3 << 6) // RX Trigger at 14 bytes
-
-#define LCR_WLS_5	(0 << 0) // 5bit character
-#define LCR_WLS_6	(1 << 0) // 6bit character
-#define LCR_WLS_7	(2 << 0) // 7bit character
-#define LCR_WLS_8	(3 << 0) // 8bit character
-#define LCR_SBS_1	(0 << 2) // 1 stop bit
-#define LCR_SBS_2	(1 << 2) // 2 stop bits
-#define LCR_PE		(1 << 3) // parity enable
-#define LCR_PS_ODD	(0 << 4) // odd parity
-#define LCR_PS_EVEN	(1 << 4) // even parity
-#define LCR_PS_HIGH	(2 << 4) // always-1 parity
-#define LCR_PS_LOW	(3 << 4) // always-0 parity
-#define LCR_BC		(1 << 6) // enable break transmission
-#define LCR_DLAB	(1 << 7) // enable access to divisor latches
-
-#define LSR_RDR		(1 << 0) // receiver data ready
-#define LSR_OE		(1 << 1) // overrun error (fifo was full, character lost)
-#define LSR_PE		(1 << 2) // parity error (top of fifo)
-#define LSR_FE		(1 << 3) // framing error (top of fifo)
-#define LSR_BI		(1 << 4) // break interrupt
-#define LSR_THRE	(1 << 5) // transmit holding register empty
-#define LSR_TEMT	(1 << 6) // transmitter empty
-#define LSR_RXFE	(1 << 7) // error in RX FIFO
-#define LSR_TXERR	(1 << 8) // NACK received in smart card mode
-
-#define FDR_DIVADDVAL(n) ((n) & 0xF)
-#define FDR_MULVAL(n) (((n) & 0xF) << 4)
-
-// baud rate selection:
-//
-// PCLK / ( 16 * ( 256 * DLM + DLL ) * ( 1 + ( DivAddVal / MulVal ) )
-//
-// 1 <= MulVal <= 15            DivAddVal == 0  -> Disables Frac Divider
-// 0 <= DivAddVal <= 14
-// DivAddVal < MulVal
-
-
-#define OSR_OSFRAC(n)	(((n) & 0x3) << 1) // fractional part
-#define OSR_OSINT(n)	(((n) & 0xF) << 4) // integer part - 1
-
-// oversampling rate = OsInt + 1 + ( 1/8 * OsFrac)   (default is 16)
-
-
diff --git a/platform/lpc43xx/include/platform/lpc43xx-usb.h b/platform/lpc43xx/include/platform/lpc43xx-usb.h
deleted file mode 100644
index d8cb0ac0..00000000
--- a/platform/lpc43xx/include/platform/lpc43xx-usb.h
+++ /dev/null
@@ -1,209 +0,0 @@
-/*
- * Copyright (c) 2015 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-#define USB0_BASE		0x40006000
-
-#define USB_CMD			0x140
-#define USB_STS			0x144
-#define USB_INTR		0x148
-#define USB_FRINDEX		0x14C
-#define USB_DEVICEADDR		0x154
-#define USB_ENDPOINTLISTADDR 	0x158
-#define USB_BURSTSIZE		0x160
-#define USB_ENDPTNAK		0x178
-#define USB_ENDPTNAKEN		0x17C
-#define USB_PORTSC1		0x184
-#define USB_OTGSC		0x1A4
-#define USB_MODE		0x1A8
-#define USB_ENDPTSETUPSTAT	0x1AC
-#define USB_ENDPTPRIME		0x1B0
-#define USB_ENDPTFLUSH		0x1B4
-#define USB_ENDPTSTAT		0x1B8
-#define USB_ENDPTCOMPLETE	0x1BC
-#define USB_ENDPTCTRL(n)	(0x1C0 + (n) * 4)
-
-
-#define CMD_RUN			(1 << 0) // initiate attach
-#define CMD_STOP		(0 << 0) // detach
-#define CMD_RST			(1 << 1) // reset controller, raz when done
-#define CMD_SUTW		(1 << 13) // SetUp TripWire
-#define CMD_ATDTW		(1 << 14) // Add TD TripWire
-#define CMD_ITC_0		(0 << 16) // IRQ Threshold Immediate
-#define CMD_ITC_1		(1 << 16) // 1 microframe
-#define CMD_ITC_2		(2 << 16) // 2 microframes
-#define CMD_ITC_8		(8 << 16) // 8 microframes
-#define CMD_ITC_16		(16 << 16) // 16 microframes
-#define CMD_ITC_32		(32 << 16) // 32 microframes
-#define CMD_ITC_64		(64 << 16) // 64 microframes
-
-#define STS_UI			(1 << 0) // USB Interrupt (WtC)
-#define STS_UEI			(1 << 1) // USB Error IRQ (WtC)
-#define STS_PCI			(1 << 2) // Port Change Detect (WtC)
-#define STS_SEI			(1 << 4) // System Error (fatal, reset)
-#define STS_URI			(1 << 6) // USB Reset (WtC)
-#define STS_SRI			(1 << 7) // SOF Received (WtC)
-#define STS_SLI			(1 << 8) // DC Suspend (WtC)
-#define STS_NAKI		(1 << 16) // 1 when EPT NAK bits set
-
-#define INTR_UE			(1 << 0) // USB Interrupt Enable
-#define INTR_UEE		(1 << 1) // USB Error IRQ Enable
-#define INTR_PCE		(1 << 2) // Port Change Detect IRQ Enable
-#define INTR_SEE		(1 << 4) // System Error IRQ Enable
-#define INTR_URE		(1 << 6) // USB Reset IRQ Enable
-#define INTR_SRE		(1 << 7) // SOF Received IRQ Enable
-#define INTR_SLE		(1 << 8) // DC Suspend IRQ Enable
-#define INTR_NAKE		(1 << 16) // NAK IRQ Enable
-
-#define PORTSC1_CCS		(1 << 0) // device is attached
-#define PORTSC1_PE		(1 << 2) // port enable (always 1)
-#define PORTSC1_PEC		(1 << 3) // always 0
-#define PORTSC1_FPR		(1 << 6) // force port resume
-#define PORTSC1_SUSP		(1 << 7) // ro: 1 = port suspended
-#define PORTSC1_RC		(1 << 8) // ro: 1 = port in reset
-#define PORTSC1_HSP		(1 << 9) // ro: 1 = port in high-speed
-#define PORTSC1_PFSC		(1 << 24) // 1 = force full-speed only
-
-#define OTG_VD			(1 << 0)  // vbus discharge
-#define OTG_VC			(1 << 1)  // vbus charge
-#define OTG_HAAR		(1 << 2)  // hardware assist auto-reset
-#define OTG_OT			(1 << 3)  // OTG termination
-#define OTG_DP			(1 << 4)  // data pulsing
-#define OTG_IDPU		(1 << 5)  // ID pull-up
-#define OTG_HADP		(1 << 6)  // hardware assist data pulse
-#define OTG_HABA		(1 << 7)  // hardware assist B-dis to A-con
-#define OTG_ID			(1 << 8)  // 0 = A-device, 1 = B-device
-#define OTG_AVV			(1 << 9)  // A-VBUS Valid
-#define OTG_ASV			(1 << 10) // A-Session Valid
-#define OTG_BSV			(1 << 11) // B-Session Valid
-#define OTG_BSE			(1 << 12) // B-Session End
-#define OTG_MS1T		(1 << 13) // 1ms Timer Toggle
-#define OTG_DPS			(1 << 14) // 1 = data pulsing detected
-#define OTG_IDIS		(1 << 16) // irq status bits (r/wc)
-#define OTG_AVVIS		(1 << 17)
-#define OTG_ASVIS		(1 << 18)
-#define OTG_BSVIS		(1 << 19)
-#define OTG_BSEIS		(1 << 20)
-#define OTG_MS1S		(1 << 21)
-#define OTG_DPIS		(1 << 22)
-#define OTG_IDIE		(1 << 24) // irq enable bits (rw)
-#define OTG_AVVIE		(1 << 25)
-#define OTG_ASVIE		(1 << 26)
-#define OTG_BSVIE		(1 << 27)
-#define OTG_BSEIE		(1 << 28)
-#define OTG_MS1E		(1 << 29)
-#define OTG_DPIE		(1 << 30)
-
-//#define MODE_MASK		3
-#define MODE_IDLE		0 // write once to enter device/host mode
-#define MODE_DEVICE		2 // must reset to idle to change mode
-#define MODE_HOST		3 // nust reset to idle to change mode
-#define MODE_ES			(1 << 2) // select big endian
-#define MODE_SLOM		(1 << 3) // enable setup lockout mode
-#define MODE_SDIS		(1 << 4) // enable stream disable mode
-
-// bits for ENDPTCTRL(n)
-#define EPCTRL_RXS		(1 << 0) // rx ept stall
-#define EPCTRL_RX_CTRL		(0 << 2)
-#define EPCTRL_RX_ISOC		(1 << 2)
-#define EPCTRL_RX_BULK		(2 << 2)
-#define EPCTRL_RX_INTR		(3 << 2)
-#define EPCTRL_RXR		(1 << 6) // tx data toggle reset
-#define EPCTRL_RXE		(1 << 7) // rx ept enable
-#define EPCTRL_TXS		(1 << 16) // tx ept stall
-#define EPCTRL_TX_CTRL		(0 << 18)
-#define EPCTRL_TX_ISOC		(1 << 18)
-#define EPCTRL_TX_BULK		(2 << 18)
-#define EPCTRL_TX_INTR		(3 << 18)
-#define EPCTRL_TXR		(1 << 22) // tx data toggle reset
-#define EPCTRL_TXE		(1 << 23) // rx ept enable
-// Do not leave unconfigured endpoints as CTRL when enabling
-// their sibling, or data PID tracking will be undefined
-
-// bits for all other ENDPT* registers
-#define EP0_RX			(1 << 0)
-#define EP1_RX			(1 << 1)
-#define EP2_RX			(1 << 2)
-#define EP3_RX			(1 << 3)
-#define EP4_RX			(1 << 4)
-#define EP5_RX			(1 << 5)
-#define EP0_TX			(1 << 16)
-#define EP1_TX			(1 << 17)
-#define EP2_TX			(1 << 18)
-#define EP3_TX			(1 << 19)
-#define EP4_TX			(1 << 20)
-#define EP5_TX			(1 << 21)
-
-#define EPT_TX(n) (1 << ((n) + 16))
-#define EPT_RX(n) (1 << (n))
-
-#define DQH_MULT0		(0 << 30) // non-iscoh
-#define DQH_MULT1		(1 << 30) // 1 txn per td
-#define DQH_MULT2		(2 << 30) // 2 txn per td
-#define DQH_MULT3		(3 << 30) // 3 txn per td
-#define DQH_CFG_ZLT		(1 << 29) // disable zero-length terminate
-#define DQH_CFG_MAXPKT(n)	((n) << 16) // <= 1024
-#define DQH_CFG_IOS		(1 << 15) // IRQ on SETUP
-
-#define DTD_LEN(n)		((n) << 16)
-#define DTD_IOC			(1 << 15) // interrupt on complete
-#define DTD_MULT0		(0 << 10)
-#define DTD_MULT1		(1 << 10)
-#define DTD_MULT2		(2 << 10)
-#define DTD_MULT3		(3 << 10)
-#define DTD_STS_MASK		0xE8
-#define DTD_ACTIVE		0x80
-#define DTD_HALTED		0x40
-#define DTD_BUF_ERR		0x20
-#define DTD_TXN_ERR		0x08
-
-typedef struct usb_dtd {
-	u32 next_dtd;
-	u32 config;
-	u32 bptr0;
-	u32 bptr1;
-	u32 bptr2;
-	u32 bptr3;
-	u32 bptr4;
-	struct usb_dtd *next;
-} usb_dtd_t;
-
-typedef struct usb_dqh {
-	u32 config;
-	u32 current_dtd;
-	u32 next_dtd;
-	u32 dtd_config;
-	u32 dtd_bptr0;
-	u32 dtd_bptr1;
-	u32 dtd_bptr2;
-	u32 dtd_bptr3;
-	u32 dtd_bptr4;
-	u32 dtd_rsvd0;
-	u32 setup0;
-	u32 setup1;
-	u32 rsvd1;
-	u32 rsvd2;
-	u32 rsvd3;
-	u32 rsvd4;
-} usb_dqh_t;
diff --git a/platform/lpc43xx/include/platform/platform_cm.h b/platform/lpc43xx/include/platform/platform_cm.h
deleted file mode 100644
index 8e92b78b..00000000
--- a/platform/lpc43xx/include/platform/platform_cm.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Copyright (c) 2015 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#pragma once
-
-#define __CM4_REV		1
-#define __MPU_PRESENT		1
-#define __NVIC_PRIO_BITS	3
-#define __Vendor_SysTickConfig	0
-#define __FPU_PRESENT		1
-
-#define DEFIRQ(x) x##_IRQn,
-typedef enum {
-	Reset_IRQn = -15,
-	NonMaskableInt_IRQn = -14,
-	HardFault_IRQn = -13,
-	MemoryManagement_IRQn = -12,
-	BusFault_IRQn = -11,
-	UsageFault_IRQn = -10,
-	SVCall_IRQn = -5,
-	DebugMonitor_IRQn = -4,
-	PendSV_IRQn = -2,
-	SysTick_IRQn = -1,
-#include <platform/defirq.h>
-} IRQn_Type;
-#undef DEFIRQ
-
diff --git a/platform/lpc43xx/init.c b/platform/lpc43xx/init.c
deleted file mode 100644
index 2877a031..00000000
--- a/platform/lpc43xx/init.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * Copyright (c) 2015 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <debug.h>
-#include <arch/arm/cm.h>
-#include <kernel/thread.h>
-#include <platform.h>
-
-#include <platform/lpc43xx-clocks.h>
-
-void lpc43xx_debug_early_init(void);
-void lpc43xx_debug_init(void);
-
-uint8_t __lpc43xx_main_clock_sel;
-uint32_t __lpc43xx_main_clock_mhz;
-
-void platform_early_init(void)
-{
-#ifndef WITH_NO_CLOCK_INIT
-    unsigned cfg;
-    // Different boot modes will enable different sets of clocks.
-    // To keep it simple, we drop back to the 12MHz internal osc,
-    // power down the other clocks, and bring things back up in an
-    // orderly fashion.  This costs a few hundred microseconds.
-
-    // switch CPU clock to 12MHz internal osc
-    writel(readl(BASE_M4_CLK) | BASE_AUTOBLOCK, BASE_M4_CLK);
-    writel(BASE_CLK_SEL(CLK_IRC) | BASE_AUTOBLOCK, BASE_M4_CLK);
-
-    // Disable PLL1, if it was already running
-    writel(PLL1_CTRL_PD, PLL1_CTRL);
-
-    // Disable PLL0USB, if it was already running
-    writel(PLL0_CTRL_PD, PLL0USB_CTRL);
-
-    // Disable XTAL osc if it was already running
-    writel(readl(XTAL_OSC_CTRL) | 1, XTAL_OSC_CTRL);
-    // Disable BYPASS or HF modes:
-    writel(1, XTAL_OSC_CTRL);
-    // Enable, HF=0 BYPASS=0
-    writel(0, XTAL_OSC_CTRL);
-    // Wait
-    spin_cycles(3000); // 250uS @ 12MHz
-
-    // PLL1: 12MHz -> N=(/2) -> M=(x32) -> P=(/2)   96MHz
-    cfg = PLL1_CTRL_NSEL_2 | PLL1_CTRL_PSEL_1 | PLL1_CTRL_MSEL(32) |
-          PLL1_CTRL_CLK_SEL(CLK_XTAL) | PLL1_CTRL_AUTOBLOCK;
-    writel(cfg, PLL1_CTRL);
-    while (!(readl(PLL1_STAT) & PLL1_STAT_LOCK)) ;
-
-    writel(BASE_CLK_SEL(CLK_PLL1) | BASE_AUTOBLOCK, BASE_M4_CLK);
-
-    // when moving from < 90 MHz to > 110MHz, must spend 50uS
-    // at 90-110MHz before shifting to high speeds
-    spin_cycles(4800); // 50uS @ 96MHz
-
-    // disable P divider  192MHz
-    writel(cfg | PLL1_CTRL_DIRECT, PLL1_CTRL);
-
-    // 12MHz -> 480MHz settings, per boot rom
-    writel(0x01967FFA, PLL0USB_MDIV);
-    writel(0x00302062, PLL0USB_NP_DIV);
-    // Enable PLL, wait for lock
-    cfg = PLL0_CTRL_CLK_SEL(CLK_XTAL) | PLL0_CTRL_DIRECTO | PLL0_CTRL_AUTOBLOCK;
-    writel(cfg, PLL0USB_CTRL);
-    while (!(readl(PLL0USB_STAT) & PLL0_STAT_LOCK)) ;
-    // Enable clock output
-    writel(cfg | PLL0_CTRL_CLKEN, PLL0USB_CTRL);
-
-#if 0
-    // route PLL1 / 2 to CLK0 pin for verification
-    writel(0x11, 0x40086C00); // CLK0 = CLK_OUT, no PU/PD
-    writel(IDIV_CLK_SEL(CLK_PLL1) | IDIV_N(2), IDIVE_CTRL);
-    writel(BASE_CLK_SEL(CLK_IDIVE), BASE_OUT_CLK);
-#endif
-#if 0
-    // route PLL0USB / 4 to CLK0 pin for verification
-    writel(0x11, 0x40086C00); // CLK0 = CLK_OUT, no PU/PD
-    writel(IDIV_CLK_SEL(CLK_PLL0USB) | IDIV_N(4), IDIVA_CTRL);
-    writel(BASE_CLK_SEL(CLK_IDIVA), BASE_OUT_CLK);
-#endif
-    __lpc43xx_main_clock_mhz = 192000000;
-    __lpc43xx_main_clock_sel = CLK_PLL1;
-#else
-    __lpc43xx_main_clock_mhz = 96000000;
-    __lpc43xx_main_clock_sel = CLK_IDIVC;
-#endif
-    arm_cm_systick_init(__lpc43xx_main_clock_mhz);
-    lpc43xx_debug_early_init();
-}
-
-void lpc43xx_usb_init(u32 dmabase, size_t dmasize);
-
-void platform_init(void)
-{
-    lpc43xx_debug_init();
-    lpc43xx_usb_init(0x20000000, 4096);
-}
-
-void platform_halt(platform_halt_action suggested_action,
-                   platform_halt_reason reason)
-{
-    arch_disable_ints();
-    if (suggested_action == HALT_ACTION_REBOOT) {
-        // CORE reset
-        writel(1, 0x40053100);
-    } else {
-        dprintf(ALWAYS, "HALT: spinning forever... (reason = %d)\n", reason);
-    }
-    for (;;);
-}
diff --git a/platform/lpc43xx/rules.mk b/platform/lpc43xx/rules.mk
deleted file mode 100644
index d5d5c4e9..00000000
--- a/platform/lpc43xx/rules.mk
+++ /dev/null
@@ -1,42 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-ROMBASE ?= 0x10000000
-MEMBASE ?= 0x10080000
-MEMSIZE ?= 40960
-
-ARCH := arm
-ARM_CPU := cortex-m4
-
-GLOBAL_DEFINES += \
-	MEMSIZE=$(MEMSIZE)
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/init.c \
-	$(LOCAL_DIR)/gpio.c \
-	$(LOCAL_DIR)/vectab.c \
-	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/udc.c \
-	$(LOCAL_DIR)/udc-common.c
-
-LINKER_SCRIPT += \
-	$(BUILDDIR)/system-twosegment.ld
-
-MODULE_DEPS += \
-	arch/arm/arm-m/systick \
-	lib/cbuf
-
-LPCSIGNEDBIN := $(OUTBIN).sign
-LPCCHECK := $(LKROOT)/platform/lpc15xx/lpccheck.py
-EXTRA_BUILDDEPS += $(LPCSIGNEDBIN)
-GENERATED += $(LPCSIGNEDBIN)
-
-$(LPCSIGNEDBIN): $(OUTBIN) $(LPCCHECK)
-	@$(MKDIR)
-	$(NOECHO)echo generating $@; \
-	cp $< $@.tmp; \
-	$(LPCCHECK) $@.tmp; \
-	mv $@.tmp $@
-
-include make/module.mk
diff --git a/platform/lpc43xx/udc-common.c b/platform/lpc43xx/udc-common.c
deleted file mode 100644
index bed4e5ad..00000000
--- a/platform/lpc43xx/udc-common.c
+++ /dev/null
@@ -1,188 +0,0 @@
-/*
- * Copyright (c) 2015 Brian Swetland
- * Copyright (c) 2008 Google, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <malloc.h>
-#include <stdio.h>
-#include <string.h>
-#include <dev/udc.h>
-
-#include "udc-common.h"
-
-static udc_descriptor_t *udc_descriptor_alloc(unsigned type, unsigned num, unsigned len)
-{
-    struct udc_descriptor *desc;
-    if ((len > 255) || (len < 2) || (num > 255) || (type > 255))
-        return 0;
-
-    if (!(desc = malloc(sizeof(struct udc_descriptor) + len)))
-        return 0;
-
-    desc->next = 0;
-    desc->tag = (type << 8) | num;
-    desc->len = len;
-    desc->data[0] = len;
-    desc->data[1] = type;
-
-    return desc;
-}
-
-static udc_descriptor_t langid_list = {
-    .tag = 0x0300,
-    .len = 4,
-    .data = { 0x04, TYPE_STRING, 0x09, 0x04 }, // EN_US
-};
-
-static struct udc_descriptor *desc_list = &langid_list;
-static unsigned next_string_id = 1;
-
-udc_descriptor_t *udc_descriptor_find(unsigned tag)
-{
-    udc_descriptor_t *desc = desc_list;
-    while (desc != NULL) {
-        if (desc->tag == tag) {
-            return desc;
-        }
-        desc = desc->next;
-    }
-    printf("cant find %08x\n", tag);
-    return NULL;
-}
-
-static void udc_descriptor_register(struct udc_descriptor *desc)
-{
-    desc->next = desc_list;
-    desc_list = desc;
-}
-
-static unsigned udc_string_desc_alloc(const char *str)
-{
-    unsigned len;
-    struct udc_descriptor *desc;
-    unsigned char *data;
-
-    if (next_string_id > 255)
-        return 0;
-
-    if (!str)
-        return 0;
-
-    len = strlen(str);
-    desc = udc_descriptor_alloc(TYPE_STRING, next_string_id, len * 2 + 2);
-    if (!desc)
-        return 0;
-    next_string_id++;
-
-    /* expand ascii string to utf16 */
-    data = desc->data + 2;
-    while (len-- > 0) {
-        *data++ = *str++;
-        *data++ = 0;
-    }
-
-    udc_descriptor_register(desc);
-    return desc->tag & 0xff;
-}
-
-
-static unsigned udc_ifc_desc_size(udc_gadget_t *g)
-{
-    return 9 + g->ifc_endpoints * 7;
-}
-
-static void udc_ifc_desc_fill(udc_gadget_t *g, unsigned ifcn, unsigned char *data)
-{
-    unsigned n;
-
-    data[0] = 0x09;
-    data[1] = TYPE_INTERFACE;
-    data[2] = ifcn; // ifc number
-    data[3] = 0x00; // alt number
-    data[4] = g->ifc_endpoints;
-    data[5] = g->ifc_class;
-    data[6] = g->ifc_subclass;
-    data[7] = g->ifc_protocol;
-    data[8] = udc_string_desc_alloc(g->ifc_string);
-
-    data += 9;
-    for (n = 0; n < g->ifc_endpoints; n++) {
-        udc_ept_desc_fill(g->ept[n], data);
-        data += 7;
-    }
-}
-
-void udc_create_descriptors(udc_device_t *device, udc_gadget_t *gadgetlist)
-{
-    udc_descriptor_t *desc;
-    udc_gadget_t *gadget;
-    unsigned size;
-    uint8_t *data, *p;
-    uint8_t n;
-
-    // create our device descriptor
-    desc = udc_descriptor_alloc(TYPE_DEVICE, 0, 18);
-    data = desc->data;
-    data[2] = 0x00; // usb spec rev 2.00
-    data[3] = 0x02;
-    data[4] = 0x00; // class
-    data[5] = 0x00; // subclass
-    data[6] = 0x00; // protocol
-    data[7] = 0x40; // max packet size on ept 0
-    data[8] = device->vendor_id;
-    data[9] = device->vendor_id >> 8;
-    data[10] = device->product_id;
-    data[11] = device->product_id >> 8;
-    data[12] = device->version_id;
-    data[13] = device->version_id >> 8;
-    data[14] = udc_string_desc_alloc(device->manufacturer);
-    data[15] = udc_string_desc_alloc(device->product);
-    data[16] = udc_string_desc_alloc(device->serialno);
-    data[17] = 1; // number of configurations
-    udc_descriptor_register(desc);
-
-    // create our configuration descriptor
-    size = 9;
-    n = 0;
-    for (gadget = gadgetlist; gadget; gadget = gadget->next) {
-        size += udc_ifc_desc_size(gadget);
-        n++;
-    }
-    desc = udc_descriptor_alloc(TYPE_CONFIGURATION, 0, size);
-    data = desc->data;
-    data[0] = 0x09;
-    data[2] = size;
-    data[3] = size >> 8;
-    data[4] = n; // number of interfaces
-    data[5] = 0x01; // configuration value
-    data[6] = 0x00; // configuration string
-    data[7] = 0x80; // attributes
-    data[8] = 0x80; // max power (250ma) -- todo fix this
-
-    n = 0;
-    p = data + 9;
-    for (gadget = gadgetlist; gadget; gadget = gadget->next) {
-        udc_ifc_desc_fill(gadget, n++, p);
-        p += udc_ifc_desc_size(gadget);
-    }
-    udc_descriptor_register(desc);
-}
diff --git a/platform/lpc43xx/udc-common.h b/platform/lpc43xx/udc-common.h
deleted file mode 100644
index fd83ae07..00000000
--- a/platform/lpc43xx/udc-common.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * Copyright (c) 2015 Brian Swetland
- * Copyright (c) 2008 Google, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __PRIVATE_UDC_H__
-#define __PRIVATE_UDC_H__
-
-#define GET_STATUS           0
-#define CLEAR_FEATURE        1
-#define SET_FEATURE          3
-#define SET_ADDRESS          5
-#define GET_DESCRIPTOR       6
-#define SET_DESCRIPTOR       7
-#define GET_CONFIGURATION    8
-#define SET_CONFIGURATION    9
-#define GET_INTERFACE        10
-#define SET_INTERFACE        11
-#define SYNCH_FRAME          12
-#define SET_SEL              48
-
-#define TYPE_DEVICE          1
-#define TYPE_CONFIGURATION   2
-#define TYPE_STRING          3
-#define TYPE_INTERFACE       4
-#define TYPE_ENDPOINT        5
-#define TYPE_BOS             15
-#define TYPE_DEVICE_CAP      16
-#define TYPE_SS_EP_COMP      48
-
-#define DEVICE_READ          0x80
-#define DEVICE_WRITE         0x00
-#define INTERFACE_READ       0x81
-#define INTERFACE_WRITE      0x01
-#define ENDPOINT_READ        0x82
-#define ENDPOINT_WRITE       0x02
-
-typedef struct udc_descriptor udc_descriptor_t;
-
-union setup_packet {
-    struct {
-        uint8_t type;
-        uint8_t request;
-        uint16_t value;
-        uint16_t index;
-        uint16_t length;
-    };
-    struct {
-        uint32_t w0;
-        uint32_t w1;
-    };
-} __attribute__ ((packed));
-
-struct udc_descriptor {
-    udc_descriptor_t *next;
-    uint16_t tag; /* ((TYPE << 8) | NUM) */
-    uint16_t len; /* total length */
-    uint8_t data[4];
-};
-
-// driver calls this to build descriptors from device and gadgets
-void udc_create_descriptors(udc_device_t *device, udc_gadget_t *gadget);
-
-// driver uses this to obtain descriptors
-udc_descriptor_t *udc_descriptor_find(unsigned tag);
-
-// driver provides this
-void udc_ept_desc_fill(udc_endpoint_t *ept, unsigned char *data);
-
-#endif
diff --git a/platform/lpc43xx/udc.c b/platform/lpc43xx/udc.c
deleted file mode 100644
index fd3d9321..00000000
--- a/platform/lpc43xx/udc.c
+++ /dev/null
@@ -1,648 +0,0 @@
-/*
- * Copyright (c) 2015 Brian Swetland
- * Copyright (c) 2008 Google, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <string.h>
-#include <stdlib.h>
-#include <printf.h>
-#include <assert.h>
-#include <debug.h>
-#include <reg.h>
-#include <arch/arm/cm.h>
-#include <kernel/thread.h>
-#include <kernel/spinlock.h>
-
-#include <platform/lpc43xx-usb.h>
-static_assert(sizeof(usb_dqh_t) == 64);
-static_assert(sizeof(usb_dtd_t) == 32);
-
-#include <dev/udc.h>
-
-#include "udc-common.h"
-
-#define F_LL_INIT   1
-#define F_UDC_INIT  2
-
-// NOTE: I cheat a bit with the locking because this is a UP Cortex-M
-// NOTE: device.  I use spinlocks for code that might be called from
-// NOTE: userspace or irq context, but for the irq-only code I don't
-// NOTE: bother with locking because it's impossible for it to execute
-// NOTE: while the lock is held from userspace.
-
-typedef struct {
-    u32 base;
-    spin_lock_t lock;
-
-    usb_dqh_t *qh;
-    usb_dtd_t *dtd_freelist;
-
-    udc_endpoint_t *ep0in;
-    udc_endpoint_t *ep0out;
-    udc_request_t *ep0req;
-    u8 txd[8];
-    u8 rxd[8];
-
-    udc_endpoint_t *ept_list;
-    uint8_t online;
-    uint8_t highspeed;
-    uint8_t config_value;
-    uint8_t flags;
-
-    udc_device_t *device;
-    udc_gadget_t *gadget;
-
-    uint32_t ept_alloc_table;
-} usb_t;
-
-static usb_t USB;
-
-typedef struct usb_request {
-    udc_request_t req;
-    struct usb_request *next;
-    usb_dtd_t *dtd;
-} usb_request_t;
-
-struct udc_endpoint {
-    udc_endpoint_t *next;
-    usb_dqh_t *head;
-    usb_request_t *req;
-    usb_request_t *last;
-    usb_t *usb;
-    uint32_t bit;
-    uint16_t maxpkt;
-    uint8_t num;
-    uint8_t in;
-};
-
-// ---- endpoint management
-
-#if 1
-#define DBG(x...) do {} while(0)
-#else
-#define DBG(x...) dprintf(INFO, x)
-#endif
-
-static udc_endpoint_t *_udc_endpoint_alloc(usb_t *usb,
-        unsigned num, unsigned in, unsigned max_pkt)
-{
-    udc_endpoint_t *ept;
-    unsigned cfg;
-
-    ept = malloc(sizeof(*ept));
-    ept->maxpkt = max_pkt;
-    ept->num = num;
-    ept->in = !!in;
-    ept->req = 0;
-    ept->last = 0;
-    ept->usb = usb;
-
-    cfg = DQH_CFG_MAXPKT(max_pkt) | DQH_CFG_ZLT;
-
-    if (ept->in) {
-        ept->bit = EPT_TX(ept->num);
-    } else {
-        ept->bit = EPT_RX(ept->num);
-        if (num == 0) {
-            cfg |= DQH_CFG_IOS;
-        }
-    }
-
-    ept->head = usb->qh + (num * 2) + (ept->in);
-    ept->head->config = cfg;
-    ept->next = usb->ept_list;
-    usb->ept_list = ept;
-
-    DBG("ept%d %s @%p/%p max=%d bit=%x\n",
-        num, in ? "in":"out", ept, ept->head, max_pkt, ept->bit);
-
-    return ept;
-}
-
-udc_endpoint_t *udc_endpoint_alloc(unsigned type, unsigned maxpkt)
-{
-    udc_endpoint_t *ept;
-    unsigned n;
-    unsigned in = !!(type & 0x80);
-
-    if (!(USB.flags & F_UDC_INIT)) {
-        panic("udc_init() must be called before udc_endpoint_alloc()\n");
-    }
-
-    for (n = 1; n < 6; n++) {
-        unsigned bit = in ? EPT_TX(n) : EPT_RX(n);
-        if (USB.ept_alloc_table & bit) {
-            continue;
-        }
-        if ((ept = _udc_endpoint_alloc(&USB, n, in, maxpkt))) {
-            USB.ept_alloc_table |= bit;
-        }
-        return ept;
-    }
-    return 0;
-}
-
-void udc_endpoint_free(struct udc_endpoint *ept)
-{
-    // todo
-}
-
-static void handle_ept_complete(struct udc_endpoint *ept);
-
-static void endpoint_flush(usb_t *usb, udc_endpoint_t *ept)
-{
-    if (ept->req) {
-        // flush outstanding transfers
-        writel(ept->bit, usb->base + USB_ENDPTFLUSH);
-        while (readl(usb->base + USB_ENDPTFLUSH)) ;
-        while (ept->req) {
-            handle_ept_complete(ept);
-        }
-    }
-}
-
-static void endpoint_reset(usb_t *usb, udc_endpoint_t *ept)
-{
-    unsigned n = readl(usb->base + USB_ENDPTCTRL(ept->num));
-    n |= ept->in ? EPCTRL_TXR : EPCTRL_RXR;
-    writel(n, usb->base + USB_ENDPTCTRL(ept->num));
-}
-
-static void endpoint_enable(usb_t *usb, udc_endpoint_t *ept, unsigned yes)
-{
-    unsigned n = readl(usb->base + USB_ENDPTCTRL(ept->num));
-
-    if (yes) {
-        if (ept->in) {
-            n |= (EPCTRL_TXE | EPCTRL_TXR | EPCTRL_TX_BULK);
-        } else {
-            n |= (EPCTRL_RXE | EPCTRL_RXR | EPCTRL_RX_BULK);
-        }
-
-        if (ept->num != 0) {
-            // todo: support non-max-sized packet sizes
-            if (usb->highspeed) {
-                ept->head->config = DQH_CFG_MAXPKT(512) | DQH_CFG_ZLT;
-            } else {
-                ept->head->config = DQH_CFG_MAXPKT(64) | DQH_CFG_ZLT;
-            }
-        }
-    }
-    writel(n, usb->base + USB_ENDPTCTRL(ept->num));
-}
-
-// ---- request management
-
-udc_request_t *udc_request_alloc(void)
-{
-    spin_lock_saved_state_t state;
-    usb_request_t *req;
-    if ((req = malloc(sizeof(*req))) == NULL) {
-        return NULL;
-    }
-
-    spin_lock_irqsave(&USB.lock, state);
-    if (USB.dtd_freelist == NULL) {
-        spin_unlock_irqrestore(&USB.lock, state);
-        free(req);
-        return NULL;
-    } else {
-        req->dtd = USB.dtd_freelist;
-        USB.dtd_freelist = req->dtd->next;
-        spin_unlock_irqrestore(&USB.lock, state);
-
-        req->req.buffer = 0;
-        req->req.length = 0;
-        return &req->req;
-    }
-}
-
-void udc_request_free(struct udc_request *req)
-{
-    // todo: check if active?
-    free(req);
-}
-
-int udc_request_queue(udc_endpoint_t *ept, struct udc_request *_req)
-{
-    spin_lock_saved_state_t state;
-    usb_request_t *req = (usb_request_t *) _req;
-    usb_dtd_t *dtd = req->dtd;
-    unsigned phys = (unsigned) req->req.buffer;
-    int ret = 0;
-
-    dtd->next_dtd = 1; // terminate bit
-    dtd->config = DTD_LEN(req->req.length) | DTD_IOC | DTD_ACTIVE;
-    dtd->bptr0 = phys;
-    phys &= 0xfffff000;
-    dtd->bptr1 = phys + 0x1000;
-    dtd->bptr2 = phys + 0x2000;
-    dtd->bptr3 = phys + 0x3000;
-    dtd->bptr4 = phys + 0x4000;
-
-    req->next = 0;
-    spin_lock_irqsave(&ept->usb->lock, state);
-    if (!USB.online && ept->num) {
-        ret = -1;
-    } else if (ept->req) {
-        // already a transfer in flight, add us to the list
-        // we'll get queue'd by the irq handler when it's our turn
-        ept->last->next = req;
-    } else {
-        ept->head->next_dtd = (unsigned) dtd;
-        ept->head->dtd_config = 0;
-        DSB;
-        writel(ept->bit, ept->usb->base + USB_ENDPTPRIME);
-        ept->req = req;
-    }
-    ept->last = req;
-    spin_unlock_irqrestore(&ept->usb->lock, state);
-
-    DBG("ept%d %s queue req=%p\n", ept->num, ept->in ? "in" : "out", req);
-    return ret;
-}
-
-static void handle_ept_complete(struct udc_endpoint *ept)
-{
-    usb_request_t *req;
-    usb_dtd_t *dtd;
-    unsigned actual;
-    int status;
-
-    DBG("ept%d %s complete req=%p\n",
-        ept->num, ept->in ? "in" : "out", ept->req);
-
-    if ((req = ept->req)) {
-        if (req->next) {
-            // queue next req to hw
-            ept->head->next_dtd = (unsigned) req->next->dtd;
-            ept->head->dtd_config = 0;
-            DSB;
-            writel(ept->bit, ept->usb->base + USB_ENDPTPRIME);
-            ept->req = req->next;
-        } else {
-            ept->req = 0;
-            ept->last = 0;
-        }
-        dtd = req->dtd;
-        if (dtd->config & 0xff) {
-            actual = 0;
-            status = -1;
-            dprintf(INFO, "EP%d/%s FAIL nfo=%x pg0=%x\n",
-                    ept->num, ept->in ? "in" : "out", dtd->config, dtd->bptr0);
-        } else {
-            actual = req->req.length - ((dtd->config >> 16) & 0x7fff);
-            status = 0;
-        }
-        if (req->req.complete) {
-            req->req.complete(&req->req, actual, status);
-        }
-    }
-}
-
-static void setup_ack(usb_t *usb)
-{
-    usb->ep0req->complete = 0;
-    usb->ep0req->length = 0;
-    udc_request_queue(usb->ep0in, usb->ep0req);
-}
-
-static void ep0in_complete(struct udc_request *req, unsigned actual, int status)
-{
-    usb_t *usb = (usb_t *) req->context;
-    DBG("ep0in_complete %p %d %d\n", req, actual, status);
-    if (status == 0) {
-        req->length = 0;
-        req->complete = 0;
-        udc_request_queue(usb->ep0out, req);
-    }
-}
-
-static void setup_tx(usb_t *usb, void *buf, unsigned len)
-{
-    DBG("setup_tx %p %d\n", buf, len);
-    usb->ep0req->buffer = buf;
-    usb->ep0req->complete = ep0in_complete;
-    usb->ep0req->length = len;
-    udc_request_queue(usb->ep0in, usb->ep0req);
-}
-
-static void notify_gadgets(udc_gadget_t *gadget, unsigned event)
-{
-    while (gadget) {
-        if (gadget->notify) {
-            gadget->notify(gadget, event);
-        }
-        gadget = gadget->next;
-    }
-}
-
-#define SETUP(type,request) (((type) << 8) | (request))
-
-static void handle_setup(usb_t *usb)
-{
-    union setup_packet s;
-
-    // setup procedure, per databook
-    // a. clear setup status by writing and waiting for 0 (1-2uS)
-    writel(1, usb->base + USB_ENDPTSETUPSTAT);
-    while (readl(usb->base + USB_ENDPTSETUPSTAT) & 1) ;
-    do {
-        // b. write 1 to tripwire
-        writel(CMD_RUN | CMD_SUTW, usb->base + USB_CMD);
-        // c. extract setup data
-        s.w0 = usb->qh[0].setup0;
-        s.w1 = usb->qh[0].setup1;
-        // d. if tripwire clear, retry
-    } while ((readl(usb->base + USB_CMD) & CMD_SUTW) == 0);
-    // e. clear tripwire
-    writel(CMD_RUN, usb->base + USB_CMD);
-    // flush any pending io from previous setup transactions
-    usb->ep0in->req = 0;
-    usb->ep0out->req = 0;
-    // f. process packet
-    // g. ensure setup status is 0
-
-    DBG("setup 0x%02x 0x%02x %d %d %d\n",
-        s.type, s.request, s.value, s.index, s.length);
-
-    switch (SETUP(s.type,s.request)) {
-        case SETUP(DEVICE_READ, GET_STATUS): {
-            static unsigned zero = 0;
-            if (s.length == 2) {
-                setup_tx(usb, &zero, 2);
-                return;
-            }
-            break;
-        }
-        case SETUP(DEVICE_READ, GET_DESCRIPTOR): {
-            struct udc_descriptor *desc = udc_descriptor_find(s.value);
-            if (desc) {
-                unsigned len = desc->len;
-                if (len > s.length) len = s.length;
-                setup_tx(usb, desc->data, len);
-                return;
-            }
-            break;
-        }
-        case SETUP(DEVICE_READ, GET_CONFIGURATION):
-            if ((s.value == 0) && (s.index == 0) && (s.length == 1)) {
-                setup_tx(usb, &usb->config_value, 1);
-                return;
-            }
-            break;
-        case SETUP(DEVICE_WRITE, SET_CONFIGURATION):
-            if (s.value == 1) {
-                struct udc_endpoint *ept;
-                /* enable endpoints */
-                for (ept = usb->ept_list; ept; ept = ept->next) {
-                    if (ept->num != 0) {
-                        endpoint_enable(usb, ept, 1);
-                    }
-                }
-                usb->config_value = 1;
-                notify_gadgets(usb->gadget, UDC_EVENT_ONLINE);
-            } else {
-                writel(0, usb->base + USB_ENDPTCTRL(1));
-                usb->config_value = 0;
-                notify_gadgets(usb->gadget, UDC_EVENT_OFFLINE);
-            }
-            setup_ack(usb);
-            usb->online = s.value ? 1 : 0;
-            return;
-        case SETUP(DEVICE_WRITE, SET_ADDRESS):
-            // write address delayed (will take effect after the next IN txn)
-            writel(((s.value & 0x7F) << 25) | (1 << 24), usb->base + USB_DEVICEADDR);
-            setup_ack(usb);
-            return;
-        case SETUP(INTERFACE_WRITE, SET_INTERFACE):
-            goto stall;
-        case SETUP(ENDPOINT_WRITE, CLEAR_FEATURE): {
-            udc_endpoint_t *ept;
-            unsigned num = s.index & 15;
-            unsigned in = !!(s.index & 0x80);
-
-            if ((s.value != 0) || (s.length != 0)) {
-                break;
-            }
-            DBG("clr feat %d %d\n", num, in);
-            for (ept = usb->ept_list; ept; ept = ept->next) {
-                if ((ept->num == num) && (ept->in == in)) {
-                    endpoint_flush(usb, ept);
-                    // todo: if callback requeues this could be ugly...
-                    endpoint_reset(usb, ept);
-                    setup_ack(usb);
-                    return;
-                }
-            }
-            break;
-        }
-    }
-
-    dprintf(INFO, "udc: stall %02x %02x %04x %04x %04x\n",
-            s.type, s.request, s.value, s.index, s.length);
-
-stall:
-    writel(EPCTRL_RXS | EPCTRL_TXS, usb->base + USB_ENDPTCTRL(0));
-}
-
-int lpc43xx_usb_init(u32 dmabase, size_t dmasize)
-{
-    usb_t *usb = &USB;
-    printf("usb_init()\n");
-    if ((dmabase & 0x7FF) || (dmasize < 1024)) {
-        return -1;
-    }
-    usb->qh = (void *) dmabase;
-    usb->dtd_freelist = NULL;
-    memset(usb->qh, 0, dmasize);
-    usb->base = USB0_BASE;
-    dmabase += 768;
-    dmasize -= 768;
-    while (dmasize > sizeof(usb_dtd_t)) {
-        usb_dtd_t *dtd = (void *) dmabase;
-        dtd->next = usb->dtd_freelist;
-        usb->dtd_freelist = dtd;
-        dmabase += sizeof(usb_dtd_t);
-        dmasize -= sizeof(usb_dtd_t);
-    }
-    writel(CMD_RST, usb->base + USB_CMD);
-    while (readl(usb->base + USB_CMD) & CMD_RST) ;
-    printf("usb_init(): reset ok\n");
-    thread_sleep(250);
-
-    // enable USB0 PHY via CREG0
-    writel(readl(0x40043004) & (~0x20), 0x40043004);
-
-    writel(MODE_DEVICE | MODE_SLOM, usb->base + USB_MODE);
-
-    // enable termination in OTG control (required for device mode)
-    writel(OTG_OT, usb->base + USB_OTGSC);
-
-    writel((u32) usb->qh, usb->base + USB_ENDPOINTLISTADDR);
-    usb->flags |= F_LL_INIT;
-    return 0;
-}
-
-static void usb_enable(usb_t *usb, int yes)
-{
-    if (yes) {
-        writel(INTR_UE | INTR_UEE | INTR_PCE | INTR_SEE | INTR_URE,
-               usb->base + USB_INTR);
-
-        writel(CMD_RUN, usb->base + USB_CMD);
-        NVIC_EnableIRQ(USB0_IRQn);
-    } else {
-        NVIC_DisableIRQ(USB0_IRQn);
-        writel(CMD_STOP, usb->base + USB_CMD);
-    }
-}
-
-
-void lpc43xx_USB0_IRQ(void)
-{
-    udc_endpoint_t *ept;
-    usb_t *usb = &USB;
-    int ret = 0;
-    unsigned n;
-
-    arm_cm_irq_entry();
-
-    n = readl(usb->base + USB_STS);
-    writel(n, usb->base + USB_STS);
-
-    if (n & STS_URI) {
-        // reset procedure, per databook
-        // 1. clear setup token semaphores
-        writel(readl(usb->base + USB_ENDPTSETUPSTAT),
-               usb->base + USB_ENDPTSETUPSTAT);
-        // 2. clear completion status bits
-        writel(readl(usb->base + USB_ENDPTCOMPLETE),
-               usb->base + USB_ENDPTCOMPLETE);
-        // 3. cancel primed transfers
-        while (readl(usb->base + USB_ENDPTPRIME)) ;
-        writel(0xFFFFFFFF, usb->base + USB_ENDPTFLUSH);
-        // 4. ensure we finished while reset still active
-        if (!(readl(usb->base + USB_PORTSC1) & PORTSC1_RC)) {
-            printf("usb: failed to reset in time\n");
-        }
-        // 5. free active DTDs
-        usb->online = 0;
-        usb->config_value = 0;
-        notify_gadgets(usb->gadget, UDC_EVENT_OFFLINE);
-        for (ept = usb->ept_list; ept; ept = ept->next) {
-            if (ept->req) {
-                ept->req->dtd->config = DTD_HALTED;
-                handle_ept_complete(ept);
-            }
-        }
-    }
-    if (n & STS_PCI) {
-        unsigned x = readl(usb->base + USB_PORTSC1);
-        usb->highspeed = (x & PORTSC1_HSP) ? 1 : 0;
-    }
-    if (n & (STS_UI | STS_UEI)) {
-        if (readl(usb->base + USB_ENDPTSETUPSTAT) & 1) {
-            handle_setup(usb);
-        }
-        n = readl(usb->base + USB_ENDPTCOMPLETE);
-        writel(n, usb->base + USB_ENDPTCOMPLETE);
-
-        for (ept = usb->ept_list; ept; ept = ept->next) {
-            if (n & ept->bit) {
-                handle_ept_complete(ept);
-                ret = INT_RESCHEDULE;
-            }
-        }
-    }
-    if (n & STS_SEI) {
-        panic("<SEI>");
-    }
-    arm_cm_irq_exit(ret);
-}
-
-// ---- UDC API
-
-int udc_init(struct udc_device *dev)
-{
-    USB.device = dev;
-    USB.ep0out = _udc_endpoint_alloc(&USB, 0, 0, 64);
-    USB.ep0in = _udc_endpoint_alloc(&USB, 0, 1, 64);
-    USB.ep0req = udc_request_alloc();
-    USB.ep0req->context = &USB;
-    USB.flags |= F_UDC_INIT;
-    return 0;
-}
-
-int udc_register_gadget(udc_gadget_t *gadget)
-{
-    if (USB.gadget) {
-        udc_gadget_t *last = USB.gadget;
-        while (last->next) {
-            last = last->next;
-        }
-        last->next = gadget;
-    } else {
-        USB.gadget = gadget;
-    }
-    gadget->next = NULL;
-    return 0;
-}
-
-void udc_ept_desc_fill(udc_endpoint_t *ept, unsigned char *data)
-{
-    data[0] = 7;
-    data[1] = TYPE_ENDPOINT;
-    data[2] = ept->num | (ept->in ? 0x80 : 0x00);
-    data[3] = 0x02; // bulk -- the only kind we support
-    data[4] = ept->maxpkt;
-    data[5] = ept->maxpkt >> 8;
-    data[6] = ept->in ? 0x00 : 0x01;
-}
-
-int udc_start(void)
-{
-    usb_t *usb = &USB;
-
-    dprintf(INFO, "udc_start()\n");
-    if (!(usb->flags & F_LL_INIT)) {
-        panic("udc cannot start before hw init\n");
-    }
-    if (!usb->device) {
-        panic("udc cannot start before init\n");
-    }
-    if (!usb->gadget) {
-        panic("udc has no gadget registered\n");
-    }
-    udc_create_descriptors(usb->device, usb->gadget);
-
-    usb_enable(usb, 1);
-    return 0;
-}
-
-int udc_stop(void)
-{
-    usb_enable(&USB, 0);
-    thread_sleep(10);
-    return 0;
-}
-
diff --git a/platform/lpc43xx/vectab.c b/platform/lpc43xx/vectab.c
deleted file mode 100644
index a223420e..00000000
--- a/platform/lpc43xx/vectab.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * Copyright (c) 2015 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <debug.h>
-#include <compiler.h>
-#include <arch/arm/cm.h>
-
-void lpc43xx_dummy_irq(void)
-{
-    arm_cm_irq_entry();
-    panic("unhandled irq\n");
-}
-
-// default handlers are weak aliases to the dummy handler
-#define DEFIRQ(x) \
-    void lpc43xx_##x##_IRQ(void) __WEAK_ALIAS("lpc43xx_dummy_irq");
-#include <platform/defirq.h>
-#undef DEFIRQ
-
-#define DEFIRQ(x) [x##_IRQn] = lpc43xx_##x##_IRQ,
-const void *const __SECTION(".text.boot.vectab2") vectab2[] = {
-#include <platform/defirq.h>
-};
-#undef DEFIRQ
diff --git a/platform/mediatek/common/gic/include/mt_gic.h b/platform/mediatek/common/gic/include/mt_gic.h
deleted file mode 100644
index bb5d3ad2..00000000
--- a/platform/mediatek/common/gic/include/mt_gic.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * Copyright (c) 2015 MediaTek Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef _MT_GIC_H_
-#define _MT_GIC_H_
-
-#include "platform/mt_irq.h"
-
-#define IRQ_REGS    ((NR_IRQ_LINE + (32 - 1)) >> 5)
-
-enum {IRQ_MASK_HEADER = 0xF1F1F1F1, IRQ_MASK_FOOTER = 0xF2F2F2F2};
-
-struct mtk_irq_mask {
-    unsigned int header;   /* for error checking */
-    unsigned int mask[IRQ_REGS];
-    unsigned int footer;   /* for error checking */
-};
-
-int mt_irq_mask_all(struct mtk_irq_mask *mask); //(This is ONLY used for the sleep driver)
-int mt_irq_mask_restore(struct mtk_irq_mask *mask); //(This is ONLY used for the sleep driver)
-void mt_irq_set_sens(unsigned int irq, unsigned int sens);
-void mt_irq_set_polarity(unsigned int irq, unsigned int polarity);
-void mt_irq_mask(unsigned int irq);
-void mt_irq_unmask(unsigned int irq);
-uint32_t mt_irq_get(void);
-void mt_irq_ack(unsigned int irq);
-
-void platform_init_interrupts(void);
-void platform_deinit_interrupts(void);
-void mt_irq_register_dump(void);
-
-#endif /* !_MT_GIC_H_ */
-
diff --git a/platform/mediatek/common/gic/mt_gic_v3.c b/platform/mediatek/common/gic/mt_gic_v3.c
deleted file mode 100644
index 522a8011..00000000
--- a/platform/mediatek/common/gic/mt_gic_v3.c
+++ /dev/null
@@ -1,450 +0,0 @@
-/*
- * Copyright (c) 2015 MediaTek Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <platform/mt_typedefs.h>
-#include <platform/mt_reg_base.h>
-#include <platform/mt_irq.h>
-#include <mt_gic.h>
-#include <sync_write.h>
-#include <debug.h>
-
-#define GICD_CTLR_RWP       (1 << 31)
-#define GICD_CTLR_ARE       (1 << 4)
-#define GICD_CTLR_ENGRP1S   (1 << 2)
-#define GICD_CTLR_ENGRP1NS  (1 << 1)
-#define GICR_WAKER_ProcessorSleep   (1 << 1)
-#define GICR_WAKER_ChildrenAsleep   (1 << 2)
-
-extern uint32_t mt_interrupt_needed_for_secure(void);
-extern uint64_t mt_irq_get_affinity(void);
-
-static void mt_gic_icc_primask_write(uint32_t reg)
-{
-    __asm__ volatile("MCR p15, 0, %0, c4, c6, 0" :: "r" (reg));
-}
-
-static uint32_t mt_gic_icc_primask_read(void)
-{
-    uint32_t reg;
-
-    __asm__ volatile("MRC p15, 0, %0, c4, c6, 0" : "=r" (reg));
-
-    return reg;
-}
-
-static void mt_gic_icc_igrpen1_write(uint32_t reg)
-{
-    __asm__ volatile("MCR p15, 0, %0, c12, c12, 7" :: "r" (reg));
-}
-
-static uint32_t mt_gic_icc_igrpen1_read(void)
-{
-    uint32_t reg;
-
-    __asm__ volatile("MRC p15, 0, %0, c12, c12, 7" : "=r" (reg));
-
-    return reg;
-}
-
-static uint32_t mt_gic_icc_iar1_read(void)
-{
-    uint32_t reg;
-
-    __asm__ volatile("MRC p15, 0, %0, c12, c12, 0" : "=r" (reg));
-
-    return reg;
-}
-
-static void mt_gic_icc_msre_write(void)
-{
-    uint32_t reg;
-
-#define MON_MODE    "#22"
-#define SVC_MODE    "#19"
-
-    /*
-     * switch to monitor mode and mark ICC_MSRE.
-     */
-    __asm__ volatile("CPS " MON_MODE "\n"
-                     "MRC p15, 6, %0, c12, c12, 5\n"
-                     "ORR %0, %0, #9\n"
-                     "MCR p15, 6, %0, c12, c12, 5\n"
-                     "CPS " SVC_MODE "\n" : "=r" (reg));
-
-    dsb();
-}
-
-static void mt_gic_icc_sre_write(uint32_t reg)
-{
-    __asm__ volatile("MCR p15, 0, %0, c12, c12, 5" :: "r" (reg));
-    dsb();
-}
-
-static uint32_t mt_gic_icc_sre_read(void)
-{
-    uint32_t reg;
-
-    __asm__ volatile("MRC p15, 0, %0, c12, c12, 5" : "=r" (reg));
-
-    return reg;
-}
-
-static void mt_gic_icc_eoir1_write(uint32_t reg)
-{
-    __asm__ volatile("MCR p15, 0, %0, c12, c12, 1" :: "r" (reg));
-}
-
-uint32_t mt_mpidr_read(void)
-{
-    uint32_t reg;
-
-    __asm__ volatile("MRC p15, 0, %0, c0, c0, 5" : "=r" (reg));
-
-    return reg;
-}
-
-static void mt_gic_cpu_init(void)
-{
-    mt_gic_icc_sre_write(0x01);
-    mt_gic_icc_primask_write(0xF0);
-    mt_gic_icc_igrpen1_write(0x01);
-    dsb();
-}
-
-static void mt_gic_redist_init(void)
-{
-    unsigned int value;
-
-    /* Wake up this CPU redistributor */
-    value = DRV_Reg32(GIC_REDIS_BASE + GIC_REDIS_WAKER);
-    value &= ~GICR_WAKER_ProcessorSleep;
-    DRV_WriteReg32(GIC_REDIS_BASE + GIC_REDIS_WAKER, value);
-
-    while (DRV_Reg32(GIC_REDIS_BASE + GIC_REDIS_WAKER) & GICR_WAKER_ChildrenAsleep);
-}
-
-static void mt_git_dist_rwp(void)
-{
-    /*
-     * check GICD_CTLR.RWP for done check
-     */
-    while (DRV_Reg32(GIC_DIST_BASE + GIC_DIST_CTRL) & GICD_CTLR_RWP) {
-
-    }
-}
-
-static void mt_gic_dist_init(void)
-{
-    unsigned int i;
-    uint64_t affinity;
-
-    affinity = mt_irq_get_affinity();
-
-    DRV_WriteReg32(GIC_DIST_BASE + GIC_DIST_CTRL, GICD_CTLR_ARE);
-
-    mt_git_dist_rwp();
-
-    /*
-     * Set all global interrupts to be level triggered, active low.
-     */
-    for (i = 32; i < (MT_NR_SPI + 32); i += 16) {
-        DRV_WriteReg32(GIC_DIST_BASE + GIC_DIST_CONFIG + i * 4 / 16, 0);
-    }
-
-    /*
-     * Set all global interrupts to this CPU only.
-     */
-    for (i = 0; i < MT_NR_SPI; i++) {
-        DRV_WriteReg32(GIC_DIST_BASE + GIC_DIST_ROUTE + i * 8, (affinity & 0xFFFFFFFF));
-        DRV_WriteReg32(GIC_DIST_BASE + GIC_DIST_ROUTE + i * 8 + 4, (affinity >> 32));
-    }
-
-    /*
-     * Set all interrupts to G1S.  Leave the PPI and SGIs alone
-     * as they are set by redistributor registers.
-     */
-    for (i = 0; i < NR_IRQ_LINE; i += 32)
-        DRV_WriteReg32(GIC_DIST_BASE + GIC_DIST_IGRPMODR + i / 8, 0xFFFFFFFF);
-
-    /*
-     * Set priority on all interrupts.
-     */
-    for (i = 0; i < NR_IRQ_LINE; i += 4) {
-        DRV_WriteReg32(GIC_DIST_BASE + GIC_DIST_PRI + i * 4 / 4, 0xA0A0A0A0);
-    }
-
-    /*
-     * Disable all interrupts.
-     */
-    for (i = 0; i < NR_IRQ_LINE; i += 32) {
-        DRV_WriteReg32(GIC_DIST_BASE + GIC_DIST_ENABLE_CLEAR + i * 4 / 32, 0xFFFFFFFF);
-    }
-
-    /*
-     * Clear all active status
-     */
-    for (i = 0; i < NR_IRQ_LINE; i += 32) {
-        DRV_WriteReg32(GIC_DIST_BASE + GIC_DIST_ACTIVE_CLEAR + i * 4 / 32, 0xFFFFFFFF);
-    }
-
-    /*
-     * Clear all pending status
-     */
-    for (i = 0; i < NR_IRQ_LINE; i += 32) {
-        DRV_WriteReg32(GIC_DIST_BASE + GIC_DIST_PENDING_CLEAR + i * 4 / 32, 0xFFFFFFFF);
-    }
-
-
-    dsb();
-    mt_git_dist_rwp();
-    DRV_WriteReg32(GIC_DIST_BASE + GIC_DIST_CTRL, GICD_CTLR_ARE | GICD_CTLR_ENGRP1S | GICD_CTLR_ENGRP1NS);
-    mt_git_dist_rwp();
-}
-
-void platform_init_interrupts(void)
-{
-    uint32_t sec;
-
-    sec = mt_interrupt_needed_for_secure();
-
-    if (sec)
-        mt_gic_icc_msre_write();
-
-    mt_gic_dist_init();
-
-    if (sec)
-        mt_gic_redist_init();
-
-    mt_gic_cpu_init();
-}
-
-void platform_deinit_interrupts(void)
-{
-    unsigned int irq;
-
-    for (irq = 0; irq < NR_IRQ_LINE; irq += 32) {
-        DRV_WriteReg32(GIC_DIST_BASE + GIC_DIST_ENABLE_CLEAR + irq * 4 / 32, 0xFFFFFFFF);
-    }
-
-    dsb();
-
-    while ((irq = mt_gic_icc_iar1_read()) != 1023 ) {
-        mt_gic_icc_eoir1_write(irq);
-    }
-}
-
-uint32_t mt_irq_get(void)
-{
-    return mt_gic_icc_iar1_read();
-}
-
-void mt_irq_set_polarity(unsigned int irq, unsigned int polarity)
-{
-    unsigned int offset;
-    unsigned int reg_index;
-    unsigned int value;
-
-    // peripheral device's IRQ line is using GIC's SPI, and line ID >= GIC_PRIVATE_SIGNALS
-    if (irq < GIC_PRIVATE_SIGNALS) {
-        return;
-    }
-
-    offset = (irq - GIC_PRIVATE_SIGNALS) & 0x1F;
-    reg_index = (irq - GIC_PRIVATE_SIGNALS) >> 5;
-    if (polarity == 0) {
-        value = DRV_Reg32(INT_POL_CTL0 + (reg_index * 4));
-        value |= (1 << offset); // always invert the incoming IRQ's polarity
-        DRV_WriteReg32((INT_POL_CTL0 + (reg_index * 4)), value);
-    } else {
-        value = DRV_Reg32(INT_POL_CTL0 + (reg_index * 4));
-        value &= ~(0x1 << offset);
-        DRV_WriteReg32(INT_POL_CTL0 + (reg_index * 4), value);
-    }
-}
-
-void mt_irq_set_sens(unsigned int irq, unsigned int sens)
-{
-    unsigned int config;
-
-    if (sens == MT65xx_EDGE_SENSITIVE) {
-        config = DRV_Reg32(GIC_DIST_BASE + GIC_DIST_CONFIG + (irq / 16) * 4);
-        config |= (0x2 << (irq % 16) * 2);
-        DRV_WriteReg32(GIC_DIST_BASE + GIC_DIST_CONFIG + (irq / 16) * 4, config);
-    } else {
-        config = DRV_Reg32(GIC_DIST_BASE + GIC_DIST_CONFIG + (irq / 16) * 4);
-        config &= ~(0x2 << (irq % 16) * 2);
-        DRV_WriteReg32( GIC_DIST_BASE + GIC_DIST_CONFIG + (irq / 16) * 4, config);
-    }
-    dsb();
-}
-
-/*
- * mt_irq_mask: mask one IRQ
- * @irq: IRQ line of the IRQ to mask
- */
-void mt_irq_mask(unsigned int irq)
-{
-    unsigned int mask = 1 << (irq % 32);
-
-    DRV_WriteReg32(GIC_DIST_BASE + GIC_DIST_ENABLE_CLEAR + irq / 32 * 4, mask);
-    dsb();
-}
-
-/*
- * mt_irq_unmask: unmask one IRQ
- * @irq: IRQ line of the IRQ to unmask
- */
-void mt_irq_unmask(unsigned int irq)
-{
-    unsigned int mask = 1 << (irq % 32);
-
-    DRV_WriteReg32(GIC_DIST_BASE + GIC_DIST_ENABLE_SET + irq / 32 * 4, mask);
-    dsb();
-}
-
-/*
- * mt_irq_ack: ack IRQ
- * @irq: IRQ line of the IRQ to mask
- */
-void mt_irq_ack(unsigned int irq)
-{
-    mt_gic_icc_eoir1_write(irq);
-    dsb();
-}
-
-/*
- * mt_irq_mask_all: mask all IRQ lines. (This is ONLY used for the sleep driver)
- * @mask: pointer to struct mtk_irq_mask for storing the original mask value.
- * Return 0 for success; return negative values for failure.
- */
-int mt_irq_mask_all(struct mtk_irq_mask *mask)
-{
-    unsigned int i;
-
-    if (mask) {
-        for (i = 0; i < IRQ_REGS; i++) {
-            mask->mask[i] = DRV_Reg32(GIC_DIST_BASE + GIC_DIST_ENABLE_SET + i * 4);
-            DRV_WriteReg32(GIC_DIST_BASE + GIC_DIST_ENABLE_CLEAR + i * 4, 0xFFFFFFFF);
-        }
-
-        dsb();
-
-        mask->header = IRQ_MASK_HEADER;
-        mask->footer = IRQ_MASK_FOOTER;
-
-        return 0;
-    } else {
-        return -1;
-    }
-}
-
-/*
- * mt_irq_mask_restore: restore all IRQ lines' masks. (This is ONLY used for the sleep driver)
- * @mask: pointer to struct mtk_irq_mask for storing the original mask value.
- * Return 0 for success; return negative values for failure.
- */
-int mt_irq_mask_restore(struct mtk_irq_mask *mask)
-{
-    unsigned int i;
-
-    if (!mask) {
-        return -1;
-    }
-    if (mask->header != IRQ_MASK_HEADER) {
-        return -1;
-    }
-    if (mask->footer != IRQ_MASK_FOOTER) {
-        return -1;
-    }
-
-    for (i = 0; i < IRQ_REGS; i++) {
-        DRV_WriteReg32(GIC_DIST_BASE + GIC_DIST_ENABLE_SET + i * 4, mask->mask[i]);
-    }
-
-    dsb();
-
-
-    return 0;
-}
-
-void mt_irq_register_dump(void)
-{
-    int i;
-    uint32_t reg, reg2;
-
-    dprintf(CRITICAL, "%s(): do irq register dump\n", __func__);
-
-    reg = DRV_Reg32(GIC_DIST_BASE + GIC_DIST_CTRL);
-    dprintf(CRITICAL, "GICD_CTLR: 0x%08x\n", reg);
-
-    for (i = 0; i < MT_NR_SPI; i++) {
-        reg = DRV_Reg32(GIC_DIST_BASE + GIC_DIST_ROUTE + i * 8);
-        reg2 = DRV_Reg32(GIC_DIST_BASE + GIC_DIST_ROUTE + i * 8 + 4);
-        dprintf(CRITICAL, "GICD_IROUTER[%d]: 0x%08x, 0x%08x\n", i, reg, reg2);
-    }
-
-    for (i = 0; i < NR_IRQ_LINE; i += 32) {
-        reg = DRV_Reg32(GIC_DIST_BASE + GIC_DIST_IGRPMODR + i / 8);
-        dprintf(CRITICAL, "GICD_IGRPMODR[%d]: 0x%08x\n", i >> 5, reg);
-    }
-
-    for (i = 0; i < NR_IRQ_LINE; i += 4) {
-        reg = DRV_Reg32(GIC_DIST_BASE + GIC_DIST_PRI + i * 4 / 4);
-        dprintf(CRITICAL, "GICD_IPRIORITYR[%d]: 0x%08x\n", i >> 2, reg);
-    }
-
-    for (i = 32; i < (MT_NR_SPI + 32); i += 16) {
-        reg = DRV_Reg32(GIC_DIST_BASE + GIC_DIST_CONFIG + i * 4 / 16);
-        dprintf(CRITICAL, "DIST_ICFGR[%d]: 0x%08x\n", (i >> 4) - 2, reg);
-    }
-
-    for (i = 0; i < IRQ_REGS; i++) {
-        reg = DRV_Reg32(GIC_DIST_BASE + GIC_DIST_ENABLE_SET + i * 4);
-        dprintf(CRITICAL, "GICD_ISENABLER[%d]: 0x%08x\n", i, reg);
-    }
-
-    for (i = 0; i < IRQ_REGS; i++) {
-        reg = DRV_Reg32(GIC_DIST_BASE + GIC_DIST_PENDING_SET + i * 4);
-        dprintf(CRITICAL, "GICD_ISPENDR[%d]: 0x%08x\n", i, reg);
-    }
-
-    for (i = 0; i < IRQ_REGS; i++) {
-        reg = DRV_Reg32(GIC_DIST_BASE + GIC_DIST_ACTIVE_SET + i * 4);
-        dprintf(CRITICAL, "GICD_ISACTIVER[%d]: 0x%08x\n", i, reg);
-    }
-
-    reg = mt_gic_icc_sre_read();
-    dprintf(CRITICAL, "ICC_SRE: 0x%08x\n", reg);
-
-    reg = mt_gic_icc_primask_read();
-    dprintf(CRITICAL, "ICC_PMR: 0x%08x\n", reg);
-
-    reg = mt_gic_icc_igrpen1_read();
-    dprintf(CRITICAL, "ICC_IGRPEN1: 0x%08x\n", reg);
-
-    reg = mt_gic_icc_iar1_read();
-    dprintf(CRITICAL, "ICC_IAR1: 0x%08x\n", reg);
-
-    reg = mt_mpidr_read();
-    dprintf(CRITICAL, "MPIDR: 0x%08x\n", reg);
-}
diff --git a/platform/mediatek/common/gic/rules.mk b/platform/mediatek/common/gic/rules.mk
deleted file mode 100644
index bd137a79..00000000
--- a/platform/mediatek/common/gic/rules.mk
+++ /dev/null
@@ -1,11 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-MODULE_INCLUDES += $(LOCAL_DIR)/include
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/mt_gic_v3.c
-
-
-include make/module.mk
diff --git a/platform/mediatek/common/include/sync_write.h b/platform/mediatek/common/include/sync_write.h
deleted file mode 100644
index 3375a5de..00000000
--- a/platform/mediatek/common/include/sync_write.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (c) 2015 MediaTek Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __SYNC_WRITE_H__
-#define __SYNC_WRITE_H__
-
-#include <arch/arm.h>
-
-#define dsb()   DSB
-
-#define mt_reg_sync_writel(v, a) \
-        do {    \
-            *(volatile unsigned int *)(a) = (v);    \
-            dsb(); \
-        } while (0)
-
-#define mt_reg_sync_writew(v, a) \
-        do {    \
-            *(volatile unsigned short *)(a) = (v);    \
-            dsb(); \
-        } while (0)
-
-#define mt_reg_sync_writeb(v, a) \
-        do {    \
-            *(volatile unsigned char *)(a) = (v);    \
-            dsb(); \
-        } while (0)
-
-#endif /* !__SYNC_WRITE_H__ */
-
diff --git a/platform/mediatek/common/rules.mk b/platform/mediatek/common/rules.mk
deleted file mode 100644
index b92f8e66..00000000
--- a/platform/mediatek/common/rules.mk
+++ /dev/null
@@ -1,8 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-GLOBAL_INCLUDES += \
-	$(LOCAL_DIR)/include
-
-MODULE_DEPS += \
-	$(LOCAL_DIR)/gic
-
diff --git a/platform/mediatek/mt6797/debug.c b/platform/mediatek/mt6797/debug.c
deleted file mode 100644
index 8450c3ee..00000000
--- a/platform/mediatek/mt6797/debug.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Copyright (c) 2015 MediaTek Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <arch/ops.h>
-#include <stdarg.h>
-#include <dev/uart.h>
-#include <platform/mt_uart.h>
-#include <platform.h>
-
-void _dputc(char c)
-{
-    int port = mtk_get_current_uart();
-
-    if (c == '\n') {
-        uart_putc(port, '\r');
-    }
-
-    uart_putc(port, c);
-}
-
-int dgetc(char *c, bool wait)
-{
-    int _c;
-    int port = mtk_get_current_uart();
-
-    if ((_c = uart_getc(port, wait)) < 0) {
-        return -1;
-    }
-
-    *c = _c;
-    return 0;
-}
-
-void platform_halt(platform_halt_action suggested_action, platform_halt_reason reason)
-{
-    arch_disable_ints();
-    for (;;);
-}
-
-uint32_t debug_cycle_count(void)
-{
-    PANIC_UNIMPLEMENTED;
-}
-
-void platform_dputc(char c)
-{
-    if (c == '\n') {
-        _dputc('\r');
-    }
-
-    _dputc(c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    return dgetc(c, wait);
-}
-
diff --git a/platform/mediatek/mt6797/include/platform/mt_gpt.h b/platform/mediatek/mt6797/include/platform/mt_gpt.h
deleted file mode 100644
index 5c0f05b8..00000000
--- a/platform/mediatek/mt6797/include/platform/mt_gpt.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * Copyright (c) 2015 MediaTek Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __MT_GPT_H__
-#define __MT_GPT_H__
-#include <platform/mt_typedefs.h>
-#include <sys/types.h>
-#include <stdbool.h>
-
-#define GPT_IRQEN_REG       ((volatile unsigned int*)(APXGPT_BASE))
-#define GPT_IRQSTA_REG      ((volatile unsigned int*)(APXGPT_BASE+0x04))
-#define GPT_IRQACK_REG      ((volatile unsigned int*)(APXGPT_BASE+0x08))
-
-#define GPT4_CON_REG        ((volatile unsigned int*)(APXGPT_BASE+0x40))
-#define GPT4_CLK_REG        ((volatile unsigned int*)(APXGPT_BASE+0x44))
-#define GPT4_DAT_REG        ((volatile unsigned int*)(APXGPT_BASE+0x48))
-
-#define GPT5_CON_REG        ((volatile unsigned int*)(APXGPT_BASE+0x50))
-#define GPT5_CLK_REG        ((volatile unsigned int*)(APXGPT_BASE+0x54))
-#define GPT5_COUNT_REG      ((volatile unsigned int*)(APXGPT_BASE+0x58))
-#define GPT5_COMPARE_REG    ((volatile unsigned int*)(APXGPT_BASE+0x5C))
-
-#define GPT_MODE4_ONE_SHOT (0x00 << 4)
-#define GPT_MODE4_REPEAT   (0x01 << 4)
-#define GPT_MODE4_KEEP_GO  (0x02 << 4)
-#define GPT_MODE4_FREERUN  (0x03 << 4)
-
-#define GPT_CLEAR       2
-
-#define GPT_ENABLE      1
-#define GPT_DISABLE     0
-
-#define GPT_CLK_SYS     (0x0 << 4)
-#define GPT_CLK_RTC     (0x1 << 4)
-
-#define GPT_DIV_BY_1        0
-#define GPT_DIV_BY_2        1
-
-#define GPT4_EN                     0x0001
-#define GPT4_FREERUN                0x0030
-#define GPT4_SYS_CLK                0x0000
-
-#define GPT4_1US_TICK       ((U32)13)           //    1000 / 76.92ns = 13.000
-#define GPT4_1MS_TICK       ((U32)13000)        // 1000000 / 76.92ns = 13000.520
-// 13MHz: 1us = 13.000 ticks
-#define TIME_TO_TICK_US(us) ((us)*GPT4_1US_TICK + ((us)*0 + (1000-1))/1000)
-// 13MHz: 1ms = 13000.520 ticks
-#define TIME_TO_TICK_MS(ms) ((ms)*GPT4_1MS_TICK + ((ms)*520 + (1000-1))/1000)
-
-extern void gpt_init(void);
-
-#endif  /* !__MT_GPT_H__ */
diff --git a/platform/mediatek/mt6797/include/platform/mt_irq.h b/platform/mediatek/mt6797/include/platform/mt_irq.h
deleted file mode 100644
index 469a3600..00000000
--- a/platform/mediatek/mt6797/include/platform/mt_irq.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright (c) 2015 MediaTek Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __MT_IRQ_H__
-#define __MT_IRQ_H__
-
-#include <stdint.h>
-
-#define GIC_DIST_CTRL           0x000
-#define GIC_DIST_ENABLE_SET     0x100
-#define GIC_DIST_ENABLE_CLEAR       0x180
-#define GIC_DIST_PENDING_SET        0x200
-#define GIC_DIST_PENDING_CLEAR      0x280
-#define GIC_DIST_ACTIVE_SET        0x300
-#define GIC_DIST_ACTIVE_CLEAR      0x380
-#define GIC_DIST_PRI            0x400
-#define GIC_DIST_CONFIG         0xc00
-#define GIC_DIST_IGRPMODR       0xd00
-#define GIC_DIST_ROUTE          0x6100
-#define GIC_REDIS_WAKER         0x14
-
-#define INT_POL_CTL0  (MCUCFG_BASE + 0x620)
-
-/*
- * Define hadware registers.
- */
-
-/*
- * Define IRQ code.
- */
-
-#define GIC_PRIVATE_SIGNALS (32)
-
-#define GIC_PPI_OFFSET          (27)
-#define GIC_PPI_GLOBAL_TIMER    (GIC_PPI_OFFSET + 0)
-#define GIC_PPI_LEGACY_FIQ      (GIC_PPI_OFFSET + 1)
-#define GIC_PPI_PRIVATE_TIMER   (GIC_PPI_OFFSET + 2)
-#define GIC_PPI_WATCHDOG_TIMER  (GIC_PPI_OFFSET + 3)
-#define GIC_PPI_LEGACY_IRQ      (GIC_PPI_OFFSET + 4)
-
-
-#define MT_GPT_IRQ_ID   201
-
-#define MT_NR_PPI   (5)
-#define MT_NR_SPI   (241)//(224)
-#define NR_IRQ_LINE  (GIC_PPI_OFFSET + MT_NR_PPI + MT_NR_SPI)    // 5 PPIs and 224 SPIs
-
-#define MT65xx_EDGE_SENSITIVE 0
-#define MT65xx_LEVEL_SENSITIVE 1
-
-#define MT65xx_POLARITY_LOW   0
-#define MT65xx_POLARITY_HIGH  1
-
-#endif  /* !__MT_IRQ_H__ */
diff --git a/platform/mediatek/mt6797/include/platform/mt_reg_base.h b/platform/mediatek/mt6797/include/platform/mt_reg_base.h
deleted file mode 100644
index 9550a4f5..00000000
--- a/platform/mediatek/mt6797/include/platform/mt_reg_base.h
+++ /dev/null
@@ -1,513 +0,0 @@
-/*
- * Copyright (c) 2015 MediaTek Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __MT_REG_BASE_H__
-#define __MT_REG_BASE_H__
-
-#define BOOTROM_BASE (0x00000000)
-#define BOOTSRAM_BASE (0x00100000)
-#define IO_PHYS (0x10000000)
-
-// APB Module cksys
-#define CKSYS_BASE (0x10000000)
-#define TOPCKGEN_BASE (0x10000000)
-
-// APB Module infracfg_ao
-#define INFRACFG_AO_BASE (0x10001000)
-
-#define IOCFG_L_BASE (0x10002000)
-#define IOCFG_B_BASE (0x10002400)
-#define IOCFG_R_BASE (0x10002800)
-#define IOCFG_T_BASE (0x10002C00)
-
-// APB Module pericfg
-#define PERICFG_BASE (0x10003000)
-
-// APB Module dramc
-#define DRAMC0_BASE (0x10004000)
-
-// APB Module gpio
-#define GPIO_BASE (0x10005000)
-
-// APB Module sleep
-#define SLEEP_BASE (0x10006000)
-
-// APB Module toprgu
-#define TOPRGU_BASE (0x10007000)
-
-// APB Module apxgpt
-#define APXGPT_BASE (0x10008000)
-
-// APB Module rsvd
-#define RSVD_BASE (0x10009000)
-
-// APB Module sej
-#define SEJ_BASE (0x1000A000)
-
-// APB Module ap_cirq_eint
-#define APIRQ_BASE (0x1000B000)
-
-// APB Module smi
-//#define SMI_COMMON_AO_BASE (0x1000C000)
-
-// APB Module pmic_wrap
-#define PWRAP_BASE (0x1000D000)
-
-// APB Module device_apc_ao
-#define DEVAPC_AO_BASE (0x1000E000)
-
-// APB Module ddrphy
-#define DDRPHY_BASE (0x1000F000)
-
-// APB Module kp
-#define KP_BASE (0x10010000)
-
-// APB Module DRAMC1_BASE
-//#define DRAMC1_BASE (0x10011000)
-
-// APB Module DDRPHY1_BASE
-//#define DDRPHY1_BASE (0x10012000)
-
-// APB Module md32
-#define MD32_BASE (0x10058000)
-
-// APB Module dbgapb
-#define DBGAPB_BASE (0x10100000)
-
-// APB Module mcucfg
-#define MCUCFG_BASE (0x10220000)
-
-// APB Module ca7mcucfg
-#define CA7MCUCFG_BASE (0x10200000)
-
-// APB Module infracfg
-#define INFRACFG_BASE (0x10201000)
-
-// APB Module sramrom
-#define SRAMROM_BASE (0x10202000)
-
-// APB Module emi
-#define EMI_BASE (0x10203000)
-
-// APB Module sys_cirq
-#define SYS_CIRQ_BASE (0x10204000)
-
-// APB Module mm_iommu
-#define M4U_BASE (0x10205000)
-
-// APB Module efusec
-#define EFUSEC_BASE (0x10206000)
-
-// APB Module device_apc
-#define DEVAPC_BASE (0x10207000)
-
-// APB Module bus_dbg_tracker_cfg
-#define BUS_DBG_BASE (0x10208000)
-
-// APB Module apmixed
-//#define APMIXED_BASE (0x10209000)
-
-// APB Module fhctl
-#define FHCTL_BASE (0x1000cF00)
-
-// APB Module ccif
-//#define AP_CCIF0_BASE (0x1020A000)
-
-// APB Module ccif
-//#define MD_CCIF0_BASE (0xA020B000)
-
-// APB Module gpio1
-//#define GPIO1_BASE (0x1020C000)
-
-// APB Module infra_mbist
-#define INFRA_MBIST_BASE (0x1020D000)
-
-// APB Module dramc_conf_nao
-#define DRAMC_NAO_BASE (0x1020E000)
-
-// APB Module trng
-#define TRNG_BASE (0x1020F000)
-
-// APB Module gcpu
-#define GCPU_BASE (0x10210000)
-
-// APB Module gcpu_ns
-#define GCPU_NS_BASE (0x10211000)
-
-// APB Module gcpu_ns
-#define GCE_BASE (0x10212000)
-
-// APB Module dramc_conf_nao
-#define DRAMC1_NAO_BASE (0x10213000)
-
-// APB Module perisys_iommu
-#define PERISYS_IOMMU_BASE (0x10214000)
-
-// APB Module mipi_tx_config
-#define MIPI_TX0_BASE (0x10215000)
-#define MIPI_TX1_BASE (0x1021e000)
-
-// MIPI TX Config
-#define MIPI_TX_CONFIG_BASE (0x10012000)
-
-// APB Module mipi_rx_ana_csi0
-#define MIPI_RX_ANA_CSI0_BASE (0x10217000)
-
-// APB Module mipi_rx_ana_csi1
-#define MIPI_RX_ANA_CSI1_BASE (0x10218000)
-
-// APB Module mipi_rx_ana_csi2
-#define MIPI_RX_ANA_CSI2_BASE (0x10219000)
-
-// APB Module ca9
-#define CA9_BASE (0x10220000)
-
-// APB Module gce
-#define GCE_BASE (0x10212000)
-
-// APB Module cq_dma
-#define CQ_DMA_BASE (0x10212c00)
-
-// APB Module ap_dma
-#define AP_DMA_BASE (0x11000000)
-
-// APB Module auxadc
-#define AUXADC_BASE (0x11001000)
-
-// APB Module uart
-#define AP_UART0_BASE (0x11002000)
-
-// APB Module uart
-#define AP_UART1_BASE (0x11003000)
-
-// APB Module uart
-#define AP_UART2_BASE (0x11004000)
-
-// APB Module uart
-#define AP_UART3_BASE (0x11005000)
-
-// APB Module pwm
-#define PWM_BASE (0x11006000)
-
-// APB Module i2c
-#define I2C0_BASE (0x11007000)
-
-// APB Module i2c
-#define I2C1_BASE (0x11008000)
-
-// APB Module i2c
-#define I2C2_BASE (0x11009000)
-
-// APB Module spi
-#define SPI1_BASE (0x1100A000)
-
-// APB Module therm_ctrl
-#define THERM_CTRL_BASE (0x1100B000)
-
-// APB Module btif
-#define BTIF_BASE (0x1100C000)
-
-
-// APB Module nfi
-#define NFI_BASE (0x1100D000)
-
-// APB Module nfiecc
-#define NFIECC_BASE (0x1100E000)
-
-// APB Module nli_arb
-//#define NLI_ARB_BASE (0x1100F000)
-
-// APB Module i2c
-//#define I2C3_BASE (0x11010000)
-
-// APB Module i2c
-//#define I2C4_BASE (0x11011000)
-
-// APB Module usb2
-//#define USB_BASE (0x11200000)
-
-// APB Module usb_sif
-//#define USBSIF_BASE (0x11210000)
-
-// APB Module audio
-#define AUDIO_BASE (0x11220000)
-
-// APB Module msdc
-#define MSDC0_BASE (0x11230000)
-
-// APB Module msdc
-#define MSDC1_BASE (0x11240000)
-
-// APB Module msdc
-#define MSDC2_BASE (0x11250000)
-
-// APB Module msdc
-#define MSDC3_BASE (0x11260000)
-
-// APB Module USB_1p
-#define ICUSB_BASE (0x11270000)
-
-// APB Module ssusb_top
-#define USB3_BASE (0x11270000)
-
-// APB Module ssusb_top_sif
-#define USB3_SIF_BASE (0x11280000)
-
-// APB Module ssusb_top_sif2
-#define USB3_SIF2_BASE (0x11290000)
-
-// APB Module mfg_top
-//#define MFGCFG_BASE (0x13FFF000)
-
-// APB Module han
-//#define HAN_BASE (0x13000000)
-
-// APB Module mmsys_config
-#define MMSYS_CONFIG_BASE (0x14000000)
-
-// APB Module mdp_rdma
-#define MDP_RDMA0_BASE (0x14001000)
-
-// APB Module mdp_rdma
-#define MDP_RDMA1_BASE (0x14002000)
-
-// APB Module mdp_rsz
-#define MDP_RSZ0_BASE (0x14003000)
-
-// APB Module mdp_rsz
-#define MDP_RSZ1_BASE (0x14004000)
-
-// APB Module mdp_rsz
-#define MDP_RSZ2_BASE (0x14005000)
-
-// APB Module disp_wdma
-#define MDP_WDMA_BASE (0x14006000)
-
-// APB Module mdp_wrot
-#define MDP_WROT0_BASE (0x14007000)
-
-// APB Module mdp_wrot
-#define MDP_WROT1_BASE (0x14008000)
-
-// APB Module mdp_tdshp
-#define MDP_TDSHP0_BASE (0x14009000)
-
-// APB Module mdp_tdshp
-#define MDP_TDSHP1_BASE (0x1400a000)
-
-// APB Module mdp_tdshp
-#define MDP_CROP_BASE (0x1400b000)
-
-// DISPSYS
-#define OVL0_BASE (0x1400b000)
-#define OVL1_BASE (0x1400c000)
-#define DISP_OVL0_2L_BASE (0x1400d000)
-#define DISP_OVL1_2L_BASE (0x1400e000)
-#define DISP_RDMA0_BASE (0x1400f000)
-#define DISP_RDMA1_BASE (0x14010000)
-#define DISP_WDMA0_BASE (0x14011000)
-#define DISP_WDMA1_BASE (0x14012000)
-#define DISP_UFOE_BASE (0x14019000)
-#define DISP_SPLIT0_BASE (0x1401b000)
-#define DSI0_BASE (0x1401c000)
-#define DSI1_BASE (0x1401d000)
-#define MM_MUTEX_BASE (0x1401f000)
-
-// PQ and AAL
-#define COLOR0_BASE (0x14013000)
-#define CCORR_BASE  (0x14014000)
-#define DISP_AAL_BASE (0x14015000)
-#define DISP_GAMMA_BASE (0x14016000)
-#define DISP_OD_BASE (0x14017000)
-#define DITHER_BASE (0x14018000)
-
-
-// APB Module disp_dpi
-#define DPI_BASE (0x1401e000)
-
-// APB Module disp_pwm
-#define DISP_PWM0_BASE (0x1100f000)
-
-// APB Module smi_larb0
-#define SMI_LARB0_BASE (0x14020000)
-
-// APB Module smi_larb5
-#define SMI_LARB5_BASE (0x14021000)
-
-// APB Module smi
-#define SMI_COMMON_BASE (0x14022000)
-
-// APB Module smi_larb
-#define SMI_LARB2_BASE (0x15001000)
-
-// APB Module fake_eng
-#define FAKE_ENG_BASE (0x15002000)
-
-// APB Module imgsys
-#define IMGSYS_BASE (0x15000000)
-
-// APB Module cam1
-#define CAM1_BASE (0x15004000)
-
-// APB Module cam2
-#define CAM2_BASE (0x15005000)
-
-// APB Module cam3
-#define CAM3_BASE (0x15006000)
-
-// APB Module cam4
-#define CAM4_BASE (0x15007000)
-
-// APB Module camsv
-#define CAMSV_BASE (0x15009000)
-
-// APB Module camsv_top
-#define CAMSV_TOP_BASE (0x15009000)
-
-// APB Module csi2
-#define CSI2_BASE (0x15008000)
-
-// APB Module seninf
-#define SENINF_BASE (0x15008000)
-
-// APB Module seninf_tg
-#define SENINF_TG_BASE (0x15008000)
-
-// APB Module seninf_top
-#define SENINF_TOP_BASE (0x15008000)
-
-// APB Module seninf_mux
-#define SENINF_MUX_BASE (0x15008000)
-
-// APB Module mipi_rx_config
-#define MIPI_RX_CONFIG_BASE (0x15008000)
-
-// APB Module scam
-#define SCAM_BASE (0x15008C00)
-
-// APB Module ncsi2
-#define NCSI2_BASE (0x15008000)
-
-// APB Module ccir656
-#define CCIR656_BASE (0x15008000)
-
-// APB Module n3d_ctl
-#define N3D_CTL_BASE (0x15008000)
-
-// APB Module fdvt
-#define FDVT_BASE (0x1500B000)
-
-// APB Module vdecsys_config
-#define VDEC_GCON_BASE (0x16000000)
-
-// APB Module smi_larb
-#define SMI_LARB1_BASE (0x16010000)
-
-// APB Module vdtop
-#define VDEC_BASE (0x16020000)
-
-// APB Module vdtop
-#define VDTOP_BASE (0x16020000)
-
-// APB Module vld
-#define VLD_BASE (0x16021000)
-
-// APB Module vld_top
-#define VLD_TOP_BASE (0x16021800)
-
-// APB Module mc
-#define MC_BASE (0x16022000)
-
-// APB Module avc_vld
-#define AVC_VLD_BASE (0x16023000)
-
-// APB Module avc_mv
-#define AVC_MV_BASE (0x16024000)
-
-// APB Module vdec_pp
-#define VDEC_PP_BASE (0x16025000)
-
-// APB Module hevc_vld
-#define HEVC_VLD_BASE (0x16028000)
-
-// APB Module vp8_vld
-#define VP8_VLD_BASE (0x16026800)
-
-// APB Module vp6
-#define VP6_BASE (0x16027000)
-
-// APB Module vld2
-#define VLD2_BASE (0x16027800)
-
-// APB Module mc_vmmu
-#define MC_VMMU_BASE (0x16028000)
-
-// APB Module pp_vmmu
-#define PP_VMMU_BASE (0x16029000)
-
-// APB Module mjc_config
-#define MJC_CONFIG_BASE (0x17000000)
-
-// APB Module mjc_top
-#define MJC_TOP_BASE (0x17001000)
-
-// APB Module smi_larb
-#define SMI_LARB4_BASE (0x17002000)
-
-// APB Module venc_config
-#define VENC_GCON_BASE (0x18000000)
-
-// APB Module smi_larb
-#define SMI_LARB3_BASE (0x18001000)
-
-// APB Module venc
-#define VENC_BASE (0x18002000)
-
-// APB Module jpgenc
-#define JPGENC_BASE (0x18003000)
-
-// APB Module jpgdec
-#define JPGDEC_BASE (0x18004000)
-
-// APB Module audiosys
-#define AUDIOSYS_BASE (0x11220000)
-
-// rtc
-#define RTC_BASE (0x4000)
-
-//Marcos add for early porting
-//#define SYSRAM_BASE (0x19000000)
-#define GIC_DIST_BASE (0x19000000)
-#define GIC_REDIS_BASE (0x19200000)
-//#define GIC_CPU_BASE  (CA9_BASE + 0x2000)
-
-/* hardware version register */
-#define VER_BASE 0x08000000
-#define APHW_CODE           (VER_BASE)
-#define APHW_SUBCODE        (VER_BASE + 0x04)
-#define APHW_VER            (VER_BASE + 0x08)
-#define APSW_VER            (VER_BASE + 0x0C)
-
-////////////////////////////////////////
-
-#endif /* !__MT_REG_BASE_H__ */
-
diff --git a/platform/mediatek/mt6797/include/platform/mt_typedefs.h b/platform/mediatek/mt6797/include/platform/mt_typedefs.h
deleted file mode 100644
index 9a95eb94..00000000
--- a/platform/mediatek/mt6797/include/platform/mt_typedefs.h
+++ /dev/null
@@ -1,164 +0,0 @@
-/*
- * Copyright (c) 2015 MediaTek Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/* ------------
- *   Type definition.
- */
-
-#ifndef __MT_TYPEDEFS_H__
-#define __MT_TYPEDEFS_H__
-
-
-/*==== CONSTANTS ==================================================*/
-
-#define IMPORT  EXTERN
-#ifndef __cplusplus
-#define EXTERN  extern
-#else
-#define EXTERN  extern "C"
-#endif
-#define LOCAL     static
-#define GLOBAL
-#define EXPORT    GLOBAL
-
-
-#define EQ        ==
-#define NEQ       !=
-#define AND       &&
-#define OR        ||
-#define XOR(A,B)  ((!(A) AND (B)) OR ((A) AND !(B)))
-
-#ifndef FALSE
-#define FALSE   0
-#endif
-
-#ifndef TRUE
-#define TRUE    1
-#endif
-
-#ifndef NULL
-#define NULL    0
-#endif
-
-#ifndef BOOL
-typedef unsigned char  BOOL;
-#endif
-
-typedef volatile unsigned char  *UINT8P;
-typedef volatile unsigned short *UINT16P;
-typedef volatile unsigned int   *UINT32P;
-
-
-typedef unsigned char   UINT8;
-typedef unsigned short  UINT16;
-typedef unsigned int    UINT32;
-typedef unsigned short  USHORT;
-typedef signed char     INT8;
-typedef signed short    INT16;
-typedef signed int      INT32;
-typedef signed int      DWORD;
-typedef void            VOID;
-typedef unsigned char   BYTE;
-typedef float           FLOAT;
-
-
-typedef unsigned int u32;
-typedef unsigned short u16;
-typedef unsigned char u8;
-typedef unsigned long long u64;
-
-typedef unsigned long long  U64;
-typedef unsigned int        U32;
-typedef unsigned short      U16;
-typedef unsigned char       U8;
-
-typedef signed char         s8;
-typedef signed short        s16;
-typedef signed int          s32;
-typedef signed long long    s64;
-
-typedef signed char         S8;
-typedef signed short        S16;
-typedef signed int          S32;
-typedef signed long long    S64;
-
-
-/*==== EXPORT =====================================================*/
-
-#define MAXIMUM(A,B)       (((A)>(B))?(A):(B))
-#define MINIMUM(A,B)       (((A)<(B))?(A):(B))
-
-#define READ_REGISTER_UINT32(reg) \
-    (*(volatile unsigned int * const)(reg))
-
-#define WRITE_REGISTER_UINT32(reg, val) \
-    (*(volatile unsigned int * const)(reg)) = (val)
-
-#define READ_REGISTER_UINT16(reg) \
-    (*(volatile unsigned short * const)(reg))
-
-#define WRITE_REGISTER_UINT16(reg, val) \
-    (*(volatile unsigned short * const)(reg)) = (val)
-
-#define READ_REGISTER_UINT8(reg) \
-    (*(volatile unsigned char * const)(reg))
-
-#define WRITE_REGISTER_UINT8(reg, val) \
-    (*(volatile unsigned char * const)(reg)) = (val)
-
-#define INREG8(x)           READ_REGISTER_UINT8((unsigned char *)(x))
-#define OUTREG8(x, y)       WRITE_REGISTER_UINT8((unsigned char *)(x), (unsigned char)(y))
-#define SETREG8(x, y)       OUTREG8(x, INREG8(x)|(y))
-#define CLRREG8(x, y)       OUTREG8(x, INREG8(x)&~(y))
-#define MASKREG8(x, y, z)   OUTREG8(x, (INREG8(x)&~(y))|(z))
-
-#define INREG16(x)          READ_REGISTER_UINT16((unsigned short *)(x))
-#define OUTREG16(x, y)      WRITE_REGISTER_UINT16((unsigned short *)(x),(unsigned short)(y))
-#define SETREG16(x, y)      OUTREG16(x, INREG16(x)|(y))
-#define CLRREG16(x, y)      OUTREG16(x, INREG16(x)&~(y))
-#define MASKREG16(x, y, z)  OUTREG16(x, (INREG16(x)&~(y))|(z))
-
-#define INREG32(x)          READ_REGISTER_UINT32((unsigned int *)(x))
-#define OUTREG32(x, y)      WRITE_REGISTER_UINT32((unsigned int *)(x), (unsigned int )(y))
-#define SETREG32(x, y)      OUTREG32(x, INREG32(x)|(y))
-#define CLRREG32(x, y)      OUTREG32(x, INREG32(x)&~(y))
-#define MASKREG32(x, y, z)  OUTREG32(x, (INREG32(x)&~(y))|(z))
-
-
-#define DRV_Reg8(addr)              INREG8(addr)
-#define DRV_WriteReg8(addr, data)   OUTREG8(addr, data)
-#define DRV_SetReg8(addr, data)     SETREG8(addr, data)
-#define DRV_ClrReg8(addr, data)     CLRREG8(addr, data)
-
-#define DRV_Reg16(addr)             INREG16(addr)
-#define DRV_WriteReg16(addr, data)  OUTREG16(addr, data)
-#define DRV_SetReg16(addr, data)    SETREG16(addr, data)
-#define DRV_ClrReg16(addr, data)    CLRREG16(addr, data)
-
-#define DRV_Reg32(addr)             INREG32(addr)
-#define DRV_WriteReg32(addr, data)  OUTREG32(addr, data)
-#define DRV_SetReg32(addr, data)    SETREG32(addr, data)
-#define DRV_ClrReg32(addr, data)    CLRREG32(addr, data)
-
-#endif /* !__MT_TYPEDEFS_H__ */
-
diff --git a/platform/mediatek/mt6797/include/platform/mt_uart.h b/platform/mediatek/mt6797/include/platform/mt_uart.h
deleted file mode 100644
index 6a6d6bb9..00000000
--- a/platform/mediatek/mt6797/include/platform/mt_uart.h
+++ /dev/null
@@ -1,221 +0,0 @@
-/*
- * Copyright (c) 2015 MediaTek Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef ___MTK_UART_H__
-#define ___MTK_UART_H__
-
-#include <platform/mt_reg_base.h>
-
-typedef enum {
-    UART1 = AP_UART0_BASE,
-    UART2 = AP_UART1_BASE,
-    UART3 = AP_UART2_BASE,
-    UART4 = AP_UART3_BASE
-} MTK_UART;
-
-#define UART_SRC_CLK            26000000
-
-#define CONFIG_BAUDRATE         921600
-
-#define UART_BASE(uart)                   (uart)
-#define UART_RBR(uart)                    (UART_BASE(uart)+0x0)  /* Read only */
-#define UART_THR(uart)                    (UART_BASE(uart)+0x0)  /* Write only */
-#define UART_IER(uart)                    (UART_BASE(uart)+0x4)
-#define UART_IIR(uart)                    (UART_BASE(uart)+0x8)  /* Read only */
-#define UART_FCR(uart)                    (UART_BASE(uart)+0x8)  /* Write only */
-#define UART_LCR(uart)                    (UART_BASE(uart)+0xc)
-#define UART_MCR(uart)                    (UART_BASE(uart)+0x10)
-#define UART_LSR(uart)                    (UART_BASE(uart)+0x14)
-#define UART_MSR(uart)                    (UART_BASE(uart)+0x18)
-#define UART_SCR(uart)                    (UART_BASE(uart)+0x1c)
-#define UART_DLL(uart)                    (UART_BASE(uart)+0x0)  /* Only when LCR.DLAB = 1 */
-#define UART_DLH(uart)                    (UART_BASE(uart)+0x4)  /* Only when LCR.DLAB = 1 */
-#define UART_EFR(uart)                    (UART_BASE(uart)+0x8)  /* Only when LCR = 0xbf */
-#define UART_XON1(uart)                   (UART_BASE(uart)+0x10) /* Only when LCR = 0xbf */
-#define UART_XON2(uart)                   (UART_BASE(uart)+0x14) /* Only when LCR = 0xbf */
-#define UART_XOFF1(uart)                  (UART_BASE(uart)+0x18) /* Only when LCR = 0xbf */
-#define UART_XOFF2(uart)                  (UART_BASE(uart)+0x1c) /* Only when LCR = 0xbf */
-#define UART_AUTOBAUD_EN(uart)            (UART_BASE(uart)+0x20)
-#define UART_HIGHSPEED(uart)              (UART_BASE(uart)+0x24)
-#define UART_SAMPLE_COUNT(uart)           (UART_BASE(uart)+0x28)
-#define UART_SAMPLE_POINT(uart)           (UART_BASE(uart)+0x2c)
-#define UART_AUTOBAUD_REG(uart)           (UART_BASE(uart)+0x30)
-#define UART_RATE_FIX_AD(uart)            (UART_BASE(uart)+0x34)
-#define UART_AUTOBAUD_SAMPLE(uart)        (UART_BASE(uart)+0x38)
-#define UART_GUARD(uart)                  (UART_BASE(uart)+0x3c)
-#define UART_ESCAPE_DAT(uart)             (UART_BASE(uart)+0x40)
-#define UART_ESCAPE_EN(uart)              (UART_BASE(uart)+0x44)
-#define UART_SLEEP_EN(uart)               (UART_BASE(uart)+0x48)
-#define UART_VFIFO_EN(uart)               (UART_BASE(uart)+0x4c)
-#define UART_RXTRI_AD(uart)               (UART_BASE(uart)+0x50)
-
-#define UART_FIFO_SIZE              (16)
-#define IO_OFFSET                   (0)
-
-
-/* IER */
-#define UART_IER_ERBFI              (1 << 0) /* RX buffer contains data int. */
-#define UART_IER_ETBEI              (1 << 1) /* TX FIFO threshold trigger int. */
-#define UART_IER_ELSI               (1 << 2) /* BE, FE, PE, or OE int. */
-#define UART_IER_EDSSI              (1 << 3) /* CTS change (DCTS) int. */
-#define UART_IER_XOFFI              (1 << 5)
-#define UART_IER_RTSI               (1 << 6)
-#define UART_IER_CTSI               (1 << 7)
-
-#define UART_IER_ALL_INTS          (UART_IER_ERBFI|UART_IER_ETBEI|UART_IER_ELSI|\
-                                    UART_IER_EDSSI|UART_IER_XOFFI|UART_IER_RTSI|\
-                                    UART_IER_CTSI)
-#define UART_IER_HW_NORMALINTS     (UART_IER_ERBFI|UART_IER_ELSI|UART_IER_EDSSI)
-#define UART_IER_HW_ALLINTS        (UART_IER_ERBFI|UART_IER_ETBEI| \
-                                    UART_IER_ELSI|UART_IER_EDSSI)
-
-/* FCR */
-#define UART_FCR_FIFOE              (1 << 0)
-#define UART_FCR_CLRR               (1 << 1)
-#define UART_FCR_CLRT               (1 << 2)
-#define UART_FCR_DMA1               (1 << 3)
-#define UART_FCR_RXFIFO_1B_TRI      (0 << 6)
-#define UART_FCR_RXFIFO_6B_TRI      (1 << 6)
-#define UART_FCR_RXFIFO_12B_TRI     (2 << 6)
-#define UART_FCR_RXFIFO_RX_TRI      (3 << 6)
-#define UART_FCR_TXFIFO_1B_TRI      (0 << 4)
-#define UART_FCR_TXFIFO_4B_TRI      (1 << 4)
-#define UART_FCR_TXFIFO_8B_TRI      (2 << 4)
-#define UART_FCR_TXFIFO_14B_TRI     (3 << 4)
-
-#define UART_FCR_FIFO_INIT          (UART_FCR_FIFOE|UART_FCR_CLRR|UART_FCR_CLRT)
-#define UART_FCR_NORMAL             (UART_FCR_FIFO_INIT | \
-                                     UART_FCR_TXFIFO_4B_TRI| \
-                                     UART_FCR_RXFIFO_12B_TRI)
-
-/* LCR */
-#define UART_LCR_BREAK              (1 << 6)
-#define UART_LCR_DLAB               (1 << 7)
-
-#define UART_WLS_5                  (0 << 0)
-#define UART_WLS_6                  (1 << 0)
-#define UART_WLS_7                  (2 << 0)
-#define UART_WLS_8                  (3 << 0)
-#define UART_WLS_MASK               (3 << 0)
-
-#define UART_1_STOP                 (0 << 2)
-#define UART_2_STOP                 (1 << 2)
-#define UART_1_5_STOP               (1 << 2)    /* Only when WLS=5 */
-#define UART_STOP_MASK              (1 << 2)
-
-#define UART_NONE_PARITY            (0 << 3)
-#define UART_ODD_PARITY             (0x1 << 3)
-#define UART_EVEN_PARITY            (0x3 << 3)
-#define UART_MARK_PARITY            (0x5 << 3)
-#define UART_SPACE_PARITY           (0x7 << 3)
-#define UART_PARITY_MASK            (0x7 << 3)
-
-/* MCR */
-#define UART_MCR_DTR                (1 << 0)
-#define UART_MCR_RTS                (1 << 1)
-#define UART_MCR_OUT1               (1 << 2)
-#define UART_MCR_OUT2               (1 << 3)
-#define UART_MCR_LOOP               (1 << 4)
-#define UART_MCR_XOFF               (1 << 7)    /* read only */
-#define UART_MCR_NORMAL             (UART_MCR_DTR|UART_MCR_RTS)
-
-/* LSR */
-#define UART_LSR_DR                 (1 << 0)
-#define UART_LSR_OE                 (1 << 1)
-#define UART_LSR_PE                 (1 << 2)
-#define UART_LSR_FE                 (1 << 3)
-#define UART_LSR_BI                 (1 << 4)
-#define UART_LSR_THRE               (1 << 5)
-#define UART_LSR_TEMT               (1 << 6)
-#define UART_LSR_FIFOERR            (1 << 7)
-
-/* MSR */
-#define UART_MSR_DCTS               (1 << 0)
-#define UART_MSR_DDSR               (1 << 1)
-#define UART_MSR_TERI               (1 << 2)
-#define UART_MSR_DDCD               (1 << 3)
-#define UART_MSR_CTS                (1 << 4)
-#define UART_MSR_DSR                (1 << 5)
-#define UART_MSR_RI                 (1 << 6)
-#define UART_MSR_DCD                (1 << 7)
-
-/* EFR */
-#define UART_EFR_EN                 (1 << 4)
-#define UART_EFR_AUTO_RTS           (1 << 6)
-#define UART_EFR_AUTO_CTS           (1 << 7)
-#define UART_EFR_SW_CTRL_MASK       (0xf << 0)
-
-#define UART_EFR_NO_SW_CTRL         (0)
-#define UART_EFR_NO_FLOW_CTRL       (0)
-#define UART_EFR_AUTO_RTSCTS        (UART_EFR_AUTO_RTS|UART_EFR_AUTO_CTS)
-#define UART_EFR_XON1_XOFF1         (0xa) /* TX/RX XON1/XOFF1 flow control */
-#define UART_EFR_XON2_XOFF2         (0x5) /* TX/RX XON2/XOFF2 flow control */
-#define UART_EFR_XON12_XOFF12       (0xf) /* TX/RX XON1,2/XOFF1,2 flow
-control */
-
-#define UART_EFR_XON1_XOFF1_MASK    (0xa)
-#define UART_EFR_XON2_XOFF2_MASK    (0x5)
-
-/* IIR (Read Only) */
-#define UART_IIR_NO_INT_PENDING     (0x01)
-#define UART_IIR_RLS                (0x06) /* Receiver Line Status */
-#define UART_IIR_RDA                (0x04) /* Receive Data Available */
-#define UART_IIR_CTI                (0x0C) /* Character Timeout Indicator */
-#define UART_IIR_THRE               (0x02) /* Transmit Holding Register Empty
-*/
-#define UART_IIR_MS                 (0x00) /* Check Modem Status Register */
-#define UART_IIR_SW_FLOW_CTRL       (0x10) /* Receive XOFF characters */
-#define UART_IIR_HW_FLOW_CTRL       (0x20) /* CTS or RTS Rising Edge */
-#define UART_IIR_FIFO_EN            (0xc0)
-#define UART_IIR_INT_MASK           (0x1f)
-
-/* RateFix */
-#define UART_RATE_FIX               (1 << 0)
-//#define UART_AUTORATE_FIX           (1 << 1)
-//#define UART_FREQ_SEL               (1 << 2)
-#define UART_FREQ_SEL               (1 << 1)
-
-#define UART_RATE_FIX_13M           (1 << 0) /* means UARTclk = APBclk / 4 */
-#define UART_AUTORATE_FIX_13M       (1 << 1)
-#define UART_FREQ_SEL_13M           (1 << 2)
-#define UART_RATE_FIX_ALL_13M       (UART_RATE_FIX_13M|UART_AUTORATE_FIX_13M| \
-                                     UART_FREQ_SEL_13M)
-
-#define UART_RATE_FIX_26M           (0 << 0) /* means UARTclk = APBclk / 2 */
-#define UART_AUTORATE_FIX_26M       (0 << 1)
-#define UART_FREQ_SEL_26M           (0 << 2)
-#define UART_RATE_FIX_ALL_26M       (UART_RATE_FIX_26M|UART_AUTORATE_FIX_26M| \
-                                     UART_FREQ_SEL_26M)
-
-#define UART_RATE_FIX_32M5          (0 << 0)    /* means UARTclk = APBclk / 2 */
-#define UART_FREQ_SEL_32M5          (0 << 1)
-#define UART_RATE_FIX_ALL_32M5      (UART_RATE_FIX_32M5|UART_FREQ_SEL_32M5)
-
-#define UART_RATE_FIX_16M25         (0 << 0)    /* means UARTclk = APBclk / 4 */
-#define UART_FREQ_SEL_16M25         (0 << 1)
-#define UART_RATE_FIX_ALL_16M25     (UART_RATE_FIX_16M25|UART_FREQ_SEL_16M25)
-
-extern void mtk_set_current_uart(MTK_UART uart_base);
-extern int mtk_get_current_uart(void);
-
-#endif /* !___MTK_UART_H__ */
-
diff --git a/platform/mediatek/mt6797/interrupts.c b/platform/mediatek/mt6797/interrupts.c
deleted file mode 100644
index 0ea26ce7..00000000
--- a/platform/mediatek/mt6797/interrupts.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * Copyright (c) 2015 MediaTek Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <arch/arm.h>
-#include <reg.h>
-#include <debug.h>
-#include <kernel/thread.h>
-#include <mt_gic.h>
-#include <platform/mt_typedefs.h>
-#include <platform/mt_reg_base.h>
-#include <platform/mt_gpt.h>
-#include <platform/mt_irq.h>
-
-#define MPIDR_LEVEL_BITS 8
-#define MPIDR_LEVEL_MASK    ((1 << MPIDR_LEVEL_BITS) - 1)
-#define MPIDR_AFFINITY_LEVEL(mpidr, level) \
-        ((mpidr >> (MPIDR_LEVEL_BITS * level)) & MPIDR_LEVEL_MASK)
-
-
-extern enum handler_return lk_scheduler(void);
-extern uint32_t mt_mpidr_read(void);
-
-uint64_t mt_irq_get_affinity(void)
-{
-    uint64_t mpidr, aff = 0;
-
-    mpidr = (uint64_t) mt_mpidr_read();
-
-    aff = (
-              MPIDR_AFFINITY_LEVEL(mpidr, 2) << 16 |
-              MPIDR_AFFINITY_LEVEL(mpidr, 1) << 8  |
-              MPIDR_AFFINITY_LEVEL(mpidr, 0)
-          );
-
-    return aff;
-}
-
-uint32_t mt_interrupt_needed_for_secure(void)
-{
-    return 0;
-}
-
-enum handler_return platform_irq(struct arm_iframe *frame)
-{
-    enum handler_return ret = INT_NO_RESCHEDULE;
-    unsigned int irq = mt_irq_get();
-
-    if (irq == MT_GPT_IRQ_ID)
-        ret = lk_scheduler();
-
-    return ret;
-}
-
-void platform_fiq(struct arm_iframe *frame)
-{
-}
-
diff --git a/platform/mediatek/mt6797/mt_gpt.c b/platform/mediatek/mt6797/mt_gpt.c
deleted file mode 100644
index 84b95134..00000000
--- a/platform/mediatek/mt6797/mt_gpt.c
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * Copyright (c) 2015 MediaTek Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <sys/types.h>
-#include <debug.h>
-#include <err.h>
-#include <reg.h>
-
-#include <platform/mt_typedefs.h>
-#include <platform/mt_reg_base.h>
-#include <platform/mt_gpt.h>
-
-#define AP_PERI_GLOBALCON_PDN0 (PERICFG_BASE+0x10)
-
-static void gpt_power_on(bool bPowerOn)
-{
-    if (!bPowerOn) {
-        DRV_SetReg32(AP_PERI_GLOBALCON_PDN0, 1<<13);
-    } else {
-        DRV_ClrReg32(AP_PERI_GLOBALCON_PDN0, 1<<13);
-    }
-}
-
-static void gpt4_start(void)
-{
-    DRV_WriteReg32(GPT4_CLK_REG, GPT4_SYS_CLK);
-    DRV_WriteReg32(GPT4_CON_REG, GPT4_EN|GPT4_FREERUN);
-}
-
-static void gpt4_stop(void)
-{
-    DRV_WriteReg32(GPT4_CON_REG, 0x0); // disable
-    DRV_WriteReg32(GPT4_CON_REG, 0x2); // clear counter
-}
-
-static void gpt4_init(bool bStart)
-{
-    gpt4_stop();
-
-    if (bStart) {
-        gpt4_start();
-    }
-}
-
-void gpt_init(void)
-{
-    gpt_power_on(TRUE);
-
-    gpt4_init(TRUE);
-}
-
diff --git a/platform/mediatek/mt6797/platform.c b/platform/mediatek/mt6797/platform.c
deleted file mode 100644
index c9309c20..00000000
--- a/platform/mediatek/mt6797/platform.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * Copyright (c) 2015 MediaTek Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <stdlib.h>
-#include <string.h>
-#include <err.h>
-#include <reg.h>
-#include <sys/types.h>
-#include <kernel/vm.h>
-#include <platform.h>
-#include <mt_gic.h>
-#include <dev/uart.h>
-#include <arch/arm.h>
-#include <arch/arm/mmu.h>
-#include <arch/ops.h>
-#include <platform/mt_reg_base.h>
-#include <platform/mt_typedefs.h>
-#include <platform/mt_gpt.h>
-
-#define MTK_WDT_MODE TOPRGU_BASE
-
-struct mmu_initial_mapping mmu_initial_mappings[] = {
-    // XXX needs to be filled in
-
-    /* Note: mapping entry should be 1MB alignment (address and size will be masked to 1MB boundaries in arch/arm/arm/start.S) */
-
-    /* mcusys (peripherals) */
-    {
-        .phys = (uint64_t)0,
-        .virt = (uint32_t)0,
-        .size = 0x40000000,
-        .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
-        .name = "mcusys"
-    },
-    /* ram */
-    {
-        .phys = (uint64_t)0x40000000,
-        .virt = (uint32_t)0x40000000,
-        .size = 0xc0000000,
-        .flags = 0,
-        .name = "ram"
-    },
-
-    /* null entry to terminate the list */
-    { 0 }
-};
-
-static pmm_arena_t arena = {
-    .name = "dram",
-    .base = MEMBASE,
-    .size = MEMSIZE,
-    .flags = PMM_ARENA_FLAG_KMAP,
-};
-
-void platform_init_mmu_mappings(void)
-{
-}
-
-void platform_early_init(void)
-{
-    uart_init_early();
-
-    platform_init_interrupts();
-
-    gpt_init();
-
-    /* disable WDT */
-    DRV_WriteReg32(MTK_WDT_MODE, 0x22000000);
-
-    pmm_add_arena(&arena);
-}
-
-void platform_init(void)
-{
-}
-
diff --git a/platform/mediatek/mt6797/rules.mk b/platform/mediatek/mt6797/rules.mk
deleted file mode 100644
index 0380ff77..00000000
--- a/platform/mediatek/mt6797/rules.mk
+++ /dev/null
@@ -1,26 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-ARCH    := arm
-ARM_CPU := cortex-a7
-CPU     := generic
-WITH_SMP ?= 0
-
-GLOBAL_INCLUDES += \
-	$(LOCAL_DIR)/$(SUB_PLATFORM)/include
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/platform.c \
-	$(LOCAL_DIR)/uart.c \
-	$(LOCAL_DIR)/interrupts.c \
-	$(LOCAL_DIR)/timer.c \
-	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/mt_gpt.c
-
-KERNEL_BASE = $(MEMBASE)
-
-include platform/mediatek/common/rules.mk
-
-include make/module.mk
-
diff --git a/platform/mediatek/mt6797/timer.c b/platform/mediatek/mt6797/timer.c
deleted file mode 100644
index 73d4d319..00000000
--- a/platform/mediatek/mt6797/timer.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- * Copyright (c) 2015 MediaTek Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <sys/types.h>
-#include <debug.h>
-#include <err.h>
-#include <reg.h>
-#include <kernel/thread.h>
-#include <mt_gic.h>
-#include <platform/timer.h>
-#include <platform/mt_typedefs.h>
-#include <platform/mt_reg_base.h>
-#include <platform/mt_gpt.h>
-#include <platform/mt_irq.h>
-
-#define TIMER_TICK_RATE 32768
-
-static volatile lk_time_t ticks = 0;
-static lk_time_t tick_interval;
-static platform_timer_callback time_callback;
-static void *callback_arg;
-
-static enum handler_return timer_irq(void *arg)
-{
-    ticks += tick_interval;
-    return time_callback(callback_arg, ticks);
-}
-
-enum handler_return lk_scheduler(void)
-{
-    static enum handler_return ret;
-
-    /* ack GPT5 irq */
-    DRV_WriteReg32(GPT_IRQACK_REG, 0x10);
-    DRV_WriteReg32(GPT5_CON_REG, GPT_CLEAR);
-    DRV_WriteReg32(GPT5_CON_REG, GPT_DISABLE);
-
-    ret = timer_irq(0);
-
-    /* ack GIC irq */
-    mt_irq_ack(MT_GPT_IRQ_ID);
-
-    /* enable GPT5 */
-    DRV_WriteReg32(GPT5_CON_REG, GPT_ENABLE|GPT_MODE4_ONE_SHOT);
-
-    return ret;
-}
-
-status_t platform_set_periodic_timer(platform_timer_callback callback, void *arg, lk_time_t interval)
-{
-    time_callback = callback;
-    tick_interval = interval;
-    callback_arg  = arg;
-
-    DRV_WriteReg32(GPT_IRQEN_REG, 0);
-    DRV_WriteReg32(GPT_IRQACK_REG, 0x3f);
-
-    mt_irq_set_sens(MT_GPT_IRQ_ID, MT65xx_LEVEL_SENSITIVE);
-    mt_irq_set_polarity(MT_GPT_IRQ_ID, MT65xx_POLARITY_LOW);
-
-    DRV_WriteReg32(GPT5_CON_REG, 0x02);
-    DRV_WriteReg32(GPT_IRQACK_REG, 0x10);
-    DRV_WriteReg32(GPT5_CLK_REG , 0x10);
-
-    DRV_WriteReg32(GPT5_COMPARE_REG, TIMER_TICK_RATE*interval/1000);
-    DRV_WriteReg32(GPT_IRQEN_REG, 0x10);
-
-    mt_irq_unmask(MT_GPT_IRQ_ID);
-
-    DRV_WriteReg32(GPT5_CON_REG, GPT_ENABLE|GPT_MODE4_ONE_SHOT);
-
-    return NO_ERROR;
-}
-
-lk_time_t current_time(void)
-{
-    return ticks;
-}
-
-lk_bigtime_t current_time_hires(void)
-{
-    lk_bigtime_t time;
-
-    time = (lk_bigtime_t)ticks * 1000;
-    return time;
-}
-
diff --git a/platform/mediatek/mt6797/uart.c b/platform/mediatek/mt6797/uart.c
deleted file mode 100644
index 21fe0e87..00000000
--- a/platform/mediatek/mt6797/uart.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * Copyright (c) 2015 MediaTek Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <reg.h>
-#include <dev/uart.h>
-#include <string.h>
-
-#include <platform/mt_typedefs.h>
-#include <platform/mt_reg_base.h>
-#include <platform/mt_uart.h>
-#include <sync_write.h>
-
-// output uart port
-static volatile unsigned int g_uart;
-// output uart baudrate
-static unsigned int g_brg;
-
-static void uart_setbrg(void)
-{
-    unsigned int byte,speed;
-    unsigned int highspeed;
-    unsigned int quot, divisor, remainder;
-    unsigned int uartclk;
-    unsigned short data, high_speed_div, sample_count, sample_point;
-    unsigned int tmp_div;
-
-    speed = g_brg;
-    uartclk = UART_SRC_CLK;
-
-    if (speed <= 115200 ) {
-        highspeed = 0;
-        quot = 16;
-    } else {
-        highspeed = 3;
-        quot = 1;
-    }
-
-    if (highspeed < 3) { /*0~2*/
-        /* Set divisor DLL and DLH  */
-        divisor   =  uartclk / (quot * speed);
-        remainder =  uartclk % (quot * speed);
-
-        if (remainder >= (quot / 2) * speed)
-            divisor += 1;
-
-        mt_reg_sync_writew(highspeed, UART_HIGHSPEED(g_uart));
-        byte = DRV_Reg32(UART_LCR(g_uart));   /* DLAB start */
-        mt_reg_sync_writel((byte | UART_LCR_DLAB), UART_LCR(g_uart));
-        mt_reg_sync_writel((divisor & 0x00ff), UART_DLL(g_uart));
-        mt_reg_sync_writel(((divisor >> 8)&0x00ff), UART_DLH(g_uart));
-        mt_reg_sync_writel(byte, UART_LCR(g_uart));   /* DLAB end */
-    } else {
-        data=(unsigned short)(uartclk/speed);
-        high_speed_div = (data>>8) + 1; // divided by 256
-
-        tmp_div=uartclk/(speed*high_speed_div);
-        divisor =  (unsigned short)tmp_div;
-
-        remainder = (uartclk)%(high_speed_div*speed);
-        /*get (sample_count+1)*/
-        if (remainder >= ((speed)*(high_speed_div))>>1)
-            divisor =  (unsigned short)(tmp_div+1);
-        else
-            divisor =  (unsigned short)tmp_div;
-
-        sample_count=divisor-1;
-
-        /*get the sample point*/
-        sample_point=(sample_count-1)>>1;
-
-        /*configure register*/
-        mt_reg_sync_writel(highspeed, UART_HIGHSPEED(g_uart));
-
-        byte = DRV_Reg32(UART_LCR(g_uart));    /* DLAB start */
-        mt_reg_sync_writel((byte | UART_LCR_DLAB), UART_LCR(g_uart));
-        mt_reg_sync_writel((high_speed_div & 0x00ff), UART_DLL(g_uart));
-        mt_reg_sync_writel(((high_speed_div >> 8)&0x00ff), UART_DLH(g_uart));
-        mt_reg_sync_writel(sample_count, UART_SAMPLE_COUNT(g_uart));
-        mt_reg_sync_writel(sample_point, UART_SAMPLE_POINT(g_uart));
-        mt_reg_sync_writel(byte, UART_LCR(g_uart));   /* DLAB end */
-    }
-}
-
-void mtk_set_current_uart(MTK_UART uart_base)
-{
-    g_uart = uart_base;
-}
-
-int mtk_get_current_uart(void)
-{
-    return g_uart;
-}
-
-void uart_init_early(void)
-{
-    mtk_set_current_uart(UART1);
-
-    DRV_SetReg32(UART_FCR(g_uart), UART_FCR_FIFO_INIT); /* clear fifo */
-    mt_reg_sync_writew(UART_NONE_PARITY | UART_WLS_8 | UART_1_STOP, UART_LCR(g_uart));
-    g_brg = CONFIG_BAUDRATE;
-    uart_setbrg();
-}
-
-void uart_init(void)
-{
-}
-
-void uart_flush_tx(int port)
-{
-}
-
-void uart_flush_rx(int port)
-{
-}
-
-void uart_init_port(int port, uint baud)
-{
-}
-
-int uart_putc(int port, char c)
-{
-    while (!(DRV_Reg32(UART_LSR(port)) & UART_LSR_THRE));
-
-    if (c == '\n')
-        mt_reg_sync_writel((unsigned int)'\r', UART_THR(port));
-
-    mt_reg_sync_writel((unsigned int)c, UART_THR(port));
-
-    return 0;
-}
-
-int uart_getc(int port, bool wait)
-{
-    while (!(DRV_Reg32(UART_LSR(port)) & UART_LSR_DR));
-    return (int)DRV_Reg32(UART_RBR(port));
-}
-
diff --git a/platform/mediatek/rules.mk b/platform/mediatek/rules.mk
deleted file mode 100644
index c12cbab7..00000000
--- a/platform/mediatek/rules.mk
+++ /dev/null
@@ -1,6 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-LINKER_SCRIPT += $(BUILDDIR)/system-onesegment.ld
-
-include $(LOCAL_DIR)/$(SUB_PLATFORM)/rules.mk
-
diff --git a/platform/microblaze/intc.c b/platform/microblaze/intc.c
deleted file mode 100644
index f70b9a70..00000000
--- a/platform/microblaze/intc.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <err.h>
-#include <trace.h>
-#include <lk/init.h>
-#include <kernel/thread.h>
-#include <platform.h>
-#include <platform/interrupts.h>
-#include <platform/debug.h>
-#include <sys/types.h>
-#include <target/microblaze-config.h>
-
-#define LOCAL_TRACE 0
-
-#define R_ISR       0
-#define R_IPR       1
-#define R_IER       2
-#define R_IAR       3
-#define R_SIE       4
-#define R_CIE       5
-#define R_IVR       6
-#define R_MER       7
-#define R_MAX       8
-
-#define INTC_REG(reg) (*REG32(INTC_BASEADDR + (reg) * 4))
-
-static spin_lock_t lock;
-
-struct int_handler_struct {
-    int_handler handler;
-    void *arg;
-};
-
-static struct int_handler_struct int_handler_table[MAX_INT];
-
-void register_int_handler(unsigned int vector, int_handler handler, void *arg)
-{
-    LTRACEF("vector %u, handler %p, arg %p\n", vector, handler, arg);
-
-    if (vector >= MAX_INT)
-        return;
-
-    spin_lock_saved_state_t state;
-    spin_lock_irqsave(&lock, state);
-
-    int_handler_table[vector].handler = handler;
-    int_handler_table[vector].arg = arg;
-
-    spin_unlock_irqrestore(&lock, state);
-}
-
-status_t mask_interrupt(unsigned int vector)
-{
-    LTRACEF("vector %u\n", vector);
-
-    INTC_REG(R_CIE) = 1 << vector;
-
-    return NO_ERROR;
-}
-
-status_t unmask_interrupt(unsigned int vector)
-{
-    LTRACEF("vector %u\n", vector);
-
-    INTC_REG(R_SIE) = 1 << vector;
-
-    return NO_ERROR;
-}
-
-enum handler_return platform_irq_handler(void)
-{
-    enum handler_return ret = INT_NO_RESCHEDULE;
-
-    uint irq = INTC_REG(R_IVR);
-    LTRACEF("irq %u, IPR 0x%x, ISR 0x%x\n", irq, INTC_REG(R_IPR), INTC_REG(R_ISR));
-
-    if (irq < MAX_INT && int_handler_table[irq].handler)
-        ret = int_handler_table[irq].handler(int_handler_table[irq].arg);
-
-    INTC_REG(R_IAR) = 1 << irq;
-
-    return ret;
-}
-
-static void intc_init(uint level)
-{
-    LTRACE;
-
-    INTC_REG(R_CIE) = 0xffffffff;
-    INTC_REG(R_MER) = 0x3;
-}
-
-LK_INIT_HOOK(intc, intc_init, LK_INIT_LEVEL_PLATFORM_EARLY);
-
diff --git a/platform/microblaze/platform.c b/platform/microblaze/platform.c
deleted file mode 100644
index a4adb8fe..00000000
--- a/platform/microblaze/platform.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <kernel/thread.h>
-#include <platform.h>
-#include <platform/interrupts.h>
-#include <platform/debug.h>
-#include <platform/timer.h>
-#include <sys/types.h>
-#include <target/microblaze-config.h>
-
-void uartlite_putc(char c);
-int uartlite_getc(bool wait);
-
-void platform_dputc(char c)
-{
-    if (c == '\n')
-        uartlite_putc('\r');
-    uartlite_putc(c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    for (;;) {
-        int ret = uartlite_getc(wait);
-        if (ret >= 0) {
-            *c = ret;
-            return 0;
-        }
-
-        if (!wait)
-            return -1;
-
-        thread_yield();
-    }
-}
-
-
diff --git a/platform/microblaze/rules.mk b/platform/microblaze/rules.mk
deleted file mode 100644
index 3d014e97..00000000
--- a/platform/microblaze/rules.mk
+++ /dev/null
@@ -1,21 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-ARCH := microblaze
-
-MODULE_DEPS += \
-    lib/cbuf
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/intc.c \
-	$(LOCAL_DIR)/platform.c \
-	$(LOCAL_DIR)/timer.c \
-	$(LOCAL_DIR)/uartlite.c
-
-MEMBASE ?= 0x0
-MEMSIZE ?= 0x20000	# 128KB
-
-MODULE_DEPS += \
-
-include make/module.mk
diff --git a/platform/microblaze/timer.c b/platform/microblaze/timer.c
deleted file mode 100644
index c1ee0852..00000000
--- a/platform/microblaze/timer.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <trace.h>
-#include <err.h>
-#include <lk/init.h>
-#include <kernel/thread.h>
-#include <platform.h>
-#include <platform/timer.h>
-#include <platform/interrupts.h>
-#include <platform/debug.h>
-#include <sys/types.h>
-#include <target/microblaze-config.h>
-
-#define LOCAL_TRACE 0
-
-#define R_TCSR     0
-#define R_TLR      1
-#define R_TCR      2
-#define R_MAX      4
-
-#define TCSR_MDT        (1<<0)
-#define TCSR_UDT        (1<<1)
-#define TCSR_GENT       (1<<2)
-#define TCSR_CAPT       (1<<3)
-#define TCSR_ARHT       (1<<4)
-#define TCSR_LOAD       (1<<5)
-#define TCSR_ENIT       (1<<6)
-#define TCSR_ENT        (1<<7)
-#define TCSR_TINT       (1<<8)
-#define TCSR_PWMA       (1<<9)
-#define TCSR_ENALL      (1<<10)
-
-#define TIMER_REG(reg) (*REG32(TIMER_BASEADDR + (reg) * 4))
-
-static platform_timer_callback timer_cb;
-static void *timer_arg;
-
-static uint32_t ticks = 0;
-
-status_t platform_set_periodic_timer(platform_timer_callback callback, void *arg, lk_time_t interval)
-{
-    LTRACEF("cb %p, arg %p, interval %u\n", callback, arg, interval);
-
-    uint32_t count = ((uint64_t)TIMER_RATE * interval / 1000);
-
-    LTRACEF("count 0x%x\n", count);
-
-    timer_cb = callback;
-    timer_arg = arg;
-
-    TIMER_REG(R_TCSR) = 0;
-    TIMER_REG(R_TLR) = count;
-    TIMER_REG(R_TCSR) = TCSR_ENIT | TCSR_UDT | TCSR_ARHT | TCSR_ENT;
-
-    return NO_ERROR;
-}
-
-lk_bigtime_t current_time_hires(void)
-{
-    return (lk_bigtime_t)ticks * 10000;
-}
-
-lk_time_t current_time(void)
-{
-    return (lk_time_t)ticks * 10;
-}
-
-enum handler_return timer_irq(void *arg)
-{
-    LTRACE;
-
-    TIMER_REG(R_TCSR) |= TCSR_TINT;
-
-    ticks += 1;
-
-    enum handler_return ret = timer_cb(timer_arg, ticks * 10);
-
-    return ret;
-}
-
-static void timer_init(uint level)
-{
-    LTRACE;
-
-    register_int_handler(TIMER_IRQ, timer_irq, NULL);
-    unmask_interrupt(TIMER_IRQ);
-}
-
-LK_INIT_HOOK(timer, timer_init, LK_INIT_LEVEL_PLATFORM_EARLY + 1);
-
-
diff --git a/platform/microblaze/uartlite.c b/platform/microblaze/uartlite.c
deleted file mode 100644
index e63bb607..00000000
--- a/platform/microblaze/uartlite.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <trace.h>
-#include <lib/cbuf.h>
-#include <lk/init.h>
-#include <kernel/thread.h>
-#include <platform.h>
-#include <platform/interrupts.h>
-#include <sys/types.h>
-#include <target/microblaze-config.h>
-
-#define LOCAL_TRACE 0
-
-#define R_RX            0
-#define R_TX            1
-#define R_STATUS        2
-#define R_CTRL          3
-#define R_MAX           4
-
-#define STATUS_RXVALID    0x01
-#define STATUS_RXFULL     0x02
-#define STATUS_TXEMPTY    0x04
-#define STATUS_TXFULL     0x08
-#define STATUS_IE         0x10
-#define STATUS_OVERRUN    0x20
-#define STATUS_FRAME      0x40
-#define STATUS_PARITY     0x80
-
-#define CONTROL_RST_TX    0x01
-#define CONTROL_RST_RX    0x02
-#define CONTROL_IE        0x10
-
-#define UART_REG(reg) (*REG32(UARTLITE_BASEADDR + (reg) * 4))
-
-#define RXBUF_SIZE 128
-static cbuf_t uart_rx_buf;
-
-void uartlite_putc(char c)
-{
-    while (UART_REG(R_STATUS) & STATUS_TXFULL)
-        ;
-    UART_REG(R_TX) = c;
-}
-
-int uartlite_getc(bool wait)
-{
-#if 0
-    char c;
-    if (cbuf_read_char(&uart_rx_buf, &c, wait) == 1)
-        return c;
-#else
-    do {
-        if (UART_REG(R_STATUS) & STATUS_RXVALID) {
-            char c = UART_REG(R_RX);
-            return c;
-        }
-    } while (wait);
-#endif
-
-    return -1;
-}
-
-enum handler_return uartlite_irq(void *arg)
-{
-    bool resched = false;
-
-    /* while receive fifo not empty, read a char */
-    while (UART_REG(R_STATUS) & STATUS_RXVALID) {
-        char c = UART_REG(R_RX);
-        cbuf_write_char(&uart_rx_buf, c, false);
-
-        resched = true;
-    }
-
-    return resched ? INT_RESCHEDULE : INT_NO_RESCHEDULE;
-}
-
-static void uartlite_init(uint level)
-{
-    TRACE;
-
-    //UART_REG(R_CTRL) = CONTROL_RST_TX | CONTROL_RST_RX;
-//    UART_REG(R_CTRL) |= CONTROL_IE;
-
-    cbuf_initialize(&uart_rx_buf, RXBUF_SIZE);
-
-//    register_int_handler(UARTLITE_IRQ, uartlite_irq, NULL);
-//    unmask_interrupt(UARTLITE_IRQ);
-}
-
-LK_INIT_HOOK(uartlite, uartlite_init, LK_INIT_LEVEL_PLATFORM);
-
diff --git a/platform/nrf51xxx/debug.c b/platform/nrf51xxx/debug.c
deleted file mode 100644
index 0e980a83..00000000
--- a/platform/nrf51xxx/debug.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <debug.h>
-#include <stdio.h>
-#include <kernel/thread.h>
-#include <dev/uart.h>
-#include <arch/ops.h>
-#include <arch/arm/cm.h>
-#include <platform/debug.h>
-#include <target/debugconfig.h>
-
-
-
-void nrf51_debug_early_init(void)
-{
-    uart_init_early();
-}
-
-/* later in the init process */
-void nrf51_debug_init(void)
-{
-    uart_init();
-}
-
-
-
-void platform_dputc(char c)
-{
-    if (c == '\n')
-        uart_putc(DEBUG_UART, '\r');
-    uart_putc(DEBUG_UART, c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    int ret = uart_getc(DEBUG_UART, wait);
-    if (ret == -1)
-        return -1;
-    *c = ret;
-    return 0;
-}
-
diff --git a/platform/nrf51xxx/gpio.c b/platform/nrf51xxx/gpio.c
deleted file mode 100644
index dfe41a9b..00000000
--- a/platform/nrf51xxx/gpio.c
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Copyright (c) 2015 Eric Holland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <assert.h>
-#include <dev/gpio.h>
-#include <platform/nrf51.h>
-#include <platform/gpio.h>
-
-int gpio_config(unsigned nr, unsigned flags)
-{
-    DEBUG_ASSERT(nr <= NRF_MAX_PIN_NUMBER);
-
-    unsigned init;
-
-    if (flags & GPIO_OUTPUT) {
-
-        NRF_GPIO->PIN_CNF[nr] = GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos     | \
-                                GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos  | \
-                                GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos   | \
-                                GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos;
-    } else { // GPIO_INPUT
-        if (flags & GPIO_PULLUP) {
-            init    =   GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos;
-        } else if (flags & GPIO_PULLDOWN) {
-            init    =   GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos;
-        } else {
-            init    =   GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos;
-        }
-        NRF_GPIO->PIN_CNF[nr] = GPIO_PIN_CNF_DIR_Input      <<  GPIO_PIN_CNF_DIR_Pos    | \
-                                GPIO_PIN_CNF_INPUT_Connect  <<  GPIO_PIN_CNF_INPUT_Pos  | \
-                                init;
-    }
-    return 0;
-}
-
-void gpio_set(unsigned nr, unsigned on)
-{
-    DEBUG_ASSERT(nr <= NRF_MAX_PIN_NUMBER);
-
-    if (on > 0) {
-        NRF_GPIO->OUTSET = 1 << nr;
-    } else {
-        NRF_GPIO->OUTCLR = 1 << nr;
-    }
-}
-
-int gpio_get(unsigned nr)
-{
-    DEBUG_ASSERT( nr <= NRF_MAX_PIN_NUMBER );
-
-    if ( NRF_GPIO->IN & ( 1 << nr) ) {
-        return 1;
-    } else {
-        return 0;
-    }
-}
-
diff --git a/platform/nrf51xxx/include/platform/gpio.h b/platform/nrf51xxx/include/platform/gpio.h
deleted file mode 100644
index f26d2988..00000000
--- a/platform/nrf51xxx/include/platform/gpio.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (c) 2015 Eric Holland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __PLATFORM_NRF51_GPIO_H
-#define __PLATFORM_NRF51_GPIO_H
-
-#define NRF_MAX_PIN_NUMBER 31
-
-#endif
diff --git a/platform/nrf51xxx/include/platform/nrf51.h b/platform/nrf51xxx/include/platform/nrf51.h
deleted file mode 100644
index 3377e55a..00000000
--- a/platform/nrf51xxx/include/platform/nrf51.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (c) 2015 Eric Holland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_NRF51_H
-#define __PLATFORM_NRF51_H
-
-#include <platform/nrf518xx.h>
-
-void nrf51_debug_early_init(void);
-void nrf51_debug_init(void);
-void nrf51_timer_early_init(void);
-void nrf51_timer_init(void);
-void nrf51_gpio_early_init(void);
-void nrf51_flash_nor_early_init(void);
-void nrf51_flash_nor_init(void);
-
-#endif
-
diff --git a/platform/nrf51xxx/include/platform/platform_cm.h b/platform/nrf51xxx/include/platform/platform_cm.h
deleted file mode 100644
index 75e1bcec..00000000
--- a/platform/nrf51xxx/include/platform/platform_cm.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_CM_H
-#define __PLATFORM_CM_H
-
-#include <platform/nrf518xx.h>
-
-#endif
-
diff --git a/platform/nrf51xxx/init.c b/platform/nrf51xxx/init.c
deleted file mode 100644
index 7b53fbff..00000000
--- a/platform/nrf51xxx/init.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Copyright (c) 2012-2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <debug.h>
-#include <arch/arm/cm.h>
-#include <dev/uart.h>
-#include <platform.h>
-#include <platform/nrf51.h>
-#include <platform/system_nrf51.h>
-
-
-
-void platform_early_init(void)
-{
-    // Crank up the clock before initing timers.
-    SystemInit();
-    arm_cm_systick_init(32768);
-}
-
-void platform_init(void)
-{
-    dprintf(SPEW, "Nordic nrf51xxx platform for lk...\n");
-    dprintf(SPEW, "\tFlash: %d pages of %d bytes each (%dk bytes total)\n", \
-            NRF_FICR->CODESIZE, NRF_FICR->CODEPAGESIZE, \
-            (NRF_FICR->CODESIZE * NRF_FICR->CODEPAGESIZE)>>10);
-    dprintf(SPEW, "\tRAM: %d blocks of %d bytes each (%dk bytes total)\n", \
-            NRF_FICR->NUMRAMBLOCK, NRF_FICR->SIZERAMBLOCKS, \
-            (NRF_FICR->NUMRAMBLOCK * NRF_FICR->SIZERAMBLOCKS)>>10);
-    dprintf(SPEW, "\tRadio MAC address  %02x:%02x:%02x:%02x:%02x:%02x\n", \
-            (NRF_FICR->DEVICEADDR[1] >> 8) & 0xFF, \
-            (NRF_FICR->DEVICEADDR[1]) & 0xFF, \
-            (NRF_FICR->DEVICEADDR[0] >> 24) & 0xFF, \
-            (NRF_FICR->DEVICEADDR[0] >> 16) & 0xFF, \
-            (NRF_FICR->DEVICEADDR[0] >>  8) & 0xFF, \
-            (NRF_FICR->DEVICEADDR[0] >>  0) & 0xFF);
-    dprintf(SPEW, "\tHWID: 0x%04x\n",NRF_FICR->CONFIGID & 0x0000ffff);
-
-}
diff --git a/platform/nrf51xxx/rules.mk b/platform/nrf51xxx/rules.mk
deleted file mode 100644
index 9722bb02..00000000
--- a/platform/nrf51xxx/rules.mk
+++ /dev/null
@@ -1,59 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-# ROMBASE, MEMBASE, and MEMSIZE are required for the linker script
-ROMBASE := 0x0
-MEMBASE := 0x20000000
-# can be overridden by target
-
-ARCH := arm
-ARM_CPU := cortex-m0
-
-ifeq ($(NRF51_CHIP),nrf51822-qfaa)
-GLOBAL_DEFINES +=
-MEMSIZE ?= 16384
-endif
-ifeq ($(NRF51_CHIP),nrf51822-ceaa)
-GLOBAL_DEFINES +=
-MEMSIZE ?= 16384
-endif
-ifeq ($(NRF51_CHIP),nrf51822-qfab)
-GLOBAL_DEFINES +=
-MEMSIZE ?= 16384
-endif
-ifeq ($(NRF51_CHIP),nrf51822-cdab)
-GLOBAL_DEFINES +=
-MEMSIZE ?= 16384
-endif
-ifeq ($(NRF51_CHIP),nrf51822-qfac)
-GLOBAL_DEFINES +=
-MEMSIZE ?= 32768
-endif
-ifeq ($(NRF51_CHIP),nrf51822-cfac)
-GLOBAL_DEFINES +=
-MEMSIZE ?= 32768
-endif
-
-GLOBAL_INCLUDES += $(LOCAL_DIR)
-
-GLOBAL_DEFINES += \
-	MEMSIZE=$(MEMSIZE)
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/init.c \
-	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/uart.c \
-	$(LOCAL_DIR)/vectab.c \
-	$(LOCAL_DIR)/gpio.c \
-    $(LOCAL_DIR)/timer.c \
-
-
-LINKER_SCRIPT += \
-	$(BUILDDIR)/system-twosegment.ld
-
-MODULE_DEPS += \
-	platform/nrf51 \
-	lib/cbuf
-
-include make/module.mk
diff --git a/platform/nrf51xxx/timer.c b/platform/nrf51xxx/timer.c
deleted file mode 100644
index 4946ebd3..00000000
--- a/platform/nrf51xxx/timer.c
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * Copyright (c) 2015 Eric Holland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <debug.h>
-#include <trace.h>
-#include <arch/arm/cm.h>
-#include <platform.h>
-#include <platform/nrf51.h>
-#include <platform/system_nrf51.h>
-#include <platform/timer.h>
-#include <sys/types.h>
-
-
-static volatile uint64_t ticks;
-static uint32_t tick_rate = 0;
-static uint32_t tick_rate_mhz = 0;
-static lk_time_t tick_interval_ms;
-
-static platform_timer_callback cb;
-static void *cb_args;
-
-typedef enum handler_return (*platform_timer_callback)(void *arg, lk_time_t now);
-
-status_t platform_set_periodic_timer(platform_timer_callback callback, void *arg, lk_time_t interval)
-{
-
-    cb = callback;
-    cb_args = arg;
-
-    tick_interval_ms = interval;
-
-    uint32_t ticks = tick_rate / ( 1000 / interval );
-
-    NRF_CLOCK->LFCLKSRC =  CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos;
-    NRF_CLOCK->TASKS_LFCLKSTART = 1;
-
-    NRF_RTC1->PRESCALER = ticks;
-    NRF_RTC1->INTENSET  = RTC_INTENSET_TICK_Enabled << RTC_INTENSET_TICK_Pos;
-
-    NRF_RTC1->EVENTS_TICK = 0;
-    NRF_RTC1->TASKS_START = 1;
-    NVIC_EnableIRQ(RTC1_IRQn);
-
-    return NO_ERROR;
-}
-
-lk_time_t current_time(void)
-{
-    uint64_t t;
-
-    do {
-        t = ticks;
-    } while (ticks != t);
-
-    return t * tick_interval_ms;
-}
-
-lk_bigtime_t current_time_hires(void)
-{
-    return current_time() * 1000;
-}
-
-void nrf51_RTC1_IRQ(void)
-{
-    ticks++;
-    arm_cm_irq_entry();
-
-    NRF_RTC1->EVENTS_TICK = 0;
-
-    bool resched = false;
-    if (cb) {
-        lk_time_t now = current_time();
-        if (cb(cb_args, now) == INT_RESCHEDULE)
-            resched = true;
-    }
-    arm_cm_irq_exit(resched);
-}
-
-void arm_cm_systick_init(uint32_t mhz)
-{
-    tick_rate = mhz;
-    tick_rate_mhz = mhz / 1000000;
-}
-
diff --git a/platform/nrf51xxx/uart.c b/platform/nrf51xxx/uart.c
deleted file mode 100644
index 8c8953ba..00000000
--- a/platform/nrf51xxx/uart.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * Copyright (c) 2015 Eric Holland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <debug.h>
-#include <stdio.h>
-#include <assert.h>
-#include <err.h>
-#include <lib/cbuf.h>
-#include <arch/arm/cm.h>
-#include <arch/ops.h>
-#include <dev/uart.h>
-#include <dev/gpio.h>
-#include <kernel/thread.h>
-#include <platform/debug.h>
-#include <platform/gpio.h>
-#include <target/debugconfig.h>
-#include <target/gpioconfig.h>
-
-#define RXBUF_SIZE 16
-
-//cbuf_t uart0_rx_buf;
-
-
-
-void uart_init_early(void)
-{
-#ifdef ENABLE_UART0
-
-#ifdef  UART0_TX_PIN
-    gpio_config(UART0_TX_PIN,GPIO_OUTPUT);
-    NRF_UART0->PSELTXD =   UART0_TX_PIN;
-#endif
-#ifdef  UART0_RX_PIN
-    gpio_config(UART0_RX_PIN,GPIO_INPUT);
-    NRF_UART0->PSELRXD =   UART0_RX_PIN;
-#endif
-
-    NRF_UART0->BAUDRATE =   UART_BAUDRATE_BAUDRATE_Baud115200   <<  UART_BAUDRATE_BAUDRATE_Pos;
-    NRF_UART0->CONFIG   =   UART_CONFIG_HWFC_Disabled << UART_CONFIG_HWFC_Pos | \
-                            UART_CONFIG_PARITY_Excluded << UART_CONFIG_PARITY_Pos;
-    NVIC_DisableIRQ(UART0_IRQn);
-    NRF_UART0->ENABLE   =   UART_ENABLE_ENABLE_Enabled << UART_ENABLE_ENABLE_Pos;
-    NRF_UART0->TXD      = 'E';
-    NRF_UART0->TASKS_STARTTX=1;
-    NRF_UART0->TASKS_STARTRX=1;
-#endif //ENABLE_UART0
-}
-
-void uart_init(void)
-{
-#ifdef ENABLE_UART0
-//    cbuf_initialize(&uart0_rx_buf, RXBUF_SIZE);
-//    NRF_UART0->INTENSET = UART_INTENSET_RXDRDY_Enabled << UART_INTENSET_RXDRDY_Pos;
-    NRF_UART0->EVENTS_RXDRDY = 0;
-//    NVIC_EnableIRQ(UART0_IRQn);
-    char c = NRF_UART0->RXD;
-    (void)c;
-#endif //ENABLE_UART0
-}
-
-void nrf51_UART0_IRQ(void)
-{
-//  char c;
-    arm_cm_irq_entry();
-    /*
-        bool resched = false;
-        while ( NRF_UART0->EVENTS_RXDRDY > 0 ) {
-            NRF_UART0->EVENTS_RXDRDY = 0;
-            c = NRF_UART0->RXD;
-            if (!cbuf_space_avail(&uart0_rx_buf)) {
-                break;
-            }
-            cbuf_write_char(&uart0_rx_buf, c, false);
-            resched = true;
-        }
-    */
-    arm_cm_irq_exit(false);
-}
-
-int uart_putc(int port, char c)
-{
-    while (NRF_UART0->EVENTS_TXDRDY == 0);
-    NRF_UART0->EVENTS_TXDRDY = 0;
-    NRF_UART0->TXD = c;
-    return 1;
-}
-
-int uart_getc(int port, bool wait)
-{
-    do {
-        if (NRF_UART0->EVENTS_RXDRDY > 0) {
-            NRF_UART0->EVENTS_RXDRDY=0;
-            return NRF_UART0->RXD;
-        }
-    } while (wait);
-    return -1;
-}
-
-void uart_flush_tx(int port) {}
-
-void uart_flush_rx(int port) {}
-
-void uart_init_port(int port, uint baud)
-{
-    // TODO - later
-    PANIC_UNIMPLEMENTED;
-}
diff --git a/platform/nrf51xxx/vectab.c b/platform/nrf51xxx/vectab.c
deleted file mode 100644
index b6d94e80..00000000
--- a/platform/nrf51xxx/vectab.c
+++ /dev/null
@@ -1,108 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <compiler.h>
-#include <arch/arm/cm.h>
-#include <lib/cbuf.h>
-#include <platform/nrf51.h>
-#include <target/debugconfig.h>
-
-/* un-overridden irq handler */
-void nrf51_dummy_irq(void)
-{
-    arm_cm_irq_entry();
-    panic("unhandled irq\n");
-}
-
-/* a list of default handlers that are simply aliases to the dummy handler */
-#define DEFAULT_HANDLER(x) \
-void nrf51_##x(void) __WEAK_ALIAS("nrf51_dummy_irq");
-
-DEFAULT_HANDLER(POWER_CLOCK_IRQ);
-DEFAULT_HANDLER(RADIO_IRQ);
-DEFAULT_HANDLER(UART0_IRQ);
-DEFAULT_HANDLER(SPI0_TWI0_IRQ);
-DEFAULT_HANDLER(SPI1_TWI1_IRQ);
-
-DEFAULT_HANDLER(RESERVED_IRQ);
-DEFAULT_HANDLER(GPIOTE_IRQ);
-DEFAULT_HANDLER(ADC_IRQ);
-DEFAULT_HANDLER(TIMER0_IRQ);
-DEFAULT_HANDLER(TIMER1_IRQ);
-DEFAULT_HANDLER(TIMER2_IRQ);
-
-DEFAULT_HANDLER(RTC0_IRQ);
-DEFAULT_HANDLER(TEMP_IRQ);
-DEFAULT_HANDLER(RNG_IRQ);
-DEFAULT_HANDLER(ECB_IRQ);
-DEFAULT_HANDLER(CCM_AAR_IRQ);
-
-DEFAULT_HANDLER(WDT_IRQ);
-DEFAULT_HANDLER(RTC1_IRQ);
-DEFAULT_HANDLER(QDEC_IRQ);
-DEFAULT_HANDLER(LPCOMP_IRQ);
-DEFAULT_HANDLER(SWI0_IRQ);
-
-DEFAULT_HANDLER(SWI1_IRQ);
-DEFAULT_HANDLER(SWI2_IRQ);
-DEFAULT_HANDLER(SWI3_IRQ);
-DEFAULT_HANDLER(SWI4_IRQ);
-DEFAULT_HANDLER(SWI5_IRQ);
-
-
-#define VECTAB_ENTRY(x) [x##n] = nrf51_##x
-
-/* appended to the end of the main vector table */
-const void *const __SECTION(".text.boot.vectab2") vectab2[] = {
-
-    VECTAB_ENTRY(POWER_CLOCK_IRQ),
-    VECTAB_ENTRY(RADIO_IRQ),
-    VECTAB_ENTRY(UART0_IRQ),
-    VECTAB_ENTRY(SPI0_TWI0_IRQ),
-    VECTAB_ENTRY(SPI1_TWI1_IRQ),
-    VECTAB_ENTRY(RESERVED_IRQ),
-    VECTAB_ENTRY(GPIOTE_IRQ),
-    VECTAB_ENTRY(ADC_IRQ),
-    VECTAB_ENTRY(TIMER0_IRQ),
-    VECTAB_ENTRY(TIMER1_IRQ),
-    VECTAB_ENTRY(TIMER2_IRQ),
-
-    VECTAB_ENTRY(RTC0_IRQ),
-    VECTAB_ENTRY(TEMP_IRQ),
-    VECTAB_ENTRY(RNG_IRQ),
-    VECTAB_ENTRY(ECB_IRQ),
-    VECTAB_ENTRY(CCM_AAR_IRQ),
-
-    VECTAB_ENTRY(WDT_IRQ),
-    VECTAB_ENTRY(RTC1_IRQ),
-    VECTAB_ENTRY(QDEC_IRQ),
-    VECTAB_ENTRY(LPCOMP_IRQ),
-    VECTAB_ENTRY(SWI0_IRQ),
-
-    VECTAB_ENTRY(SWI1_IRQ),
-    VECTAB_ENTRY(SWI2_IRQ),
-    VECTAB_ENTRY(SWI3_IRQ),
-    VECTAB_ENTRY(SWI4_IRQ),
-    VECTAB_ENTRY(SWI5_IRQ),
-};
-
diff --git a/platform/nrf52xxx/debug.c b/platform/nrf52xxx/debug.c
deleted file mode 100644
index da443746..00000000
--- a/platform/nrf52xxx/debug.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * Copyright (c) 2016 Eric Holland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <debug.h>
-#include <stdio.h>
-#include <kernel/thread.h>
-#include <dev/uart.h>
-#include <arch/ops.h>
-#include <arch/arm/cm.h>
-#include <platform/debug.h>
-#include <target/debugconfig.h>
-
-
-
-void nrf52_debug_early_init(void)
-{
-    uart_init_early();
-}
-
-/* later in the init process */
-void nrf52_debug_init(void)
-{
-    uart_init();
-}
-
-
-
-void platform_dputc(char c)
-{
-    if (c == '\n')
-        uart_putc(DEBUG_UART, '\r');
-    uart_putc(DEBUG_UART, c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    int ret = uart_getc(DEBUG_UART, wait);
-    if (ret == -1)
-        return -1;
-    *c = ret;
-    return 0;
-}
-
diff --git a/platform/nrf52xxx/gpio.c b/platform/nrf52xxx/gpio.c
deleted file mode 100644
index 55a6e2ee..00000000
--- a/platform/nrf52xxx/gpio.c
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Copyright (c) 2016 Eric Holland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <assert.h>
-#include <dev/gpio.h>
-#include <platform/nrf52.h>
-#include <platform/gpio.h>
-
-int gpio_config(unsigned nr, unsigned flags)
-{
-    DEBUG_ASSERT(nr <= NRF_MAX_PIN_NUMBER);
-
-    unsigned init;
-
-    if (flags & GPIO_OUTPUT) {
-
-        NRF_P0->PIN_CNF[nr] = GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos     | \
-                                GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos  | \
-                                GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos   | \
-                                GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos;
-    } else { // GPIO_INPUT
-        if (flags & GPIO_PULLUP) {
-            init    =   GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos;
-        } else if (flags & GPIO_PULLDOWN) {
-            init    =   GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos;
-        } else {
-            init    =   GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos;
-        }
-        NRF_P0->PIN_CNF[nr] = GPIO_PIN_CNF_DIR_Input      <<  GPIO_PIN_CNF_DIR_Pos    | \
-                                GPIO_PIN_CNF_INPUT_Connect  <<  GPIO_PIN_CNF_INPUT_Pos  | \
-                                init;
-    }
-    return 0;
-}
-
-void gpio_set(unsigned nr, unsigned on)
-{
-    DEBUG_ASSERT(nr <= NRF_MAX_PIN_NUMBER);
-
-    if (on > 0) {
-        NRF_P0->OUTSET = 1 << nr;
-    } else {
-        NRF_P0->OUTCLR = 1 << nr;
-    }
-}
-
-int gpio_get(unsigned nr)
-{
-    DEBUG_ASSERT( nr <= NRF_MAX_PIN_NUMBER );
-
-    if ( NRF_P0->IN & ( 1 << nr) ) {
-        return 1;
-    } else {
-        return 0;
-    }
-}
-
diff --git a/platform/nrf52xxx/include/platform/gpio.h b/platform/nrf52xxx/include/platform/gpio.h
deleted file mode 100644
index 43e68974..00000000
--- a/platform/nrf52xxx/include/platform/gpio.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (c) 2016 Eric Holland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __PLATFORM_NRF52_GPIO_H
-#define __PLATFORM_NRF52_GPIO_H
-
-#define NRF_MAX_PIN_NUMBER 31
-
-#endif
diff --git a/platform/nrf52xxx/include/platform/nrf52.h b/platform/nrf52xxx/include/platform/nrf52.h
deleted file mode 100644
index afb0e7ff..00000000
--- a/platform/nrf52xxx/include/platform/nrf52.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (c) 2016 Eric Holland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_NRF52_H
-#define __PLATFORM_NRF52_H
-
-#include <platform/nrf52xxx.h>
-
-void nrf52_debug_early_init(void);
-void nrf52_debug_init(void);
-void nrf52_timer_early_init(void);
-void nrf52_timer_init(void);
-void nrf52_gpio_early_init(void);
-void nrf52_flash_nor_early_init(void);
-void nrf52_flash_nor_init(void);
-
-#endif
-
diff --git a/platform/nrf52xxx/include/platform/platform_cm.h b/platform/nrf52xxx/include/platform/platform_cm.h
deleted file mode 100644
index 1cb665e0..00000000
--- a/platform/nrf52xxx/include/platform/platform_cm.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (c) 2016 Eric Holland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_CM_H
-#define __PLATFORM_CM_H
-
-#include <platform/nrf52xxx.h>
-
-#endif
-
diff --git a/platform/nrf52xxx/init.c b/platform/nrf52xxx/init.c
deleted file mode 100644
index c0a631e2..00000000
--- a/platform/nrf52xxx/init.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Copyright (c) 2016 Eric Holland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <debug.h>
-#include <arch/arm/cm.h>
-#include <dev/uart.h>
-#include <platform.h>
-#include <platform/nrf52.h>
-#include <platform/system_nrf52.h>
-
-
-
-void platform_early_init(void)
-{
-    // Crank up the clock before initing timers.
-    SystemInit();
-    arm_cm_systick_init(32768);
-}
-
-void platform_init(void)
-{
-    dprintf(SPEW, "Nordic nrf52xxx platform for lk...\n");
-    dprintf(SPEW, "\tFlash: %d pages of %d bytes each (%dk bytes total)\n", \
-            NRF_FICR->CODESIZE, NRF_FICR->CODEPAGESIZE, \
-            (NRF_FICR->CODESIZE * NRF_FICR->CODEPAGESIZE)>>10);
-    dprintf(SPEW, "\tRadio MAC address  %02x:%02x:%02x:%02x:%02x:%02x\n", \
-            (NRF_FICR->DEVICEADDR[1] >> 8) & 0xFF, \
-            (NRF_FICR->DEVICEADDR[1]) & 0xFF, \
-            (NRF_FICR->DEVICEADDR[0] >> 24) & 0xFF, \
-            (NRF_FICR->DEVICEADDR[0] >> 16) & 0xFF, \
-            (NRF_FICR->DEVICEADDR[0] >>  8) & 0xFF, \
-            (NRF_FICR->DEVICEADDR[0] >>  0) & 0xFF);
-}
diff --git a/platform/nrf52xxx/rules.mk b/platform/nrf52xxx/rules.mk
deleted file mode 100644
index 618c689a..00000000
--- a/platform/nrf52xxx/rules.mk
+++ /dev/null
@@ -1,50 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-# ROMBASE, MEMBASE, and MEMSIZE are required for the linker script
-ROMBASE := 0x0
-MEMBASE := 0x20000000
-# can be overridden by target
-
-ARCH := arm
-ARM_CPU := cortex-m4
-
-ifeq ($(NRF52_CHIP),nrf52832-qfaa)
-GLOBAL_DEFINES +=
-MEMSIZE ?= 65536
-endif
-ifeq ($(NRF52_CHIP),nrf52832-qfab)
-GLOBAL_DEFINES +=
-MEMSIZE ?= 32768
-endif
-ifeq ($(NRF52_CHIP),nrf52832-chaa)
-GLOBAL_DEFINES +=
-MEMSIZE ?= 65536
-endif
-ifeq ($(NRF52_CHIP),nrf52832-chab)
-GLOBAL_DEFINES +=
-MEMSIZE ?= 32768
-endif
-
-GLOBAL_INCLUDES += $(LOCAL_DIR)
-
-GLOBAL_DEFINES += \
-	MEMSIZE=$(MEMSIZE)
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/init.c \
-	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/uart.c \
-	$(LOCAL_DIR)/vectab.c \
-	$(LOCAL_DIR)/gpio.c \
-    $(LOCAL_DIR)/timer.c \
-
-LINKER_SCRIPT += \
-	$(BUILDDIR)/system-twosegment.ld
-
-MODULE_DEPS += \
-	platform/nrf52 \
-	lib/cbuf
-
-include make/module.mk
diff --git a/platform/nrf52xxx/timer.c b/platform/nrf52xxx/timer.c
deleted file mode 100644
index 5603a294..00000000
--- a/platform/nrf52xxx/timer.c
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * Copyright (c) 2015 Eric Holland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <debug.h>
-#include <trace.h>
-#include <arch/arm/cm.h>
-#include <platform.h>
-#include <platform/nrf52.h>
-#include <platform/system_nrf52.h>
-#include <platform/timer.h>
-#include <sys/types.h>
-
-
-static volatile uint64_t ticks;
-static uint32_t tick_rate = 0;
-static uint32_t tick_rate_mhz = 0;
-static lk_time_t tick_interval_ms;
-
-static platform_timer_callback cb;
-static void *cb_args;
-
-typedef enum handler_return (*platform_timer_callback)(void *arg, lk_time_t now);
-
-status_t platform_set_periodic_timer(platform_timer_callback callback, void *arg, lk_time_t interval)
-{
-
-    cb = callback;
-    cb_args = arg;
-
-    tick_interval_ms = interval;
-
-    uint32_t ticks = tick_rate / ( 1000 / interval );
-
-    NRF_CLOCK->LFCLKSRC =  CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos;
-    NRF_CLOCK->TASKS_LFCLKSTART = 1;
-
-    NRF_RTC1->PRESCALER = ticks;
-    NRF_RTC1->INTENSET  = RTC_INTENSET_TICK_Enabled << RTC_INTENSET_TICK_Pos;
-
-    NRF_RTC1->EVENTS_TICK = 0;
-    NRF_RTC1->TASKS_START = 1;
-    NVIC_EnableIRQ(RTC1_IRQn);
-
-    return NO_ERROR;
-}
-
-lk_time_t current_time(void)
-{
-    uint64_t t;
-
-    do {
-        t = ticks;
-    } while (ticks != t);
-
-    return t * tick_interval_ms;
-}
-
-lk_bigtime_t current_time_hires(void)
-{
-    return current_time() * 1000;
-}
-
-void nrf52_RTC1_IRQ(void)
-{
-    ticks++;
-    arm_cm_irq_entry();
-
-    NRF_RTC1->EVENTS_TICK = 0;
-
-    bool resched = false;
-    if (cb) {
-        lk_time_t now = current_time();
-        if (cb(cb_args, now) == INT_RESCHEDULE)
-            resched = true;
-    }
-    arm_cm_irq_exit(resched);
-}
-
-void arm_cm_systick_init(uint32_t mhz)
-{
-    tick_rate = mhz;
-    tick_rate_mhz = mhz / 1000000;
-}
-
diff --git a/platform/nrf52xxx/uart.c b/platform/nrf52xxx/uart.c
deleted file mode 100644
index 8e1f1d9d..00000000
--- a/platform/nrf52xxx/uart.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * Copyright (c) 2015 Eric Holland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <debug.h>
-#include <stdio.h>
-#include <assert.h>
-#include <err.h>
-#include <lib/cbuf.h>
-#include <arch/arm/cm.h>
-#include <arch/ops.h>
-#include <dev/uart.h>
-#include <dev/gpio.h>
-#include <kernel/thread.h>
-#include <platform/debug.h>
-#include <platform/gpio.h>
-#include <target/debugconfig.h>
-#include <target/gpioconfig.h>
-
-#define RXBUF_SIZE 16
-
-//cbuf_t uart0_rx_buf;
-
-
-
-void uart_init_early(void)
-{
-#ifdef ENABLE_UART0
-
-#ifdef  UART0_TX_PIN
-    gpio_config(UART0_TX_PIN,GPIO_OUTPUT);
-    NRF_UART0->PSELTXD =   UART0_TX_PIN;
-#endif
-#ifdef  UART0_RX_PIN
-    gpio_config(UART0_RX_PIN,GPIO_INPUT);
-    NRF_UART0->PSELRXD =   UART0_RX_PIN;
-#endif
-
-    NRF_UART0->BAUDRATE =   UART_BAUDRATE_BAUDRATE_Baud115200   <<  UART_BAUDRATE_BAUDRATE_Pos;
-    NRF_UART0->CONFIG   =   UART_CONFIG_HWFC_Disabled << UART_CONFIG_HWFC_Pos | \
-                            UART_CONFIG_PARITY_Excluded << UART_CONFIG_PARITY_Pos;
-    NVIC_DisableIRQ(UARTE0_UART0_IRQn);
-    NRF_UART0->ENABLE   =   UART_ENABLE_ENABLE_Enabled << UART_ENABLE_ENABLE_Pos;
-    NRF_UART0->TXD      = 'E';
-    NRF_UART0->TASKS_STARTTX=1;
-    NRF_UART0->TASKS_STARTRX=1;
-#endif //ENABLE_UART0
-}
-
-void uart_init(void)
-{
-#ifdef ENABLE_UART0
-//    cbuf_initialize(&uart0_rx_buf, RXBUF_SIZE);
-//    NRF_UART0->INTENSET = UART_INTENSET_RXDRDY_Enabled << UART_INTENSET_RXDRDY_Pos;
-    NRF_UART0->EVENTS_RXDRDY = 0;
-//    NVIC_EnableIRQ(UART0_IRQn);
-    char c = NRF_UART0->RXD;
-    (void)c;
-#endif //ENABLE_UART0
-}
-
-void nrf52_UARTE0_UART0_IRQ(void)
-{
-//  char c;
-    arm_cm_irq_entry();
-    /*
-        bool resched = false;
-        while ( NRF_UART0->EVENTS_RXDRDY > 0 ) {
-            NRF_UART0->EVENTS_RXDRDY = 0;
-            c = NRF_UART0->RXD;
-            if (!cbuf_space_avail(&uart0_rx_buf)) {
-                break;
-            }
-            cbuf_write_char(&uart0_rx_buf, c, false);
-            resched = true;
-        }
-    */
-    arm_cm_irq_exit(false);
-}
-
-int uart_putc(int port, char c)
-{
-    while (NRF_UART0->EVENTS_TXDRDY == 0);
-    NRF_UART0->EVENTS_TXDRDY = 0;
-    NRF_UART0->TXD = c;
-    return 1;
-}
-
-int uart_getc(int port, bool wait)
-{
-    do {
-        if (NRF_UART0->EVENTS_RXDRDY > 0) {
-            NRF_UART0->EVENTS_RXDRDY=0;
-            return NRF_UART0->RXD;
-        }
-    } while (wait);
-    return -1;
-}
-
-void uart_flush_tx(int port) {}
-
-void uart_flush_rx(int port) {}
-
-void uart_init_port(int port, uint baud)
-{
-    // TODO - later
-    PANIC_UNIMPLEMENTED;
-}
diff --git a/platform/nrf52xxx/vectab.c b/platform/nrf52xxx/vectab.c
deleted file mode 100644
index 4594b51b..00000000
--- a/platform/nrf52xxx/vectab.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <compiler.h>
-#include <arch/arm/cm.h>
-#include <lib/cbuf.h>
-#include <platform/nrf52.h>
-#include <target/debugconfig.h>
-
-/* un-overridden irq handler */
-void nrf52_dummy_irq(void)
-{
-    arm_cm_irq_entry();
-    panic("unhandled irq\n");
-}
-
-/* a list of default handlers that are simply aliases to the dummy handler */
-#define DEFAULT_HANDLER(x) \
-void nrf52_##x(void) __WEAK_ALIAS("nrf52_dummy_irq");
-
-DEFAULT_HANDLER(POWER_CLOCK_IRQ);
-DEFAULT_HANDLER(RADIO_IRQ);
-DEFAULT_HANDLER(UARTE0_UART0_IRQ);
-DEFAULT_HANDLER(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQ);
-DEFAULT_HANDLER(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQ);
-DEFAULT_HANDLER(NFCT_IRQ);
-DEFAULT_HANDLER(GPIOTE_IRQ);
-DEFAULT_HANDLER(SAADC_IRQ);
-DEFAULT_HANDLER(TIMER0_IRQ);
-DEFAULT_HANDLER(TIMER1_IRQ);
-DEFAULT_HANDLER(TIMER2_IRQ);
-DEFAULT_HANDLER(RTC0_IRQ);
-DEFAULT_HANDLER(TEMP_IRQ);
-DEFAULT_HANDLER(RNG_IRQ);
-DEFAULT_HANDLER(ECB_IRQ);
-DEFAULT_HANDLER(CCM_AAR_IRQ);
-DEFAULT_HANDLER(WDT_IRQ);
-DEFAULT_HANDLER(RTC1_IRQ);
-DEFAULT_HANDLER(QDEC_IRQ);
-DEFAULT_HANDLER(COMP_LPCOMP_IRQ);
-DEFAULT_HANDLER(SWI0_EGU0_IRQ);
-DEFAULT_HANDLER(SWI1_EGU1_IRQ);
-DEFAULT_HANDLER(SWI2_EGU2_IRQ);
-DEFAULT_HANDLER(SWI3_EGU3_IRQ);
-DEFAULT_HANDLER(SWI4_EGU4_IRQ);
-DEFAULT_HANDLER(SWI5_EGU5_IRQ);
-DEFAULT_HANDLER(TIMER3_IRQ);
-DEFAULT_HANDLER(TIMER4_IRQ);
-DEFAULT_HANDLER(PWM0_IRQ);
-DEFAULT_HANDLER(PDM_IRQ);
-DEFAULT_HANDLER(MWU_IRQ);
-DEFAULT_HANDLER(PWM1_IRQ);
-DEFAULT_HANDLER(PWM2_IRQ);
-DEFAULT_HANDLER(SPIM2_SPIS2_SPI2_IRQ);
-DEFAULT_HANDLER(RTC2_IRQ);
-DEFAULT_HANDLER(I2S_IRQ);
-DEFAULT_HANDLER(FPU_IRQ);
-
-
-#define VECTAB_ENTRY(x) [x##n] = nrf52_##x
-
-/* appended to the end of the main vector table */
-const void *const __SECTION(".text.boot.vectab2") vectab2[] = {
-
-    VECTAB_ENTRY(POWER_CLOCK_IRQ),
-    VECTAB_ENTRY(RADIO_IRQ),
-    VECTAB_ENTRY(UARTE0_UART0_IRQ),
-    VECTAB_ENTRY(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQ),
-    VECTAB_ENTRY(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQ),
-    VECTAB_ENTRY(NFCT_IRQ),
-    VECTAB_ENTRY(GPIOTE_IRQ),
-    VECTAB_ENTRY(SAADC_IRQ),
-    VECTAB_ENTRY(TIMER0_IRQ),
-    VECTAB_ENTRY(TIMER1_IRQ),
-    VECTAB_ENTRY(TIMER2_IRQ),
-    VECTAB_ENTRY(RTC0_IRQ),
-    VECTAB_ENTRY(TEMP_IRQ),
-    VECTAB_ENTRY(RNG_IRQ),
-    VECTAB_ENTRY(ECB_IRQ),
-    VECTAB_ENTRY(CCM_AAR_IRQ),
-    VECTAB_ENTRY(WDT_IRQ),
-    VECTAB_ENTRY(RTC1_IRQ),
-    VECTAB_ENTRY(QDEC_IRQ),
-    VECTAB_ENTRY(COMP_LPCOMP_IRQ),
-    VECTAB_ENTRY(SWI0_EGU0_IRQ),
-    VECTAB_ENTRY(SWI1_EGU1_IRQ),
-    VECTAB_ENTRY(SWI2_EGU2_IRQ),
-    VECTAB_ENTRY(SWI3_EGU3_IRQ),
-    VECTAB_ENTRY(SWI4_EGU4_IRQ),
-    VECTAB_ENTRY(SWI5_EGU5_IRQ),
-    VECTAB_ENTRY(TIMER3_IRQ),
-    VECTAB_ENTRY(TIMER4_IRQ),
-    VECTAB_ENTRY(PWM0_IRQ),
-    VECTAB_ENTRY(PDM_IRQ),
-    VECTAB_ENTRY(MWU_IRQ),
-    VECTAB_ENTRY(PWM1_IRQ),
-    VECTAB_ENTRY(PWM2_IRQ),
-    VECTAB_ENTRY(SPIM2_SPIS2_SPI2_IRQ),
-    VECTAB_ENTRY(RTC2_IRQ),
-    VECTAB_ENTRY(I2S_IRQ),
-    VECTAB_ENTRY(FPU_IRQ),
-};
-
diff --git a/platform/or1ksim/include/platform/or1ksim.h b/platform/or1ksim/include/platform/or1ksim.h
deleted file mode 100644
index ad65b507..00000000
--- a/platform/or1ksim/include/platform/or1ksim.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (c) 2015 Stefan Kristiansson
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <reg.h>
-
-/* timer */
-#define TIMER_CLOCK_FREQ    50000000
-
-/* uart */
-#define UART1_BASE          0x90000000
-#define UART1_CLOCK_FREQ    50000000
-
-/* interrupts */
-#define MAX_INT             32
diff --git a/platform/or1ksim/include/platform/pic.h b/platform/or1ksim/include/platform/pic.h
deleted file mode 100644
index 668b613a..00000000
--- a/platform/or1ksim/include/platform/pic.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright (c) 2015 Stefan Kristiansson
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <platform/or1ksim.h>
-
diff --git a/platform/or1ksim/or1ksim.cfg b/platform/or1ksim/or1ksim.cfg
deleted file mode 100755
index 98ed3ca4..00000000
--- a/platform/or1ksim/or1ksim.cfg
+++ /dev/null
@@ -1,85 +0,0 @@
-section sim
-  clkcycle = 20ns
-end
-
-section VAPI
-  server_port = 50000
-  log_enabled = 0
-  vapi_log_file = "vapi.log"
-end
-
-section cpu
-  ver = 0x0
-  cfgr = 0x20
-  rev = 0x0001
-end
-
-section memory
-  name        = "RAM"
-  type        = unknown
-  baseaddr    = 0x00000000
-  size        = 0x02000000
-  delayr      = 1
-  delayw      = 1
-end
-
-section dmmu
-  enabled   = 1
-  nsets     = 64
-  nways     = 1
-  pagesize  = 8192
-  hitdelay  = 0
-  missdelay = 0
-end
-
-section immu
-  enabled   = 1
-  nsets     = 64
-  nways     = 1
-  pagesize  = 8192
-  hitdelay  = 0
-  missdelay = 0
-end
-
-section dc
-  enabled         = 1
-  nsets           = 256
-  nways           = 1
-  blocksize       = 16
-  load_hitdelay   = 0
-  load_missdelay  = 0
-  store_hitdelay  = 0
-  store_missdelay = 0
-end
-
-section ic
-  enabled   = 1
-  nsets     = 256
-  nways     = 1
-  blocksize = 16
-  hitdelay  = 0
-  missdelay = 0
-end
-
-section pic
-  enabled = 1
-  edge_trigger = 0
-end
-
-section debug
-  enabled = 0
-end
-
-section uart
-  enabled  = 1
-  baseaddr = 0x90000000
-  irq      = 2
-  16550    = 1
-end
-
-section ethernet
-  enabled  = 1
-  baseaddr = 0x92000000
-  irq      = 4
-  rtx_type = 0
-end
diff --git a/platform/or1ksim/platform.c b/platform/or1ksim/platform.c
deleted file mode 100644
index b4a16265..00000000
--- a/platform/or1ksim/platform.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * Copyright (c) 2015 Stefan Kristiansson
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <kernel/thread.h>
-#include <kernel/vm.h>
-#include <dev/uart.h>
-#include <dev/timer/or1k_ticktimer.h>
-#include <platform.h>
-#include <platform/interrupts.h>
-#include <platform/debug.h>
-#include <platform/timer.h>
-#include <platform/or1ksim.h>
-#include <sys/types.h>
-#include <target/debugconfig.h>
-
-struct mmu_initial_mapping mmu_initial_mappings[] = {
-    /* 32 MB of RAM space */
-    {
-        .phys = 0x0,
-        .virt = KERNEL_BASE,
-        .size = 32*1024*1024,
-        .flags = 0,
-        .name = "memory"
-    },
-
-    /* peripherals */
-    {
-        .phys = 0x90000000,
-        .virt = 0x90000000,
-        .size = 0x04000000,
-        .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
-        .name = "peripherals"
-    },
-
-    /* identity map to let the boot code run */
-    {
-        .phys = 0,
-        .virt = 0,
-        .size = 1024*1024*1024,
-        .flags = MMU_INITIAL_MAPPING_TEMPORARY
-    },
-
-    /* null entry to terminate the list */
-    { 0 }
-};
-
-static pmm_arena_t ram_arena = {
-    .name = "ram",
-    .base = 0,
-    .size = MEMSIZE,
-    .flags = PMM_ARENA_FLAG_KMAP
-};
-
-void platform_dputc(char c)
-{
-    if (c == '\n')
-        uart_putc(DEBUG_UART, '\r');
-    uart_putc(DEBUG_UART, c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    int _c;
-
-    if ((_c = uart_getc(DEBUG_UART, false)) < 0)
-        return -1;
-
-    *c = _c;
-    return 0;
-}
-
-void platform_early_init(void)
-{
-    uart_init_early();
-    or1k_ticktimer_init(TIMER_CLOCK_FREQ);
-#if WITH_KERNEL_VM
-    pmm_add_arena(&ram_arena);
-#endif
-}
diff --git a/platform/or1ksim/rules.mk b/platform/or1ksim/rules.mk
deleted file mode 100644
index f8782449..00000000
--- a/platform/or1ksim/rules.mk
+++ /dev/null
@@ -1,24 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-ARCH := or1k
-
-MODULE_DEPS += \
-	lib/cbuf \
-	dev/interrupt/or1k_pic \
-	dev/timer/or1k_ticktimer
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/platform.c \
-	$(LOCAL_DIR)/uart.c
-
-MEMBASE ?= 0x00000000
-MEMSIZE ?= 0x02000000
-
-# we have an mmu
-WITH_KERNEL_VM=1
-
-KERNEL_BASE = 0xc0000000
-
-include make/module.mk
diff --git a/platform/or1ksim/uart.c b/platform/or1ksim/uart.c
deleted file mode 100644
index d7ebb3ed..00000000
--- a/platform/or1ksim/uart.c
+++ /dev/null
@@ -1,175 +0,0 @@
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <reg.h>
-#include <dev/uart.h>
-#include <target/debugconfig.h>
-#include <platform/or1ksim.h>
-
-struct uart_stat {
-    addr_t base;
-    uint32_t clk_freq;
-    uint shift;
-};
-
-static struct uart_stat uart[1] = {
-    { UART1_BASE, UART1_CLOCK_FREQ, 0 },
-};
-
-static inline void write_uart_reg(int port, uint reg, unsigned char data)
-{
-    *(volatile unsigned char *)(uart[port].base + (reg << uart[port].shift)) = data;
-}
-
-static inline unsigned char read_uart_reg(int port, uint reg)
-{
-    return *(volatile unsigned char *)(uart[port].base + (reg << uart[port].shift));
-}
-
-#define UART_RHR    0
-#define UART_THR    0
-#define UART_DLL    0
-#define UART_IER    1
-#define UART_DLH    1
-#define UART_IIR    2
-#define UART_FCR    2
-#define UART_EFR    2
-#define UART_LCR    3
-#define UART_MCR    4
-#define UART_LSR    5
-#define UART_MSR    6
-#define UART_TCR    6
-#define UART_SPR    7
-#define UART_TLR    7
-#define UART_MDR1   8
-#define UART_MDR2   9
-#define UART_SFLSR  10
-#define UART_RESUME 11
-#define UART_TXFLL  10
-#define UART_TXFLH  11
-#define UART_SFREGL 12
-#define UART_SFREGH 13
-#define UART_RXFLL  12
-#define UART_RXFLH  13
-#define UART_BLR    14
-#define UART_UASR   14
-#define UART_ACREG  15
-#define UART_SCR    16
-#define UART_SSR    17
-#define UART_EBLR   18
-#define UART_MVR    19
-#define UART_SYSC   20
-
-#define LCR_8N1     0x03
-
-#define FCR_FIFO_EN 0x01        /* Fifo enable */
-#define FCR_RXSR    0x02        /* Receiver soft reset */
-#define FCR_TXSR    0x04        /* Transmitter soft reset */
-
-#define MCR_DTR     0x01
-#define MCR_RTS     0x02
-#define MCR_DMA_EN  0x04
-#define MCR_TX_DFR  0x08
-
-#define LCR_WLS_MSK 0x03        /* character length select mask */
-#define LCR_WLS_5   0x00        /* 5 bit character length */
-#define LCR_WLS_6   0x01        /* 6 bit character length */
-#define LCR_WLS_7   0x02        /* 7 bit character length */
-#define LCR_WLS_8   0x03        /* 8 bit character length */
-#define LCR_STB     0x04        /* Number of stop Bits, off = 1, on = 1.5 or 2) */
-#define LCR_PEN     0x08        /* Parity eneble */
-#define LCR_EPS     0x10        /* Even Parity Select */
-#define LCR_STKP    0x20        /* Stick Parity */
-#define LCR_SBRK    0x40        /* Set Break */
-#define LCR_BKSE    0x80        /* Bank select enable */
-
-#define LSR_DR      0x01        /* Data ready */
-#define LSR_OE      0x02        /* Overrun */
-#define LSR_PE      0x04        /* Parity error */
-#define LSR_FE      0x08        /* Framing error */
-#define LSR_BI      0x10        /* Break */
-#define LSR_THRE    0x20        /* Xmit holding register empty */
-#define LSR_TEMT    0x40        /* Xmitter empty */
-#define LSR_ERR     0x80        /* Error */
-
-#define LCRVAL LCR_8N1                  /* 8 data, 1 stop, no parity */
-#define MCRVAL (MCR_DTR | MCR_RTS)      /* RTS/DTR */
-#define FCRVAL (FCR_FIFO_EN | FCR_RXSR | FCR_TXSR)  /* Clear & enable FIFOs */
-
-void uart_init_port(int port, uint baud)
-{
-    /* clear the tx & rx fifo and disable */
-    uint16_t baud_divisor = (uart[port].clk_freq / 16 / baud);
-
-    write_uart_reg(port, UART_IER, 0);
-    write_uart_reg(port, UART_LCR, LCR_BKSE | LCRVAL); // config mode A
-    write_uart_reg(port, UART_DLL, baud_divisor & 0xff);
-    write_uart_reg(port, UART_DLH, (baud_divisor >> 8) & 0xff);
-    write_uart_reg(port, UART_LCR, LCRVAL); // operational mode
-    write_uart_reg(port, UART_MCR, MCRVAL);
-    write_uart_reg(port, UART_FCR, FCRVAL);
-}
-
-void uart_init_early(void)
-{
-    uart_init_port(DEBUG_UART, 115200);
-}
-
-void uart_init(void)
-{
-}
-
-int uart_putc(int port, char c )
-{
-    while (!(read_uart_reg(port, UART_LSR) & (1<<6))) // wait for the last char to get out
-        ;
-    write_uart_reg(port, UART_THR, c);
-    return 0;
-}
-
-int uart_getc(int port, bool wait)  /* returns -1 if no data available */
-{
-    if (wait) {
-        while (!(read_uart_reg(port, UART_LSR) & (1<<0))) // wait for data to show up in the rx fifo
-            ;
-    } else {
-        if (!(read_uart_reg(port, UART_LSR) & (1<<0)))
-            return -1;
-    }
-    return read_uart_reg(port, UART_RHR);
-}
-
-void uart_flush_tx(int port)
-{
-    while (!(read_uart_reg(port, UART_LSR) & (1<<6))) // wait for the last char to get out
-        ;
-}
-
-void uart_flush_rx(int port)
-{
-    // empty the rx fifo
-    while (read_uart_reg(port, UART_LSR) & (1<<0)) {
-        volatile char c = read_uart_reg(port, UART_RHR);
-        (void)c;
-    }
-}
diff --git a/platform/pc/console.c b/platform/pc/console.c
deleted file mode 100644
index cfc4a774..00000000
--- a/platform/pc/console.c
+++ /dev/null
@@ -1,315 +0,0 @@
-/*
- * Copyright (c) 2009 Corey Tabaka
- * Copyright (c) 2016 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <arch/x86.h>
-#include <platform/pc.h>
-#include <platform/console.h>
-#include <string.h>
-#include <lib/io.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <stdarg.h>
-
-/* memory mapped framebuffer */
-#define FB (0xB8000U + KERNEL_ASPACE_BASE)
-
-/* CGA values */
-#define CURSOR_START        0x0A
-#define CURSOR_END          0x0B
-#define VIDEO_ADDRESS_MSB   0x0C
-#define VIDEO_ADDRESS_LSB   0x0D
-#define CURSOR_POS_MSB      0x0E
-#define CURSOR_POS_LSB      0x0F
-
-/* curr settings */
-static unsigned char curr_x;
-static unsigned char curr_y;
-static unsigned char curr_start;
-static unsigned char curr_end;
-static unsigned char curr_attr = 0x7;
-
-/* video page buffer */
-#define VPAGE_SIZE      2048
-#define PAGE_MAX        8
-
-static int active_page = 0;
-static int visual_page = 0;
-
-static int curs_x[PAGE_MAX];
-static int curs_y[PAGE_MAX];
-
-static struct {
-    int x1, y1, x2, y2;
-} view_window = {
-    0, 0, 79, 24
-};
-
-void platform_init_console(void)
-{
-    curr_save();
-    window(0, 0, 79, 24);
-    clear();
-    place(0, 0);
-}
-
-void set_visual_page(int page)
-{
-    unsigned short page_offset = page*VPAGE_SIZE;
-    visual_page = page;
-
-    outp(CGA_INDEX_REG, VIDEO_ADDRESS_LSB);
-    outp(CGA_DATA_REG, page_offset & 0xFF);
-    outp(CGA_INDEX_REG, VIDEO_ADDRESS_MSB);
-    outp(CGA_DATA_REG, (page_offset >> 8) & 0xFF);
-}
-
-void set_active_page(int page)
-{
-    curs_x[active_page] = curr_x;
-    curs_y[active_page] = curr_y;
-    curr_x = curs_x[page];
-    curr_y = curs_y[page];
-    active_page = page;
-}
-
-int get_visual_page(void)
-{
-    return visual_page;
-}
-
-int get_active_page(void)
-{
-    return active_page;
-}
-
-void place(int x,int y)
-{
-    unsigned short cursor_word = x + y*80 + active_page*VPAGE_SIZE;
-
-    /*
-     * program CGA using index reg, then data reg
-     */
-    outp(CGA_INDEX_REG, CURSOR_POS_LSB);
-    outp(CGA_DATA_REG, cursor_word & 0xFF);
-    outp(CGA_INDEX_REG, CURSOR_POS_MSB);
-    outp(CGA_DATA_REG, (cursor_word >> 8) & 0xFF);
-
-    curr_x = x;
-    curr_y = y;
-}
-
-void cursor(int start,int end)
-{
-    outp(CGA_INDEX_REG, CURSOR_START);
-    outp(CGA_DATA_REG, start);
-    outp(CGA_INDEX_REG, CURSOR_END);
-    outp(CGA_DATA_REG, end);
-}
-
-void curr_save(void)
-{
-#if 0
-    /* grab some info from the bios data area (these should be defined in memmap.h */
-    curr_attr = *((unsigned char *)FB + 159);
-    curr_x = *((unsigned char *)0x00450);
-    curr_y = *((unsigned char *)0x00451);
-    curr_end = *((unsigned char *)0x00460);
-    curr_start = *((unsigned char *)0x00461);
-#endif
-    active_page = visual_page = 0;
-}
-
-void curr_restore(void)
-{
-#if 0
-    *((unsigned char *)0x00450) = curr_x;
-    *((unsigned char *)0x00451) = curr_y;
-#endif
-
-    place(curr_x, curr_y);
-    cursor(curr_start, curr_end);
-}
-
-void window(int x1, int y1, int x2, int y2)
-{
-    view_window.x1 = x1;
-    view_window.y1 = y1;
-    view_window.x2 = x2;
-    view_window.y2 = y2;
-
-    //place(x1, y1);
-}
-
-void _clear(char c,char attr,int x1,int y1,int x2,int y2)
-{
-    register int i,j;
-    unsigned short w = attr;
-
-    w <<= 8;
-    w |= c;
-    for (i = x1; i <= x2; i++) {
-        for (j = y1; j <= y2; j++) {
-            *((unsigned short *)(uintptr_t)(FB + 2*i+160*j + 2 * active_page * VPAGE_SIZE)) = w;
-        }
-    }
-
-    place(x1,y1);
-    curr_y = y1;
-    curr_x = x1;
-}
-
-void clear()
-{
-    _clear(' ', curr_attr, view_window.x1, view_window.y1, view_window.x2,
-           view_window.y2);
-}
-
-void _scroll(char attr, int x1, int y1, int x2, int y2)
-{
-    register int x,y;
-    unsigned short xattr = attr << 8,w;
-    unsigned char *v = (unsigned char *)(uintptr_t)(FB + active_page*(2*VPAGE_SIZE));
-
-    for (y = y1+1; y <= y2; y++) {
-        for (x = x1; x <= x2; x++) {
-            w = *((unsigned short *) (v + 2*(y*80+x)));
-            *((unsigned short *)(v + 2*((y-1)*80+x))) = w;
-        }
-    }
-
-    for (x = x1; x <= x2; x++) {
-        *((unsigned short *)(v + 2*((y-1)*80+x))) = xattr;
-    }
-}
-
-void scroll(void)
-{
-    _scroll(curr_attr, view_window.x1, view_window.y1, view_window.x2,
-            view_window.y2);
-}
-
-void cputc(char c)
-{
-    static unsigned short scan_x, x, y;
-    unsigned char *v = (unsigned char *)(uintptr_t)(FB + active_page*(2*VPAGE_SIZE));
-    x = curr_x;
-    y = curr_y;
-
-    switch (c) {
-        case '\t':
-            x += 8;
-            if (x >= view_window.x2+1) {
-                x = view_window.x1;
-                if (y == view_window.y2) {
-                    scroll();
-                } else {
-                    y++;
-                }
-            } else {
-                scan_x = 0;
-
-                while ((scan_x+8) < x) {
-                    scan_x += 8;
-                }
-
-                x = scan_x;
-            }
-            break;
-
-        case '\r':
-            x = view_window.x1;
-            break;
-
-        case '\n':
-            if (y == view_window.y2) {
-                scroll();
-            } else {
-                y++;
-            }
-            break;
-
-        case '\b':
-            x--;
-            *(v + 2*(x + y*80)) = ' ';
-            break;
-
-        default:
-            *(v + 2*(x + y*80)) = c;
-            x++;
-
-            if (x >= view_window.x2+1) {
-                x = view_window.x1;
-                if (y == view_window.y2) {
-                    scroll();
-                } else {
-                    y++;
-                }
-            }
-    }
-
-    place(x, y);
-}
-
-void cputs(char *s)
-{
-    char c;
-    while (*s != '\0') {
-        c = *s++;
-        cputc(c);
-    }
-}
-
-void puts_xy(int x,int y,char attr,char *s)
-{
-    unsigned char *v = (unsigned char *)(uintptr_t)(FB + (80*y+x)*2 + active_page*(2*VPAGE_SIZE));
-    while (*s != 0) {
-        *v = *s;
-        s++;
-        v++;
-        *v = attr;
-        v++;
-    }
-}
-
-void putc_xy(int x, int y, char attr, char c)
-{
-    unsigned char *v = (unsigned char *)(uintptr_t)(FB + (80*y+x)*2 + active_page*(2*VPAGE_SIZE));
-    *v = c;
-    v++;
-    *v = attr;
-}
-
-int printf_xy(int x, int y, char attr, char *fmt, ...)
-{
-    char cbuf[200];
-    va_list parms;
-    int result;
-
-    va_start(parms, fmt);
-    result = vsprintf(cbuf, fmt, parms);
-    va_end(parms);
-
-    puts_xy(x, y, attr, cbuf);
-
-    return result;
-}
diff --git a/platform/pc/debug.c b/platform/pc/debug.c
deleted file mode 100644
index b19f0022..00000000
--- a/platform/pc/debug.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- * Copyright (c) 2009 Corey Tabaka
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <stdio.h>
-#include <kernel/thread.h>
-#include <arch/x86.h>
-#include <lib/cbuf.h>
-#include <platform/interrupts.h>
-#include <platform/pc/memmap.h>
-#include <platform/console.h>
-#include <platform/keyboard.h>
-#include <platform/debug.h>
-
-static const int uart_baud_rate = 115200;
-static const int uart_io_port = 0x3f8;
-
-cbuf_t console_input_buf;
-
-static enum handler_return uart_irq_handler(void *arg)
-{
-    unsigned char c;
-    bool resched = false;
-
-    while (inp(uart_io_port + 5) & (1<<0)) {
-        c = inp(uart_io_port + 0);
-        cbuf_write_char(&console_input_buf, c, false);
-        resched = true;
-    }
-
-    return resched ? INT_RESCHEDULE : INT_NO_RESCHEDULE;
-}
-
-void platform_init_debug_early(void)
-{
-    /* configure the uart */
-    int divisor = 115200 / uart_baud_rate;
-
-    /* get basic config done so that tx functions */
-    outp(uart_io_port + 3, 0x80); // set up to load divisor latch
-    outp(uart_io_port + 0, divisor & 0xff); // lsb
-    outp(uart_io_port + 1, divisor >> 8); // msb
-    outp(uart_io_port + 3, 3); // 8N1
-    outp(uart_io_port + 2, 0x07); // enable FIFO, clear, 14-byte threshold
-}
-
-void platform_init_debug(void)
-{
-    /* finish uart init to get rx going */
-    cbuf_initialize(&console_input_buf, 1024);
-
-    register_int_handler(0x24, uart_irq_handler, NULL);
-    unmask_interrupt(0x24);
-
-    outp(uart_io_port + 1, 0x1); // enable receive data available interrupt
-}
-
-static void debug_uart_putc(char c)
-{
-    while ((inp(uart_io_port + 5) & (1<<6)) == 0)
-        ;
-    outp(uart_io_port + 0, c);
-}
-
-void platform_dputc(char c)
-{
-    if (c == '\n')
-        platform_dputc('\r');
-
-    cputc(c);
-    debug_uart_putc(c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    return cbuf_read_char(&console_input_buf, c, wait);
-}
-
-void platform_halt(void)
-{
-    for (;;) {
-        x86_cli();
-        x86_hlt();
-    }
-}
-
diff --git a/platform/pc/ide.c b/platform/pc/ide.c
deleted file mode 100644
index a1aa62a4..00000000
--- a/platform/pc/ide.c
+++ /dev/null
@@ -1,908 +0,0 @@
-/*
- * Copyright (c) 2013 Corey Tabaka
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <reg.h>
-#include <debug.h>
-#include <trace.h>
-#include <assert.h>
-#include <err.h>
-#include <malloc.h>
-#include <arch/x86.h>
-#include <sys/types.h>
-#include <platform/interrupts.h>
-#include <platform/ide.h>
-#include <platform/pc.h>
-#include <platform.h>
-#include <dev/pci.h>
-#include <dev/driver.h>
-#include <dev/class/block.h>
-#include <kernel/event.h>
-
-#define LOCAL_TRACE 0
-
-// status register bits
-#define IDE_CTRL_BSY   0x80
-#define IDE_DRV_RDY    0x40
-#define IDE_DRV_WRTFLT 0x20
-#define IDE_DRV_SKCOMP 0x10
-#define IDE_DRV_DRQ    0x08
-#define IDE_DRV_CORDAT 0x04
-#define IDE_DRV_IDX    0x02
-#define IDE_DRV_ERR    0x01
-
-// ATA commands
-#define ATA_NOP            0x00
-#define ATA_ATAPIRESET     0x08
-#define ATA_RECALIBRATE    0x10
-#define ATA_READMULT_RET   0x20
-#define ATA_READMULT       0x21
-#define ATA_READECC_RET    0x22
-#define ATA_READECC        0x23
-#define ATA_WRITEMULT_RET  0x30
-#define ATA_WRITEMULT      0x31
-#define ATA_WRITEECC_RET   0x32
-#define ATA_WRITEECC       0x33
-#define ATA_VERIFYMULT_RET 0x40
-#define ATA_VERIFYMULT     0x41
-#define ATA_FORMATTRACK    0x50
-#define ATA_SEEK           0x70
-#define ATA_DIAG           0x90
-#define ATA_INITPARAMS     0x91
-#define ATA_ATAPIPACKET    0xA0
-#define ATA_ATAPIIDENTIFY  0xA1
-#define ATA_ATAPISERVICE   0xA2
-#define ATA_READ_DMA        0xC8
-#define ATA_READ_DMA_EXT    0x25
-#define ATA_WRITE_DMA       0xCA
-#define ATA_WRITE_DMA_EXT   0x35
-#define ATA_GETDEVINFO     0xEC
-#define ATA_ATAPISETFEAT   0xEF
-
-// error codes
-#define IDE_NOERROR         0
-#define IDE_ADDRESSMARK     1
-#define IDE_CYLINDER0       2
-#define IDE_INVALIDCOMMAND  3
-#define IDE_MEDIAREQ        4
-#define IDE_SECTNOTFOUND    5
-#define IDE_MEDIACHANGED    6
-#define IDE_BADDATA         7
-#define IDE_BADSECTOR       8
-#define IDE_TIMEOUT         9
-#define IDE_DMAERROR        10
-
-enum {
-    IDE_REG_DATA            = 0,
-    IDE_REG_ERROR           = 1,
-    IDE_REG_PRECOMP         = 1,
-    IDE_REG_SECTOR_COUNT    = 2,
-    IDE_REG_SECTOR_NUM      = 3,
-    IDE_REG_CYLINDER_LOW    = 4,
-    IDE_REG_CYLINDER_HIGH   = 5,
-    IDE_REG_DRIVE_HEAD      = 6,
-    IDE_REG_STATUS          = 7,
-    IDE_REG_COMMAND         = 7,
-    IDE_REG_ALT_STATUS      = 8,
-    IDE_REG_DEVICE_CONTROL  = 8,
-
-    IDE_REG_NUM,
-};
-
-enum {
-    TYPE_NONE,
-    TYPE_UNKNOWN,
-    TYPE_FLOPPY,
-    TYPE_IDECDROM,
-    TYPE_SCSICDROM,
-    TYPE_IDEDISK,
-    TYPE_SCSIDISK
-};
-
-static const char *ide_type_str[] = {
-    "None",
-    "Unknown",
-    "Floppy",
-    "IDE CDROM",
-    "SCSI CDROM",
-    "IDE Disk",
-    "SCSI Disk",
-};
-
-static const char *ide_error_str[] = {
-    "Unknown error",
-    "Address mark not found",
-    "Cylinder 0 not found",
-    "Command aborted - invalid command",
-    "Media change requested",
-    "ID or target sector not found",
-    "Media changed",
-    "Uncorrectable data error",
-    "Bad sector detected",
-    "Command timed out",
-    "DMA error"
-};
-
-struct ide_driver_state {
-    int irq;
-    const uint16_t *regs;
-
-    event_t completion;
-
-    int type[2];
-    struct {
-        int sectors;
-        int sector_size;
-    } drive[2];
-};
-
-static const uint16_t ide_device_regs[][IDE_REG_NUM] = {
-    { 0x01F0, 0x01F1, 0x01F2, 0x01F3, 0x01F4, 0x01F5, 0x01F6, 0x01F7, 0x03F6 },
-    { 0x0170, 0x0171, 0x0172, 0x0173, 0x0174, 0x0175, 0x0176, 0x0177, 0x0376 },
-};
-
-static const int ide_device_irqs[] = {
-    INT_IDE0,
-    INT_IDE1,
-};
-
-static status_t ide_init(struct device *dev);
-
-static enum handler_return ide_irq_handler(void *arg);
-
-static status_t ide_init(struct device *dev);
-static ssize_t ide_get_block_size(struct device *dev);
-static ssize_t ide_get_block_count(struct device *dev);
-static ssize_t ide_write(struct device *dev, off_t offset, const void *buf, size_t count);
-static ssize_t ide_read(struct device *dev, off_t offset, void *buf, size_t count);
-
-static struct block_ops the_ops = {
-    .std = {
-        .init = ide_init,
-    },
-    .get_block_size = ide_get_block_size,
-    .get_block_count = ide_get_block_count,
-    .write = ide_write,
-    .read = ide_read,
-};
-
-DRIVER_EXPORT(ide, &the_ops.std);
-
-static uint8_t ide_read_reg8(struct device *dev, int index);
-static uint16_t ide_read_reg16(struct device *dev, int index);
-static uint32_t ide_read_reg32(struct device *dev, int index);
-
-static void ide_write_reg8(struct device *dev, int index, uint8_t value);
-static void ide_write_reg16(struct device *dev, int index, uint16_t value);
-static void ide_write_reg32(struct device *dev, int index, uint32_t value);
-
-static void ide_read_reg8_array(struct device *dev, int index, void *buf, size_t count);
-static void ide_read_reg16_array(struct device *dev, int index, void *buf, size_t count);
-static void ide_read_reg32_array(struct device *dev, int index, void *buf, size_t count);
-
-static void ide_write_reg8_array(struct device *dev, int index, const void *buf, size_t count);
-static void ide_write_reg16_array(struct device *dev, int index, const void *buf, size_t count);
-static void ide_write_reg32_array(struct device *dev, int index, const void *buf, size_t count);
-
-static void ide_device_select(struct device *dev, int index);
-static void ide_device_reset(struct device *dev);
-static void ide_delay_400ns(struct device *dev);
-static int ide_poll_status(struct device *dev, uint8_t on_mask, uint8_t off_mask);
-static int ide_eval_error(struct device *dev);
-static void ide_detect_drives(struct device *dev);
-static int ide_wait_for_completion(struct device *dev);
-static int ide_detect_ata(struct device *dev, int index);
-static void ide_lba_setup(struct device *dev, uint32_t addr, int index);
-
-static status_t ide_init(struct device *dev)
-{
-    pci_location_t loc;
-    pci_config_t pci_config;
-    status_t res = NO_ERROR;
-    uint32_t i;
-    int err;
-
-    if (!dev)
-        return ERR_INVALID_ARGS;
-
-    if (!dev->config)
-        return ERR_NOT_CONFIGURED;
-
-    __UNUSED const struct platform_ide_config *config = dev->config;
-
-    err = pci_find_pci_class_code(&loc, 0x010180, 0);
-    if (err != _PCI_SUCCESSFUL) {
-        LTRACEF("Failed to find IDE device\n");
-        res = ERR_NOT_FOUND;
-    }
-
-    LTRACEF("Found IDE device at %02x:%02x\n", loc.bus, loc.dev_fn);
-
-    for (i=0; i < sizeof(pci_config) / sizeof(uint32_t); i++) {
-        uint32_t reg = sizeof(uint32_t) * i;
-
-        err = pci_read_config_word(&loc, reg, ((uint32_t *) &pci_config) + i);
-        if (err != _PCI_SUCCESSFUL) {
-            LTRACEF("Failed to read config reg %d: 0x%02x\n", reg, err);
-            res = ERR_NOT_CONFIGURED;
-            goto done;
-        }
-    }
-
-    for (i=0; i < 6; i++) {
-        LTRACEF("BAR[%d]: 0x%08x\n", i, pci_config.base_addresses[i]);
-    }
-
-    struct ide_driver_state *state = malloc(sizeof(struct ide_driver_state));
-    if (!state) {
-        res = ERR_NO_MEMORY;
-        goto done;
-    }
-    dev->state = state;
-
-    /* TODO: select io regs and irq based on device index */
-    state->irq = ide_device_irqs[0];
-    state->regs = ide_device_regs[0];
-    state->type[0] = state->type[1] = TYPE_NONE;
-
-    event_init(&state->completion, false, EVENT_FLAG_AUTOUNSIGNAL);
-
-    register_int_handler(state->irq, ide_irq_handler, dev);
-    unmask_interrupt(state->irq);
-
-    /* enable interrupts */
-    ide_write_reg8(dev, IDE_REG_DEVICE_CONTROL, 0);
-
-    /* detect drives */
-    ide_detect_drives(dev);
-
-done:
-    return res;
-}
-
-static enum handler_return ide_irq_handler(void *arg)
-{
-    struct device *dev = arg;
-    struct ide_driver_state *state = dev->state;
-    uint8_t val;
-
-    val = ide_read_reg8(dev, IDE_REG_STATUS);
-
-    if ((val & IDE_DRV_ERR) == 0) {
-        event_signal(&state->completion, false);
-
-        return INT_RESCHEDULE;
-    } else {
-        return INT_NO_RESCHEDULE;
-    }
-}
-
-static ssize_t ide_get_block_size(struct device *dev)
-{
-    DEBUG_ASSERT(dev);
-    DEBUG_ASSERT(dev->state);
-
-    struct ide_driver_state *state = dev->state;
-    return state->drive[0].sector_size;
-}
-
-static ssize_t ide_get_block_count(struct device *dev)
-{
-    DEBUG_ASSERT(dev);
-    DEBUG_ASSERT(dev->state);
-
-    struct ide_driver_state *state = dev->state;
-    return state->drive[0].sectors;
-}
-
-static ssize_t ide_write(struct device *dev, off_t offset, const void *buf, size_t count)
-{
-    DEBUG_ASSERT(dev);
-    DEBUG_ASSERT(dev->state);
-
-    __UNUSED struct ide_driver_state *state = dev->state;
-
-    size_t sectors, do_sectors, i;
-    const uint16_t *ubuf = buf;
-    int index = 0; // hard code drive for now
-    ssize_t ret = 0;
-    int err;
-
-    ide_device_select(dev, index);
-    ide_delay_400ns(dev);
-
-    err = ide_poll_status(dev, 0, IDE_CTRL_BSY | IDE_DRV_DRQ);
-    if (err) {
-        LTRACEF("Error while waiting for controller: %s\n", ide_error_str[err]);
-        ret = ERR_GENERIC;
-        goto done;
-    }
-
-    sectors = count;
-
-    while (sectors > 0) {
-        do_sectors = sectors;
-
-        if (do_sectors > 256)
-            do_sectors = 256;
-
-        err = ide_poll_status(dev, 0, IDE_CTRL_BSY);
-        if (err) {
-            LTRACEF("Error while waiting for controller: %s\n", ide_error_str[err]);
-            ret = ERR_GENERIC;
-            goto done;
-        }
-
-        ide_lba_setup(dev, offset, index);
-
-        if (do_sectors == 256)
-            ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, 0);
-        else
-            ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, do_sectors);
-
-        err = ide_poll_status(dev, IDE_DRV_RDY, 0);
-        if (err) {
-            LTRACEF("Error while waiting for controller: %s\n", ide_error_str[err]);
-            ret = ERR_GENERIC;
-            goto done;
-        }
-
-        ide_write_reg8(dev, IDE_REG_COMMAND, ATA_WRITEMULT_RET);
-        ide_delay_400ns(dev);
-
-        for (i=0; i < do_sectors; i++) {
-            err = ide_poll_status(dev, IDE_DRV_DRQ, 0);
-            if (err) {
-                LTRACEF("Error while waiting for drive: %s\n", ide_error_str[err]);
-                ret = ERR_GENERIC;
-                goto done;
-            }
-
-            ide_write_reg16_array(dev, IDE_REG_DATA, ubuf, 256);
-
-            ubuf += 256;
-        }
-
-        err = ide_wait_for_completion(dev);
-        if (err) {
-            LTRACEF("Error waiting for completion: %s\n", ide_error_str[err]);
-            ret = ERR_TIMED_OUT;
-            goto done;
-        }
-
-        sectors -= do_sectors;
-        offset += do_sectors;
-    }
-
-    ret = count;
-
-done:
-    return ret;
-}
-
-static ssize_t ide_read(struct device *dev, off_t offset, void *buf, size_t count)
-{
-    DEBUG_ASSERT(dev);
-    DEBUG_ASSERT(dev->state);
-
-    __UNUSED struct ide_driver_state *state = dev->state;
-
-    size_t sectors, do_sectors, i;
-    uint16_t *ubuf = buf;
-    int index = 0; // hard code drive for now
-    ssize_t ret = 0;
-    int err;
-
-    ide_device_select(dev, index);
-    ide_delay_400ns(dev);
-
-    err = ide_poll_status(dev, 0, IDE_CTRL_BSY | IDE_DRV_DRQ);
-    if (err) {
-        LTRACEF("Error while waiting for controller: %s\n", ide_error_str[err]);
-        ret = ERR_GENERIC;
-        goto done;
-    }
-
-    sectors = count;
-
-    while (sectors > 0) {
-        do_sectors = sectors;
-
-        if (do_sectors > 256)
-            do_sectors = 256;
-
-        err = ide_poll_status(dev, 0, IDE_CTRL_BSY);
-        if (err) {
-            LTRACEF("Error while waiting for controller: %s\n", ide_error_str[err]);
-            ret = ERR_GENERIC;
-            goto done;
-        }
-
-        ide_lba_setup(dev, offset, index);
-
-        if (do_sectors == 256)
-            ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, 0);
-        else
-            ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, do_sectors);
-
-        err = ide_poll_status(dev, IDE_DRV_RDY, 0);
-        if (err) {
-            LTRACEF("Error while waiting for controller: %s\n", ide_error_str[err]);
-            ret = ERR_GENERIC;
-            goto done;
-        }
-
-        ide_write_reg8(dev, IDE_REG_COMMAND, ATA_READMULT_RET);
-        ide_delay_400ns(dev);
-
-        for (i=0; i < do_sectors; i++) {
-            err = ide_poll_status(dev, IDE_DRV_DRQ, 0);
-            if (err) {
-                LTRACEF("Error while waiting for drive: %s\n", ide_error_str[err]);
-                ret = ERR_GENERIC;
-                goto done;
-            }
-
-            ide_read_reg16_array(dev, IDE_REG_DATA, ubuf, 256);
-
-            ubuf += 256;
-        }
-
-        err = ide_wait_for_completion(dev);
-        if (err) {
-            LTRACEF("Error waiting for completion: %s\n", ide_error_str[err]);
-            ret = ERR_TIMED_OUT;
-            goto done;
-        }
-
-        sectors -= do_sectors;
-        offset += do_sectors;
-    }
-
-    ret = count;
-
-done:
-    return ret;
-}
-
-static uint8_t ide_read_reg8(struct device *dev, int index)
-{
-    DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM);
-
-    struct ide_driver_state *state = dev->state;
-
-    return inp(state->regs[index]);
-}
-
-static uint16_t ide_read_reg16(struct device *dev, int index)
-{
-    DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM);
-
-    struct ide_driver_state *state = dev->state;
-
-    return inpw(state->regs[index]);
-}
-
-static uint32_t ide_read_reg32(struct device *dev, int index)
-{
-    DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM);
-
-    struct ide_driver_state *state = dev->state;
-
-    return inpd(state->regs[index]);
-}
-
-static void ide_read_reg8_array(struct device *dev, int index, void *buf, size_t count)
-{
-    DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM);
-
-    struct ide_driver_state *state = dev->state;
-
-    inprep(state->regs[index], (uint8_t *) buf, count);
-}
-
-static void ide_read_reg16_array(struct device *dev, int index, void *buf, size_t count)
-{
-    DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM);
-
-    struct ide_driver_state *state = dev->state;
-
-    inpwrep(state->regs[index], (uint16_t *) buf, count);
-}
-
-static void ide_read_reg32_array(struct device *dev, int index, void *buf, size_t count)
-{
-    DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM);
-
-    struct ide_driver_state *state = dev->state;
-
-    inpdrep(state->regs[index], (uint32_t *) buf, count);
-}
-
-static void ide_write_reg8_array(struct device *dev, int index, const void *buf, size_t count)
-{
-    DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM);
-
-    struct ide_driver_state *state = dev->state;
-
-    outprep(state->regs[index], (uint8_t *) buf, count);
-}
-
-static void ide_write_reg16_array(struct device *dev, int index, const void *buf, size_t count)
-{
-    DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM);
-
-    struct ide_driver_state *state = dev->state;
-
-    outpwrep(state->regs[index], (uint16_t *) buf, count);
-}
-
-static void ide_write_reg32_array(struct device *dev, int index, const void *buf, size_t count)
-{
-    DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM);
-
-    struct ide_driver_state *state = dev->state;
-
-    outpdrep(state->regs[index], (uint32_t *) buf, count);
-}
-
-static void ide_write_reg8(struct device *dev, int index, uint8_t value)
-{
-    DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM);
-
-    struct ide_driver_state *state = dev->state;
-
-    outp(state->regs[index], value);
-}
-
-static void ide_write_reg16(struct device *dev, int index, uint16_t value)
-{
-    DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM);
-
-    struct ide_driver_state *state = dev->state;
-
-    outpw(state->regs[index], value);
-}
-
-static void ide_write_reg32(struct device *dev, int index, uint32_t value)
-{
-    DEBUG_ASSERT(index >= 0 && index < IDE_REG_NUM);
-
-    struct ide_driver_state *state = dev->state;
-
-    outpd(state->regs[index], value);
-}
-
-static void ide_device_select(struct device *dev, int index)
-{
-    ide_write_reg8(dev, IDE_REG_DRIVE_HEAD, (index & 1) << 4);
-}
-
-static void ide_delay_400ns(struct device *dev)
-{
-    ide_read_reg8(dev, IDE_REG_ALT_STATUS);
-    ide_read_reg8(dev, IDE_REG_ALT_STATUS);
-    ide_read_reg8(dev, IDE_REG_ALT_STATUS);
-    ide_read_reg8(dev, IDE_REG_ALT_STATUS);
-}
-
-static void ide_device_reset(struct device *dev)
-{
-    struct ide_driver_state *state = dev->state;
-
-    lk_time_t start;
-    uint8_t sect_cnt, sect_num;
-    int err;
-
-    ide_device_select(dev, 0);
-    ide_delay_400ns(dev);
-
-    // set bit 2 for at least 4.8us
-    ide_write_reg8(dev, IDE_REG_DEVICE_CONTROL, 1<<2);
-
-    // delay 5us
-    spin(5);
-
-    ide_write_reg8(dev, IDE_REG_DEVICE_CONTROL, 0x00);
-
-    err = ide_poll_status(dev, 0, IDE_CTRL_BSY);
-    if (err) {
-        LTRACEF("Failed while waiting for controller to be ready: %s\n", ide_error_str[err]);
-        return;
-    }
-
-    // make sure the slave is ready if present
-    if (state->type[1] != TYPE_NONE) {
-        ide_device_select(dev, 1);
-        ide_delay_400ns(dev);
-
-        start = current_time();
-
-        do {
-            sect_cnt = ide_read_reg8(dev, IDE_REG_SECTOR_COUNT);
-            sect_num = ide_read_reg8(dev, IDE_REG_SECTOR_NUM);
-
-            if (sect_cnt == 1 && sect_num == 1) {
-                err = ide_poll_status(dev, 0, IDE_CTRL_BSY);
-                if (err) {
-                    LTRACEF("Failed while waiting for slave ready: %s\n", ide_error_str[err]);
-                    return;
-                }
-
-                break;
-            }
-        } while (TIME_LTE(current_time(), start + 20000));
-
-        err = ide_read_reg8(dev, IDE_REG_ALT_STATUS);
-        if (err & IDE_DRV_ERR) {
-            err = ide_eval_error(dev);
-            LTRACEF("Failed while resetting controller: %s\n", ide_error_str[err]);
-            return;
-        }
-    }
-}
-
-static int ide_eval_error(struct device *dev)
-{
-    int err = 0;
-    uint8_t data = 0;
-
-    data = ide_read_reg8(dev, IDE_REG_ERROR);
-
-    if (data & 0x01) {
-        err = IDE_ADDRESSMARK;
-    } else if (data & 0x02) {
-        err = IDE_CYLINDER0;
-    } else if (data & 0x04) {
-        err = IDE_INVALIDCOMMAND;
-    } else if (data & 0x08) {
-        err = IDE_MEDIAREQ;
-    } else if (data & 0x10) {
-        err = IDE_SECTNOTFOUND;
-    } else if (data & 0x20) {
-        err = IDE_MEDIACHANGED;
-    } else if (data & 0x40) {
-        err = IDE_BADDATA;
-    } else if (data & 0x80) {
-        err = IDE_BADSECTOR;
-    } else {
-        err = IDE_NOERROR;
-    }
-
-    return err;
-}
-
-static int ide_poll_status(struct device *dev, uint8_t on_mask, uint8_t off_mask)
-{
-    int err;
-    uint8_t value;
-    lk_time_t start = current_time();
-
-    do {
-        value = ide_read_reg8(dev, IDE_REG_ALT_STATUS);
-
-        if (value & IDE_DRV_ERR) {
-            err = ide_eval_error(dev);
-            LTRACEF("Error while polling status: %s\n", ide_error_str[err]);
-            return err;
-        }
-
-        if ((value & on_mask) == on_mask && (value & off_mask) == 0)
-            return IDE_NOERROR;
-    } while (TIME_LTE(current_time(), start + 20000));
-
-    return IDE_TIMEOUT;
-}
-
-static void ide_detect_drives(struct device *dev)
-{
-    struct ide_driver_state *state = dev->state;
-    uint8_t sc = 0, sn = 0, st = 0, cl = 0, ch = 0;
-
-    ide_device_select(dev, 0);
-    ide_delay_400ns(dev);
-    ide_delay_400ns(dev);
-
-    ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, 0x55);
-    ide_write_reg8(dev, IDE_REG_SECTOR_NUM, 0xaa);
-    ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, 0xaa);
-    ide_write_reg8(dev, IDE_REG_SECTOR_NUM, 0x55);
-    ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, 0x55);
-    ide_write_reg8(dev, IDE_REG_SECTOR_NUM, 0xaa);
-
-    sc = ide_read_reg8(dev, IDE_REG_SECTOR_COUNT);
-    sn = ide_read_reg8(dev, IDE_REG_SECTOR_NUM);
-
-    if (sc == 0x55 && sn == 0xaa) {
-        state->type[0] = TYPE_UNKNOWN;
-    }
-
-    // check for device 1
-    ide_device_select(dev, 1);
-    ide_delay_400ns(dev);
-
-    ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, 0x55);
-    ide_write_reg8(dev, IDE_REG_SECTOR_NUM, 0xaa);
-    ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, 0xaa);
-    ide_write_reg8(dev, IDE_REG_SECTOR_NUM, 0x55);
-    ide_write_reg8(dev, IDE_REG_SECTOR_COUNT, 0x55);
-    ide_write_reg8(dev, IDE_REG_SECTOR_NUM, 0xaa);
-
-    sc = ide_read_reg8(dev, IDE_REG_SECTOR_COUNT);
-    sn = ide_read_reg8(dev, IDE_REG_SECTOR_NUM);
-
-    if (sc == 0x55 && sn == 0xaa) {
-        state->type[1] = TYPE_UNKNOWN;
-    }
-
-    // now the drives present should be known
-    // soft reset now
-    ide_device_select(dev, 0);
-    ide_delay_400ns(dev);
-    ide_device_reset(dev);
-
-    ide_device_select(dev, 0);
-    ide_delay_400ns(dev);
-
-    sc = ide_read_reg8(dev, IDE_REG_SECTOR_COUNT);
-    sn = ide_read_reg8(dev, IDE_REG_SECTOR_NUM);
-    if (sc == 0x01 && sn == 0x01) {
-        state->type[0] = TYPE_UNKNOWN;
-
-        st = ide_read_reg8(dev, IDE_REG_STATUS);
-        cl = ide_read_reg8(dev, IDE_REG_CYLINDER_LOW);
-        ch = ide_read_reg8(dev, IDE_REG_CYLINDER_HIGH);
-
-        // PATAPI or SATAPI respectively
-        if ((cl == 0x14 && ch == 0xeb) || (cl == 0x69 && ch == 0x96)) {
-            state->type[0] = TYPE_IDECDROM;
-        } else if (st != 0 && ((cl == 0x00 && ch == 0x00) || (cl == 0x3c && ch == 0xc3))) {
-            state->type[0] = TYPE_IDEDISK;
-        }
-    }
-
-    ide_device_select(dev, 1);
-    ide_delay_400ns(dev);
-
-    sc = ide_read_reg8(dev, IDE_REG_SECTOR_COUNT);
-    sn = ide_read_reg8(dev, IDE_REG_SECTOR_NUM);
-    if (sc == 0x01 && sn == 0x01) {
-        state->type[1] = TYPE_UNKNOWN;
-
-        st = ide_read_reg8(dev, IDE_REG_STATUS);
-        cl = ide_read_reg8(dev, IDE_REG_CYLINDER_LOW);
-        ch = ide_read_reg8(dev, IDE_REG_CYLINDER_HIGH);
-
-        // PATAPI or SATAPI respectively
-        if ((cl == 0x14 && ch == 0xeb) || (cl == 0x69 && ch == 0x96)) {
-            state->type[1] = TYPE_IDECDROM;
-        } else if (st != 0 && ((cl == 0x00 && ch == 0x00) || (cl == 0x3c && ch == 0xc3))) {
-            state->type[1] = TYPE_IDEDISK;
-        }
-    }
-
-    LTRACEF("Detected drive 0: %s\n", ide_type_str[state->type[0]]);
-    LTRACEF("Detected drive 1: %s\n", ide_type_str[state->type[1]]);
-
-    switch (state->type[0]) {
-        case TYPE_IDEDISK:
-            ide_detect_ata(dev, 0);
-            break;
-
-        default:
-            break;
-    }
-
-    switch (state->type[1]) {
-        case TYPE_IDEDISK:
-            ide_detect_ata(dev, 1);
-            break;
-
-        default:
-            break;
-    }
-}
-
-static int ide_wait_for_completion(struct device *dev)
-{
-    struct ide_driver_state *state = dev->state;
-    status_t err;
-
-    err = event_wait_timeout(&state->completion, 20000);
-    if (err)
-        return IDE_TIMEOUT;
-
-    return IDE_NOERROR;
-}
-
-static status_t ide_detect_ata(struct device *dev, int index)
-{
-    struct ide_driver_state *state = dev->state;
-    status_t res = NO_ERROR;
-    uint8_t *info = NULL;
-    int err;
-
-    ide_device_select(dev, index);
-    ide_delay_400ns(dev);
-
-    err = ide_poll_status(dev, 0, IDE_CTRL_BSY | IDE_DRV_DRQ);
-    if (err) {
-        LTRACEF("Error while detecting drive %d: %s\n", index, ide_error_str[err]);
-        res = ERR_TIMED_OUT;
-        goto error;
-    }
-
-    ide_device_select(dev, index);
-    ide_delay_400ns(dev);
-
-    err = ide_poll_status(dev, 0, IDE_CTRL_BSY | IDE_DRV_DRQ);
-    if (err) {
-        LTRACEF("Error while detecting drive %d: %s\n", index, ide_error_str[err]);
-        res = ERR_TIMED_OUT;
-        goto error;
-    }
-
-    // try to wait for the selected drive to be ready, but don't quit if not
-    // since CD-ROMs don't seem to respond to this when they're masters
-    ide_poll_status(dev, IDE_DRV_RDY, 0);
-
-    // send the "identify device" command
-    ide_write_reg8(dev, IDE_REG_COMMAND, ATA_GETDEVINFO);
-    ide_delay_400ns(dev);
-
-    err = ide_wait_for_completion(dev);
-    if (err) {
-        LTRACEF("Error while waiting for command: %s\n", ide_error_str[err]);
-        res = ERR_TIMED_OUT;
-        goto error;
-    }
-
-    info = malloc(512);
-    if (!info) {
-        res = ERR_NO_MEMORY;
-        goto error;
-    }
-
-    LTRACEF("Found ATA hard disk on channel %d!\n", index);
-
-    ide_read_reg16_array(dev, IDE_REG_DATA, info, 256);
-
-    state->drive[index].sectors = *((uint32_t *) (info + 120));
-    state->drive[index].sector_size = 512;
-
-    LTRACEF("Disk supports %u sectors for a total of %u bytes\n", state->drive[index].sectors,
-            state->drive[index].sectors * 512);
-
-error:
-    free(info);
-    return res;
-}
-
-static void ide_lba_setup(struct device *dev, uint32_t addr, int drive)
-{
-    ide_write_reg8(dev, IDE_REG_DRIVE_HEAD, 0xe0 | ((drive & 0x00000001) << 4) | ((addr >> 24) & 0xf));
-    ide_write_reg8(dev, IDE_REG_CYLINDER_LOW, (addr >> 8) & 0xff);
-    ide_write_reg8(dev, IDE_REG_CYLINDER_HIGH, (addr >> 16) & 0xff);
-    ide_write_reg8(dev, IDE_REG_SECTOR_NUM, addr & 0xff);
-    ide_write_reg8(dev, IDE_REG_PRECOMP, 0xff);
-}
-
diff --git a/platform/pc/include/pcnet.h b/platform/pc/include/pcnet.h
deleted file mode 100644
index 40f08e3b..00000000
--- a/platform/pc/include/pcnet.h
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * Copyright (c) 2013 Corey Tabaka
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_PC_PCNET_H
-#define __PLATFORM_PC_PCNET_H
-
-#include <compiler.h>
-#include <stdint.h>
-
-#define REG_APROM 0x00
-#define REG_RDP   0x10
-#define REG_RAP   0x14
-#define REG_RESET 0x18
-#define REG_BDP   0x1c
-
-#define CSR0_INIT 0x0001
-#define CSR0_STRT 0x0002
-#define CSR0_STOP 0x0004
-#define CSR0_TDMD 0x0008
-#define CSR0_TXON 0x0010
-#define CSR0_RXON 0x0020
-#define CSR0_IENA 0x0040
-#define CSR0_INTR 0x0080
-#define CSR0_IDON 0x0100
-#define CSR0_TINT 0x0200
-#define CSR0_RINT 0x0400
-#define CSR0_MERR 0x0800
-#define CSR0_MISS 0x1000
-#define CSR0_CERR 0x2000
-#define CSR0_BABL 0x4000
-#define CSR0_ERR  0x8000
-
-#define CSR4_DMAPLUS 0x4000
-
-#define DESC_SIZE (4*sizeof(uint32_t))
-
-struct init_block_32 {
-    uint16_t mode;
-
-    uint16_t reserved_0 : 4;
-    uint16_t rlen       : 4;
-    uint16_t reserved_1 : 4;
-    uint16_t tlen       : 4;
-
-    uint8_t padr[6];
-
-    uint16_t reserved_2;
-
-    uint64_t ladr;
-    uint32_t rdra;
-    uint32_t tdra;
-} __PACKED;
-
-struct td_style3 {
-    uint32_t trc         : 4;
-    uint32_t reserved_1  : 8;
-    uint32_t tdr         : 14;
-    uint32_t rtry        : 1;
-    uint32_t lcar        : 1;
-    uint32_t lcol        : 1;
-    uint32_t exdef       : 1;
-    uint32_t uflo        : 1;
-    uint32_t buff        : 1;
-
-    uint32_t bcnt        : 12;
-    uint32_t ones        : 4;
-    uint32_t reserved_0  : 7;
-    uint32_t bpe         : 1;
-    uint32_t enp         : 1;
-    uint32_t stp         : 1;
-    uint32_t def         : 1;
-    uint32_t one         : 1;
-    uint32_t more_ltinit : 1;
-    uint32_t add_no_fcs  : 1;
-    uint32_t err         : 1;
-    uint32_t own         : 1;
-
-    uint32_t tbadr;
-
-    uint32_t reserved_2;
-} __PACKED;
-
-struct rd_style3 {
-    uint16_t mcnt        : 12;
-    uint16_t zeros       : 4;
-
-    uint8_t rpc;
-    uint8_t rcc;
-
-    uint32_t bcnt        : 12;
-    uint32_t ones        : 4;
-    uint32_t reserved_0  : 4;
-    uint32_t bam         : 1;
-    uint32_t lafm        : 1;
-    uint32_t pam         : 1;
-    uint32_t bpe         : 1;
-    uint32_t enp         : 1;
-    uint32_t stp         : 1;
-    uint32_t buff        : 1;
-    uint32_t crc         : 1;
-    uint32_t oflo        : 1;
-    uint32_t fram        : 1;
-    uint32_t err         : 1;
-    uint32_t own         : 1;
-
-    uint32_t rbadr;
-
-    uint32_t reserved_1;
-} __PACKED;
-
-#endif
-
diff --git a/platform/pc/include/platform/console.h b/platform/pc/include/platform/console.h
deleted file mode 100644
index c7870a50..00000000
--- a/platform/pc/include/platform/console.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * Copyright (c) 2009 Corey Tabaka
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_CONSOLE_H
-#define __PLATFORM_CONSOLE_H
-
-#include <compiler.h>
-
-__BEGIN_CDECLS
-
-void platform_init_console(void);
-
-void set_visual_page(int page);
-void set_active_page(int page);
-
-int get_visual_page(void);
-int get_active_page(void);
-
-void place(int x,int y);
-void cursor(int start, int end);
-
-void _clear(char c, char attr, int x1, int y1, int x2, int y2);
-void clear(void);
-
-void _scroll(char attr, int x1, int y1, int x2, int y2);
-void scroll(void);
-
-void curr_save(void);
-void curr_restore(void);
-
-void cputc(char c);
-void cputs(char *s);
-
-void window(int x1, int y1, int x2, int y2);
-
-void putc_xy(int x, int y, char attr, char c);
-void puts_xy(int x, int y, char attr, char *s);
-
-int printf_xy(int x, int y, char attr, char *fmt, ...) __PRINTFLIKE(4, 5);
-
-#define CURSOR_BLOCK()  cursor(0, 15);
-#define CURSOR_OFF()    cursor(16, 16);
-#define CURSOR_STD()    cursor(14, 15);
-
-/* text colors */
-#define BLACK           0
-#define BLUE            1
-#define GREEN           2
-#define CYAN            3
-#define RED             4
-#define MAGENTA         5
-#define BROWN           6
-#define LIGHTGRAY       7
-#define DARKGRAY        8
-#define LIGHTBLUE       9
-#define LIGHTGREEN      10
-#define LIGHTCYAN       11
-#define LIGHTRED        12
-#define LIGHTMAGENTA    13
-#define YELLOW          14
-#define WHITE           15
-
-__END_CDECLS
-
-#endif
-
diff --git a/platform/pc/include/platform/ide.h b/platform/pc/include/platform/ide.h
deleted file mode 100644
index 4dd8e25a..00000000
--- a/platform/pc/include/platform/ide.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (c) 2013 Corey Tabaka
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __PLATFORM_IDE_H
-#define __PLATFORM_IDE_H
-
-struct platform_ide_config {
-};
-
-#endif
-
-
diff --git a/platform/pc/include/platform/keyboard.h b/platform/pc/include/platform/keyboard.h
deleted file mode 100644
index b95c5967..00000000
--- a/platform/pc/include/platform/keyboard.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (c) 2009 Corey Tabaka
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <lib/cbuf.h>
-
-void platform_init_keyboard(cbuf_t *buffer);
-
-int platform_read_key(char *c);
diff --git a/platform/pc/include/platform/multiboot.h b/platform/pc/include/platform/multiboot.h
deleted file mode 100644
index 92f903eb..00000000
--- a/platform/pc/include/platform/multiboot.h
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * Copyright (c) 2009 Corey Tabaka
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_MULTIBOOT_H
-#define __PLATFORM_MULTIBOOT_H
-
-#include <sys/types.h>
-
-/* magic number for multiboot header */
-#define MULTIBOOT_HEADER_MAGIC      0x1BADB002
-
-/* flags for multiboot header */
-#ifdef __ELF__
-#define MULTIBOOT_HEADER_FLAGS      0x00000003
-#else
-#define MULTIBOOT_HEADER_FLAGS      0x00010003
-#endif
-
-/* magic number passed by multiboot-compliant boot loaders */
-#define MULTIBOOT_BOOTLOADER_MAGIC  0x2BADB002
-
-#ifndef ASSEMBLY
-
-/* multiboot header */
-typedef struct multiboot_header {
-    uint32_t magic;
-    uint32_t flags;
-    uint32_t checksum;
-    uint32_t header_addr;
-    uint32_t load_addr;
-    uint32_t load_end_addr;
-    uint32_t bss_end_addr;
-    uint32_t entry_addr;
-} multiboot_header_t;
-
-/* symbol table for a.out */
-typedef struct aout_symbol_table {
-    uint32_t tabsize;
-    uint32_t strsize;
-    uint32_t addr;
-    uint32_t reserved;
-} aout_symbol_table_t;
-
-/* section header table for ELF */
-typedef struct elf_section_header_table {
-    uint32_t num;
-    uint32_t size;
-    uint32_t addr;
-    uint32_t shndx;
-} elf_section_header_table_t;
-
-/* multiboot info */
-typedef struct multiboot_info {
-    uint32_t flags;
-    uint32_t mem_lower;
-    uint32_t mem_upper;
-    uint32_t boot_device;
-    uint32_t cmdline;
-    uint32_t mods_count;
-    uint32_t mods_addr;
-    union {
-        aout_symbol_table_t aout_sym;
-        elf_section_header_table_t elf_sec;
-    } u;
-    uint32_t mmap_length;
-    uint32_t mmap_addr;
-} multiboot_info_t;
-
-enum {
-    MB_INFO_MEM_SIZE    = 0x001,
-    MB_INFO_BOOT_DEV    = 0x002,
-    MB_INFO_CMD_LINE    = 0x004,
-    MB_INFO_MODS        = 0x008,
-    MB_INFO_SYMS        = 0x010,
-    MB_INFO_MMAP        = 0x040,
-    MB_INFO_DRIVES      = 0x080,
-    MB_INFO_CONFIG      = 0x100,
-    MB_INFO_BOOT_LOADER = 0x200,
-    MB_INFO_APM_TABLE   = 0x400,
-    MB_INFO_VBE         = 0x800,
-};
-
-/* module structure */
-typedef struct module {
-    uint32_t mod_start;
-    uint32_t mod_end;
-    uint32_t string;
-    uint32_t reserved;
-} module_t;
-
-/* memory map - be careful that the offset 0 is base_addr_low without size */
-typedef struct memory_map {
-    uint32_t size;
-    uint32_t base_addr_low;
-    uint32_t base_addr_high;
-    uint32_t length_low;
-    uint32_t length_high;
-    uint32_t type;
-} memory_map_t;
-
-/* memory map entry types */
-enum {
-    MB_MMAP_TYPE_AVAILABLE      = 0x01,
-    MB_MMAP_TYPE_RESERVED       = 0x02,
-    MB_MMAP_TYPE_ACPI_RECLAIM   = 0x03,
-    MB_MMAP_TYPE_ACPI_NVS       = 0x04,
-};
-
-#endif
-
-#endif
diff --git a/platform/pc/include/platform/pc.h b/platform/pc/include/platform/pc.h
deleted file mode 100644
index 76d8708d..00000000
--- a/platform/pc/include/platform/pc.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * Copyright (c) 2009 Corey Tabaka
- * Copyright (c) 2015 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_PC_H
-#define __PLATFORM_PC_H
-
-#include <platform/pc/memmap.h>
-#include <platform/pc/iomap.h>
-
-/* NOTE: keep arch/x86/crt0.S in sync with these definitions */
-
-/* interrupts */
-#define INT_VECTORS 0x31
-
-/* defined interrupts */
-#define INT_BASE            0x20
-#define INT_PIT             0x20
-#define INT_KEYBOARD        0x21
-#define INT_PIC2            0x22
-
-#define INT_BASE2           0x28
-#define INT_CMOSRTC         0x28
-#define INT_PS2MOUSE        0x2c
-#define INT_IDE0            0x2e
-#define INT_IDE1            0x2f
-
-/* APIC vectors */
-#define INT_APIC_TIMER      0x22
-
-/* PIC remap bases */
-#define PIC1_BASE 0x20
-#define PIC2_BASE 0x28
-
-#endif
-
diff --git a/platform/pc/include/platform/pc/iomap.h b/platform/pc/include/platform/pc/iomap.h
deleted file mode 100644
index 26c808ba..00000000
--- a/platform/pc/include/platform/pc/iomap.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Copyright (c) 2009 Corey Tabaka
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __IOMAP_H
-#define __IOMAP_H
-
-/* i8253/i8254 programmable interval timer registers */
-#define I8253_CONTROL_REG   0x43
-#define I8253_DATA_REG      0x40
-
-/* i8042 keyboard controller registers */
-#define I8042_COMMAND_REG   0x64
-#define I8042_STATUS_REG    0x64
-#define I8042_DATA_REG      0x60
-
-/* CGA registers */
-#define CGA_INDEX_REG       0x3D4
-#define CGA_DATA_REG        0x3D5
-
-#endif
diff --git a/platform/pc/include/platform/pc/memmap.h b/platform/pc/include/platform/pc/memmap.h
deleted file mode 100644
index e782116d..00000000
--- a/platform/pc/include/platform/pc/memmap.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * Copyright (c) 2009 Corey Tabaka
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __MEMMAP_H
-#define __MEMMAP_H
-
-/* some helpful macros */
-#define REG(x) ((volatile unsigned int *)(x))
-#define REG_H(x) ((volatile unsigned short *)(x))
-#define REG_B(x) ((volatile unsigned char *)(x))
-
-/* TODO: put fixed memory address definitions here */
-
-#endif
diff --git a/platform/pc/include/platform/pcnet.h b/platform/pc/include/platform/pcnet.h
deleted file mode 100644
index cb04234f..00000000
--- a/platform/pc/include/platform/pcnet.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright (c) 2013 Corey Tabaka
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __PLATFORM_PCNET_H
-#define __PLATFORM_PCNET_H
-
-#include <stdint.h>
-
-struct platform_pcnet_config {
-    uint16_t vendor_id;
-    uint16_t device_id;
-    int index;
-};
-
-#endif
-
-
-
diff --git a/platform/pc/include/platform/uart.h b/platform/pc/include/platform/uart.h
deleted file mode 100644
index 60fd6613..00000000
--- a/platform/pc/include/platform/uart.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Copyright (c) 2012 Corey Tabaka
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __PLATFORM_UART_H
-#define __PLATFORM_UART_H
-
-struct platform_uart_config {
-    int baud_rate;
-    int io_port;
-    int irq;
-    int rx_buf_len;
-    int tx_buf_len;
-};
-
-#endif
-
diff --git a/platform/pc/interrupts.c b/platform/pc/interrupts.c
deleted file mode 100644
index 3981f2e7..00000000
--- a/platform/pc/interrupts.c
+++ /dev/null
@@ -1,240 +0,0 @@
-/*
- * Copyright (c) 2009 Corey Tabaka
- * Copyright (c) 2015 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <sys/types.h>
-#include <debug.h>
-#include <err.h>
-#include <reg.h>
-#include <assert.h>
-#include <kernel/thread.h>
-#include <platform/interrupts.h>
-#include <arch/ops.h>
-#include <arch/x86.h>
-#include <kernel/spinlock.h>
-#include "platform_p.h"
-#include <platform/pc.h>
-
-static spin_lock_t lock;
-
-void x86_gpf_handler(x86_iframe_t *frame);
-void x86_invop_handler(x86_iframe_t *frame);
-void x86_unhandled_exception(x86_iframe_t *frame);
-#ifdef ARCH_X86_64
-void x86_pfe_handler(x86_iframe_t *frame);
-#endif
-
-#define PIC1 0x20
-#define PIC2 0xA0
-
-#define ICW1 0x11
-#define ICW4 0x01
-
-struct int_handler_struct {
-    int_handler handler;
-    void *arg;
-};
-
-static struct int_handler_struct int_handler_table[INT_VECTORS];
-
-/*
- * Cached IRQ mask (enabled/disabled)
- */
-static uint8_t irqMask[2];
-
-/*
- * init the PICs and remap them
- */
-static void map(uint32_t pic1, uint32_t pic2)
-{
-    /* send ICW1 */
-    outp(PIC1, ICW1);
-    outp(PIC2, ICW1);
-
-    /* send ICW2 */
-    outp(PIC1 + 1, pic1);   /* remap */
-    outp(PIC2 + 1, pic2);   /*  pics */
-
-    /* send ICW3 */
-    outp(PIC1 + 1, 4);  /* IRQ2 -> connection to slave */
-    outp(PIC2 + 1, 2);
-
-    /* send ICW4 */
-    outp(PIC1 + 1, 5);
-    outp(PIC2 + 1, 1);
-
-    /* disable all IRQs */
-    outp(PIC1 + 1, 0xff);
-    outp(PIC2 + 1, 0xff);
-
-    irqMask[0] = 0xff;
-    irqMask[1] = 0xff;
-}
-
-static void enable(unsigned int vector, bool enable)
-{
-    if (vector >= PIC1_BASE && vector < PIC1_BASE + 8) {
-        vector -= PIC1_BASE;
-
-        uint8_t bit = 1 << vector;
-
-        if (enable && (irqMask[0] & bit)) {
-            irqMask[0] = inp(PIC1 + 1);
-            irqMask[0] &= ~bit;
-            outp(PIC1 + 1, irqMask[0]);
-            irqMask[0] = inp(PIC1 + 1);
-        } else if (!enable && !(irqMask[0] & bit)) {
-            irqMask[0] = inp(PIC1 + 1);
-            irqMask[0] |= bit;
-            outp(PIC1 + 1, irqMask[0]);
-            irqMask[0] = inp(PIC1 + 1);
-        }
-    } else if (vector >= PIC2_BASE && vector < PIC2_BASE + 8) {
-        vector -= PIC2_BASE;
-
-        uint8_t bit = 1 << vector;
-
-        if (enable && (irqMask[1] & bit)) {
-            irqMask[1] = inp(PIC2 + 1);
-            irqMask[1] &= ~bit;
-            outp(PIC2 + 1, irqMask[1]);
-            irqMask[1] = inp(PIC2 + 1);
-        } else if (!enable && !(irqMask[1] & bit)) {
-            irqMask[1] = inp(PIC2 + 1);
-            irqMask[1] |= bit;
-            outp(PIC2 + 1, irqMask[1]);
-            irqMask[1] = inp(PIC2 + 1);
-        }
-
-        bit = 1 << (INT_PIC2 - PIC1_BASE);
-
-        if (irqMask[1] != 0xff && (irqMask[0] & bit)) {
-            irqMask[0] = inp(PIC1 + 1);
-            irqMask[0] &= ~bit;
-            outp(PIC1 + 1, irqMask[0]);
-            irqMask[0] = inp(PIC1 + 1);
-        } else if (irqMask[1] == 0 && !(irqMask[0] & bit)) {
-            irqMask[0] = inp(PIC1 + 1);
-            irqMask[0] |= bit;
-            outp(PIC1 + 1, irqMask[0]);
-            irqMask[0] = inp(PIC1 + 1);
-        }
-    } else {
-        //dprintf(DEBUG, "Invalid PIC interrupt: %02x\n", vector);
-    }
-}
-
-void issueEOI(unsigned int vector)
-{
-    if (vector >= PIC1_BASE && vector <= PIC1_BASE + 7) {
-        outp(PIC1, 0x20);
-    } else if (vector >= PIC2_BASE && vector <= PIC2_BASE + 7) {
-        outp(PIC2, 0x20);
-        outp(PIC1, 0x20);   // must issue both for the second PIC
-    }
-}
-
-void platform_init_interrupts(void)
-{
-    // rebase the PIC out of the way of processor exceptions
-    map(PIC1_BASE, PIC2_BASE);
-}
-
-status_t mask_interrupt(unsigned int vector)
-{
-    if (vector >= INT_VECTORS)
-        return ERR_INVALID_ARGS;
-
-//  dprintf(DEBUG, "%s: vector %d\n", __PRETTY_FUNCTION__, vector);
-
-    spin_lock_saved_state_t state;
-    spin_lock_irqsave(&lock, state);
-
-    enable(vector, false);
-
-    spin_unlock_irqrestore(&lock, state);
-
-    return NO_ERROR;
-}
-
-
-void platform_mask_irqs(void)
-{
-    irqMask[0] = inp(PIC1 + 1);
-    irqMask[1] = inp(PIC2 + 1);
-
-    outp(PIC1 + 1, 0xff);
-    outp(PIC2 + 1, 0xff);
-
-    irqMask[0] = inp(PIC1 + 1);
-    irqMask[1] = inp(PIC2 + 1);
-}
-
-status_t unmask_interrupt(unsigned int vector)
-{
-    if (vector >= INT_VECTORS)
-        return ERR_INVALID_ARGS;
-
-//  dprintf("%s: vector %d\n", __PRETTY_FUNCTION__, vector);
-
-    spin_lock_saved_state_t state;
-    spin_lock_irqsave(&lock, state);
-
-    enable(vector, true);
-
-    spin_unlock_irqrestore(&lock, state);
-
-    return NO_ERROR;
-}
-
-enum handler_return platform_irq(x86_iframe_t *frame)
-{
-    // get the current vector
-    unsigned int vector = frame->vector;
-
-    DEBUG_ASSERT(vector >= 0x20);
-
-    // deliver the interrupt
-    enum handler_return ret = INT_NO_RESCHEDULE;
-
-    if (int_handler_table[vector].handler)
-        ret = int_handler_table[vector].handler(int_handler_table[vector].arg);
-
-    // ack the interrupt
-    issueEOI(vector);
-
-    return ret;
-}
-
-void register_int_handler(unsigned int vector, int_handler handler, void *arg)
-{
-    if (vector >= INT_VECTORS)
-        panic("register_int_handler: vector out of range %d\n", vector);
-
-    spin_lock_saved_state_t state;
-    spin_lock_irqsave(&lock, state);
-
-    int_handler_table[vector].arg = arg;
-    int_handler_table[vector].handler = handler;
-
-    spin_unlock_irqrestore(&lock, state);
-}
diff --git a/platform/pc/keyboard.c b/platform/pc/keyboard.c
deleted file mode 100644
index 79f8bfd3..00000000
--- a/platform/pc/keyboard.c
+++ /dev/null
@@ -1,347 +0,0 @@
-/*
- * Copyright (c) 2009 Corey Tabaka
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <platform/keyboard.h>
-
-#include <sys/types.h>
-#include <err.h>
-#include <reg.h>
-#include <trace.h>
-#include <debug.h>
-#include <kernel/thread.h>
-#include <platform.h>
-#include <platform/interrupts.h>
-#include <platform/console.h>
-#include <platform/timer.h>
-#include <platform/pc.h>
-#include "platform_p.h"
-#include <arch/x86.h>
-#include <lib/cbuf.h>
-
-static inline int i8042_read_data(void)
-{
-    return inp(I8042_DATA_REG);
-}
-
-static inline int i8042_read_status(void)
-{
-    return inp(I8042_STATUS_REG);
-}
-
-static inline void i8042_write_data(int val)
-{
-    outp(I8042_DATA_REG, val);
-}
-
-static inline void i8042_write_command(int val)
-{
-    outp(I8042_COMMAND_REG, val);
-}
-
-/*
- * timeout in milliseconds
- */
-#define I8042_CTL_TIMEOUT   500
-
-/*
- * status register bits
- */
-#define I8042_STR_PARITY    0x80
-#define I8042_STR_TIMEOUT   0x40
-#define I8042_STR_AUXDATA   0x20
-#define I8042_STR_KEYLOCK   0x10
-#define I8042_STR_CMDDAT    0x08
-#define I8042_STR_MUXERR    0x04
-#define I8042_STR_IBF       0x02
-#define I8042_STR_OBF       0x01
-
-/*
- * control register bits
- */
-#define I8042_CTR_KBDINT    0x01
-#define I8042_CTR_AUXINT    0x02
-#define I8042_CTR_IGNKEYLK  0x08
-#define I8042_CTR_KBDDIS    0x10
-#define I8042_CTR_AUXDIS    0x20
-#define I8042_CTR_XLATE     0x40
-
-/*
- * commands
- */
-#define I8042_CMD_CTL_RCTR  0x0120
-#define I8042_CMD_CTL_WCTR  0x1060
-#define I8042_CMD_CTL_TEST  0x01aa
-
-#define I8042_CMD_KBD_DIS   0x00ad
-#define I8042_CMD_KBD_EN    0x00ae
-#define I8042_CMD_KBD_TEST  0x01ab
-#define I8042_CMD_KBD_MODE  0x01f0
-
-/*
- * used for flushing buffers. the i8042 internal buffer shoudn't exceed this.
- */
-#define I8042_BUFFER_LENGTH 32
-
-static inline void delay(lk_time_t delay)
-{
-    lk_time_t start = current_time();
-
-    while (start + delay > current_time());
-}
-
-/* scancodes we want to do something with that don't translate via table */
-#define SCANCODE_LSHIFT 0x2a
-#define SCANCODE_RSHIFT 0x36
-
-/* scancode translation tables */
-static const int KeyCodeSingleLower[] = {
-// 0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F
-    -1,  -1, '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=','\b','\t', // 0
-    'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '[', ']','\n',  -1, 'a', 's', // 1
-    'd', 'f', 'g', 'h', 'j', 'k', 'l', ';','\'', '`',  -1,'\\', 'z', 'x', 'c', 'v', // 2
-    'b', 'n', 'm', ',', '.', '/',  -1, '*',  -1, ' ',  -1,  -1,  -1,  -1,  -1,  -1, // 3
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 4
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 5
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 6
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 7
-};
-
-static const int KeyCodeMultiLower[] = {
-// 0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 0
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 1
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 2
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 3
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 4
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 5
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 6
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 7
-};
-
-static const int KeyCodeSingleUpper[] = {
-// 0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F
-    -1,  -1, '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+','\b','\t', // 0
-    'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}','\n',  -1, 'A', 'S', // 1
-    'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', '"', '~',  -1, '|', 'Z', 'X', 'C', 'V', // 2
-    'B', 'N', 'M', '<', '>', '?',  -1, '*',  -1, ' ',  -1,  -1,  -1,  -1,  -1,  -1, // 3
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 4
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 5
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 6
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 7
-};
-
-static const int KeyCodeMultiUpper[] = {
-// 0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 0
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 1
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 2
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 3
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 4
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 5
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 6
-    -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1, // 7
-};
-
-/*
- * state key flags
- */
-static bool key_lshift;
-static bool key_rshift;
-
-static cbuf_t *key_buf;
-
-static void i8042_process_scode(uint8_t scode, unsigned int flags)
-{
-    static int lastCode = 0;
-    int keyCode;
-    uint8_t keyUpBit;
-
-    bool multi = lastCode == 0xe0;
-
-    // save the key up event bit
-    keyUpBit = scode & 0x80;
-    scode &= 0x7f;
-
-    if (scode == SCANCODE_LSHIFT) {
-        key_lshift = !keyUpBit;
-    }
-
-    if (scode == SCANCODE_RSHIFT) {
-        key_rshift = !keyUpBit;
-    }
-
-    if (key_lshift || key_rshift) {
-        keyCode = multi ? KeyCodeMultiUpper[scode] : KeyCodeSingleUpper[scode];
-    } else {
-        keyCode = multi ? KeyCodeMultiLower[scode] : KeyCodeSingleLower[scode];
-    }
-
-    /*printf_xy(71, 3, BLUE, "%02x%02x %c %c%c", multi ? lastCode : 0, scode,
-        keyCode != -1 ? (char) keyCode : ' ', key_lshift ? 'L' : ' ',
-        key_rshift ? 'R' : ' ');*/
-
-    if (keyCode != -1 && !keyUpBit) {
-        char c = (char) keyCode;
-        cbuf_write_char(key_buf, c, false);
-    }
-
-    // update the last received code
-    lastCode = scode;
-}
-
-static int i8042_wait_read(void)
-{
-    int i = 0;
-    while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
-        delay(1);
-        i++;
-    }
-    return -(i == I8042_CTL_TIMEOUT);
-}
-
-static int i8042_wait_write(void)
-{
-    int i = 0;
-    while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
-        delay(1);
-        i++;
-    }
-    return -(i == I8042_CTL_TIMEOUT);
-}
-
-static int i8042_flush(void)
-{
-    unsigned char data __UNUSED;
-    int i = 0;
-
-    //enter_critical_section();
-
-    while ((i8042_read_status() & I8042_STR_OBF) && (i++ < I8042_BUFFER_LENGTH)) {
-        delay(1);
-        data = i8042_read_data();
-    }
-
-    //exit_critical_section();
-
-    return i;
-}
-
-static int i8042_command(uint8_t *param, int command)
-{
-    int retval = 0, i = 0;
-
-    //enter_critical_section();
-
-    retval = i8042_wait_write();
-    if (!retval) {
-        i8042_write_command(command & 0xff);
-    }
-
-    if (!retval) {
-        for (i = 0; i < ((command >> 12) & 0xf); i++) {
-            if ((retval = i8042_wait_write())) {
-                break;
-            }
-
-            i8042_write_data(param[i]);
-        }
-    }
-
-    if (!retval) {
-        for (i = 0; i < ((command & 0xf0) >> 8); i++) {
-            if ((retval = i8042_wait_read())) {
-                break;
-            }
-
-            if (i8042_read_status() & I8042_STR_AUXDATA) {
-                param[i] = ~i8042_read_data();
-            } else {
-                param[i] = i8042_read_data();
-            }
-        }
-    }
-
-    //exit_critical_section();
-
-    return retval;
-}
-
-static enum handler_return i8042_interrupt(void *arg)
-{
-    uint8_t str, data = 0;
-    bool resched = false;
-
-    //enter_critical_section();
-    str = i8042_read_status();
-    if (str & I8042_STR_OBF) {
-        data = i8042_read_data();
-    }
-    //exit_critical_section();
-
-    if (str & I8042_STR_OBF) {
-        i8042_process_scode(data,
-                            ((str & I8042_STR_PARITY) ? I8042_STR_PARITY : 0) |
-                            ((str & I8042_STR_TIMEOUT) ? I8042_STR_TIMEOUT : 0));
-        resched = true;
-    }
-
-    return resched ? INT_RESCHEDULE : INT_NO_RESCHEDULE;
-}
-
-int platform_read_key(char *c)
-{
-    ssize_t len;
-
-    len = cbuf_read_char(key_buf, c, true);
-    return len;
-}
-
-void platform_init_keyboard(cbuf_t *buffer)
-{
-    uint8_t ctr;
-
-    key_buf = buffer;
-
-    i8042_flush();
-
-    if (i8042_command(&ctr, I8042_CMD_CTL_RCTR)) {
-        dprintf(SPEW, "Failed to read CTR while initializing i8042\n");
-        return;
-    }
-
-    // turn on translation
-    ctr |= I8042_CTR_XLATE;
-
-    // enable keyboard and keyboard irq
-    ctr &= ~I8042_CTR_KBDDIS;
-    ctr |= I8042_CTR_KBDINT;
-
-    if (i8042_command(&ctr, I8042_CMD_CTL_WCTR)) {
-        dprintf(SPEW, "Failed to write CTR while initializing i8042\n");
-        return;
-    }
-
-    register_int_handler(INT_KEYBOARD, &i8042_interrupt, NULL);
-    unmask_interrupt(INT_KEYBOARD);
-
-    i8042_interrupt(NULL);
-}
diff --git a/platform/pc/pci.c b/platform/pc/pci.c
deleted file mode 100644
index 8b39bb78..00000000
--- a/platform/pc/pci.c
+++ /dev/null
@@ -1,592 +0,0 @@
-/*
- * Copyright (c) 2009 Corey Tabaka
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <err.h>
-#include <stdlib.h>
-#include <string.h>
-#include <kernel/thread.h>
-#include <kernel/spinlock.h>
-#include <arch/x86/descriptor.h>
-#include <dev/pci.h>
-
-static int last_bus = 0;
-static spin_lock_t lock;
-
-typedef struct {
-    uint16_t size;
-    void *offset;
-    uint16_t selector;
-} __PACKED irq_routing_options_t;
-
-static int pci_type1_detect(void);
-static int pci_bios_detect(void);
-
-int pci_get_last_bus(void)
-{
-    return last_bus;
-}
-
-/*
- * pointers to installed PCI routines
- */
-int (*g_pci_find_pci_device)(pci_location_t *state, uint16_t device_id, uint16_t vendor_id, uint16_t index);
-int (*g_pci_find_pci_class_code)(pci_location_t *state, uint32_t class_code, uint16_t index);
-
-int (*g_pci_read_config_byte)(const pci_location_t *state, uint32_t reg, uint8_t *value);
-int (*g_pci_read_config_half)(const pci_location_t *state, uint32_t reg, uint16_t *value);
-int (*g_pci_read_config_word)(const pci_location_t *state, uint32_t reg, uint32_t *value);
-
-int (*g_pci_write_config_byte)(const pci_location_t *state, uint32_t reg, uint8_t value);
-int (*g_pci_write_config_half)(const pci_location_t *state, uint32_t reg, uint16_t value);
-int (*g_pci_write_config_word)(const pci_location_t *state, uint32_t reg, uint32_t value);
-
-int (*g_pci_get_irq_routing_options)(irq_routing_options_t *options, uint16_t *pci_irqs);
-int (*g_pci_set_irq_hw_int)(const pci_location_t *state, uint8_t int_pin, uint8_t irq);
-
-
-int pci_find_pci_device(pci_location_t *state, uint16_t device_id, uint16_t vendor_id, uint16_t index)
-{
-    spin_lock_saved_state_t irqstate;
-    spin_lock_irqsave(&lock, irqstate);
-
-    int res = g_pci_find_pci_device(state, device_id, vendor_id, index);
-
-    spin_unlock_irqrestore(&lock, irqstate);
-
-    return res;
-}
-
-int pci_find_pci_class_code(pci_location_t *state, uint32_t class_code, uint16_t index)
-{
-    spin_lock_saved_state_t irqstate;
-    spin_lock_irqsave(&lock, irqstate);
-
-    int res = g_pci_find_pci_class_code(state, class_code, index);
-
-    spin_unlock_irqrestore(&lock, irqstate);
-
-    return res;
-}
-
-int pci_read_config_byte(const pci_location_t *state, uint32_t reg, uint8_t *value)
-{
-    spin_lock_saved_state_t irqstate;
-    spin_lock_irqsave(&lock, irqstate);
-
-    int res = g_pci_read_config_byte(state, reg, value);
-
-    spin_unlock_irqrestore(&lock, irqstate);
-
-    return res;
-}
-int pci_read_config_half(const pci_location_t *state, uint32_t reg, uint16_t *value)
-{
-    spin_lock_saved_state_t irqstate;
-    spin_lock_irqsave(&lock, irqstate);
-
-    int res = g_pci_read_config_half(state, reg, value);
-
-    spin_unlock_irqrestore(&lock, irqstate);
-
-    return res;
-}
-
-int pci_read_config_word(const pci_location_t *state, uint32_t reg, uint32_t *value)
-{
-    spin_lock_saved_state_t irqstate;
-    spin_lock_irqsave(&lock, irqstate);
-
-    int res = g_pci_read_config_word(state, reg, value);
-
-    spin_unlock_irqrestore(&lock, irqstate);
-
-    return res;
-}
-
-int pci_write_config_byte(const pci_location_t *state, uint32_t reg, uint8_t value)
-{
-    spin_lock_saved_state_t irqstate;
-    spin_lock_irqsave(&lock, irqstate);
-
-    int res = g_pci_write_config_byte(state, reg, value);
-
-    spin_unlock_irqrestore(&lock, irqstate);
-
-    return res;
-}
-
-int pci_write_config_half(const pci_location_t *state, uint32_t reg, uint16_t value)
-{
-    spin_lock_saved_state_t irqstate;
-    spin_lock_irqsave(&lock, irqstate);
-
-    int res = g_pci_write_config_half(state, reg, value);
-
-    spin_unlock_irqrestore(&lock, irqstate);
-
-    return res;
-}
-
-int pci_write_config_word(const pci_location_t *state, uint32_t reg, uint32_t value)
-{
-    spin_lock_saved_state_t irqstate;
-    spin_lock_irqsave(&lock, irqstate);
-
-    int res = g_pci_write_config_word(state, reg, value);
-
-    spin_unlock_irqrestore(&lock, irqstate);
-
-    return res;
-}
-
-
-int pci_get_irq_routing_options(irq_routing_entry *entries, uint16_t *count, uint16_t *pci_irqs)
-{
-    irq_routing_options_t options;
-    options.size = sizeof(irq_routing_entry) **count;
-    options.selector = DATA_SELECTOR;
-    options.offset = entries;
-
-    spin_lock_saved_state_t irqstate;
-    spin_lock_irqsave(&lock, irqstate);
-
-    int res = g_pci_get_irq_routing_options(&options, pci_irqs);
-
-    spin_unlock_irqrestore(&lock, irqstate);
-
-    *count = options.size / sizeof(irq_routing_entry);
-
-    return res;
-}
-
-int pci_set_irq_hw_int(const pci_location_t *state, uint8_t int_pin, uint8_t irq)
-{
-    spin_lock_saved_state_t irqstate;
-    spin_lock_irqsave(&lock, irqstate);
-
-    int res = g_pci_set_irq_hw_int(state, int_pin, irq);
-
-    spin_unlock_irqrestore(&lock, irqstate);
-
-    return res;
-}
-
-void pci_init(void)
-{
-    if (!pci_bios_detect()) {
-        dprintf(INFO, "pci bios functions installed\n");
-        dprintf(INFO, "last pci bus is %d\n", last_bus);
-    }
-}
-
-#define PCIBIOS_PRESENT                 0xB101
-#define PCIBIOS_FIND_PCI_DEVICE         0xB102
-#define PCIBIOS_FIND_PCI_CLASS_CODE     0xB103
-#define PCIBIOS_GENERATE_SPECIAL_CYCLE  0xB106
-#define PCIBIOS_READ_CONFIG_BYTE        0xB108
-#define PCIBIOS_READ_CONFIG_WORD        0xB109
-#define PCIBIOS_READ_CONFIG_DWORD       0xB10A
-#define PCIBIOS_WRITE_CONFIG_BYTE       0xB10B
-#define PCIBIOS_WRITE_CONFIG_WORD       0xB10C
-#define PCIBIOS_WRITE_CONFIG_DWORD      0xB10D
-#define PCIBIOS_GET_IRQ_ROUTING_OPTIONS 0xB10E
-#define PCIBIOS_PCI_SET_IRQ_HW_INT      0xB10F
-
-#define PCIBIOS_SUCCESSFUL              0x00
-#define PCIBIOS_FUNC_NOT_SUPPORTED      0x81
-#define PCIBIOS_BAD_VENDOR_ID           0x83
-#define PCIBIOS_DEVICE_NOT_FOUND        0x86
-#define PCIBIOS_BAD_REGISTER_NUMBER     0x87
-#define PCIBIOS_SET_FAILED              0x88
-#define PCIBIOS_BUFFER_TOO_SMALL        0x89
-
-/*
- * far call structure used by BIOS32 routines
- */
-static struct {
-    uint32_t offset;
-    uint16_t selector;
-} __PACKED bios32_entry;
-
-/*
- * BIOS32 entry header
- */
-typedef struct {
-    uint8_t magic[4];   // "_32_"
-    void *entry;        // entry point
-    uint8_t revision;
-    uint8_t length;
-    uint8_t checksum;
-    uint8_t reserved[5];
-} __PACKED pci_bios_info;
-
-/*
- * scan for pci bios
- */
-static const char *pci_bios_magic = "_32_";
-static pci_bios_info *find_pci_bios_info(void)
-{
-    uint32_t *head = (uint32_t *) (0x000e0000 + KERNEL_BASE);
-    int8_t sum, *b;
-    uint i;
-
-    while (head < (uint32_t *) (0x000ffff0 + KERNEL_BASE)) {
-        if (*head == *(uint32_t *) pci_bios_magic) {
-            // perform the checksum
-            sum = 0;
-            b = (int8_t *) head;
-            for (i=0; i < sizeof(pci_bios_info); i++) {
-                sum += b[i];
-            }
-
-            if (sum == 0) {
-                return (pci_bios_info *) head;
-            }
-        }
-
-        head += 4;
-    }
-
-    return NULL;
-}
-
-/*
- * local BIOS32 PCI routines
- */
-static int bios_find_pci_device(pci_location_t *state, uint16_t device_id, uint16_t vendor_id, uint16_t index)
-{
-    uint32_t bx, ret;
-
-    __asm__(
-        "lcall *(%%edi)		\n\t"
-        "jc 1f				\n\t"
-        "xor %%ah,%%ah		\n"
-        "1:"
-        : "=b"(bx),
-        "=a"(ret)
-        : "1"(PCIBIOS_FIND_PCI_DEVICE),
-        "c"(device_id),
-        "d"(vendor_id),
-        "S"(index),
-        "D"(&bios32_entry));
-
-    state->bus = bx >> 8;
-    state->dev_fn = bx & 0xFF;
-
-    ret >>= 8;
-    return ret & 0xFF;
-}
-
-static int bios_find_pci_class_code(pci_location_t *state, uint32_t class_code, uint16_t index)
-{
-    uint32_t bx, ret;
-
-    __asm__(
-        "lcall *(%%edi)			\n\t"
-        "jc 1f					\n\t"
-        "xor %%ah,%%ah			\n"
-        "1:"
-        : "=b"(bx),
-        "=a"(ret)
-        : "1"(PCIBIOS_FIND_PCI_CLASS_CODE),
-        "c"(class_code),
-        "S"(index),
-        "D"(&bios32_entry));
-
-    state->bus = bx >> 8;
-    state->dev_fn = bx & 0xFF;
-
-    ret >>= 8;
-    return ret & 0xFF;
-}
-
-
-static int bios_read_config_byte(const pci_location_t *state, uint32_t reg, uint8_t *value)
-{
-    uint32_t bx, ret;
-
-    bx = state->bus;
-    bx <<= 8;
-    bx |= state->dev_fn;
-    __asm__(
-        "lcall *(%%esi)			\n\t"
-        "jc 1f					\n\t"
-        "xor %%ah,%%ah			\n"
-        "1:"
-        : "=c"(*value),
-        "=a"(ret)
-        : "1"(PCIBIOS_READ_CONFIG_BYTE),
-        "b"(bx),
-        "D"(reg),
-        "S"(&bios32_entry));
-    ret >>= 8;
-    return ret & 0xFF;
-}
-
-static int bios_read_config_half(const pci_location_t *state, uint32_t reg, uint16_t *value)
-{
-    uint32_t bx, ret;
-
-    bx = state->bus;
-    bx <<= 8;
-    bx |= state->dev_fn;
-    __asm__(
-        "lcall *(%%esi)			\n\t"
-        "jc 1f					\n\t"
-        "xor %%ah,%%ah			\n"
-        "1:"
-        : "=c"(*value),
-        "=a"(ret)
-        : "1"(PCIBIOS_READ_CONFIG_WORD),
-        "b"(bx),
-        "D"(reg),
-        "S"(&bios32_entry));
-    ret >>= 8;
-    return ret & 0xFF;
-}
-
-static int bios_read_config_word(const pci_location_t *state, uint32_t reg, uint32_t *value)
-{
-    uint32_t bx, ret;
-
-    bx = state->bus;
-    bx <<= 8;
-    bx |= state->dev_fn;
-    __asm__(
-        "lcall *(%%esi)			\n\t"
-        "jc 1f					\n\t"
-        "xor %%ah,%%ah			\n"
-        "1:"
-        : "=c"(*value),
-        "=a"(ret)
-        : "1"(PCIBIOS_READ_CONFIG_DWORD),
-        "b"(bx),
-        "D"(reg),
-        "S"(&bios32_entry));
-    ret >>= 8;
-    return ret & 0xFF;
-}
-
-static int bios_write_config_byte(const pci_location_t *state, uint32_t reg, uint8_t value)
-{
-    uint32_t bx, ret;
-
-    bx = state->bus;
-    bx <<= 8;
-    bx |= state->dev_fn;
-    __asm__(
-        "lcall *(%%esi)			\n\t"
-        "jc 1f					\n\t"
-        "xor %%ah,%%ah			\n"
-        "1:"
-        : "=a"(ret)
-        : "0"(PCIBIOS_WRITE_CONFIG_BYTE),
-        "c"(value),
-        "b"(bx),
-        "D"(reg),
-        "S"(&bios32_entry));
-    ret >>= 8;
-    return ret & 0xFF;
-}
-
-static int bios_write_config_half(const pci_location_t *state, uint32_t reg, uint16_t value)
-{
-    uint32_t bx, ret;
-
-    bx = state->bus;
-    bx <<= 8;
-    bx |= state->dev_fn;
-    __asm__(
-        "lcall *(%%esi)	\n\t"
-        "jc 1f					\n\t"
-        "xor %%ah,%%ah			\n"
-        "1:"
-        : "=a"(ret)
-        : "0"(PCIBIOS_WRITE_CONFIG_WORD),
-        "c"(value),
-        "b"(bx),
-        "D"(reg),
-        "S"(&bios32_entry));
-    ret >>= 8;
-    return ret & 0xFF;
-}
-
-static int bios_write_config_word(const pci_location_t *state, uint32_t reg, uint32_t value)
-{
-    uint32_t bx, ret;
-
-    bx = state->bus;
-    bx <<= 8;
-    bx |= state->dev_fn;
-    __asm__(
-        "lcall *(%%esi)			\n\t"
-        "jc 1f					\n\t"
-        "xor %%ah,%%ah			\n"
-        "1:"
-        : "=a"(ret)
-        : "0"(PCIBIOS_WRITE_CONFIG_DWORD),
-        "c"(value),
-        "b"(bx),
-        "D"(reg),
-        "S"(&bios32_entry));
-    ret >>= 8;
-    return ret & 0xFF;
-}
-
-static int bios_get_irq_routing_options(irq_routing_options_t *route_buffer, uint16_t *pciIrqs)
-{
-    uint32_t ret;
-
-    __asm__(
-        "lcall *(%%esi)			\n\t"
-        "jc 1f					\n\t"
-        "xor %%ah,%%ah			\n"
-        "1:"
-        : "=b"(*pciIrqs),
-        "=a"(ret)
-        : "1"(PCIBIOS_GET_IRQ_ROUTING_OPTIONS),
-        "b"(0),
-        "D"(route_buffer),
-        "S"(&bios32_entry));
-    ret >>= 8;
-    return ret & 0xff;
-}
-
-static int bios_set_irq_hw_int(const pci_location_t *state, uint8_t int_pin, uint8_t irq)
-{
-    uint32_t bx, cx, ret;
-
-    bx = state->bus;
-    bx <<= 8;
-    bx |= state->dev_fn;
-    cx = irq;
-    cx <<= 8;
-    cx |= int_pin;
-    __asm__(
-        "lcall *(%%esi)			\n\t"
-        "jc 1f					\n\t"
-        "xor %%ah,%%ah			\n"
-        "1:"
-        : "=a"(ret)
-        : "0"(PCIBIOS_PCI_SET_IRQ_HW_INT),
-        "b"(bx),
-        "c"(cx),
-        "S"(&bios32_entry));
-    ret >>= 8;
-    return ret & 0xFF;
-}
-
-static const char *pci_signature = "PCI ";
-static int pci_bios_detect(void)
-{
-    // XXX disable for now
-    return 0;
-
-    pci_bios_info *pci = find_pci_bios_info();
-    if (pci != NULL) {
-        printf("Found PCI structure at %08x\n", (uint32_t) pci);
-
-        printf("\nPCI header info:\n");
-        printf("%c%c%c%c\n", pci->magic[0], pci->magic[1], pci->magic[2],
-            pci->magic[3]);
-        printf("%08x\n", (uint32_t) pci->entry);
-        printf("%d\n", pci->length * 16);
-        printf("%d\n", pci->checksum);
-
-        uint32_t adr, temp, len;
-        uint8_t err;
-
-        bios32_entry.offset = (uint32_t)pci->entry + KERNEL_BASE;
-        bios32_entry.selector = CODE_SELECTOR;
-
-        __asm__(
-            "lcall *(%%edi)"
-            : "=a"(err),    /* AL out=status */
-            "=b"(adr),    /* EBX out=code segment base adr */
-            "=c"(len),    /* ECX out=code segment size */
-            "=d"(temp)    /* EDX out=entry pt offset in code */
-            : "0"(0x49435024),/* EAX in=service="$PCI" */
-            "1"(0),   /* EBX in=0=get service entry pt */
-            "D"(&bios32_entry)
-        );
-
-        if (err == 0x80) {
-            dprintf(INFO, "BIOS32 found, but no PCI BIOS\n");
-            return -1;
-        }
-
-        if (err != 0) {
-            dprintf(INFO, "BIOS32 call to locate PCI BIOS returned %x\n", err);
-            return -1;
-        }
-
-        bios32_entry.offset = adr + temp;
-
-        // now call PCI_BIOS_PRESENT to get version, hw mechanism, and last bus
-        uint16_t present, version, busses;
-        uint32_t signature;
-        __asm__(
-            "lcall *(%%edi)		\n\t"
-            "jc 1f				\n\t"
-            "xor %%ah,%%ah		\n"
-            "1:"
-            : "=a"(present),
-            "=b"(version),
-            "=c"(busses),
-            "=d"(signature)
-            : "0"(PCIBIOS_PRESENT),
-            "D"(&bios32_entry)
-        );
-
-        if (present & 0xff00) {
-            dprintf(INFO, "PCI_BIOS_PRESENT call returned ah=%02x\n", present >> 8);
-            return -1;
-        }
-
-        if (signature != *(uint32_t *)pci_signature) {
-            dprintf(INFO, "PCI_BIOS_PRESENT call returned edx=%08x\n", signature);
-            return -1;
-        }
-
-        //dprintf(DEBUG, "busses=%04x\n", busses);
-        last_bus = busses & 0xff;
-
-        g_pci_find_pci_device = bios_find_pci_device;
-        g_pci_find_pci_class_code = bios_find_pci_class_code;
-
-        g_pci_read_config_word = bios_read_config_word;
-        g_pci_read_config_half = bios_read_config_half;
-        g_pci_read_config_byte = bios_read_config_byte;
-
-        g_pci_write_config_word = bios_write_config_word;
-        g_pci_write_config_half = bios_write_config_half;
-        g_pci_write_config_byte = bios_write_config_byte;
-
-        g_pci_get_irq_routing_options = bios_get_irq_routing_options;
-        g_pci_set_irq_hw_int = bios_set_irq_hw_int;
-
-        return 0;
-    }
-
-    return -1;
-}
diff --git a/platform/pc/platform.c b/platform/pc/platform.c
deleted file mode 100644
index a25165aa..00000000
--- a/platform/pc/platform.c
+++ /dev/null
@@ -1,260 +0,0 @@
-/*
- * Copyright (c) 2009 Corey Tabaka
- * Copyright (c) 2015 Intel Corporation
- * Copyright (c) 2016 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <err.h>
-#include <trace.h>
-#include <arch/x86/mmu.h>
-#include <platform.h>
-#include "platform_p.h"
-#include <platform/pc.h>
-#include <platform/multiboot.h>
-#include <platform/console.h>
-#include <platform/keyboard.h>
-#include <dev/pci.h>
-#include <dev/uart.h>
-#include <arch/x86.h>
-#include <arch/mmu.h>
-#include <malloc.h>
-#include <string.h>
-#include <assert.h>
-#include <kernel/vm.h>
-
-#define LOCAL_TRACE 0
-
-/* multiboot information passed in, if present */
-extern multiboot_info_t *_multiboot_info;
-
-#define DEFAULT_MEMEND (16*1024*1024)
-
-static paddr_t mem_top = DEFAULT_MEMEND;
-extern uint64_t __code_start;
-extern uint64_t __code_end;
-extern uint64_t __rodata_start;
-extern uint64_t __rodata_end;
-extern uint64_t __data_start;
-extern uint64_t __data_end;
-extern uint64_t __bss_start;
-extern uint64_t __bss_end;
-
-extern void pci_init(void);
-
-void platform_init_mmu_mappings(void)
-{
-    // XXX move into arch/x86 setup
-#if 0
-    struct map_range range;
-    arch_flags_t access;
-    map_addr_t *init_table, phy_init_table;
-
-    LTRACE_ENTRY;
-
-    /* Creating the First page in the page table hirerachy */
-    /* Can be pml4, pdpt or pdt based on x86_64, x86 PAE mode & x86 non-PAE mode respectively */
-    init_table = memalign(PAGE_SIZE, PAGE_SIZE);
-    ASSERT(init_table);
-    memset(init_table, 0, PAGE_SIZE);
-
-    phy_init_table = (map_addr_t)X86_VIRT_TO_PHYS(init_table);
-    LTRACEF("phy_init_table: %p\n", phy_init_table);
-
-    /* kernel code section mapping */
-    LTRACEF("mapping kernel code\n");
-    access = ARCH_MMU_FLAG_PERM_RO;
-    range.start_vaddr = range.start_paddr = (map_addr_t) &__code_start;
-    range.size = ((map_addr_t)&__code_end) - ((map_addr_t)&__code_start);
-    x86_mmu_map_range(phy_init_table, &range, access);
-
-    /* kernel data section mapping */
-    LTRACEF("mapping kernel data\n");
-    access = 0;
-#if defined(ARCH_X86_64) || defined(PAE_MODE_ENABLED)
-    access |= ARCH_MMU_FLAG_PERM_NO_EXECUTE;
-#endif
-    range.start_vaddr = range.start_paddr = (map_addr_t) &__data_start;
-    range.size = ((map_addr_t)&__data_end) - ((map_addr_t)&__data_start);
-    x86_mmu_map_range(phy_init_table, &range, access);
-
-    /* kernel rodata section mapping */
-    LTRACEF("mapping kernel rodata\n");
-    access = ARCH_MMU_FLAG_PERM_RO;
-#if defined(ARCH_X86_64) || defined(PAE_MODE_ENABLED)
-    access |= ARCH_MMU_FLAG_PERM_NO_EXECUTE;
-#endif
-    range.start_vaddr = range.start_paddr = (map_addr_t) &__rodata_start;
-    range.size = ((map_addr_t)&__rodata_end) - ((map_addr_t)&__rodata_start);
-    x86_mmu_map_range(phy_init_table, &range, access);
-
-    /* kernel bss section and kernel heap mappings */
-    LTRACEF("mapping kernel bss+heap\n");
-    access = 0;
-#ifdef ARCH_X86_64
-    access |= ARCH_MMU_FLAG_PERM_NO_EXECUTE;
-#endif
-    range.start_vaddr = range.start_paddr = (map_addr_t) &__bss_start;
-    range.size = ((map_addr_t)_heap_end) - ((map_addr_t)&__bss_start);
-    x86_mmu_map_range(phy_init_table, &range, access);
-
-    /* Mapping for BIOS, devices */
-    LTRACEF("mapping bios devices\n");
-    access = 0;
-    range.start_vaddr = range.start_paddr = (map_addr_t) 0;
-    range.size = ((map_addr_t)&__code_start);
-    x86_mmu_map_range(phy_init_table, &range, access);
-
-    /* Moving to the new CR3 */
-    g_CR3 = (map_addr_t)phy_init_table;
-    x86_set_cr3((map_addr_t)phy_init_table);
-
-    LTRACE_EXIT;
-#endif
-}
-
-#if WITH_KERNEL_VM
-struct mmu_initial_mapping mmu_initial_mappings[] = {
-#if ARCH_X86_64
-    /* 64GB of memory mapped where the kernel lives */
-    {
-        .phys = MEMBASE,
-        .virt = KERNEL_ASPACE_BASE,
-        .size = 64ULL*GB, /* x86-64 maps first 64GB by default */
-        .flags = 0,
-        .name = "memory"
-    },
-#endif
-    /* 1GB of memory mapped where the kernel lives */
-    {
-        .phys = MEMBASE,
-        .virt = KERNEL_BASE,
-        .size = 1*GB, /* x86 maps first 1GB by default */
-        .flags = 0,
-        .name = "kernel"
-    },
-
-    /* null entry to terminate the list */
-    { 0 }
-};
-
-static pmm_arena_t mem_arena = {
-    .name = "memory",
-    .base = MEMBASE,
-    .size = DEFAULT_MEMEND, /* default amount of memory in case we don't have multiboot */
-    .priority = 1,
-    .flags = PMM_ARENA_FLAG_KMAP
-};
-
-/* set up the size of the physical memory map based on the end of memory we detected in
- * platform_init_multiboot_info()
- */
-void mem_arena_init(void)
-{
-    uintptr_t mem_base = (uintptr_t)MEMBASE;
-    uintptr_t mem_size = mem_top;
-
-    mem_arena.base = PAGE_ALIGN(mem_base) + MB;
-    mem_arena.size = PAGE_ALIGN(mem_size) - MB;
-}
-#endif
-
-void platform_init_multiboot_info(void)
-{
-    LTRACEF("_multiboot_info %p\n", _multiboot_info);
-    if (_multiboot_info) {
-        /* bump the multiboot pointer up to the kernel mapping */
-        _multiboot_info = (void *)((uintptr_t)_multiboot_info + KERNEL_BASE);
-
-        if (_multiboot_info->flags & MB_INFO_MEM_SIZE) {
-            LTRACEF("memory lower 0x%x\n", _multiboot_info->mem_lower * 1024U);
-            LTRACEF("memory upper 0x%llx\n", _multiboot_info->mem_upper * 1024ULL);
-            mem_top = _multiboot_info->mem_upper * 1024;
-        }
-
-        if (_multiboot_info->flags & MB_INFO_MMAP) {
-            memory_map_t *mmap = (memory_map_t *)(uintptr_t)_multiboot_info->mmap_addr;
-            mmap = (void *)((uintptr_t)mmap + KERNEL_BASE);
-
-            LTRACEF("memory map:\n");
-            for (uint i = 0; i < _multiboot_info->mmap_length / sizeof(memory_map_t); i++) {
-
-                LTRACEF("\ttype %u addr 0x%x %x len 0x%x %x\n",
-                    mmap[i].type, mmap[i].base_addr_high, mmap[i].base_addr_low,
-                    mmap[i].length_high, mmap[i].length_low);
-                if (mmap[i].type == MB_MMAP_TYPE_AVAILABLE && mmap[i].base_addr_low >= mem_top) {
-                    mem_top = mmap[i].base_addr_low + mmap[i].length_low;
-                } else if (mmap[i].type != MB_MMAP_TYPE_AVAILABLE && mmap[i].base_addr_low >= mem_top) {
-                    /*
-                     * break on first memory hole above default heap end for now.
-                     * later we can add facilities for adding free chunks to the
-                     * heap for each segregated memory region.
-                     */
-                    break;
-                }
-            }
-        }
-    }
-
-#if ARCH_X86_32
-    if (mem_top > 1*GB) {
-        /* trim the memory map to 1GB, since that's what's already mapped in the kernel */
-        TRACEF("WARNING: trimming memory to first 1GB\n");
-        mem_top = 1*GB;
-    }
-#endif
-    LTRACEF("mem_top 0x%lx\n", mem_top);
-}
-
-void platform_early_init(void)
-{
-    /* get the debug output working */
-    platform_init_debug_early();
-
-    /* get the text console working */
-    platform_init_console();
-
-    /* initialize the interrupt controller */
-    platform_init_interrupts();
-
-    /* initialize the timer */
-    platform_init_timer();
-
-    /* look at multiboot to determine our memory size */
-    platform_init_multiboot_info();
-
-#ifdef WITH_KERNEL_VM
-    mem_arena_init();
-    pmm_add_arena(&mem_arena);
-#endif
-}
-
-void platform_init(void)
-{
-    platform_init_debug();
-
-    platform_init_keyboard(&console_input_buf);
-#if defined(ARCH_X86)
-    pci_init();
-#endif
-
-    platform_init_mmu_mappings();
-}
diff --git a/platform/pc/platform_p.h b/platform/pc/platform_p.h
deleted file mode 100644
index f7772d7d..00000000
--- a/platform/pc/platform_p.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * Copyright (c) 2009 Corey Tabaka
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <lib/cbuf.h>
-
-extern cbuf_t console_input_buf;
-
-void platform_init_debug_early(void);
-void platform_init_debug(void);
-void platform_init_interrupts(void);
-void platform_init_timer(void);
-
diff --git a/platform/pc/rules.mk b/platform/pc/rules.mk
deleted file mode 100644
index 5ef62d23..00000000
--- a/platform/pc/rules.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-CPU := generic
-
-MODULE_DEPS += \
-    lib/cbuf \
-
-MODULE_SRCS += \
-    $(LOCAL_DIR)/interrupts.c \
-    $(LOCAL_DIR)/platform.c \
-    $(LOCAL_DIR)/timer.c \
-    $(LOCAL_DIR)/debug.c \
-    $(LOCAL_DIR)/console.c \
-    $(LOCAL_DIR)/keyboard.c \
-    $(LOCAL_DIR)/pci.c \
-    $(LOCAL_DIR)/ide.c \
-    $(LOCAL_DIR)/uart.c \
-
-
-LK_HEAP_IMPLEMENTATION ?= dlmalloc
-
-include make/module.mk
-
diff --git a/platform/pc/timer.c b/platform/pc/timer.c
deleted file mode 100644
index fd263323..00000000
--- a/platform/pc/timer.c
+++ /dev/null
@@ -1,211 +0,0 @@
-/*
- * Copyright (c) 2009 Corey Tabaka
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <sys/types.h>
-#include <err.h>
-#include <reg.h>
-#include <debug.h>
-#include <kernel/thread.h>
-#include <kernel/spinlock.h>
-#include <platform.h>
-#include <platform/interrupts.h>
-#include <platform/console.h>
-#include <platform/timer.h>
-#include <platform/pc.h>
-#include "platform_p.h"
-#include <arch/x86.h>
-
-static platform_timer_callback t_callback;
-static void *callback_arg;
-static spin_lock_t lock;
-
-static uint64_t next_trigger_time;
-static uint64_t next_trigger_delta;
-static uint64_t ticks_per_ms;
-
-static uint64_t timer_delta_time;
-static volatile uint64_t timer_current_time;
-
-static uint16_t divisor;
-
-#define INTERNAL_FREQ 1193182ULL
-#define INTERNAL_FREQ_3X 3579546ULL
-
-/* Maximum amount of time that can be program on the timer to schedule the next
- *  interrupt, in milliseconds */
-#define MAX_TIMER_INTERVAL 55
-
-
-
-status_t platform_set_periodic_timer(platform_timer_callback callback, void *arg, lk_time_t interval)
-{
-    t_callback = callback;
-    callback_arg = arg;
-
-    next_trigger_delta = (uint64_t) interval << 32;
-    next_trigger_time = timer_current_time + next_trigger_delta;
-
-    return NO_ERROR;
-}
-
-lk_time_t current_time(void)
-{
-    lk_time_t time;
-
-    // XXX slight race
-    time = (lk_time_t) (timer_current_time >> 32);
-
-    return time;
-}
-
-lk_bigtime_t current_time_hires(void)
-{
-    lk_bigtime_t time;
-
-    // XXX slight race
-    time = (lk_bigtime_t) ((timer_current_time >> 22) * 1000) >> 10;
-
-    return time;
-}
-static enum handler_return os_timer_tick(void *arg)
-{
-    uint64_t delta;
-
-    timer_current_time += timer_delta_time;
-
-    lk_time_t time = current_time();
-    //lk_bigtime_t btime = current_time_hires();
-    //printf_xy(71, 0, WHITE, "%08u", (uint32_t) time);
-    //printf_xy(63, 1, WHITE, "%016llu", (uint64_t) btime);
-
-    if (t_callback && timer_current_time >= next_trigger_time) {
-        delta = timer_current_time - next_trigger_time;
-        next_trigger_time = timer_current_time + next_trigger_delta - delta;
-
-        return t_callback(callback_arg, time);
-    } else {
-        return INT_NO_RESCHEDULE;
-    }
-}
-
-static void set_pit_frequency(uint32_t frequency)
-{
-    uint32_t count, remainder;
-
-    /* figure out the correct divisor for the desired frequency */
-    if (frequency <= 18) {
-        count = 0xffff;
-    } else if (frequency >= INTERNAL_FREQ) {
-        count = 1;
-    } else {
-        count = INTERNAL_FREQ_3X / frequency;
-        remainder = INTERNAL_FREQ_3X % frequency;
-
-        if (remainder >= INTERNAL_FREQ_3X / 2) {
-            count += 1;
-        }
-
-        count /= 3;
-        remainder = count % 3;
-
-        if (remainder >= 1) {
-            count += 1;
-        }
-    }
-
-    divisor = count & 0xffff;
-
-    /*
-     * funky math that i don't feel like explaining. essentially 32.32 fixed
-     * point representation of the configured timer delta.
-     */
-    timer_delta_time = (3685982306ULL * count) >> 10;
-
-    //dprintf(DEBUG, "set_pit_frequency: dt=%016llx\n", timer_delta_time);
-    //dprintf(DEBUG, "set_pit_frequency: divisor=%04x\n", divisor);
-
-    /*
-     * setup the Programmable Interval Timer
-     * timer 0, mode 2, binary counter, LSB followed by MSB
-     */
-    outp(I8253_CONTROL_REG, 0x34);
-    outp(I8253_DATA_REG, divisor & 0xff); // LSB
-    outp(I8253_DATA_REG, divisor >> 8); // MSB
-}
-
-void platform_init_timer(void)
-{
-
-    timer_current_time = 0;
-    ticks_per_ms = INTERNAL_FREQ/1000;
-    set_pit_frequency(1000); // ~1ms granularity
-    register_int_handler(INT_PIT, &os_timer_tick, NULL);
-    unmask_interrupt(INT_PIT);
-}
-
-void platform_halt_timers(void)
-{
-    mask_interrupt(INT_PIT);
-}
-
-
-
-status_t platform_set_oneshot_timer(platform_timer_callback callback,
-                                    void *arg, lk_time_t interval)
-{
-
-    uint32_t count;
-
-    spin_lock_saved_state_t state;
-    spin_lock_irqsave(&lock, state);
-
-    t_callback = callback;
-    callback_arg = arg;
-
-
-    if (interval > MAX_TIMER_INTERVAL)
-        interval = MAX_TIMER_INTERVAL;
-    if (interval < 1) interval = 1;
-
-    count = ticks_per_ms * interval;
-
-    divisor = count & 0xffff;
-    timer_delta_time = (3685982306ULL * count) >> 10;
-    /* Program PIT in the software strobe configuration, to send one pulse
-     * after the count reach 0 */
-    outp(I8253_CONTROL_REG, 0x38);
-    outp(I8253_DATA_REG, divisor & 0xff); // LSB
-    outp(I8253_DATA_REG, divisor >> 8); // MSB
-
-
-    unmask_interrupt(INT_PIT);
-    spin_unlock_irqrestore(&lock, state);
-
-    return NO_ERROR;
-}
-
-void platform_stop_timer(void)
-{
-    /* Enable interrupt mode that will stop the decreasing counter of the PIT */
-    outp(I8253_CONTROL_REG, 0x30);
-    return;
-}
diff --git a/platform/pc/uart.c b/platform/pc/uart.c
deleted file mode 100644
index be94bf60..00000000
--- a/platform/pc/uart.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/*
- * Copyright (c) 2012 Corey Tabaka
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <dev/driver.h>
-#include <dev/class/uart.h>
-#include <debug.h>
-#include <assert.h>
-#include <malloc.h>
-#include <err.h>
-#include <lib/cbuf.h>
-#include <platform/uart.h>
-#include <arch/x86.h>
-#include <kernel/thread.h>
-#include <platform/interrupts.h>
-
-struct device_class uart_device_class = {
-    .name = "uart",
-};
-
-struct uart_driver_state {
-    struct cbuf rx_buf;
-    struct cbuf tx_buf;
-};
-
-static status_t uart_init(struct device *dev);
-
-static enum handler_return uart_irq_handler(void *arg);
-static int uart_write_thread(void *arg);
-
-static ssize_t uart_read(struct device *dev, void *buf, size_t len);
-static ssize_t uart_write(struct device *dev, const void *buf, size_t len);
-
-static struct uart_ops the_ops = {
-    .std = {
-        .device_class = &uart_device_class,
-        .init = uart_init,
-    },
-    .read = uart_read,
-    .write = uart_write,
-};
-
-DRIVER_EXPORT(uart, &the_ops.std);
-
-static status_t uart_init(struct device *dev)
-{
-    status_t res = NO_ERROR;
-
-    if (!dev)
-        return ERR_INVALID_ARGS;
-
-    if (!dev->config)
-        return ERR_NOT_CONFIGURED;
-
-    const struct platform_uart_config *config = dev->config;
-
-    struct uart_driver_state *state = malloc(sizeof(struct uart_driver_state));
-    if (!state) {
-        res = ERR_NO_MEMORY;
-        goto done;
-    }
-
-    dev->state = state;
-
-    /* set up the driver state */
-    cbuf_initialize(&state->rx_buf, config->rx_buf_len);
-    cbuf_initialize(&state->tx_buf, config->tx_buf_len);
-
-    /* configure the uart */
-    int divisor = 115200 / config->baud_rate;
-
-    outp(config->io_port + 3, 0x80); // set up to load divisor latch
-    outp(config->io_port + 0, divisor & 0xff); // lsb
-    outp(config->io_port + 1, divisor >> 8); // msb
-    outp(config->io_port + 3, 3); // 8N1
-    outp(config->io_port + 2, 0x07); // enable FIFO, clear, 14-byte threshold
-
-    register_int_handler(config->irq, uart_irq_handler, dev);
-    unmask_interrupt(config->irq);
-
-    //outp(config->io_port + 1, 0x3); // enable rx data available and tx holding empty interrupts
-    outp(config->io_port + 1, 0x1); // enable rx data available interrupts
-
-    thread_resume(thread_create("[uart writer]", uart_write_thread, dev, DEFAULT_PRIORITY,
-                                DEFAULT_STACK_SIZE));
-
-done:
-    return res;
-}
-
-static enum handler_return uart_irq_handler(void *arg)
-{
-    bool resched = false;
-    struct device *dev = arg;
-
-    DEBUG_ASSERT(dev);
-    DEBUG_ASSERT(dev->config);
-    DEBUG_ASSERT(dev->state);
-
-    const struct platform_uart_config *config = dev->config;
-    struct uart_driver_state *state = dev->state;
-
-    while (inp(config->io_port + 5) & (1<<0)) {
-        char c = inp(config->io_port + 0);
-        cbuf_write(&state->rx_buf, &c, 1, false);
-        resched = true;
-    }
-
-    return resched ? INT_RESCHEDULE : INT_NO_RESCHEDULE;
-}
-
-static int uart_write_thread(void *arg)
-{
-    struct device *dev = arg;
-
-    DEBUG_ASSERT(dev);
-    DEBUG_ASSERT(dev->config);
-    DEBUG_ASSERT(dev->state);
-
-    const struct platform_uart_config *config = dev->config;
-    struct uart_driver_state *state = dev->state;
-
-    return 0;
-
-    while (true) {
-        char c = cbuf_read(&state->tx_buf, &c, 1, true);
-
-        while ((inp(config->io_port + 5) & (1<<6)) == 0)
-            ;
-
-        outp(config->io_port + 0, c);
-    }
-
-    return 0;
-}
-
-static ssize_t uart_read(struct device *dev, void *buf, size_t len)
-{
-    if (!dev || !buf)
-        return ERR_INVALID_ARGS;
-
-    DEBUG_ASSERT(dev->state);
-    struct uart_driver_state *state = dev->state;
-
-    return cbuf_read(&state->rx_buf, buf, len, true);
-}
-
-static ssize_t uart_write(struct device *dev, const void *buf, size_t len)
-{
-    if (!dev || !buf)
-        return ERR_INVALID_ARGS;
-
-    DEBUG_ASSERT(dev->state);
-    struct uart_driver_state *state = dev->state;
-
-    return cbuf_write(&state->tx_buf, buf, len, true);
-}
-
diff --git a/platform/qemu-mips/debug.c b/platform/qemu-mips/debug.c
deleted file mode 100644
index c69c5da3..00000000
--- a/platform/qemu-mips/debug.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * Copyright (c) 2009 Corey Tabaka
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <trace.h>
-#include <stdio.h>
-#include <kernel/thread.h>
-#include <lib/cbuf.h>
-#include <platform/interrupts.h>
-#include <platform/qemu-mips.h>
-
-static int uart_baud_rate = 115200;
-static int uart_io_port = 0x3f8;
-
-static cbuf_t uart_rx_buf;
-
-static enum handler_return uart_irq_handler(void *arg)
-{
-    unsigned char c;
-    bool resched = false;
-
-    while (isa_read_8(uart_io_port + 5) & (1<<0)) {
-        c = isa_read_8(uart_io_port + 0);
-        cbuf_write_char(&uart_rx_buf, c, false);
-        resched = true;
-    }
-
-    return resched ? INT_RESCHEDULE : INT_NO_RESCHEDULE;
-}
-
-void platform_init_uart(void)
-{
-    /* configure the uart */
-    int divisor = 115200 / uart_baud_rate;
-
-    /* get basic config done so that tx functions */
-    isa_write_8(uart_io_port + 3, 0x80); // set up to load divisor latch
-    isa_write_8(uart_io_port + 0, divisor & 0xff); // lsb
-    isa_write_8(uart_io_port + 1, divisor >> 8); // msb
-    isa_write_8(uart_io_port + 3, 3); // 8N1
-    isa_write_8(uart_io_port + 2, 0x07); // enable FIFO, clear, 14-byte threshold
-}
-
-void uart_init(void)
-{
-    /* finish uart init to get rx going */
-    cbuf_initialize(&uart_rx_buf, 16);
-
-    register_int_handler(0x4, uart_irq_handler, NULL);
-    unmask_interrupt(0x4);
-
-    isa_write_8(uart_io_port + 1, 0x1); // enable receive data available interrupt
-}
-
-void uart_putc(char c)
-{
-    while ((isa_read_8(uart_io_port + 5) & (1<<6)) == 0)
-        ;
-    isa_write_8(uart_io_port + 0, c);
-}
-
-int uart_getc(char *c, bool wait)
-{
-    return cbuf_read_char(&uart_rx_buf, c, wait);
-}
-
-void platform_dputc(char c)
-{
-    if (c == '\n')
-        platform_dputc('\r');
-#if WITH_CGA_CONSOLE
-    cputc(c);
-#else
-    uart_putc(c);
-#endif
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-#if WITH_CGA_CONSOLE
-    int ret =  platform_read_key(c);
-    //if (ret < 0)
-    //  arch_idle();
-#else
-    int ret = uart_getc(c, wait);
-#endif
-
-    return ret;
-}
diff --git a/platform/qemu-mips/include/platform/qemu-mips.h b/platform/qemu-mips/include/platform/qemu-mips.h
deleted file mode 100644
index 5873adc1..00000000
--- a/platform/qemu-mips/include/platform/qemu-mips.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <stdint.h>
-
-/*
- * The plain mips target for qemu has an emulated PC style UART mapped
- * into the ISA io port apterture at 0x14000000
- */
-#define ISA_IO_BASE ((volatile uint8_t *)0x14000000 + 0x80000000)
-#define UART_PORT_BASE (0x3f8)
-
-static inline void isa_write_8(uint16_t port, uint8_t val)
-{
-    volatile uint8_t *addr = ISA_IO_BASE + port;
-
-    *addr = val;
-}
-
-static inline uint8_t isa_read_8(uint16_t port)
-{
-    volatile uint8_t *addr = ISA_IO_BASE + port;
-
-    return *addr;
-}
-
-#define INT_VECTORS 8
diff --git a/platform/qemu-mips/intc.c b/platform/qemu-mips/intc.c
deleted file mode 100644
index de1f9527..00000000
--- a/platform/qemu-mips/intc.c
+++ /dev/null
@@ -1,287 +0,0 @@
-/*
- * Copyright (c) 2009 Corey Tabaka
- * Copyright (c) 2015 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <sys/types.h>
-#include <debug.h>
-#include <trace.h>
-#include <err.h>
-#include <reg.h>
-#include <kernel/thread.h>
-#include <platform/interrupts.h>
-#include <arch/ops.h>
-#include <arch/mips.h>
-#include <platform/qemu-mips.h>
-
-#define LOCAL_TRACE 0
-
-static spin_lock_t lock;
-
-#define PIC1 0x20
-#define PIC2 0xA0
-
-#define ICW1 0x11
-#define ICW4 0x01
-
-#define PIC1_CMD                    0x20
-#define PIC1_DATA                   0x21
-#define PIC2_CMD                    0xA0
-#define PIC2_DATA                   0xA1
-#define PIC_READ_IRR                0x0a    /* OCW3 irq ready next CMD read */
-#define PIC_READ_ISR                0x0b    /* OCW3 irq service next CMD read */
-
-#define ICW1_ICW4   0x01        /* ICW4 (not) needed */
-#define ICW1_SINGLE 0x02        /* Single (cascade) mode */
-#define ICW1_INTERVAL4  0x04    /* Call address interval 4 (8) */
-#define ICW1_LEVEL  0x08        /* Level triggered (edge) mode */
-#define ICW1_INIT   0x10        /* Initialization */
-
-#define ICW4_8086   0x01        /* 8086/88 (MCS-80/85) mode */
-#define ICW4_AUTO   0x02        /* Auto (normal) EOI */
-#define ICW4_BUF_SLAVE  0x08    /* Buffered mode/slave */
-#define ICW4_BUF_MASTER 0x0C    /* Buffered mode/master */
-#define ICW4_SFNM   0x10        /* Special fully nested (not) */
-
-struct int_handler_struct {
-    int_handler handler;
-    void *arg;
-};
-
-#define INT_PIC2 2
-
-static struct int_handler_struct int_handler_table[INT_VECTORS];
-
-/*
- * Cached IRQ mask (enabled/disabled)
- */
-static uint8_t irqMask[2];
-
-/*
- * init the PICs and remap them
- */
-static void map(uint32_t pic1, uint32_t pic2)
-{
-    /* send ICW1 */
-    isa_write_8(PIC1, ICW1);
-    isa_write_8(PIC2, ICW1);
-
-    /* send ICW2 */
-    isa_write_8(PIC1 + 1, pic1);   /* remap */
-    isa_write_8(PIC2 + 1, pic2);   /*  pics */
-
-    /* send ICW3 */
-    isa_write_8(PIC1 + 1, 4);  /* IRQ2 -> connection to slave */
-    isa_write_8(PIC2 + 1, 2);
-
-    /* send ICW4 */
-    isa_write_8(PIC1 + 1, 2|5);
-    isa_write_8(PIC2 + 1, 2|1);
-
-    /* disable all IRQs */
-    isa_write_8(PIC1 + 1, 0xff);
-    isa_write_8(PIC2 + 1, 0xff);
-
-    irqMask[0] = 0xff;
-    irqMask[1] = 0xff;
-}
-
-static void enable(unsigned int vector, bool enable)
-{
-    if (vector < 8) {
-        uint8_t bit = 1 << vector;
-
-        if (enable && (irqMask[0] & bit)) {
-            irqMask[0] = isa_read_8(PIC1 + 1);
-            irqMask[0] &= ~bit;
-            isa_write_8(PIC1 + 1, irqMask[0]);
-            irqMask[0] = isa_read_8(PIC1 + 1);
-        } else if (!enable && !(irqMask[0] & bit)) {
-            irqMask[0] = isa_read_8(PIC1 + 1);
-            irqMask[0] |= bit;
-            isa_write_8(PIC1 + 1, irqMask[0]);
-            irqMask[0] = isa_read_8(PIC1 + 1);
-        }
-    } else if (vector < 16) {
-        vector -= 8;
-
-        uint8_t bit = 1 << vector;
-
-        if (enable && (irqMask[1] & bit)) {
-            irqMask[1] = isa_read_8(PIC2 + 1);
-            irqMask[1] &= ~bit;
-            isa_write_8(PIC2 + 1, irqMask[1]);
-            irqMask[1] = isa_read_8(PIC2 + 1);
-        } else if (!enable && !(irqMask[1] & bit)) {
-            irqMask[1] = isa_read_8(PIC2 + 1);
-            irqMask[1] |= bit;
-            isa_write_8(PIC2 + 1, irqMask[1]);
-            irqMask[1] = isa_read_8(PIC2 + 1);
-        }
-
-        bit = 1 << INT_PIC2;
-
-        if (irqMask[1] != 0xff && (irqMask[0] & bit)) {
-            irqMask[0] = isa_read_8(PIC1 + 1);
-            irqMask[0] &= ~bit;
-            isa_write_8(PIC1 + 1, irqMask[0]);
-            irqMask[0] = isa_read_8(PIC1 + 1);
-        } else if (irqMask[1] == 0 && !(irqMask[0] & bit)) {
-            irqMask[0] = isa_read_8(PIC1 + 1);
-            irqMask[0] |= bit;
-            isa_write_8(PIC1 + 1, irqMask[0]);
-            irqMask[0] = isa_read_8(PIC1 + 1);
-        }
-    }
-}
-
-static void issueEOI(unsigned int vector)
-{
-    if (vector < 8) {
-        isa_write_8(PIC1, 0x20);
-    } else if (vector < 16) {
-        isa_write_8(PIC2, 0x20);
-        isa_write_8(PIC1, 0x20);   // must issue both for the second PIC
-    }
-}
-
-/* Helper func */
-static uint16_t __pic_get_irq_reg(uint ocw3)
-{
-    /* OCW3 to PIC CMD to get the register values.  PIC2 is chained, and
-     * represents IRQs 8-15.  PIC1 is IRQs 0-7, with 2 being the chain */
-    isa_write_8(PIC1_CMD, ocw3);
-    isa_write_8(PIC2_CMD, ocw3);
-    return (isa_read_8(PIC2_CMD) << 8) | isa_read_8(PIC1_CMD);
-}
-
-/* Returns the combined value of the cascaded PICs irq request register */
-static uint16_t pic_get_irr(void)
-{
-    return __pic_get_irq_reg(PIC_READ_IRR);
-}
-
-/* Returns the combined value of the cascaded PICs in-service register */
-static uint16_t pic_get_isr(void)
-{
-    return __pic_get_irq_reg(PIC_READ_ISR);
-}
-
-void platform_init_interrupts(void)
-{
-    // rebase the PIC out of the way of processor exceptions
-    map(0, 8);
-}
-
-status_t mask_interrupt(unsigned int vector)
-{
-    if (vector >= INT_VECTORS)
-        return ERR_INVALID_ARGS;
-
-    LTRACEF("vector %d\n", vector);
-
-    spin_lock_saved_state_t state;
-    spin_lock_irqsave(&lock, state);
-
-    enable(vector, false);
-
-    spin_unlock_irqrestore(&lock, state);
-
-    return NO_ERROR;
-}
-
-void platform_mask_irqs(void)
-{
-    irqMask[0] = isa_read_8(PIC1 + 1);
-    irqMask[1] = isa_read_8(PIC2 + 1);
-
-    isa_write_8(PIC1 + 1, 0xff);
-    isa_write_8(PIC2 + 1, 0xff);
-
-    irqMask[0] = isa_read_8(PIC1 + 1);
-    irqMask[1] = isa_read_8(PIC2 + 1);
-}
-
-status_t unmask_interrupt(unsigned int vector)
-{
-    if (vector >= INT_VECTORS)
-        return ERR_INVALID_ARGS;
-
-    LTRACEF("vector %d\n", vector);
-
-    spin_lock_saved_state_t state;
-    spin_lock_irqsave(&lock, state);
-
-    enable(vector, true);
-
-    spin_unlock_irqrestore(&lock, state);
-
-    return NO_ERROR;
-}
-
-enum handler_return platform_irq(struct mips_iframe *iframe, uint vector)
-{
-    // figure out which irq is pending
-    // issue OCW3 poll commands to PIC1 and (potentially) PIC2
-    isa_write_8(PIC1_CMD, (1<<3) | (1<<2));
-    uint8_t val = isa_read_8(PIC1_CMD);
-    if ((val & 0x80) == 0) {
-        // spurious?
-        return INT_NO_RESCHEDULE;
-    }
-    val &= ~0x80;
-    if (val == INT_PIC2) {
-        isa_write_8(PIC2_CMD, (1<<3) | (1<<2));
-        val = isa_read_8(PIC2_CMD);
-        if ((val & 0x80) == 0) {
-            // spurious?
-            return INT_NO_RESCHEDULE;
-        }
-        val &= ~0x80;
-    }
-    vector = val;
-    LTRACEF("poll vector 0x%x\n", vector);
-
-    THREAD_STATS_INC(interrupts);
-
-    // deliver the interrupt
-    enum handler_return ret = INT_NO_RESCHEDULE;
-
-    if (int_handler_table[vector].handler)
-        ret = int_handler_table[vector].handler(int_handler_table[vector].arg);
-
-    return ret;
-}
-
-void register_int_handler(unsigned int vector, int_handler handler, void *arg)
-{
-    if (vector >= INT_VECTORS)
-        panic("register_int_handler: vector out of range %d\n", vector);
-
-    spin_lock_saved_state_t state;
-    spin_lock_irqsave(&lock, state);
-
-    int_handler_table[vector].arg = arg;
-    int_handler_table[vector].handler = handler;
-
-    spin_unlock_irqrestore(&lock, state);
-}
-
diff --git a/platform/qemu-mips/platform.c b/platform/qemu-mips/platform.c
deleted file mode 100644
index 6296325c..00000000
--- a/platform/qemu-mips/platform.c
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <sys/types.h>
-#include <kernel/thread.h>
-#include <platform.h>
-#include <platform/interrupts.h>
-#include <platform/debug.h>
-#include <platform/timer.h>
-#include <platform/qemu-mips.h>
-#include <arch/mips.h>
-
-extern void platform_init_interrupts(void);
-extern void platform_init_uart(void);
-extern void uart_init(void);
-
-void platform_early_init(void)
-{
-    platform_init_interrupts();
-    platform_init_uart();
-
-    mips_init_timer(100000000);
-    mips_enable_irq(2);
-}
-
-void platform_init(void)
-{
-    uart_init();
-}
-
diff --git a/platform/qemu-mips/rules.mk b/platform/qemu-mips/rules.mk
deleted file mode 100644
index aa689d56..00000000
--- a/platform/qemu-mips/rules.mk
+++ /dev/null
@@ -1,21 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-ARCH := mips
-MIPS_CPU := m14k
-
-MODULE_DEPS += \
-    lib/cbuf
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/intc.c \
-	$(LOCAL_DIR)/platform.c
-
-MEMBASE ?= 0x80000000 # not exactly correct but gets us going for now
-MEMSIZE ?= 0x01000000 # 16MB
-
-MODULE_DEPS += \
-
-include make/module.mk
diff --git a/platform/qemu-virt/debug.c b/platform/qemu-virt/debug.c
deleted file mode 100644
index 8869a13e..00000000
--- a/platform/qemu-virt/debug.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright (c) 2008-2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <stdio.h>
-#include <kernel/thread.h>
-#include <dev/uart.h>
-#include <platform/debug.h>
-#include <platform/qemu-virt.h>
-#include <target/debugconfig.h>
-#include <reg.h>
-
-/* DEBUG_UART must be defined to 0 or 1 */
-#if defined(DEBUG_UART) && DEBUG_UART == 0
-#define DEBUG_UART_BASE UART0_BASE
-#elif defined(DEBUG_UART) && DEBUG_UART == 1
-#define DEBUG_UART_BASE UART1_BASE
-#else
-#error define DEBUG_UART to something valid
-#endif
-
-void platform_dputc(char c)
-{
-    if (c == '\n')
-        uart_putc(DEBUG_UART, '\r');
-    uart_putc(DEBUG_UART, c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    int ret = uart_getc(DEBUG_UART, wait);
-    if (ret == -1)
-        return -1;
-    *c = ret;
-    return 0;
-}
-
-void platform_pputc(char c)
-{
-    if (c == '\n')
-        uart_pputc(DEBUG_UART, '\r');
-    uart_pputc(DEBUG_UART, c);
-}
-
-int platform_pgetc(char *c, bool wait)
-{
-    int ret = uart_pgetc(DEBUG_UART);
-    if (ret < 0)
-        return ret;
-    *c = ret;
-    return 0;
-}
-
diff --git a/platform/qemu-virt/include/platform/gic.h b/platform/qemu-virt/include/platform/gic.h
deleted file mode 100644
index 167aa059..00000000
--- a/platform/qemu-virt/include/platform/gic.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Copyright (c) 2014-2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <platform/qemu-virt.h>
-
-#define GICBASE(n)  (CPUPRIV_BASE_VIRT)
-#define GICD_OFFSET (0x00000)
-#define GICC_OFFSET (0x10000)
-
diff --git a/platform/qemu-virt/include/platform/qemu-virt.h b/platform/qemu-virt/include/platform/qemu-virt.h
deleted file mode 100644
index 4c3f14cc..00000000
--- a/platform/qemu-virt/include/platform/qemu-virt.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-/* up to 30 GB of ram */
-#define MEMORY_BASE_PHYS     (0x40000000)
-#if ARCH_ARM64
-#define MEMORY_APERTURE_SIZE (30ULL * 1024 * 1024 * 1024)
-#else
-#define MEMORY_APERTURE_SIZE (1UL * 1024 * 1024 * 1024)
-#endif
-
-/* memory map of peripherals, from qemu hw/arm/virt.c */
-#if 0
-static const MemMapEntry a15memmap[] = {
-    /* Space up to 0x8000000 is reserved for a boot ROM */
-    [VIRT_FLASH] =              {          0, 0x08000000 },
-    [VIRT_CPUPERIPHS] =         { 0x08000000, 0x00020000 },
-    /* GIC distributor and CPU interfaces sit inside the CPU peripheral space */
-    [VIRT_GIC_DIST] =           { 0x08000000, 0x00010000 },
-    [VIRT_GIC_CPU] =            { 0x08010000, 0x00010000 },
-    [VIRT_GIC_V2M] =            { 0x08020000, 0x00001000 },
-    [VIRT_UART] =               { 0x09000000, 0x00001000 },
-    [VIRT_RTC] =                { 0x09010000, 0x00001000 },
-    [VIRT_FW_CFG] =             { 0x09020000, 0x0000000a },
-    [VIRT_MMIO] =               { 0x0a000000, 0x00000200 },
-    /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
-    [VIRT_PLATFORM_BUS] =       { 0x0c000000, 0x02000000 },
-    [VIRT_PCIE_MMIO] =          { 0x10000000, 0x2eff0000 },
-    [VIRT_PCIE_PIO] =           { 0x3eff0000, 0x00010000 },
-    [VIRT_PCIE_ECAM] =          { 0x3f000000, 0x01000000 },
-    [VIRT_MEM] =                { 0x40000000, 30ULL * 1024 * 1024 * 1024 },
-};
-
-static const int a15irqmap[] = {
-    [VIRT_UART] = 1,
-    [VIRT_RTC] = 2,
-    [VIRT_PCIE] = 3, /* ... to 6 */
-    [VIRT_MMIO] = 16, /* ...to 16 + NUM_VIRTIO_TRANSPORTS - 1 */
-    [VIRT_GIC_V2M] = 48, /* ...to 48 + NUM_GICV2M_SPIS - 1 */
-    [VIRT_PLATFORM_BUS] = 112, /* ...to 112 + PLATFORM_BUS_NUM_IRQS -1 */
-};
-#endif
-
-/* map all of 0-1GB into kernel space in one shot */
-#define PERIPHERAL_BASE_PHYS (0)
-#define PERIPHERAL_BASE_SIZE (0x40000000UL) // 1GB
-
-#if ARCH_ARM64
-#define PERIPHERAL_BASE_VIRT (0xffffffffc0000000ULL) // -1GB
-#else
-#define PERIPHERAL_BASE_VIRT (0xc0000000UL) // -1GB
-#endif
-
-/* individual peripherals in this mapping */
-#define CPUPRIV_BASE_VIRT   (PERIPHERAL_BASE_VIRT + 0x08000000)
-#define CPUPRIV_BASE_PHYS   (PERIPHERAL_BASE_PHYS + 0x08000000)
-#define CPUPRIV_SIZE        (0x00020000)
-#define UART_BASE           (PERIPHERAL_BASE_VIRT + 0x09000000)
-#define UART_SIZE           (0x00001000)
-#define RTC_BASE            (PERIPHERAL_BASE_VIRT + 0x09010000)
-#define RTC_SIZE            (0x00001000)
-#define FW_CFG_BASE         (PERIPHERAL_BASE_VIRT + 0x09020000)
-#define FW_CFG_SIZE         (0x00001000)
-#define NUM_VIRTIO_TRANSPORTS 32
-#define VIRTIO_BASE         (PERIPHERAL_BASE_VIRT + 0x0a000000)
-#define VIRTIO_SIZE         (NUM_VIRTIO_TRANSPORTS * 0x200)
-
-/* interrupts */
-#define ARM_GENERIC_TIMER_VIRTUAL_INT 27
-#define ARM_GENERIC_TIMER_PHYSICAL_INT 30
-#define UART0_INT   (32 + 1)
-#define VIRTIO0_INT (32 + 16)
-
-#define MAX_INT 128
-
diff --git a/platform/qemu-virt/platform.c b/platform/qemu-virt/platform.c
deleted file mode 100644
index 1820b820..00000000
--- a/platform/qemu-virt/platform.c
+++ /dev/null
@@ -1,181 +0,0 @@
-/*
- * Copyright (c) 2012-2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <arch.h>
-#include <err.h>
-#include <debug.h>
-#include <trace.h>
-#include <dev/interrupt/arm_gic.h>
-#include <dev/timer/arm_generic.h>
-#include <dev/uart.h>
-#include <dev/virtio.h>
-#include <dev/virtio/net.h>
-#include <lk/init.h>
-#include <kernel/vm.h>
-#include <kernel/spinlock.h>
-#include <platform.h>
-#include <platform/gic.h>
-#include <platform/interrupts.h>
-#include <platform/qemu-virt.h>
-#include <libfdt.h>
-#include "platform_p.h"
-
-#if WITH_LIB_MINIP
-#include <lib/minip.h>
-#endif
-
-#define DEFAULT_MEMORY_SIZE (MEMSIZE) /* try to fetch from the emulator via the fdt */
-
-/* initial memory mappings. parsed by start.S */
-struct mmu_initial_mapping mmu_initial_mappings[] = {
-    /* all of memory */
-    {
-        .phys = MEMORY_BASE_PHYS,
-        .virt = KERNEL_BASE,
-        .size = MEMORY_APERTURE_SIZE,
-        .flags = 0,
-        .name = "memory"
-    },
-
-    /* 1GB of peripherals */
-    {
-        .phys = PERIPHERAL_BASE_PHYS,
-        .virt = PERIPHERAL_BASE_VIRT,
-        .size = PERIPHERAL_BASE_SIZE,
-        .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
-        .name = "peripherals"
-    },
-
-    /* null entry to terminate the list */
-    { 0 }
-};
-
-static pmm_arena_t arena = {
-    .name = "ram",
-    .base = MEMORY_BASE_PHYS,
-    .size = DEFAULT_MEMORY_SIZE,
-    .flags = PMM_ARENA_FLAG_KMAP,
-};
-
-extern void psci_call(ulong arg0, ulong arg1, ulong arg2, ulong arg3);
-
-void platform_early_init(void)
-{
-    /* initialize the interrupt controller */
-    arm_gic_init();
-
-    arm_generic_timer_init(ARM_GENERIC_TIMER_PHYSICAL_INT, 0);
-
-    uart_init_early();
-
-    /* look for a flattened device tree just before the kernel */
-    const void *fdt = (void *)KERNEL_BASE;
-    int err = fdt_check_header(fdt);
-    if (err >= 0) {
-        /* walk the nodes, looking for 'memory' */
-        int depth = 0;
-        int offset = 0;
-        for (;;) {
-            offset = fdt_next_node(fdt, offset, &depth);
-            if (offset < 0)
-                break;
-
-            /* get the name */
-            const char *name = fdt_get_name(fdt, offset, NULL);
-            if (!name)
-                continue;
-
-            /* look for the 'memory' property */
-            if (strcmp(name, "memory") == 0) {
-                int lenp;
-                const void *prop_ptr = fdt_getprop(fdt, offset, "reg", &lenp);
-                if (prop_ptr && lenp == 0x10) {
-                    /* we're looking at a memory descriptor */
-                    //uint64_t base = fdt64_to_cpu(*(uint64_t *)prop_ptr);
-                    uint64_t len = fdt64_to_cpu(*((const uint64_t *)prop_ptr + 1));
-
-                    /* trim size on certain platforms */
-#if ARCH_ARM
-                    if (len > 1024*1024*1024U) {
-                        len = 1024*1024*1024; /* only use the first 1GB on ARM32 */
-                        printf("trimming memory to 1GB\n");
-                    }
-#endif
-
-                    /* set the size in the pmm arena */
-                    arena.size = len;
-                }
-            }
-        }
-    }
-
-    /* add the main memory arena */
-    pmm_add_arena(&arena);
-
-    /* reserve the first 64k of ram, which should be holding the fdt */
-    struct list_node list = LIST_INITIAL_VALUE(list);
-    pmm_alloc_range(MEMBASE, 0x10000 / PAGE_SIZE, &list);
-
-    /* boot the secondary cpus using the Power State Coordintion Interface */
-    ulong psci_call_num = 0x84000000 + 3; /* SMC32 CPU_ON */
-#if ARCH_ARM64
-    psci_call_num += 0x40000000; /* SMC64 */
-#endif
-    for (uint i = 1; i < SMP_MAX_CPUS; i++) {
-        psci_call(psci_call_num, i, MEMBASE + KERNEL_LOAD_OFFSET, 0);
-    }
-}
-
-void platform_init(void)
-{
-    uart_init();
-
-    /* detect any virtio devices */
-    uint virtio_irqs[NUM_VIRTIO_TRANSPORTS];
-    for (int i = 0; i < NUM_VIRTIO_TRANSPORTS; i++) {
-        virtio_irqs[i] = VIRTIO0_INT + i;
-    }
-
-    virtio_mmio_detect((void *)VIRTIO_BASE, NUM_VIRTIO_TRANSPORTS, virtio_irqs);
-
-#if WITH_LIB_MINIP
-    if (virtio_net_found() > 0) {
-        uint8_t mac_addr[6];
-
-        virtio_net_get_mac_addr(mac_addr);
-
-        TRACEF("found virtio networking interface\n");
-
-        /* start minip */
-        minip_set_macaddr(mac_addr);
-
-        __UNUSED uint32_t ip_addr = IPV4(192, 168, 0, 99);
-        __UNUSED uint32_t ip_mask = IPV4(255, 255, 255, 0);
-        __UNUSED uint32_t ip_gateway = IPV4_NONE;
-
-        //minip_init(virtio_net_send_minip_pkt, NULL, ip_addr, ip_mask, ip_gateway);
-        minip_init_dhcp(virtio_net_send_minip_pkt, NULL);
-
-        virtio_net_start();
-    }
-#endif
-}
diff --git a/platform/qemu-virt/platform_p.h b/platform/qemu-virt/platform_p.h
deleted file mode 100644
index e83320e1..00000000
--- a/platform/qemu-virt/platform_p.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_P_H
-#define __PLATFORM_P_H
-
-void platform_init_timer(void);
-
-#endif
-
diff --git a/platform/qemu-virt/rules.mk b/platform/qemu-virt/rules.mk
deleted file mode 100644
index fd588d15..00000000
--- a/platform/qemu-virt/rules.mk
+++ /dev/null
@@ -1,48 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-ifeq ($(ARCH),)
-ARCH := arm64
-endif
-ifeq ($(ARCH),arm64)
-ARM_CPU ?= cortex-a53
-endif
-ifeq ($(ARCH),arm)
-ARM_CPU ?= cortex-a15
-endif
-WITH_SMP ?= 1
-
-LK_HEAP_IMPLEMENTATION ?= dlmalloc
-
-MODULE_SRCS += \
-    $(LOCAL_DIR)/debug.c \
-    $(LOCAL_DIR)/platform.c \
-    $(LOCAL_DIR)/secondary_boot.S \
-    $(LOCAL_DIR)/uart.c
-
-MEMBASE := 0x40000000
-MEMSIZE ?= 0x08000000   # 512MB
-KERNEL_LOAD_OFFSET := 0x10000 # 64k
-
-MODULE_DEPS += \
-    lib/cbuf \
-    lib/fdt \
-    dev/interrupt/arm_gic \
-    dev/timer/arm_generic \
-    dev/virtio/block \
-    dev/virtio/gpu \
-    dev/virtio/net \
-
-GLOBAL_DEFINES += \
-    MEMBASE=$(MEMBASE) \
-    MEMSIZE=$(MEMSIZE) \
-    PLATFORM_SUPPORTS_PANIC_SHELL=1 \
-    CONSOLE_HAS_INPUT_BUFFER=1
-
-GLOBAL_DEFINES += MMU_WITH_TRAMPOLINE=1 \
-
-LINKER_SCRIPT += \
-    $(BUILDDIR)/system-onesegment.ld
-
-include make/module.mk
diff --git a/platform/qemu-virt/secondary_boot.S b/platform/qemu-virt/secondary_boot.S
deleted file mode 100644
index 51f16fdb..00000000
--- a/platform/qemu-virt/secondary_boot.S
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <asm.h>
-
-.section .text
-
-/* used to call into PSCI firmware (Power State Coordination Firmware) */
-FUNCTION(psci_call)
-    hvc     #0
-#if ARCH_ARM
-    bx      lr
-#else
-    ret
-#endif
-
-.ltorg
-
diff --git a/platform/qemu-virt/uart.c b/platform/qemu-virt/uart.c
deleted file mode 100644
index 4eebe102..00000000
--- a/platform/qemu-virt/uart.c
+++ /dev/null
@@ -1,199 +0,0 @@
-/*
- * Copyright (c) 2014-2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <stdio.h>
-#include <trace.h>
-#include <lib/cbuf.h>
-#include <kernel/thread.h>
-#include <platform/interrupts.h>
-#include <platform/debug.h>
-#include <platform/qemu-virt.h>
-#include <target/debugconfig.h>
-
-/* PL011 implementation */
-#define UART_DR    (0x00)
-#define UART_RSR   (0x04)
-#define UART_TFR   (0x18)
-#define UART_ILPR  (0x20)
-#define UART_IBRD  (0x24)
-#define UART_FBRD  (0x28)
-#define UART_LCRH  (0x2c)
-#define UART_CR    (0x30)
-#define UART_IFLS  (0x34)
-#define UART_IMSC  (0x38)
-#define UART_TRIS  (0x3c)
-#define UART_TMIS  (0x40)
-#define UART_ICR   (0x44)
-#define UART_DMACR (0x48)
-
-#define UARTREG(base, reg)  (*REG32((base)  + (reg)))
-
-#define RXBUF_SIZE 16
-#define NUM_UART 1
-
-static cbuf_t uart_rx_buf[NUM_UART];
-
-static inline uintptr_t uart_to_ptr(unsigned int n)
-{
-    switch (n) {
-        default:
-        case 0:
-            return UART_BASE;
-    }
-}
-
-static enum handler_return uart_irq(void *arg)
-{
-    bool resched = false;
-    uint port = (uintptr_t)arg;
-    uintptr_t base = uart_to_ptr(port);
-
-    /* read interrupt status and mask */
-    uint32_t isr = UARTREG(base, UART_TMIS);
-
-    if (isr & (1<<4)) { // rxmis
-        cbuf_t *rxbuf = &uart_rx_buf[port];
-
-        /* while fifo is not empty, read chars out of it */
-        while ((UARTREG(base, UART_TFR) & (1<<4)) == 0) {
-#if CONSOLE_HAS_INPUT_BUFFER
-            if (port == DEBUG_UART) {
-                char c = UARTREG(base, UART_DR);
-                cbuf_write_char(&console_input_cbuf, c, false);
-            } else
-#endif
-            {
-                /* if we're out of rx buffer, mask the irq instead of handling it */
-                if (cbuf_space_avail(rxbuf) == 0) {
-                    UARTREG(base, UART_IMSC) &= ~(1<<4); // !rxim
-                    break;
-                }
-
-                char c = UARTREG(base, UART_DR);
-                cbuf_write_char(rxbuf, c, false);
-            }
-
-            resched = true;
-        }
-    }
-
-    return resched ? INT_RESCHEDULE : INT_NO_RESCHEDULE;
-}
-
-void uart_init(void)
-{
-    for (size_t i = 0; i < NUM_UART; i++) {
-        uintptr_t base = uart_to_ptr(i);
-
-        // create circular buffer to hold received data
-        cbuf_initialize(&uart_rx_buf[i], RXBUF_SIZE);
-
-        // assumes interrupts are contiguous
-        register_int_handler(UART0_INT + i, &uart_irq, (void *)i);
-
-        // clear all irqs
-        UARTREG(base, UART_ICR) = 0x3ff;
-
-        // set fifo trigger level
-        UARTREG(base, UART_IFLS) = 0; // 1/8 rxfifo, 1/8 txfifo
-
-        // enable rx interrupt
-        UARTREG(base, UART_IMSC) = (1<<4); // rxim
-
-        // enable receive
-        UARTREG(base, UART_CR) |= (1<<9); // rxen
-
-        // enable interrupt
-        unmask_interrupt(UART0_INT + i);
-    }
-}
-
-void uart_init_early(void)
-{
-    for (size_t i = 0; i < NUM_UART; i++) {
-        UARTREG(uart_to_ptr(i), UART_CR) = (1<<8)|(1<<0); // tx_enable, uarten
-    }
-}
-
-int uart_putc(int port, char c)
-{
-    uintptr_t base = uart_to_ptr(port);
-
-    /* spin while fifo is full */
-    while (UARTREG(base, UART_TFR) & (1<<5))
-        ;
-    UARTREG(base, UART_DR) = c;
-
-    return 1;
-}
-
-int uart_getc(int port, bool wait)
-{
-    cbuf_t *rxbuf = &uart_rx_buf[port];
-
-    char c;
-    if (cbuf_read_char(rxbuf, &c, wait) == 1) {
-        UARTREG(uart_to_ptr(port), UART_IMSC) = (1<<4); // rxim
-        return c;
-    }
-
-    return -1;
-}
-
-/* panic-time getc/putc */
-int uart_pputc(int port, char c)
-{
-    uintptr_t base = uart_to_ptr(port);
-
-    /* spin while fifo is full */
-    while (UARTREG(base, UART_TFR) & (1<<5))
-        ;
-    UARTREG(base, UART_DR) = c;
-
-    return 1;
-}
-
-int uart_pgetc(int port, bool wait)
-{
-    uintptr_t base = uart_to_ptr(port);
-
-    if ((UARTREG(base, UART_TFR) & (1<<4)) == 0) {
-        return UARTREG(base, UART_DR);
-    } else {
-        return -1;
-    }
-}
-
-
-void uart_flush_tx(int port)
-{
-}
-
-void uart_flush_rx(int port)
-{
-}
-
-void uart_init_port(int port, uint baud)
-{
-}
-
diff --git a/platform/stellaris/debug.c b/platform/stellaris/debug.c
deleted file mode 100644
index 6254e6b3..00000000
--- a/platform/stellaris/debug.c
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- * Copyright (c) 2012 Ian McKellar
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <debug.h>
-#include <stdio.h>
-#include <lib/cbuf.h>
-#include <kernel/thread.h>
-#include <platform/debug.h>
-#include <arch/ops.h>
-#include <target/debugconfig.h>
-#include <arch/arm/cm.h>
-
-#include "ti_driverlib.h"
-
-#include "inc/hw_memmap.h"
-#include "inc/hw_types.h"
-
-#define DEBUG_UART UART0_BASE
-
-static cbuf_t debug_rx_buf;
-
-void stellaris_uart0_irq(void)
-{
-    arm_cm_irq_entry();
-
-    //
-    // Get the interrrupt status.
-    //
-    unsigned long ulStatus = UARTIntStatus(DEBUG_UART, true);
-
-    //
-    // Clear the asserted interrupts.
-    //
-    UARTIntClear(DEBUG_UART, ulStatus);
-
-    //
-    // Loop while there are characters in the receive FIFO.
-    //
-    bool resched = false;
-    while (UARTCharsAvail(DEBUG_UART)) {
-        //
-        // Read the next character from the UART and write it back to the UART.
-        //
-        unsigned char c = UARTCharGetNonBlocking(DEBUG_UART);
-        cbuf_write_char(&debug_rx_buf, c, false);
-
-        resched = true;
-    }
-
-    arm_cm_irq_exit(resched);
-}
-
-void stellaris_debug_early_init(void)
-{
-    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
-
-    /* we only support UART0 right now */
-    STATIC_ASSERT(DEBUG_UART == UART0_BASE);
-
-    if (DEBUG_UART == UART0_BASE) {
-#if defined(PART_LM4F120H5QR)
-        /* Set GPIO A0 and A1 as UART pins. */
-        GPIOPinConfigure(GPIO_PA0_U0RX);
-        GPIOPinConfigure(GPIO_PA1_U0TX);
-        GPIOPinTypeUART(GPIO_PORTA_AHB_BASE, GPIO_PIN_0 | GPIO_PIN_1);
-#endif
-    }
-
-    UARTConfigSetExpClk(DEBUG_UART, SysCtlClockGet(), 115200, UART_CONFIG_WLEN_8|UART_CONFIG_STOP_ONE|UART_CONFIG_PAR_NONE);
-
-    UARTEnable(DEBUG_UART);
-}
-
-void stellaris_debug_init(void)
-{
-    cbuf_initialize(&debug_rx_buf, 16);
-
-    /* Enable the UART interrupt. */
-    UARTIntEnable(DEBUG_UART, UART_INT_RX | UART_INT_RT);
-
-    NVIC_EnableIRQ(INT_UART0 - 16);
-
-}
-
-void platform_dputc(char c)
-{
-    if (c == '\n') {
-        platform_dputc('\r');
-    }
-
-    UARTCharPut(DEBUG_UART, c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    return cbuf_read_char(&debug_rx_buf, c, wait);
-}
-
diff --git a/platform/stellaris/gpio.c b/platform/stellaris/gpio.c
deleted file mode 100644
index 35fda3fb..00000000
--- a/platform/stellaris/gpio.c
+++ /dev/null
@@ -1,147 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <assert.h>
-#include <dev/gpio.h>
-#include <platform/gpio.h>
-#include "ti_driverlib.h"
-
-static void *port_to_pointer(unsigned int port)
-{
-    switch (port) {
-        default:
-        case GPIO_PORT_A:
-            return (void *)GPIO_PORTA_AHB_BASE;
-        case GPIO_PORT_B:
-            return (void *)GPIO_PORTB_AHB_BASE;
-        case GPIO_PORT_C:
-            return (void *)GPIO_PORTC_AHB_BASE;
-        case GPIO_PORT_D:
-            return (void *)GPIO_PORTD_AHB_BASE;
-        case GPIO_PORT_E:
-            return (void *)GPIO_PORTE_AHB_BASE;
-        case GPIO_PORT_F:
-            return (void *)GPIO_PORTF_AHB_BASE;
-        case GPIO_PORT_G:
-            return (void *)GPIO_PORTG_AHB_BASE;
-        case GPIO_PORT_H:
-            return (void *)GPIO_PORTH_AHB_BASE;
-        case GPIO_PORT_J:
-            return (void *)GPIO_PORTJ_BASE;
-        case GPIO_PORT_K:
-            return (void *)GPIO_PORTK_BASE;
-        case GPIO_PORT_L:
-            return (void *)GPIO_PORTL_BASE;
-        case GPIO_PORT_M:
-            return (void *)GPIO_PORTM_BASE;
-        case GPIO_PORT_N:
-            return (void *)GPIO_PORTN_BASE;
-        case GPIO_PORT_P:
-            return (void *)GPIO_PORTP_BASE;
-        case GPIO_PORT_Q:
-            return (void *)GPIO_PORTQ_BASE;
-    }
-}
-
-void stellaris_gpio_early_init(void)
-{
-    /* Disable hitting the AHB bits on this target, which
-     * is probably qemu emulated. QEMU does not implement
-     * these registers and will crash.
-     */
-#if !TARGET_LM3S6965EVB
-    SysCtlGPIOAHBEnable(SYSCTL_PERIPH_GPIOA);
-    SysCtlGPIOAHBEnable(SYSCTL_PERIPH_GPIOB);
-    SysCtlGPIOAHBEnable(SYSCTL_PERIPH_GPIOC);
-    SysCtlGPIOAHBEnable(SYSCTL_PERIPH_GPIOD);
-    SysCtlGPIOAHBEnable(SYSCTL_PERIPH_GPIOE);
-    SysCtlGPIOAHBEnable(SYSCTL_PERIPH_GPIOF);
-    SysCtlGPIOAHBEnable(SYSCTL_PERIPH_GPIOG);
-    SysCtlGPIOAHBEnable(SYSCTL_PERIPH_GPIOH);
-#endif
-
-    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
-    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
-    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
-    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
-    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
-    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
-    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
-    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOH);
-    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOJ);
-}
-
-void stellaris_gpio_init(void)
-{
-}
-
-#if 0
-int gpio_config(unsigned nr, unsigned flags)
-{
-    uint port = GPIO_PORT(nr);
-    uint pin = GPIO_PIN(nr);
-
-    enable_port(port);
-
-    GPIO_InitTypeDef init;
-    init.GPIO_Speed = GPIO_Speed_50MHz;
-
-    init.GPIO_Pin = (1 << pin);
-
-    if (flags & GPIO_STM32_AF) {
-        if (flags & GPIO_STM32_OD)
-            init.GPIO_Mode = GPIO_Mode_Out_OD;
-        else
-            init.GPIO_Mode = GPIO_Mode_AF_PP;
-    } else if (flags & GPIO_OUTPUT) {
-        if (flags & GPIO_STM32_OD)
-            init.GPIO_Mode = GPIO_Mode_Out_OD;
-        else
-            init.GPIO_Mode = GPIO_Mode_Out_PP;
-    } else { // GPIO_INPUT
-        if (flags & GPIO_PULLUP) {
-            init.GPIO_Mode = GPIO_Mode_IPU;
-        } else if (flags & GPIO_PULLDOWN) {
-            init.GPIO_Mode = GPIO_Mode_IPD;
-        } else {
-            init.GPIO_Mode = GPIO_Mode_IN_FLOATING;
-        }
-    }
-
-    GPIO_Init(port_to_pointer(port), &init);
-
-    return 0;
-}
-#endif
-
-void gpio_set(unsigned nr, unsigned on)
-{
-    GPIOPinWrite((unsigned int)port_to_pointer(GPIO_PORT(nr)), 1 << GPIO_PIN(nr), on ? (1 << GPIO_PIN(nr)) : 0);
-}
-
-int gpio_get(unsigned nr)
-{
-    return GPIOPinRead((unsigned int)port_to_pointer(GPIO_PORT(nr)), 1 << GPIO_PIN(nr));
-}
-
-
diff --git a/platform/stellaris/include/platform/gpio.h b/platform/stellaris/include/platform/gpio.h
deleted file mode 100644
index 75fa5156..00000000
--- a/platform/stellaris/include/platform/gpio.h
+++ /dev/null
@@ -1,37 +0,0 @@
-#ifndef __PLATFORM_STELLARIS_GPIO_H
-#define __PLATFORM_STELLARIS_GPIO_H
-
-/* helper defines for Stellaris platforms */
-
-/* flag to gpio_configure */
-#define GPIO_STELLARIS_OD (0x1 << 12)
-#define GPIO_STELLARIS_AF_ENABLE (0x2 << 12)
-
-#define GPIO_STELLARIS_AF(x) (((x) & 0xf) << 8)
-
-/* gpio port/pin is packed into a single unsigned int in 20x:4alternatefunc:4port:4pin format */
-#define GPIO(port, pin) ((unsigned int)(((port) << 4) | (pin)))
-
-#define GPIO_PORT(gpio) (((gpio) >> 4) & 0xf)
-#define GPIO_PIN(gpio) ((gpio) & 0xf)
-
-#define GPIO_PORT_A 0
-#define GPIO_PORT_B 1
-#define GPIO_PORT_C 2
-#define GPIO_PORT_D 3
-#define GPIO_PORT_E 4
-#define GPIO_PORT_F 5
-#define GPIO_PORT_G 6
-#define GPIO_PORT_H 7
-/* discontinuity */
-#define GPIO_PORT_J 8
-#define GPIO_PORT_K 9
-#define GPIO_PORT_L 10
-#define GPIO_PORT_M 11
-#define GPIO_PORT_N 12
-/* discontinuity */
-#define GPIO_PORT_P 13
-#define GPIO_PORT_Q 14
-
-#endif
-
diff --git a/platform/stellaris/include/platform/platform_cm.h b/platform/stellaris/include/platform/platform_cm.h
deleted file mode 100644
index 0a2f78ab..00000000
--- a/platform/stellaris/include/platform/platform_cm.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_CM3_H
-#define __PLATFORM_CM3_H
-
-#include <stellaris.h>
-
-#endif
-
diff --git a/platform/stellaris/include/stellaris.h b/platform/stellaris/include/stellaris.h
deleted file mode 100644
index b6a4c1bc..00000000
--- a/platform/stellaris/include/stellaris.h
+++ /dev/null
@@ -1,24 +0,0 @@
-#ifndef __stellaris_h__
-#define __stellaris_h__
-
-/* an attempt at a CMSIS compatibility layer for Stellaris */
-
-/* from the ti driver library */
-#include <inc/hw_ints.h>
-
-typedef enum IRQn {
-    // base Cortex IRQs
-    NonMaskableInt_IRQn   = FAULT_NMI-16,
-    MemoryManagement_IRQn = FAULT_MPU-16,
-    BusFault_IRQn         = FAULT_BUS-16,
-    UsageFault_IRQn       = FAULT_USAGE-16,
-    SVCall_IRQn           = FAULT_SVCALL-16,
-    DebugMonitor_IRQn     = FAULT_DEBUG-16,
-    PendSV_IRQn           = FAULT_PENDSV-16,
-    SysTick_IRQn          = FAULT_SYSTICK-16
-} IRQn_Type;
-
-// based on datasheet page 159?
-#define __NVIC_PRIO_BITS 3
-
-#endif
diff --git a/platform/stellaris/include/ti_driverlib.h b/platform/stellaris/include/ti_driverlib.h
deleted file mode 100644
index 88e492af..00000000
--- a/platform/stellaris/include/ti_driverlib.h
+++ /dev/null
@@ -1,19 +0,0 @@
-#pragma once
-
-#include <compiler.h>
-
-__BEGIN_CDECLS
-
-#include "inc/hw_types.h"
-#include "inc/hw_sysctl.h"
-#include "inc/hw_memmap.h"
-
-#include "driverlib/gpio.h"
-#include "driverlib/pin_map.h"
-#include "driverlib/sysctl.h"
-#include "driverlib/uart.h"
-#include "driverlib/timer.h"
-#include "driverlib/usb.h"
-#include "driverlib/rom.h"
-
-__END_CDECLS
diff --git a/platform/stellaris/init.c b/platform/stellaris/init.c
deleted file mode 100644
index 0287be9d..00000000
--- a/platform/stellaris/init.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * Copyright (c) 2012 Ian McKellar
- * Copyright (c) 2013 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <err.h>
-#include <stdio.h>
-#include <debug.h>
-#include <platform.h>
-#include <dev/usb.h>
-#include <arch/arm/cm.h>
-
-#include "ti_driverlib.h"
-
-
-void stellaris_debug_early_init(void);
-void stellaris_debug_init(void);
-
-void stellaris_gpio_early_init(void);
-void stellaris_gpio_init(void);
-
-void stellaris_usbc_early_init(void);
-void stellaris_usbc_init(void);
-
-void platform_early_init(void)
-{
-    //
-    // Enable lazy stacking for interrupt handlers.  This allows floating-point
-    // instructions to be used within interrupt handlers, but at the expense of
-    // extra stack usage.
-    //
-//  FPULazyStackingEnable();
-
-    //
-    // Set the clocking to run directly from the crystal.
-    //
-
-    ulong config = SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN;
-#if !defined(CRYSTAL_FREQ) || CRYSTAL_FREQ == 16000000
-    config |= SYSCTL_XTAL_16MHZ;
-#elif CRYSTAL_FREQ == 8000000
-    config |= SYSCTL_XTAL_8MHZ;
-#else
-#error add more cases for additional frequencies
-#endif
-
-    SysCtlClockSet(config);
-
-    // start the generic systick timer
-    arm_cm_systick_init(SysCtlClockGet());
-
-    stellaris_gpio_early_init();
-
-    stellaris_debug_early_init();
-
-    stellaris_usbc_early_init();
-}
-
-void platform_init(void)
-{
-    stellaris_gpio_init();
-    stellaris_debug_init();
-    stellaris_usbc_init();
-
-    // print device information
-    printf("raw revision registers: 0x%lx 0x%lx\n", HWREG(SYSCTL_DID0), HWREG(SYSCTL_DID1));
-
-    printf("stellaris device class: ");
-    if (CLASS_IS_SANDSTORM) printf("sandstorm");
-    if (CLASS_IS_FURY) printf("fury");
-    if (CLASS_IS_DUSTDEVIL) printf("dustdevil");
-    if (CLASS_IS_TEMPEST) printf("tempst");
-    if (CLASS_IS_FIRESTORM) printf("firestorm");
-    if (CLASS_IS_BLIZZARD) printf("blizzard");
-    printf("\n");
-
-    printf("revision register: ");
-    uint rev = (HWREG(SYSCTL_DID0) & SYSCTL_DID0_MAJ_M) >> 8;
-    printf("%c", rev + 'A');
-    printf("%ld", HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MIN_M));
-    printf("\n");
-
-}
diff --git a/platform/stellaris/rules.mk b/platform/stellaris/rules.mk
deleted file mode 100644
index b602342c..00000000
--- a/platform/stellaris/rules.mk
+++ /dev/null
@@ -1,53 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-# ROMBASE, MEMBASE, and MEMSIZE are required for the linker script
-
-ARCH := arm
-
-ifeq ($(STELLARIS_CHIP),LM4F120H5QR)
-MEMSIZE ?= 32768
-MEMBASE := 0x20000000
-ROMBASE := 0x00000000
-ARM_CPU := cortex-m4f
-GLOBAL_DEFINES += \
-    TARGET_IS_BLIZZARD_RA1 \
-    __FPU_PRESENT=1
-endif
-ifeq ($(STELLARIS_CHIP),LM3S6965)
-MEMSIZE ?= 65536
-MEMBASE := 0x20000000
-ROMBASE := 0x00000000
-ARM_CPU := cortex-m3
-GLOBAL_DEFINES += TARGET_IS_FURY_RA2
-endif
-
-GLOBAL_DEFINES += PART_$(STELLARIS_CHIP)
-
-ifeq ($(MEMSIZE),)
-$(error need to define MEMSIZE)
-endif
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/gpio.c \
-	$(LOCAL_DIR)/init.c \
-	$(LOCAL_DIR)/usbc.c \
-	$(LOCAL_DIR)/vectab.c \
-
-# use a two segment memory layout, where all of the read-only sections 
-# of the binary reside in rom, and the read/write are in memory. The 
-# ROMBASE, MEMBASE, and MEMSIZE make variables are required to be set 
-# for the linker script to be generated properly.
-#
-LINKER_SCRIPT += \
-	$(BUILDDIR)/system-twosegment.ld
-
-MODULE_DEPS += \
-	platform/stellaris/ti-driverlib \
-	arch/arm/arm-m/systick \
-	lib/cbuf \
-	dev/usb
-
-include make/module.mk
diff --git a/platform/stellaris/usbc.c b/platform/stellaris/usbc.c
deleted file mode 100644
index 9c0ab70d..00000000
--- a/platform/stellaris/usbc.c
+++ /dev/null
@@ -1,257 +0,0 @@
-/*
- * Copyright (c) 2013 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <trace.h>
-#include <debug.h>
-#include <platform.h>
-#include <reg.h>
-#include <dev/usb.h>
-#include <dev/usbc.h>
-#include <arch/arm/cm.h>
-
-#include "ti_driverlib.h"
-#include "inc/hw_usb.h"
-
-#define LOCAL_TRACE 0
-
-static bool pending_addr_change = false;
-static uint8_t addr;
-
-static void usbc_dump_regs(void)
-{
-    printf("USB0 reg dump:\n");
-#define DUMPREG8(r) printf("\t" #r ": 0x%hhx\n", *REG8(USB0_BASE + (r)));
-#define DUMPREG16(r) printf("\t" #r ": 0x%hx\n", *REG16(USB0_BASE + (r)));
-#define DUMPREG32(r) printf("\t" #r ": 0x%x\n",  *REG32(USB0_BASE + (r)));
-
-    DUMPREG8(USB_O_FADDR);
-    DUMPREG8(USB_O_POWER);
-    DUMPREG16(USB_O_TXIS);
-    DUMPREG16(USB_O_RXIS);
-    DUMPREG16(USB_O_TXIE);
-    DUMPREG16(USB_O_RXIE);
-    DUMPREG8(USB_O_IS);
-    DUMPREG8(USB_O_IE);
-    DUMPREG16(USB_O_FRAME);
-    DUMPREG8(USB_O_EPIDX);
-    DUMPREG8(USB_O_TEST);
-    DUMPREG32(USB_O_FIFO0);
-    DUMPREG32(USB_O_FIFO1);
-    DUMPREG32(USB_O_FIFO2);
-    DUMPREG32(USB_O_FIFO3);
-    DUMPREG32(USB_O_FIFO4);
-    DUMPREG32(USB_O_FIFO5);
-    DUMPREG32(USB_O_FIFO6);
-    DUMPREG32(USB_O_FIFO7);
-    DUMPREG32(USB_O_FIFO8);
-    DUMPREG32(USB_O_FIFO9);
-    DUMPREG32(USB_O_FIFO10);
-    DUMPREG32(USB_O_FIFO11);
-    DUMPREG32(USB_O_FIFO12);
-    DUMPREG32(USB_O_FIFO13);
-    DUMPREG32(USB_O_FIFO14);
-    DUMPREG32(USB_O_FIFO15);
-    DUMPREG16(USB_O_DEVCTL);
-    DUMPREG8(USB_O_TXFIFOSZ);
-    DUMPREG8(USB_O_RXFIFOSZ);
-    DUMPREG16(USB_O_TXFIFOADD);
-    DUMPREG16(USB_O_RXFIFOADD);
-    DUMPREG32(USB_O_PP);
-
-#undef DUMPREG8
-#undef DUMPREG16
-#undef DUMPREG32
-}
-
-void stellaris_usbc_early_init(void)
-{
-    LTRACE_ENTRY;
-    LTRACE_EXIT;
-}
-
-void stellaris_usbc_init(void)
-{
-    LTRACE_ENTRY;
-
-    SysCtlPeripheralEnable(SYSCTL_PERIPH_USB0);
-    SysCtlPeripheralReset(SYSCTL_PERIPH_USB0);
-
-    SysCtlUSBPLLEnable();
-
-    GPIOPinTypeUSBAnalog(GPIO_PORTD_AHB_BASE, GPIO_PIN_4 | GPIO_PIN_5);
-
-    USBDevMode(USB0_BASE);
-    USBPHYPowerOn(USB0_BASE);
-
-#if LOCAL_TRACE
-    usbc_dump_regs();
-
-    printf("addr %lu\n", USBDevAddrGet(USB0_BASE));
-    printf("ep0 status 0x%lx\n", USBEndpointStatus(USB0_BASE, USB_EP_0));
-#endif
-
-    NVIC_EnableIRQ(INT_USB0 - 16);
-    USBIntDisableControl(USB0_BASE, USB_INTCTRL_ALL);
-
-    LTRACE_EXIT;
-}
-
-static void ep0_irq(void)
-{
-    uint status = USBEndpointStatus(USB0_BASE, USB_EP_0);
-
-    LTRACEF("ep0 status 0x%x\n", status);
-
-    /* delay setting the address until the ack as completed */
-    if (pending_addr_change) {
-        LTRACEF("pending addr change\n");
-        USBDevAddrSet(USB0_BASE, addr);
-        pending_addr_change = false;
-    }
-
-    if (status & USB_DEV_EP0_OUT_PKTRDY) {
-        LTRACEF("pktrdy\n");
-
-        uchar buf[sizeof(struct usb_setup)];
-        ulong avail = sizeof(buf);
-
-        if (USBEndpointDataGet(USB0_BASE, USB_EP_0, buf, &avail) < 0 || avail != sizeof(buf)) {
-            LTRACEF("short setup packet, size %lu\n", avail);
-        } else {
-            union usb_callback_args args;
-            args.setup = (void *)buf;
-            usbc_callback(USB_CB_SETUP_MSG, &args);
-        }
-    }
-    if (status & USB_DEV_EP0_SENT_STALL) {
-        LTRACEF("stall complete\n");
-        USBDevEndpointStallClear(USB0_BASE, USB_EP_0, 0);
-    }
-}
-
-void stellaris_usb0_irq(void)
-{
-    arm_cm_irq_entry();
-
-    uint status = USBIntStatusControl(USB0_BASE);
-
-    //LTRACEF("usb irq, status 0x%x\n", status);
-
-    if (status & USB_INTCTRL_RESET) {
-        // reset
-        LTRACEF("reset\n");
-        pending_addr_change = false;
-        usbc_callback(USB_CB_RESET, NULL);
-    }
-    if (status & USB_INTCTRL_CONNECT) {
-        // reset
-        LTRACEF("connect\n");
-    }
-
-    status = USBIntStatusEndpoint(USB0_BASE);
-
-    if (status & USB_INTEP_0) {
-        // ep0
-        //LTRACEF("ep0\n");
-        ep0_irq();
-    }
-
-    arm_cm_irq_exit(true);
-}
-
-void usbc_ep0_ack(void)
-{
-    LTRACE_ENTRY;
-
-    USBDevEndpointDataAck(USB0_BASE, USB_EP_0, true);
-}
-
-void usbc_ep0_stall(void)
-{
-    LTRACE_ENTRY;
-
-    USBDevEndpointStall(USB0_BASE, USB_EP_0, 0);
-}
-
-void usbc_ep0_send(const void *buf, size_t len, size_t maxlen)
-{
-    LTRACEF("buf %p, len %zu, maxlen %zu\n", buf, len, maxlen);
-
-    USBEndpointDataPut(USB0_BASE, USB_EP_0, (void *)buf, MIN(len, maxlen));
-
-    USBEndpointDataSend(USB0_BASE, USB_EP_0, USB_TRANS_SETUP);
-}
-
-void usbc_set_address(uint8_t address)
-{
-    LTRACEF("address 0x%hhx\n", address);
-
-    addr = address;
-    pending_addr_change = true;
-}
-
-void usbc_ep0_recv(void *buf, size_t len, ep_callback cb)
-{
-    PANIC_UNIMPLEMENTED;
-}
-
-bool usbc_is_highspeed(void)
-{
-    return false;
-}
-
-status_t usbc_set_active(bool active)
-{
-    LTRACEF("active %d\n", active);
-    if (active) {
-        USBIntEnableControl(USB0_BASE, USB_INTCTRL_CONNECT | USB_INTCTRL_RESET);
-        USBIntEnableEndpoint(USB0_BASE, USB_INTEP_0);
-        USBDevConnect(USB0_BASE);
-    } else {
-        USBDevDisconnect(USB0_BASE);
-    }
-
-    return NO_ERROR;
-}
-
-status_t usbc_setup_endpoint(ep_t ep, ep_dir_t dir, uint width, ep_type_t type)
-{
-    PANIC_UNIMPLEMENTED;
-}
-
-status_t usbc_queue_rx(ep_t ep, usbc_transfer_t *transfer)
-{
-    PANIC_UNIMPLEMENTED;
-}
-
-status_t usbc_queue_tx(ep_t ep, usbc_transfer_t *transfer)
-{
-    PANIC_UNIMPLEMENTED;
-}
-
-status_t usbc_flush_ep(ep_t ep)
-{
-    PANIC_UNIMPLEMENTED;
-}
-\ No newline at end of file
diff --git a/platform/stellaris/vectab.c b/platform/stellaris/vectab.c
deleted file mode 100644
index 06c8c7cd..00000000
--- a/platform/stellaris/vectab.c
+++ /dev/null
@@ -1,299 +0,0 @@
-/*
- * Copyright (c) 2013 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <debug.h>
-#include <compiler.h>
-#include <arch/arm/cm.h>
-
-/* un-overridden irq handler */
-void stellaris_dummy_irq(void)
-{
-    arm_cm_irq_entry();
-
-    panic("unhandled irq\n");
-}
-
-extern void stellaris_uart_irq(void);
-
-/* a list of default handlers that are simply aliases to the dummy handler */
-#define DEFAULT_HANDLER(x) \
-void stellaris_##x##_irq(void) __WEAK_ALIAS("stellaris_dummy_irq")
-
-DEFAULT_HANDLER(gpio_porta);
-DEFAULT_HANDLER(gpio_portb);
-DEFAULT_HANDLER(gpio_portc);
-DEFAULT_HANDLER(gpio_portd);
-DEFAULT_HANDLER(gpio_porte);
-DEFAULT_HANDLER(uart0);
-DEFAULT_HANDLER(uart1);
-DEFAULT_HANDLER(ssi0);
-DEFAULT_HANDLER(i2c0);
-DEFAULT_HANDLER(pwm_fault);
-DEFAULT_HANDLER(pwm_gen0);
-DEFAULT_HANDLER(pwm_gen1);
-DEFAULT_HANDLER(pwm_gen2);
-DEFAULT_HANDLER(quad_encoder0);
-DEFAULT_HANDLER(adc_seq0);
-DEFAULT_HANDLER(adc_seq1);
-DEFAULT_HANDLER(adc_seq2);
-DEFAULT_HANDLER(adc_seq3);
-DEFAULT_HANDLER(watchdog_timer);
-DEFAULT_HANDLER(timer0_subtimerA);
-DEFAULT_HANDLER(timer0_subtimerB);
-DEFAULT_HANDLER(timer1_subtimerA);
-DEFAULT_HANDLER(timer1_subtimerB);
-DEFAULT_HANDLER(timer2_subtimerA);
-DEFAULT_HANDLER(timer2_subtimerB);
-DEFAULT_HANDLER(analog_comp0);
-DEFAULT_HANDLER(analog_comp1);
-DEFAULT_HANDLER(analog_comp2);
-DEFAULT_HANDLER(sys_control);
-DEFAULT_HANDLER(flash_control);
-DEFAULT_HANDLER(gpio_portf);
-DEFAULT_HANDLER(gpio_portg);
-DEFAULT_HANDLER(gpio_porth);
-DEFAULT_HANDLER(uart2);
-DEFAULT_HANDLER(ssi1);
-DEFAULT_HANDLER(timer3_subtimerA);
-DEFAULT_HANDLER(timer3_subtimerB);
-DEFAULT_HANDLER(i2c1);
-DEFAULT_HANDLER(quad_encoder1);
-DEFAULT_HANDLER(can0);
-DEFAULT_HANDLER(can1);
-DEFAULT_HANDLER(can2);
-DEFAULT_HANDLER(ethernet);
-DEFAULT_HANDLER(hibernate);
-DEFAULT_HANDLER(usb0);
-DEFAULT_HANDLER(pwm_gen3);
-DEFAULT_HANDLER(udma_software);
-DEFAULT_HANDLER(udma_error);
-DEFAULT_HANDLER(ad1_seq0);
-DEFAULT_HANDLER(ad1_seq1);
-DEFAULT_HANDLER(ad1_seq2);
-DEFAULT_HANDLER(ad1_seq3);
-DEFAULT_HANDLER(i2s0);
-DEFAULT_HANDLER(ext_bus0);
-DEFAULT_HANDLER(gpio_portj);
-DEFAULT_HANDLER(gpio_portk);
-DEFAULT_HANDLER(gpio_portl);
-DEFAULT_HANDLER(ssi2);
-DEFAULT_HANDLER(ssi3);
-DEFAULT_HANDLER(uart3);
-DEFAULT_HANDLER(uart4);
-DEFAULT_HANDLER(uart5);
-DEFAULT_HANDLER(uart6);
-DEFAULT_HANDLER(uart7);
-DEFAULT_HANDLER(i2c2);
-DEFAULT_HANDLER(i2c3);
-DEFAULT_HANDLER(timer4_subtimerA);
-DEFAULT_HANDLER(timer4_subtimerB);
-DEFAULT_HANDLER(timer5_subtimerA);
-DEFAULT_HANDLER(timer5_subtimerB);
-DEFAULT_HANDLER(wide_timer0_subtimerA);
-DEFAULT_HANDLER(wide_timer0_subtimerB);
-DEFAULT_HANDLER(wide_timer1_subtimerA);
-DEFAULT_HANDLER(wide_timer1_subtimerB);
-DEFAULT_HANDLER(wide_timer2_subtimerA);
-DEFAULT_HANDLER(wide_timer2_subtimerB);
-DEFAULT_HANDLER(wide_timer3_subtimerA);
-DEFAULT_HANDLER(wide_timer3_subtimerB);
-DEFAULT_HANDLER(wide_timer4_subtimerA);
-DEFAULT_HANDLER(wide_timer4_subtimerB);
-DEFAULT_HANDLER(wide_timer5_subtimerA);
-DEFAULT_HANDLER(wide_timer6_subtimerB);
-DEFAULT_HANDLER(fpu);
-DEFAULT_HANDLER(peci0);
-DEFAULT_HANDLER(lpc0);
-DEFAULT_HANDLER(i2c4);
-DEFAULT_HANDLER(i2c5);
-DEFAULT_HANDLER(gpio_portm);
-DEFAULT_HANDLER(gpio_portn);
-DEFAULT_HANDLER(quad_encoder2);
-DEFAULT_HANDLER(fan0);
-DEFAULT_HANDLER(gpio_portp0);
-DEFAULT_HANDLER(gpio_portp1);
-DEFAULT_HANDLER(gpio_portp2);
-DEFAULT_HANDLER(gpio_portp3);
-DEFAULT_HANDLER(gpio_portp4);
-DEFAULT_HANDLER(gpio_portp5);
-DEFAULT_HANDLER(gpio_portp6);
-DEFAULT_HANDLER(gpio_portp7);
-DEFAULT_HANDLER(gpio_portq0);
-DEFAULT_HANDLER(gpio_portq1);
-DEFAULT_HANDLER(gpio_portq2);
-DEFAULT_HANDLER(gpio_portq3);
-DEFAULT_HANDLER(gpio_portq4);
-DEFAULT_HANDLER(gpio_portq5);
-DEFAULT_HANDLER(gpio_portq6);
-DEFAULT_HANDLER(gpio_portq7);
-DEFAULT_HANDLER(gpio_portr);
-DEFAULT_HANDLER(gpio_ports);
-DEFAULT_HANDLER(pwm1_gen0);
-DEFAULT_HANDLER(pwm1_gen1);
-DEFAULT_HANDLER(pwm1_gen2);
-DEFAULT_HANDLER(pwm1_gen3);
-DEFAULT_HANDLER(pwm1_fault);
-
-#define VECTAB_ENTRY(x) stellaris_##x##_irq
-
-const void *const __SECTION(".text.boot.vectab2") vectab2[] = {
-    VECTAB_ENTRY(gpio_porta),               // GPIO Port A
-    VECTAB_ENTRY(gpio_portb),               // GPIO Port B
-    VECTAB_ENTRY(gpio_portc),               // GPIO Port C
-    VECTAB_ENTRY(gpio_portd),               // GPIO Port D
-    VECTAB_ENTRY(gpio_porte),               // GPIO Port E
-    VECTAB_ENTRY(uart0),                    // UART0 Rx and Tx
-    VECTAB_ENTRY(uart1),                    // UART1 Rx and Tx
-    VECTAB_ENTRY(ssi0),                     // SSI0 Rx and Tx
-    VECTAB_ENTRY(i2c0),                     // I2C0 Master and Slave
-    VECTAB_ENTRY(pwm_fault),                // PWM Fault
-    VECTAB_ENTRY(pwm_gen0),                 // PWM Generator 0
-    VECTAB_ENTRY(pwm_gen1),                 // PWM Generator 1
-    VECTAB_ENTRY(pwm_gen2),                 // PWM Generator 2
-    VECTAB_ENTRY(quad_encoder0),            // Quadrature Encoder 0
-    VECTAB_ENTRY(adc_seq0),                 // ADC Sequence 0
-    VECTAB_ENTRY(adc_seq1),                 // ADC Sequence 1
-    VECTAB_ENTRY(adc_seq2),                 // ADC Sequence 2
-    VECTAB_ENTRY(adc_seq3),                 // ADC Sequence 3
-    VECTAB_ENTRY(watchdog_timer),           // Watchdog timer
-    VECTAB_ENTRY(timer0_subtimerA),         // Timer 0 subtimer A
-    VECTAB_ENTRY(timer0_subtimerB),         // Timer 0 subtimer B
-    VECTAB_ENTRY(timer1_subtimerA),         // Timer 1 subtimer A
-    VECTAB_ENTRY(timer1_subtimerB),         // Timer 1 subtimer B
-    VECTAB_ENTRY(timer2_subtimerA),         // Timer 2 subtimer A
-    VECTAB_ENTRY(timer2_subtimerB),         // Timer 2 subtimer B
-    VECTAB_ENTRY(analog_comp0),             // Analog Comparator 0
-    VECTAB_ENTRY(analog_comp1),             // Analog Comparator 1
-    VECTAB_ENTRY(analog_comp2),             // Analog Comparator 2
-    VECTAB_ENTRY(sys_control),              // System Control (PLL, OSC, BO)
-    VECTAB_ENTRY(flash_control),            // FLASH Control
-    VECTAB_ENTRY(gpio_portf),               // GPIO Port F
-    VECTAB_ENTRY(gpio_portg),               // GPIO Port G
-    VECTAB_ENTRY(gpio_porth),               // GPIO Port H
-    VECTAB_ENTRY(uart2),                    // UART2 Rx and Tx
-    VECTAB_ENTRY(ssi1),                     // SSI1 Rx and Tx
-    VECTAB_ENTRY(timer3_subtimerA),         // Timer 3 subtimer A
-    VECTAB_ENTRY(timer3_subtimerB),         // Timer 3 subtimer B
-    VECTAB_ENTRY(i2c1),                     // I2C1 Master and Slave
-    VECTAB_ENTRY(quad_encoder1),            // Quadrature Encoder 1
-    VECTAB_ENTRY(can0),                     // CAN0
-    VECTAB_ENTRY(can1),                     // CAN1
-    VECTAB_ENTRY(can2),                     // CAN2
-    VECTAB_ENTRY(ethernet),                 // Ethernet
-    VECTAB_ENTRY(hibernate),                // Hibernate
-    VECTAB_ENTRY(usb0),                     // USB0
-    VECTAB_ENTRY(pwm_gen3),                 // PWM Generator 3
-    VECTAB_ENTRY(udma_software),            // uDMA Software Transfer
-    VECTAB_ENTRY(udma_error),               // uDMA Error
-    VECTAB_ENTRY(ad1_seq0),                 // ADC1 Sequence 0
-    VECTAB_ENTRY(ad1_seq1),                 // ADC1 Sequence 1
-    VECTAB_ENTRY(ad1_seq2),                 // ADC1 Sequence 2
-    VECTAB_ENTRY(ad1_seq3),                 // ADC1 Sequence 3
-    VECTAB_ENTRY(i2s0),                     // I2S0
-    VECTAB_ENTRY(ext_bus0),                 // External Bus Interface 0
-    VECTAB_ENTRY(gpio_portj),               // GPIO Port J
-    VECTAB_ENTRY(gpio_portk),               // GPIO Port K
-    VECTAB_ENTRY(gpio_portl),               // GPIO Port L
-    VECTAB_ENTRY(ssi2),                     // SSI2 Rx and Tx
-    VECTAB_ENTRY(ssi3),                     // SSI3 Rx and Tx
-    VECTAB_ENTRY(uart3),                    // UART3 Rx and Tx
-    VECTAB_ENTRY(uart4),                    // UART4 Rx and Tx
-    VECTAB_ENTRY(uart5),                    // UART5 Rx and Tx
-    VECTAB_ENTRY(uart6),                    // UART6 Rx and Tx
-    VECTAB_ENTRY(uart7),                    // UART7 Rx and Tx
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(i2c2),                     // I2C2 Master and Slave
-    VECTAB_ENTRY(i2c3),                     // I2C3 Master and Slave
-    VECTAB_ENTRY(timer4_subtimerA),         // Timer 4 subtimer A
-    VECTAB_ENTRY(timer4_subtimerB),         // Timer 4 subtimer B
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(timer5_subtimerA),         // Timer 5 subtimer A
-    VECTAB_ENTRY(timer5_subtimerB),         // Timer 5 subtimer B
-    VECTAB_ENTRY(wide_timer0_subtimerA),    // Wide Timer 0 subtimer A
-    VECTAB_ENTRY(wide_timer0_subtimerB),    // Wide Timer 0 subtimer B
-    VECTAB_ENTRY(wide_timer1_subtimerA),    // Wide Timer 1 subtimer A
-    VECTAB_ENTRY(wide_timer1_subtimerB),    // Wide Timer 1 subtimer B
-    VECTAB_ENTRY(wide_timer2_subtimerA),    // Wide Timer 2 subtimer A
-    VECTAB_ENTRY(wide_timer2_subtimerB),    // Wide Timer 2 subtimer B
-    VECTAB_ENTRY(wide_timer3_subtimerA),    // Wide Timer 3 subtimer A
-    VECTAB_ENTRY(wide_timer3_subtimerB),    // Wide Timer 3 subtimer B
-    VECTAB_ENTRY(wide_timer4_subtimerA),    // Wide Timer 4 subtimer A
-    VECTAB_ENTRY(wide_timer4_subtimerB),    // Wide Timer 4 subtimer B
-    VECTAB_ENTRY(wide_timer5_subtimerA),    // Wide Timer 5 subtimer A
-    VECTAB_ENTRY(wide_timer6_subtimerB),    // Wide Timer 5 subtimer B
-    VECTAB_ENTRY(fpu),                      // FPU
-    VECTAB_ENTRY(peci0),                    // PECI 0
-    VECTAB_ENTRY(lpc0),                     // LPC 0
-    VECTAB_ENTRY(i2c4),                     // I2C4 Master and Slave
-    VECTAB_ENTRY(i2c5),                     // I2C5 Master and Slave
-    VECTAB_ENTRY(gpio_portm),               // GPIO Port M
-    VECTAB_ENTRY(gpio_portn),               // GPIO Port N
-    VECTAB_ENTRY(quad_encoder2),            // Quadrature Encoder 2
-    VECTAB_ENTRY(fan0),                     // Fan 0
-    VECTAB_ENTRY(dummy),                    // Reserved
-    VECTAB_ENTRY(gpio_portp0),              // GPIO Port P (Summary or P0)
-    VECTAB_ENTRY(gpio_portp1),              // GPIO Port P1
-    VECTAB_ENTRY(gpio_portp2),              // GPIO Port P2
-    VECTAB_ENTRY(gpio_portp3),              // GPIO Port P3
-    VECTAB_ENTRY(gpio_portp4),              // GPIO Port P4
-    VECTAB_ENTRY(gpio_portp5),              // GPIO Port P5
-    VECTAB_ENTRY(gpio_portp6),              // GPIO Port P6
-    VECTAB_ENTRY(gpio_portp7),              // GPIO Port P7
-    VECTAB_ENTRY(gpio_portq0),              // GPIO Port Q (Summary or Q0)
-    VECTAB_ENTRY(gpio_portq1),              // GPIO Port Q1
-    VECTAB_ENTRY(gpio_portq2),              // GPIO Port Q2
-    VECTAB_ENTRY(gpio_portq3),              // GPIO Port Q3
-    VECTAB_ENTRY(gpio_portq4),              // GPIO Port Q4
-    VECTAB_ENTRY(gpio_portq5),              // GPIO Port Q5
-    VECTAB_ENTRY(gpio_portq6),              // GPIO Port Q6
-    VECTAB_ENTRY(gpio_portq7),              // GPIO Port Q7
-    VECTAB_ENTRY(gpio_portr),               // GPIO Port R
-    VECTAB_ENTRY(gpio_ports),               // GPIO Port S
-    VECTAB_ENTRY(pwm1_gen0),                // PWM 1 Generator 0
-    VECTAB_ENTRY(pwm1_gen1),                // PWM 1 Generator 1
-    VECTAB_ENTRY(pwm1_gen2),                // PWM 1 Generator 2
-    VECTAB_ENTRY(pwm1_gen3),                // PWM 1 Generator 3
-    VECTAB_ENTRY(pwm1_fault)                // PWM 1 Fault
-};
diff --git a/platform/stm32/power.c b/platform/stm32/power.c
deleted file mode 100644
index faee2ce8..00000000
--- a/platform/stm32/power.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * Copyright (c) 2016 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <err.h>
-#include <compiler.h>
-#include <stdio.h>
-#include <platform.h>
-#include <platform/debug.h>
-#include <arch/ops.h>
-#include <arch/arm/cm.h>
-
-void platform_halt(platform_halt_action suggested_action,
-                   platform_halt_reason reason)
-{
-#if ENABLE_PANIC_SHELL
-    if (reason == HALT_REASON_SW_PANIC) {
-        dprintf(ALWAYS, "CRASH: starting debug shell... (reason = %d)\n", reason);
-        arch_disable_ints();
-        panic_shell_start();
-    }
-#endif  // ENABLE_PANIC_SHELL
-
-    switch (suggested_action) {
-        default:
-        case HALT_ACTION_SHUTDOWN:
-        case HALT_ACTION_HALT:
-            dprintf(ALWAYS, "HALT: spinning forever... (reason = %d)\n", reason);
-            arch_disable_ints();
-            for (;;)
-                arch_idle();
-            break;
-        case HALT_ACTION_REBOOT:
-            dprintf(INFO, "REBOOT\n");
-            arch_disable_ints();
-            for (;;) {
-                NVIC_SystemReset();
-            }
-            break;
-    }
-
-    dprintf(ALWAYS, "HALT: spinning forever... (reason = %d)\n", reason);
-    arch_disable_ints();
-    for (;;);
-}
-
diff --git a/platform/stm32/rules.mk b/platform/stm32/rules.mk
deleted file mode 100644
index cb3ccec9..00000000
--- a/platform/stm32/rules.mk
+++ /dev/null
@@ -1,10 +0,0 @@
-# Code shared across different stm32 platforms.
-
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/power.c
-
-include make/module.mk
diff --git a/platform/stm32f0xx/can.c b/platform/stm32f0xx/can.c
deleted file mode 100644
index aadb8011..00000000
--- a/platform/stm32f0xx/can.c
+++ /dev/null
@@ -1,210 +0,0 @@
-#include <platform/can.h>
-
-#include <assert.h>
-#include <errno.h>
-#include <pow2.h>
-#include <stdbool.h>
-
-#include <arch/arm/cm.h>
-#include <kernel/mutex.h>
-#include <lib/cbuf.h>
-#include <platform/rcc.h>
-
-typedef CAN_TypeDef stm32_can_t;
-typedef CAN_TxMailBox_TypeDef stm32_can_tx_mailbox_t;
-typedef CAN_FIFOMailBox_TypeDef stm32_can_rx_mailbox_t;
-
-typedef enum {
-    STM32_CAN_LOOPBACK_DISABLED = 0,
-    STM32_CAN_LOOPBACK_ENABLED = CAN_BTR_LBKM,
-} stm32_can_loopback_t;
-
-#define STM32_CAN_BTR_BRP(x) (((x) - 1) & CAN_BTR_BRP)
-#define STM32_CAN_BTR_TS1(x) ((((x) - 1) & 0xf) << 16)
-#define STM32_CAN_BTR_TS2(x) ((((x) - 1) & 0x7) << 20)
-#define STM32_CAN_BTR_SJW(x) ((((x) - 1) & 0x3) << 24)
-
-static cbuf_t can_rx_buf;
-static mutex_t can_tx_mutex;
-
-void stm32_CEC_CAN_IRQ(void)
-{
-    arm_cm_irq_entry();
-    bool resched = false;
-    stm32_can_t *can = CAN;
-
-    while (can->RF0R & CAN_RF0R_FMP0) {
-        // If there's no space left in the rx buffer, disable the RX interrupt.
-        if (cbuf_space_avail(&can_rx_buf) < sizeof(can_msg_t)) {
-            can->IER &= ~CAN_IER_FMPIE0;
-            break;
-        }
-        can_msg_t msg;
-        stm32_can_rx_mailbox_t *mailbox = &can->sFIFOMailBox[0];
-
-        uint32_t rir = mailbox->RIR;
-        msg.ide = !!(rir & CAN_RI0R_IDE);
-        msg.rtr = !!(rir & CAN_RI0R_RTR);
-        msg.id = (rir >> 21) & ((1 << 11) - 1);
-        if (msg.ide) {
-            // Extended IDs untested.
-            msg.id_ex = (rir >> 3) & ((1 << 18) - 1);
-        }
-
-        msg.dlc = mailbox->RDTR & CAN_RDT0R_DLC;
-
-        uint32_t data;
-
-        data = mailbox->RDLR;
-        msg.data[0] = data & 0xff;
-        msg.data[1] = (data >> 8) & 0xff;
-        msg.data[2] = (data >> 16) & 0xff;
-        msg.data[3] = (data >> 24) & 0xff;
-
-        data = mailbox->RDHR;
-        msg.data[4] = data & 0xff;
-        msg.data[5] = (data >> 8) & 0xff;
-        msg.data[6] = (data >> 16) & 0xff;
-        msg.data[7] = (data >> 24) & 0xff;
-
-        can->RF0R |= CAN_RF0R_RFOM0;
-
-        cbuf_write(&can_rx_buf, &msg, sizeof(msg), false);
-        resched = true;
-    }
-
-    arm_cm_irq_exit(resched);
-}
-
-stm32_can_tx_mailbox_t *stm32_can_select_empty_mailbox(stm32_can_t *can) {
-    uint32_t tsr = can->TSR;
-
-    if (tsr & CAN_TSR_TME0) {
-        return &can->sTxMailBox[0];
-    } else if (tsr & CAN_TSR_TME1) {
-        return &can->sTxMailBox[1];
-    } else if (tsr & CAN_TSR_TME2) {
-        return &can->sTxMailBox[2];
-    } else {
-        return NULL;
-    }
-}
-
-int stm32_can_transmit(stm32_can_t *can, const can_msg_t *msg) {
-    stm32_can_tx_mailbox_t *mailbox = stm32_can_select_empty_mailbox(can);
-    if (mailbox == NULL) {
-        return -EWOULDBLOCK;
-    }
-
-    /* Set up the Id */
-    if (msg->ide) {
-        // Extended IDs untested.
-        mailbox->TIR = (msg->id << 21) | (msg->id_ex << 3) | CAN_TI0R_IDE
-            | (msg->rtr ? CAN_TI0R_RTR : 0);
-    } else {
-        mailbox->TIR = (msg->id << 21) | (msg->rtr ? CAN_TI0R_RTR : 0);
-    }
-
-    /* Set up the DLC */
-    mailbox->TDTR &= ~CAN_TDT0R_DLC;
-    mailbox->TDTR |= msg->dlc & CAN_TDT0R_DLC;
-
-    /* Set up the data field */
-    mailbox->TDLR = msg->data[3] << 24 | msg->data[2] << 16
-        | msg->data[1] << 8 | msg->data[0];
-    mailbox->TDHR = msg->data[7] << 24 | msg->data[6] << 16
-        | msg->data[5] << 8 | msg->data[4];
-
-    mailbox->TIR |= CAN_TI0R_TXRQ;
-    return 0;
-}
-
-void stm32_can_filter_set_mask32(uint32_t filter, uint32_t id, uint32_t mask) {
-    DEBUG_ASSERT(filter <= 27);
-
-    stm32_can_t *can = CAN;
-    uint32_t filter_mask = 1 << filter;
-
-    // Enter filter init mode.
-    can->FMR |= CAN_FMR_FINIT;
-
-    // Disable filter.
-    can->FA1R &= ~filter_mask;
-
-    // Set 32bit scale mode.
-    can->FS1R |= filter_mask;
-
-    can->sFilterRegister[filter].FR1 = id;
-    can->sFilterRegister[filter].FR2 = mask;
-
-    // Set ID & Mask mode.
-    can->FM1R &= ~filter_mask;
-
-    // We only support TX FIFO 0.
-    can->FFA1R &= ~filter_mask;
-
-    // Enable filter.
-    can->FA1R |= filter_mask;
-
-    // Exit filter init mode.
-    can->FMR &= ~CAN_FMR_FINIT;
-}
-
-void can_init(bool loopback) {
-    stm32_can_t *can = CAN;
-    // initialize the RX cbuf with enough room for 4 can frames
-    cbuf_initialize(&can_rx_buf, round_up_pow2_u32(sizeof(can_msg_t) * 4));
-
-    mutex_init(&can_tx_mutex);
-
-    // Enable CAN peripheral clock.
-    stm32_rcc_set_enable(STM32_RCC_CLK_CAN, true);
-
-    // Put CAN into init mode.
-    can->MCR = CAN_MCR_INRQ;
-    while (!(can->MSR & CAN_MSR_INAK)) {}
-
-    // CAN Baudrate = 125kbps (CAN clocked at 36 MHz)
-    // XXX: this is probably wrong running at 48MHz
-    can->BTR =
-        STM32_CAN_BTR_BRP(16) |
-        STM32_CAN_BTR_TS1(9) |
-        STM32_CAN_BTR_TS2(8) |
-        STM32_CAN_BTR_SJW(1) |
-        (loopback ? STM32_CAN_LOOPBACK_ENABLED : STM32_CAN_LOOPBACK_DISABLED);
-
-    // Take CAN out of init mode.
-    can->MCR &= ~CAN_MCR_INRQ;
-    while (can->MSR & CAN_MSR_INAK) {}
-
-    stm32_can_filter_set_mask32(0, 0x0, 0x0);
-
-    // Enable FIFO 0 message pending interrupt
-    can->IER |= CAN_IER_FMPIE0;
-    NVIC_EnableIRQ(CEC_CAN_IRQn);
-}
-
-ssize_t can_send(const can_msg_t *msg)
-{
-    stm32_can_t *can = CAN;
-    ssize_t ret;
-
-    mutex_acquire(&can_tx_mutex);
-    ret = stm32_can_transmit(can, msg);
-    mutex_release(&can_tx_mutex);
-
-    return ret;
-}
-
-ssize_t can_recv(can_msg_t *msg, bool block)
-{
-    stm32_can_t *can = CAN;
-    size_t bytes_read;
-
-    bytes_read = cbuf_read(&can_rx_buf, msg, sizeof(*msg), block);
-    if (cbuf_space_avail(&can_rx_buf) >= sizeof(*msg)) {
-        can->IER |= CAN_IER_FMPIE0;
-    }
-
-    return bytes_read > 0 ? msg->dlc : -EWOULDBLOCK;
-}
diff --git a/platform/stm32f0xx/debug.c b/platform/stm32f0xx/debug.c
deleted file mode 100644
index 81f9b92e..00000000
--- a/platform/stm32f0xx/debug.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <debug.h>
-#include <stdio.h>
-#include <kernel/thread.h>
-#include <platform/debug.h>
-#include <arch/ops.h>
-#include <dev/uart.h>
-#include <target/debugconfig.h>
-#include <arch/arm/cm.h>
-
-void stm32_debug_early_init(void)
-{
-    uart_init_early();
-}
-
-/* later in the init process */
-void stm32_debug_init(void)
-{
-    uart_init();
-}
-
-void platform_dputc(char c)
-{
-    if (c == '\n')
-        uart_putc(DEBUG_UART, '\r');
-    uart_putc(DEBUG_UART, c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    int ret = uart_getc(DEBUG_UART, wait);
-    if (ret == -1)
-        return -1;
-    *c = ret;
-    return 0;
-}
-
diff --git a/platform/stm32f0xx/dma.c b/platform/stm32f0xx/dma.c
deleted file mode 100644
index e235b2f4..00000000
--- a/platform/stm32f0xx/dma.c
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * Copyright (c) 2016 Erik Gilling
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <platform/dma.h>
-
-#include <assert.h>
-#include <compiler.h>
-
-#include <arch/arm/cm.h>
-#include <kernel/event.h>
-#include <platform/rcc.h>
-#include <sys/types.h>
-
-#include <stm32f0xx.h>
-
-typedef DMA_Channel_TypeDef dma_channel_regs_t;
-
-event_t dma_events[DMA_CHANNELS];
-
-static void dma_channel_assert(dma_channel_t chan)
-{
-    assert(DMA_CHANNEL_1 <= chan && chan < DMA_CHANNEL_7);
-}
-
-static dma_channel_regs_t *dma_get_channel(dma_channel_t chan)
-{
-    unsigned long addr =
-        DMA1_Channel1_BASE + (chan - 1) * 0x14;
-    return (dma_channel_regs_t *)addr;
-}
-
-static event_t *dma_event(dma_channel_t chan)
-{
-    return &dma_events[chan - 1];
-}
-
-// TODO(konkers): Separate out DMA IRQ handling by channel group.
-void dma_irq(void)
-{
-    arm_cm_irq_entry();
-    bool resched = false;
-
-    uint32_t sr = DMA1->ISR;
-
-    size_t i;
-    for (i = 0; i < countof(dma_events); i++) {
-        uint32_t ch_sr = (sr >> (i * 4)) & 0xf;
-
-        // TODO(konkers): Report error.
-        if (ch_sr & (DMA_ISR_TCIF1 | DMA_ISR_TEIF1)) {
-            event_signal(&dma_events[i], false);
-            resched = true;
-        }
-    }
-    DMA1->IFCR = sr;
-    arm_cm_irq_exit(resched);
-}
-
-void stm32_DMA1_Channel1_IRQ(void)
-{
-    dma_irq();
-}
-
-void stm32_DMA1_Channel2_3_IRQ(void)
-{
-    dma_irq();
-}
-
-void stm32_DMA1_Channel4_5_6_7_IRQ(void)
-{
-    dma_irq();
-}
-
-void dma_transfer_start(dma_channel_t chan,
-                        uint32_t periph_addr,
-                        uint32_t mem_addr,
-                        uint16_t count,
-                        uint32_t flags)
-{
-    dma_channel_assert(chan);
-    event_unsignal(dma_event(chan));
-
-    dma_channel_regs_t *chan_regs = dma_get_channel(chan);
-    chan_regs->CCR &= ~DMA_CCR_EN;
-
-    chan_regs->CPAR = periph_addr;
-    chan_regs->CMAR = mem_addr;
-    chan_regs->CNDTR = count;
-    chan_regs->CCR = flags | DMA_CCR_TEIE | DMA_CCR_TCIE | DMA_CCR_EN;
-}
-
-void dma_wait(dma_channel_t chan)
-{
-    dma_channel_assert(chan);
-
-    event_wait(dma_event(chan));
-}
-
-void dma_init(void)
-{
-    stm32_rcc_set_enable(STM32_RCC_CLK_DMA, true);
-
-    size_t i;
-    for (i = 0; i < countof(dma_events); i++) {
-        // Initialize all the channel events as signaled because they're idle.
-        event_init(&dma_events[i], true, 0);
-    }
-    NVIC_EnableIRQ(DMA1_Channel1_IRQn);
-    NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
-    NVIC_EnableIRQ(DMA1_Channel4_5_6_7_IRQn);
-}
diff --git a/platform/stm32f0xx/gpio.c b/platform/stm32f0xx/gpio.c
deleted file mode 100644
index c85b3a8a..00000000
--- a/platform/stm32f0xx/gpio.c
+++ /dev/null
@@ -1,193 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- * Copyright (c) 2016 Erik Gilling
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <assert.h>
-#include <debug.h>
-#include <dev/gpio.h>
-#include <platform/gpio.h>
-#include <platform/rcc.h>
-#include <platform/stm32.h>
-#include <stm32f0xx.h>
-
-typedef GPIO_TypeDef stm32_gpio_t;
-
-typedef enum {
-    STM32_GPIO_SPEED_2_MHZ  = 0x0,
-    STM32_GPIO_SPEED_20_MHZ = 0x1,
-    STM32_GPIO_SPEED_50_MHZ = 0x3,
-} stm32_goio_speed_t;
-
-typedef enum {
-    STM32_GPIO_OTYPE_PP = 0x0,
-    STM32_GPIO_OTYPE_OD = 0x1,
-} stm32_gpio_otype_t;
-
-typedef enum {
-    STM32_GPIO_MODE_IN  = 0x0,
-    STM32_GPIO_MODE_OUT = 0x1,
-    STM32_GPIO_MODE_AF  = 0x2,
-    STM32_GPIO_MODE_AN  = 0x3,
-} stm32_gpio_mode_t;
-
-typedef enum {
-    STM32_GPIO_PUPD_NONE = 0x0,
-    STM32_GPIO_PUPD_UP   = 0x1,
-    STM32_GPIO_PUPD_DOWN = 0x2,
-} stm32_gpio_pupd_t;
-
-static stm32_gpio_t *stm32_gpio_port_to_pointer(unsigned int port)
-{
-    switch (port) {
-        default:
-        case GPIO_PORT_A:
-            return GPIOA;
-        case GPIO_PORT_B:
-            return GPIOB;
-        case GPIO_PORT_C:
-            return GPIOC;
-        case GPIO_PORT_D:
-            return GPIOD;
-        case GPIO_PORT_E:
-            return GPIOE;
-        case GPIO_PORT_F:
-            return GPIOF;
-    }
-}
-
-static void stm32_gpio_enable_port(unsigned int port)
-{
-    DEBUG_ASSERT(port <= GPIO_PORT_F);
-
-    switch (port) {
-        default:
-        case GPIO_PORT_A:
-            stm32_rcc_set_enable(STM32_RCC_CLK_IOPA, true);
-            break;
-
-        case GPIO_PORT_B:
-            stm32_rcc_set_enable(STM32_RCC_CLK_IOPB, true);
-            break;
-
-        case GPIO_PORT_C:
-            stm32_rcc_set_enable(STM32_RCC_CLK_IOPC, true);
-            break;
-
-        case GPIO_PORT_D:
-            stm32_rcc_set_enable(STM32_RCC_CLK_IOPD, true);
-            break;
-
-        case GPIO_PORT_E:
-            stm32_rcc_set_enable(STM32_RCC_CLK_IOPE, true);
-            break;
-
-        case GPIO_PORT_F:
-            stm32_rcc_set_enable(STM32_RCC_CLK_IOPF, true);
-            break;
-
-    }
-}
-
-void stm32_gpio_early_init(void)
-{
-}
-
-static void stm32_gpio_af_config(stm32_gpio_t *gpio, uint32_t pin,
-                                 uint32_t af_num) {
-  // 8 AF entries per register
-  uint32_t reg_index = pin >> 3;
-  uint32_t entry_shift = (pin & 0x7) * 4;
-
-  gpio->AFR[reg_index] &= ~(0xf << entry_shift);
-  gpio->AFR[reg_index] |= (af_num & 0xf) << entry_shift;
-}
-
-int gpio_config(unsigned nr, unsigned flags)
-{
-    uint32_t port = GPIO_PORT(nr);
-    uint32_t pin = GPIO_PIN(nr);
-    stm32_gpio_t *gpio = stm32_gpio_port_to_pointer(port);
-
-    assert(pin < 16);
-
-    stm32_gpio_enable_port(port);
-
-    if (flags & GPIO_STM32_AF) {
-        stm32_gpio_af_config(gpio, pin, GPIO_AFNUM(flags));
-    }
-
-    if ((flags & GPIO_OUTPUT) || (flags & GPIO_STM32_AF)) {
-        // All pins configured to 50MHz.
-        gpio->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (pin * 2));
-        gpio->OSPEEDR |= STM32_GPIO_SPEED_50_MHZ << (pin * 2);
-
-        // Output mode configuration
-        gpio->OTYPER &= ~((GPIO_OTYPER_OT_0) << pin);
-        if (flags & GPIO_STM32_OD) {
-            gpio->OTYPER |= STM32_GPIO_OTYPE_OD << pin;
-        } else {
-            gpio->OTYPER |= STM32_GPIO_OTYPE_PP << pin;
-        }
-    }
-
-    stm32_gpio_mode_t mode;
-    if (flags & GPIO_OUTPUT) {
-        mode = STM32_GPIO_MODE_OUT;
-    } else if (flags & GPIO_STM32_AF) {
-        mode = STM32_GPIO_MODE_AF;
-    } else {
-        mode = STM32_GPIO_MODE_IN;
-    }
-
-    gpio->MODER  &= ~(GPIO_MODER_MODER0 << (pin * 2));
-    gpio->MODER |= (mode << (pin * 2));
-
-    stm32_gpio_pupd_t pupd = STM32_GPIO_PUPD_NONE;
-    if (flags & GPIO_PULLUP) {
-        pupd = STM32_GPIO_PUPD_UP;
-    } else if (flags & GPIO_PULLDOWN) {
-        pupd = STM32_GPIO_PUPD_DOWN;
-    }
-
-    gpio->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (pin * 2));
-    gpio->PUPDR |= pupd << (pin * 2);
-
-    return 0;
-}
-
-void gpio_set(unsigned nr, unsigned on)
-{
-    stm32_gpio_t *gpio = stm32_gpio_port_to_pointer(nr);
-    if (on) {
-        gpio->BSRR = 1 << GPIO_PIN(nr);
-    } else {
-        gpio->BRR = 1 << GPIO_PIN(nr);
-    }
-}
-
-int gpio_get(unsigned nr)
-{
-    stm32_gpio_t *gpio = stm32_gpio_port_to_pointer(GPIO_PORT(nr));
-    return (gpio->IDR & (1 << GPIO_PIN(nr))) != 0;
-}
-
diff --git a/platform/stm32f0xx/include/platform/can.h b/platform/stm32f0xx/include/platform/can.h
deleted file mode 100644
index 20843c63..00000000
--- a/platform/stm32f0xx/include/platform/can.h
+++ /dev/null
@@ -1,52 +0,0 @@
-#ifndef __PLATFORM_STM32_CAN_H
-#define __PLATFORM_STM32_CAN_H
-
-#include <compiler.h>
-#include <stdbool.h>
-#include <stdint.h>
-
-#include <sys/types.h>
-
-typedef struct {
-    unsigned id:11;  // Standard CAN identifier.
-    unsigned id_ex:18;  // Extended CAN identifier.
-    unsigned rtr:1;  // Remote transmit request.
-    unsigned ide:1;  // Identifier extension.
-    unsigned pad:1;
-
-    uint8_t dlc;  // Data length.
-    uint8_t data[8];
-} __PACKED can_msg_t;
-
-/**
- * can_init
- *
- * Initialize the CAN peripheral.
- *
- * @param[in] loopback If true, puts the can interface in loopback mode.
- */
-void can_init(bool loopback);
-
-/**
- * can_send
- *
- * Queues a can message to be sent.  Does not block if there is no space
- * in the CAN mailboxes.
- *
- * @param[in] msg Message to send.
- *
- * @return Negative error code on error, size of data queued on success.
- */
-ssize_t can_send(const can_msg_t *msg);
-
-/**
- * can_recv
- *
- * @param[out] msg Received message
- * @param[in] block If true, can_recv() will block until a message is received.
- *
- * @return Negative error code on error, size of data received on success.
- */
-ssize_t can_recv(can_msg_t *msg, bool block);
-
-#endif  // __PLATFORM_STM32_CAN_H
diff --git a/platform/stm32f0xx/include/platform/dma.h b/platform/stm32f0xx/include/platform/dma.h
deleted file mode 100644
index e75a221b..00000000
--- a/platform/stm32f0xx/include/platform/dma.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * Copyright (c) 2016 Erik Gilling
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_STM32_DMA_H
-#define __PLATFORM_STM32_DMA_H
-
-#include <stdint.h>
-
-typedef enum {
-    DMA_CHANNEL_1 = 1,
-    DMA_CHANNEL_2 = 2,
-    DMA_CHANNEL_3 = 3,
-    DMA_CHANNEL_4 = 4,
-    DMA_CHANNEL_5 = 5,
-    DMA_CHANNEL_6 = 6,
-    DMA_CHANNEL_7 = 7,
-} dma_channel_t;
-
-#define DMA_CHANNELS 7
-
-#define DMA_FLAG_FROM_PERIPH      (0 << 4)
-#define DMA_FLAG_FROM_MEM         (1 << 4)
-#define DMA_FLAG_PERIPH_INCREMENT (1 << 6)
-#define DMA_FLAG_MEM_INCREMENT    (1 << 7)
-#define DMA_FLAG_PERIPH_8_BIT     (0 << 8)
-#define DMA_FLAG_PERIPH_16_BIT    (1 << 8)
-#define DMA_FLAG_PERIPH_32_BIT    (2 << 8)
-#define DMA_FLAG_MEM_8_BIT        (0 << 10)
-#define DMA_FLAG_MEM_16_BIT       (1 << 10)
-#define DMA_FLAG_MEM_32_BIT       (2 << 10)
-#define DMA_FLAG_PRIORITY(x)      (((x) & 0x3) << 12)
-
-/**
- * dmi_init
- *
- * Initialize the DMA peripheral.
- */
-void dma_init(void);
-
-/**
- * dma_transfer_start
- *
- * Initiate a DMA transfer.
- *
- * @param[in] chan        DMA channel.
- * @param[in] periph_addr Address of the peripheral register for the transfer.
- * @param[in] mem_addr    Address of the memory of the transfer.
- * @param[in] count       Number of cycles to transfer.
- * @param[in] flags       Flags to control the transfer (see DMA_FLAG_*.)
- */
-
-void dma_transfer_start(dma_channel_t chan,
-                        uint32_t periph_addr,
-                        uint32_t mem_addr,
-                        uint16_t count,
-                        uint32_t flags);
-
-/**
- * dma_wait
- *
- * Wait for a DMA transaction to complete.
- * TODO(konkers): Add timeout support.
- * TODO(konkers): Add error reporting.
- *
- * @param[in] chan DMA channel.
- */
-void dma_wait(dma_channel_t chan);
-
-#endif  // __PLATFORM_STM32_DMA_H
diff --git a/platform/stm32f0xx/include/platform/gpio.h b/platform/stm32f0xx/include/platform/gpio.h
deleted file mode 100644
index a5d92c23..00000000
--- a/platform/stm32f0xx/include/platform/gpio.h
+++ /dev/null
@@ -1,26 +0,0 @@
-#ifndef __PLATFORM_STM32_GPIO_H
-#define __PLATFORM_STM32_GPIO_H
-
-/* helper defines for STM32 platforms */
-
-/* flag to gpio_configure */
-#define GPIO_STM32_AF (0x1 << 16)
-#define GPIO_STM32_OD (0x2 << 16)
-#define GPIO_STM32_AFn(n) ((n) << 24)
-
-/* gpio port/pin is packed into a single unsigned int in 16x:8port:8pin format */
-#define GPIO(port, pin) ((unsigned int)(((port) << 8) | (pin)))
-
-#define GPIO_PORT(gpio) (((gpio) >> 8) & 0xff)
-#define GPIO_PIN(gpio) ((gpio) & 0xff)
-#define GPIO_AFNUM(gpio) (((gpio) >> 24) & 0xf)
-
-#define GPIO_PORT_A 0
-#define GPIO_PORT_B 1
-#define GPIO_PORT_C 2
-#define GPIO_PORT_D 3
-#define GPIO_PORT_E 4
-#define GPIO_PORT_F 5
-
-#endif
-
diff --git a/platform/stm32f0xx/include/platform/platform_cm.h b/platform/stm32f0xx/include/platform/platform_cm.h
deleted file mode 100644
index 7e0f515f..00000000
--- a/platform/stm32f0xx/include/platform/platform_cm.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_CM_H
-#define __PLATFORM_CM_H
-
-#include <stm32f0xx.h>
-#define SVCall_IRQn SVC_IRQn
-
-#endif
-
diff --git a/platform/stm32f0xx/include/platform/rcc.h b/platform/stm32f0xx/include/platform/rcc.h
deleted file mode 100644
index 967020d5..00000000
--- a/platform/stm32f0xx/include/platform/rcc.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * Copyright (c) 2016 Erik Gilling
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_STM32_RCC_H
-#define __PLATFORM_STM32_RCC_H
-
-#include <stdbool.h>
-#include <stdint.h>
-#include <sys/types.h>
-
-#include <stm32f0xx.h>
-
-enum {
-    STM32_RCC_REG_AHB = 0,
-    STM32_RCC_REG_APB1 = 1,
-    STM32_RCC_REG_APB2 = 2,
-};
-
-#define STM32_RCC_CLK(reg, index)  (((reg) << 16) | (index))
-#define STM32_RCC_CLK_AHB(index)   STM32_RCC_CLK(STM32_RCC_REG_AHB, index)
-#define STM32_RCC_CLK_APB1(index)  STM32_RCC_CLK(STM32_RCC_REG_APB1, index)
-#define STM32_RCC_CLK_APB2(index)  STM32_RCC_CLK(STM32_RCC_REG_APB2, index)
-
-#define STM32_RCC_CLK_REG(clk) ((clk) >> 16)
-#define STM32_RCC_CLK_INDEX(clk) ((clk) & 0xffff)
-
-typedef enum {
-    // AHB clocks.
-    STM32_RCC_CLK_DMA =   STM32_RCC_CLK_AHB(0),
-    STM32_RCC_CLK_DMA2 =  STM32_RCC_CLK_AHB(1),
-    STM32_RCC_CLK_SRAM =  STM32_RCC_CLK_AHB(2),
-    STM32_RCC_CLK_FLITF = STM32_RCC_CLK_AHB(4),
-    STM32_RCC_CLK_CRC =   STM32_RCC_CLK_AHB(6),
-    STM32_RCC_CLK_IOPA =  STM32_RCC_CLK_AHB(17),
-    STM32_RCC_CLK_IOPB =  STM32_RCC_CLK_AHB(18),
-    STM32_RCC_CLK_IOPC =  STM32_RCC_CLK_AHB(19),
-    STM32_RCC_CLK_IOPD =  STM32_RCC_CLK_AHB(20),
-    STM32_RCC_CLK_IOPE =  STM32_RCC_CLK_AHB(21),
-    STM32_RCC_CLK_IOPF =  STM32_RCC_CLK_AHB(22),
-    STM32_RCC_CLK_TSC =   STM32_RCC_CLK_AHB(24),
-
-    // APB1 clocks.
-    STM32_RCC_CLK_TIM2 =   STM32_RCC_CLK_APB1(0),
-    STM32_RCC_CLK_TIM3 =   STM32_RCC_CLK_APB1(1),
-    STM32_RCC_CLK_TIM6 =   STM32_RCC_CLK_APB1(4),
-    STM32_RCC_CLK_TIM7 =   STM32_RCC_CLK_APB1(5),
-    STM32_RCC_CLK_TIM14 =  STM32_RCC_CLK_APB1(8),
-    STM32_RCC_CLK_WWDG =   STM32_RCC_CLK_APB1(11),
-    STM32_RCC_CLK_SPI2 =   STM32_RCC_CLK_APB1(14),
-    STM32_RCC_CLK_USART2 = STM32_RCC_CLK_APB1(17),
-    STM32_RCC_CLK_USART3 = STM32_RCC_CLK_APB1(18),
-    STM32_RCC_CLK_USART4 = STM32_RCC_CLK_APB1(19),
-    STM32_RCC_CLK_USART5 = STM32_RCC_CLK_APB1(20),
-    STM32_RCC_CLK_I2C1 =   STM32_RCC_CLK_APB1(21),
-    STM32_RCC_CLK_I2C2 =   STM32_RCC_CLK_APB1(22),
-    STM32_RCC_CLK_USB =    STM32_RCC_CLK_APB1(23),
-    STM32_RCC_CLK_CAN =    STM32_RCC_CLK_APB1(25),
-    STM32_RCC_CLK_CRS =    STM32_RCC_CLK_APB1(27),
-    STM32_RCC_CLK_PWR =    STM32_RCC_CLK_APB1(28),
-    STM32_RCC_CLK_DAC =    STM32_RCC_CLK_APB1(29),
-    STM32_RCC_CLK_CEC =    STM32_RCC_CLK_APB1(30),
-
-    // APB2 clocks.
-    STM32_RCC_CLK_SYSCFGCOMP = STM32_RCC_CLK_APB2(0),
-    STM32_RCC_CLK_USART6 =     STM32_RCC_CLK_APB2(5),
-    STM32_RCC_CLK_USART7 =     STM32_RCC_CLK_APB2(6),
-    STM32_RCC_CLK_USART8 =     STM32_RCC_CLK_APB2(7),
-    STM32_RCC_CLK_ADC =        STM32_RCC_CLK_APB2(9),
-    STM32_RCC_CLK_TIM1 =       STM32_RCC_CLK_APB2(11),
-    STM32_RCC_CLK_SPI1 =       STM32_RCC_CLK_APB2(12),
-    STM32_RCC_CLK_USART1 =     STM32_RCC_CLK_APB2(14),
-    STM32_RCC_CLK_TIM15 =      STM32_RCC_CLK_APB2(16),
-    STM32_RCC_CLK_TIM16 =      STM32_RCC_CLK_APB2(17),
-    STM32_RCC_CLK_TIM17 =      STM32_RCC_CLK_APB2(18),
-    STM32_RCC_CLK_DBG_MUC =    STM32_RCC_CLK_APB2(22),
-} stm32_rcc_clk_t;
-
-void stm32_rcc_set_enable(stm32_rcc_clk_t clock, bool enable);
-void stm32_rcc_set_reset(stm32_rcc_clk_t clock, bool reset);
-#endif  // __PLATFORM_STM32_RCC_H
diff --git a/platform/stm32f0xx/include/platform/spi.h b/platform/stm32f0xx/include/platform/spi.h
deleted file mode 100644
index 4187170b..00000000
--- a/platform/stm32f0xx/include/platform/spi.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/*
- * Copyright (c) 2016 Erik Gilling
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_STM32_SPI_H
-#define __PLATFORM_STM32_SPI_H
-
-#include <sys/types.h>
-
-#include <stm32f0xx.h>
-
-typedef enum {
-    SPI_PRESCALER_2 =   0 << 3,
-    SPI_PRESCALER_4 =   1 << 3,
-    SPI_PRESCALER_8 =   2 << 3,
-    SPI_PRESCALER_16 =  3 << 3,
-    SPI_PRESCALER_32 =  4 << 3,
-    SPI_PRESCALER_64 =  5 << 3,
-    SPI_PRESCALER_128 = 6 << 3,
-    SPI_PRESCALER_256 = 7 << 3,
-} spi_prescaler_t;
-
-#define SPI_DATA_SIZE(x) ((((x) - 1) & 0xf) << 8)
-typedef enum {
-    SPI_DATA_SIZE_4 = SPI_DATA_SIZE(4),
-    SPI_DATA_SIZE_5 = SPI_DATA_SIZE(5),
-    SPI_DATA_SIZE_6 = SPI_DATA_SIZE(6),
-    SPI_DATA_SIZE_7 = SPI_DATA_SIZE(7),
-    SPI_DATA_SIZE_8 = SPI_DATA_SIZE(8),
-    SPI_DATA_SIZE_9 = SPI_DATA_SIZE(9),
-    SPI_DATA_SIZE_10 = SPI_DATA_SIZE(10),
-    SPI_DATA_SIZE_11 = SPI_DATA_SIZE(11),
-    SPI_DATA_SIZE_12 = SPI_DATA_SIZE(12),
-    SPI_DATA_SIZE_13 = SPI_DATA_SIZE(13),
-    SPI_DATA_SIZE_14 = SPI_DATA_SIZE(14),
-    SPI_DATA_SIZE_15 = SPI_DATA_SIZE(15),
-    SPI_DATA_SIZE_16 = SPI_DATA_SIZE(16),
-} spi_data_size_t;
-
-typedef enum {
-    SPI_CPOL_LOW =  0x0,
-    SPI_CPOL_HIGH = SPI_CR1_CPOL,
-} spi_cpol_t;
-
-typedef enum {
-    SPI_CPHA_0 = 0x0,  // Data capture on first clock transition.
-    SPI_CPHA_1 = SPI_CR1_CPHA,  // Data capture on second clock transition.
-} spi_cpha_t;
-
-typedef enum {
-    SPI_BIT_ORDER_MSB = 0,
-    SPI_BIT_ORDER_LSB = SPI_CR1_LSBFIRST,
-} spi_bit_order_t;
-
-/**
- * spi_init
- *
- * Initialize the SPI peripheral.  NOTE: ONLY SPI1 IS SUPPORTED.
- *
- * @param[in] data_size Size of SPI frame.
- * @param[in] cpol      Clock polarity.
- * @param[in] cpha      Clock phase.
- * @param[in] bit_order Which order to transmit the bits on the data lines.
- * @param[in] prescaler Divides the main peripheral clock to generate SCK.
- */
-void spi_init(spi_data_size_t data_size,
-              spi_cpol_t cpol,
-              spi_cpha_t cpha,
-              spi_bit_order_t bit_order,
-              spi_prescaler_t prescaler);
-
-/**
- * spi_xfer
- *
- * Preform a SPI transfer.  Blocks until finished.
- * TODO(konkers): Support write-only and read-only transactions.
- * TODO(konkers): Add timeout support.
- * TODO(konkers): Report errors.
- *
- * @param[in] tx_buf Buffer to transmit.
- * @param[in] rx_buf Buffer to store received data.
- * @param[in] len    Number of SPI frames to transmit.
- *
- * @return Number of frames transmitted on success, negative error code on
- * failure.
- */
-ssize_t spi_xfer(const void *tx_buf, void *rx_buf, size_t len);
-
-#endif  // __PLATFORM_STM32_SPI_H
diff --git a/platform/stm32f0xx/include/platform/stm32.h b/platform/stm32f0xx/include/platform/stm32.h
deleted file mode 100644
index f3633664..00000000
--- a/platform/stm32f0xx/include/platform/stm32.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_STM32_H
-#define __PLATFORM_STM32_H
-
-void stm32_debug_early_init(void);
-void stm32_debug_init(void);
-void stm32_timer_early_init(void);
-void stm32_timer_init(void);
-void stm32_gpio_early_init(void);
-void stm32_flash_nor_early_init(void);
-void stm32_flash_nor_init(void);
-
-#endif
-
diff --git a/platform/stm32f0xx/include/platform/usbc.h b/platform/stm32f0xx/include/platform/usbc.h
deleted file mode 100644
index 8f68622f..00000000
--- a/platform/stm32f0xx/include/platform/usbc.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#ifndef __PLATFORM_STM32_USB_H
-#define __PLATFORM_STM32_USB_H
-
-typedef enum {
-    STM32_USB_CLK_PLL = 0,
-    STM32_USB_CLK_HSI48 = 1,
-} stm32_usb_clk_t;
-
-void stm32_usbc_early_init(stm32_usb_clk_t clock_source);
-void stm32_usbc_init(void);
-
-#endif // __PLATFORM_STM32_USB_H
diff --git a/platform/stm32f0xx/init.c b/platform/stm32f0xx/init.c
deleted file mode 100644
index 5042eaa0..00000000
--- a/platform/stm32f0xx/init.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (c) 2012-2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <debug.h>
-#include <dev/uart.h>
-#include <platform.h>
-#include <platform/stm32.h>
-#include <platform/dma.h>
-#include <arch/arm/cm.h>
-#include "system_stm32f0xx.h"
-
-void platform_early_init(void)
-{
-    // Crank up the clock before initing timers.
-    SystemInit();
-
-    // start the systick timer
-    // TODO(konkers): get sysclk freq from somewhere.
-    arm_cm_systick_init(48000000);
-
-    stm32_timer_early_init();
-    stm32_gpio_early_init();
-}
-
-void platform_init(void)
-{
-    dma_init();
-    stm32_timer_init();
-}
diff --git a/platform/stm32f0xx/rcc.c b/platform/stm32f0xx/rcc.c
deleted file mode 100644
index 96cc628c..00000000
--- a/platform/stm32f0xx/rcc.c
+++ /dev/null
@@ -1,68 +0,0 @@
-
-#include "platform/rcc.h"
-
-#include <stm32f0xx.h>
-
-static __IO uint32_t *stm32_rcc_get_clock_en_reg(stm32_rcc_clk_t clock) {
-    switch (STM32_RCC_CLK_REG(clock)) {
-        case STM32_RCC_REG_AHB:
-            return &RCC->AHBENR;
-
-        case STM32_RCC_REG_APB1:
-            return &RCC->APB1ENR;
-
-        case STM32_RCC_REG_APB2:
-            return &RCC->APB2ENR;
-
-        default:
-            return NULL;
-    }
-}
-
-static __IO uint32_t *stm32_rcc_get_clock_rst_reg(stm32_rcc_clk_t clock) {
-    switch (STM32_RCC_CLK_REG(clock)) {
-        case STM32_RCC_REG_AHB:
-            return &RCC->AHBRSTR;
-
-        case STM32_RCC_REG_APB1:
-            return &RCC->APB1RSTR;
-
-        case STM32_RCC_REG_APB2:
-            return &RCC->APB2RSTR;
-
-        default:
-            return NULL;
-    }
-}
-
-void stm32_rcc_set_enable(stm32_rcc_clk_t clock, bool enable) {
-    __IO uint32_t *reg = stm32_rcc_get_clock_en_reg(clock);
-    if (enable) {
-        *reg |= 1 << STM32_RCC_CLK_INDEX(clock);
-    } else {
-        *reg &= ~(1 << STM32_RCC_CLK_INDEX(clock));
-    }
-}
-
-void stm32_rcc_set_reset(stm32_rcc_clk_t clock, bool reset) {
-    switch(clock) {
-        // These clocks to not have reset bits.
-        case STM32_RCC_CLK_DMA:
-        case STM32_RCC_CLK_DMA2:
-        case STM32_RCC_CLK_SRAM:
-        case STM32_RCC_CLK_FLITF:
-        case STM32_RCC_CLK_CRC:
-            return;
-
-        default:
-            break;
-    }
-
-    __IO uint32_t *reg = stm32_rcc_get_clock_rst_reg(clock);
-    if (reset) {
-        *reg |= 1 << STM32_RCC_CLK_INDEX(clock);
-    } else {
-        *reg &= ~(1 << STM32_RCC_CLK_INDEX(clock));
-    }
-}
-
diff --git a/platform/stm32f0xx/rules.mk b/platform/stm32f0xx/rules.mk
deleted file mode 100644
index 49e0bb52..00000000
--- a/platform/stm32f0xx/rules.mk
+++ /dev/null
@@ -1,56 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-# ROMBASE, MEMBASE, and MEMSIZE are required for the linker script
-ROMBASE := 0x08000000
-MEMBASE := 0x20000000
-# can be overridden by target
-
-ARCH := arm
-ARM_CPU := cortex-m0
-
-ifeq ($(STM32_CHIP),stm32f072_x8)
-GLOBAL_DEFINES += \
-        STM32F072
-MEMSIZE ?= 16384
-endif
-ifeq ($(STM32_CHIP),stm32f072_xB)
-GLOBAL_DEFINES += \
-        STM32F072
-MEMSIZE ?= 16384
-endif
-
-GLOBAL_DEFINES += \
-	USE_STDPERIPH_DRIVER \
-	MEMSIZE=$(MEMSIZE)
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/can.c \
-	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/dma.c \
-	$(LOCAL_DIR)/gpio.c \
-	$(LOCAL_DIR)/init.c \
-	$(LOCAL_DIR)/rcc.c \
-	$(LOCAL_DIR)/spi.c \
-	$(LOCAL_DIR)/timer.c \
-	$(LOCAL_DIR)/uart.c \
-	$(LOCAL_DIR)/usbc.c \
-	$(LOCAL_DIR)/vectab.c
-
-# use a two segment memory layout, where all of the read-only sections 
-# of the binary reside in rom, and the read/write are in memory. The 
-# ROMBASE, MEMBASE, and MEMSIZE make variables are required to be set 
-# for the linker script to be generated properly.
-#
-LINKER_SCRIPT += \
-	$(BUILDDIR)/system-twosegment.ld
-
-MODULE_DEPS += \
-	platform/stm32f0xx/CMSIS \
-	platform/stm32f0xx/STM32F0xx_HAL_Driver \
-	arch/arm/arm-m/systick \
-	dev/usb \
-	lib/cbuf
-
-include make/module.mk
diff --git a/platform/stm32f0xx/spi.c b/platform/stm32f0xx/spi.c
deleted file mode 100644
index df04e1fa..00000000
--- a/platform/stm32f0xx/spi.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- * Copyright (c) 2016 Erik Gilling
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <platform/spi.h>
-
-#include <stdbool.h>
-
-#include <arch/arm/cm.h>
-#include <kernel/event.h>
-#include <kernel/mutex.h>
-#include <platform/dma.h>
-#include <platform/rcc.h>
-
-#define SPI_SR_FRLVL_VAL(reg)  ((reg) >> 9 & 0x3)
-#define SPI_SR_FTLVL_VAL(reg)  ((reg) >> 11 & 0x3)
-
-#define SPI_FIFO_EMPTY   0x0
-#define SPI_FIFO_QUARTER 0x1
-#define SPI_FIFO_HALF    0x2
-#define SPI_FIFO_FULL    0x3
-
-typedef SPI_TypeDef spi_regs_t;
-
-uint32_t spi_dma_width_flag;
-mutex_t spi_mutex;
-
-void spi_init(spi_data_size_t data_size,
-              spi_cpol_t cpol,
-              spi_cpha_t cpha,
-              spi_bit_order_t bit_order,
-              spi_prescaler_t prescaler)
-{
-
-    spi_regs_t *regs = SPI1;
-    uint16_t temp_reg;
-
-    mutex_init(&spi_mutex);
-
-    stm32_rcc_set_enable(STM32_RCC_CLK_SPI1, true);
-
-    regs->CR1 = cpol | cpha | bit_order | prescaler | SPI_CR1_SSM;
-
-    temp_reg = regs->CR2;
-    temp_reg &= ~(SPI_CR2_DS | SPI_CR2_FRXTH);
-    temp_reg |= data_size;
-    if (data_size < SPI_DATA_SIZE_9) {
-        // RXNE asserted when fifo has at least 8 bits.  Defaults to 16bits.
-        temp_reg |= SPI_CR2_FRXTH;
-        spi_dma_width_flag = DMA_FLAG_PERIPH_8_BIT | DMA_FLAG_MEM_8_BIT;
-    } else {
-        spi_dma_width_flag = DMA_FLAG_PERIPH_16_BIT | DMA_FLAG_MEM_16_BIT;
-    }
-    regs->CR2 = temp_reg;
-
-    temp_reg = regs->CR1;
-    temp_reg |= SPI_CR1_MSTR | SPI_CR1_SSI;
-    regs->CR1 = temp_reg;
-}
-
-ssize_t spi_xfer(const void *tx_buf, void *rx_buf, size_t len)
-{
-    // Assure only a single transaction is ever active.
-    mutex_acquire(&spi_mutex);
-
-    // Ensure we're idle before starting.
-    dma_wait(DMA_CHANNEL_2);
-    dma_wait(DMA_CHANNEL_3);
-
-    spi_regs_t *regs = SPI1;
-    regs->CR1 &= ~SPI_CR1_SPE;
-
-    // Make sure to start read DMA first.
-    dma_transfer_start(DMA_CHANNEL_2,
-                       (uint32_t)&regs->DR, (uint32_t)rx_buf, len,
-                       DMA_FLAG_FROM_PERIPH | DMA_FLAG_MEM_INCREMENT
-                       | DMA_FLAG_PRIORITY(1) | spi_dma_width_flag);
-    dma_transfer_start(DMA_CHANNEL_3,
-                       (uint32_t)&regs->DR, (uint32_t)tx_buf, len,
-                       DMA_FLAG_FROM_MEM | DMA_FLAG_MEM_INCREMENT
-                       | DMA_FLAG_PRIORITY(0) | spi_dma_width_flag);
-    regs->CR2 |= SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN;
-    regs->CR1 |= SPI_CR1_SPE;
-
-    // We only wait for channel 2 (RX) assuming that TX will be done first.
-    dma_wait(DMA_CHANNEL_2);
-
-    mutex_release(&spi_mutex);
-    return len;
-}
-
diff --git a/platform/stm32f0xx/timer.c b/platform/stm32f0xx/timer.c
deleted file mode 100644
index b6f526d1..00000000
--- a/platform/stm32f0xx/timer.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <trace.h>
-#include <err.h>
-#include <sys/types.h>
-#include <kernel/thread.h>
-#include <platform.h>
-#include <platform/timer.h>
-#include <arch/arm/cm.h>
-
-#define LOCAL_TRACE 0
-
-#define TIME_BASE_COUNT 0xffff
-#define TICK_RATE 1000000
-
-static void stm32_tim_irq(uint num)
-{
-    TRACEF("tim irq %d\n", num);
-    PANIC_UNIMPLEMENTED;
-}
-
-void stm32_TIM3_IRQ(void)
-{
-    stm32_tim_irq(3);
-}
-
-void stm32_TIM4_IRQ(void)
-{
-    stm32_tim_irq(4);
-}
-
-void stm32_TIM5_IRQ(void)
-{
-    stm32_tim_irq(5);
-}
-
-void stm32_TIM6_IRQ(void)
-{
-    stm32_tim_irq(6);
-}
-
-void stm32_TIM7_IRQ(void)
-{
-    stm32_tim_irq(7);
-}
-
-/* time base */
-void stm32_TIM2_IRQ(void)
-{
-    stm32_tim_irq(2);
-}
-
-void stm32_timer_early_init(void)
-{
-}
-
-void stm32_timer_init(void)
-{
-}
diff --git a/platform/stm32f0xx/uart.c b/platform/stm32f0xx/uart.c
deleted file mode 100644
index 24ee359d..00000000
--- a/platform/stm32f0xx/uart.c
+++ /dev/null
@@ -1,271 +0,0 @@
-/*
- * Copyright (c) 2012 Kent Ryhorchuk
- * Copyright (c) 2016 Erik Gilling
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <arch/arm/cm.h>
-#include <assert.h>
-#include <dev/uart.h>
-#include <lib/cbuf.h>
-#include <platform/rcc.h>
-#include <stdint.h>
-#include <stm32f0xx.h>
-
-typedef USART_TypeDef stm32_usart_t;
-
-#define RXBUF_SIZE 16
-
-#ifdef ENABLE_UART1
-cbuf_t uart1_rx_buf;
-#ifndef UART1_FLOWCONTROL
-#define UART1_FLOWCONTROL 0x0
-#endif
-#endif
-
-#ifdef ENABLE_UART2
-cbuf_t uart2_rx_buf;
-#ifndef UART2_FLOWCONTROL
-#define UART2_FLOWCONTROL 0x0
-#endif
-#endif
-
-#ifdef ENABLE_UART3
-cbuf_t uart3_rx_buf;
-#ifndef UART3_FLOWCONTROL
-#define UART3_FLOWCONTROL 0x0
-#endif
-#endif
-
-#ifdef ENABLE_UART1
-#endif
-#ifdef ENABLE_UART2
-#endif
-#ifdef ENABLE_UART3
-#endif
-
-static void stm32_usart_init1_early(stm32_usart_t *usart,
-                                    uint16_t flow_control, int irqn)
-{
-    uint32_t baud_rate = 115200;
-
-    // Ensure USART is disabled before configuring it.
-    usart->CR1 = 0;
-
-    // Set stop bits to 1 (CR2[13:12] = 00b)
-    usart->CR2 = 0;
-
-
-    // Go with the defaults of:
-    //   word length: 8 bits
-    //   parity: disabled
-    // Enable TX and RX.
-    usart->CR1 = USART_CR1_TE | USART_CR1_RE;
-
-    usart->CR3 = flow_control;
-
-    // TODO(konkers): Add rcc API for querying clock freq.
-    uint32_t apb_clock = 48000000;
-
-    usart->BRR = (apb_clock + baud_rate / 2) / baud_rate;
-
-    // Leave IRQs disabled until init.
-    NVIC_DisableIRQ(irqn);
-
-    // Enable UART.
-    usart->CR1 |= USART_CR1_UE;
-}
-
-static void stm32_usart_init1(stm32_usart_t *usart, int irqn, cbuf_t *rxbuf)
-{
-    cbuf_initialize(rxbuf, RXBUF_SIZE);
-    // Enable RX not empty interrupt.
-    usart->CR1 |= USART_CR1_RXNEIE;
-    NVIC_EnableIRQ(irqn);
-}
-
-void uart_init_early(void)
-{
-#ifdef ENABLE_UART1
-    stm32_rcc_set_enable(STM32_RCC_CLK_USART1, true);
-#endif
-#ifdef ENABLE_UART2
-    stm32_rcc_set_enable(STM32_RCC_CLK_USART2, true);
-#endif
-#ifdef ENABLE_UART3
-    stm32_rcc_set_enable(STM32_RCC_CLK_USART3, true);
-#endif
-
-#ifdef ENABLE_UART1
-    stm32_usart_init1_early(USART1, UART1_FLOWCONTROL, USART1_IRQn);
-#endif
-#ifdef ENABLE_UART2
-    stm32_usart_init1_early(USART2, UART2_FLOWCONTROL, USART2_IRQn);
-#endif
-#ifdef ENABLE_UART3
-    stm32_usart_init1_early(USART3, UART3_FLOWCONTROL, USART3_IRQn);
-#endif
-}
-
-void uart_init(void)
-{
-#ifdef ENABLE_UART1
-    stm32_usart_init1(USART1, USART1_IRQn, &uart1_rx_buf);
-#endif
-#ifdef ENABLE_UART2
-    stm32_usart_init1(USART2, USART2_IRQn, &uart2_rx_buf);
-#endif
-#ifdef ENABLE_UART3
-    stm32_usart_init1(USART3, USART3_IRQn, &uart3_rx_buf);
-#endif
-}
-
-// I'm seeing a weird issue with my nucleo-f072rb board where rx interrupts
-// don't fire right after a reset by the on board programmer.  If I hit
-// the reset button, rx works fine.  I can live with this. YMMV.
-static void stm32_uart_rx_irq(stm32_usart_t *usart, cbuf_t *rxbuf)
-{
-    arm_cm_irq_entry();
-
-    bool resched = false;
-    while (usart->ISR & USART_ISR_RXNE) {
-        if (!cbuf_space_avail(rxbuf)) {
-            // Overflow - let flow control do its thing by not
-            // reading the from the FIFO.
-            usart->CR1 &= ~USART_CR1_RXNEIE;
-            break;
-        }
-
-        char c = usart->RDR;
-        cbuf_write_char(rxbuf, c, false);
-        resched = true;
-    }
-
-    arm_cm_irq_exit(resched);
-}
-
-#ifdef ENABLE_UART1
-void stm32_USART1_IRQ(void)
-{
-    stm32_uart_rx_irq(USART1, &uart1_rx_buf);
-}
-#endif
-
-#ifdef ENABLE_UART2
-void stm32_USART2_IRQ(void)
-{
-    stm32_uart_rx_irq(USART2, &uart2_rx_buf);
-}
-#endif
-
-#ifdef ENABLE_UART3
-void stm32_USART3_IRQ(void)
-{
-    stm32_uart_rx_irq(USART3, &uart3_rx_buf);
-}
-#endif
-
-
-static void stm32_usart_putc(stm32_usart_t *usart, char c)
-{
-    while ((usart->ISR & USART_ISR_TXE) == 0);
-    usart->TDR = c;
-    while ((usart->ISR & USART_ISR_TC) == 0);
-}
-
-static int stm32_usart_getc(stm32_usart_t *usart, cbuf_t *rxbuf, bool wait)
-{
-    char c;
-    cbuf_read_char(rxbuf, &c, wait);
-    if (cbuf_space_avail(rxbuf) > RXBUF_SIZE/2)
-        usart->CR1 |= USART_CR1_RXNEIE;
-
-    return c;
-}
-
-static stm32_usart_t *stm32_get_usart(int port)
-{
-    switch (port) {
-#ifdef ENABLE_UART1
-        case 1:
-            return USART1;
-#endif
-#ifdef ENABLE_UART2
-        case 2:
-            return USART2;
-#endif
-#ifdef ENABLE_UART3
-        case 3:
-            return USART3;
-#endif
-        default:
-            ASSERT(false);
-            return 0;
-    }
-
-}
-
-static cbuf_t *stm32_get_rxbuf(int port)
-{
-    switch (port) {
-#ifdef ENABLE_UART1
-        case 1:
-            return &uart1_rx_buf;
-#endif
-#ifdef ENABLE_UART2
-        case 2:
-            return &uart2_rx_buf;
-#endif
-#ifdef ENABLE_UART3
-        case 3:
-            return &uart3_rx_buf;
-#endif
-        default:
-            ASSERT(false);
-            return 0;
-    }
-
-}
-
-int uart_putc(int port, char c)
-{
-    stm32_usart_t *usart = stm32_get_usart(port);
-    stm32_usart_putc(usart, c);
-    return 1;
-}
-
-int uart_getc(int port, bool wait)
-{
-    cbuf_t *rxbuf = stm32_get_rxbuf(port);
-    stm32_usart_t *usart = stm32_get_usart(port);
-
-    return stm32_usart_getc(usart, rxbuf, wait);
-}
-
-void uart_flush_tx(int port) {}
-
-void uart_flush_rx(int port) {}
-
-void uart_init_port(int port, uint baud)
-{
-    // TODO - later
-    PANIC_UNIMPLEMENTED;
-}
diff --git a/platform/stm32f0xx/usbc.c b/platform/stm32f0xx/usbc.c
deleted file mode 100644
index 4fe68147..00000000
--- a/platform/stm32f0xx/usbc.c
+++ /dev/null
@@ -1,357 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- * Copyright (c) 2015 Erik Gilling
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <trace.h>
-#include <debug.h>
-#include <stdbool.h>
-#include <string.h>
-#include <stdlib.h>
-#include <assert.h>
-#include <err.h>
-#include <dev/usb.h>
-#include <dev/usbc.h>
-#include <arch/arm/cm.h>
-#include <platform/rcc.h>
-#include <platform/stm32.h>
-#include <platform/usbc.h>
-
-#include <stm32f0xx_hal_pcd.h>
-
-#define LOCAL_TRACE 0
-
-#define NUM_EP 5
-
-// This driver is a shim between the LK usbc api and the STMico Cube api.
-// Ideally this would be a full native driver.  Given how long it took to
-// debug this one, I don't have the patience to make it native.
-
-struct ep_status {
-    bool ack_ep0_in;
-    usbc_transfer_t *transfer;
-};
-
-static struct {
-    bool do_resched;
-
-    struct ep_status ep_in[NUM_EP];
-    struct ep_status ep_out[NUM_EP];
-
-    uint32_t pma_highwater;
-
-    PCD_HandleTypeDef handle;
-} usbc;
-
-uint32_t stm32_usbc_pma_alloc(uint32_t size) {
-    // TODO(konkers): Fail on OOM
-    uint32_t addr = usbc.pma_highwater;
-    usbc.pma_highwater += size;
-    return addr;
-}
-
-void stm32_usbc_early_init(stm32_usb_clk_t clock_source)
-{
-    // TODO(konkers): add usb clock source to rcc.
-#if 0
-    if (clock_source == STM32_USB_CLK_HSI48) {
-        RCC_USBCLKConfig(RCC_USBCLK_HSI48);
-    } else {
-        RCC_USBCLKConfig(RCC_USBCLK_PLLCLK);
-    }
-    RCC_APB1PeriphClockCmd(RCC_APB1Periph_USB, ENABLE);
-#endif
-}
-
-void stm32_usbc_init(void)
-{
-    LTRACE_ENTRY;
-
-    usbc.pma_highwater = 0x40;
-
-    // Set LL Driver parameters
-    usbc.handle.Instance = USB;
-    usbc.handle.Init.dev_endpoints = 4;
-    usbc.handle.Init.ep0_mps = 0x40;
-    usbc.handle.Init.phy_itface = PCD_PHY_EMBEDDED;
-    usbc.handle.Init.speed = PCD_SPEED_FULL;
-    usbc.handle.Init.low_power_enable = 0;
-    usbc.handle.Init.lpm_enable = 0;
-    usbc.handle.Init.battery_charging_enable = 0;
-
-    // Initialize LL Driver
-    HAL_PCD_Init(&usbc.handle);
-
-    HAL_PCDEx_PMAConfig(&usbc.handle, 0x00, PCD_SNG_BUF,
-                        stm32_usbc_pma_alloc(0x40));
-    HAL_PCDEx_PMAConfig(&usbc.handle, 0x80, PCD_SNG_BUF,
-                        stm32_usbc_pma_alloc(0x40));
-
-}
-
-void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd)
-{
-    LTRACE_ENTRY;
-    // Enable USB FS Clock
-    stm32_rcc_set_enable(STM32_RCC_CLK_USB, true);
-    NVIC_EnableIRQ(USB_IRQn);
-}
-
-void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
-{
-    LTRACEF("epnum %u\n", epnum);
-
-    if (epnum == 0) {
-        usbc_ep0_ack();
-    } else if (usbc.ep_out[epnum].transfer) {
-        // completing a transfer
-        usbc_transfer_t *t = usbc.ep_out[epnum].transfer;
-        usbc.ep_out[epnum].transfer = NULL;
-
-        LTRACEF("completing transfer %p\n", t);
-
-        PCD_EPTypeDef *ep = &hpcd->OUT_ep[epnum];
-        t->bufpos = ep->xfer_count;
-        t->result = 0;
-        t->callback(epnum, t);
-        usbc.do_resched = true;
-    }
-}
-
-void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
-{
-    PCD_EPTypeDef *ep = &hpcd->IN_ep[epnum];
-    LTRACEF("epnum %u, xfer count %u len %u\n", epnum, ep->xfer_count, ep->xfer_len);
-
-    if (epnum == 0) {
-        // TODO(konkers): implement multi packet.
-        struct ep_status *ep = &usbc.ep_in[0];
-        if (ep->ack_ep0_in) {
-            // in transfer done, ready for receive status
-            HAL_PCD_EP_Receive(&usbc.handle, 0, 0, 0);
-        }
-    } else {
-        // in transfer done
-        if (usbc.ep_in[epnum].transfer) {
-            // completing a transfer
-            usbc_transfer_t *t = usbc.ep_in[epnum].transfer;
-            usbc.ep_in[epnum].transfer = NULL;
-
-            LTRACEF("completing transfer %p\n", t);
-
-            PCD_EPTypeDef *ep = &hpcd->IN_ep[epnum];
-            t->bufpos = ep->xfer_count;
-            t->result = 0;
-            t->callback(epnum, t);
-            usbc.do_resched = true;
-        }
-    }
-}
-
-void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
-{
-    //LTRACE_ENTRY;
-
-    union usb_callback_args args;
-    args.setup = (struct usb_setup *)hpcd->Setup;
-
-    usbc_callback(USB_CB_SETUP_MSG, &args);
-    usbc.do_resched = true;
-}
-
-void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
-{
-    //LTRACE_ENTRY;
-}
-
-void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
-{
-    LTRACE_ENTRY;
-
-
-    /* fail all the outstanding transactions */
-    for (uint i = 0; i < NUM_EP; i++) {
-        if (usbc.ep_in[i].transfer) {
-            usbc_transfer_t *t = usbc.ep_in[i].transfer;
-            usbc.ep_in[i].transfer = NULL;
-            t->result = ERR_CANCELLED;
-            t->callback(i, t);
-        }
-        if (usbc.ep_out[i].transfer) {
-            usbc_transfer_t *t = usbc.ep_out[i].transfer;
-            usbc.ep_out[i].transfer = NULL;
-            t->result = ERR_CANCELLED;
-            t->callback(i, t);
-        }
-    }
-
-    HAL_PCD_EP_Open(&usbc.handle, 0, 0x40, PCD_EP_TYPE_CTRL);
-    HAL_PCD_EP_Open(&usbc.handle, 0x80, 0x40, PCD_EP_TYPE_CTRL);
-
-    usbc_callback(USB_CB_RESET, NULL);
-    usbc.do_resched = true;
-}
-
-void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
-{
-    LTRACE_ENTRY;
-    usbc_callback(USB_CB_SUSPEND, NULL);
-}
-
-void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
-{
-    LTRACE_ENTRY;
-    usbc_callback(USB_CB_RESUME, NULL);
-}
-
-void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
-{
-    LTRACEF("epnum %u\n", epnum);
-}
-
-void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
-{
-    LTRACEF("epnum %u\n", epnum);
-}
-
-void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
-{
-    LTRACE_ENTRY;
-}
-
-void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
-{
-    LTRACE_ENTRY;
-}
-
-status_t usbc_set_active(bool active)
-{
-    LTRACEF("active %u\n", active);
-
-    if (active) {
-        HAL_PCD_Start(&usbc.handle);
-    } else {
-        HAL_PCD_Stop(&usbc.handle);
-    }
-
-    return NO_ERROR;
-}
-
-void usbc_set_address(uint8_t address)
-{
-    LTRACEF("address %u\n", address);
-    HAL_PCD_SetAddress(&usbc.handle, address);
-}
-
-void usbc_ep0_ack(void)
-{
-    LTRACE;
-
-    struct ep_status *ep = &usbc.ep_in[0];
-    ep->ack_ep0_in = false;
-    HAL_PCD_EP_Transmit(&usbc.handle, 0, 0, 0);
-}
-
-void usbc_ep0_stall(void)
-{
-    LTRACE;
-
-    HAL_PCD_EP_SetStall(&usbc.handle, 0x80);
-}
-
-void usbc_ep0_send(const void *buf, size_t len, size_t maxlen)
-{
-    LTRACEF("buf %p, len %zu, maxlen %zu\n", buf, len, maxlen);
-
-    struct ep_status *ep = &usbc.ep_in[0];
-    ep->ack_ep0_in = true;
-    HAL_PCD_EP_Transmit(&usbc.handle, 0, (void *)buf, MIN(len, maxlen));
-}
-
-void usbc_ep0_recv(void *buf, size_t len, ep_callback cb)
-{
-    PANIC_UNIMPLEMENTED;
-}
-
-status_t usbc_setup_endpoint(ep_t ep, ep_dir_t dir, uint width, ep_type_t type)
-{
-    LTRACEF("ep %u dir %u width %u\n", ep, dir, width);
-
-    DEBUG_ASSERT(ep <= NUM_EP);
-    // PCD_EP_TYPE* and USB_* have the same values.  Let's make sure that
-    // doesn't change.
-    DEBUG_ASSERT(PCD_EP_TYPE_CTRL == USB_CTRL);
-    DEBUG_ASSERT(PCD_EP_TYPE_ISOC == USB_ISOC);
-    DEBUG_ASSERT(PCD_EP_TYPE_BULK == USB_BULK);
-    DEBUG_ASSERT(PCD_EP_TYPE_INTR == USB_INTR);
-
-    uint8_t ep_addr = ep | ((dir == USB_IN) ? 0x80 : 0);
-
-    HAL_PCDEx_PMAConfig(&usbc.handle, ep_addr, PCD_SNG_BUF,
-                        stm32_usbc_pma_alloc(width));
-
-    HAL_StatusTypeDef ret = HAL_PCD_EP_Open(&usbc.handle, ep_addr, width, type);
-
-    return (ret == HAL_OK) ? NO_ERROR : ERR_GENERIC;
-}
-
-bool usbc_is_highspeed(void)
-{
-    return false;
-}
-
-status_t usbc_queue_rx(ep_t ep, usbc_transfer_t *transfer)
-{
-    LTRACEF("ep %u, transfer %p (buf %p, buflen %zu)\n", ep, transfer, transfer->buf, transfer->buflen);
-
-    DEBUG_ASSERT(ep <= NUM_EP);
-    DEBUG_ASSERT(usbc.ep_out[ep].transfer == NULL);
-
-    usbc.ep_out[ep].transfer = transfer;
-    HAL_PCD_EP_Receive(&usbc.handle, ep, transfer->buf, transfer->buflen);
-
-    return NO_ERROR;
-}
-
-status_t usbc_queue_tx(ep_t ep, usbc_transfer_t *transfer)
-{
-    LTRACEF("ep %u, transfer %p (buf %p, buflen %zu)\n", ep, transfer, transfer->buf, transfer->buflen);
-
-    DEBUG_ASSERT(ep <= NUM_EP);
-    DEBUG_ASSERT(usbc.ep_in[ep].transfer == NULL);
-
-    usbc.ep_in[ep].transfer = transfer;
-    HAL_PCD_EP_Transmit(&usbc.handle, ep, transfer->buf, transfer->buflen);
-
-    return NO_ERROR;
-}
-
-void stm32_USB_IRQ(void)
-{
-    arm_cm_irq_entry();
-    //LTRACE_ENTRY;
-
-    usbc.do_resched = false;
-    HAL_PCD_IRQHandler(&usbc.handle);
-
-    arm_cm_irq_exit(usbc.do_resched);
-}
diff --git a/platform/stm32f0xx/vectab.c b/platform/stm32f0xx/vectab.c
deleted file mode 100644
index 550800ab..00000000
--- a/platform/stm32f0xx/vectab.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <compiler.h>
-#include <stm32f0xx.h>
-#include <arch/arm/cm.h>
-#include <platform/stm32.h>
-#include <target/debugconfig.h>
-#include <lib/cbuf.h>
-
-/* un-overridden irq handler */
-void stm32_dummy_irq(void)
-{
-    arm_cm_irq_entry();
-
-    panic("unhandled irq\n");
-}
-
-/* a list of default handlers that are simply aliases to the dummy handler */
-#define DEFAULT_HANDLER(x) \
-void stm32_##x(void) __WEAK_ALIAS("stm32_dummy_irq");
-
-DEFAULT_HANDLER(WWDG_IRQ)
-DEFAULT_HANDLER(PVD_IRQ)
-DEFAULT_HANDLER(RTC_IRQ)
-DEFAULT_HANDLER(FLASH_IRQ)
-DEFAULT_HANDLER(RCC_IRQ)
-DEFAULT_HANDLER(EXTI0_1_IRQ)
-DEFAULT_HANDLER(EXTI2_3_IRQ)
-DEFAULT_HANDLER(EXTI4_15_IRQ)
-DEFAULT_HANDLER(TSC_IRQ)
-DEFAULT_HANDLER(DMA1_Channel1_IRQ)
-DEFAULT_HANDLER(DMA1_Channel2_3_IRQ)
-DEFAULT_HANDLER(DMA1_Channel4_5_6_7_IRQ)
-DEFAULT_HANDLER(ADC1_COMP_IRQ)
-DEFAULT_HANDLER(TIM1_BRK_UP_TRG_COM_IRQ)
-DEFAULT_HANDLER(TIM1_CC_IRQ)
-DEFAULT_HANDLER(TIM2_IRQ)
-DEFAULT_HANDLER(TIM3_IRQ)
-DEFAULT_HANDLER(TIM6_DAC_IRQ)
-DEFAULT_HANDLER(TIM7_IRQ)
-DEFAULT_HANDLER(TIM14_IRQ)
-DEFAULT_HANDLER(TIM15_IRQ)
-DEFAULT_HANDLER(TIM16_IRQ)
-DEFAULT_HANDLER(TIM17_IRQ)
-DEFAULT_HANDLER(I2C1_IRQ)
-DEFAULT_HANDLER(I2C2_IRQ)
-DEFAULT_HANDLER(SPI1_IRQ)
-DEFAULT_HANDLER(SPI2_IRQ)
-DEFAULT_HANDLER(USART1_IRQ)
-DEFAULT_HANDLER(USART2_IRQ)
-DEFAULT_HANDLER(USART3_4_IRQ)
-DEFAULT_HANDLER(CEC_CAN_IRQ)
-DEFAULT_HANDLER(USB_IRQ)
-
-#define VECTAB_ENTRY(x) [x##n] = stm32_##x
-
-/* appended to the end of the main vector table */
-const void *const __SECTION(".text.boot.vectab2") vectab2[] = {
-    VECTAB_ENTRY(WWDG_IRQ),                 // Window WatchDog Interrupt
-    VECTAB_ENTRY(PVD_IRQ),                  // PVD through EXTI Line detect Interrupt
-    VECTAB_ENTRY(RTC_IRQ),              // RTC through EXTI Line Interrupt
-    VECTAB_ENTRY(FLASH_IRQ),            // FLASH Interrupt
-    VECTAB_ENTRY(RCC_IRQ),                  // RCC Interrupt
-    VECTAB_ENTRY(EXTI0_1_IRQ),          // EXTI Line 0 and 1 Interrupts
-    VECTAB_ENTRY(EXTI2_3_IRQ),          // EXTI Line 2 and 3 Interrupts
-    VECTAB_ENTRY(EXTI4_15_IRQ),         // EXTI Line 4 to 15 Interrupts
-    VECTAB_ENTRY(TSC_IRQ),                   // Touch sense controller Interrupt
-    VECTAB_ENTRY(DMA1_Channel1_IRQ),    // DMA1 Channel 1 Interrupt
-    VECTAB_ENTRY(DMA1_Channel2_3_IRQ),  // DMA1 Channel 2 and Channel 3 Interrupts
-    VECTAB_ENTRY(DMA1_Channel4_5_6_7_IRQ),  // DMA1 Channels 4-7 Interrupts
-    VECTAB_ENTRY(ADC1_COMP_IRQ),            // ADC1, COMP1 and COMP2 Interrupts
-    VECTAB_ENTRY(TIM1_BRK_UP_TRG_COM_IRQ),  // TIM1 Break, Update, Trigger and Commutation Interrupts
-    VECTAB_ENTRY(TIM1_CC_IRQ),          // TIM1 Capture Compare Interrupt
-    VECTAB_ENTRY(TIM2_IRQ),                 // TIM2 Interrupt
-    VECTAB_ENTRY(TIM3_IRQ),                 // TIM3 Interrupt
-    VECTAB_ENTRY(TIM6_DAC_IRQ),         // TIM6 and DAC Interrupts
-    VECTAB_ENTRY(TIM7_IRQ),                 // TIM7 Interrupts
-    VECTAB_ENTRY(TIM14_IRQ),            // TIM14 Interrupt
-    VECTAB_ENTRY(TIM15_IRQ),            // TIM15 Interrupt
-    VECTAB_ENTRY(TIM16_IRQ),            // TIM16 Interrupt
-    VECTAB_ENTRY(TIM17_IRQ),            // TIM17 Interrupt
-    VECTAB_ENTRY(I2C1_IRQ),                 // I2C1 Interrupt
-    VECTAB_ENTRY(I2C2_IRQ),                 // I2C2 Interrupt
-    VECTAB_ENTRY(SPI1_IRQ),                 // SPI1 Interrupt
-    VECTAB_ENTRY(SPI2_IRQ),                 // SPI2 Interrupt
-    VECTAB_ENTRY(USART1_IRQ),               // USART1 Interrupt
-    VECTAB_ENTRY(USART2_IRQ),           // USART2 Interrupt
-    VECTAB_ENTRY(USART3_4_IRQ),         // USART3 and USART4 Interrupts
-    VECTAB_ENTRY(CEC_CAN_IRQ),              // CEC Interrupt
-    VECTAB_ENTRY(USB_IRQ),                  // USB Low Priority global Interrupt
-};
diff --git a/platform/stm32f1xx/debug.c b/platform/stm32f1xx/debug.c
deleted file mode 100644
index 796919e5..00000000
--- a/platform/stm32f1xx/debug.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <debug.h>
-#include <stdio.h>
-#include <kernel/thread.h>
-#include <platform/debug.h>
-#include <arch/ops.h>
-#include <dev/uart.h>
-#include <target/debugconfig.h>
-#include <stm32f10x_rcc.h>
-#include <stm32f10x_usart.h>
-#include <arch/arm/cm.h>
-
-void stm32_debug_early_init(void)
-{
-    uart_init_early();
-}
-
-/* later in the init process */
-void stm32_debug_init(void)
-{
-    uart_init();
-}
-
-void platform_dputc(char c)
-{
-    if (c == '\n')
-        uart_putc(DEBUG_UART, '\r');
-    uart_putc(DEBUG_UART, c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    int ret = uart_getc(DEBUG_UART, wait);
-    if (ret == -1)
-        return -1;
-    *c = ret;
-    return 0;
-}
-
diff --git a/platform/stm32f1xx/flash_nor.c b/platform/stm32f1xx/flash_nor.c
deleted file mode 100644
index 0929e2b7..00000000
--- a/platform/stm32f1xx/flash_nor.c
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <trace.h>
-#include <err.h>
-#include <sys/types.h>
-#include <kernel/thread.h>
-#include <platform.h>
-#include <dev/flash_nor.h>
-#include <stm32f10x_rcc.h>
-#include <stm32f10x_flash.h>
-#include <misc.h>
-
-/* flash size and page size determined dynamically */
-#define FLASH_SIZE ((*(REG16(0x1FFFF7E0))) * (size_t)1024)
-#define FLASH_PAGE_SIZE ((size_t)((FLASH_SIZE > 131072) ? 2048 : 1024))
-
-struct flash_nor_bank flash[1];
-
-void stm32_flash_nor_early_init(void)
-{
-    FLASH_Lock(); // make sure it's locked
-
-    flash[0].base = 0x08000000;
-    flash[0].len = FLASH_SIZE;
-    flash[0].page_size = FLASH_PAGE_SIZE;
-    flash[0].flags = 0;
-}
-
-void stm32_flash_nor_init(void)
-{
-    TRACEF("flash size %zu\n", FLASH_SIZE);
-    TRACEF("page size %zu\n", FLASH_PAGE_SIZE);
-}
-
-const struct flash_nor_bank *flash_nor_get_bank(unsigned int bank)
-{
-    if (bank != 0)
-        return NULL;
-
-    return &flash[0];
-}
-
diff --git a/platform/stm32f1xx/gpio.c b/platform/stm32f1xx/gpio.c
deleted file mode 100644
index afda51d6..00000000
--- a/platform/stm32f1xx/gpio.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <assert.h>
-#include <dev/gpio.h>
-#include <platform/stm32.h>
-#include <platform/gpio.h>
-#include <stm32f10x_gpio.h>
-#include <stm32f10x_rcc.h>
-
-static GPIO_TypeDef *port_to_pointer(unsigned int port)
-{
-    switch (port) {
-        default:
-        case GPIO_PORT_A:
-            return GPIOA;
-        case GPIO_PORT_B:
-            return GPIOB;
-        case GPIO_PORT_C:
-            return GPIOC;
-        case GPIO_PORT_D:
-            return GPIOD;
-        case GPIO_PORT_E:
-            return GPIOE;
-        case GPIO_PORT_F:
-            return GPIOF;
-        case GPIO_PORT_G:
-            return GPIOG;
-    }
-}
-
-static void enable_port(unsigned int port)
-{
-    DEBUG_ASSERT(port <= GPIO_PORT_G);
-
-    /* happens to be the RCC ids are sequential bits, so we can start from A and shift */
-    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA << port, ENABLE);
-}
-
-void stm32_gpio_early_init(void)
-{
-    RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
-}
-
-int gpio_config(unsigned nr, unsigned flags)
-{
-    uint port = GPIO_PORT(nr);
-    uint pin = GPIO_PIN(nr);
-
-    enable_port(port);
-
-    GPIO_InitTypeDef init;
-    init.GPIO_Speed = GPIO_Speed_50MHz;
-
-    init.GPIO_Pin = (1 << pin);
-
-    if (flags & GPIO_STM32_AF) {
-        if (flags & GPIO_STM32_OD)
-            init.GPIO_Mode = GPIO_Mode_Out_OD;
-        else
-            init.GPIO_Mode = GPIO_Mode_AF_PP;
-    } else if (flags & GPIO_OUTPUT) {
-        if (flags & GPIO_STM32_OD)
-            init.GPIO_Mode = GPIO_Mode_Out_OD;
-        else
-            init.GPIO_Mode = GPIO_Mode_Out_PP;
-    } else { // GPIO_INPUT
-        if (flags & GPIO_PULLUP) {
-            init.GPIO_Mode = GPIO_Mode_IPU;
-        } else if (flags & GPIO_PULLDOWN) {
-            init.GPIO_Mode = GPIO_Mode_IPD;
-        } else {
-            init.GPIO_Mode = GPIO_Mode_IN_FLOATING;
-        }
-    }
-
-    GPIO_Init(port_to_pointer(port), &init);
-
-    return 0;
-}
-
-void gpio_set(unsigned nr, unsigned on)
-{
-    GPIO_WriteBit(port_to_pointer(GPIO_PORT(nr)), 1 << GPIO_PIN(nr), on);
-}
-
-int gpio_get(unsigned nr)
-{
-    return GPIO_ReadInputDataBit(port_to_pointer(GPIO_PORT(nr)), 1 << GPIO_PIN(nr));
-}
-
diff --git a/platform/stm32f1xx/include/platform/gpio.h b/platform/stm32f1xx/include/platform/gpio.h
deleted file mode 100644
index deb250e2..00000000
--- a/platform/stm32f1xx/include/platform/gpio.h
+++ /dev/null
@@ -1,25 +0,0 @@
-#ifndef __PLATFORM_STM32_GPIO_H
-#define __PLATFORM_STM32_GPIO_H
-
-/* helper defines for STM32 platforms */
-
-/* flag to gpio_configure */
-#define GPIO_STM32_AF (0x1 << 16)
-#define GPIO_STM32_OD (0x2 << 16)
-
-/* gpio port/pin is packed into a single unsigned int in 16x:8port:8pin format */
-#define GPIO(port, pin) ((unsigned int)(((port) << 8) | (pin)))
-
-#define GPIO_PORT(gpio) (((gpio) >> 8) & 0xff)
-#define GPIO_PIN(gpio) ((gpio) & 0xff)
-
-#define GPIO_PORT_A 0
-#define GPIO_PORT_B 1
-#define GPIO_PORT_C 2
-#define GPIO_PORT_D 3
-#define GPIO_PORT_E 4
-#define GPIO_PORT_F 5
-#define GPIO_PORT_G 6
-
-#endif
-
diff --git a/platform/stm32f1xx/include/platform/platform_cm.h b/platform/stm32f1xx/include/platform/platform_cm.h
deleted file mode 100644
index 6292516e..00000000
--- a/platform/stm32f1xx/include/platform/platform_cm.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_CM_H
-#define __PLATFORM_CM_H
-
-#include <stm32f10x.h>
-
-#endif
-
diff --git a/platform/stm32f1xx/include/platform/stm32.h b/platform/stm32f1xx/include/platform/stm32.h
deleted file mode 100644
index f3633664..00000000
--- a/platform/stm32f1xx/include/platform/stm32.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_STM32_H
-#define __PLATFORM_STM32_H
-
-void stm32_debug_early_init(void);
-void stm32_debug_init(void);
-void stm32_timer_early_init(void);
-void stm32_timer_init(void);
-void stm32_gpio_early_init(void);
-void stm32_flash_nor_early_init(void);
-void stm32_flash_nor_init(void);
-
-#endif
-
diff --git a/platform/stm32f1xx/init.c b/platform/stm32f1xx/init.c
deleted file mode 100644
index 3f403300..00000000
--- a/platform/stm32f1xx/init.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * Copyright (c) 2012-2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <debug.h>
-#include <dev/uart.h>
-#include <platform.h>
-#include <platform/stm32.h>
-#include <arch/arm/cm.h>
-#include <stm32f10x_rcc.h>
-#include "system_stm32f10x.h"
-
-void platform_early_init(void)
-{
-    // Crank up the clock before initing timers.
-    SystemInit();
-
-    // start the systick timer
-    RCC_ClocksTypeDef clocks;
-    RCC_GetClocksFreq(&clocks);
-    arm_cm_systick_init(clocks.SYSCLK_Frequency);
-
-    stm32_timer_early_init();
-    stm32_gpio_early_init();
-    stm32_flash_nor_early_init();
-}
-
-void platform_init(void)
-{
-    stm32_timer_init();
-    stm32_flash_nor_init();
-}
diff --git a/platform/stm32f1xx/rules.mk b/platform/stm32f1xx/rules.mk
deleted file mode 100644
index 88c5a8eb..00000000
--- a/platform/stm32f1xx/rules.mk
+++ /dev/null
@@ -1,74 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-# ROMBASE, MEMBASE, and MEMSIZE are required for the linker script
-ROMBASE := 0x0
-MEMBASE := 0x20000000
-# can be overridden by target
-
-ARCH := arm
-ARM_CPU := cortex-m3
-
-ifeq ($(STM32_CHIP),stm32f107)
-GLOBAL_DEFINES += \
-	STM32F10X_CL=1	
-MEMSIZE ?= 65536
-endif
-ifeq ($(STM32_CHIP),stm32f103_xl)
-GLOBAL_DEFINES += \
-	STM32F10X_XL=1
-MEMSIZE ?= 65536
-endif
-ifeq ($(STM32_CHIP),stm32f103_hd)
-GLOBAL_DEFINES += \
-	STM32F10X_HD=1
-MEMSIZE ?= 65536
-endif
-ifeq ($(STM32_CHIP),stm32f103_md)
-GLOBAL_DEFINES += \
-	STM32F10X_MD=1
-MEMSIZE ?= 20480
-endif
-ifeq ($(STM32_CHIP),stm32f103_ld)
-GLOBAL_DEFINES += \
-	STM32F10X_LD=1
-MEMSIZE ?= 20480
-endif
-
-GLOBAL_DEFINES += \
-	MEMSIZE=$(MEMSIZE)
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/init.c \
-	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/uart.c \
-	$(LOCAL_DIR)/timer.c \
-	$(LOCAL_DIR)/vectab.c \
-	$(LOCAL_DIR)/gpio.c \
-	$(LOCAL_DIR)/flash_nor.c \
-
-#	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/interrupts.c \
-	$(LOCAL_DIR)/platform_early.c \
-	$(LOCAL_DIR)/platform.c \
-	$(LOCAL_DIR)/timer.c \
-	$(LOCAL_DIR)/init_clock.c \
-	$(LOCAL_DIR)/init_clock_48mhz.c \
-	$(LOCAL_DIR)/mux.c \
-	$(LOCAL_DIR)/emac_dev.c
-
-# use a two segment memory layout, where all of the read-only sections 
-# of the binary reside in rom, and the read/write are in memory. The 
-# ROMBASE, MEMBASE, and MEMSIZE make variables are required to be set 
-# for the linker script to be generated properly.
-#
-LINKER_SCRIPT += \
-	$(BUILDDIR)/system-twosegment.ld
-
-MODULE_DEPS += \
-	platform/stm32f1xx/STM32F10x_StdPeriph_Driver \
-	arch/arm/arm-m/systick \
-	lib/cbuf
-
-include make/module.mk
diff --git a/platform/stm32f1xx/timer.c b/platform/stm32f1xx/timer.c
deleted file mode 100644
index 7ac815eb..00000000
--- a/platform/stm32f1xx/timer.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <trace.h>
-#include <err.h>
-#include <sys/types.h>
-#include <kernel/thread.h>
-#include <platform.h>
-#include <platform/timer.h>
-#include <stm32f10x_rcc.h>
-#include <stm32f10x_tim.h>
-#include <misc.h>
-#include <arch/arm/cm.h>
-
-#define LOCAL_TRACE 0
-
-#define TIME_BASE_COUNT 0xffff
-#define TICK_RATE 1000000
-
-static void stm32_tim_irq(uint num)
-{
-    TRACEF("tim irq %d\n", num);
-    PANIC_UNIMPLEMENTED;
-}
-
-void stm32_TIM3_IRQ(void)
-{
-    stm32_tim_irq(3);
-}
-
-void stm32_TIM4_IRQ(void)
-{
-    stm32_tim_irq(4);
-}
-
-void stm32_TIM5_IRQ(void)
-{
-    stm32_tim_irq(5);
-}
-
-void stm32_TIM6_IRQ(void)
-{
-    stm32_tim_irq(6);
-}
-
-void stm32_TIM7_IRQ(void)
-{
-    stm32_tim_irq(7);
-}
-
-/* time base */
-void stm32_TIM2_IRQ(void)
-{
-    stm32_tim_irq(2);
-}
-
-void stm32_timer_early_init(void)
-{
-}
-
-void stm32_timer_init(void)
-{
-}
diff --git a/platform/stm32f1xx/uart.c b/platform/stm32f1xx/uart.c
deleted file mode 100644
index db1d7fe0..00000000
--- a/platform/stm32f1xx/uart.c
+++ /dev/null
@@ -1,256 +0,0 @@
-/*
- * Copyright (c) 2012 Kent Ryhorchuk
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <debug.h>
-#include <stdio.h>
-#include <assert.h>
-#include <lib/cbuf.h>
-#include <kernel/thread.h>
-#include <platform/debug.h>
-#include <arch/ops.h>
-#include <dev/uart.h>
-#include <target/debugconfig.h>
-#include <stm32f10x_rcc.h>
-#include <stm32f10x_usart.h>
-#include <arch/arm/cm.h>
-
-#define RXBUF_SIZE 16
-
-#ifdef ENABLE_UART1
-cbuf_t uart1_rx_buf;
-#ifndef UART1_FLOWCONTROL
-#define UART1_FLOWCONTROL USART_HardwareFlowControl_None
-#endif
-#endif
-
-#ifdef ENABLE_UART2
-cbuf_t uart2_rx_buf;
-#ifndef UART2_FLOWCONTROL
-#define UART2_FLOWCONTROL USART_HardwareFlowControl_None
-#endif
-#endif
-
-#ifdef ENABLE_UART3
-cbuf_t uart3_rx_buf;
-#ifndef UART3_FLOWCONTROL
-#define UART3_FLOWCONTROL USART_HardwareFlowControl_None
-#endif
-#endif
-
-#ifdef ENABLE_UART1
-#endif
-#ifdef ENABLE_UART2
-#endif
-#ifdef ENABLE_UART3
-#endif
-
-static void usart_init1_early(USART_TypeDef *usart, uint16_t flowcontrol, int irqn)
-{
-    USART_InitTypeDef init;
-
-    init.USART_BaudRate = 115200;
-    init.USART_WordLength = USART_WordLength_8b;
-    init.USART_StopBits = USART_StopBits_1;
-    init.USART_Parity = USART_Parity_No;
-    init.USART_Mode = USART_Mode_Tx|USART_Mode_Rx;
-    init.USART_HardwareFlowControl = flowcontrol;
-
-    USART_Init(usart, &init);
-    USART_ITConfig(usart, USART_IT_RXNE, DISABLE);
-    NVIC_DisableIRQ(irqn);
-    USART_Cmd(usart, ENABLE);
-}
-
-static void usart_init1(USART_TypeDef *usart, int irqn, cbuf_t *rxbuf)
-{
-    cbuf_initialize(rxbuf, RXBUF_SIZE);
-    USART_ITConfig(usart, USART_IT_RXNE, ENABLE);
-    NVIC_EnableIRQ(irqn);
-    USART_Cmd(usart, ENABLE);
-}
-
-void uart_init_early(void)
-{
-#ifdef ENABLE_UART1
-    RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
-#endif
-#ifdef ENABLE_UART2
-    RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
-#endif
-#ifdef ENABLE_UART3
-    RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
-#endif
-
-#ifdef ENABLE_UART1
-    usart_init1_early(USART1, UART1_FLOWCONTROL, USART1_IRQn);
-#endif
-#ifdef ENABLE_UART2
-    usart_init1_early(USART2, UART2_FLOWCONTROL, USART2_IRQn);
-#endif
-#ifdef ENABLE_UART3
-    usart_init1_early(USART3, UART3_FLOWCONTROL, USART3_IRQn);
-#endif
-}
-
-void uart_init(void)
-{
-#ifdef ENABLE_UART1
-    usart_init1(USART1, USART1_IRQn, &uart1_rx_buf);
-#endif
-#ifdef ENABLE_UART2
-    usart_init1(USART2, USART2_IRQn, &uart2_rx_buf);
-#endif
-#ifdef ENABLE_UART3
-    usart_init1(USART3, USART3_IRQn, &uart3_rx_buf);
-#endif
-}
-
-void uart_rx_irq(USART_TypeDef *usart, cbuf_t *rxbuf)
-{
-    arm_cm_irq_entry();
-
-    bool resched = false;
-    while (USART_GetFlagStatus(usart, USART_FLAG_RXNE)) {
-        if (!cbuf_space_avail(rxbuf)) {
-            // Overflow - let flow control do its thing by not
-            // reading the from the FIFO.
-            USART_ITConfig(usart, USART_IT_RXNE, DISABLE);
-            break;
-        }
-
-        char c = USART_ReceiveData(usart);
-        cbuf_write_char(rxbuf, c, false);
-        resched = true;
-    }
-
-    arm_cm_irq_exit(resched);
-}
-
-#ifdef ENABLE_UART1
-void stm32_USART1_IRQ(void)
-{
-    uart_rx_irq(USART1, &uart1_rx_buf);
-}
-#endif
-
-#ifdef ENABLE_UART2
-void stm32_USART2_IRQ(void)
-{
-    uart_rx_irq(USART2, &uart2_rx_buf);
-}
-#endif
-
-#ifdef ENABLE_UART3
-void stm32_USART3_IRQ(void)
-{
-    uart_rx_irq(USART3, &uart3_rx_buf);
-}
-#endif
-
-
-static void usart_putc(USART_TypeDef *usart, char c)
-{
-    while (USART_GetFlagStatus(usart, USART_FLAG_TXE) == 0);
-    USART_SendData(usart, c);
-    while (USART_GetFlagStatus(usart, USART_FLAG_TC) == 0);
-}
-
-static int usart_getc(USART_TypeDef *usart, cbuf_t *rxbuf, bool wait)
-{
-    char c;
-    cbuf_read_char(rxbuf, &c, wait);
-    if (cbuf_space_avail(rxbuf) > RXBUF_SIZE/2)
-        USART_ITConfig(usart, USART_IT_RXNE, ENABLE);
-
-    return c;
-}
-
-static USART_TypeDef *get_usart(int port)
-{
-    switch (port) {
-#ifdef ENABLE_UART1
-        case 1:
-            return USART1;
-#endif
-#ifdef ENABLE_UART2
-        case 2:
-            return USART2;
-#endif
-#ifdef ENABLE_UART3
-        case 3:
-            return USART3;
-#endif
-        default:
-            ASSERT(false);
-            return 0;
-    }
-
-}
-
-static cbuf_t *get_rxbuf(int port)
-{
-    switch (port) {
-#ifdef ENABLE_UART1
-        case 1:
-            return &uart1_rx_buf;
-#endif
-#ifdef ENABLE_UART2
-        case 2:
-            return &uart2_rx_buf;
-#endif
-#ifdef ENABLE_UART3
-        case 3:
-            return &uart3_rx_buf;
-#endif
-        default:
-            ASSERT(false);
-            return 0;
-    }
-
-}
-
-int uart_putc(int port, char c)
-{
-    USART_TypeDef *usart = get_usart(port);
-    usart_putc(usart, c);
-    return 1;
-}
-
-int uart_getc(int port, bool wait)
-{
-    cbuf_t *rxbuf = get_rxbuf(port);
-    USART_TypeDef *usart = get_usart(port);
-
-    return usart_getc(usart, rxbuf, wait);
-}
-
-void uart_flush_tx(int port) {}
-
-void uart_flush_rx(int port) {}
-
-void uart_init_port(int port, uint baud)
-{
-    // TODO - later
-    PANIC_UNIMPLEMENTED;
-}
diff --git a/platform/stm32f1xx/vectab.c b/platform/stm32f1xx/vectab.c
deleted file mode 100644
index 02a335be..00000000
--- a/platform/stm32f1xx/vectab.c
+++ /dev/null
@@ -1,427 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <compiler.h>
-#include <stm32f10x.h>
-#include <arch/arm/cm.h>
-#include <platform/stm32.h>
-#include <target/debugconfig.h>
-#include <lib/cbuf.h>
-
-/* un-overridden irq handler */
-void stm32_dummy_irq(void)
-{
-    arm_cm_irq_entry();
-
-    panic("unhandled irq\n");
-}
-
-/* a list of default handlers that are simply aliases to the dummy handler */
-#define DEFAULT_HANDLER(x) \
-void stm32_##x(void) __WEAK_ALIAS("stm32_dummy_irq");
-
-DEFAULT_HANDLER(WWDG_IRQ);
-DEFAULT_HANDLER(PVD_IRQ);
-DEFAULT_HANDLER(TAMPER_IRQ);
-DEFAULT_HANDLER(RTC_IRQ);
-DEFAULT_HANDLER(FLASH_IRQ);
-DEFAULT_HANDLER(RCC_IRQ);
-DEFAULT_HANDLER(EXTI0_IRQ);
-DEFAULT_HANDLER(EXTI1_IRQ);
-DEFAULT_HANDLER(EXTI2_IRQ);
-DEFAULT_HANDLER(EXTI3_IRQ);
-DEFAULT_HANDLER(EXTI4_IRQ);
-DEFAULT_HANDLER(DMA1_Channel1_IRQ);
-DEFAULT_HANDLER(DMA1_Channel2_IRQ);
-DEFAULT_HANDLER(DMA1_Channel3_IRQ);
-DEFAULT_HANDLER(DMA1_Channel4_IRQ);
-DEFAULT_HANDLER(DMA1_Channel5_IRQ);
-DEFAULT_HANDLER(DMA1_Channel6_IRQ);
-DEFAULT_HANDLER(DMA1_Channel7_IRQ);
-
-DEFAULT_HANDLER(USART1_IRQ);
-DEFAULT_HANDLER(USART2_IRQ);
-DEFAULT_HANDLER(USART3_IRQ);
-
-DEFAULT_HANDLER(TIM2_IRQ);
-DEFAULT_HANDLER(TIM3_IRQ);
-DEFAULT_HANDLER(TIM4_IRQ);
-DEFAULT_HANDLER(TIM5_IRQ);
-DEFAULT_HANDLER(TIM6_IRQ);
-DEFAULT_HANDLER(TIM7_IRQ);
-
-DEFAULT_HANDLER(ADC1_2_IRQ);
-DEFAULT_HANDLER(USB_HP_CAN1_TX_IRQ);
-DEFAULT_HANDLER(USB_LP_CAN1_RX0_IRQ);
-DEFAULT_HANDLER(CAN1_RX1_IRQ);
-DEFAULT_HANDLER(CAN1_SCE_IRQ);
-DEFAULT_HANDLER(EXTI9_5_IRQ);
-DEFAULT_HANDLER(TIM1_BRK_IRQ);
-DEFAULT_HANDLER(TIM1_UP_IRQ);
-DEFAULT_HANDLER(TIM1_TRG_COM_IRQ);
-DEFAULT_HANDLER(TIM1_CC_IRQ);
-DEFAULT_HANDLER(I2C1_EV_IRQ);
-DEFAULT_HANDLER(I2C1_ER_IRQ);
-DEFAULT_HANDLER(I2C2_EV_IRQ);
-DEFAULT_HANDLER(I2C2_ER_IRQ);
-DEFAULT_HANDLER(SPI1_IRQ);
-DEFAULT_HANDLER(SPI2_IRQ);
-DEFAULT_HANDLER(EXTI15_10_IRQ);
-DEFAULT_HANDLER(RTCAlarm_IRQ);
-DEFAULT_HANDLER(USBWakeUp_IRQ);
-
-DEFAULT_HANDLER(CAN1_TX_IRQ);
-DEFAULT_HANDLER(CAN1_RX0_IRQ);
-DEFAULT_HANDLER(OTG_FS_WKUP_IRQ);
-DEFAULT_HANDLER(SPI3_IRQ);
-DEFAULT_HANDLER(UART4_IRQ);
-DEFAULT_HANDLER(UART5_IRQ);
-DEFAULT_HANDLER(DMA2_Channel1_IRQ);
-DEFAULT_HANDLER(DMA2_Channel2_IRQ);
-DEFAULT_HANDLER(DMA2_Channel3_IRQ);
-DEFAULT_HANDLER(DMA2_Channel4_IRQ);
-DEFAULT_HANDLER(DMA2_Channel5_IRQ);
-DEFAULT_HANDLER(ETH_IRQ);
-DEFAULT_HANDLER(ETH_WKUP_IRQ);
-DEFAULT_HANDLER(CAN2_TX_IRQ);
-DEFAULT_HANDLER(CAN2_RX0_IRQ);
-DEFAULT_HANDLER(CAN2_RX1_IRQ);
-DEFAULT_HANDLER(CAN2_SCE_IRQ);
-DEFAULT_HANDLER(OTG_FS_IRQ);
-
-DEFAULT_HANDLER(TIM8_BRK_IRQ);
-DEFAULT_HANDLER(TIM8_UP_IRQ);
-DEFAULT_HANDLER(TIM8_TRG_COM_IRQ);
-DEFAULT_HANDLER(TIM8_CC_IRQ);
-DEFAULT_HANDLER(ADC3_IRQ);
-DEFAULT_HANDLER(FSMC_IRQ);
-DEFAULT_HANDLER(SDIO_IRQ);
-DEFAULT_HANDLER(DMA2_Channel4_5_IRQ);
-DEFAULT_HANDLER(TIM1_BRK_TIM9_IRQ);
-DEFAULT_HANDLER(TIM1_UP_TIM10_IRQ);
-DEFAULT_HANDLER(TIM1_TRG_COM_TIM11_IRQ);
-
-DEFAULT_HANDLER(TIM8_BRK_TIM12_IRQ);
-DEFAULT_HANDLER(TIM8_UP_TIM13_IRQ);
-DEFAULT_HANDLER(TIM8_TRG_COM_TIM14_IRQ);
-
-#define VECTAB_ENTRY(x) [x##n] = stm32_##x
-
-/* appended to the end of the main vector table */
-const void *const __SECTION(".text.boot.vectab2") vectab2[] = {
-    VECTAB_ENTRY(WWDG_IRQ),                  /*!< Window WatchDog Interrupt                            */
-    VECTAB_ENTRY(PVD_IRQ),                   /*!< PVD through EXTI Line detection Interrupt            */
-    VECTAB_ENTRY(TAMPER_IRQ),                /*!< Tamper Interrupt                                     */
-    VECTAB_ENTRY(RTC_IRQ),                   /*!< RTC global Interrupt                                 */
-    VECTAB_ENTRY(FLASH_IRQ),                 /*!< FLASH global Interrupt                               */
-    VECTAB_ENTRY(RCC_IRQ),                   /*!< RCC global Interrupt                                 */
-    VECTAB_ENTRY(EXTI0_IRQ),                 /*!< EXTI Line0 Interrupt                                 */
-    VECTAB_ENTRY(EXTI1_IRQ),                 /*!< EXTI Line1 Interrupt                                 */
-    VECTAB_ENTRY(EXTI2_IRQ),                 /*!< EXTI Line2 Interrupt                                 */
-    VECTAB_ENTRY(EXTI3_IRQ),                 /*!< EXTI Line3 Interrupt                                 */
-    VECTAB_ENTRY(EXTI4_IRQ),                 /*!< EXTI Line4 Interrupt                                 */
-    VECTAB_ENTRY(DMA1_Channel1_IRQ),         /*!< DMA1 Channel 1 global Interrupt                      */
-    VECTAB_ENTRY(DMA1_Channel2_IRQ),         /*!< DMA1 Channel 2 global Interrupt                      */
-    VECTAB_ENTRY(DMA1_Channel3_IRQ),         /*!< DMA1 Channel 3 global Interrupt                      */
-    VECTAB_ENTRY(DMA1_Channel4_IRQ),         /*!< DMA1 Channel 4 global Interrupt                      */
-    VECTAB_ENTRY(DMA1_Channel5_IRQ),         /*!< DMA1 Channel 5 global Interrupt                      */
-    VECTAB_ENTRY(DMA1_Channel6_IRQ),         /*!< DMA1 Channel 6 global Interrupt                      */
-    VECTAB_ENTRY(DMA1_Channel7_IRQ),         /*!< DMA1 Channel 7 global Interrupt                      */
-
-    /* taken from the stm32 irq definition list */
-#ifdef STM32F10X_LD
-    VECTAB_ENTRY(ADC1_2_IRQ),                /*!< ADC1 and ADC2 global Interrupt                       */
-    VECTAB_ENTRY(USB_HP_CAN1_TX_IRQ),        /*!< USB Device High Priority or CAN1 TX Interrupts       */
-    VECTAB_ENTRY(USB_LP_CAN1_RX0_IRQ),       /*!< USB Device Low Priority or CAN1 RX0 Interrupts       */
-    VECTAB_ENTRY(CAN1_RX1_IRQ),              /*!< CAN1 RX1 Interrupt                                   */
-    VECTAB_ENTRY(CAN1_SCE_IRQ),              /*!< CAN1 SCE Interrupt                                   */
-    VECTAB_ENTRY(EXTI9_5_IRQ),               /*!< External Line[9:5] Interrupts                        */
-    VECTAB_ENTRY(TIM1_BRK_IRQ),              /*!< TIM1 Break Interrupt                                 */
-    VECTAB_ENTRY(TIM1_UP_IRQ),               /*!< TIM1 Update Interrupt                                */
-    VECTAB_ENTRY(TIM1_TRG_COM_IRQ),          /*!< TIM1 Trigger and Commutation Interrupt               */
-    VECTAB_ENTRY(TIM1_CC_IRQ),               /*!< TIM1 Capture Compare Interrupt                       */
-    VECTAB_ENTRY(TIM2_IRQ),                  /*!< TIM2 global Interrupt                                */
-    VECTAB_ENTRY(TIM3_IRQ),                  /*!< TIM3 global Interrupt                                */
-    VECTAB_ENTRY(I2C1_EV_IRQ),               /*!< I2C1 Event Interrupt                                 */
-    VECTAB_ENTRY(I2C1_ER_IRQ),               /*!< I2C1 Error Interrupt                                 */
-    VECTAB_ENTRY(SPI1_IRQ),                  /*!< SPI1 global Interrupt                                */
-    VECTAB_ENTRY(USART1_IRQ),                /*!< USART1 global Interrupt                              */
-    VECTAB_ENTRY(USART2_IRQ),                /*!< USART2 global Interrupt                              */
-    VECTAB_ENTRY(EXTI15_10_IRQ),             /*!< External Line[15:10] Interrupts                      */
-    VECTAB_ENTRY(RTCAlarm_IRQ),              /*!< RTC Alarm through EXTI Line Interrupt                */
-    VECTAB_ENTRY(USBWakeUp_IRQ),             /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
-#endif /* STM32F10X_LD */
-
-#ifdef STM32F10X_LD_VL
-    VECTAB_ENTRY(ADC1_IRQ),                  /*!< ADC1 global Interrupt                                */
-    VECTAB_ENTRY(EXTI9_5_IRQ),               /*!< External Line[9:5] Interrupts                        */
-    VECTAB_ENTRY(TIM1_BRK_TIM15_IRQ),        /*!< TIM1 Break and TIM15 Interrupts                      */
-    VECTAB_ENTRY(TIM1_UP_TIM16_IRQ),         /*!< TIM1 Update and TIM16 Interrupts                     */
-    VECTAB_ENTRY(TIM1_TRG_COM_TIM17_IRQ),    /*!< TIM1 Trigger and Commutation and TIM17 Interrupt     */
-    VECTAB_ENTRY(TIM1_CC_IRQ),               /*!< TIM1 Capture Compare Interrupt                       */
-    VECTAB_ENTRY(TIM2_IRQ),                  /*!< TIM2 global Interrupt                                */
-    VECTAB_ENTRY(TIM3_IRQ),                  /*!< TIM3 global Interrupt                                */
-    VECTAB_ENTRY(I2C1_EV_IRQ),               /*!< I2C1 Event Interrupt                                 */
-    VECTAB_ENTRY(I2C1_ER_IRQ),               /*!< I2C1 Error Interrupt                                 */
-    VECTAB_ENTRY(SPI1_IRQ),                  /*!< SPI1 global Interrupt                                */
-    VECTAB_ENTRY(USART1_IRQ),                /*!< USART1 global Interrupt                              */
-    VECTAB_ENTRY(USART2_IRQ),                /*!< USART2 global Interrupt                              */
-    VECTAB_ENTRY(EXTI15_10_IRQ),             /*!< External Line[15:10] Interrupts                      */
-    VECTAB_ENTRY(RTCAlarm_IRQ),              /*!< RTC Alarm through EXTI Line Interrupt                */
-    VECTAB_ENTRY(CEC_IRQ),                   /*!< HDMI-CEC Interrupt                                   */
-    VECTAB_ENTRY(TIM6_DAC_IRQ),              /*!< TIM6 and DAC underrun Interrupt                      */
-    VECTAB_ENTRY(TIM7_IRQ),                  /*!< TIM7 Interrupt                                       */
-#endif /* STM32F10X_LD_VL */
-
-#ifdef STM32F10X_MD
-    VECTAB_ENTRY(ADC1_2_IRQ),                /*!< ADC1 and ADC2 global Interrupt                       */
-    VECTAB_ENTRY(USB_HP_CAN1_TX_IRQ),        /*!< USB Device High Priority or CAN1 TX Interrupts       */
-    VECTAB_ENTRY(USB_LP_CAN1_RX0_IRQ),       /*!< USB Device Low Priority or CAN1 RX0 Interrupts       */
-    VECTAB_ENTRY(CAN1_RX1_IRQ),              /*!< CAN1 RX1 Interrupt                                   */
-    VECTAB_ENTRY(CAN1_SCE_IRQ),              /*!< CAN1 SCE Interrupt                                   */
-    VECTAB_ENTRY(EXTI9_5_IRQ),               /*!< External Line[9:5] Interrupts                        */
-    VECTAB_ENTRY(TIM1_BRK_IRQ),              /*!< TIM1 Break Interrupt                                 */
-    VECTAB_ENTRY(TIM1_UP_IRQ),               /*!< TIM1 Update Interrupt                                */
-    VECTAB_ENTRY(TIM1_TRG_COM_IRQ),          /*!< TIM1 Trigger and Commutation Interrupt               */
-    VECTAB_ENTRY(TIM1_CC_IRQ),               /*!< TIM1 Capture Compare Interrupt                       */
-    VECTAB_ENTRY(TIM2_IRQ),                  /*!< TIM2 global Interrupt                                */
-    VECTAB_ENTRY(TIM3_IRQ),                  /*!< TIM3 global Interrupt                                */
-    VECTAB_ENTRY(TIM4_IRQ),                  /*!< TIM4 global Interrupt                                */
-    VECTAB_ENTRY(I2C1_EV_IRQ),               /*!< I2C1 Event Interrupt                                 */
-    VECTAB_ENTRY(I2C1_ER_IRQ),               /*!< I2C1 Error Interrupt                                 */
-    VECTAB_ENTRY(I2C2_EV_IRQ),               /*!< I2C2 Event Interrupt                                 */
-    VECTAB_ENTRY(I2C2_ER_IRQ),               /*!< I2C2 Error Interrupt                                 */
-    VECTAB_ENTRY(SPI1_IRQ),                  /*!< SPI1 global Interrupt                                */
-    VECTAB_ENTRY(SPI2_IRQ),                  /*!< SPI2 global Interrupt                                */
-    VECTAB_ENTRY(USART1_IRQ),                /*!< USART1 global Interrupt                              */
-    VECTAB_ENTRY(USART2_IRQ),                /*!< USART2 global Interrupt                              */
-    VECTAB_ENTRY(USART3_IRQ),                /*!< USART3 global Interrupt                              */
-    VECTAB_ENTRY(EXTI15_10_IRQ),             /*!< External Line[15:10] Interrupts                      */
-    VECTAB_ENTRY(RTCAlarm_IRQ),              /*!< RTC Alarm through EXTI Line Interrupt                */
-    VECTAB_ENTRY(USBWakeUp_IRQ),             /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
-#endif /* STM32F10X_MD */
-
-#ifdef STM32F10X_MD_VL
-    VECTAB_ENTRY(ADC1_IRQ),                  /*!< ADC1 global Interrupt                                */
-    VECTAB_ENTRY(EXTI9_5_IRQ),               /*!< External Line[9:5] Interrupts                        */
-    VECTAB_ENTRY(TIM1_BRK_TIM15_IRQ),        /*!< TIM1 Break and TIM15 Interrupts                      */
-    VECTAB_ENTRY(TIM1_UP_TIM16_IRQ),         /*!< TIM1 Update and TIM16 Interrupts                     */
-    VECTAB_ENTRY(TIM1_TRG_COM_TIM17_IRQ),    /*!< TIM1 Trigger and Commutation and TIM17 Interrupt     */
-    VECTAB_ENTRY(TIM1_CC_IRQ),               /*!< TIM1 Capture Compare Interrupt                       */
-    VECTAB_ENTRY(TIM2_IRQ),                  /*!< TIM2 global Interrupt                                */
-    VECTAB_ENTRY(TIM3_IRQ),                  /*!< TIM3 global Interrupt                                */
-    VECTAB_ENTRY(TIM4_IRQ),                  /*!< TIM4 global Interrupt                                */
-    VECTAB_ENTRY(I2C1_EV_IRQ),               /*!< I2C1 Event Interrupt                                 */
-    VECTAB_ENTRY(I2C1_ER_IRQ),               /*!< I2C1 Error Interrupt                                 */
-    VECTAB_ENTRY(I2C2_EV_IRQ),               /*!< I2C2 Event Interrupt                                 */
-    VECTAB_ENTRY(I2C2_ER_IRQ),               /*!< I2C2 Error Interrupt                                 */
-    VECTAB_ENTRY(SPI1_IRQ),                  /*!< SPI1 global Interrupt                                */
-    VECTAB_ENTRY(SPI2_IRQ),                  /*!< SPI2 global Interrupt                                */
-    VECTAB_ENTRY(USART1_IRQ),                /*!< USART1 global Interrupt                              */
-    VECTAB_ENTRY(USART2_IRQ),                /*!< USART2 global Interrupt                              */
-    VECTAB_ENTRY(USART3_IRQ),                /*!< USART3 global Interrupt                              */
-    VECTAB_ENTRY(EXTI15_10_IRQ),             /*!< External Line[15:10] Interrupts                      */
-    VECTAB_ENTRY(RTCAlarm_IRQ),              /*!< RTC Alarm through EXTI Line Interrupt                */
-    VECTAB_ENTRY(CEC_IRQ),                   /*!< HDMI-CEC Interrupt                                   */
-    VECTAB_ENTRY(TIM6_DAC_IRQ),              /*!< TIM6 and DAC underrun Interrupt                      */
-    VECTAB_ENTRY(TIM7_IRQ),                  /*!< TIM7 Interrupt                                       */
-#endif /* STM32F10X_MD_VL */
-
-#ifdef STM32F10X_HD
-    VECTAB_ENTRY(ADC1_2_IRQ),                /*!< ADC1 and ADC2 global Interrupt                       */
-    VECTAB_ENTRY(USB_HP_CAN1_TX_IRQ),        /*!< USB Device High Priority or CAN1 TX Interrupts       */
-    VECTAB_ENTRY(USB_LP_CAN1_RX0_IRQ),       /*!< USB Device Low Priority or CAN1 RX0 Interrupts       */
-    VECTAB_ENTRY(CAN1_RX1_IRQ),              /*!< CAN1 RX1 Interrupt                                   */
-    VECTAB_ENTRY(CAN1_SCE_IRQ),              /*!< CAN1 SCE Interrupt                                   */
-    VECTAB_ENTRY(EXTI9_5_IRQ),               /*!< External Line[9:5] Interrupts                        */
-    VECTAB_ENTRY(TIM1_BRK_IRQ),              /*!< TIM1 Break Interrupt                                 */
-    VECTAB_ENTRY(TIM1_UP_IRQ),               /*!< TIM1 Update Interrupt                                */
-    VECTAB_ENTRY(TIM1_TRG_COM_IRQ),          /*!< TIM1 Trigger and Commutation Interrupt               */
-    VECTAB_ENTRY(TIM1_CC_IRQ),               /*!< TIM1 Capture Compare Interrupt                       */
-    VECTAB_ENTRY(TIM2_IRQ),                  /*!< TIM2 global Interrupt                                */
-    VECTAB_ENTRY(TIM3_IRQ),                  /*!< TIM3 global Interrupt                                */
-    VECTAB_ENTRY(TIM4_IRQ),                  /*!< TIM4 global Interrupt                                */
-    VECTAB_ENTRY(I2C1_EV_IRQ),               /*!< I2C1 Event Interrupt                                 */
-    VECTAB_ENTRY(I2C1_ER_IRQ),               /*!< I2C1 Error Interrupt                                 */
-    VECTAB_ENTRY(I2C2_EV_IRQ),               /*!< I2C2 Event Interrupt                                 */
-    VECTAB_ENTRY(I2C2_ER_IRQ),               /*!< I2C2 Error Interrupt                                 */
-    VECTAB_ENTRY(SPI1_IRQ),                  /*!< SPI1 global Interrupt                                */
-    VECTAB_ENTRY(SPI2_IRQ),                  /*!< SPI2 global Interrupt                                */
-    VECTAB_ENTRY(USART1_IRQ),                /*!< USART1 global Interrupt                              */
-    VECTAB_ENTRY(USART2_IRQ),                /*!< USART2 global Interrupt                              */
-    VECTAB_ENTRY(USART3_IRQ),                /*!< USART3 global Interrupt                              */
-    VECTAB_ENTRY(EXTI15_10_IRQ),             /*!< External Line[15:10] Interrupts                      */
-    VECTAB_ENTRY(RTCAlarm_IRQ),              /*!< RTC Alarm through EXTI Line Interrupt                */
-    VECTAB_ENTRY(USBWakeUp_IRQ),             /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
-    VECTAB_ENTRY(TIM8_BRK_IRQ),              /*!< TIM8 Break Interrupt                                 */
-    VECTAB_ENTRY(TIM8_UP_IRQ),               /*!< TIM8 Update Interrupt                                */
-    VECTAB_ENTRY(TIM8_TRG_COM_IRQ),          /*!< TIM8 Trigger and Commutation Interrupt               */
-    VECTAB_ENTRY(TIM8_CC_IRQ),               /*!< TIM8 Capture Compare Interrupt                       */
-    VECTAB_ENTRY(ADC3_IRQ),                  /*!< ADC3 global Interrupt                                */
-    VECTAB_ENTRY(FSMC_IRQ),                  /*!< FSMC global Interrupt                                */
-    VECTAB_ENTRY(SDIO_IRQ),                  /*!< SDIO global Interrupt                                */
-    VECTAB_ENTRY(TIM5_IRQ),                  /*!< TIM5 global Interrupt                                */
-    VECTAB_ENTRY(SPI3_IRQ),                  /*!< SPI3 global Interrupt                                */
-    VECTAB_ENTRY(UART4_IRQ),                 /*!< UART4 global Interrupt                               */
-    VECTAB_ENTRY(UART5_IRQ),                 /*!< UART5 global Interrupt                               */
-    VECTAB_ENTRY(TIM6_IRQ),                  /*!< TIM6 global Interrupt                                */
-    VECTAB_ENTRY(TIM7_IRQ),                  /*!< TIM7 global Interrupt                                */
-    VECTAB_ENTRY(DMA2_Channel1_IRQ),         /*!< DMA2 Channel 1 global Interrupt                      */
-    VECTAB_ENTRY(DMA2_Channel2_IRQ),         /*!< DMA2 Channel 2 global Interrupt                      */
-    VECTAB_ENTRY(DMA2_Channel3_IRQ),         /*!< DMA2 Channel 3 global Interrupt                      */
-    VECTAB_ENTRY(DMA2_Channel4_5_IRQ),       /*!< DMA2 Channel 4 and Channel 5 global Interrupt        */
-#endif /* STM32F10X_HD */
-
-#ifdef STM32F10X_HD_VL
-    VECTAB_ENTRY(ADC1_IRQ),                  /*!< ADC1 global Interrupt                                */
-    VECTAB_ENTRY(EXTI9_5_IRQ),               /*!< External Line[9:5] Interrupts                        */
-    VECTAB_ENTRY(TIM1_BRK_TIM15_IRQ),        /*!< TIM1 Break and TIM15 Interrupts                      */
-    VECTAB_ENTRY(TIM1_UP_TIM16_IRQ),         /*!< TIM1 Update and TIM16 Interrupts                     */
-    VECTAB_ENTRY(TIM1_TRG_COM_TIM17_IRQ),    /*!< TIM1 Trigger and Commutation and TIM17 Interrupt     */
-    VECTAB_ENTRY(TIM1_CC_IRQ),               /*!< TIM1 Capture Compare Interrupt                       */
-    VECTAB_ENTRY(TIM2_IRQ),                  /*!< TIM2 global Interrupt                                */
-    VECTAB_ENTRY(TIM3_IRQ),                  /*!< TIM3 global Interrupt                                */
-    VECTAB_ENTRY(TIM4_IRQ),                  /*!< TIM4 global Interrupt                                */
-    VECTAB_ENTRY(I2C1_EV_IRQ),               /*!< I2C1 Event Interrupt                                 */
-    VECTAB_ENTRY(I2C1_ER_IRQ),               /*!< I2C1 Error Interrupt                                 */
-    VECTAB_ENTRY(I2C2_EV_IRQ),               /*!< I2C2 Event Interrupt                                 */
-    VECTAB_ENTRY(I2C2_ER_IRQ),               /*!< I2C2 Error Interrupt                                 */
-    VECTAB_ENTRY(SPI1_IRQ),                  /*!< SPI1 global Interrupt                                */
-    VECTAB_ENTRY(SPI2_IRQ),                  /*!< SPI2 global Interrupt                                */
-    VECTAB_ENTRY(USART1_IRQ),                /*!< USART1 global Interrupt                              */
-    VECTAB_ENTRY(USART2_IRQ),                /*!< USART2 global Interrupt                              */
-    VECTAB_ENTRY(USART3_IRQ),                /*!< USART3 global Interrupt                              */
-    VECTAB_ENTRY(EXTI15_10_IRQ),             /*!< External Line[15:10] Interrupts                      */
-    VECTAB_ENTRY(RTCAlarm_IRQ),              /*!< RTC Alarm through EXTI Line Interrupt                */
-    VECTAB_ENTRY(CEC_IRQ),                   /*!< HDMI-CEC Interrupt                                   */
-    VECTAB_ENTRY(TIM12_IRQ),                 /*!< TIM12 global Interrupt                               */
-    VECTAB_ENTRY(TIM13_IRQ),                 /*!< TIM13 global Interrupt                               */
-    VECTAB_ENTRY(TIM14_IRQ),                 /*!< TIM14 global Interrupt                               */
-    VECTAB_ENTRY(FSMC_IRQ),                  /*!< FSMC global Interrupt                                */
-    VECTAB_ENTRY(TIM5_IRQ),                  /*!< TIM5 global Interrupt                                */
-    VECTAB_ENTRY(SPI3_IRQ),                  /*!< SPI3 global Interrupt                                */
-    VECTAB_ENTRY(UART4_IRQ),                 /*!< UART4 global Interrupt                               */
-    VECTAB_ENTRY(UART5_IRQ),                 /*!< UART5 global Interrupt                               */
-    VECTAB_ENTRY(TIM6_DAC_IRQ),              /*!< TIM6 and DAC underrun Interrupt                      */
-    VECTAB_ENTRY(TIM7_IRQ),                  /*!< TIM7 Interrupt                                       */
-    VECTAB_ENTRY(DMA2_Channel1_IRQ),         /*!< DMA2 Channel 1 global Interrupt                      */
-    VECTAB_ENTRY(DMA2_Channel2_IRQ),         /*!< DMA2 Channel 2 global Interrupt                      */
-    VECTAB_ENTRY(DMA2_Channel3_IRQ),         /*!< DMA2 Channel 3 global Interrupt                      */
-    VECTAB_ENTRY(DMA2_Channel4_5_IRQ),       /*!< DMA2 Channel 4 and Channel 5 global Interrupt        */
-    VECTAB_ENTRY(DMA2_Channel5_IRQ),         /*!< DMA2 Channel 5 global Interrupt (DMA2 Channel 5 is
-                                             mapped at position 60 only if the MISC_REMAP bit in
-                                             the AFIO_MAPR2 register is set)                      */
-#endif /* STM32F10X_HD_VL */
-
-#ifdef STM32F10X_XL
-    VECTAB_ENTRY(ADC1_2_IRQ),                /*!< ADC1 and ADC2 global Interrupt                       */
-    VECTAB_ENTRY(USB_HP_CAN1_TX_IRQ),        /*!< USB Device High Priority or CAN1 TX Interrupts       */
-    VECTAB_ENTRY(USB_LP_CAN1_RX0_IRQ),       /*!< USB Device Low Priority or CAN1 RX0 Interrupts       */
-    VECTAB_ENTRY(CAN1_RX1_IRQ),              /*!< CAN1 RX1 Interrupt                                   */
-    VECTAB_ENTRY(CAN1_SCE_IRQ),              /*!< CAN1 SCE Interrupt                                   */
-    VECTAB_ENTRY(EXTI9_5_IRQ),               /*!< External Line[9:5] Interrupts                        */
-    VECTAB_ENTRY(TIM1_BRK_TIM9_IRQ),         /*!< TIM1 Break Interrupt and TIM9 global Interrupt       */
-    VECTAB_ENTRY(TIM1_UP_TIM10_IRQ),         /*!< TIM1 Update Interrupt and TIM10 global Interrupt     */
-    VECTAB_ENTRY(TIM1_TRG_COM_TIM11_IRQ),    /*!< TIM1 Trigger and Commutation Interrupt and TIM11 global interrupt */
-    VECTAB_ENTRY(TIM1_CC_IRQ),               /*!< TIM1 Capture Compare Interrupt                       */
-    VECTAB_ENTRY(TIM2_IRQ),                  /*!< TIM2 global Interrupt                                */
-    VECTAB_ENTRY(TIM3_IRQ),                  /*!< TIM3 global Interrupt                                */
-    VECTAB_ENTRY(TIM4_IRQ),                  /*!< TIM4 global Interrupt                                */
-    VECTAB_ENTRY(I2C1_EV_IRQ),               /*!< I2C1 Event Interrupt                                 */
-    VECTAB_ENTRY(I2C1_ER_IRQ),               /*!< I2C1 Error Interrupt                                 */
-    VECTAB_ENTRY(I2C2_EV_IRQ),               /*!< I2C2 Event Interrupt                                 */
-    VECTAB_ENTRY(I2C2_ER_IRQ),               /*!< I2C2 Error Interrupt                                 */
-    VECTAB_ENTRY(SPI1_IRQ),                  /*!< SPI1 global Interrupt                                */
-    VECTAB_ENTRY(SPI2_IRQ),                  /*!< SPI2 global Interrupt                                */
-    VECTAB_ENTRY(USART1_IRQ),                /*!< USART1 global Interrupt                              */
-    VECTAB_ENTRY(USART2_IRQ),                /*!< USART2 global Interrupt                              */
-    VECTAB_ENTRY(USART3_IRQ),                /*!< USART3 global Interrupt                              */
-    VECTAB_ENTRY(EXTI15_10_IRQ),             /*!< External Line[15:10] Interrupts                      */
-    VECTAB_ENTRY(RTCAlarm_IRQ),              /*!< RTC Alarm through EXTI Line Interrupt                */
-    VECTAB_ENTRY(USBWakeUp_IRQ),             /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
-    VECTAB_ENTRY(TIM8_BRK_TIM12_IRQ),        /*!< TIM8 Break Interrupt and TIM12 global Interrupt      */
-    VECTAB_ENTRY(TIM8_UP_TIM13_IRQ),         /*!< TIM8 Update Interrupt and TIM13 global Interrupt     */
-    VECTAB_ENTRY(TIM8_TRG_COM_TIM14_IRQ),    /*!< TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt */
-    VECTAB_ENTRY(TIM8_CC_IRQ),               /*!< TIM8 Capture Compare Interrupt                       */
-    VECTAB_ENTRY(ADC3_IRQ),                  /*!< ADC3 global Interrupt                                */
-    VECTAB_ENTRY(FSMC_IRQ),                  /*!< FSMC global Interrupt                                */
-    VECTAB_ENTRY(SDIO_IRQ),                  /*!< SDIO global Interrupt                                */
-    VECTAB_ENTRY(TIM5_IRQ),                  /*!< TIM5 global Interrupt                                */
-    VECTAB_ENTRY(SPI3_IRQ),                  /*!< SPI3 global Interrupt                                */
-    VECTAB_ENTRY(UART4_IRQ),                 /*!< UART4 global Interrupt                               */
-    VECTAB_ENTRY(UART5_IRQ),                 /*!< UART5 global Interrupt                               */
-    VECTAB_ENTRY(TIM6_IRQ),                  /*!< TIM6 global Interrupt                                */
-    VECTAB_ENTRY(TIM7_IRQ),                  /*!< TIM7 global Interrupt                                */
-    VECTAB_ENTRY(DMA2_Channel1_IRQ),         /*!< DMA2 Channel 1 global Interrupt                      */
-    VECTAB_ENTRY(DMA2_Channel2_IRQ),         /*!< DMA2 Channel 2 global Interrupt                      */
-    VECTAB_ENTRY(DMA2_Channel3_IRQ),         /*!< DMA2 Channel 3 global Interrupt                      */
-    VECTAB_ENTRY(DMA2_Channel4_5_IRQ),       /*!< DMA2 Channel 4 and Channel 5 global Interrupt        */
-#endif /* STM32F10X_XL */
-
-#ifdef STM32F10X_CL
-    VECTAB_ENTRY(ADC1_2_IRQ),                /*!< ADC1 and ADC2 global Interrupt                       */
-    VECTAB_ENTRY(CAN1_TX_IRQ),               /*!< USB Device High Priority or CAN1 TX Interrupts       */
-    VECTAB_ENTRY(CAN1_RX0_IRQ),              /*!< USB Device Low Priority or CAN1 RX0 Interrupts       */
-    VECTAB_ENTRY(CAN1_RX1_IRQ),              /*!< CAN1 RX1 Interrupt                                   */
-    VECTAB_ENTRY(CAN1_SCE_IRQ),              /*!< CAN1 SCE Interrupt                                   */
-    VECTAB_ENTRY(EXTI9_5_IRQ),               /*!< External Line[9:5] Interrupts                        */
-    VECTAB_ENTRY(TIM1_BRK_IRQ),              /*!< TIM1 Break Interrupt                                 */
-    VECTAB_ENTRY(TIM1_UP_IRQ),               /*!< TIM1 Update Interrupt                                */
-    VECTAB_ENTRY(TIM1_TRG_COM_IRQ),          /*!< TIM1 Trigger and Commutation Interrupt               */
-    VECTAB_ENTRY(TIM1_CC_IRQ),               /*!< TIM1 Capture Compare Interrupt                       */
-    VECTAB_ENTRY(TIM2_IRQ),                  /*!< TIM2 global Interrupt                                */
-    VECTAB_ENTRY(TIM3_IRQ),                  /*!< TIM3 global Interrupt                                */
-    VECTAB_ENTRY(TIM4_IRQ),                  /*!< TIM4 global Interrupt                                */
-    VECTAB_ENTRY(I2C1_EV_IRQ),               /*!< I2C1 Event Interrupt                                 */
-    VECTAB_ENTRY(I2C1_ER_IRQ),               /*!< I2C1 Error Interrupt                                 */
-    VECTAB_ENTRY(I2C2_EV_IRQ),               /*!< I2C2 Event Interrupt                                 */
-    VECTAB_ENTRY(I2C2_ER_IRQ),               /*!< I2C2 Error Interrupt                                 */
-    VECTAB_ENTRY(SPI1_IRQ),                  /*!< SPI1 global Interrupt                                */
-    VECTAB_ENTRY(SPI2_IRQ),                  /*!< SPI2 global Interrupt                                */
-    VECTAB_ENTRY(USART1_IRQ),                /*!< USART1 global Interrupt                              */
-    VECTAB_ENTRY(USART2_IRQ),                /*!< USART2 global Interrupt                              */
-    VECTAB_ENTRY(USART3_IRQ),                /*!< USART3 global Interrupt                              */
-    VECTAB_ENTRY(EXTI15_10_IRQ),             /*!< External Line[15:10] Interrupts                      */
-    VECTAB_ENTRY(RTCAlarm_IRQ),              /*!< RTC Alarm through EXTI Line Interrupt                */
-    VECTAB_ENTRY(OTG_FS_WKUP_IRQ),           /*!< USB OTG FS WakeUp from suspend through EXTI Line Interrupt */
-    VECTAB_ENTRY(TIM5_IRQ),                  /*!< TIM5 global Interrupt                                */
-    VECTAB_ENTRY(SPI3_IRQ),                  /*!< SPI3 global Interrupt                                */
-    VECTAB_ENTRY(UART4_IRQ),                 /*!< UART4 global Interrupt                               */
-    VECTAB_ENTRY(UART5_IRQ),                 /*!< UART5 global Interrupt                               */
-    VECTAB_ENTRY(TIM6_IRQ),                  /*!< TIM6 global Interrupt                                */
-    VECTAB_ENTRY(TIM7_IRQ),                  /*!< TIM7 global Interrupt                                */
-    VECTAB_ENTRY(DMA2_Channel1_IRQ),         /*!< DMA2 Channel 1 global Interrupt                      */
-    VECTAB_ENTRY(DMA2_Channel2_IRQ),         /*!< DMA2 Channel 2 global Interrupt                      */
-    VECTAB_ENTRY(DMA2_Channel3_IRQ),         /*!< DMA2 Channel 3 global Interrupt                      */
-    VECTAB_ENTRY(DMA2_Channel4_IRQ),         /*!< DMA2 Channel 4 global Interrupt                      */
-    VECTAB_ENTRY(DMA2_Channel5_IRQ),         /*!< DMA2 Channel 5 global Interrupt                      */
-    VECTAB_ENTRY(ETH_IRQ),                   /*!< Ethernet global Interrupt                            */
-    VECTAB_ENTRY(ETH_WKUP_IRQ),              /*!< Ethernet Wakeup through EXTI line Interrupt          */
-    VECTAB_ENTRY(CAN2_TX_IRQ),               /*!< CAN2 TX Interrupt                                    */
-    VECTAB_ENTRY(CAN2_RX0_IRQ),              /*!< CAN2 RX0 Interrupt                                   */
-    VECTAB_ENTRY(CAN2_RX1_IRQ),              /*!< CAN2 RX1 Interrupt                                   */
-    VECTAB_ENTRY(CAN2_SCE_IRQ),              /*!< CAN2 SCE Interrupt                                   */
-    VECTAB_ENTRY(OTG_FS_IRQ),                /*!< USB OTG FS global Interrupt                          */
-#endif /* STM32F10X_CL */
-};
-
diff --git a/platform/stm32f2xx/debug.c b/platform/stm32f2xx/debug.c
deleted file mode 100644
index 766cd9ed..00000000
--- a/platform/stm32f2xx/debug.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <debug.h>
-#include <stdio.h>
-#include <kernel/thread.h>
-#include <platform/debug.h>
-#include <arch/ops.h>
-#include <dev/uart.h>
-#include <target/debugconfig.h>
-#include <stm32f2xx_rcc.h>
-#include <stm32f2xx_usart.h>
-#include <arch/arm/cm.h>
-
-void stm32_debug_early_init(void)
-{
-    uart_init_early();
-}
-
-/* later in the init process */
-void stm32_debug_init(void)
-{
-    uart_init();
-}
-
-void platform_dputc(char c)
-{
-    if (c == '\n')
-        uart_putc(DEBUG_UART, '\r');
-    uart_putc(DEBUG_UART, c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    int ret = uart_getc(DEBUG_UART, wait);
-    if (ret == -1)
-        return -1;
-    *c = ret;
-    return 0;
-}
-
diff --git a/platform/stm32f2xx/gpio.c b/platform/stm32f2xx/gpio.c
deleted file mode 100644
index fb4bf262..00000000
--- a/platform/stm32f2xx/gpio.c
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <assert.h>
-#include <dev/gpio.h>
-#include <platform/stm32.h>
-#include <platform/gpio.h>
-#include <stm32f2xx_gpio.h>
-#include <stm32f2xx_rcc.h>
-
-static GPIO_TypeDef *port_to_pointer(unsigned int port)
-{
-    switch (port) {
-        default:
-        case GPIO_PORT_A:
-            return GPIOA;
-        case GPIO_PORT_B:
-            return GPIOB;
-        case GPIO_PORT_C:
-            return GPIOC;
-        case GPIO_PORT_D:
-            return GPIOD;
-        case GPIO_PORT_E:
-            return GPIOE;
-        case GPIO_PORT_F:
-            return GPIOF;
-        case GPIO_PORT_G:
-            return GPIOG;
-        case GPIO_PORT_H:
-            return GPIOH;
-        case GPIO_PORT_I:
-            return GPIOI;
-    }
-}
-
-static void enable_port(unsigned int port)
-{
-    DEBUG_ASSERT(port <= GPIO_PORT_I);
-
-    /* happens to be the RCC ids are sequential bits, so we can start from A and shift */
-    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA << port, ENABLE);
-}
-
-void stm32_gpio_early_init(void)
-{
-}
-
-int gpio_config(unsigned nr, unsigned flags)
-{
-
-    uint port = GPIO_PORT(nr);
-    uint pin = GPIO_PIN(nr);
-
-    enable_port(port);
-
-    GPIO_InitTypeDef init;
-    init.GPIO_Speed = GPIO_Speed_50MHz;
-    init.GPIO_Pin = (1 << pin);
-    init.GPIO_PuPd = GPIO_PuPd_NOPULL;
-
-    if (flags & GPIO_INPUT) {
-        init.GPIO_Mode = GPIO_Mode_IN;
-    } else if  (flags & GPIO_OUTPUT) {
-        init.GPIO_Mode = GPIO_Mode_OUT;
-    } else if  (flags & GPIO_STM32_AF) {
-        init.GPIO_Mode = GPIO_Mode_AF;
-        GPIO_PinAFConfig(port_to_pointer(port), pin, GPIO_AFNUM(flags));
-    }
-
-    if (flags & GPIO_PULLUP) {
-        init.GPIO_PuPd = GPIO_PuPd_UP;
-    } else if (flags & GPIO_PULLDOWN) {
-        init.GPIO_PuPd = GPIO_PuPd_DOWN;
-    }
-
-    if (flags & GPIO_STM32_OD) {
-        init.GPIO_OType = GPIO_OType_OD;
-    } else {
-        init.GPIO_OType = GPIO_OType_PP;
-    }
-
-    GPIO_Init(port_to_pointer(port), &init);
-
-    return 0;
-}
-
-void gpio_set(unsigned nr, unsigned on)
-{
-    GPIO_WriteBit(port_to_pointer(GPIO_PORT(nr)), 1 << GPIO_PIN(nr), on);
-}
-
-int gpio_get(unsigned nr)
-{
-    return GPIO_ReadInputDataBit(port_to_pointer(GPIO_PORT(nr)), 1 << GPIO_PIN(nr));
-}
-
diff --git a/platform/stm32f2xx/include/platform/gpio.h b/platform/stm32f2xx/include/platform/gpio.h
deleted file mode 100644
index 0331dbe4..00000000
--- a/platform/stm32f2xx/include/platform/gpio.h
+++ /dev/null
@@ -1,29 +0,0 @@
-#ifndef __PLATFORM_STM32_GPIO_H
-#define __PLATFORM_STM32_GPIO_H
-
-/* helper defines for STM32 platforms */
-
-/* flag to gpio_configure */
-#define GPIO_STM32_AF (0x1 << 16)
-#define GPIO_STM32_OD (0x2 << 16)
-#define GPIO_STM32_AFn(n) ((n) << 24)
-
-/* gpio port/pin is packed into a single unsigned int in 16x:8port:8pin format */
-#define GPIO(port, pin) ((unsigned int)(((port) << 8) | (pin)))
-
-#define GPIO_PORT(gpio) (((gpio) >> 8) & 0xff)
-#define GPIO_PIN(gpio) ((gpio) & 0xff)
-#define GPIO_AFNUM(gpio) (((gpio) >> 24) & 0xf)
-
-#define GPIO_PORT_A 0
-#define GPIO_PORT_B 1
-#define GPIO_PORT_C 2
-#define GPIO_PORT_D 3
-#define GPIO_PORT_E 4
-#define GPIO_PORT_F 5
-#define GPIO_PORT_G 6
-#define GPIO_PORT_H 7
-#define GPIO_PORT_I 8
-
-#endif
-
diff --git a/platform/stm32f2xx/include/platform/platform_cm.h b/platform/stm32f2xx/include/platform/platform_cm.h
deleted file mode 100644
index 506b4265..00000000
--- a/platform/stm32f2xx/include/platform/platform_cm.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_CM_H
-#define __PLATFORM_CM_H
-
-#include <stm32f2xx.h>
-
-#endif
-
diff --git a/platform/stm32f2xx/include/platform/stm32.h b/platform/stm32f2xx/include/platform/stm32.h
deleted file mode 100644
index f3633664..00000000
--- a/platform/stm32f2xx/include/platform/stm32.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_STM32_H
-#define __PLATFORM_STM32_H
-
-void stm32_debug_early_init(void);
-void stm32_debug_init(void);
-void stm32_timer_early_init(void);
-void stm32_timer_init(void);
-void stm32_gpio_early_init(void);
-void stm32_flash_nor_early_init(void);
-void stm32_flash_nor_init(void);
-
-#endif
-
diff --git a/platform/stm32f2xx/init.c b/platform/stm32f2xx/init.c
deleted file mode 100644
index 8ce41d7a..00000000
--- a/platform/stm32f2xx/init.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <debug.h>
-#include <dev/uart.h>
-#include <platform.h>
-#include <platform/stm32.h>
-#include <arch/arm/cm.h>
-#include <stm32f2xx_rcc.h>
-#include "system_stm32f2xx.h"
-
-void platform_early_init(void)
-{
-    // Crank up the clock before initing timers.
-    SystemInit();
-
-    // start the systick timer
-    RCC_ClocksTypeDef clocks;
-    RCC_GetClocksFreq(&clocks);
-    arm_cm_systick_init(clocks.SYSCLK_Frequency);
-
-    stm32_timer_early_init();
-    stm32_gpio_early_init();
-}
-
-void platform_init(void)
-{
-    stm32_timer_init();
-}
diff --git a/platform/stm32f2xx/rules.mk b/platform/stm32f2xx/rules.mk
deleted file mode 100644
index da8f58d4..00000000
--- a/platform/stm32f2xx/rules.mk
+++ /dev/null
@@ -1,67 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-# ROMBASE, MEMBASE, and MEMSIZE are required for the linker script
-ROMBASE := 0x08000000
-MEMBASE := 0x20000000
-# default memsize, specific STM32_CHIP may override this
-# and target/project may have already overridden
-MEMSIZE ?= 131072
-
-ARCH := arm
-ARM_CPU := cortex-m3
-
-ifeq ($(STM32_CHIP),stm32f207)
-GLOBAL_DEFINES += \
-	STM32F207=1	\
-	STM32F2XX=1
-FOUND_CHIP := true
-endif
-ifeq ($(STM32_CHIP),stm32f407)
-GLOBAL_DEFINES += \
-	STM32F407=1	\
-	STM32F4XX=1
-FOUND_CHIP := true
-ARM_CPU := cortex-m4
-endif
-
-ifeq ($(FOUND_CHIP),)
-$(error unknown STM32F2xx chip $(STM32_CHIP))
-endif
-
-GLOBAL_DEFINES += \
-	MEMSIZE=$(MEMSIZE)
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/init.c \
-	$(LOCAL_DIR)/vectab.c \
-	$(LOCAL_DIR)/gpio.c \
-	$(LOCAL_DIR)/timer.c \
-	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/uart.c \
-
-#	$(LOCAL_DIR)/flash_nor.c \
-	$(LOCAL_DIR)/interrupts.c \
-	$(LOCAL_DIR)/platform_early.c \
-	$(LOCAL_DIR)/platform.c \
-	$(LOCAL_DIR)/timer.c \
-	$(LOCAL_DIR)/init_clock.c \
-	$(LOCAL_DIR)/init_clock_48mhz.c \
-	$(LOCAL_DIR)/mux.c \
-	$(LOCAL_DIR)/emac_dev.c
-
-# use a two segment memory layout, where all of the read-only sections 
-# of the binary reside in rom, and the read/write are in memory. The 
-# ROMBASE, MEMBASE, and MEMSIZE make variables are required to be set 
-# for the linker script to be generated properly.
-#
-LINKER_SCRIPT += \
-	$(BUILDDIR)/system-twosegment.ld
-
-MODULE_DEPS += \
-	platform/stm32f2xx/STM32F2xx_StdPeriph_Driver \
-	arch/arm/arm-m/systick \
-	lib/cbuf
-
-include make/module.mk
diff --git a/platform/stm32f2xx/timer.c b/platform/stm32f2xx/timer.c
deleted file mode 100644
index ffe6d0f6..00000000
--- a/platform/stm32f2xx/timer.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <trace.h>
-#include <err.h>
-#include <sys/types.h>
-#include <kernel/thread.h>
-#include <platform.h>
-#include <platform/timer.h>
-#include <stm32f2xx_rcc.h>
-#include <stm32f2xx_tim.h>
-#include <misc.h>
-#include <arch/arm/cm.h>
-
-#define LOCAL_TRACE 0
-
-static void stm32_tim_irq(uint num)
-{
-    TRACEF("tim irq %d\n", num);
-    PANIC_UNIMPLEMENTED;
-}
-
-void stm32_TIM3_IRQ(void)
-{
-    stm32_tim_irq(3);
-}
-
-void stm32_TIM4_IRQ(void)
-{
-    stm32_tim_irq(4);
-}
-
-void stm32_TIM5_IRQ(void)
-{
-    stm32_tim_irq(5);
-}
-
-void stm32_TIM6_IRQ(void)
-{
-    stm32_tim_irq(6);
-}
-
-void stm32_TIM7_IRQ(void)
-{
-    stm32_tim_irq(7);
-}
-
-/* time base */
-void stm32_TIM2_IRQ(void)
-{
-    stm32_tim_irq(2);
-}
-
-void stm32_timer_early_init(void)
-{
-}
-
-void stm32_timer_init(void)
-{
-}
diff --git a/platform/stm32f2xx/uart.c b/platform/stm32f2xx/uart.c
deleted file mode 100644
index 7aa4c945..00000000
--- a/platform/stm32f2xx/uart.c
+++ /dev/null
@@ -1,256 +0,0 @@
-/*
- * Copyright (c) 2012 Kent Ryhorchuk
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <debug.h>
-#include <stdio.h>
-#include <assert.h>
-#include <lib/cbuf.h>
-#include <kernel/thread.h>
-#include <platform/debug.h>
-#include <arch/ops.h>
-#include <dev/uart.h>
-#include <target/debugconfig.h>
-#include <stm32f2xx_rcc.h>
-#include <stm32f2xx_usart.h>
-#include <arch/arm/cm.h>
-
-#define RXBUF_SIZE 16
-
-#ifdef ENABLE_UART1
-cbuf_t uart1_rx_buf;
-#ifndef UART1_FLOWCONTROL
-#define UART1_FLOWCONTROL USART_HardwareFlowControl_None
-#endif
-#endif
-
-#ifdef ENABLE_UART2
-cbuf_t uart2_rx_buf;
-#ifndef UART2_FLOWCONTROL
-#define UART2_FLOWCONTROL USART_HardwareFlowControl_None
-#endif
-#endif
-
-#ifdef ENABLE_UART3
-cbuf_t uart3_rx_buf;
-#ifndef UART3_FLOWCONTROL
-#define UART3_FLOWCONTROL USART_HardwareFlowControl_None
-#endif
-#endif
-
-#ifdef ENABLE_UART1
-#endif
-#ifdef ENABLE_UART2
-#endif
-#ifdef ENABLE_UART3
-#endif
-
-static void usart_init1_early(USART_TypeDef *usart, uint16_t flowcontrol, int irqn)
-{
-    USART_InitTypeDef init;
-
-    init.USART_BaudRate = 115200;
-    init.USART_WordLength = USART_WordLength_8b;
-    init.USART_StopBits = USART_StopBits_1;
-    init.USART_Parity = USART_Parity_No;
-    init.USART_Mode = USART_Mode_Tx|USART_Mode_Rx;
-    init.USART_HardwareFlowControl = flowcontrol;
-
-    USART_Init(usart, &init);
-    USART_ITConfig(usart, USART_IT_RXNE, DISABLE);
-    NVIC_DisableIRQ(irqn);
-    USART_Cmd(usart, ENABLE);
-}
-
-static void usart_init1(USART_TypeDef *usart, int irqn, cbuf_t *rxbuf)
-{
-    cbuf_initialize(rxbuf, RXBUF_SIZE);
-    USART_ITConfig(usart, USART_IT_RXNE, ENABLE);
-    NVIC_EnableIRQ(irqn);
-    USART_Cmd(usart, ENABLE);
-}
-
-void uart_init_early(void)
-{
-#ifdef ENABLE_UART1
-    RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
-#endif
-#ifdef ENABLE_UART2
-    RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
-#endif
-#ifdef ENABLE_UART3
-    RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
-#endif
-
-#ifdef ENABLE_UART1
-    usart_init1_early(USART1, UART1_FLOWCONTROL, USART1_IRQn);
-#endif
-#ifdef ENABLE_UART2
-    usart_init1_early(USART2, UART2_FLOWCONTROL, USART2_IRQn);
-#endif
-#ifdef ENABLE_UART3
-    usart_init1_early(USART3, UART3_FLOWCONTROL, USART3_IRQn);
-#endif
-}
-
-void uart_init(void)
-{
-#ifdef ENABLE_UART1
-    usart_init1(USART1, USART1_IRQn, &uart1_rx_buf);
-#endif
-#ifdef ENABLE_UART2
-    usart_init1(USART2, USART2_IRQn, &uart2_rx_buf);
-#endif
-#ifdef ENABLE_UART3
-    usart_init1(USART3, USART3_IRQn, &uart3_rx_buf);
-#endif
-}
-
-void uart_rx_irq(USART_TypeDef *usart, cbuf_t *rxbuf)
-{
-    arm_cm_irq_entry();
-
-    bool resched = false;
-    while (USART_GetFlagStatus(usart, USART_FLAG_RXNE)) {
-        if (!cbuf_space_avail(rxbuf)) {
-            // Overflow - let flow control do its thing by not
-            // reading the from the FIFO.
-            USART_ITConfig(usart, USART_IT_RXNE, DISABLE);
-            break;
-        }
-
-        char c = USART_ReceiveData(usart);
-        cbuf_write_char(rxbuf, c, false);
-        resched = true;
-    }
-
-    arm_cm_irq_exit(resched);
-}
-
-#ifdef ENABLE_UART1
-void stm32_USART1_IRQ(void)
-{
-    uart_rx_irq(USART1, &uart1_rx_buf);
-}
-#endif
-
-#ifdef ENABLE_UART2
-void stm32_USART2_IRQ(void)
-{
-    uart_rx_irq(USART2, &uart2_rx_buf);
-}
-#endif
-
-#ifdef ENABLE_UART3
-void stm32_USART3_IRQ(void)
-{
-    uart_rx_irq(USART3, &uart3_rx_buf);
-}
-#endif
-
-
-static void usart_putc(USART_TypeDef *usart, char c)
-{
-    while (USART_GetFlagStatus(usart, USART_FLAG_TXE) == 0);
-    USART_SendData(usart, c);
-    while (USART_GetFlagStatus(usart, USART_FLAG_TC) == 0);
-}
-
-static int usart_getc(USART_TypeDef *usart, cbuf_t *rxbuf, bool wait)
-{
-    char c;
-    cbuf_read_char(rxbuf, &c, wait);
-    if (cbuf_space_avail(rxbuf) > RXBUF_SIZE/2)
-        USART_ITConfig(usart, USART_IT_RXNE, ENABLE);
-
-    return c;
-}
-
-static USART_TypeDef *get_usart(int port)
-{
-    switch (port) {
-#ifdef ENABLE_UART1
-        case 1:
-            return USART1;
-#endif
-#ifdef ENABLE_UART2
-        case 2:
-            return USART2;
-#endif
-#ifdef ENABLE_UART3
-        case 3:
-            return USART3;
-#endif
-        default:
-            ASSERT(false);
-            return 0;
-    }
-
-}
-
-static cbuf_t *get_rxbuf(int port)
-{
-    switch (port) {
-#ifdef ENABLE_UART1
-        case 1:
-            return &uart1_rx_buf;
-#endif
-#ifdef ENABLE_UART2
-        case 2:
-            return &uart2_rx_buf;
-#endif
-#ifdef ENABLE_UART3
-        case 3:
-            return &uart3_rx_buf;
-#endif
-        default:
-            ASSERT(false);
-            return 0;
-    }
-
-}
-
-int uart_putc(int port, char c)
-{
-    USART_TypeDef *usart = get_usart(port);
-    usart_putc(usart, c);
-    return 1;
-}
-
-int uart_getc(int port, bool wait)
-{
-    cbuf_t *rxbuf = get_rxbuf(port);
-    USART_TypeDef *usart = get_usart(port);
-
-    return usart_getc(usart, rxbuf, wait);
-}
-
-void uart_flush_tx(int port) {}
-
-void uart_flush_rx(int port) {}
-
-void uart_init_port(int port, uint baud)
-{
-    // TODO - later
-    PANIC_UNIMPLEMENTED;
-}
diff --git a/platform/stm32f2xx/vectab.c b/platform/stm32f2xx/vectab.c
deleted file mode 100644
index 899f3802..00000000
--- a/platform/stm32f2xx/vectab.c
+++ /dev/null
@@ -1,220 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <compiler.h>
-#include <stm32f2xx.h>
-#include <arch/arm/cm.h>
-#include <platform/stm32.h>
-#include <target/debugconfig.h>
-#include <lib/cbuf.h>
-
-/* un-overridden irq handler */
-void stm32_dummy_irq(void)
-{
-    arm_cm_irq_entry();
-
-    panic("unhandled irq\n");
-}
-
-/* a list of default handlers that are simply aliases to the dummy handler */
-#define DEFAULT_HANDLER(x) \
-void stm32_##x(void) __WEAK_ALIAS("stm32_dummy_irq");
-
-DEFAULT_HANDLER(WWDG_IRQ);
-DEFAULT_HANDLER(PVD_IRQ);
-DEFAULT_HANDLER(TAMP_STAMP_IRQ);
-DEFAULT_HANDLER(RTC_WKUP_IRQ);
-DEFAULT_HANDLER(FLASH_IRQ);
-DEFAULT_HANDLER(RCC_IRQ);
-DEFAULT_HANDLER(EXTI0_IRQ);
-DEFAULT_HANDLER(EXTI1_IRQ);
-DEFAULT_HANDLER(EXTI2_IRQ);
-DEFAULT_HANDLER(EXTI3_IRQ);
-DEFAULT_HANDLER(EXTI4_IRQ);
-
-DEFAULT_HANDLER(DMA1_Stream0_IRQ);
-DEFAULT_HANDLER(DMA1_Stream1_IRQ);
-DEFAULT_HANDLER(DMA1_Stream2_IRQ);
-DEFAULT_HANDLER(DMA1_Stream3_IRQ);
-DEFAULT_HANDLER(DMA1_Stream4_IRQ);
-DEFAULT_HANDLER(DMA1_Stream5_IRQ);
-DEFAULT_HANDLER(DMA1_Stream6_IRQ);
-
-DEFAULT_HANDLER(ADC_IRQ);
-DEFAULT_HANDLER(CAN1_TX_IRQ);
-DEFAULT_HANDLER(CAN1_RX0_IRQ);
-DEFAULT_HANDLER(CAN1_RX1_IRQ);
-DEFAULT_HANDLER(CAN1_SCE_IRQ);
-DEFAULT_HANDLER(EXTI9_5_IRQ);
-
-DEFAULT_HANDLER(TIM1_BRK_TIM9_IRQ);
-DEFAULT_HANDLER(TIM1_UP_TIM10_IRQ);
-DEFAULT_HANDLER(TIM1_TRG_COM_TIM11_IRQ);
-DEFAULT_HANDLER(TIM1_CC_IRQ);
-DEFAULT_HANDLER(TIM2_IRQ);
-DEFAULT_HANDLER(TIM3_IRQ);
-DEFAULT_HANDLER(TIM4_IRQ);
-
-DEFAULT_HANDLER(I2C1_EV_IRQ);
-DEFAULT_HANDLER(I2C1_ER_IRQ);
-DEFAULT_HANDLER(I2C2_EV_IRQ);
-DEFAULT_HANDLER(I2C2_ER_IRQ);
-
-DEFAULT_HANDLER(SPI1_IRQ);
-DEFAULT_HANDLER(SPI2_IRQ);
-
-DEFAULT_HANDLER(USART1_IRQ);
-DEFAULT_HANDLER(USART2_IRQ);
-DEFAULT_HANDLER(USART3_IRQ);
-
-DEFAULT_HANDLER(EXTI15_10_IRQ);
-DEFAULT_HANDLER(RTC_Alarm_IRQ);
-DEFAULT_HANDLER(OTG_FS_WKUP_IRQ);
-DEFAULT_HANDLER(TIM8_BRK_TIM12_IRQ);
-DEFAULT_HANDLER(TIM8_UP_TIM13_IRQ);
-DEFAULT_HANDLER(TIM8_TRG_COM_TIM14_IRQ);
-DEFAULT_HANDLER(TIM8_CC_IRQ);
-DEFAULT_HANDLER(DMA1_Stream7_IRQ);
-DEFAULT_HANDLER(FSMC_IRQ);
-DEFAULT_HANDLER(SDIO_IRQ);
-DEFAULT_HANDLER(TIM5_IRQ);
-DEFAULT_HANDLER(SPI3_IRQ);
-DEFAULT_HANDLER(UART4_IRQ);
-DEFAULT_HANDLER(UART5_IRQ);
-DEFAULT_HANDLER(TIM6_DAC_IRQ);
-DEFAULT_HANDLER(TIM7_IRQ);
-
-DEFAULT_HANDLER(DMA2_Stream0_IRQ);
-DEFAULT_HANDLER(DMA2_Stream1_IRQ);
-DEFAULT_HANDLER(DMA2_Stream2_IRQ);
-DEFAULT_HANDLER(DMA2_Stream3_IRQ);
-DEFAULT_HANDLER(DMA2_Stream4_IRQ);
-
-DEFAULT_HANDLER(ETH_IRQ);
-DEFAULT_HANDLER(ETH_WKUP_IRQ);
-DEFAULT_HANDLER(CAN2_TX_IRQ);
-DEFAULT_HANDLER(CAN2_RX0_IRQ);
-DEFAULT_HANDLER(CAN2_RX1_IRQ);
-DEFAULT_HANDLER(CAN2_SCE_IRQ);
-DEFAULT_HANDLER(OTG_FS_IRQ);
-DEFAULT_HANDLER(DMA2_Stream5_IRQ);
-DEFAULT_HANDLER(DMA2_Stream6_IRQ);
-DEFAULT_HANDLER(DMA2_Stream7_IRQ);
-DEFAULT_HANDLER(USART6_IRQ);
-DEFAULT_HANDLER(I2C3_EV_IRQ);
-DEFAULT_HANDLER(I2C3_ER_IRQ);
-DEFAULT_HANDLER(OTG_HS_EP1_OUT_IRQ);
-DEFAULT_HANDLER(OTG_HS_EP1_IN_IRQ);
-DEFAULT_HANDLER(OTG_HS_WKUP_IRQ);
-DEFAULT_HANDLER(OTG_HS_IRQ);
-DEFAULT_HANDLER(DCMI_IRQ);
-DEFAULT_HANDLER(CRYP_IRQ);
-DEFAULT_HANDLER(HASH_RNG_IRQ);
-
-#define VECTAB_ENTRY(x) [x##n] = stm32_##x
-
-/* appended to the end of the main vector table */
-const void *const __SECTION(".text.boot.vectab2") vectab2[] = {
-    VECTAB_ENTRY(WWDG_IRQ),                 /* Window WatchDog Interrupt                                         */
-    VECTAB_ENTRY(PVD_IRQ),                  /* PVD through EXTI Line detection Interrupt                         */
-    VECTAB_ENTRY(TAMP_STAMP_IRQ),           /* Tamper and TimeStamp interrupts through the EXTI line             */
-    VECTAB_ENTRY(RTC_WKUP_IRQ),             /* RTC Wakeup interrupt through the EXTI line                        */
-    VECTAB_ENTRY(FLASH_IRQ),                /* FLASH global Interrupt                                            */
-    VECTAB_ENTRY(RCC_IRQ),                  /* RCC global Interrupt                                              */
-    VECTAB_ENTRY(EXTI0_IRQ),                /* EXTI Line0 Interrupt                                              */
-    VECTAB_ENTRY(EXTI1_IRQ),                /* EXTI Line1 Interrupt                                              */
-    VECTAB_ENTRY(EXTI2_IRQ),                /* EXTI Line2 Interrupt                                              */
-    VECTAB_ENTRY(EXTI3_IRQ),                /* EXTI Line3 Interrupt                                              */
-    VECTAB_ENTRY(EXTI4_IRQ),                /* EXTI Line4 Interrupt                                              */
-    VECTAB_ENTRY(DMA1_Stream0_IRQ),         /* DMA1 Stream 0 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream1_IRQ),         /* DMA1 Stream 1 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream2_IRQ),         /* DMA1 Stream 2 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream3_IRQ),         /* DMA1 Stream 3 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream4_IRQ),         /* DMA1 Stream 4 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream5_IRQ),         /* DMA1 Stream 5 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream6_IRQ),         /* DMA1 Stream 6 global Interrupt                                    */
-    VECTAB_ENTRY(ADC_IRQ),                  /* ADC1, ADC2 and ADC3 global Interrupts                             */
-    VECTAB_ENTRY(CAN1_TX_IRQ),              /* CAN1 TX Interrupt                                                 */
-    VECTAB_ENTRY(CAN1_RX0_IRQ),             /* CAN1 RX0 Interrupt                                                */
-    VECTAB_ENTRY(CAN1_RX1_IRQ),             /* CAN1 RX1 Interrupt                                                */
-    VECTAB_ENTRY(CAN1_SCE_IRQ),             /* CAN1 SCE Interrupt                                                */
-    VECTAB_ENTRY(EXTI9_5_IRQ),              /* External Line[9:5] Interrupts                                     */
-    VECTAB_ENTRY(TIM1_BRK_TIM9_IRQ),        /* TIM1 Break interrupt and TIM9 global interrupt                    */
-    VECTAB_ENTRY(TIM1_UP_TIM10_IRQ),        /* TIM1 Update Interrupt and TIM10 global interrupt                  */
-    VECTAB_ENTRY(TIM1_TRG_COM_TIM11_IRQ),   /* TIM1 Trigger and Commutation Interrupt and TIM11 global interrupt */
-    VECTAB_ENTRY(TIM1_CC_IRQ),              /* TIM1 Capture Compare Interrupt                                    */
-    VECTAB_ENTRY(TIM2_IRQ),                 /* TIM2 global Interrupt                                             */
-    VECTAB_ENTRY(TIM3_IRQ),                 /* TIM3 global Interrupt                                             */
-    VECTAB_ENTRY(TIM4_IRQ),                 /* TIM4 global Interrupt                                             */
-    VECTAB_ENTRY(I2C1_EV_IRQ),              /* I2C1 Event Interrupt                                              */
-    VECTAB_ENTRY(I2C1_ER_IRQ),              /* I2C1 Error Interrupt                                              */
-    VECTAB_ENTRY(I2C2_EV_IRQ),              /* I2C2 Event Interrupt                                              */
-    VECTAB_ENTRY(I2C2_ER_IRQ),              /* I2C2 Error Interrupt                                              */
-    VECTAB_ENTRY(SPI1_IRQ),                 /* SPI1 global Interrupt                                             */
-    VECTAB_ENTRY(SPI2_IRQ),                 /* SPI2 global Interrupt                                             */
-    VECTAB_ENTRY(USART1_IRQ),               /* USART1 global Interrupt                                           */
-    VECTAB_ENTRY(USART2_IRQ),               /* USART2 global Interrupt                                           */
-    VECTAB_ENTRY(USART3_IRQ),               /* USART3 global Interrupt                                           */
-    VECTAB_ENTRY(EXTI15_10_IRQ),            /* External Line[15:10] Interrupts                                   */
-    VECTAB_ENTRY(RTC_Alarm_IRQ),            /* RTC Alarm (A and B) through EXTI Line Interrupt                   */
-    VECTAB_ENTRY(OTG_FS_WKUP_IRQ),          /* USB OTG FS Wakeup through EXTI line interrupt                     */
-    VECTAB_ENTRY(TIM8_BRK_TIM12_IRQ),       /* TIM8 Break Interrupt and TIM12 global interrupt                   */
-    VECTAB_ENTRY(TIM8_UP_TIM13_IRQ),        /* TIM8 Update Interrupt and TIM13 global interrupt                  */
-    VECTAB_ENTRY(TIM8_TRG_COM_TIM14_IRQ),   /* TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt */
-    VECTAB_ENTRY(TIM8_CC_IRQ),              /* TIM8 Capture Compare Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream7_IRQ),         /* DMA1 Stream7 Interrupt                                            */
-    VECTAB_ENTRY(FSMC_IRQ),                 /* FSMC global Interrupt                                             */
-    VECTAB_ENTRY(SDIO_IRQ),                 /* SDIO global Interrupt                                             */
-    VECTAB_ENTRY(TIM5_IRQ),                 /* TIM5 global Interrupt                                             */
-    VECTAB_ENTRY(SPI3_IRQ),                 /* SPI3 global Interrupt                                             */
-    VECTAB_ENTRY(UART4_IRQ),                /* UART4 global Interrupt                                            */
-    VECTAB_ENTRY(UART5_IRQ),                /* UART5 global Interrupt                                            */
-    VECTAB_ENTRY(TIM6_DAC_IRQ),             /* TIM6 global and DAC1&2 underrun error  interrupts                 */
-    VECTAB_ENTRY(TIM7_IRQ),                 /* TIM7 global interrupt                                             */
-    VECTAB_ENTRY(DMA2_Stream0_IRQ),         /* DMA2 Stream 0 global Interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream1_IRQ),         /* DMA2 Stream 1 global Interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream2_IRQ),         /* DMA2 Stream 2 global Interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream3_IRQ),         /* DMA2 Stream 3 global Interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream4_IRQ),         /* DMA2 Stream 4 global Interrupt                                    */
-    VECTAB_ENTRY(ETH_IRQ),                  /* Ethernet global Interrupt                                         */
-    VECTAB_ENTRY(ETH_WKUP_IRQ),             /* Ethernet Wakeup through EXTI line Interrupt                       */
-    VECTAB_ENTRY(CAN2_TX_IRQ),              /* CAN2 TX Interrupt                                                 */
-    VECTAB_ENTRY(CAN2_RX0_IRQ),             /* CAN2 RX0 Interrupt                                                */
-    VECTAB_ENTRY(CAN2_RX1_IRQ),             /* CAN2 RX1 Interrupt                                                */
-    VECTAB_ENTRY(CAN2_SCE_IRQ),             /* CAN2 SCE Interrupt                                                */
-    VECTAB_ENTRY(OTG_FS_IRQ),               /* USB OTG FS global Interrupt                                       */
-    VECTAB_ENTRY(DMA2_Stream5_IRQ),         /* DMA2 Stream 5 global interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream6_IRQ),         /* DMA2 Stream 6 global interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream7_IRQ),         /* DMA2 Stream 7 global interrupt                                    */
-    VECTAB_ENTRY(USART6_IRQ),               /* USART6 global interrupt                                           */
-    VECTAB_ENTRY(I2C3_EV_IRQ),              /* I2C3 event interrupt                                              */
-    VECTAB_ENTRY(I2C3_ER_IRQ),              /* I2C3 error interrupt                                              */
-    VECTAB_ENTRY(OTG_HS_EP1_OUT_IRQ),       /* USB OTG HS End Point 1 Out global interrupt                       */
-    VECTAB_ENTRY(OTG_HS_EP1_IN_IRQ),        /* USB OTG HS End Point 1 In global interrupt                        */
-    VECTAB_ENTRY(OTG_HS_WKUP_IRQ),          /* USB OTG HS Wakeup through EXTI interrupt                          */
-    VECTAB_ENTRY(OTG_HS_IRQ),               /* USB OTG HS global interrupt                                       */
-    VECTAB_ENTRY(DCMI_IRQ),                 /* DCMI global interrupt                                             */
-    VECTAB_ENTRY(CRYP_IRQ),                 /* CRYP crypto global interrupt                                      */
-    VECTAB_ENTRY(HASH_RNG_IRQ),             /* Hash and Rng global interrupt                                     */
-};
-
diff --git a/platform/stm32f4xx/debug.c b/platform/stm32f4xx/debug.c
deleted file mode 100644
index c7b74a0d..00000000
--- a/platform/stm32f4xx/debug.c
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <debug.h>
-#include <stdio.h>
-#include <kernel/thread.h>
-#include <platform/debug.h>
-#include <arch/ops.h>
-#include <dev/uart.h>
-#include <target/debugconfig.h>
-#include <stm32f4xx_rcc.h>
-#include <stm32f4xx_usart.h>
-#include <arch/arm/cm.h>
-
-void stm32_debug_early_init(void)
-{
-    uart_init_early();
-}
-
-/* later in the init process */
-void stm32_debug_init(void)
-{
-    uart_init();
-}
-
-#define ITM_STIM0   0xE0000000
-#define ITM_TCR     0xE0000E80
-
-void platform_dputc(char c)
-{
-    // if ITM is enabled, send character to STIM0
-    if (readl(ITM_TCR) & 1) {
-        while (!readl(ITM_STIM0)) ;
-        writeb(c, ITM_STIM0);
-    }
-
-    if (c == '\n')
-        uart_putc(DEBUG_UART, '\r');
-    uart_putc(DEBUG_UART, c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    int ret = uart_getc(DEBUG_UART, wait);
-    if (ret == -1)
-        return -1;
-    *c = ret;
-    return 0;
-}
-
-void __debugger_console_putc(char c);
-
-#define DCRDR 0xE000EDF8
-
-void _debugmonitor(void)
-{
-    u32 n;
-    arm_cm_irq_entry();
-    n = readl(DCRDR);
-    if (n & 0x80000000) {
-        switch (n >> 24) {
-            case 0x80: // write to console
-                __debugger_console_putc(n & 0xFF);
-                n = 0;
-                break;
-            default:
-                n = 0x01000000;
-        }
-        writel(n, DCRDR);
-    }
-    arm_cm_irq_exit(1);
-}
diff --git a/platform/stm32f4xx/flash.c b/platform/stm32f4xx/flash.c
deleted file mode 100644
index 60fbd80f..00000000
--- a/platform/stm32f4xx/flash.c
+++ /dev/null
@@ -1,169 +0,0 @@
-// Copyright (C) 2015 Playground Global LLC.  All rights reserved.
-
-#include <debug.h>
-#include <assert.h>
-#include <trace.h>
-#include <compiler.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <err.h>
-#include <string.h>
-#include <reg.h>
-#include <lib/bio.h>
-#include <lib/console.h>
-#include <kernel/thread.h>
-#include <stm32f4xx_flash.h>
-
-#define LOCAL_TRACE 0
-
-#define SECTORS 12
-
-static u32 sectors[SECTORS + 1] = {
-    0x08000000,
-    0x08004000,
-    0x08008000,
-    0x0800C000,
-    0x08010000,
-    0x08020000,
-    0x08040000,
-    0x08060000,
-    0x08080000,
-    0x080A0000,
-    0x080C0000,
-    0x080E0000,
-    0x08100000,
-};
-
-
-typedef struct intflash_s {
-    bool initialized;
-    bdev_t bdev;
-    uint32_t start;
-} intflash_t;
-
-static intflash_t sg_flash = { 0 };
-static ssize_t stmflash_bdev_read(struct bdev *, void *buf, off_t offset, size_t len);
-static ssize_t stmflash_bdev_read_block(struct bdev *, void *buf, bnum_t block, uint count);
-static ssize_t stmflash_bdev_write(struct bdev *, const void *buf, off_t offset, size_t len);
-static ssize_t stmflash_bdev_write_block(struct bdev *, const void *buf, bnum_t block, uint count);
-static ssize_t stmflash_bdev_erase(struct bdev *, off_t offset, size_t len);
-static int stmflash_ioctl(struct bdev *, int request, void *argp);
-
-status_t stmflash_init(uint32_t start, uint32_t length)
-{
-    memset(&sg_flash, 0, sizeof(intflash_t));
-    sg_flash.start  = start;
-    /* construct the block device */
-    bio_initialize_bdev(&sg_flash.bdev,
-                        "flash0",
-                        1,
-                        length,
-                        0,
-                        NULL,
-                        BIO_FLAGS_NONE);
-
-    /* override our block device hooks */
-    sg_flash.bdev.read        = &stmflash_bdev_read;
-    sg_flash.bdev.read_block  = &stmflash_bdev_read_block;
-    sg_flash.bdev.write       = &stmflash_bdev_write;
-    sg_flash.bdev.write_block = &stmflash_bdev_write_block;
-    sg_flash.bdev.erase       = &stmflash_bdev_erase;
-    sg_flash.bdev.ioctl       = &stmflash_ioctl;
-    bio_register_device(&sg_flash.bdev);
-    sg_flash.initialized = true;
-    return NO_ERROR;
-}
-
-// bio layer hooks
-static ssize_t stmflash_bdev_read(struct bdev *bdev, void *buf, off_t offset, size_t len)
-{
-    uint32_t startAddress = sg_flash.start;
-    LTRACEF("dev %p, buf %p, offset 0x%llx, len 0x%zx\n", bdev, buf, offset, len);
-    len = bio_trim_range(bdev, offset, len);
-    if (0 == len) {
-        return 0;
-    }
-    startAddress += offset;
-    memcpy(buf, (uint32_t *)(startAddress), len);
-    return len;
-}
-
-static ssize_t stmflash_bdev_read_block(struct bdev *bdev, void *buf, bnum_t block, uint count)
-{
-    LTRACEF("dev %p, buf %p, block 0x%x, count %u\n",bdev, buf, block, count);
-    return 0;
-}
-
-static ssize_t stmflash_bdev_write(struct bdev *bdev, const void *buf, off_t offset, size_t len)
-{
-    uint32_t i, start_address;
-    LTRACEF("dev %p, buf %p, offset 0x%llx, len 0x%zx\n",bdev, buf, offset, len);
-    len = bio_trim_range(bdev, offset, len);
-    if (0 == len) {
-        return 0;
-    }
-    start_address = sg_flash.start+offset;
-    FLASH_Unlock();
-    FLASH_ClearFlag(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |
-                    FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR);
-    const uint32_t *_buf = buf;
-    for (i = 0; i < len / 4; i++) {
-        if (FLASH_COMPLETE == FLASH_ProgramWord(start_address,_buf[i])) {
-            start_address += 4;
-        } else {
-            len = 0;
-            break;
-        }
-    }
-    FLASH_Lock();
-    return len;
-}
-
-static ssize_t stmflash_bdev_write_block(struct bdev *bdev, const void *_buf, bnum_t block, uint count)
-{
-    LTRACEF("dev %p, buf %p, block 0x%x, count %u\n",bdev, _buf, block, count);
-    count = bio_trim_block_range(bdev, block, count);
-    return 0;
-}
-
-static ssize_t stmflash_bdev_erase(struct bdev *bdev, off_t offset, size_t len)
-{
-    uint8_t  n;
-    LTRACEF("dev %p, offset 0x%llx, len 0x%zx\n",bdev, offset, len);
-    len = bio_trim_range(bdev, offset, len);
-    if (0 == len) {
-        return 0;
-    }
-    for (n = 0; n < SECTORS; n++) {
-        if (sectors[n] == sg_flash.start+offset) {
-            break;
-        }
-    }
-    if (SECTORS == n) {
-        return 0;
-    }
-    FLASH_Unlock();
-    FLASH_ClearFlag(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |
-                    FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR|FLASH_FLAG_PGSERR);
-    for (;;) {
-        if (FLASH_EraseSector(n<<3, VoltageRange_3) != FLASH_COMPLETE) {
-            FLASH_Lock();
-            return 0;
-        }
-        n++;
-        if (SECTORS == n) {
-            break;
-        }
-        if ((sectors[n] - (sg_flash.start+offset)) >= len) {
-            break;
-        }
-    }
-    FLASH_Lock();
-    return len;
-}
-
-static int stmflash_ioctl(struct bdev *bdev, int request, void *argp)
-{
-    LTRACEF("dev %p, request %d, argp %p\n",bdev, request, argp);
-    return ERR_NOT_SUPPORTED;
-}
diff --git a/platform/stm32f4xx/gpio.c b/platform/stm32f4xx/gpio.c
deleted file mode 100644
index cdad97ed..00000000
--- a/platform/stm32f4xx/gpio.c
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <assert.h>
-#include <dev/gpio.h>
-#include <platform/stm32.h>
-#include <platform/gpio.h>
-#include <stm32f4xx_gpio.h>
-#include <stm32f4xx_rcc.h>
-
-static GPIO_TypeDef *port_to_pointer(unsigned int port)
-{
-    switch (port) {
-        default:
-        case GPIO_PORT_A:
-            return GPIOA;
-        case GPIO_PORT_B:
-            return GPIOB;
-        case GPIO_PORT_C:
-            return GPIOC;
-        case GPIO_PORT_D:
-            return GPIOD;
-        case GPIO_PORT_E:
-            return GPIOE;
-        case GPIO_PORT_F:
-            return GPIOF;
-        case GPIO_PORT_G:
-            return GPIOG;
-        case GPIO_PORT_H:
-            return GPIOH;
-        case GPIO_PORT_I:
-            return GPIOI;
-    }
-}
-
-static void enable_port(unsigned int port)
-{
-    DEBUG_ASSERT(port <= GPIO_PORT_I);
-
-    /* happens to be the RCC ids are sequential bits, so we can start from A and shift */
-    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA << port, ENABLE);
-}
-
-void stm32_gpio_early_init(void)
-{
-}
-
-int gpio_config(unsigned nr, unsigned flags)
-{
-
-    uint port = GPIO_PORT(nr);
-    uint pin = GPIO_PIN(nr);
-
-    enable_port(port);
-
-    GPIO_InitTypeDef init;
-    init.GPIO_Speed = GPIO_Speed_50MHz;
-    init.GPIO_Pin = (1 << pin);
-    init.GPIO_PuPd = GPIO_PuPd_NOPULL;
-
-    if (flags & GPIO_INPUT) {
-        init.GPIO_Mode = GPIO_Mode_IN;
-    } else if  (flags & GPIO_OUTPUT) {
-        init.GPIO_Mode = GPIO_Mode_OUT;
-    } else if  (flags & GPIO_STM32_AF) {
-        init.GPIO_Mode = GPIO_Mode_AF;
-        GPIO_PinAFConfig(port_to_pointer(port), pin, GPIO_AFNUM(flags));
-    }
-
-    if (flags & GPIO_PULLUP) {
-        init.GPIO_PuPd = GPIO_PuPd_UP;
-    } else if (flags & GPIO_PULLDOWN) {
-        init.GPIO_PuPd = GPIO_PuPd_DOWN;
-    }
-
-    if (flags & GPIO_STM32_OD) {
-        init.GPIO_OType = GPIO_OType_OD;
-    } else {
-        init.GPIO_OType = GPIO_OType_PP;
-    }
-
-    GPIO_Init(port_to_pointer(port), &init);
-
-    return 0;
-}
-
-void gpio_set(unsigned nr, unsigned on)
-{
-    GPIO_WriteBit(port_to_pointer(GPIO_PORT(nr)), 1 << GPIO_PIN(nr), on);
-}
-
-int gpio_get(unsigned nr)
-{
-    return GPIO_ReadInputDataBit(port_to_pointer(GPIO_PORT(nr)), 1 << GPIO_PIN(nr));
-}
-
diff --git a/platform/stm32f4xx/include/dev/stmflash.h b/platform/stm32f4xx/include/dev/stmflash.h
deleted file mode 100644
index 68049b7d..00000000
--- a/platform/stm32f4xx/include/dev/stmflash.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#pragma once
-#include <sys/types.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-status_t stmflash_init(uint32_t start, uint32_t length);
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/platform/stm32f4xx/include/platform/gpio.h b/platform/stm32f4xx/include/platform/gpio.h
deleted file mode 100644
index 0331dbe4..00000000
--- a/platform/stm32f4xx/include/platform/gpio.h
+++ /dev/null
@@ -1,29 +0,0 @@
-#ifndef __PLATFORM_STM32_GPIO_H
-#define __PLATFORM_STM32_GPIO_H
-
-/* helper defines for STM32 platforms */
-
-/* flag to gpio_configure */
-#define GPIO_STM32_AF (0x1 << 16)
-#define GPIO_STM32_OD (0x2 << 16)
-#define GPIO_STM32_AFn(n) ((n) << 24)
-
-/* gpio port/pin is packed into a single unsigned int in 16x:8port:8pin format */
-#define GPIO(port, pin) ((unsigned int)(((port) << 8) | (pin)))
-
-#define GPIO_PORT(gpio) (((gpio) >> 8) & 0xff)
-#define GPIO_PIN(gpio) ((gpio) & 0xff)
-#define GPIO_AFNUM(gpio) (((gpio) >> 24) & 0xf)
-
-#define GPIO_PORT_A 0
-#define GPIO_PORT_B 1
-#define GPIO_PORT_C 2
-#define GPIO_PORT_D 3
-#define GPIO_PORT_E 4
-#define GPIO_PORT_F 5
-#define GPIO_PORT_G 6
-#define GPIO_PORT_H 7
-#define GPIO_PORT_I 8
-
-#endif
-
diff --git a/platform/stm32f4xx/include/platform/platform_cm.h b/platform/stm32f4xx/include/platform/platform_cm.h
deleted file mode 100644
index 7cee6c8f..00000000
--- a/platform/stm32f4xx/include/platform/platform_cm.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_CM_H
-#define __PLATFORM_CM_H
-
-#include <stm32f4xx.h>
-
-#endif
-
diff --git a/platform/stm32f4xx/include/platform/stm32.h b/platform/stm32f4xx/include/platform/stm32.h
deleted file mode 100644
index f3633664..00000000
--- a/platform/stm32f4xx/include/platform/stm32.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_STM32_H
-#define __PLATFORM_STM32_H
-
-void stm32_debug_early_init(void);
-void stm32_debug_init(void);
-void stm32_timer_early_init(void);
-void stm32_timer_init(void);
-void stm32_gpio_early_init(void);
-void stm32_flash_nor_early_init(void);
-void stm32_flash_nor_init(void);
-
-#endif
-
diff --git a/platform/stm32f4xx/init.c b/platform/stm32f4xx/init.c
deleted file mode 100644
index 3fa7c7b9..00000000
--- a/platform/stm32f4xx/init.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <debug.h>
-#include <dev/uart.h>
-#include <platform.h>
-#include <platform/stm32.h>
-#include <arch/arm/cm.h>
-#include <stm32f4xx_rcc.h>
-#include "system_stm32f4xx.h"
-
-void platform_early_init(void)
-{
-    // Crank up the clock before initing timers.
-    SystemInit();
-
-    // start the systick timer
-    RCC_ClocksTypeDef clocks;
-    RCC_GetClocksFreq(&clocks);
-    arm_cm_systick_init(clocks.SYSCLK_Frequency);
-
-    stm32_timer_early_init();
-    stm32_gpio_early_init();
-}
-
-void platform_init(void)
-{
-    stm32_timer_init();
-}
diff --git a/platform/stm32f4xx/rules.mk b/platform/stm32f4xx/rules.mk
deleted file mode 100644
index 33c0535e..00000000
--- a/platform/stm32f4xx/rules.mk
+++ /dev/null
@@ -1,56 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-# ROMBASE, MEMBASE, and MEMSIZE are required for the linker script
-ROMBASE ?= 0x08000000
-MEMBASE ?= 0x20000000
-# default memsize, specific STM32_CHIP may override this
-# and target/project may have already overridden
-MEMSIZE ?= 131072
-
-ARCH := arm
-ARM_CPU := cortex-m4
-
-# TODO: integrate better with platform/stm32f4xx/CMSIS/stm32f4xx.h
-ifeq ($(STM32_CHIP),stm32f407)
-GLOBAL_DEFINES += STM32F40_41xxx 
-FOUND_CHIP := true
-endif
-ifeq ($(STM32_CHIP),stm32f417)
-FOUND_CHIP := true
-GLOBAL_DEFINES += STM32F40_41xxx
-endif
-
-ifeq ($(FOUND_CHIP),)
-$(error unknown STM32F4xx chip $(STM32_CHIP))
-endif
-
-GLOBAL_INCLUDES += \
-	$(LOCAL_DIR)/include/dev
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/init.c \
-	$(LOCAL_DIR)/vectab.c \
-	$(LOCAL_DIR)/gpio.c \
-	$(LOCAL_DIR)/timer.c \
-	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/uart.c \
-	$(LOCAL_DIR)/flash.c
-
-# use a two segment memory layout, where all of the read-only sections 
-# of the binary reside in rom, and the read/write are in memory. The 
-# ROMBASE, MEMBASE, and MEMSIZE make variables are required to be set 
-# for the linker script to be generated properly.
-#
-LINKER_SCRIPT += \
-	$(BUILDDIR)/system-twosegment.ld
-
-MODULE_DEPS += \
-	platform/stm32 \
-	platform/stm32f4xx/STM32F4xx_StdPeriph_Driver \
-	arch/arm/arm-m/systick \
-	lib/cbuf \
-	lib/bio
-
-include make/module.mk
diff --git a/platform/stm32f4xx/timer.c b/platform/stm32f4xx/timer.c
deleted file mode 100644
index 813ffc3c..00000000
--- a/platform/stm32f4xx/timer.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <trace.h>
-#include <err.h>
-#include <sys/types.h>
-#include <kernel/thread.h>
-#include <platform.h>
-#include <platform/timer.h>
-#include <stm32f4xx_rcc.h>
-#include <stm32f4xx_tim.h>
-#include <misc.h>
-#include <arch/arm/cm.h>
-
-#define LOCAL_TRACE 0
-
-static void stm32_tim_irq(uint num)
-{
-    TRACEF("tim irq %d\n", num);
-    PANIC_UNIMPLEMENTED;
-}
-
-void stm32_TIM3_IRQ(void)
-{
-    stm32_tim_irq(3);
-}
-
-void stm32_TIM4_IRQ(void)
-{
-    stm32_tim_irq(4);
-}
-
-void stm32_TIM5_IRQ(void)
-{
-    stm32_tim_irq(5);
-}
-
-void stm32_TIM6_IRQ(void)
-{
-    stm32_tim_irq(6);
-}
-
-void stm32_TIM7_IRQ(void)
-{
-    stm32_tim_irq(7);
-}
-
-/* time base */
-void stm32_TIM2_IRQ(void)
-{
-    stm32_tim_irq(2);
-}
-
-void stm32_timer_early_init(void)
-{
-}
-
-void stm32_timer_init(void)
-{
-}
diff --git a/platform/stm32f4xx/uart.c b/platform/stm32f4xx/uart.c
deleted file mode 100644
index d26fa470..00000000
--- a/platform/stm32f4xx/uart.c
+++ /dev/null
@@ -1,330 +0,0 @@
-/*
- * Copyright (c) 2012 Kent Ryhorchuk
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <debug.h>
-#include <stdio.h>
-#include <assert.h>
-#include <lib/cbuf.h>
-#include <kernel/thread.h>
-#include <platform/debug.h>
-#include <arch/ops.h>
-#include <dev/uart.h>
-#include <target/debugconfig.h>
-#include <stm32f4xx_rcc.h>
-#include <stm32f4xx_usart.h>
-#include <arch/arm/cm.h>
-
-#ifdef ENABLE_UART1
-cbuf_t uart1_rx_buf;
-#ifndef UART1_FLOWCONTROL
-#define UART1_FLOWCONTROL USART_HardwareFlowControl_None
-#endif
-#ifndef UART1_BAUDRATE
-#define UART1_BAUDRATE 115200
-#endif
-#ifndef UART1_RXBUF_SIZE
-#define UART1_RXBUF_SIZE 64
-#endif
-#endif
-
-#ifdef ENABLE_UART2
-cbuf_t uart2_rx_buf;
-#ifndef UART2_FLOWCONTROL
-#define UART2_FLOWCONTROL USART_HardwareFlowControl_None
-#endif
-#ifndef UART2_BAUDRATE
-#define UART2_BAUDRATE 115200
-#endif
-#ifndef UART2_RXBUF_SIZE
-#define UART2_RXBUF_SIZE 64
-#endif
-#endif
-
-#ifdef ENABLE_UART3
-cbuf_t uart3_rx_buf;
-#ifndef UART3_FLOWCONTROL
-#define UART3_FLOWCONTROL USART_HardwareFlowControl_None
-#endif
-#ifndef UART3_BAUDRATE
-#define UART3_BAUDRATE 115200
-#endif
-#ifndef UART3_RXBUF_SIZE
-#define UART3_RXBUF_SIZE 64
-#endif
-#endif
-
-#ifdef ENABLE_UART6
-cbuf_t uart6_rx_buf;
-#ifndef UART6_FLOWCONTROL
-#define UART6_FLOWCONTROL USART_HardwareFlowControl_None
-#endif
-#ifndef UART6_BAUDRATE
-#define UART6_BAUDRATE 115200
-#endif
-#ifndef UART6_RXBUF_SIZE
-#define UART6_RXBUF_SIZE 64
-#endif
-#endif
-
-static void usart_init1_early(USART_TypeDef *usart, uint32_t baud, uint16_t flowcontrol, int irqn)
-{
-    USART_InitTypeDef init;
-
-    init.USART_BaudRate = baud;
-    init.USART_WordLength = USART_WordLength_8b;
-    init.USART_StopBits = USART_StopBits_1;
-    init.USART_Parity = USART_Parity_No;
-    init.USART_Mode = USART_Mode_Tx|USART_Mode_Rx;
-    init.USART_HardwareFlowControl = flowcontrol;
-
-    USART_Init(usart, &init);
-    USART_ITConfig(usart, USART_IT_RXNE, DISABLE);
-    NVIC_DisableIRQ(irqn);
-    USART_Cmd(usart, ENABLE);
-}
-
-static void usart_init1(USART_TypeDef *usart, int irqn, cbuf_t *rxbuf, size_t rxsize)
-{
-    cbuf_initialize(rxbuf, rxsize);
-    USART_ITConfig(usart, USART_IT_RXNE, ENABLE);
-    NVIC_EnableIRQ(irqn);
-    USART_Cmd(usart, ENABLE);
-}
-
-void uart_init_early(void)
-{
-#ifdef ENABLE_UART1
-    RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
-    usart_init1_early(USART1, UART1_BAUDRATE, UART1_FLOWCONTROL, USART1_IRQn);
-#endif
-#ifdef ENABLE_UART2
-    RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
-    usart_init1_early(USART2, UART2_BAUDRATE, UART2_FLOWCONTROL, USART2_IRQn);
-#endif
-#ifdef ENABLE_UART3
-    RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
-    usart_init1_early(USART3, UART3_BAUDRATE, UART3_FLOWCONTROL, USART3_IRQn);
-#endif
-#ifdef ENABLE_UART6
-    RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART6, ENABLE);
-    usart_init1_early(USART6, UART6_BAUDRATE, UART6_FLOWCONTROL, USART6_IRQn);
-#endif
-}
-
-void uart_init(void)
-{
-#ifdef ENABLE_UART1
-    usart_init1(USART1, USART1_IRQn, &uart1_rx_buf, UART1_RXBUF_SIZE);
-#endif
-#ifdef ENABLE_UART2
-    usart_init1(USART2, USART2_IRQn, &uart2_rx_buf, UART2_RXBUF_SIZE);
-#endif
-#ifdef ENABLE_UART3
-    usart_init1(USART3, USART3_IRQn, &uart3_rx_buf, UART3_RXBUF_SIZE);
-#endif
-#ifdef ENABLE_UART6
-    usart_init1(USART6, USART6_IRQn, &uart6_rx_buf, UART6_RXBUF_SIZE);
-#endif
-}
-
-void uart_rx_irq(USART_TypeDef *usart, cbuf_t *rxbuf)
-{
-    arm_cm_irq_entry();
-
-    bool resched = false;
-    while (USART_GetFlagStatus(usart, USART_FLAG_RXNE)) {
-        if (!cbuf_space_avail(rxbuf)) {
-            // Overflow - let flow control do its thing by not
-            // reading the from the FIFO.
-            USART_ITConfig(usart, USART_IT_RXNE, DISABLE);
-            break;
-        }
-
-        char c = USART_ReceiveData(usart);
-        cbuf_write_char(rxbuf, c, false);
-        resched = true;
-    }
-
-    arm_cm_irq_exit(resched);
-}
-
-#ifdef ENABLE_UART1
-void stm32_USART1_IRQ(void)
-{
-    uart_rx_irq(USART1, &uart1_rx_buf);
-}
-#endif
-
-#ifdef ENABLE_UART2
-void stm32_USART2_IRQ(void)
-{
-    uart_rx_irq(USART2, &uart2_rx_buf);
-}
-#endif
-
-#ifdef ENABLE_UART3
-void stm32_USART3_IRQ(void)
-{
-    uart_rx_irq(USART3, &uart3_rx_buf);
-}
-#endif
-
-#ifdef ENABLE_UART6
-void stm32_USART6_IRQ(void)
-{
-    uart_rx_irq(USART6, &uart6_rx_buf);
-}
-#endif
-
-static void usart_putc(USART_TypeDef *usart, char c)
-{
-    while (USART_GetFlagStatus(usart, USART_FLAG_TXE) == 0);
-    USART_SendData(usart, c);
-    while (USART_GetFlagStatus(usart, USART_FLAG_TC) == 0);
-}
-
-static int usart_getc(USART_TypeDef *usart, cbuf_t *rxbuf, bool wait)
-{
-    unsigned char c;
-    if (cbuf_read_char(rxbuf, (char *) &c, wait) == 0)
-        return -1;
-    if (cbuf_space_avail(rxbuf) > cbuf_size(rxbuf))
-        USART_ITConfig(usart, USART_IT_RXNE, ENABLE);
-
-    return c;
-}
-
-static USART_TypeDef *get_usart(int port)
-{
-    switch (port) {
-#ifdef ENABLE_UART1
-        case 1:
-            return USART1;
-#endif
-#ifdef ENABLE_UART2
-        case 2:
-            return USART2;
-#endif
-#ifdef ENABLE_UART3
-        case 3:
-            return USART3;
-#endif
-#ifdef ENABLE_UART6
-        case 6:
-            return USART6;
-#endif
-        default:
-            ASSERT(false);
-            return 0;
-    }
-}
-
-static cbuf_t *get_rxbuf(int port)
-{
-    switch (port) {
-#ifdef ENABLE_UART1
-        case 1:
-            return &uart1_rx_buf;
-#endif
-#ifdef ENABLE_UART2
-        case 2:
-            return &uart2_rx_buf;
-#endif
-#ifdef ENABLE_UART3
-        case 3:
-            return &uart3_rx_buf;
-#endif
-#ifdef ENABLE_UART6
-        case 6:
-            return &uart6_rx_buf;
-#endif
-        default:
-            ASSERT(false);
-            return 0;
-    }
-}
-
-int uart_putc(int port, char c)
-{
-    USART_TypeDef *usart = get_usart(port);
-    usart_putc(usart, c);
-    return 1;
-}
-
-int uart_getc(int port, bool wait)
-{
-    cbuf_t *rxbuf = get_rxbuf(port);
-    USART_TypeDef *usart = get_usart(port);
-
-    return usart_getc(usart, rxbuf, wait);
-}
-
-void uart_flush_tx(int port) {}
-
-void uart_flush_rx(int port) {}
-
-void uart_init_port(int port, uint baud)
-{
-    USART_TypeDef *usart = get_usart(port);
-    uint32_t treg = 0;
-    uint32_t apbclk = 0;
-    uint32_t intdiv = 0;
-    uint32_t fracdiv = 0;
-    RCC_ClocksTypeDef RCC_ClksStat;
-
-    RCC_GetClocksFreq(&RCC_ClksStat);
-
-    if ((usart == USART1) || (usart == USART6)) {
-        apbclk = RCC_ClksStat.PCLK2_Frequency;
-    } else {
-        apbclk = RCC_ClksStat.PCLK1_Frequency;
-    }
-
-    if ((usart->CR1 & USART_CR1_OVER8) != 0) {
-        intdiv = ((25 * apbclk) / (2 * (baud)));
-    } else {
-        intdiv = ((25 * apbclk) / (4 * (baud)));
-    }
-    treg = (intdiv / 100) << 4;
-
-    fracdiv = intdiv - (100 * (treg >> 4));
-
-    if ((usart->CR1 & USART_CR1_OVER8) != 0) {
-        treg |= ((((fracdiv * 8) + 50) / 100)) & ((uint8_t) 0x07);
-    } else {
-        treg |= ((((fracdiv * 16) + 50) / 100)) & ((uint8_t) 0x0F);
-    }
-
-    usart->BRR = (uint16_t) treg;
-}
-
-// inject a character into the console uart rx buffer
-void __debugger_console_putc(char c)
-{
-    cbuf_t *rxbuf = get_rxbuf(DEBUG_UART);
-    if (rxbuf && cbuf_space_avail(rxbuf)) {
-        cbuf_write_char(rxbuf, c, false);
-    }
-}
-
diff --git a/platform/stm32f4xx/vectab.c b/platform/stm32f4xx/vectab.c
deleted file mode 100644
index df0a5f29..00000000
--- a/platform/stm32f4xx/vectab.c
+++ /dev/null
@@ -1,220 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <compiler.h>
-#include <stm32f4xx.h>
-#include <arch/arm/cm.h>
-#include <platform/stm32.h>
-#include <target/debugconfig.h>
-#include <lib/cbuf.h>
-
-/* un-overridden irq handler */
-void stm32_dummy_irq(void)
-{
-    arm_cm_irq_entry();
-
-    panic("unhandled irq\n");
-}
-
-/* a list of default handlers that are simply aliases to the dummy handler */
-#define DEFAULT_HANDLER(x) \
-void stm32_##x(void) __WEAK_ALIAS("stm32_dummy_irq");
-
-DEFAULT_HANDLER(WWDG_IRQ);
-DEFAULT_HANDLER(PVD_IRQ);
-DEFAULT_HANDLER(TAMP_STAMP_IRQ);
-DEFAULT_HANDLER(RTC_WKUP_IRQ);
-DEFAULT_HANDLER(FLASH_IRQ);
-DEFAULT_HANDLER(RCC_IRQ);
-DEFAULT_HANDLER(EXTI0_IRQ);
-DEFAULT_HANDLER(EXTI1_IRQ);
-DEFAULT_HANDLER(EXTI2_IRQ);
-DEFAULT_HANDLER(EXTI3_IRQ);
-DEFAULT_HANDLER(EXTI4_IRQ);
-
-DEFAULT_HANDLER(DMA1_Stream0_IRQ);
-DEFAULT_HANDLER(DMA1_Stream1_IRQ);
-DEFAULT_HANDLER(DMA1_Stream2_IRQ);
-DEFAULT_HANDLER(DMA1_Stream3_IRQ);
-DEFAULT_HANDLER(DMA1_Stream4_IRQ);
-DEFAULT_HANDLER(DMA1_Stream5_IRQ);
-DEFAULT_HANDLER(DMA1_Stream6_IRQ);
-
-DEFAULT_HANDLER(ADC_IRQ);
-DEFAULT_HANDLER(CAN1_TX_IRQ);
-DEFAULT_HANDLER(CAN1_RX0_IRQ);
-DEFAULT_HANDLER(CAN1_RX1_IRQ);
-DEFAULT_HANDLER(CAN1_SCE_IRQ);
-DEFAULT_HANDLER(EXTI9_5_IRQ);
-
-DEFAULT_HANDLER(TIM1_BRK_TIM9_IRQ);
-DEFAULT_HANDLER(TIM1_UP_TIM10_IRQ);
-DEFAULT_HANDLER(TIM1_TRG_COM_TIM11_IRQ);
-DEFAULT_HANDLER(TIM1_CC_IRQ);
-DEFAULT_HANDLER(TIM2_IRQ);
-DEFAULT_HANDLER(TIM3_IRQ);
-DEFAULT_HANDLER(TIM4_IRQ);
-
-DEFAULT_HANDLER(I2C1_EV_IRQ);
-DEFAULT_HANDLER(I2C1_ER_IRQ);
-DEFAULT_HANDLER(I2C2_EV_IRQ);
-DEFAULT_HANDLER(I2C2_ER_IRQ);
-
-DEFAULT_HANDLER(SPI1_IRQ);
-DEFAULT_HANDLER(SPI2_IRQ);
-
-DEFAULT_HANDLER(USART1_IRQ);
-DEFAULT_HANDLER(USART2_IRQ);
-DEFAULT_HANDLER(USART3_IRQ);
-
-DEFAULT_HANDLER(EXTI15_10_IRQ);
-DEFAULT_HANDLER(RTC_Alarm_IRQ);
-DEFAULT_HANDLER(OTG_FS_WKUP_IRQ);
-DEFAULT_HANDLER(TIM8_BRK_TIM12_IRQ);
-DEFAULT_HANDLER(TIM8_UP_TIM13_IRQ);
-DEFAULT_HANDLER(TIM8_TRG_COM_TIM14_IRQ);
-DEFAULT_HANDLER(TIM8_CC_IRQ);
-DEFAULT_HANDLER(DMA1_Stream7_IRQ);
-DEFAULT_HANDLER(FSMC_IRQ);
-DEFAULT_HANDLER(SDIO_IRQ);
-DEFAULT_HANDLER(TIM5_IRQ);
-DEFAULT_HANDLER(SPI3_IRQ);
-DEFAULT_HANDLER(UART4_IRQ);
-DEFAULT_HANDLER(UART5_IRQ);
-DEFAULT_HANDLER(TIM6_DAC_IRQ);
-DEFAULT_HANDLER(TIM7_IRQ);
-
-DEFAULT_HANDLER(DMA2_Stream0_IRQ);
-DEFAULT_HANDLER(DMA2_Stream1_IRQ);
-DEFAULT_HANDLER(DMA2_Stream2_IRQ);
-DEFAULT_HANDLER(DMA2_Stream3_IRQ);
-DEFAULT_HANDLER(DMA2_Stream4_IRQ);
-
-DEFAULT_HANDLER(ETH_IRQ);
-DEFAULT_HANDLER(ETH_WKUP_IRQ);
-DEFAULT_HANDLER(CAN2_TX_IRQ);
-DEFAULT_HANDLER(CAN2_RX0_IRQ);
-DEFAULT_HANDLER(CAN2_RX1_IRQ);
-DEFAULT_HANDLER(CAN2_SCE_IRQ);
-DEFAULT_HANDLER(OTG_FS_IRQ);
-DEFAULT_HANDLER(DMA2_Stream5_IRQ);
-DEFAULT_HANDLER(DMA2_Stream6_IRQ);
-DEFAULT_HANDLER(DMA2_Stream7_IRQ);
-DEFAULT_HANDLER(USART6_IRQ);
-DEFAULT_HANDLER(I2C3_EV_IRQ);
-DEFAULT_HANDLER(I2C3_ER_IRQ);
-DEFAULT_HANDLER(OTG_HS_EP1_OUT_IRQ);
-DEFAULT_HANDLER(OTG_HS_EP1_IN_IRQ);
-DEFAULT_HANDLER(OTG_HS_WKUP_IRQ);
-DEFAULT_HANDLER(OTG_HS_IRQ);
-DEFAULT_HANDLER(DCMI_IRQ);
-DEFAULT_HANDLER(CRYP_IRQ);
-DEFAULT_HANDLER(HASH_RNG_IRQ);
-
-#define VECTAB_ENTRY(x) [x##n] = stm32_##x
-
-/* appended to the end of the main vector table */
-const void *const __SECTION(".text.boot.vectab2") vectab2[] = {
-    VECTAB_ENTRY(WWDG_IRQ),                 /* Window WatchDog Interrupt                                         */
-    VECTAB_ENTRY(PVD_IRQ),                  /* PVD through EXTI Line detection Interrupt                         */
-    VECTAB_ENTRY(TAMP_STAMP_IRQ),           /* Tamper and TimeStamp interrupts through the EXTI line             */
-    VECTAB_ENTRY(RTC_WKUP_IRQ),             /* RTC Wakeup interrupt through the EXTI line                        */
-    VECTAB_ENTRY(FLASH_IRQ),                /* FLASH global Interrupt                                            */
-    VECTAB_ENTRY(RCC_IRQ),                  /* RCC global Interrupt                                              */
-    VECTAB_ENTRY(EXTI0_IRQ),                /* EXTI Line0 Interrupt                                              */
-    VECTAB_ENTRY(EXTI1_IRQ),                /* EXTI Line1 Interrupt                                              */
-    VECTAB_ENTRY(EXTI2_IRQ),                /* EXTI Line2 Interrupt                                              */
-    VECTAB_ENTRY(EXTI3_IRQ),                /* EXTI Line3 Interrupt                                              */
-    VECTAB_ENTRY(EXTI4_IRQ),                /* EXTI Line4 Interrupt                                              */
-    VECTAB_ENTRY(DMA1_Stream0_IRQ),         /* DMA1 Stream 0 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream1_IRQ),         /* DMA1 Stream 1 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream2_IRQ),         /* DMA1 Stream 2 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream3_IRQ),         /* DMA1 Stream 3 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream4_IRQ),         /* DMA1 Stream 4 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream5_IRQ),         /* DMA1 Stream 5 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream6_IRQ),         /* DMA1 Stream 6 global Interrupt                                    */
-    VECTAB_ENTRY(ADC_IRQ),                  /* ADC1, ADC2 and ADC3 global Interrupts                             */
-    VECTAB_ENTRY(CAN1_TX_IRQ),              /* CAN1 TX Interrupt                                                 */
-    VECTAB_ENTRY(CAN1_RX0_IRQ),             /* CAN1 RX0 Interrupt                                                */
-    VECTAB_ENTRY(CAN1_RX1_IRQ),             /* CAN1 RX1 Interrupt                                                */
-    VECTAB_ENTRY(CAN1_SCE_IRQ),             /* CAN1 SCE Interrupt                                                */
-    VECTAB_ENTRY(EXTI9_5_IRQ),              /* External Line[9:5] Interrupts                                     */
-    VECTAB_ENTRY(TIM1_BRK_TIM9_IRQ),        /* TIM1 Break interrupt and TIM9 global interrupt                    */
-    VECTAB_ENTRY(TIM1_UP_TIM10_IRQ),        /* TIM1 Update Interrupt and TIM10 global interrupt                  */
-    VECTAB_ENTRY(TIM1_TRG_COM_TIM11_IRQ),   /* TIM1 Trigger and Commutation Interrupt and TIM11 global interrupt */
-    VECTAB_ENTRY(TIM1_CC_IRQ),              /* TIM1 Capture Compare Interrupt                                    */
-    VECTAB_ENTRY(TIM2_IRQ),                 /* TIM2 global Interrupt                                             */
-    VECTAB_ENTRY(TIM3_IRQ),                 /* TIM3 global Interrupt                                             */
-    VECTAB_ENTRY(TIM4_IRQ),                 /* TIM4 global Interrupt                                             */
-    VECTAB_ENTRY(I2C1_EV_IRQ),              /* I2C1 Event Interrupt                                              */
-    VECTAB_ENTRY(I2C1_ER_IRQ),              /* I2C1 Error Interrupt                                              */
-    VECTAB_ENTRY(I2C2_EV_IRQ),              /* I2C2 Event Interrupt                                              */
-    VECTAB_ENTRY(I2C2_ER_IRQ),              /* I2C2 Error Interrupt                                              */
-    VECTAB_ENTRY(SPI1_IRQ),                 /* SPI1 global Interrupt                                             */
-    VECTAB_ENTRY(SPI2_IRQ),                 /* SPI2 global Interrupt                                             */
-    VECTAB_ENTRY(USART1_IRQ),               /* USART1 global Interrupt                                           */
-    VECTAB_ENTRY(USART2_IRQ),               /* USART2 global Interrupt                                           */
-    VECTAB_ENTRY(USART3_IRQ),               /* USART3 global Interrupt                                           */
-    VECTAB_ENTRY(EXTI15_10_IRQ),            /* External Line[15:10] Interrupts                                   */
-    VECTAB_ENTRY(RTC_Alarm_IRQ),            /* RTC Alarm (A and B) through EXTI Line Interrupt                   */
-    VECTAB_ENTRY(OTG_FS_WKUP_IRQ),          /* USB OTG FS Wakeup through EXTI line interrupt                     */
-    VECTAB_ENTRY(TIM8_BRK_TIM12_IRQ),       /* TIM8 Break Interrupt and TIM12 global interrupt                   */
-    VECTAB_ENTRY(TIM8_UP_TIM13_IRQ),        /* TIM8 Update Interrupt and TIM13 global interrupt                  */
-    VECTAB_ENTRY(TIM8_TRG_COM_TIM14_IRQ),   /* TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt */
-    VECTAB_ENTRY(TIM8_CC_IRQ),              /* TIM8 Capture Compare Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream7_IRQ),         /* DMA1 Stream7 Interrupt                                            */
-    VECTAB_ENTRY(FSMC_IRQ),                 /* FSMC global Interrupt                                             */
-    VECTAB_ENTRY(SDIO_IRQ),                 /* SDIO global Interrupt                                             */
-    VECTAB_ENTRY(TIM5_IRQ),                 /* TIM5 global Interrupt                                             */
-    VECTAB_ENTRY(SPI3_IRQ),                 /* SPI3 global Interrupt                                             */
-    VECTAB_ENTRY(UART4_IRQ),                /* UART4 global Interrupt                                            */
-    VECTAB_ENTRY(UART5_IRQ),                /* UART5 global Interrupt                                            */
-    VECTAB_ENTRY(TIM6_DAC_IRQ),             /* TIM6 global and DAC1&2 underrun error  interrupts                 */
-    VECTAB_ENTRY(TIM7_IRQ),                 /* TIM7 global interrupt                                             */
-    VECTAB_ENTRY(DMA2_Stream0_IRQ),         /* DMA2 Stream 0 global Interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream1_IRQ),         /* DMA2 Stream 1 global Interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream2_IRQ),         /* DMA2 Stream 2 global Interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream3_IRQ),         /* DMA2 Stream 3 global Interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream4_IRQ),         /* DMA2 Stream 4 global Interrupt                                    */
-    VECTAB_ENTRY(ETH_IRQ),                  /* Ethernet global Interrupt                                         */
-    VECTAB_ENTRY(ETH_WKUP_IRQ),             /* Ethernet Wakeup through EXTI line Interrupt                       */
-    VECTAB_ENTRY(CAN2_TX_IRQ),              /* CAN2 TX Interrupt                                                 */
-    VECTAB_ENTRY(CAN2_RX0_IRQ),             /* CAN2 RX0 Interrupt                                                */
-    VECTAB_ENTRY(CAN2_RX1_IRQ),             /* CAN2 RX1 Interrupt                                                */
-    VECTAB_ENTRY(CAN2_SCE_IRQ),             /* CAN2 SCE Interrupt                                                */
-    VECTAB_ENTRY(OTG_FS_IRQ),               /* USB OTG FS global Interrupt                                       */
-    VECTAB_ENTRY(DMA2_Stream5_IRQ),         /* DMA2 Stream 5 global interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream6_IRQ),         /* DMA2 Stream 6 global interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream7_IRQ),         /* DMA2 Stream 7 global interrupt                                    */
-    VECTAB_ENTRY(USART6_IRQ),               /* USART6 global interrupt                                           */
-    VECTAB_ENTRY(I2C3_EV_IRQ),              /* I2C3 event interrupt                                              */
-    VECTAB_ENTRY(I2C3_ER_IRQ),              /* I2C3 error interrupt                                              */
-    VECTAB_ENTRY(OTG_HS_EP1_OUT_IRQ),       /* USB OTG HS End Point 1 Out global interrupt                       */
-    VECTAB_ENTRY(OTG_HS_EP1_IN_IRQ),        /* USB OTG HS End Point 1 In global interrupt                        */
-    VECTAB_ENTRY(OTG_HS_WKUP_IRQ),          /* USB OTG HS Wakeup through EXTI interrupt                          */
-    VECTAB_ENTRY(OTG_HS_IRQ),               /* USB OTG HS global interrupt                                       */
-    VECTAB_ENTRY(DCMI_IRQ),                 /* DCMI global interrupt                                             */
-    VECTAB_ENTRY(CRYP_IRQ),                 /* CRYP crypto global interrupt                                      */
-    VECTAB_ENTRY(HASH_RNG_IRQ),             /* Hash and Rng global interrupt                                     */
-};
-
diff --git a/platform/stm32f7xx/debug.c b/platform/stm32f7xx/debug.c
deleted file mode 100644
index 1a091875..00000000
--- a/platform/stm32f7xx/debug.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <debug.h>
-#include <stdio.h>
-#include <kernel/thread.h>
-#include <platform/debug.h>
-#include <arch/ops.h>
-#include <dev/uart.h>
-#include <target/debugconfig.h>
-#include <arch/arm/cm.h>
-#include <platform/stm32.h>
-
-void stm32_debug_early_init(void)
-{
-    uart_init_early();
-}
-
-/* later in the init process */
-void stm32_debug_init(void)
-{
-    uart_init();
-}
-
-void platform_dputc(char c)
-{
-    if (c == '\n')
-        uart_putc(DEBUG_UART, '\r');
-    uart_putc(DEBUG_UART, c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    int ret = uart_getc(DEBUG_UART, wait);
-    if (ret < 0)
-        return -1;
-    *c = ret;
-    return 0;
-}
-
-void platform_pputc(char c)
-{
-    if (c == '\n')
-        uart_pputc(DEBUG_UART, '\r');
-    uart_pputc(DEBUG_UART, c);
-}
-
-int platform_pgetc(char *c, bool wait)
-{
-    int ret = uart_pgetc(DEBUG_UART);
-    if (ret < 0)
-        return -1;
-    *c = ret;
-    return 0;
-}
diff --git a/platform/stm32f7xx/eth.c b/platform/stm32f7xx/eth.c
deleted file mode 100644
index 22437636..00000000
--- a/platform/stm32f7xx/eth.c
+++ /dev/null
@@ -1,367 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-/*
- * COPYRIGHT(c) 2015 STMicroelectronics
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *   1. Redistributions of source code must retain the above copyright notice,
- *      this list of conditions and the following disclaimer.
- *   2. Redistributions in binary form must reproduce the above copyright notice,
- *      this list of conditions and the following disclaimer in the documentation
- *      and/or other materials provided with the distribution.
- *   3. Neither the name of STMicroelectronics nor the names of its contributors
- *      may be used to endorse or promote products derived from this software
- *      without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-
-#include <err.h>
-#include <debug.h>
-#include <assert.h>
-#include <trace.h>
-#include <target.h>
-#include <compiler.h>
-#include <stdlib.h>
-#include <string.h>
-#include <lib/gfx.h>
-#include <dev/gpio.h>
-#include <dev/display.h>
-#include <kernel/event.h>
-#include <kernel/thread.h>
-#include <arch/ops.h>
-#include <arch/arm/cm.h>
-#include <platform.h>
-#include <platform/stm32.h>
-#include <platform/eth.h>
-
-#if WITH_LIB_MINIP
-#include <lib/minip.h>
-#include <lib/pktbuf.h>
-#endif
-
-#define LOCAL_TRACE 0
-
-/* LAN8742A PHY Address*/
-#define LAN8742A_PHY_ADDRESS            0x00
-/* DP83848 PHY Address*/
-#define DP83848_PHY_ADDRESS             0x01
-/* KSZ8721 PHY Address*/
-#define KSZ8721_PHY_ADDRESS             0x01
-
-struct eth_status {
-    ETH_HandleTypeDef EthHandle;
-
-    eth_phy_itf eth_phy;
-    event_t rx_event;
-
-    /* allocated directly out of DTCM below */
-    ETH_DMADescTypeDef  *DMARxDscrTab;  // ETH_RXBUFNB
-    ETH_DMADescTypeDef  *DMATxDscrTab;  // ETH_TXBUFNB
-    uint8_t             *Rx_Buff;       // ETH_RXBUFNB * ETH_RX_BUF_SIZE
-    uint8_t             *Tx_Buff;       // ETH_TXBUFNB * ETH_TX_BUF_SIZE
-};
-
-static struct eth_status eth;
-
-static int eth_rx_worker(void *arg);
-
-#if WITH_LIB_MINIP
-static int eth_send_raw_pkt(pktbuf_t *p);
-#endif
-
-status_t eth_init(const uint8_t *mac_addr, eth_phy_itf eth_phy)
-{
-    LTRACE_ENTRY;
-
-    DEBUG_ASSERT(mac_addr);
-
-    eth.eth_phy = eth_phy;
-
-    /* Enable ETHERNET clock  */
-    __HAL_RCC_ETH_CLK_ENABLE();
-
-    eth.EthHandle.Instance = ETH;
-    eth.EthHandle.Init.MACAddr = (uint8_t *)mac_addr;
-    eth.EthHandle.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE;
-    eth.EthHandle.Init.Speed = ETH_SPEED_100M;
-    eth.EthHandle.Init.DuplexMode = ETH_MODE_FULLDUPLEX;
-    switch (eth_phy) {
-        case PHY_DP83848:
-            eth.EthHandle.Init.MediaInterface = ETH_MEDIA_INTERFACE_MII;
-            eth.EthHandle.Init.PhyAddress = DP83848_PHY_ADDRESS;
-            break;
-        case PHY_LAN8742A:
-            eth.EthHandle.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII;
-            eth.EthHandle.Init.PhyAddress = LAN8742A_PHY_ADDRESS;
-            break;
-        case PHY_KSZ8721:
-            eth.EthHandle.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII;
-            eth.EthHandle.Init.PhyAddress = KSZ8721_PHY_ADDRESS;
-            break;
-        default:
-            return ERR_NOT_CONFIGURED;
-    }
-
-    eth.EthHandle.Init.RxMode = ETH_RXINTERRUPT_MODE;
-    //eth.EthHandle.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE; // XXX icmp checksums corrupted if stack stuff valid checksum
-    eth.EthHandle.Init.ChecksumMode = ETH_CHECKSUM_BY_SOFTWARE;
-
-    /* configure ethernet peripheral (GPIOs, clocks, MAC, DMA) */
-    if (HAL_ETH_Init(&eth.EthHandle) != HAL_OK)
-        return ERR_NOT_CONFIGURED;
-
-    /* allocate descriptor and buffer memory from DTCM */
-    /* XXX do in a more generic way */
-#if MEMBASE == 0x20000000
-#error DTCM will collide with MEMBASE
-#endif
-    addr_t tcm_ptr = RAMDTCM_BASE;
-
-    eth.DMATxDscrTab = (void *)tcm_ptr;
-    tcm_ptr += sizeof(*eth.DMATxDscrTab) * ETH_TXBUFNB;
-    eth.DMARxDscrTab = (void *)tcm_ptr;
-    tcm_ptr += sizeof(*eth.DMARxDscrTab) * ETH_RXBUFNB;
-
-    eth.Tx_Buff = (void *)tcm_ptr;
-    tcm_ptr += ETH_TX_BUF_SIZE * ETH_TXBUFNB;
-    eth.Rx_Buff = (void *)tcm_ptr;
-    tcm_ptr += ETH_RX_BUF_SIZE * ETH_RXBUFNB;
-
-    /* Initialize Tx Descriptors list: Chain Mode */
-    HAL_ETH_DMATxDescListInit(&eth.EthHandle, eth.DMATxDscrTab, eth.Tx_Buff, ETH_TXBUFNB);
-
-    /* Initialize Rx Descriptors list: Chain Mode  */
-    HAL_ETH_DMARxDescListInit(&eth.EthHandle, eth.DMARxDscrTab, eth.Rx_Buff, ETH_RXBUFNB);
-
-    /* Enable MAC and DMA transmission and reception */
-    HAL_ETH_Start(&eth.EthHandle);
-
-#if 0
-    // XXX DP83848 specific
-    /**** Configure PHY to generate an interrupt when Eth Link state changes ****/
-    /* Read Register Configuration */
-    uint32_t regvalue;
-    HAL_ETH_ReadPHYRegister(&eth.EthHandle, PHY_MICR, &regvalue);
-
-    regvalue |= (PHY_MICR_INT_EN | PHY_MICR_INT_OE);
-
-    /* Enable Interrupts */
-    HAL_ETH_WritePHYRegister(&eth.EthHandle, PHY_MICR, regvalue );
-
-    /* Read Register Configuration */
-    HAL_ETH_ReadPHYRegister(&eth.EthHandle, PHY_MISR, &regvalue);
-
-    regvalue |= PHY_MISR_LINK_INT_EN;
-
-    /* Enable Interrupt on change of link status */
-    HAL_ETH_WritePHYRegister(&eth.EthHandle, PHY_MISR, regvalue);
-#endif
-
-    /* set up an event to block the rx thread on */
-    event_init(&eth.rx_event, false, EVENT_FLAG_AUTOUNSIGNAL);
-
-    /* start worker thread */
-    thread_resume(thread_create("eth_rx", &eth_rx_worker, NULL, HIGH_PRIORITY, DEFAULT_STACK_SIZE));
-
-    /* enable interrupts */
-    HAL_NVIC_EnableIRQ(ETH_IRQn);
-
-    LTRACE_EXIT;
-
-    return NO_ERROR;
-}
-
-void stm32_ETH_IRQ(void)
-{
-    arm_cm_irq_entry();
-
-    HAL_ETH_IRQHandler(&eth.EthHandle);
-
-    arm_cm_irq_exit(true);
-}
-
-/**
-  * @brief  Ethernet Rx Transfer completed callback
-  * @param  heth: ETH handle
-  * @retval None
-  */
-void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth)
-{
-    event_signal(&eth.rx_event, false);
-}
-
-static status_t eth_send(const void *buf, size_t len)
-{
-    status_t err;
-    __IO ETH_DMADescTypeDef *DmaTxDesc;
-
-    LTRACEF("buf %p, len %zu\n", buf, len);
-
-    DmaTxDesc = eth.EthHandle.TxDesc;
-
-    /* is the buffer available? */
-    if ((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != 0) {
-        LTRACEF("tx buffer not available\n");
-        err = ERR_IO;
-        goto error;
-    }
-
-    uint8_t *buffer = (uint8_t *)(DmaTxDesc->Buffer1Addr);
-    memcpy(buffer, buf, len);
-
-    HAL_StatusTypeDef e = HAL_ETH_TransmitFrame(&eth.EthHandle, len);
-
-    err = (e == HAL_OK) ? NO_ERROR : ERR_IO;
-
-error:
-    /* When Transmit Underflow flag is set, clear it and issue a Transmit Poll Demand to resume transmission */
-    if ((eth.EthHandle.Instance->DMASR & ETH_DMASR_TUS) != 0) {
-        /* Clear TUS ETHERNET DMA flag */
-        eth.EthHandle.Instance->DMASR = ETH_DMASR_TUS;
-
-        /* Resume DMA transmission*/
-        eth.EthHandle.Instance->DMATPDR = 0;
-    }
-
-    return err;
-}
-
-static int eth_rx_worker(void *arg)
-{
-    for (;;) {
-#if 0
-        status_t event_err = event_wait_timeout(&eth.rx_event, 1000);
-        if (event_err == ERR_TIMED_OUT) {
-            /* periodically poll the phys status register */
-            /* XXX specific to DP83848 */
-            uint32_t val;
-
-            /* Read PHY_MISR */
-            /* seems to take about 30 usecs */
-            HAL_ETH_ReadPHYRegister(&eth.EthHandle, PHY_MISR, &val);
-
-            /* Check whether the link interrupt has occurred or not */
-            if (val & PHY_LINK_INTERRUPT) {
-                /* Read PHY_SR*/
-                HAL_ETH_ReadPHYRegister(&eth.EthHandle, PHY_SR, &val);
-
-                /* Check whether the link is up or down*/
-                if (val & PHY_LINK_STATUS) {
-                    printf("eth: link up\n");
-                    //netif_set_link_up(link_arg->netif);
-                } else {
-                    printf("eth: link down\n");
-                    //netif_set_link_down(link_arg->netif);
-                }
-            }
-        } else {
-#else
-        status_t event_err = event_wait(&eth.rx_event);
-        if (event_err >= NO_ERROR) {
-#endif
-            // XXX probably race with the event here
-            while (HAL_ETH_GetReceivedFrame_IT(&eth.EthHandle) == HAL_OK) {
-                LTRACEF("got packet len %u, buffer %p, seg count %u\n", eth.EthHandle.RxFrameInfos.length,
-                        (void *)eth.EthHandle.RxFrameInfos.buffer,
-                        eth.EthHandle.RxFrameInfos.SegCount);
-
-#if WITH_LIB_MINIP
-                /* allocate a pktbuf header, point it at our rx buffer, and pass up the stack */
-                pktbuf_t *p = pktbuf_alloc_empty();
-                if (p) {
-                    pktbuf_add_buffer(p, (void *)eth.EthHandle.RxFrameInfos.buffer, eth.EthHandle.RxFrameInfos.length,
-                                      0, 0, NULL, NULL);
-                    p->dlen = eth.EthHandle.RxFrameInfos.length;
-
-                    minip_rx_driver_callback(p);
-
-                    pktbuf_free(p, true);
-                }
-#endif
-
-                /* Release descriptors to DMA */
-                /* Point to first descriptor */
-                __IO ETH_DMADescTypeDef *dmarxdesc;
-
-                dmarxdesc = eth.EthHandle.RxFrameInfos.FSRxDesc;
-                /* Set Own bit in Rx descriptors: gives the buffers back to DMA */
-                for (uint i=0; i< eth.EthHandle.RxFrameInfos.SegCount; i++) {
-                    dmarxdesc->Status |= ETH_DMARXDESC_OWN;
-                    dmarxdesc = (ETH_DMADescTypeDef *)(dmarxdesc->Buffer2NextDescAddr);
-                }
-
-                /* Clear Segment_Count */
-                eth.EthHandle.RxFrameInfos.SegCount =0;
-
-                /* When Rx Buffer unavailable flag is set: clear it and resume reception */
-                if ((eth.EthHandle.Instance->DMASR & ETH_DMASR_RBUS) != (uint32_t)RESET) {
-                    /* Clear RBUS ETHERNET DMA flag */
-                    eth.EthHandle.Instance->DMASR = ETH_DMASR_RBUS;
-                    /* Resume DMA reception */
-                    eth.EthHandle.Instance->DMARPDR = 0;
-                }
-            }
-        }
-    }
-
-    return 0;
-}
-
-#if WITH_LIB_MINIP
-
-status_t stm32_eth_send_minip_pkt(pktbuf_t *p)
-{
-    LTRACEF("p %p, dlen %zu, eof %u\n", p, p->dlen, p->flags & PKTBUF_FLAG_EOF);
-
-    DEBUG_ASSERT(p && p->dlen);
-
-    if (!(p->flags & PKTBUF_FLAG_EOF)) {
-        /* can't handle multi part packets yet */
-        PANIC_UNIMPLEMENTED;
-
-        return ERR_NOT_IMPLEMENTED;
-    }
-
-    status_t err = eth_send(p->data, p->dlen);
-
-    pktbuf_free(p, true);
-
-    return err;
-}
-
-#endif
-
-
diff --git a/platform/stm32f7xx/flash.c b/platform/stm32f7xx/flash.c
deleted file mode 100644
index 7ffa9938..00000000
--- a/platform/stm32f7xx/flash.c
+++ /dev/null
@@ -1,253 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <string.h>
-#include <stdlib.h>
-#include <trace.h>
-#include <pow2.h>
-#include <arch/ops.h>
-#include <lib/bio.h>
-#include <platform/stm32.h>
-
-#define LOCAL_TRACE 0
-
-/* device parameters */
-#define MAX_GEOMETRY_COUNT 3
-#define PROGRAM_SIZE 4
-
-#define _32K  (32 * 1024U)
-#define _128K (128 * 1024U)
-#define _256K (256 * 1024U)
-
-#define ERASE_RANGE0_START  (0)
-#define ERASE_RANGE0_END    (_32K * 4)
-#define ERASE_RANGE1_START  ERASE_RANGE0_END
-#define ERASE_RANGE1_END    (ERASE_RANGE1_START + _128K)
-#define ERASE_RANGE2_START  ERASE_RANGE1_END
-#define ERASE_RANGE2_END    (flash.size)
-
-struct stm32_flash {
-    bdev_t bdev;
-    off_t size;
-
-    bio_erase_geometry_info_t geometry[MAX_GEOMETRY_COUNT];
-} flash;
-
-static ssize_t stm32_flash_bdev_read(struct bdev *, void *buf, off_t offset, size_t len);
-static ssize_t stm32_flash_bdev_read_block(struct bdev *, void *buf, bnum_t block, uint count);
-static ssize_t stm32_flash_bdev_write(struct bdev *bdev, const void *buf, off_t offset, size_t len);
-static ssize_t stm32_flash_bdev_write_block(struct bdev *, const void *buf, bnum_t block, uint count);
-static ssize_t stm32_flash_bdev_erase(struct bdev *, off_t offset, size_t len);
-static int stm32_flash_ioctl(struct bdev *, int request, void *argp);
-
-void stm32_flash_early_init(void)
-{
-    /* Enable FLASH clock  */
-    __HAL_RCC_ETH_CLK_ENABLE();
-}
-
-void stm32_flash_init(void)
-{
-    // XXX detect here
-    flash.size = 1024*1024;
-
-    flash.geometry[0].start = ERASE_RANGE0_START;
-    flash.geometry[0].size = ERASE_RANGE0_END - ERASE_RANGE0_START;
-    flash.geometry[0].erase_size = _32K;
-    flash.geometry[0].erase_size = log2_uint(_32K);
-
-    flash.geometry[1].start = ERASE_RANGE1_START;
-    flash.geometry[1].size = ERASE_RANGE1_END - ERASE_RANGE1_START;
-    flash.geometry[1].erase_size = _128K;
-    flash.geometry[1].erase_size = log2_uint(_128K);
-
-    flash.geometry[2].start = ERASE_RANGE2_START;
-    flash.geometry[2].size = ERASE_RANGE2_END - ERASE_RANGE2_START;
-    flash.geometry[2].erase_size = _256K;
-    flash.geometry[2].erase_size = log2_uint(_256K);
-
-    /* construct the block device */
-    bio_initialize_bdev(&flash.bdev, "flash0",
-                        PROGRAM_SIZE, flash.size / PROGRAM_SIZE,
-                        3, flash.geometry, BIO_FLAGS_NONE);
-
-    /* we erase to 0xff */
-    flash.bdev.erase_byte = 0xff;
-
-    /* override our block device hooks */
-    flash.bdev.read = &stm32_flash_bdev_read;
-    flash.bdev.read_block = &stm32_flash_bdev_read_block;
-    //flash.bdev.write = &stm32_flash_bdev_write;
-    flash.bdev.write_block = &stm32_flash_bdev_write_block;
-    flash.bdev.erase = &stm32_flash_bdev_erase;
-    flash.bdev.ioctl = &stm32_flash_ioctl;
-
-    bio_register_device(&flash.bdev);
-}
-
-static ssize_t stm32_flash_bdev_read(struct bdev *bdev, void *buf, off_t offset, size_t len)
-{
-    LTRACEF("dev %p, buf %p, offset 0x%llx, len 0x%zx\n", bdev, buf, offset, len);
-
-    memcpy(buf, (uint8_t *)FLASHAXI_BASE + offset, len);
-
-    return len;
-}
-
-static ssize_t stm32_flash_bdev_read_block(struct bdev *bdev, void *buf, bnum_t block, uint count)
-{
-    LTRACEF("dev %p, buf %p, block 0x%x, count %u\n", bdev, buf, block, count);
-
-    memcpy(buf, (uint8_t *)FLASHAXI_BASE + block * bdev->block_size, count * bdev->block_size);
-
-    return count * bdev->block_size;
-}
-
-static ssize_t stm32_flash_bdev_write_block(struct bdev *bdev, const void *buf, bnum_t block, uint count)
-{
-    LTRACEF("dev %p, buf %p, block 0x%x, count %u\n", bdev, buf, block, count);
-
-    HAL_FLASH_Unlock();
-
-    ssize_t written_bytes = count * bdev->block_size;
-    const uint32_t *buf32 = (const uint32_t *)buf;
-    while (count > 0) {
-        if (HAL_FLASH_Program(TYPEPROGRAM_WORD, FLASHAXI_BASE + block * bdev->block_size, *buf32) != HAL_OK) {
-            written_bytes = ERR_IO;
-            break;
-        }
-
-        buf32++;
-        block++;
-        count--;
-    }
-
-    HAL_FLASH_Lock();
-
-    return written_bytes;
-}
-
-static status_t offset_to_sector(off_t offset, uint32_t *sector, off_t *sector_offset, off_t *next_offset)
-{
-    if (offset < 0) {
-        return -1;
-    } else if (offset < ERASE_RANGE0_END) {
-        *sector = (offset - ERASE_RANGE0_START) / _32K;
-        *sector_offset = ROUNDDOWN(offset - ERASE_RANGE0_START, _32K) + ERASE_RANGE0_START;
-        *next_offset = *sector_offset + _32K;
-    } else if (offset < ERASE_RANGE1_END) {
-        *sector = (offset - ERASE_RANGE1_START) / _128K + 4;
-        *sector_offset = ROUNDDOWN(offset - ERASE_RANGE1_START, _128K) + ERASE_RANGE1_START;
-        *next_offset = *sector_offset + _128K;
-    } else if (offset < ERASE_RANGE2_END) {
-        *sector = (offset - ERASE_RANGE2_START) / _256K + 5;
-        *sector_offset = ROUNDDOWN(offset - ERASE_RANGE2_START, _256K) + ERASE_RANGE2_START;
-        *next_offset = *sector_offset + _256K;
-    } else {
-        return -1;
-    }
-
-    DEBUG_ASSERT(*sector < FLASH_SECTOR_TOTAL);
-
-    LTRACEF("offset 0x%llx, sector %u, sector_offset 0x%llx, next_offset 0x%llx\n", offset, *sector, *sector_offset, *next_offset);
-
-    return NO_ERROR;
-}
-
-static ssize_t stm32_flash_bdev_erase(struct bdev *bdev, off_t offset, size_t len)
-{
-    LTRACEF("dev %p, offset 0x%llx, len 0x%zx\n", bdev, offset, len);
-
-    ssize_t total_erased = 0;
-
-    HAL_FLASH_Unlock();
-
-    while (len > 0) {
-        uint32_t sector = 0;
-        off_t sector_offset = 0;
-        off_t next_offset = 0;
-
-        if (offset_to_sector(offset, &sector, &sector_offset, &next_offset) < 0)
-            return ERR_INVALID_ARGS;
-
-        FLASH_EraseInitTypeDef erase;
-        erase.TypeErase = FLASH_TYPEERASE_SECTORS;
-        erase.Sector = sector;
-        erase.NbSectors = 1;
-        erase.VoltageRange = FLASH_VOLTAGE_RANGE_3; // XXX
-
-        LTRACEF("erase params: sector %u, num_sectors %u, next_offset 0x%llx\n", erase.Sector, erase.NbSectors, next_offset);
-
-        if (1) {
-            uint32_t sector_error;
-            HAL_StatusTypeDef err = HAL_FLASHEx_Erase(&erase, &sector_error);
-            if (err != HAL_OK) {
-                TRACEF("error starting erase operation, sector error %u\n", sector_error);
-                total_erased = ERR_IO;
-                break;
-            }
-
-            err = FLASH_WaitForLastOperation(HAL_MAX_DELAY);
-            if (err != HAL_OK) {
-                TRACEF("error waiting for erase operation to end, hal error %u\n", HAL_FLASH_GetError());
-                total_erased = ERR_IO;
-                break;
-            }
-
-            // invalidate the cache on this region
-            arch_invalidate_cache_range(FLASHAXI_BASE + sector_offset, next_offset - sector_offset);
-        }
-
-        // move to the next erase boundary
-        total_erased += next_offset - sector_offset;
-        off_t erased_bytes = next_offset - offset;
-        if (erased_bytes >= len)
-            break;
-        len -= erased_bytes;
-        offset = next_offset;
-    }
-
-    HAL_FLASH_Lock();
-
-    return total_erased;
-}
-
-static int stm32_flash_ioctl(struct bdev *bdev, int request, void *argp)
-{
-    LTRACEF("dev %p, request %d, argp %p\n", bdev, request, argp);
-
-    int ret = ERR_NOT_SUPPORTED;
-    switch (request) {
-        case BIO_IOCTL_GET_MAP_ADDR:
-        case BIO_IOCTL_GET_MEM_MAP:
-            /* we're already mapped */
-            if (argp)
-                *(void **)argp = (void *)FLASHAXI_BASE;
-            break;
-        case BIO_IOCTL_PUT_MEM_MAP:
-            break;
-    }
-
-    return ret;
-}
-
diff --git a/platform/stm32f7xx/gpio.c b/platform/stm32f7xx/gpio.c
deleted file mode 100644
index ac2a8a3e..00000000
--- a/platform/stm32f7xx/gpio.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/*
- * Copyright (c) 2012-2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <err.h>
-#include <assert.h>
-#include <dev/gpio.h>
-#include <platform/stm32.h>
-#include <platform/gpio.h>
-
-static GPIO_TypeDef *port_to_pointer(unsigned int port)
-{
-    DEBUG_ASSERT(port <= GPIO_PORT_K);
-
-    switch (port) {
-        default:
-        case GPIO_PORT_A:
-            return GPIOA;
-        case GPIO_PORT_B:
-            return GPIOB;
-        case GPIO_PORT_C:
-            return GPIOC;
-        case GPIO_PORT_D:
-            return GPIOD;
-        case GPIO_PORT_E:
-            return GPIOE;
-        case GPIO_PORT_F:
-            return GPIOF;
-        case GPIO_PORT_G:
-            return GPIOG;
-        case GPIO_PORT_H:
-            return GPIOH;
-        case GPIO_PORT_I:
-            return GPIOI;
-        case GPIO_PORT_J:
-            return GPIOJ;
-        case GPIO_PORT_K:
-            return GPIOK;
-    }
-}
-
-static void enable_port(unsigned int port)
-{
-    DEBUG_ASSERT(port <= GPIO_PORT_K);
-
-    switch (port) {
-        case GPIO_PORT_A:
-            __HAL_RCC_GPIOA_CLK_ENABLE();
-            break;
-        case GPIO_PORT_B:
-            __HAL_RCC_GPIOB_CLK_ENABLE();
-            break;
-        case GPIO_PORT_C:
-            __HAL_RCC_GPIOC_CLK_ENABLE();
-            break;
-        case GPIO_PORT_D:
-            __HAL_RCC_GPIOD_CLK_ENABLE();
-            break;
-        case GPIO_PORT_E:
-            __HAL_RCC_GPIOE_CLK_ENABLE();
-            break;
-        case GPIO_PORT_F:
-            __HAL_RCC_GPIOF_CLK_ENABLE();
-            break;
-        case GPIO_PORT_G:
-            __HAL_RCC_GPIOG_CLK_ENABLE();
-            break;
-        case GPIO_PORT_H:
-            __HAL_RCC_GPIOH_CLK_ENABLE();
-            break;
-        case GPIO_PORT_I:
-            __HAL_RCC_GPIOI_CLK_ENABLE();
-            break;
-        case GPIO_PORT_J:
-            __HAL_RCC_GPIOJ_CLK_ENABLE();
-            break;
-        case GPIO_PORT_K:
-            __HAL_RCC_GPIOK_CLK_ENABLE();
-            break;
-    }
-}
-
-void stm32_gpio_early_init(void)
-{
-}
-
-int gpio_config(unsigned nr, unsigned flags)
-{
-    uint port = GPIO_PORT(nr);
-    uint pin = GPIO_PIN(nr);
-
-    enable_port(port);
-
-    GPIO_InitTypeDef init;
-    init.Speed = GPIO_SPEED_HIGH;
-    init.Pin = (1 << pin);
-    init.Alternate = 0;
-
-    if (flags & GPIO_INPUT) {
-        init.Mode = GPIO_MODE_INPUT;
-    } else if (flags & GPIO_OUTPUT) {
-        if (flags & GPIO_STM32_OD) {
-            init.Mode = GPIO_MODE_OUTPUT_OD;
-        } else {
-            init.Mode = GPIO_MODE_OUTPUT_PP;
-        }
-    } else if (flags & GPIO_STM32_AF) {
-        if (flags & GPIO_STM32_OD) {
-            init.Mode = GPIO_MODE_AF_OD;
-        } else {
-            init.Mode = GPIO_MODE_AF_PP;
-        }
-        init.Alternate = GPIO_AFNUM(flags);
-    } else {
-        panic("stm32f7: invalid args to gpio_config\n");
-        return ERR_INVALID_ARGS;
-    }
-
-    if (flags & GPIO_PULLUP) {
-        init.Pull = GPIO_PULLUP;
-    } else if (flags & GPIO_PULLDOWN) {
-        init.Pull = GPIO_PULLDOWN;
-    } else {
-        init.Pull = GPIO_NOPULL;
-    }
-
-    HAL_GPIO_Init(port_to_pointer(port), &init);
-
-    return 0;
-}
-
-void gpio_set(unsigned nr, unsigned on)
-{
-    HAL_GPIO_WritePin(port_to_pointer(GPIO_PORT(nr)), 1 << GPIO_PIN(nr), on);
-}
-
-int gpio_get(unsigned nr)
-{
-    return HAL_GPIO_ReadPin(port_to_pointer(GPIO_PORT(nr)), 1 << GPIO_PIN(nr));
-}
-
diff --git a/platform/stm32f7xx/include/platform/eth.h b/platform/stm32f7xx/include/platform/eth.h
deleted file mode 100644
index 706d7fc7..00000000
--- a/platform/stm32f7xx/include/platform/eth.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Copyright (c) 2015 Carlos Pizano-Uribe <cpu@chromium.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <stdint.h>
-#include <sys/types.h>
-
-/* ethernet driver public api */
-typedef enum {
-    PHY_LAN8742A,     // Microchip.
-    PHY_DP83848,      // Texas Instruments.
-    PHY_KSZ8721,      // Micrel
-} eth_phy_itf;
-
-struct pktbuf;
-
-status_t eth_init(const uint8_t *mac_addr, eth_phy_itf eth_phy);
-status_t stm32_eth_send_minip_pkt(struct pktbuf *p);
-
diff --git a/platform/stm32f7xx/include/platform/gpio.h b/platform/stm32f7xx/include/platform/gpio.h
deleted file mode 100644
index 4de7b53a..00000000
--- a/platform/stm32f7xx/include/platform/gpio.h
+++ /dev/null
@@ -1,33 +0,0 @@
-#ifndef __PLATFORM_STM32_GPIO_H
-#define __PLATFORM_STM32_GPIO_H
-
-/* helper defines for STM32 platforms */
-
-/* flag to gpio_configure */
-#define GPIO_STM32_AF (0x1 << 16)
-#define GPIO_STM32_OD (0x2 << 16)
-#define GPIO_STM32_AFn(n) ((n) << 24)
-
-/* gpio port/pin is packed into a single unsigned int in 16x:8port:8pin format */
-#define GPIO(port, pin) ((unsigned int)(((port) << 8) | (pin)))
-
-#define GPIO_TO_PIN_MASK(gpio) ((unsigned int)( 1 << ((gpio) & 0x0f)))
-
-#define GPIO_PORT(gpio) (((gpio) >> 8) & 0xff)
-#define GPIO_PIN(gpio) ((gpio) & 0xff)
-#define GPIO_AFNUM(gpio) (((gpio) >> 24) & 0xf)
-
-#define GPIO_PORT_A 0
-#define GPIO_PORT_B 1
-#define GPIO_PORT_C 2
-#define GPIO_PORT_D 3
-#define GPIO_PORT_E 4
-#define GPIO_PORT_F 5
-#define GPIO_PORT_G 6
-#define GPIO_PORT_H 7
-#define GPIO_PORT_I 8
-#define GPIO_PORT_J 9
-#define GPIO_PORT_K 10
-
-#endif
-
diff --git a/platform/stm32f7xx/include/platform/n25q128a.h b/platform/stm32f7xx/include/platform/n25q128a.h
deleted file mode 100644
index ec192751..00000000
--- a/platform/stm32f7xx/include/platform/n25q128a.h
+++ /dev/null
@@ -1,212 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    n25q128a.h
-  * @author  MCD Application Team
-  * @version V1.0.0
-  * @date    29-May-2015
-  * @brief   This file contains all the description of the N25Q128A QSPI memory.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __N25Q128A_H
-#define __N25Q128A_H
-
-/* Includes ------------------------------------------------------------------*/
-
-/** @addtogroup BSP
-  * @{
-  */
-
-/** @addtogroup Components
-  * @{
-  */
-
-/** @addtogroup n25q128a
-  * @{
-  */
-
-/** @defgroup N25Q128A_Exported_Types
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup N25Q128A_Exported_Constants
-  * @{
-  */
-
-/**
-  * @brief  N25Q128A Configuration
-  */
-#define N25Q128A_FLASH_SIZE                  0x1000000 /* 128 MBits => 16MBytes */
-#define N25Q128A_SECTOR_SIZE                 0x10000   /* 256 sectors of 64KBytes */
-#define N25Q128A_SUBSECTOR_SIZE              0x1000    /* 4096 subsectors of 4kBytes */
-#define N25Q128A_PAGE_SIZE                   0x100     /* 65536 pages of 256 bytes */
-
-#define N25Q128A_DUMMY_CYCLES_READ           8
-#define N25Q128A_DUMMY_CYCLES_READ_QUAD      10
-
-#define N25Q128A_BULK_ERASE_MAX_TIME         250000
-#define N25Q128A_SECTOR_ERASE_MAX_TIME       3000
-#define N25Q128A_SUBSECTOR_ERASE_MAX_TIME    800
-
-/**
-  * @brief  N25Q128A Commands
-  */
-/* Reset Operations */
-#define RESET_ENABLE_CMD                     0x66
-#define RESET_MEMORY_CMD                     0x99
-
-/* Identification Operations */
-#define READ_ID_CMD                          0x9E
-#define READ_ID_CMD2                         0x9F
-#define MULTIPLE_IO_READ_ID_CMD              0xAF
-#define READ_SERIAL_FLASH_DISCO_PARAM_CMD    0x5A
-
-/* Read Operations */
-#define READ_CMD                             0x03
-#define FAST_READ_CMD                        0x0B
-#define DUAL_OUT_FAST_READ_CMD               0x3B
-#define DUAL_INOUT_FAST_READ_CMD             0xBB
-#define QUAD_OUT_FAST_READ_CMD               0x6B
-#define QUAD_INOUT_FAST_READ_CMD             0xEB
-
-/* Write Operations */
-#define WRITE_ENABLE_CMD                     0x06
-#define WRITE_DISABLE_CMD                    0x04
-
-/* Register Operations */
-#define READ_STATUS_REG_CMD                  0x05
-#define WRITE_STATUS_REG_CMD                 0x01
-
-#define READ_LOCK_REG_CMD                    0xE8
-#define WRITE_LOCK_REG_CMD                   0xE5
-
-#define READ_FLAG_STATUS_REG_CMD             0x70
-#define CLEAR_FLAG_STATUS_REG_CMD            0x50
-
-#define READ_NONVOL_CFG_REG_CMD              0xB5
-#define WRITE_NONVOL_CFG_REG_CMD             0xB1
-
-#define READ_VOL_CFG_REG_CMD                 0x85
-#define WRITE_VOL_CFG_REG_CMD                0x81
-
-#define READ_ENHANCED_VOL_CFG_REG_CMD        0x65
-#define WRITE_ENHANCED_VOL_CFG_REG_CMD       0x61
-
-/* Program Operations */
-#define PAGE_PROG_CMD                        0x02
-#define DUAL_IN_FAST_PROG_CMD                0xA2
-#define EXT_DUAL_IN_FAST_PROG_CMD            0xD2
-#define QUAD_IN_FAST_PROG_CMD                0x32
-#define EXT_QUAD_IN_FAST_PROG_CMD            0x12
-
-/* Erase Operations */
-#define SUBSECTOR_ERASE_CMD                  0x20
-#define SECTOR_ERASE_CMD                     0xD8
-#define BULK_ERASE_CMD                       0xC7
-
-#define PROG_ERASE_RESUME_CMD                0x7A
-#define PROG_ERASE_SUSPEND_CMD               0x75
-
-/* One-Time Programmable Operations */
-#define READ_OTP_ARRAY_CMD                   0x4B
-#define PROG_OTP_ARRAY_CMD                   0x42
-
-/**
-  * @brief  N25Q128A Registers
-  */
-/* Status Register */
-#define N25Q128A_SR_WIP                      ((uint8_t)0x01)    /*!< Write in progress */
-#define N25Q128A_SR_WREN                     ((uint8_t)0x02)    /*!< Write enable latch */
-#define N25Q128A_SR_BLOCKPR                  ((uint8_t)0x5C)    /*!< Block protected against program and erase operations */
-#define N25Q128A_SR_PRBOTTOM                 ((uint8_t)0x20)    /*!< Protected memory area defined by BLOCKPR starts from top or bottom */
-#define N25Q128A_SR_SRWREN                   ((uint8_t)0x80)    /*!< Status register write enable/disable */
-
-/* Nonvolatile Configuration Register */
-#define N25Q128A_NVCR_LOCK                   ((uint16_t)0x0001) /*!< Lock nonvolatile configuration register */
-#define N25Q128A_NVCR_DUAL                   ((uint16_t)0x0004) /*!< Dual I/O protocol */
-#define N25Q128A_NVCR_QUAB                   ((uint16_t)0x0008) /*!< Quad I/O protocol */
-#define N25Q128A_NVCR_RH                     ((uint16_t)0x0010) /*!< Reset/hold */
-#define N25Q128A_NVCR_ODS                    ((uint16_t)0x01C0) /*!< Output driver strength */
-#define N25Q128A_NVCR_XIP                    ((uint16_t)0x0E00) /*!< XIP mode at power-on reset */
-#define N25Q128A_NVCR_NB_DUMMY               ((uint16_t)0xF000) /*!< Number of dummy clock cycles */
-
-/* Volatile Configuration Register */
-#define N25Q128A_VCR_WRAP                    ((uint8_t)0x03)    /*!< Wrap */
-#define N25Q128A_VCR_XIP                     ((uint8_t)0x08)    /*!< XIP */
-#define N25Q128A_VCR_NB_DUMMY                ((uint8_t)0xF0)    /*!< Number of dummy clock cycles */
-
-/* Enhanced Volatile Configuration Register */
-#define N25Q128A_EVCR_ODS                    ((uint8_t)0x07)    /*!< Output driver strength */
-#define N25Q128A_EVCR_VPPA                   ((uint8_t)0x08)    /*!< Vpp accelerator */
-#define N25Q128A_EVCR_RH                     ((uint8_t)0x10)    /*!< Reset/hold */
-#define N25Q128A_EVCR_DUAL                   ((uint8_t)0x40)    /*!< Dual I/O protocol */
-#define N25Q128A_EVCR_QUAD                   ((uint8_t)0x80)    /*!< Quad I/O protocol */
-
-/* Flag Status Register */
-#define N25Q128A_FSR_PRERR                   ((uint8_t)0x02)    /*!< Protection error */
-#define N25Q128A_FSR_PGSUS                   ((uint8_t)0x04)    /*!< Program operation suspended */
-#define N25Q128A_FSR_VPPERR                  ((uint8_t)0x08)    /*!< Invalid voltage during program or erase */
-#define N25Q128A_FSR_PGERR                   ((uint8_t)0x10)    /*!< Program error */
-#define N25Q128A_FSR_ERERR                   ((uint8_t)0x20)    /*!< Erase error */
-#define N25Q128A_FSR_ERSUS                   ((uint8_t)0x40)    /*!< Erase operation suspended */
-#define N25Q128A_FSR_READY                   ((uint8_t)0x80)    /*!< Ready or command in progress */
-
-/**
-  * @}
-  */
-
-/** @defgroup N25Q128A_Exported_Functions
-  * @{
-  */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-#endif /* __N25Q128A_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/platform/stm32f7xx/include/platform/n25q512a.h b/platform/stm32f7xx/include/platform/n25q512a.h
deleted file mode 100644
index c66d939e..00000000
--- a/platform/stm32f7xx/include/platform/n25q512a.h
+++ /dev/null
@@ -1,261 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    n25q512a.h
-  * @author  MCD Application Team
-  * @version V1.0.0
-  * @date    28-April-2015
-  * @brief   This file contains all the description of the N25Q512A QSPI memory.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __N25Q512A_H
-#define __N25Q512A_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-
-/** @addtogroup BSP
-  * @{
-  */
-
-/** @addtogroup Components
-  * @{
-  */
-
-/** @addtogroup n25q512a
-  * @{
-  */
-
-/** @defgroup N25Q512A_Exported_Types
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup N25Q512A_Exported_Constants
-  * @{
-  */
-
-/**
-  * @brief  N25Q512A Configuration
-  */
-#define N25Q512A_FLASH_SIZE                  0x4000000 /* 512 MBits => 64MBytes */
-#define N25Q512A_SECTOR_SIZE                 0x10000   /* 1024 sectors of 64KBytes */
-#define N25Q512A_SUBSECTOR_SIZE              0x1000    /* 16384 subsectors of 4kBytes */
-#define N25Q512A_PAGE_SIZE                   0x100     /* 262144 pages of 256 bytes */
-
-#define N25Q512A_DUMMY_CYCLES_READ           8
-#define N25Q512A_DUMMY_CYCLES_READ_QUAD      10
-#define N25Q512A_DUMMY_CYCLES_READ_DTR       6
-#define N25Q512A_DUMMY_CYCLES_READ_QUAD_DTR  8
-
-#define N25Q512A_BULK_ERASE_MAX_TIME         480000
-#define N25Q512A_SECTOR_ERASE_MAX_TIME       3000
-#define N25Q512A_SUBSECTOR_ERASE_MAX_TIME    800
-
-/**
-  * @brief  N25Q512A Commands
-  */
-/* Reset Operations */
-#define RESET_ENABLE_CMD                     0x66
-#define RESET_MEMORY_CMD                     0x99
-
-/* Identification Operations */
-#define READ_ID_CMD                          0x9E
-#define READ_ID_CMD2                         0x9F
-#define MULTIPLE_IO_READ_ID_CMD              0xAF
-#define READ_SERIAL_FLASH_DISCO_PARAM_CMD    0x5A
-
-/* Read Operations */
-#define READ_CMD                             0x03
-#define READ_4_BYTE_ADDR_CMD                 0x13
-
-#define FAST_READ_CMD                        0x0B
-#define FAST_READ_DTR_CMD                    0x0D
-#define FAST_READ_4_BYTE_ADDR_CMD            0x0C
-
-#define DUAL_OUT_FAST_READ_CMD               0x3B
-#define DUAL_OUT_FAST_READ_DTR_CMD           0x3D
-#define DUAL_OUT_FAST_READ_4_BYTE_ADDR_CMD   0x3C
-
-#define DUAL_INOUT_FAST_READ_CMD             0xBB
-#define DUAL_INOUT_FAST_READ_DTR_CMD         0xBD
-#define DUAL_INOUT_FAST_READ_4_BYTE_ADDR_CMD 0xBC
-
-#define QUAD_OUT_FAST_READ_CMD               0x6B
-#define QUAD_OUT_FAST_READ_DTR_CMD           0x6D
-#define QUAD_OUT_FAST_READ_4_BYTE_ADDR_CMD   0x6C
-
-#define QUAD_INOUT_FAST_READ_CMD             0xEB
-#define QUAD_INOUT_FAST_READ_DTR_CMD         0xED
-#define QUAD_INOUT_FAST_READ_4_BYTE_ADDR_CMD 0xEC
-
-/* Write Operations */
-#define WRITE_ENABLE_CMD                     0x06
-#define WRITE_DISABLE_CMD                    0x04
-
-/* Register Operations */
-#define READ_STATUS_REG_CMD                  0x05
-#define WRITE_STATUS_REG_CMD                 0x01
-
-#define READ_LOCK_REG_CMD                    0xE8
-#define WRITE_LOCK_REG_CMD                   0xE5
-
-#define READ_FLAG_STATUS_REG_CMD             0x70
-#define CLEAR_FLAG_STATUS_REG_CMD            0x50
-
-#define READ_NONVOL_CFG_REG_CMD              0xB5
-#define WRITE_NONVOL_CFG_REG_CMD             0xB1
-
-#define READ_VOL_CFG_REG_CMD                 0x85
-#define WRITE_VOL_CFG_REG_CMD                0x81
-
-#define READ_ENHANCED_VOL_CFG_REG_CMD        0x65
-#define WRITE_ENHANCED_VOL_CFG_REG_CMD       0x61
-
-#define READ_EXT_ADDR_REG_CMD                0xC8
-#define WRITE_EXT_ADDR_REG_CMD               0xC5
-
-/* Program Operations */
-#define PAGE_PROG_CMD                        0x02
-#define PAGE_PROG_4_BYTE_ADDR_CMD            0x12
-
-#define DUAL_IN_FAST_PROG_CMD                0xA2
-#define EXT_DUAL_IN_FAST_PROG_CMD            0xD2
-
-#define QUAD_IN_FAST_PROG_CMD                0x32
-#define EXT_QUAD_IN_FAST_PROG_CMD            0x12 /*0x38*/
-#define QUAD_IN_FAST_PROG_4_BYTE_ADDR_CMD    0x34
-
-/* Erase Operations */
-#define SUBSECTOR_ERASE_CMD                  0x20
-#define SUBSECTOR_ERASE_4_BYTE_ADDR_CMD      0x21
-
-#define SECTOR_ERASE_CMD                     0xD8
-#define SECTOR_ERASE_4_BYTE_ADDR_CMD         0xDC
-
-#define BULK_ERASE_CMD                       0xC7
-
-#define PROG_ERASE_RESUME_CMD                0x7A
-#define PROG_ERASE_SUSPEND_CMD               0x75
-
-/* One-Time Programmable Operations */
-#define READ_OTP_ARRAY_CMD                   0x4B
-#define PROG_OTP_ARRAY_CMD                   0x42
-
-/* 4-byte Address Mode Operations */
-#define ENTER_4_BYTE_ADDR_MODE_CMD           0xB7
-#define EXIT_4_BYTE_ADDR_MODE_CMD            0xE9
-
-/* Quad Operations */
-#define ENTER_QUAD_CMD                       0x35
-#define EXIT_QUAD_CMD                        0xF5
-
-/**
-  * @brief  N25Q512A Registers
-  */
-/* Status Register */
-#define N25Q512A_SR_WIP                      ((uint8_t)0x01)    /*!< Write in progress */
-#define N25Q512A_SR_WREN                     ((uint8_t)0x02)    /*!< Write enable latch */
-#define N25Q512A_SR_BLOCKPR                  ((uint8_t)0x5C)    /*!< Block protected against program and erase operations */
-#define N25Q512A_SR_PRBOTTOM                 ((uint8_t)0x20)    /*!< Protected memory area defined by BLOCKPR starts from top or bottom */
-#define N25Q512A_SR_SRWREN                   ((uint8_t)0x80)    /*!< Status register write enable/disable */
-
-/* Non volatile Configuration Register */
-#define N25Q512A_NVCR_NBADDR                 ((uint16_t)0x0001) /*!< 3-bytes or 4-bytes addressing */
-#define N25Q512A_NVCR_SEGMENT                ((uint16_t)0x0002) /*!< Upper or lower 128Mb segment selected by default */
-#define N25Q512A_NVCR_DUAL                   ((uint16_t)0x0004) /*!< Dual I/O protocol */
-#define N25Q512A_NVCR_QUAB                   ((uint16_t)0x0008) /*!< Quad I/O protocol */
-#define N25Q512A_NVCR_RH                     ((uint16_t)0x0010) /*!< Reset/hold */
-#define N25Q512A_NVCR_ODS                    ((uint16_t)0x01C0) /*!< Output driver strength */
-#define N25Q512A_NVCR_XIP                    ((uint16_t)0x0E00) /*!< XIP mode at power-on reset */
-#define N25Q512A_NVCR_NB_DUMMY               ((uint16_t)0xF000) /*!< Number of dummy clock cycles */
-
-/* Volatile Configuration Register */
-#define N25Q512A_VCR_WRAP                    ((uint8_t)0x03)    /*!< Wrap */
-#define N25Q512A_VCR_XIP                     ((uint8_t)0x08)    /*!< XIP */
-#define N25Q512A_VCR_NB_DUMMY                ((uint8_t)0xF0)    /*!< Number of dummy clock cycles */
-
-/* Extended Address Register */
-#define N25Q512A_EAR_A24                     ((uint8_t)0x01)    /*!< Select the lower or upper 128Mb segment */
-
-/* Enhanced Volatile Configuration Register */
-#define N25Q512A_EVCR_ODS                    ((uint8_t)0x07)    /*!< Output driver strength */
-#define N25Q512A_EVCR_VPPA                   ((uint8_t)0x08)    /*!< Vpp accelerator */
-#define N25Q512A_EVCR_RH                     ((uint8_t)0x10)    /*!< Reset/hold */
-#define N25Q512A_EVCR_DUAL                   ((uint8_t)0x40)    /*!< Dual I/O protocol */
-#define N25Q512A_EVCR_QUAD                   ((uint8_t)0x80)    /*!< Quad I/O protocol */
-
-/* Flag Status Register */
-#define N25Q512A_FSR_NBADDR                  ((uint8_t)0x01)    /*!< 3-bytes or 4-bytes addressing */
-#define N25Q512A_FSR_PRERR                   ((uint8_t)0x02)    /*!< Protection error */
-#define N25Q512A_FSR_PGSUS                   ((uint8_t)0x04)    /*!< Program operation suspended */
-#define N25Q512A_FSR_VPPERR                  ((uint8_t)0x08)    /*!< Invalid voltage during program or erase */
-#define N25Q512A_FSR_PGERR                   ((uint8_t)0x10)    /*!< Program error */
-#define N25Q512A_FSR_ERERR                   ((uint8_t)0x20)    /*!< Erase error */
-#define N25Q512A_FSR_ERSUS                   ((uint8_t)0x40)    /*!< Erase operation suspended */
-#define N25Q512A_FSR_READY                   ((uint8_t)0x80)    /*!< Ready or command in progress */
-
-/**
-  * @}
-  */
-
-/** @defgroup N25Q512A_Exported_Functions
-  * @{
-  */
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __N25Q512A_H */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/platform/stm32f7xx/include/platform/n25qxxa.h b/platform/stm32f7xx/include/platform/n25qxxa.h
deleted file mode 100644
index cdff019e..00000000
--- a/platform/stm32f7xx/include/platform/n25qxxa.h
+++ /dev/null
@@ -1,216 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    n25qxxa.h
-  * @author  MCD Application Team, Adapted by Gurjant Kalsi <me@gurjantkalsi.com>
-  * @version V1.0.0
-  * @date    28-April-2015
-  * @brief   This file contains all the description of the N25QXXA QSPI memory.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __N25QXXA_H
-#define __N25QXXA_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-
-/** @addtogroup BSP
-  * @{
-  */
-
-/** @addtogroup Components
-  * @{
-  */
-
-/** @addtogroup n25qXXA
-  * @{
-  */
-
-/** @defgroup N25QXXA_Exported_Types
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup N25QXXA_Exported_Constants
-  * @{
-  */
-
-/**
-  * @brief  N25QXXA Configuration
-  */
-#define N25QXXA_SECTOR_SIZE                 0x10000   /* 1024 sectors of 64KBytes */
-#define N25QXXA_SUBSECTOR_SIZE              0x1000    /* 16384 subsectors of 4kBytes */
-#define N25QXXA_PAGE_SIZE                   0x100     /* 262144 pages of 256 bytes */
-
-#define N25QXXA_DUMMY_CYCLES_READ           8
-#define N25QXXA_DUMMY_CYCLES_READ_QUAD      10
-
-#define N25QXXA_SECTOR_ERASE_MAX_TIME       3000
-#define N25QXXA_SUBSECTOR_ERASE_MAX_TIME    800
-
-/**
-  * @brief  N25QXXA Commands
-  */
-/* Reset Operations */
-#define RESET_ENABLE_CMD                     0x66
-#define RESET_MEMORY_CMD                     0x99
-
-/* Identification Operations */
-#define READ_ID_CMD                          0x9E
-#define READ_ID_CMD2                         0x9F
-#define MULTIPLE_IO_READ_ID_CMD              0xAF
-#define READ_SERIAL_FLASH_DISCO_PARAM_CMD    0x5A
-
-/* Read Operations */
-#define READ_CMD                             0x03
-#define FAST_READ_CMD                        0x0B
-#define DUAL_OUT_FAST_READ_CMD               0x3B
-#define DUAL_INOUT_FAST_READ_CMD             0xBB
-#define QUAD_OUT_FAST_READ_CMD               0x6B
-#define QUAD_INOUT_FAST_READ_CMD             0xEB
-
-/* Write Operations */
-#define WRITE_ENABLE_CMD                     0x06
-#define WRITE_DISABLE_CMD                    0x04
-
-/* Register Operations */
-#define READ_STATUS_REG_CMD                  0x05
-#define WRITE_STATUS_REG_CMD                 0x01
-
-#define READ_LOCK_REG_CMD                    0xE8
-#define WRITE_LOCK_REG_CMD                   0xE5
-
-#define READ_FLAG_STATUS_REG_CMD             0x70
-#define CLEAR_FLAG_STATUS_REG_CMD            0x50
-
-#define READ_NONVOL_CFG_REG_CMD              0xB5
-#define WRITE_NONVOL_CFG_REG_CMD             0xB1
-
-#define READ_VOL_CFG_REG_CMD                 0x85
-#define WRITE_VOL_CFG_REG_CMD                0x81
-
-#define READ_ENHANCED_VOL_CFG_REG_CMD        0x65
-#define WRITE_ENHANCED_VOL_CFG_REG_CMD       0x61
-
-/* Program Operations */
-#define PAGE_PROG_CMD                        0x02
-#define DUAL_IN_FAST_PROG_CMD                0xA2
-#define EXT_DUAL_IN_FAST_PROG_CMD            0xD2
-#define QUAD_IN_FAST_PROG_CMD                0x32
-#define EXT_QUAD_IN_FAST_PROG_CMD            0x12 /*0x38*/
-
-/* Erase Operations */
-#define SUBSECTOR_ERASE_CMD                  0x20
-#define SECTOR_ERASE_CMD                     0xD8
-#define BULK_ERASE_CMD                       0xC7
-
-#define PROG_ERASE_RESUME_CMD                0x7A
-#define PROG_ERASE_SUSPEND_CMD               0x75
-
-/* One-Time Programmable Operations */
-#define READ_OTP_ARRAY_CMD                   0x4B
-#define PROG_OTP_ARRAY_CMD                   0x42
-
-/**
-  * @brief  N25QXXA Registers
-  */
-/* Status Register */
-#define N25QXXA_SR_WIP                      ((uint8_t)0x01)    /*!< Write in progress */
-#define N25QXXA_SR_WREN                     ((uint8_t)0x02)    /*!< Write enable latch */
-#define N25QXXA_SR_BLOCKPR                  ((uint8_t)0x5C)    /*!< Block protected against program and erase operations */
-#define N25QXXA_SR_PRBOTTOM                 ((uint8_t)0x20)    /*!< Protected memory area defined by BLOCKPR starts from top or bottom */
-#define N25QXXA_SR_SRWREN                   ((uint8_t)0x80)    /*!< Status register write enable/disable */
-
-/* Non volatile Configuration Register */
-#define N25QXXA_NVCR_DUAL                   ((uint16_t)0x0004) /*!< Dual I/O protocol */
-#define N25QXXA_NVCR_QUAB                   ((uint16_t)0x0008) /*!< Quad I/O protocol */
-#define N25QXXA_NVCR_RH                     ((uint16_t)0x0010) /*!< Reset/hold */
-#define N25QXXA_NVCR_ODS                    ((uint16_t)0x01C0) /*!< Output driver strength */
-#define N25QXXA_NVCR_XIP                    ((uint16_t)0x0E00) /*!< XIP mode at power-on reset */
-#define N25QXXA_NVCR_NB_DUMMY               ((uint16_t)0xF000) /*!< Number of dummy clock cycles */
-
-/* Volatile Configuration Register */
-#define N25QXXA_VCR_WRAP                    ((uint8_t)0x03)    /*!< Wrap */
-#define N25QXXA_VCR_XIP                     ((uint8_t)0x08)    /*!< XIP */
-#define N25QXXA_VCR_NB_DUMMY                ((uint8_t)0xF0)    /*!< Number of dummy clock cycles */
-
-/* Enhanced Volatile Configuration Register */
-#define N25QXXA_EVCR_ODS                    ((uint8_t)0x07)    /*!< Output driver strength */
-#define N25QXXA_EVCR_VPPA                   ((uint8_t)0x08)    /*!< Vpp accelerator */
-#define N25QXXA_EVCR_RH                     ((uint8_t)0x10)    /*!< Reset/hold */
-#define N25QXXA_EVCR_DUAL                   ((uint8_t)0x40)    /*!< Dual I/O protocol */
-#define N25QXXA_EVCR_QUAD                   ((uint8_t)0x80)    /*!< Quad I/O protocol */
-
-/* Flag Status Register */
-#define N25QXXA_FSR_PRERR                   ((uint8_t)0x02)    /*!< Protection error */
-#define N25QXXA_FSR_PGSUS                   ((uint8_t)0x04)    /*!< Program operation suspended */
-#define N25QXXA_FSR_VPPERR                  ((uint8_t)0x08)    /*!< Invalid voltage during program or erase */
-#define N25QXXA_FSR_PGERR                   ((uint8_t)0x10)    /*!< Program error */
-#define N25QXXA_FSR_ERERR                   ((uint8_t)0x20)    /*!< Erase error */
-#define N25QXXA_FSR_ERSUS                   ((uint8_t)0x40)    /*!< Erase operation suspended */
-#define N25QXXA_FSR_READY                   ((uint8_t)0x80)    /*!< Ready or command in progress */
-
-/**
-  * @}
-  */
-
-/** @defgroup N25QXXA_Exported_Functions
-  * @{
-  */
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __N25QXXA_H */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/platform/stm32f7xx/include/platform/platform_cm.h b/platform/stm32f7xx/include/platform/platform_cm.h
deleted file mode 100644
index 40fc8a6b..00000000
--- a/platform/stm32f7xx/include/platform/platform_cm.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_CM_H
-#define __PLATFORM_CM_H
-
-#include <stm32f7xx.h>
-
-#endif
-
diff --git a/platform/stm32f7xx/include/platform/qspi.h b/platform/stm32f7xx/include/platform/qspi.h
deleted file mode 100644
index 818aa69d..00000000
--- a/platform/stm32f7xx/include/platform/qspi.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (c) 2015 Gurjant Kalsi <me@gurjantkalsi.com>
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __PLATFORM_STM32_QSPI_H
-#define __PLATFORM_STM32_QSPI_H
-
-#include <stm32f7xx.h>
-
-// Initialize the QSPI Flash device.
-status_t qspi_flash_init(size_t flash_size);
-
-#endif  // __PLATFORM_STM32_QSPI_H
diff --git a/platform/stm32f7xx/include/platform/sdram.h b/platform/stm32f7xx/include/platform/sdram.h
deleted file mode 100644
index a1f013d2..00000000
--- a/platform/stm32f7xx/include/platform/sdram.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Copyright (c) 2015 Carlos Pizano-Uribe <cpu@chromium.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <stdint.h>
-
-enum sdram_bus_width {
-    SDRAM_BUS_WIDTH_8,
-    SDRAM_BUS_WIDTH_16,
-    SDRAM_BUS_WIDTH_32
-};
-
-enum sdram_cas_latency {
-    SDRAM_CAS_LATENCY_1,
-    SDRAM_CAS_LATENCY_2,
-    SDRAM_CAS_LATENCY_3
-};
-
-enum sdram_col_bits_num {
-    SDRAM_COLUMN_BITS_8,
-    SDRAM_COLUMN_BITS_9,
-    SDRAM_COLUMN_BITS_10,
-    SDRAM_COLUMN_BITS_11
-};
-
-typedef struct _sdram_config {
-    enum sdram_bus_width bus_width;
-    enum sdram_cas_latency cas_latency;
-    enum sdram_col_bits_num col_bits_num;
-} sdram_config_t;
-
-// Left to each target to define the GPIO to DRAM bus mapping.
-void stm_sdram_GPIO_init(void);
-
-uint8_t stm32_sdram_init(sdram_config_t *config);
-
diff --git a/platform/stm32f7xx/include/platform/stm32.h b/platform/stm32f7xx/include/platform/stm32.h
deleted file mode 100644
index d37bf25c..00000000
--- a/platform/stm32f7xx/include/platform/stm32.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <sys/types.h>
-
-/* include all of the ST driver library here */
-#include <stm32f7xx.h>
-
-void stm32_debug_early_init(void);
-void stm32_debug_init(void);
-void stm32_timer_early_init(void);
-void stm32_timer_init(void);
-void stm32_gpio_early_init(void);
-void stm32_flash_early_init(void);
-void stm32_flash_init(void);
-void stm32_usbc_early_init(void);
-void stm32_usbc_init(void);
-
-int stm32_uart_getc_poll(int port);
-
-
-/* unique id of device */
-extern uint32_t stm32_unique_id[3];
diff --git a/platform/stm32f7xx/init.c b/platform/stm32f7xx/init.c
deleted file mode 100644
index e8ef5649..00000000
--- a/platform/stm32f7xx/init.c
+++ /dev/null
@@ -1,316 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <debug.h>
-#include <stdlib.h>
-#include <reg.h>
-#include <dev/uart.h>
-#include <platform.h>
-#include <platform/stm32.h>
-#include <platform/sdram.h>
-#include <kernel/novm.h>
-#include <arch/arm/cm.h>
-
-uint32_t SystemCoreClock = HSI_VALUE;
-uint32_t stm32_unique_id[3];
-
-#if defined(ENABLE_SDRAM)
-// target exports this with sdram configuration values
-extern const sdram_config_t target_sdram_config;
-#endif
-
-void SystemInit(void)
-{
-    /* Reset the RCC clock configuration to the default reset state ------------*/
-    /* Set HSION bit */
-    RCC->CR |= (uint32_t)0x00000001;
-
-    /* Reset CFGR register */
-    RCC->CFGR = 0x00000000;
-
-    /* Reset HSEON, CSSON and PLLON bits */
-    RCC->CR &= (uint32_t)0xFEF6FFFF;
-
-    /* Reset PLLCFGR register */
-    RCC->PLLCFGR = 0x24003010;
-
-    /* Reset HSEBYP bit */
-    RCC->CR &= (uint32_t)0xFFFBFFFF;
-
-    /* Disable all interrupts */
-    RCC->CIR = 0x00000000;
-
-    __HAL_RCC_PWR_CLK_ENABLE();
-
-#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
-    SystemInit_ExtMemCtl();
-#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
-}
-
-/**
-  * @brief  System Clock Configuration
-  *         The system Clock is configured as follow :
-  *            System Clock source            = PLL (HSE or HSI)
-  *            SYSCLK(Hz)                     = 216000000
-  *            HCLK(Hz)                       = 216000000
-  *            AHB Prescaler                  = 1
-  *            APB1 Prescaler                 = 4
-  *            APB2 Prescaler                 = 2
-  *            HSE Frequency(Hz)              = 25000000
-  *            PLL_M                          = 25 or 16
-  *            PLL_N                          = 432
-  *            PLL_P                          = 2
-  *            PLL_Q                          = 9
-  *            VDD(V)                         = 3.3
-  *            Main regulator output voltage  = Scale1 mode
-  *            Flash Latency(WS)              = 7
-  * @param  None
-  * @retval None
-  */
-static void SystemClock_Config(void)
-{
-    RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
-    HAL_StatusTypeDef ret = HAL_OK;
-
-#if defined(USE_HSE_XTAL)
-    /* Enable HSE Oscillator and activate PLL with HSE as source.
-     * The external XTAL is a more stable clock source.
-     */
-    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
-    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-    RCC_OscInitStruct.PLL.PLLM = 25;
-    RCC_OscInitStruct.PLL.PLLN = 432;
-    RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
-    RCC_OscInitStruct.PLL.PLLQ = 9;
-#else
-    /* Enable HSI Oscillator and activate PLL with HSI as source.
-     * Some boards like STm32756G-EVAL2 seem to malfuction with the
-     * HSE xtal configuration.
-     */
-    RCC_OscInitStruct.OscillatorType    = RCC_OSCILLATORTYPE_HSI;
-    RCC_OscInitStruct.HSIState          = RCC_HSI_ON;
-    RCC_OscInitStruct.HSICalibrationValue  = 16;
-    RCC_OscInitStruct.PLL.PLLState      = RCC_PLL_ON;
-    RCC_OscInitStruct.PLL.PLLSource     = RCC_PLLSOURCE_HSI;
-    RCC_OscInitStruct.PLL.PLLM          = 16;
-    RCC_OscInitStruct.PLL.PLLN          = 432;
-    RCC_OscInitStruct.PLL.PLLP          = RCC_PLLP_DIV2;
-    RCC_OscInitStruct.PLL.PLLQ          = 9;
-#endif
-
-    ret = HAL_RCC_OscConfig(&RCC_OscInitStruct);
-    if (ret != HAL_OK) {
-        while (1) { ; }
-    }
-
-    /* Activate the OverDrive to reach the 216 MHz Frequency */
-    ret = HAL_PWREx_EnableOverDrive();
-    if (ret != HAL_OK) {
-        while (1) { ; }
-    }
-
-    /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
-    RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
-    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
-    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
-
-    ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
-    if (ret != HAL_OK) {
-        while (1) { ; }
-    }
-}
-
-void stm32_rng_init(void)
-{
-    RNG_HandleTypeDef rng_handle = { 0 };
-
-    __HAL_RCC_RNG_CLK_ENABLE();
-
-    rng_handle.Instance = RNG;
-    HAL_StatusTypeDef status = HAL_RNG_Init(&rng_handle);
-    if (status != HAL_OK) {
-        panic("error initializing random number hardware\n");
-    }
-
-    /* seed the pseudo random number generator with this */
-#if STM32_SEED_RAND_FROM_HWRNG
-    uint32_t r;
-
-    /* discard he first result */
-    status = HAL_RNG_GenerateRandomNumber(&rng_handle, &r);
-    if (status != HAL_OK) {
-        panic("error getting random number from hardware\n");
-    }
-
-    status = HAL_RNG_GenerateRandomNumber(&rng_handle, &r);
-    if (status != HAL_OK) {
-        panic("error getting random number from hardware\n");
-    }
-
-    srand(r);
-#endif
-}
-
-/* set up the mpu to enable caching in the appropriate areas */
-static void mpu_init(void)
-{
-    MPU_Region_InitTypeDef MPU_InitStruct;
-    HAL_MPU_Disable();
-
-    uint region_num = 0;
-
-    /* mark the first bit of the address space as inaccessible, to catch null pointers */
-    MPU_InitStruct.Enable = MPU_REGION_ENABLE;
-    MPU_InitStruct.BaseAddress = 0x0;
-    MPU_InitStruct.Size = MPU_REGION_SIZE_128KB; /* 0x00200000 */
-    MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
-    MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
-    MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
-    MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
-    MPU_InitStruct.Number = region_num++;
-    MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
-    MPU_InitStruct.SubRegionDisable = 0x00;
-    MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
-    HAL_MPU_ConfigRegion(&MPU_InitStruct);
-
-#if defined(ENABLE_SDRAM)
-    /* configure SDRAM */
-    MPU_InitStruct.Enable = MPU_REGION_ENABLE;
-    MPU_InitStruct.BaseAddress = SDRAM_BASE;
-
-    MPU_InitStruct.Size =
-#if   SDRAM_SIZE == 0x00100000
-        MPU_REGION_SIZE_1MB;
-#elif SDRAM_SIZE == 0x00200000
-        MPU_REGION_SIZE_2MB;
-#elif SDRAM_SIZE == 0x00400000
-        MPU_REGION_SIZE_4MB;
-#elif SDRAM_SIZE == 0x00800000
-        MPU_REGION_SIZE_8MB;
-#elif SDRAM_SIZE == 0x01000000
-        MPU_REGION_SIZE_16MB
-#elif SDRAM_SIZE == 0x02000000
-        MPU_REGION_SIZE_32MB;
-#elif SDRAM_SIZE == 0x04000000
-        MPU_REGION_SIZE_64MB;
-#elif SDRAM_SIZE == 0x08000000
-        MPU_REGION_SIZE_128MB;
-#else
-#error SDRAM_SIZE not defined.
-#endif
-
-    MPU_InitStruct.AccessPermission = MPU_REGION_PRIV_RW;
-    MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
-    MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
-    MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
-    MPU_InitStruct.Number = region_num++;
-    MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
-    MPU_InitStruct.SubRegionDisable = 0x00;
-    MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
-    HAL_MPU_ConfigRegion(&MPU_InitStruct);
-#endif
-
-    // SRAM
-#if defined(ENABLE_EXT_SRAM)
-    MPU_InitStruct.Enable = MPU_REGION_ENABLE;
-    MPU_InitStruct.BaseAddress = EXT_SRAM_BASE;
-    MPU_InitStruct.Size = MPU_REGION_SIZE_2MB; // XXX use max size of aperture?
-    MPU_InitStruct.AccessPermission = MPU_REGION_PRIV_RW;
-    MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
-    MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
-    MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
-    MPU_InitStruct.Number = region_num++;
-    MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
-    MPU_InitStruct.SubRegionDisable = 0x00;
-    MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
-
-    HAL_MPU_ConfigRegion(&MPU_InitStruct);
-#endif
-
-    HAL_MPU_Enable(MPU_HFNMI_PRIVDEF);
-}
-
-void platform_early_init(void)
-{
-    // Do general system init
-    SystemInit();
-    SystemClock_Config();
-
-    // Enable the flash ART controller
-    __HAL_FLASH_ART_ENABLE();
-    __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
-
-    /* read the unique id */
-    stm32_unique_id[0] = *REG32(0x1ff0f420);
-    stm32_unique_id[1] = *REG32(0x1ff0f424);
-    stm32_unique_id[2] = *REG32(0x1ff0f428);
-
-    /* seed the random number generator based on this */
-    srand(stm32_unique_id[0] ^ stm32_unique_id[1] ^ stm32_unique_id[2]);
-
-    // Start the systick timer
-    uint32_t sysclk = HAL_RCC_GetSysClockFreq();
-    arm_cm_systick_init(sysclk);
-
-    stm32_timer_early_init();
-    stm32_gpio_early_init();
-    stm32_flash_early_init();
-    stm32_rng_init();
-    stm32_usbc_early_init();
-
-    /* clear the reboot reason */
-    RCC->CSR |= (1<<24);
-
-#if defined(ENABLE_SDRAM)
-    /* initialize SDRAM */
-    stm32_sdram_init((sdram_config_t *)&target_sdram_config);
-
-    /* add a novm arena for it */
-    novm_add_arena("sdram", SDRAM_BASE, SDRAM_SIZE);
-#endif
-
-    mpu_init();
-}
-
-void platform_init(void)
-{
-    printf("clocks:\n");
-    printf("\tsysclk %u\n", HAL_RCC_GetSysClockFreq());
-    printf("\thclk %u\n", HAL_RCC_GetHCLKFreq());
-    printf("\tpclk1 %u\n", HAL_RCC_GetPCLK1Freq());
-    printf("\tpclk2 %u\n", HAL_RCC_GetPCLK2Freq());
-
-    printf("unique id: 0x%08x%08x%08x\n", stm32_unique_id[0], stm32_unique_id[1], stm32_unique_id[2]);
-
-    stm32_timer_init();
-
-    stm32_flash_init();
-
-    stm32_usbc_init();
-}
-
diff --git a/platform/stm32f7xx/patch/qspi_const.patch b/platform/stm32f7xx/patch/qspi_const.patch
deleted file mode 100644
index c1caa40d..00000000
--- a/platform/stm32f7xx/patch/qspi_const.patch
+++ /dev/null
@@ -1,138 +0,0 @@
-diff --git a/platform/stm32f7xx/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_qspi.h b/platform/stm32f7xx/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_qspi.h
-index b9703b7..9571cd6 100644
---- a/platform/stm32f7xx/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_qspi.h
-+++ b/platform/stm32f7xx/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_qspi.h
-@@ -535,21 +535,21 @@ void                  HAL_QSPI_MspDeInit(QSPI_HandleTypeDef *hqspi);
- void                  HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi);
- 
- /* QSPI indirect mode */
--HAL_StatusTypeDef     HAL_QSPI_Command      (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t Timeout);
-+HAL_StatusTypeDef     HAL_QSPI_Command      (QSPI_HandleTypeDef *hqspi, const QSPI_CommandTypeDef *cmd, uint32_t Timeout);
- HAL_StatusTypeDef     HAL_QSPI_Transmit     (QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout);
- HAL_StatusTypeDef     HAL_QSPI_Receive      (QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout);
--HAL_StatusTypeDef     HAL_QSPI_Command_IT   (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd);
-+HAL_StatusTypeDef     HAL_QSPI_Command_IT   (QSPI_HandleTypeDef *hqspi, const QSPI_CommandTypeDef *cmd);
- HAL_StatusTypeDef     HAL_QSPI_Transmit_IT  (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
- HAL_StatusTypeDef     HAL_QSPI_Receive_IT   (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
- HAL_StatusTypeDef     HAL_QSPI_Transmit_DMA (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
- HAL_StatusTypeDef     HAL_QSPI_Receive_DMA  (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
- 
- /* QSPI status flag polling mode */
--HAL_StatusTypeDef     HAL_QSPI_AutoPolling   (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout);
--HAL_StatusTypeDef     HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg);
-+HAL_StatusTypeDef     HAL_QSPI_AutoPolling   (QSPI_HandleTypeDef *hqspi, const QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout);
-+HAL_StatusTypeDef     HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, const QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg);
- 
- /* QSPI memory-mapped mode */
--HAL_StatusTypeDef     HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg);
-+HAL_StatusTypeDef     HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, const QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg);
- /**
-   * @}
-   */
-diff --git a/platform/stm32f7xx/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c b/platform/stm32f7xx/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c
-index ae028c0..baafa7d 100644
---- a/platform/stm32f7xx/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c
-+++ b/platform/stm32f7xx/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c
-@@ -202,7 +202,7 @@ static void QSPI_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
- static void QSPI_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
- static void QSPI_DMAError(DMA_HandleTypeDef *hdma);
- static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag, FlagStatus State, uint32_t Timeout);
--static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t FunctionalMode);
-+static void QSPI_Config(QSPI_HandleTypeDef *hqspi, const QSPI_CommandTypeDef *cmd, uint32_t FunctionalMode);
- /**
-   * @}
-   */
-@@ -540,7 +540,7 @@ void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi)
-   * @note   This function is used only in Indirect Read or Write Modes
-   * @retval HAL status
-   */
--HAL_StatusTypeDef HAL_QSPI_Command(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t Timeout)
-+HAL_StatusTypeDef HAL_QSPI_Command(QSPI_HandleTypeDef *hqspi, const QSPI_CommandTypeDef *cmd, uint32_t Timeout)
- {
-     HAL_StatusTypeDef status = HAL_ERROR;
- 
-@@ -618,7 +618,7 @@ HAL_StatusTypeDef HAL_QSPI_Command(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDe
-   * @note   This function is used only in Indirect Read or Write Modes
-   * @retval HAL status
-   */
--HAL_StatusTypeDef HAL_QSPI_Command_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd)
-+HAL_StatusTypeDef HAL_QSPI_Command_IT(QSPI_HandleTypeDef *hqspi, const QSPI_CommandTypeDef *cmd)
- {
-     HAL_StatusTypeDef status = HAL_ERROR;
- 
-@@ -1059,7 +1059,7 @@ HAL_StatusTypeDef HAL_QSPI_Receive_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData
-   * @note   This function is used only in Automatic Polling Mode
-   * @retval HAL status
-   */
--HAL_StatusTypeDef HAL_QSPI_AutoPolling(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout)
-+HAL_StatusTypeDef HAL_QSPI_AutoPolling(QSPI_HandleTypeDef *hqspi, const QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout)
- {
-     HAL_StatusTypeDef status = HAL_ERROR;
- 
-@@ -1118,8 +1118,18 @@ HAL_StatusTypeDef HAL_QSPI_AutoPolling(QSPI_HandleTypeDef *hqspi, QSPI_CommandTy
-             MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS),
-                        (cfg->MatchMode | QSPI_AUTOMATIC_STOP_ENABLE));
- 
-+            ////////////////////////////////////////////////////////////////////
-+
-+            // Removed by gkalsi <github.com/gkalsi> to permit const objects to
-+            // be passed into this function.
-+            // NOTE: The caller is now responsible for setting cmd->NbData ==
-+            // cfg->StatusBytesSize prior to calling this function.
-+
-+            // cmd->NbData = cfg->StatusBytesSize;
-+
-+            ////////////////////////////////////////////////////////////////////
-+
-             /* Call the configuration function */
--            cmd->NbData = cfg->StatusBytesSize;
-             QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING);
- 
-             /* Wait until SM flag is set to go back in idle state */
-@@ -1150,7 +1160,7 @@ HAL_StatusTypeDef HAL_QSPI_AutoPolling(QSPI_HandleTypeDef *hqspi, QSPI_CommandTy
-   * @note   This function is used only in Automatic Polling Mode
-   * @retval HAL status
-   */
--HAL_StatusTypeDef HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg)
-+HAL_StatusTypeDef HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, const QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg)
- {
-     HAL_StatusTypeDef status = HAL_ERROR;
- 
-@@ -1208,8 +1218,18 @@ HAL_StatusTypeDef HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, QSPI_Comman
-             MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS),
-                        (cfg->MatchMode | cfg->AutomaticStop));
- 
-+            ////////////////////////////////////////////////////////////////////
-+
-+            // Removed by gkalsi <github.com/gkalsi> to permit const objects to
-+            // be passed into this function.
-+            // NOTE: The caller is now responsible for setting cmd->NbData ==
-+            // cfg->StatusBytesSize prior to calling this function.
-+
-+            // cmd->NbData = cfg->StatusBytesSize;
-+
-+            ////////////////////////////////////////////////////////////////////
-+
-             /* Call the configuration function */
--            cmd->NbData = cfg->StatusBytesSize;
-             QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING);
- 
-             /* Enable the QSPI Transfer Error, FIFO threshold and status match Interrupt */
-@@ -1234,7 +1254,7 @@ HAL_StatusTypeDef HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, QSPI_Comman
-   * @note   This function is used only in Memory mapped Mode
-   * @retval HAL status
-   */
--HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg)
-+HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, const QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg)
- {
-     HAL_StatusTypeDef status = HAL_ERROR;
- 
-@@ -1647,7 +1667,7 @@ static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqsp
-   *            @arg QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED: Memory-mapped mode
-   * @retval None
-   */
--static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t FunctionalMode)
-+static void QSPI_Config(QSPI_HandleTypeDef *hqspi, const QSPI_CommandTypeDef *cmd, uint32_t FunctionalMode)
- {
-     assert_param(IS_QSPI_FUNCTIONAL_MODE(FunctionalMode));
- 
diff --git a/platform/stm32f7xx/qspi.c b/platform/stm32f7xx/qspi.c
deleted file mode 100644
index 1b20df3b..00000000
--- a/platform/stm32f7xx/qspi.c
+++ /dev/null
@@ -1,1082 +0,0 @@
-/*
- * Copyright (c) 2015 Gurjant Kalsi <me@gurjantkalsi.com>
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <pow2.h>
-#include <stdlib.h>
-#include <string.h>
-
-#include <arch/arm/cm.h>
-#include <kernel/event.h>
-#include <kernel/mutex.h>
-#include <lib/bio.h>
-#include <platform.h>
-#include <platform/n25qxxa.h>
-#include <platform/n25q128a.h>
-#include <platform/n25q512a.h>
-#include <platform/qspi.h>
-#include <trace.h>
-
-#define LOCAL_TRACE 0
-
-#define FOUR_BYTE_ADDR_THRESHOLD (1 << 24)
-#define LOCAL_TRACE 0
-#define MAX_DMA_WAIT_MS 1024
-
-typedef void (*CpltCallback)(void);
-
-typedef enum {
-    QSPI_STATE_LINEAR,
-    QSPI_STATE_COMMAND,
-    QSPI_STATE_MAX
-} device_state_t;
-device_state_t device_state;
-
-
-static QSPI_HandleTypeDef qspi_handle;
-static DMA_Stream_TypeDef *dma2_stream7;
-static CpltCallback cplt_callback;
-
-static const char device_name[] = "qspi-flash";
-static bdev_t qspi_flash_device;
-static bio_erase_geometry_info_t geometry;
-
-static mutex_t spiflash_mutex;
-
-// Functions exported to Block I/O handler.
-static ssize_t spiflash_bdev_read(struct bdev *device, void *buf, off_t offset, size_t len);
-static ssize_t spiflash_bdev_read_block(struct bdev *device, void *buf, bnum_t block, uint count);
-static ssize_t spiflash_bdev_write_block(struct bdev *device, const void *buf, bnum_t block, uint count);
-static ssize_t spiflash_bdev_erase(struct bdev *device, off_t offset, size_t len);
-static int spiflash_ioctl(struct bdev *device, int request, void *argp);
-
-static ssize_t qspi_write_page_unsafe(uint32_t addr, const uint8_t *data);
-
-static ssize_t qspi_erase(bdev_t *device, uint32_t block_addr, uint32_t instruction);
-static ssize_t qspi_bulk_erase(bdev_t *device);
-static ssize_t qspi_erase_sector(bdev_t *device, uint32_t block_addr);
-static ssize_t qspi_erase_subsector(bdev_t *device, uint32_t block_addr);
-static status_t qspi_auto_polling_mem_ready_unsafe(QSPI_HandleTypeDef *hqspi, uint8_t match, uint8_t mask);
-
-static HAL_StatusTypeDef qspi_cmd(QSPI_HandleTypeDef *, QSPI_CommandTypeDef *);
-static HAL_StatusTypeDef qspi_tx_dma(QSPI_HandleTypeDef *, QSPI_CommandTypeDef *, uint8_t *);
-static HAL_StatusTypeDef qspi_rx_dma(QSPI_HandleTypeDef *, QSPI_CommandTypeDef *, uint8_t *);
-
-static status_t qspi_enable_linear(void);
-static status_t qspi_disable_linear(void);
-static bool qspi_is_linear(void);
-
-status_t qspi_dma_init(QSPI_HandleTypeDef *hqspi);
-
-static uint32_t get_specialized_instruction(uint32_t instruction, uint32_t address);
-static uint32_t get_address_size(uint32_t address);
-
-static event_t cmd_event;
-static event_t rx_event;
-static event_t tx_event;
-static event_t st_event;
-
-status_t hal_error_to_status(HAL_StatusTypeDef hal_status);
-
-// Unsetting the DMA Enable bit in the DMA Control register isn't enough to
-// disable the DMA Engine since DMA transfers may still be in progress.
-// We have to wait for the DMA Engine to acknowledge being disabled by watching
-// the DMA Enable bit.
-static status_t dma_disable(DMA_Stream_TypeDef *dma)
-{
-    // Unset the DMA Enable bit.
-    dma->CR &= ~DMA_SxCR_EN;
-
-    lk_time_t start_time = current_time();
-
-    while (dma->CR & DMA_SxCR_EN) {
-
-        dma->CR &= ~DMA_SxCR_EN;
-
-        if (current_time() - start_time > MAX_DMA_WAIT_MS) {
-            return ERR_TIMED_OUT;
-        }
-    }
-
-    return NO_ERROR;
-}
-
-// Must hold spiflash_mutex before calling.
-static status_t qspi_write_enable_unsafe(QSPI_HandleTypeDef *hqspi)
-{
-    HAL_StatusTypeDef status;
-
-    static const QSPI_CommandTypeDef s_command = {
-        .InstructionMode = QSPI_INSTRUCTION_1_LINE,
-        .Instruction = WRITE_ENABLE_CMD,
-        .AddressMode = QSPI_ADDRESS_NONE,
-        .AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE,
-        .DataMode = QSPI_DATA_NONE,
-        .DummyCycles = 0,
-        .DdrMode = QSPI_DDR_MODE_DISABLE,
-        .DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY,
-        .SIOOMode = QSPI_SIOO_INST_EVERY_CMD
-    };
-
-    status = HAL_QSPI_Command(hqspi, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
-    if (status != HAL_OK) {
-        dprintf(CRITICAL, "%s: HAL_QSPI_Command failed with err = %d\n",
-                __func__, status);
-        return hal_error_to_status(status);
-    }
-
-    status = qspi_auto_polling_mem_ready_unsafe(hqspi, N25QXXA_SR_WREN, N25QXXA_SR_WREN);
-    if (status != HAL_OK) {
-        dprintf(CRITICAL, "%s: auto_polling_mem_ready failed with err = %d\n",
-                __func__, status);
-        return hal_error_to_status(status);
-    }
-
-    return NO_ERROR;
-}
-
-// Must hold spiflash_mutex before calling.
-static status_t qspi_dummy_cycles_cfg_unsafe(QSPI_HandleTypeDef *hqspi)
-{
-    uint8_t reg;
-    HAL_StatusTypeDef status;
-
-    /* Initialize the read volatile configuration register command */
-    static const QSPI_CommandTypeDef init_rvcr_cmd = {
-        .InstructionMode = QSPI_INSTRUCTION_1_LINE,
-        .Instruction = READ_VOL_CFG_REG_CMD,
-        .AddressMode = QSPI_ADDRESS_NONE,
-        .AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE,
-        .DataMode = QSPI_DATA_1_LINE,
-        .DummyCycles = 0,
-        .NbData = 1,
-        .DdrMode = QSPI_DDR_MODE_DISABLE,
-        .DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY,
-        .SIOOMode = QSPI_SIOO_INST_EVERY_CMD
-    };
-
-    /* Configure the command */
-    status = HAL_QSPI_Command(hqspi, &init_rvcr_cmd, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
-    if (status != HAL_OK) {
-        dprintf(CRITICAL, "%s: HAL_QSPI_Command(init_rvcr_cmd) failed with err = %d\n",
-                __func__, status);
-        return hal_error_to_status(status);
-    }
-
-    /* Reception of the data */
-    status = HAL_QSPI_Receive(hqspi, &reg, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
-    if (status != HAL_OK) {
-        dprintf(CRITICAL, "%s: HAL_QSPI_Receive failed with err = %d\n",
-                __func__, status);
-        return hal_error_to_status(status);
-    }
-
-    /* Enable write operations */
-    status = qspi_write_enable_unsafe(hqspi);
-    if (status != NO_ERROR) {
-        dprintf(CRITICAL, "%s: HAL_QSPI_Receive failed with err = %d\n",
-                __func__, status);
-        return status;
-    }
-
-    /* Update volatile configuration register (with new dummy cycles) */
-    static const QSPI_CommandTypeDef update_rvcr_cmd = {
-        .InstructionMode = QSPI_INSTRUCTION_1_LINE,
-        .Instruction = WRITE_VOL_CFG_REG_CMD,
-        .AddressMode = QSPI_ADDRESS_NONE,
-        .AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE,
-        .DataMode = QSPI_DATA_1_LINE,
-        .DummyCycles = 0,
-        .NbData = 1,
-        .DdrMode = QSPI_DDR_MODE_DISABLE,
-        .DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY,
-        .SIOOMode = QSPI_SIOO_INST_EVERY_CMD
-    };
-    MODIFY_REG(
-        reg, N25QXXA_VCR_NB_DUMMY,
-        (N25QXXA_DUMMY_CYCLES_READ_QUAD << POSITION_VAL(N25QXXA_VCR_NB_DUMMY)));
-
-    /* Configure the write volatile configuration register command */
-    status = HAL_QSPI_Command(hqspi, &update_rvcr_cmd, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
-    if (status != HAL_OK) {
-        dprintf(CRITICAL, "%s: HAL_QSPI_Command(update_rvcr_cmd) failed with err = %d\n",
-                __func__, status);
-        return hal_error_to_status(status);
-    }
-
-    /* Transmission of the data */
-    status = HAL_QSPI_Transmit(hqspi, &reg, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
-    if (status != HAL_OK) {
-        dprintf(CRITICAL, "%s: HAL_QSPI_Transmit failed with err = %d\n",
-                __func__, status);
-        return hal_error_to_status(status);
-    }
-
-    return NO_ERROR;
-}
-
-// Must hold spiflash_mutex before calling.
-static status_t qspi_auto_polling_mem_ready_unsafe(QSPI_HandleTypeDef *hqspi, uint8_t match, uint8_t mask)
-{
-    QSPI_AutoPollingTypeDef s_config;
-    HAL_StatusTypeDef status;
-
-    static const QSPI_CommandTypeDef s_command = {
-        .InstructionMode = QSPI_INSTRUCTION_1_LINE,
-        .Instruction = READ_STATUS_REG_CMD,
-        .AddressMode = QSPI_ADDRESS_NONE,
-        .AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE,
-        .DataMode = QSPI_DATA_1_LINE,
-        .DummyCycles = 0,
-        .DdrMode = QSPI_DDR_MODE_DISABLE,
-        .DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY,
-        .SIOOMode = QSPI_SIOO_INST_EVERY_CMD,
-        .NbData = 1
-    };
-
-    s_config.Match = match;
-    s_config.Mask = mask;
-    s_config.MatchMode = QSPI_MATCH_MODE_AND;
-    s_config.StatusBytesSize = 1;
-    s_config.Interval = 0x10;
-    s_config.AutomaticStop = QSPI_AUTOMATIC_STOP_ENABLE;
-
-    status = HAL_QSPI_AutoPolling_IT(hqspi, &s_command, &s_config);
-    if (status != HAL_OK) {
-        dprintf(CRITICAL, "%s: HAL_QSPI_AutoPolling_IT failed with err = %d\n",
-                __func__, status);
-        return hal_error_to_status(status);
-    }
-    event_wait(&st_event);
-
-    return NO_ERROR;
-}
-
-// Must hold spiflash_mutex before calling.
-static status_t qspi_reset_memory_unsafe(QSPI_HandleTypeDef *hqspi)
-{
-    QSPI_CommandTypeDef s_command;
-    HAL_StatusTypeDef status;
-
-    /* Initialize the reset enable command */
-    s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
-    s_command.Instruction = RESET_ENABLE_CMD;
-    s_command.AddressMode = QSPI_ADDRESS_NONE;
-    s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
-    s_command.DataMode = QSPI_DATA_NONE;
-    s_command.DummyCycles = 0;
-    s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
-    s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
-    s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
-
-    /* Send the command */
-    status = HAL_QSPI_Command(hqspi, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
-    if (status != HAL_OK) {
-        dprintf(CRITICAL, "%s: HAL_QSPI_Command(RESET_ENABLE_CMD) failed with err = %d\n",
-                __func__, status);
-        return hal_error_to_status(status);
-    }
-
-    /* Send the reset memory command */
-    s_command.Instruction = RESET_MEMORY_CMD;
-    status = HAL_QSPI_Command(hqspi, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
-    if (status != HAL_OK) {
-        dprintf(CRITICAL, "%s: HAL_QSPI_Command(RESET_MEMORY_CMD) failed with err = %d\n",
-                __func__, status);
-        return hal_error_to_status(status);
-    }
-
-    /* Configure automatic polling mode to wait the memory is ready */
-    status = qspi_auto_polling_mem_ready_unsafe(hqspi, 0, N25QXXA_SR_WIP);
-    if (status != NO_ERROR) {
-        dprintf(CRITICAL, "%s: auto_polling_mem_ready failed with err = %d\n",
-                __func__, status);
-        return hal_error_to_status(status);
-    }
-
-    return NO_ERROR;
-}
-
-static ssize_t spiflash_bdev_read_block(struct bdev *device, void *buf,
-                                        bnum_t block, uint count)
-{
-    LTRACEF("device %p, buf %p, block %u, count %u\n",
-            device, buf, block, count);
-
-    if (!IS_ALIGNED((uintptr_t)buf, CACHE_LINE)) {
-        DEBUG_ASSERT(IS_ALIGNED((uintptr_t)buf, CACHE_LINE));
-        return ERR_INVALID_ARGS;
-    }
-
-    count = bio_trim_block_range(device, block, count);
-    if (count == 0)
-        return 0;
-
-    QSPI_CommandTypeDef s_command;
-    HAL_StatusTypeDef status;
-
-    uint64_t largest_offset = (block + count) * device->block_size - 1;
-
-    // /* Initialize the read command */
-    s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
-    s_command.Instruction = get_specialized_instruction(QUAD_OUT_FAST_READ_CMD, largest_offset);
-    s_command.AddressMode = QSPI_ADDRESS_1_LINE;
-    s_command.AddressSize = get_address_size(largest_offset);
-    s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
-    s_command.DataMode = QSPI_DATA_4_LINES;
-    s_command.DummyCycles = N25QXXA_DUMMY_CYCLES_READ_QUAD;
-    s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
-    s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
-    s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
-
-    s_command.NbData = device->block_size;
-
-    ssize_t retcode = 0;
-
-    mutex_acquire(&spiflash_mutex);
-
-    s_command.Address = block * device->block_size;
-    for (uint i = 0; i < count; i++) {
-
-        status = HAL_QSPI_Command(&qspi_handle, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
-        if (status != HAL_OK) {
-            retcode = hal_error_to_status(status);
-            dprintf(CRITICAL, "%s: HAL_QSPI_Command failed with err = %ld\n",
-                    __func__, retcode);
-            goto err;
-        }
-
-        // /* Reception of the data */
-        status = qspi_rx_dma(&qspi_handle, &s_command, buf);
-        if (status != HAL_OK) {
-            retcode = hal_error_to_status(status);
-            dprintf(CRITICAL, "%s: qspi_rx_dma failed with err = %ld\n",
-                    __func__, retcode);
-            goto err;
-        }
-
-        buf += device->block_size;
-        retcode += device->block_size;
-        s_command.Address += device->block_size;
-    }
-
-err:
-    mutex_release(&spiflash_mutex);
-    return retcode;
-}
-
-static ssize_t spiflash_bdev_write_block(struct bdev *device, const void *_buf,
-        bnum_t block, uint count)
-{
-    count = bio_trim_block_range(device, block, count);
-    if (count == 0) {
-        return 0;
-    }
-
-    const uint8_t *buf = _buf;
-
-    mutex_acquire(&spiflash_mutex);
-
-    ssize_t total_bytes_written = 0;
-    for (; count > 0; count--, block++) {
-        ssize_t bytes_written = qspi_write_page_unsafe(block * N25QXXA_PAGE_SIZE, buf);
-        if (bytes_written < 0) {
-            dprintf(CRITICAL, "%s: qspi_write_page_unsafe failed with err = %ld\n",
-                    __func__, bytes_written);
-            total_bytes_written = bytes_written;
-            goto err;
-        }
-
-        buf += N25QXXA_PAGE_SIZE;
-        total_bytes_written += bytes_written;
-    }
-
-err:
-    mutex_release(&spiflash_mutex);
-    return total_bytes_written;
-}
-
-static ssize_t spiflash_bdev_erase(struct bdev *device, off_t offset,
-                                   size_t len)
-{
-    len = bio_trim_range(device, offset, len);
-    if (len == 0) {
-        return 0;
-    }
-
-    ssize_t total_erased = 0;
-
-    mutex_acquire(&spiflash_mutex);
-
-    // Choose an erase strategy based on the number of bytes being erased.
-    if (len == device->total_size && offset == 0) {
-        // Bulk erase the whole flash.
-        total_erased = qspi_bulk_erase(device);
-        goto finish;
-    }
-
-    // Erase as many sectors as necessary, then switch to subsector erase for
-    // more fine grained erasure.
-    while (((ssize_t)len - total_erased) >= N25QXXA_SECTOR_SIZE) {
-        ssize_t erased = qspi_erase_sector(device, offset);
-        if (erased < 0) {
-            total_erased = erased;
-            goto finish;
-        }
-        total_erased += erased;
-        offset += erased;
-    }
-
-    while (total_erased < (ssize_t)len) {
-        ssize_t erased = qspi_erase_subsector(device, offset);
-        if (erased < 0) {
-            total_erased = erased;
-            goto finish;
-        }
-        total_erased += erased;
-        offset += erased;
-    }
-
-finish:
-    mutex_release(&spiflash_mutex);
-    return total_erased;
-}
-
-static int spiflash_ioctl(struct bdev *device, int request, void *argp)
-{
-    int ret = NO_ERROR;
-
-    switch (request) {
-        case BIO_IOCTL_GET_MEM_MAP:
-            /* put the device into linear mode */
-            ret = qspi_enable_linear();
-            // Fallthrough.
-        case BIO_IOCTL_GET_MAP_ADDR:
-            if (argp)
-                *(void **)argp = (void *)QSPI_BASE;
-            break;
-        case BIO_IOCTL_PUT_MEM_MAP:
-            ret = qspi_disable_linear();
-            break;
-        case BIO_IOCTL_IS_MAPPED:
-            if (argp)
-                *(void **)argp = (void *)qspi_is_linear();
-            break;
-        default:
-            ret = ERR_NOT_SUPPORTED;
-    }
-
-    return ret;
-}
-
-static ssize_t qspi_write_page_unsafe(uint32_t addr, const uint8_t *data)
-{
-    if (!IS_ALIGNED(addr, N25QXXA_PAGE_SIZE)) {
-        return ERR_INVALID_ARGS;
-    }
-
-    HAL_StatusTypeDef status;
-
-    QSPI_CommandTypeDef s_command = {
-        .InstructionMode   = QSPI_INSTRUCTION_1_LINE,
-        .Instruction       = get_specialized_instruction(QUAD_IN_FAST_PROG_CMD, addr),
-        .AddressMode       = QSPI_ADDRESS_1_LINE,
-        .AddressSize       = get_address_size(addr),
-        .AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE,
-        .DataMode          = QSPI_DATA_4_LINES,
-        .DummyCycles       = 0,
-        .DdrMode           = QSPI_DDR_MODE_DISABLE,
-        .DdrHoldHalfCycle  = QSPI_DDR_HHC_ANALOG_DELAY,
-        .SIOOMode          = QSPI_SIOO_INST_EVERY_CMD,
-        .Address           = addr,
-        .NbData            = N25QXXA_PAGE_SIZE
-    };
-
-    status_t write_enable_result = qspi_write_enable_unsafe(&qspi_handle);
-    if (write_enable_result != NO_ERROR) {
-        dprintf(CRITICAL, "%s: qspi_write_enable_unsafe failed with err = %d\n",
-                    __func__, write_enable_result);
-        return write_enable_result;
-    }
-
-    status = HAL_QSPI_Command(&qspi_handle, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
-    if (status != HAL_OK) {
-        dprintf(CRITICAL, "%s: HAL_QSPI_Command failed with err = %d\n",
-                    __func__, status);
-        return hal_error_to_status(status);
-    }
-
-    status = qspi_tx_dma(&qspi_handle, &s_command, (uint8_t *)data);
-    if (status != HAL_OK) {
-        dprintf(CRITICAL, "%s: qspi_tx_dma failed with err = %d\n",
-                    __func__, status);
-        return hal_error_to_status(status);
-    }
-
-    status_t auto_polling_mem_ready_result =
-        qspi_auto_polling_mem_ready_unsafe(&qspi_handle, 0, N25QXXA_SR_WIP);
-    if (auto_polling_mem_ready_result != NO_ERROR) {
-        dprintf(CRITICAL, "%s: auto_polling_mem_ready failed with err = %d\n",
-                __func__, auto_polling_mem_ready_result);
-        return auto_polling_mem_ready_result;
-    }
-
-    return N25QXXA_PAGE_SIZE;
-}
-
-
-status_t qspi_flash_init(size_t flash_size)
-{
-    status_t result = NO_ERROR;
-
-    event_init(&cmd_event, false, EVENT_FLAG_AUTOUNSIGNAL);
-    event_init(&tx_event, false, EVENT_FLAG_AUTOUNSIGNAL);
-    event_init(&rx_event, false, EVENT_FLAG_AUTOUNSIGNAL);
-    event_init(&st_event, false, EVENT_FLAG_AUTOUNSIGNAL);
-
-    mutex_init(&spiflash_mutex);
-    result = mutex_acquire(&spiflash_mutex);
-    if (result != NO_ERROR) {
-        return result;
-    }
-
-    qspi_handle.Instance = QUADSPI;
-
-    HAL_StatusTypeDef status;
-
-    // Enable the QuadSPI memory interface clock
-    __HAL_RCC_QSPI_CLK_ENABLE();
-
-    // Reset the QuadSPI memory interface
-    __HAL_RCC_QSPI_FORCE_RESET();
-    __HAL_RCC_QSPI_RELEASE_RESET();
-
-    // Setup the QSPI Flash device.
-    qspi_handle.Init.ClockPrescaler = 1;
-    qspi_handle.Init.FifoThreshold = 4;
-    qspi_handle.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE;
-    qspi_handle.Init.FlashSize = POSITION_VAL(flash_size) - 1;
-    qspi_handle.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_2_CYCLE;
-    qspi_handle.Init.ClockMode = QSPI_CLOCK_MODE_0;
-    qspi_handle.Init.FlashID = QSPI_FLASH_ID_1;
-    qspi_handle.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
-
-    status = HAL_QSPI_Init(&qspi_handle);
-    if (status != HAL_OK) {
-        result = hal_error_to_status(status);
-        dprintf(CRITICAL, "%s: HAL_QSPI_Init failed with err = %d\n",
-                __func__, result);
-        goto err;
-    }
-
-    // enable the qspi interrupt
-    HAL_NVIC_EnableIRQ(QUADSPI_IRQn);
-
-    result = qspi_reset_memory_unsafe(&qspi_handle);
-    if (result != NO_ERROR) {
-        dprintf(CRITICAL, "%s: qspi_reset_memory_unsafe failed with err = %d\n",
-                __func__, result);
-        goto err;
-    }
-
-    result = qspi_dummy_cycles_cfg_unsafe(&qspi_handle);
-    if (result != NO_ERROR) {
-        dprintf(CRITICAL, "%s: qspi_dummy_cycles_cfg_unsafe failed with err = %d\n",
-                __func__, result);
-        goto err;
-    }
-
-    result = qspi_dma_init(&qspi_handle);
-    if (result != NO_ERROR) {
-        dprintf(CRITICAL, "%s: qspi_dma_init failed with err = %d\n",
-                __func__, result);
-        goto err;
-    }
-
-    result = hal_error_to_status(HAL_QSPI_Abort(&qspi_handle));
-    if (result != NO_ERROR) {
-        dprintf(CRITICAL, "%s: HAL_QSPI_Abort failed with err = %d\n",
-                __func__, result);
-        goto err;
-    }
-    device_state = QSPI_STATE_COMMAND;
-
-    // Initialize the QSPI Flash and register it as a Block I/O device.
-    geometry.erase_size = log2_uint(N25QXXA_SUBSECTOR_SIZE);
-    geometry.erase_shift = log2_uint(N25QXXA_SUBSECTOR_SIZE);
-    geometry.start = 0;
-    geometry.size = flash_size;
-
-    bio_initialize_bdev(&qspi_flash_device, device_name, N25QXXA_PAGE_SIZE,
-                        (flash_size / N25QXXA_PAGE_SIZE), 1, &geometry,
-                        BIO_FLAG_CACHE_ALIGNED_READS);
-
-    // qspi_flash_device.read: Use default hook.
-    qspi_flash_device.read_block = &spiflash_bdev_read_block;
-    // qspi_flash_device.write has a default hook that will be okay
-    qspi_flash_device.write_block = &spiflash_bdev_write_block;
-    qspi_flash_device.erase = &spiflash_bdev_erase;
-    qspi_flash_device.ioctl = &spiflash_ioctl;
-
-    /* we erase to 0xff */
-    qspi_flash_device.erase_byte = 0xff;
-
-    bio_register_device(&qspi_flash_device);
-
-err:
-    mutex_release(&spiflash_mutex);
-    return result;
-}
-
-status_t hal_error_to_status(HAL_StatusTypeDef hal_status)
-{
-    switch (hal_status) {
-        case HAL_OK:
-            return NO_ERROR;
-        case HAL_ERROR:
-            return ERR_GENERIC;
-        case HAL_BUSY:
-            return ERR_BUSY;
-        case HAL_TIMEOUT:
-            return ERR_TIMED_OUT;
-        default:
-            return ERR_GENERIC;
-    }
-}
-
-static ssize_t qspi_erase(bdev_t *device, uint32_t block_addr, uint32_t instruction)
-{
-    if (instruction == BULK_ERASE_CMD && block_addr != 0) {
-        // This call was probably not what the user intended since the
-        // block_addr is irrelevant when performing a bulk erase.
-        return ERR_INVALID_ARGS;
-    }
-
-    QSPI_CommandTypeDef erase_cmd;
-    ssize_t num_erased_bytes;
-    switch (instruction) {
-        case SUBSECTOR_ERASE_CMD: {
-            num_erased_bytes = N25QXXA_SUBSECTOR_SIZE;
-            erase_cmd.AddressSize = get_address_size(block_addr);
-            erase_cmd.Instruction = get_specialized_instruction(instruction, block_addr);
-            erase_cmd.AddressMode = QSPI_ADDRESS_1_LINE;
-            erase_cmd.Address     = block_addr;
-
-            break;
-        }
-        case SECTOR_ERASE_CMD: {
-            num_erased_bytes = N25QXXA_SECTOR_SIZE;
-            erase_cmd.AddressSize = get_address_size(block_addr);
-            erase_cmd.Instruction = get_specialized_instruction(instruction, block_addr);
-            erase_cmd.AddressMode = QSPI_ADDRESS_1_LINE;
-            erase_cmd.Address     = block_addr;
-
-            break;
-        }
-        case BULK_ERASE_CMD: {
-            num_erased_bytes = device->total_size;
-            erase_cmd.AddressMode = QSPI_ADDRESS_NONE;
-            erase_cmd.Instruction = instruction;
-            break;
-        }
-        default: {
-            // Instruction must be a valid erase instruction.
-            return ERR_INVALID_ARGS;
-        }
-    }
-
-    erase_cmd.InstructionMode   = QSPI_INSTRUCTION_1_LINE;
-    erase_cmd.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
-    erase_cmd.DataMode          = QSPI_DATA_NONE;
-    erase_cmd.DummyCycles       = 0;
-    erase_cmd.DdrMode           = QSPI_DDR_MODE_DISABLE;
-    erase_cmd.DdrHoldHalfCycle  = QSPI_DDR_HHC_ANALOG_DELAY;
-    erase_cmd.SIOOMode          = QSPI_SIOO_INST_EVERY_CMD;
-
-
-    /* Enable write operations */
-    status_t qspi_write_enable_result = qspi_write_enable_unsafe(&qspi_handle);
-    if (qspi_write_enable_result != NO_ERROR) {
-        dprintf(CRITICAL, "%s: qspi_write_enable_unsafe failed with err = %d\n",
-                __func__, qspi_write_enable_result);
-        return qspi_write_enable_result;
-    }
-
-    /* Send the command */
-    if (HAL_QSPI_Command(&qspi_handle, &erase_cmd, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
-        return ERR_GENERIC;
-    }
-
-    /* Configure automatic polling mode to wait for end of erase */
-    status_t auto_polling_mem_ready_result =
-        qspi_auto_polling_mem_ready_unsafe(&qspi_handle, 0, N25QXXA_SR_WIP);
-    if (auto_polling_mem_ready_result != NO_ERROR) {
-        dprintf(CRITICAL, "%s: auto_polling_mem_ready failed with err = %d\n",
-                __func__, auto_polling_mem_ready_result);
-        return auto_polling_mem_ready_result;
-    }
-
-    return num_erased_bytes;
-}
-
-static ssize_t qspi_bulk_erase(bdev_t *device)
-{
-    return qspi_erase(device, 0, BULK_ERASE_CMD);
-}
-
-static ssize_t qspi_erase_sector(bdev_t *device, uint32_t block_addr)
-{
-    return qspi_erase(device, block_addr, SECTOR_ERASE_CMD);
-}
-
-static ssize_t qspi_erase_subsector(bdev_t *device, uint32_t block_addr)
-{
-    return qspi_erase(device, block_addr, SUBSECTOR_ERASE_CMD);
-}
-
-static HAL_StatusTypeDef qspi_cmd(QSPI_HandleTypeDef *qspi_handle,
-                                  QSPI_CommandTypeDef *s_command)
-{
-    HAL_StatusTypeDef result = HAL_QSPI_Command_IT(qspi_handle, s_command);
-
-    if (result != HAL_OK) {
-        return result;
-    }
-
-    event_wait(&cmd_event);
-    return result;
-}
-
-
-static void setup_dma(DMA_Stream_TypeDef *stream, uint32_t peripheral_address,
-                      uint32_t memory_address, uint32_t num_bytes,
-                      uint32_t direction)
-{
-    stream->PAR = peripheral_address;
-    stream->M0AR = memory_address;
-    stream->NDTR = num_bytes;
-
-    uint32_t dma_cr = 0;
-
-    // Select Channel 3
-    dma_cr |= DMA_CHANNEL_3;
-
-    // Set the transfer priority.
-    dma_cr |= DMA_SxCR_PL;
-
-    // Enable auto memory pointer increment.
-    dma_cr |= DMA_SxCR_MINC;
-
-    if (direction == DMA_MEMORY_TO_PERIPH) {
-        dma_cr |= DMA_SxCR_DIR_0;
-    }
-
-    // Turn on transfer complete and error interrupts.
-    dma_cr |= DMA_SxCR_TCIE;
-    dma_cr |= DMA_SxCR_TEIE;
-    dma_cr |= DMA_SxCR_DMEIE;
-
-    stream->CR = dma_cr;
-}
-
-/* IRQ Context */
-void DMA_RxCpltCallback(void)
-{
-    event_signal(&rx_event, false);
-}
-
-/* IRQ Context */
-void DMA_TxCpltCallback(void)
-{
-    event_signal(&tx_event, false);
-}
-
-/* IRQ Context */
-void DMA_ErrorCallback(void)
-{
-    printf("DMA Error\n");
-}
-
-// Send data and wait for interrupt.
-static HAL_StatusTypeDef qspi_tx_dma(QSPI_HandleTypeDef *qspi_handle, QSPI_CommandTypeDef *s_command, uint8_t *buf)
-{
-    MODIFY_REG(qspi_handle->Instance->CCR, QUADSPI_CCR_FMODE, 0);
-
-    if (dma_disable(dma2_stream7) != NO_ERROR) {
-        dprintf(CRITICAL, "%s: timed out while waiting for DMA to disable.\n", __func__);
-        return ERR_TIMED_OUT;
-    }
-
-    setup_dma(
-        dma2_stream7,
-        (uint32_t)&(qspi_handle->Instance->DR),
-        (uint32_t)buf,
-        s_command->NbData,
-        DMA_MEMORY_TO_PERIPH
-    );
-
-    // Make sure cache is flushed to RAM before invoking the DMA controller.
-    arch_clean_cache_range((addr_t)buf, s_command->NbData);
-
-    cplt_callback = DMA_TxCpltCallback;
-
-    // And we're off to the races...
-    dma2_stream7->CR |= DMA_SxCR_EN;
-    qspi_handle->Instance->CR |= QUADSPI_CR_DMAEN;
-
-    event_wait(&tx_event);
-
-    return HAL_OK;
-}
-
-// Send data and wait for interrupt.
-static HAL_StatusTypeDef qspi_rx_dma(QSPI_HandleTypeDef *qspi_handle, QSPI_CommandTypeDef *s_command, uint8_t *buf)
-{
-    // Make sure the front and back of the buffer are cache aligned.
-    DEBUG_ASSERT(IS_ALIGNED((uintptr_t)buf, CACHE_LINE));
-    DEBUG_ASSERT(IS_ALIGNED(((uintptr_t)buf) + s_command->NbData, CACHE_LINE));
-
-    MODIFY_REG(qspi_handle->Instance->CCR, QUADSPI_CCR_FMODE, QUADSPI_CCR_FMODE_0);
-
-    if (dma_disable(dma2_stream7) != NO_ERROR) {
-        dprintf(CRITICAL, "%s: timed out while waiting for DMA to disable.\n", __func__);
-        return ERR_TIMED_OUT;
-    }
-
-    setup_dma(
-        dma2_stream7,
-        (uint32_t)&(qspi_handle->Instance->DR),
-        (uint32_t)buf,
-        s_command->NbData,
-        DMA_PERIPH_TO_MEMORY
-    );
-
-    cplt_callback = DMA_RxCpltCallback;
-
-    arch_invalidate_cache_range((addr_t)buf, s_command->NbData);
-
-    // And we're off to the races...
-    dma2_stream7->CR |= DMA_SxCR_EN;
-    uint32_t addr_reg = qspi_handle->Instance->AR;
-    qspi_handle->Instance->AR = addr_reg;
-    qspi_handle->Instance->CR |= QUADSPI_CR_DMAEN;
-
-    event_wait(&rx_event);
-
-    return HAL_OK;
-}
-
-void stm32_QUADSPI_IRQ(void)
-{
-    arm_cm_irq_entry();
-    HAL_QSPI_IRQHandler(&qspi_handle);
-    arm_cm_irq_exit(true);
-}
-
-void stm32_DMA2_Stream7_IRQ(void)
-{
-    arm_cm_irq_entry();
-
-    // Make a copy of the interrupts that we're handling.
-    uint32_t hisr = DMA2->HISR;
-
-    // Xfer Complete?
-    if (hisr & DMA_FLAG_TCIF3_7) {
-        DMA2->HIFCR |= DMA_FLAG_TCIF3_7;
-
-        qspi_handle.Instance->CR &= ~QUADSPI_CR_DMAEN;
-
-        dma_disable(dma2_stream7);
-
-        __HAL_QSPI_CLEAR_FLAG((&qspi_handle), QSPI_FLAG_TC);
-
-        HAL_QSPI_Abort(&qspi_handle);
-        qspi_handle.State = HAL_QSPI_STATE_READY;
-
-        cplt_callback();
-    }
-
-    // Xfer Error?
-    if (hisr & DMA_FLAG_TEIF3_7) {
-        DMA2->HIFCR |= DMA_FLAG_TEIF3_7;
-        DMA_ErrorCallback();
-    }
-
-    // Direct mode error?
-    if (hisr & DMA_FLAG_DMEIF3_7) {
-        DMA2->HIFCR |= DMA_FLAG_DMEIF3_7;
-        DMA_ErrorCallback();
-    }
-
-    arm_cm_irq_exit(true);
-}
-
-/* IRQ Context */
-void HAL_QSPI_CmdCpltCallback(QSPI_HandleTypeDef *hqspi)
-{
-    event_signal(&cmd_event, false);
-}
-
-/* IRQ Context */
-void HAL_QSPI_StatusMatchCallback(QSPI_HandleTypeDef *hqspi)
-{
-    event_signal(&st_event, false);
-}
-
-/* IRQ Context */
-void HAL_QSPI_ErrorCallback(QSPI_HandleTypeDef *hqspi)
-{
-    dprintf(CRITICAL, "%s: HAL QSPI Error.\n", __func__);
-}
-
-status_t qspi_dma_init(QSPI_HandleTypeDef *hqspi)
-{
-    /* QSPI DMA Controller Clock */
-    __HAL_RCC_DMA2_CLK_ENABLE();
-
-    dma2_stream7 = DMA2_Stream7;
-
-    HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
-
-    return NO_ERROR;
-}
-
-static uint32_t get_address_size(uint32_t address)
-{
-    if (address >= FOUR_BYTE_ADDR_THRESHOLD) {
-        return QSPI_ADDRESS_32_BITS;
-    }
-    return QSPI_ADDRESS_24_BITS;
-}
-
-// Converts a 3 byte instruction into a 4 byte instruction if necessary.
-static uint32_t get_specialized_instruction(uint32_t instruction, uint32_t address)
-{
-    if (address < FOUR_BYTE_ADDR_THRESHOLD) {
-        return instruction;
-    }
-
-    switch (instruction) {
-        case READ_CMD:
-            return READ_4_BYTE_ADDR_CMD;
-        case FAST_READ_CMD:
-            return FAST_READ_4_BYTE_ADDR_CMD;
-        case DUAL_OUT_FAST_READ_CMD:
-            return DUAL_OUT_FAST_READ_4_BYTE_ADDR_CMD;
-        case DUAL_INOUT_FAST_READ_CMD:
-            return DUAL_INOUT_FAST_READ_4_BYTE_ADDR_CMD;
-        case QUAD_OUT_FAST_READ_CMD:
-            return QUAD_OUT_FAST_READ_4_BYTE_ADDR_CMD;
-        case QUAD_INOUT_FAST_READ_CMD:
-            return QUAD_INOUT_FAST_READ_4_BYTE_ADDR_CMD;
-        case PAGE_PROG_CMD:
-            return PAGE_PROG_4_BYTE_ADDR_CMD;
-        case QUAD_IN_FAST_PROG_CMD:
-            return QUAD_IN_FAST_PROG_4_BYTE_ADDR_CMD;
-        case SUBSECTOR_ERASE_CMD:
-            return SUBSECTOR_ERASE_4_BYTE_ADDR_CMD;
-        case SECTOR_ERASE_CMD:
-            return SECTOR_ERASE_4_BYTE_ADDR_CMD;
-    }
-
-    return instruction;
-}
-
-static status_t qspi_enable_linear(void)
-{
-    status_t result = NO_ERROR;
-
-    mutex_acquire(&spiflash_mutex);
-
-    if (device_state == QSPI_STATE_LINEAR) {
-        // Device is already in linear mode, nothing to be done.
-        goto finish;
-    }
-
-    result = qspi_dummy_cycles_cfg_unsafe(&qspi_handle);
-
-    static const QSPI_CommandTypeDef s_command = {
-        .InstructionMode   = QSPI_INSTRUCTION_1_LINE,
-        .AddressSize       = QSPI_ADDRESS_24_BITS,
-        .AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE,
-        .DdrMode           = QSPI_DDR_MODE_DISABLE,
-        .DdrHoldHalfCycle  = QSPI_DDR_HHC_ANALOG_DELAY,
-        .AddressMode       = QSPI_ADDRESS_1_LINE,
-        .Instruction       = QUAD_OUT_FAST_READ_CMD,
-        .DataMode          = QSPI_DATA_4_LINES,
-        .DummyCycles       = 10,
-        .SIOOMode          = QSPI_SIOO_INST_EVERY_CMD
-    };
-
-    QSPI_MemoryMappedTypeDef linear_mode_cfg = {
-        .TimeOutActivation = QSPI_TIMEOUT_COUNTER_DISABLE,
-    };
-
-    HAL_StatusTypeDef hal_result = HAL_QSPI_MemoryMapped(&qspi_handle, &s_command, &linear_mode_cfg);
-    if (hal_result != HAL_OK) {
-        result = hal_error_to_status(hal_result);
-        dprintf(CRITICAL, "%s: HAL_QSPI_MemoryMapped failed with err = %d\n",
-                __func__, hal_result);
-        goto finish;
-    }
-
-    device_state = QSPI_STATE_LINEAR;
-
-finish:
-    mutex_release(&spiflash_mutex);
-    return result;
-}
-
-
-static status_t qspi_disable_linear(void)
-{
-    status_t result = NO_ERROR;
-
-    mutex_acquire(&spiflash_mutex);
-
-    if (device_state == QSPI_STATE_COMMAND) {
-        // Device is already in Command mode, nothing to be done.
-        goto finish;
-    }
-
-    result = hal_error_to_status(HAL_QSPI_Abort(&qspi_handle));
-    if (result == NO_ERROR) {
-        device_state = QSPI_STATE_COMMAND;
-    } else {
-        dprintf(CRITICAL, "%s: HAL_QSPI_Abort failed with err = %d\n",
-                __func__, result);
-    }
-
-
-finish:
-    mutex_release(&spiflash_mutex);
-    return result;
-}
-
-static bool qspi_is_linear(void)
-{
-    bool result;
-    mutex_acquire(&spiflash_mutex);
-    result = (QSPI_STATE_LINEAR == device_state);
-    mutex_release(&spiflash_mutex);
-    return result;
-}
-\ No newline at end of file
diff --git a/platform/stm32f7xx/rules.mk b/platform/stm32f7xx/rules.mk
deleted file mode 100644
index 1c20f031..00000000
--- a/platform/stm32f7xx/rules.mk
+++ /dev/null
@@ -1,70 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-# ROMBASE, MEMBASE, and MEMSIZE are required for the linker script
-ROMBASE ?= 0x00200000
-MEMBASE ?= 0x20010000
-# default memsize, specific STM32_CHIP may override this
-# and target/project may have already overridden
-MEMSIZE ?= 0x40000
-
-ARCH := arm
-ARM_CPU := cortex-m7-fpu-sp-d16
-
-ifeq ($(STM32_CHIP),stm32f746)
-GLOBAL_DEFINES += STM32F746xx
-# XXX workaround for uppercasing in GLOBAL_DEFINES
-GLOBAL_COMPILEFLAGS += -DSTM32F746xx
-FOUND_CHIP := true
-endif
-
-ifeq ($(STM32_CHIP),stm32f756)
-GLOBAL_DEFINES += STM32F746xx
-# XXX workaround for uppercasing in GLOBAL_DEFINES
-GLOBAL_COMPILEFLAGS += -DSTM32F746xx
-FOUND_CHIP := true
-endif
-
-ifeq ($(FOUND_CHIP),)
-$(error unknown STM32F7xx chip $(STM32_CHIP))
-endif
-
-LK_HEAP_IMPLEMENTATION ?= miniheap
-
-GLOBAL_DEFINES += \
-	PLATFORM_SUPPORTS_PANIC_SHELL=1 \
-    NOVM_MAX_ARENAS=2 \
-    CONSOLE_HAS_INPUT_BUFFER=1
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/eth.c \
-	$(LOCAL_DIR)/flash.c \
-	$(LOCAL_DIR)/gpio.c \
-	$(LOCAL_DIR)/init.c \
-	$(LOCAL_DIR)/timer.c \
-	$(LOCAL_DIR)/uart.c \
-	$(LOCAL_DIR)/usbc.c \
-	$(LOCAL_DIR)/vectab.c \
-	$(LOCAL_DIR)/sdram.c \
-	$(LOCAL_DIR)/qspi.c
-
-# use a two segment memory layout, where all of the read-only sections 
-# of the binary reside in rom, and the read/write are in memory. The 
-# ROMBASE, MEMBASE, and MEMSIZE make variables are required to be set 
-# for the linker script to be generated properly.
-#
-LINKER_SCRIPT += \
-	$(BUILDDIR)/system-twosegment.ld
-
-MODULE_DEPS += \
-	platform/stm32 \
-	platform/stm32f7xx/STM32F7xx_HAL_Driver \
-	arch/arm/arm-m/systick \
-	dev/gpio \
-	dev/usb \
-	lib/bio \
-	lib/cbuf
-
-include make/module.mk
diff --git a/platform/stm32f7xx/sdram.c b/platform/stm32f7xx/sdram.c
deleted file mode 100644
index 521a4a3b..00000000
--- a/platform/stm32f7xx/sdram.c
+++ /dev/null
@@ -1,304 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-/*
- * COPYRIGHT(c) 2015 STMicroelectronics
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *   1. Redistributions of source code must retain the above copyright notice,
- *      this list of conditions and the following disclaimer.
- *   2. Redistributions in binary form must reproduce the above copyright notice,
- *      this list of conditions and the following disclaimer in the documentation
- *      and/or other materials provided with the distribution.
- *   3. Neither the name of STMicroelectronics nor the names of its contributors
- *      may be used to endorse or promote products derived from this software
- *      without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-
-#include <err.h>
-#include <debug.h>
-#include <trace.h>
-#include <target.h>
-#include <compiler.h>
-#include <dev/gpio.h>
-#include <platform/stm32.h>
-#include <platform/sdram.h>
-
-/*
- * sdram initialization sequence, taken from
- * STM32Cube_FW_F7_V1.1.0/Drivers/BSP
- */
-
-/**
-  * @brief  SDRAM status structure definition
-  */
-#define   SDRAM_OK         ((uint8_t)0x00)
-#define   SDRAM_ERROR      ((uint8_t)0x01)
-
-/* SDRAM refresh counter (100Mhz SD clock) */
-#define REFRESH_COUNT      ((uint32_t)0x0603)
-
-#define SDRAM_TIMEOUT      ((uint32_t)0xFFFF)
-
-/* DMA definitions for SDRAM DMA transfer */
-#define __DMAx_CLK_ENABLE                 __HAL_RCC_DMA2_CLK_ENABLE
-#define __DMAx_CLK_DISABLE                __HAL_RCC_DMA2_CLK_DISABLE
-#define SDRAM_DMAx_CHANNEL                DMA_CHANNEL_0
-#define SDRAM_DMAx_STREAM                 DMA2_Stream0
-#define SDRAM_DMAx_IRQn                   DMA2_Stream0_IRQn
-#define SDRAM_DMAx_IRQHandler             DMA2_Stream0_IRQHandler
-
-/**
-  * @brief  FMC SDRAM Mode definition register defines
-  */
-#define SDRAM_MODEREG_BURST_LENGTH_1             ((uint16_t)0x0000)
-#define SDRAM_MODEREG_BURST_LENGTH_2             ((uint16_t)0x0001)
-#define SDRAM_MODEREG_BURST_LENGTH_4             ((uint16_t)0x0002)
-#define SDRAM_MODEREG_BURST_LENGTH_8             ((uint16_t)0x0004)
-#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL      ((uint16_t)0x0000)
-#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED     ((uint16_t)0x0008)
-#define SDRAM_MODEREG_CAS_LATENCY_1              ((uint16_t)0x0010)
-#define SDRAM_MODEREG_CAS_LATENCY_2              ((uint16_t)0x0020)
-#define SDRAM_MODEREG_CAS_LATENCY_3              ((uint16_t)0x0030)
-#define SDRAM_MODEREG_OPERATING_MODE_STANDARD    ((uint16_t)0x0000)
-#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
-#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE     ((uint16_t)0x0200)
-
-static SDRAM_HandleTypeDef sdramHandle;
-
-/**
-  * @brief  Programs the SDRAM device.
-  * @param  RefreshCount: SDRAM refresh counter value
-  * @retval None
-  */
-static void BSP_SDRAM_Initialization_sequence(uint32_t RefreshCount,
-        uint32_t CasLatency)
-{
-    __IO uint32_t tmpmrd = 0;
-    FMC_SDRAM_CommandTypeDef Command;
-
-    /* Step 1: Configure a clock configuration enable command */
-    Command.CommandMode            = FMC_SDRAM_CMD_CLK_ENABLE;
-    Command.CommandTarget          = FMC_SDRAM_CMD_TARGET_BANK1;
-    Command.AutoRefreshNumber      = 1;
-    Command.ModeRegisterDefinition = 0;
-
-    /* Send the command */
-    HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
-
-    /* Step 2: Insert 100 us minimum delay */
-    spin(1000);
-
-    /* Step 3: Configure a PALL (precharge all) command */
-    Command.CommandMode            = FMC_SDRAM_CMD_PALL;
-    Command.CommandTarget          = FMC_SDRAM_CMD_TARGET_BANK1;
-    Command.AutoRefreshNumber      = 1;
-    Command.ModeRegisterDefinition = 0;
-
-    /* Send the command */
-    HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
-
-    /* Step 4: Configure an Auto Refresh command */
-    Command.CommandMode            = FMC_SDRAM_CMD_AUTOREFRESH_MODE;
-    Command.CommandTarget          = FMC_SDRAM_CMD_TARGET_BANK1;
-    Command.AutoRefreshNumber      = 8;
-    Command.ModeRegisterDefinition = 0;
-
-    /* Send the command */
-    HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
-
-    /* Step 5: Program the external memory mode register */
-    tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1          |\
-             SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL   |\
-             SDRAM_MODEREG_OPERATING_MODE_STANDARD |\
-             SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
-
-    tmpmrd |= CasLatency;
-
-    Command.CommandMode            = FMC_SDRAM_CMD_LOAD_MODE;
-    Command.CommandTarget          = FMC_SDRAM_CMD_TARGET_BANK1;
-    Command.AutoRefreshNumber      = 1;
-    Command.ModeRegisterDefinition = tmpmrd;
-
-    /* Send the command */
-    HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
-
-    /* Step 6: Set the refresh rate counter */
-    /* Set the device refresh rate */
-    HAL_SDRAM_ProgramRefreshRate(&sdramHandle, RefreshCount);
-}
-
-static uint32_t GetMemoryWidth(sdram_config_t *config)
-{
-    switch (config->bus_width) {
-        case SDRAM_BUS_WIDTH_8 :
-            return FMC_SDRAM_MEM_BUS_WIDTH_8;
-        case SDRAM_BUS_WIDTH_16 :
-            return FMC_SDRAM_MEM_BUS_WIDTH_16;
-        case SDRAM_BUS_WIDTH_32 :
-            return FMC_SDRAM_MEM_BUS_WIDTH_32;
-    }
-    return 0;
-}
-
-static uint32_t GetColumnBitsNumber(sdram_config_t *config)
-{
-    switch (config->col_bits_num) {
-        case SDRAM_COLUMN_BITS_8 :
-            return FMC_SDRAM_COLUMN_BITS_NUM_8;
-        case SDRAM_COLUMN_BITS_9 :
-            return FMC_SDRAM_COLUMN_BITS_NUM_9;
-        case SDRAM_COLUMN_BITS_10 :
-            return FMC_SDRAM_COLUMN_BITS_NUM_10;
-        case SDRAM_COLUMN_BITS_11 :
-            return FMC_SDRAM_COLUMN_BITS_NUM_11;
-    }
-    return 0;
-}
-
-static uint32_t GetCasLatencyFMC(sdram_config_t *config)
-{
-    switch (config->cas_latency) {
-        case SDRAM_CAS_LATENCY_1 :
-            return FMC_SDRAM_CAS_LATENCY_1;
-        case SDRAM_CAS_LATENCY_2 :
-            return FMC_SDRAM_CAS_LATENCY_2;
-        case SDRAM_CAS_LATENCY_3 :
-            return FMC_SDRAM_CAS_LATENCY_3;
-    }
-    return 0;
-}
-
-static uint32_t GetCasLatencyModeReg(sdram_config_t *config)
-{
-    switch (config->cas_latency) {
-        case SDRAM_CAS_LATENCY_1 :
-            return SDRAM_MODEREG_CAS_LATENCY_1;
-        case SDRAM_CAS_LATENCY_2 :
-            return SDRAM_MODEREG_CAS_LATENCY_2;
-        case SDRAM_CAS_LATENCY_3 :
-            return SDRAM_MODEREG_CAS_LATENCY_3;
-    }
-    return 0;
-}
-
-/**
-  * @brief  Initializes the SDRAM device.
-  * @retval SDRAM status
-  */
-uint8_t stm32_sdram_init(sdram_config_t *config)
-{
-    static uint8_t sdramstatus = SDRAM_ERROR;
-    static DMA_HandleTypeDef dma_handle;
-
-    /* SDRAM device configuration */
-    sdramHandle.Instance = FMC_SDRAM_DEVICE;
-
-    /* Timing configuration for 100Mhz as SDRAM clock frequency (System clock is up to 200Mhz) */
-    FMC_SDRAM_TimingTypeDef Timing;
-    Timing.LoadToActiveDelay    = 2;
-    Timing.ExitSelfRefreshDelay = 7;
-    Timing.SelfRefreshTime      = 4;
-    Timing.RowCycleDelay        = 7;
-    Timing.WriteRecoveryTime    = 2;
-    Timing.RPDelay              = 2;
-    Timing.RCDDelay             = 2;
-
-    sdramHandle.Init.SDBank             = FMC_SDRAM_BANK1;
-    sdramHandle.Init.ColumnBitsNumber   = GetColumnBitsNumber(config);
-    sdramHandle.Init.RowBitsNumber      = FMC_SDRAM_ROW_BITS_NUM_12;
-    sdramHandle.Init.MemoryDataWidth    = GetMemoryWidth(config);
-    sdramHandle.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
-    sdramHandle.Init.CASLatency         = GetCasLatencyFMC(config);
-    sdramHandle.Init.WriteProtection    = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
-    sdramHandle.Init.SDClockPeriod      = FMC_SDRAM_CLOCK_PERIOD_2;
-    sdramHandle.Init.ReadBurst          = FMC_SDRAM_RBURST_ENABLE;
-    sdramHandle.Init.ReadPipeDelay      = FMC_SDRAM_RPIPE_DELAY_0;
-
-    /* Enable FMC clock */
-    __HAL_RCC_FMC_CLK_ENABLE();
-
-    /* Enable chosen DMAx clock */
-    __DMAx_CLK_ENABLE();
-
-    /* SDRAM GPIO initialization */
-    stm_sdram_GPIO_init();
-
-    /* Configure common DMA parameters */
-    dma_handle.Init.Channel             = SDRAM_DMAx_CHANNEL;
-    dma_handle.Init.Direction           = DMA_MEMORY_TO_MEMORY;
-    dma_handle.Init.PeriphInc           = DMA_PINC_ENABLE;
-    dma_handle.Init.MemInc              = DMA_MINC_ENABLE;
-    dma_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
-    dma_handle.Init.MemDataAlignment    = DMA_MDATAALIGN_WORD;
-    dma_handle.Init.Mode                = DMA_NORMAL;
-    dma_handle.Init.Priority            = DMA_PRIORITY_HIGH;
-    dma_handle.Init.FIFOMode            = DMA_FIFOMODE_DISABLE;
-    dma_handle.Init.FIFOThreshold       = DMA_FIFO_THRESHOLD_FULL;
-    dma_handle.Init.MemBurst            = DMA_MBURST_SINGLE;
-    dma_handle.Init.PeriphBurst         = DMA_PBURST_SINGLE;
-
-    dma_handle.Instance = SDRAM_DMAx_STREAM;
-
-    /* Associate the DMA handle */
-    __HAL_LINKDMA(&sdramHandle, hdma, dma_handle);
-
-    /* Deinitialize the stream for new transfer */
-    HAL_DMA_DeInit(&dma_handle);
-
-    /* Configure the DMA stream */
-    HAL_DMA_Init(&dma_handle);
-
-#if 0
-    /* NVIC configuration for DMA transfer complete interrupt */
-    HAL_NVIC_SetPriority(SDRAM_DMAx_IRQn, 5, 0);
-    HAL_NVIC_EnableIRQ(SDRAM_DMAx_IRQn);
-#endif
-
-    if (HAL_SDRAM_Init(&sdramHandle, &Timing) != HAL_OK) {
-        sdramstatus = SDRAM_ERROR;
-    } else {
-        sdramstatus = SDRAM_OK;
-    }
-
-    /* SDRAM initialization sequence */
-    BSP_SDRAM_Initialization_sequence(REFRESH_COUNT,
-                                      GetCasLatencyModeReg(config));
-
-    return sdramstatus;
-}
-
-
diff --git a/platform/stm32f7xx/timer.c b/platform/stm32f7xx/timer.c
deleted file mode 100644
index 027bb14a..00000000
--- a/platform/stm32f7xx/timer.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <trace.h>
-#include <err.h>
-#include <sys/types.h>
-#include <kernel/thread.h>
-#include <platform.h>
-#include <platform/timer.h>
-#include <platform/stm32.h>
-#include <arch/arm/cm.h>
-
-#define LOCAL_TRACE 0
-
-static void stm32_tim_irq(uint num)
-{
-    TRACEF("tim irq %d\n", num);
-    PANIC_UNIMPLEMENTED;
-}
-
-void stm32_TIM3_IRQ(void)
-{
-    stm32_tim_irq(3);
-}
-
-void stm32_TIM4_IRQ(void)
-{
-    stm32_tim_irq(4);
-}
-
-void stm32_TIM5_IRQ(void)
-{
-    stm32_tim_irq(5);
-}
-
-void stm32_TIM6_IRQ(void)
-{
-    stm32_tim_irq(6);
-}
-
-void stm32_TIM7_IRQ(void)
-{
-    stm32_tim_irq(7);
-}
-
-/* time base */
-void stm32_TIM2_IRQ(void)
-{
-    stm32_tim_irq(2);
-}
-
-void stm32_timer_early_init(void)
-{
-}
-
-void stm32_timer_init(void)
-{
-}
diff --git a/platform/stm32f7xx/uart.c b/platform/stm32f7xx/uart.c
deleted file mode 100644
index 257cc3ec..00000000
--- a/platform/stm32f7xx/uart.c
+++ /dev/null
@@ -1,299 +0,0 @@
-/*
- * Copyright (c) 2012 Kent Ryhorchuk
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <stdarg.h>
-#include <reg.h>
-#include <debug.h>
-#include <stdio.h>
-#include <assert.h>
-#include <err.h>
-#include <lib/cbuf.h>
-#include <kernel/thread.h>
-#include <platform/debug.h>
-#include <arch/ops.h>
-#include <dev/uart.h>
-#include <target/debugconfig.h>
-#include <platform/stm32.h>
-#include <arch/arm/cm.h>
-
-#define DEFAULT_FLOWCONTROL UART_HWCONTROL_NONE
-#define DEFAULT_BAUDRATE 115200
-#define DEFAULT_RXBUF_SIZE 16
-
-#define NUM_UARTS 8
-
-struct uart_instance {
-    UART_HandleTypeDef handle;
-    cbuf_t rx_buf;
-};
-
-#if ENABLE_UART1
-static struct uart_instance uart1;
-#ifndef UART1_FLOWCONTROL
-#define UART1_FLOWCONTROL DEFAULT_FLOWCONTROL
-#endif
-#ifndef UART1_BAUDRATE
-#define UART1_BAUDRATE DEFAULT_BAUDRATE
-#endif
-#ifndef UART1_RXBUF_SIZE
-#define UART1_RXBUF_SIZE DEFAULT_RXBUF_SIZE
-#endif
-#endif
-
-#if ENABLE_UART3
-static struct uart_instance uart3;
-#ifndef UART3_FLOWCONTROL
-#define UART3_FLOWCONTROL DEFAULT_FLOWCONTROL
-#endif
-#ifndef UART3_BAUDRATE
-#define UART3_BAUDRATE DEFAULT_BAUDRATE
-#endif
-#ifndef UART3_RXBUF_SIZE
-#define UART3_RXBUF_SIZE DEFAULT_RXBUF_SIZE
-#endif
-#endif
-
-#if ENABLE_UART2 || ENABLE_UART4 || ENABLE_UART5 || ENABLE_UART6 || ENABLE_UART7 || ENABLE_UART8
-#error add support for additional uarts
-#endif
-
-static struct uart_instance *const uart[NUM_UARTS + 1] = {
-#if ENABLE_UART1
-    [1] = &uart1,
-#endif
-#if ENABLE_UART3
-    [3] = &uart3,
-#endif
-};
-
-// This function is called by HAL_UART_Init().
-void HAL_UART_MspInit(UART_HandleTypeDef *huart)
-{
-    RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit;
-
-    /* Select SysClk as source of UART clocks */
-    switch ((uintptr_t)huart->Instance) {
-        case (uintptr_t)USART1:
-            RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1;
-            RCC_PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_SYSCLK;
-            HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit);
-
-            __HAL_RCC_USART1_CLK_ENABLE();
-            break;
-        case (uintptr_t)USART3:
-            RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART3;
-            RCC_PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_SYSCLK;
-            HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit);
-
-            __HAL_RCC_USART3_CLK_ENABLE();
-            break;
-        default:
-            panic("unimplemented clock set up for uart\n");
-    }
-}
-
-static void usart_init_early(struct uart_instance *u, USART_TypeDef *usart, uint32_t baud, uint16_t flowcontrol)
-{
-    u->handle.Instance = usart;
-    u->handle.Init.BaudRate = baud;
-    u->handle.Init.WordLength = UART_WORDLENGTH_8B;
-    u->handle.Init.StopBits = UART_STOPBITS_1;
-    u->handle.Init.Parity = UART_PARITY_NONE;
-    u->handle.Init.Mode = UART_MODE_TX_RX;
-    u->handle.Init.HwFlowCtl  = flowcontrol;
-    u->handle.Init.OverSampling = UART_OVERSAMPLING_8;
-    HAL_UART_Init(&u->handle);
-}
-
-static void usart_init(struct uart_instance *u, USART_TypeDef *usart, uint irqn, size_t rxsize)
-{
-    cbuf_initialize(&u->rx_buf, rxsize);
-
-    /* Enable the UART Parity Error Interrupt */
-    __HAL_UART_ENABLE_IT(&u->handle, UART_IT_PE);
-
-    /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
-    __HAL_UART_ENABLE_IT(&u->handle, UART_IT_ERR);
-
-    /* Enable the UART Data Register not empty Interrupt */
-    __HAL_UART_ENABLE_IT(&u->handle, UART_IT_RXNE);
-
-    HAL_NVIC_EnableIRQ(irqn);
-}
-
-void uart_init_early(void)
-{
-#if ENABLE_UART1
-    usart_init_early(uart[1], USART1, UART1_BAUDRATE, UART1_FLOWCONTROL);
-#endif
-#if ENABLE_UART3
-    usart_init_early(uart[3], USART3, UART3_BAUDRATE, UART3_FLOWCONTROL);
-#endif
-}
-
-void uart_init(void)
-{
-#ifdef ENABLE_UART1
-    usart_init(uart[1], USART1, USART1_IRQn, UART1_RXBUF_SIZE);
-#endif
-#ifdef ENABLE_UART3
-    usart_init(uart[3], USART3, USART3_IRQn, UART3_RXBUF_SIZE);
-#endif
-}
-
-static void stm32_usart_shared_irq(struct uart_instance *u, const unsigned int id)
-{
-    bool resched = false;
-
-    arm_cm_irq_entry();
-
-    /* UART parity error interrupt occurred -------------------------------------*/
-    if ((__HAL_UART_GET_IT(&u->handle, UART_IT_PE) != RESET) && (__HAL_UART_GET_IT_SOURCE(&u->handle, UART_IT_PE) != RESET)) {
-        __HAL_UART_CLEAR_PEFLAG(&u->handle);
-
-        printf("UART PARITY ERROR\n");
-    }
-
-    /* UART frame error interrupt occurred --------------------------------------*/
-    if ((__HAL_UART_GET_IT(&u->handle, UART_IT_FE) != RESET) && (__HAL_UART_GET_IT_SOURCE(&u->handle, UART_IT_ERR) != RESET)) {
-        __HAL_UART_CLEAR_FEFLAG(&u->handle);
-
-        printf("UART FRAME ERROR\n");
-    }
-
-    /* UART noise error interrupt occurred --------------------------------------*/
-    if ((__HAL_UART_GET_IT(&u->handle, UART_IT_NE) != RESET) && (__HAL_UART_GET_IT_SOURCE(&u->handle, UART_IT_ERR) != RESET)) {
-        __HAL_UART_CLEAR_NEFLAG(&u->handle);
-
-        printf("UART NOISE ERROR\n");
-    }
-
-    /* UART Over-Run interrupt occurred -----------------------------------------*/
-    if ((__HAL_UART_GET_IT(&u->handle, UART_IT_ORE) != RESET) && (__HAL_UART_GET_IT_SOURCE(&u->handle, UART_IT_ERR) != RESET)) {
-        __HAL_UART_CLEAR_OREFLAG(&u->handle);
-
-        printf("UART OVERRUN ERROR\n");
-    }
-
-    /* UART in mode Receiver ---------------------------------------------------*/
-    if ((__HAL_UART_GET_IT(&u->handle, UART_IT_RXNE) != RESET) && (__HAL_UART_GET_IT_SOURCE(&u->handle, UART_IT_RXNE) != RESET)) {
-
-        /* we got a character */
-        uint8_t c = (uint8_t)(u->handle.Instance->RDR & 0xff);
-
-        cbuf_t *target_buf = &u->rx_buf;
-
-#if CONSOLE_HAS_INPUT_BUFFER
-        if (id == DEBUG_UART) {
-            target_buf = &console_input_cbuf;
-        }
-#endif
-
-        if (cbuf_write_char(target_buf, c, false) != 1) {
-            printf("WARNING: uart cbuf overrun!\n");
-        }
-        resched = true;
-
-        /* Clear RXNE interrupt flag */
-        __HAL_UART_SEND_REQ(&u->handle, UART_RXDATA_FLUSH_REQUEST);
-    }
-
-    /* UART in mode Transmitter ------------------------------------------------*/
-    if ((__HAL_UART_GET_IT(&u->handle, UART_IT_TXE) != RESET) &&(__HAL_UART_GET_IT_SOURCE(&u->handle, UART_IT_TXE) != RESET)) {
-        ;
-    }
-
-    /* UART in mode Transmitter (transmission end) -----------------------------*/
-    if ((__HAL_UART_GET_IT(&u->handle, UART_IT_TC) != RESET) &&(__HAL_UART_GET_IT_SOURCE(&u->handle, UART_IT_TC) != RESET)) {
-        ;
-    }
-
-    arm_cm_irq_exit(resched);
-}
-
-#if ENABLE_UART1
-void stm32_USART1_IRQ(void)
-{
-    stm32_usart_shared_irq(uart[1], 1);
-}
-#endif
-
-#if ENABLE_UART3
-void stm32_USART3_IRQ(void)
-{
-    stm32_usart_shared_irq(uart[3], 3);
-}
-#endif
-
-int uart_putc(int port, char c)
-{
-    struct uart_instance *u = uart[port];
-    if (port < 0 || port > NUM_UARTS || !u)
-        return ERR_BAD_HANDLE;
-
-    while (__HAL_UART_GET_FLAG(&u->handle, UART_FLAG_TXE) == RESET)
-        ;
-    u->handle.Instance->TDR = (c & (uint8_t)0xFF);
-
-    return 1;
-}
-
-int uart_getc(int port, bool wait)
-{
-    struct uart_instance *u = uart[port];
-    if (port < 0 || port > NUM_UARTS || !u)
-        return ERR_BAD_HANDLE;
-
-    char c;
-    if (cbuf_read_char(&u->rx_buf, &c, wait) == 0)
-        return ERR_IO;
-    return c;
-}
-
-int uart_pputc(int port, char c)
-{
-    return uart_putc(port, c);
-}
-
-int uart_pgetc(int port)
-{
-    struct uart_instance *u = uart[port];
-    if (port < 0 || port > NUM_UARTS || !u)
-        return ERR_BAD_HANDLE;
-
-    if ((__HAL_UART_GET_IT(&u->handle, UART_IT_RXNE) != RESET) && (__HAL_UART_GET_IT_SOURCE(&u->handle, UART_IT_RXNE) != RESET)) {
-        uint8_t c = (uint8_t)(u->handle.Instance->RDR & 0xff);
-        return c;
-    }
-    return ERR_IO;
-}
-
-void uart_flush_tx(int port) {}
-
-void uart_flush_rx(int port) {}
-
-void uart_init_port(int port, uint baud)
-{
-    // TODO - later
-    PANIC_UNIMPLEMENTED;
-}
diff --git a/platform/stm32f7xx/usbc.c b/platform/stm32f7xx/usbc.c
deleted file mode 100644
index fd705ed7..00000000
--- a/platform/stm32f7xx/usbc.c
+++ /dev/null
@@ -1,338 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <trace.h>
-#include <debug.h>
-#include <stdio.h>
-#include <string.h>
-#include <stdlib.h>
-#include <assert.h>
-#include <err.h>
-#include <dev/usb.h>
-#include <dev/usbc.h>
-#include <arch/arm/cm.h>
-#include <platform/stm32.h>
-
-#define LOCAL_TRACE 0
-
-#define NUM_EP 5
-
-struct ep_status {
-    usbc_transfer_t *transfer;
-};
-
-static struct {
-    bool do_resched;
-
-    struct ep_status ep_in[NUM_EP];
-    struct ep_status ep_out[NUM_EP];
-
-    PCD_HandleTypeDef handle;
-} usbc;
-
-void stm32_usbc_early_init(void)
-{
-    __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
-}
-
-void stm32_usbc_init(void)
-{
-    LTRACE_ENTRY;
-
-    /* Set LL Driver parameters */
-    usbc.handle.Instance = USB_OTG_FS;
-    usbc.handle.Init.dev_endpoints = 4;
-    usbc.handle.Init.use_dedicated_ep1 = 0;
-    usbc.handle.Init.ep0_mps = 0x40;
-    usbc.handle.Init.dma_enable = 0;
-    usbc.handle.Init.low_power_enable = 1;
-    usbc.handle.Init.phy_itface = PCD_PHY_EMBEDDED;
-    usbc.handle.Init.Sof_enable = 0;
-    usbc.handle.Init.speed = PCD_SPEED_FULL;
-    usbc.handle.Init.vbus_sensing_enable = 0;
-    usbc.handle.Init.lpm_enable = 0;
-
-    /* Link The driver to the stack */
-    //usbc.handle.pData = pdev;
-    //pdev->pData = &hpcd;
-
-    /* Initialize LL Driver */
-    HAL_PCD_Init(&usbc.handle);
-
-    HAL_PCDEx_SetRxFiFo(&usbc.handle, 0x80);
-    HAL_PCDEx_SetTxFiFo(&usbc.handle, 0, 0x40);
-
-    HAL_PCD_EP_Open(&usbc.handle, 0, 0x40, EP_TYPE_CTRL);
-    HAL_PCD_EP_Open(&usbc.handle, 0x80, 0x40, EP_TYPE_CTRL);
-}
-
-void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
-{
-    LTRACEF("epnum %u\n", epnum);
-
-    if (usbc.ep_out[epnum].transfer) {
-        // completing a transfer
-        usbc_transfer_t *t = usbc.ep_out[epnum].transfer;
-        usbc.ep_out[epnum].transfer = NULL;
-
-        LTRACEF("completing transfer %p\n", t);
-
-        PCD_EPTypeDef *ep = &hpcd->OUT_ep[epnum];
-        t->bufpos = ep->xfer_count;
-        t->result = 0;
-        t->callback(epnum, t);
-        usbc.do_resched = true;
-    }
-}
-
-void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
-{
-    PCD_EPTypeDef *ep = &hpcd->IN_ep[epnum];
-
-    LTRACEF("epnum %u, xfer count %u len %u\n", epnum, ep->xfer_count, ep->xfer_len);
-
-    if (epnum == 0) {
-        if (ep->xfer_count >= ep->xfer_len) {
-            // in transfer done, ready for receive status
-            HAL_PCD_EP_Receive(&usbc.handle, 0, 0, 0);
-        } else {
-            PANIC_UNIMPLEMENTED;
-        }
-    } else {
-        // in transfer done
-        if (usbc.ep_in[epnum].transfer) {
-            // completing a transfer
-            usbc_transfer_t *t = usbc.ep_in[epnum].transfer;
-            usbc.ep_in[epnum].transfer = NULL;
-
-            LTRACEF("completing transfer %p\n", t);
-
-            PCD_EPTypeDef *ep = &hpcd->IN_ep[epnum];
-            t->bufpos = ep->xfer_count;
-            t->result = 0;
-            t->callback(epnum, t);
-            usbc.do_resched = true;
-        }
-    }
-}
-
-void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
-{
-    //LTRACE_ENTRY;
-
-    union usb_callback_args args;
-    args.setup = (struct usb_setup *)hpcd->Setup;
-
-    usbc_callback(USB_CB_SETUP_MSG, &args);
-    usbc.do_resched = true;
-}
-
-void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
-{
-    LTRACE_ENTRY;
-}
-
-void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
-{
-    LTRACE_ENTRY;
-
-    /* fail all the outstanding transactions */
-    for (uint i = 0; i < NUM_EP; i++) {
-        if (usbc.ep_in[i].transfer) {
-            usbc_transfer_t *t = usbc.ep_in[i].transfer;
-            usbc.ep_in[i].transfer = NULL;
-            t->result = ERR_CANCELLED;
-            t->callback(i, t);
-        }
-        if (usbc.ep_out[i].transfer) {
-            usbc_transfer_t *t = usbc.ep_out[i].transfer;
-            usbc.ep_out[i].transfer = NULL;
-            t->result = ERR_CANCELLED;
-            t->callback(i, t);
-        }
-    }
-
-    usbc_callback(USB_CB_RESET, NULL);
-    usbc.do_resched = true;
-}
-
-void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
-{
-    LTRACE_ENTRY;
-    usbc_callback(USB_CB_SUSPEND, NULL);
-    usbc.do_resched = true;
-}
-
-void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
-{
-    LTRACE_ENTRY;
-    usbc_callback(USB_CB_RESUME, NULL);
-    usbc.do_resched = true;
-}
-
-void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
-{
-    LTRACEF("epnum %u\n", epnum);
-}
-
-void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
-{
-    LTRACEF("epnum %u\n", epnum);
-}
-
-void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
-{
-    LTRACE_ENTRY;
-}
-
-void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
-{
-    LTRACE_ENTRY;
-}
-
-status_t usbc_set_active(bool active)
-{
-    LTRACEF("active %u\n", active);
-
-    if (active) {
-        HAL_PCD_Start(&usbc.handle);
-    } else {
-        HAL_PCD_Stop(&usbc.handle);
-    }
-
-    return NO_ERROR;
-}
-
-void usbc_set_address(uint8_t address)
-{
-    //LTRACEF("address %u\n", address);
-
-    HAL_PCD_SetAddress(&usbc.handle, address);
-}
-
-void usbc_ep0_ack(void)
-{
-    LTRACE;
-
-    HAL_PCD_EP_Transmit(&usbc.handle, 0, 0, 0);
-}
-
-void usbc_ep0_stall(void)
-{
-    LTRACE;
-
-    HAL_PCD_EP_SetStall(&usbc.handle, 0x80);
-}
-
-void usbc_ep0_send(const void *buf, size_t len, size_t maxlen)
-{
-    LTRACEF("buf %p, len %zu, maxlen %zu\n", buf, len, maxlen);
-
-    HAL_PCD_EP_Transmit(&usbc.handle, 0, (void *)buf, MIN(len, maxlen));
-}
-
-void usbc_ep0_recv(void *buf, size_t len, ep_callback cb)
-{
-    LTRACEF("buf %p, len %zu\n", buf, len);
-
-    HAL_PCD_EP_Receive(&usbc.handle, 0, (void *)buf, len);
-}
-
-status_t usbc_setup_endpoint(ep_t ep, ep_dir_t dir, uint width, ep_type_t type)
-{
-    LTRACEF("ep %u dir %u width %u\n", ep, dir, width);
-
-    DEBUG_ASSERT(ep <= NUM_EP);
-
-    HAL_StatusTypeDef ret = HAL_PCD_EP_Open(&usbc.handle, ep | ((dir == USB_IN) ? 0x80 : 0), width, type);
-
-    // XXX be a little smarter here
-    if (dir == USB_IN) {
-        HAL_PCDEx_SetTxFiFo(&usbc.handle, ep, width);
-    }
-
-    return (ret == HAL_OK) ? NO_ERROR : ERR_GENERIC;
-}
-
-bool usbc_is_highspeed(void)
-{
-    return false;
-}
-
-status_t usbc_queue_rx(ep_t ep, usbc_transfer_t *transfer)
-{
-    LTRACEF("ep %u, transfer %p (buf %p, buflen %zu)\n", ep, transfer, transfer->buf, transfer->buflen);
-
-    DEBUG_ASSERT(ep <= NUM_EP);
-    DEBUG_ASSERT(usbc.ep_out[ep].transfer == NULL);
-
-    usbc.ep_out[ep].transfer = transfer;
-    HAL_PCD_EP_Receive(&usbc.handle, ep, transfer->buf, transfer->buflen);
-
-    return NO_ERROR;
-}
-
-status_t usbc_queue_tx(ep_t ep, usbc_transfer_t *transfer)
-{
-    LTRACEF("ep %u, transfer %p (buf %p, buflen %zu)\n", ep, transfer, transfer->buf, transfer->buflen);
-
-    DEBUG_ASSERT(ep <= NUM_EP);
-    DEBUG_ASSERT(usbc.ep_in[ep].transfer == NULL);
-
-    usbc.ep_in[ep].transfer = transfer;
-    HAL_PCD_EP_Transmit(&usbc.handle, ep, transfer->buf, transfer->buflen);
-
-    return NO_ERROR;
-}
-
-status_t usbc_flush_ep(ep_t ep)
-{
-    // Make sure The endpoint is in range.
-    DEBUG_ASSERT((ep & 0x7F) <= NUM_EP);
-
-    // Flush the FIFOs for the endpoint.
-    if (HAL_PCD_EP_Flush(&usbc.handle, ep) != HAL_OK) {
-        return ERR_GENERIC;
-    }
-
-    // Clear any transfers that we may have been waiting on.
-    if (ep & 0x80) {
-        usbc.ep_in[ep & 0x7F].transfer = NULL;
-    } else {
-        usbc.ep_out[ep].transfer = NULL;
-    }
-
-    return NO_ERROR;
-}
-
-void stm32_OTG_FS_IRQ(void)
-{
-    arm_cm_irq_entry();
-    //LTRACE_ENTRY;
-
-    usbc.do_resched = false;
-    HAL_PCD_IRQHandler(&usbc.handle);
-
-    arm_cm_irq_exit(usbc.do_resched);
-}
-
diff --git a/platform/stm32f7xx/vectab.c b/platform/stm32f7xx/vectab.c
deleted file mode 100644
index 5ef68987..00000000
--- a/platform/stm32f7xx/vectab.c
+++ /dev/null
@@ -1,256 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <compiler.h>
-#include <arch/arm/cm.h>
-#include <platform/stm32.h>
-#include <target/debugconfig.h>
-#include <lib/cbuf.h>
-
-/* un-overridden irq handler */
-void stm32_dummy_irq(void)
-{
-    arm_cm_irq_entry();
-
-    panic("unhandled irq\n");
-}
-
-/* a list of default handlers that are simply aliases to the dummy handler */
-#define DEFAULT_HANDLER(x) \
-void stm32_##x(void) __WEAK_ALIAS("stm32_dummy_irq");
-
-DEFAULT_HANDLER(WWDG_IRQ);
-DEFAULT_HANDLER(PVD_IRQ);
-DEFAULT_HANDLER(TAMP_STAMP_IRQ);
-DEFAULT_HANDLER(RTC_WKUP_IRQ);
-DEFAULT_HANDLER(FLASH_IRQ);
-DEFAULT_HANDLER(RCC_IRQ);
-DEFAULT_HANDLER(EXTI0_IRQ);
-DEFAULT_HANDLER(EXTI1_IRQ);
-DEFAULT_HANDLER(EXTI2_IRQ);
-DEFAULT_HANDLER(EXTI3_IRQ);
-DEFAULT_HANDLER(EXTI4_IRQ);
-
-DEFAULT_HANDLER(DMA1_Stream0_IRQ);
-DEFAULT_HANDLER(DMA1_Stream1_IRQ);
-DEFAULT_HANDLER(DMA1_Stream2_IRQ);
-DEFAULT_HANDLER(DMA1_Stream3_IRQ);
-DEFAULT_HANDLER(DMA1_Stream4_IRQ);
-DEFAULT_HANDLER(DMA1_Stream5_IRQ);
-DEFAULT_HANDLER(DMA1_Stream6_IRQ);
-
-DEFAULT_HANDLER(ADC_IRQ);
-DEFAULT_HANDLER(CAN1_TX_IRQ);
-DEFAULT_HANDLER(CAN1_RX0_IRQ);
-DEFAULT_HANDLER(CAN1_RX1_IRQ);
-DEFAULT_HANDLER(CAN1_SCE_IRQ);
-DEFAULT_HANDLER(EXTI9_5_IRQ);
-
-DEFAULT_HANDLER(TIM1_BRK_TIM9_IRQ);
-DEFAULT_HANDLER(TIM1_UP_TIM10_IRQ);
-DEFAULT_HANDLER(TIM1_TRG_COM_TIM11_IRQ);
-DEFAULT_HANDLER(TIM1_CC_IRQ);
-DEFAULT_HANDLER(TIM2_IRQ);
-DEFAULT_HANDLER(TIM3_IRQ);
-DEFAULT_HANDLER(TIM4_IRQ);
-
-DEFAULT_HANDLER(I2C1_EV_IRQ);
-DEFAULT_HANDLER(I2C1_ER_IRQ);
-DEFAULT_HANDLER(I2C2_EV_IRQ);
-DEFAULT_HANDLER(I2C2_ER_IRQ);
-
-DEFAULT_HANDLER(SPI1_IRQ);
-DEFAULT_HANDLER(SPI2_IRQ);
-
-DEFAULT_HANDLER(USART1_IRQ);
-DEFAULT_HANDLER(USART2_IRQ);
-DEFAULT_HANDLER(USART3_IRQ);
-
-DEFAULT_HANDLER(EXTI15_10_IRQ);
-DEFAULT_HANDLER(RTC_Alarm_IRQ);
-DEFAULT_HANDLER(OTG_FS_WKUP_IRQ);
-DEFAULT_HANDLER(TIM8_BRK_TIM12_IRQ);
-DEFAULT_HANDLER(TIM8_UP_TIM13_IRQ);
-DEFAULT_HANDLER(TIM8_TRG_COM_TIM14_IRQ);
-DEFAULT_HANDLER(TIM8_CC_IRQ);
-DEFAULT_HANDLER(DMA1_Stream7_IRQ);
-DEFAULT_HANDLER(FSMC_IRQ);
-DEFAULT_HANDLER(SDIO_IRQ);
-DEFAULT_HANDLER(TIM5_IRQ);
-DEFAULT_HANDLER(SPI3_IRQ);
-DEFAULT_HANDLER(UART4_IRQ);
-DEFAULT_HANDLER(UART5_IRQ);
-DEFAULT_HANDLER(TIM6_DAC_IRQ);
-DEFAULT_HANDLER(TIM7_IRQ);
-
-DEFAULT_HANDLER(DMA2_Stream0_IRQ);
-DEFAULT_HANDLER(DMA2_Stream1_IRQ);
-DEFAULT_HANDLER(DMA2_Stream2_IRQ);
-DEFAULT_HANDLER(DMA2_Stream3_IRQ);
-DEFAULT_HANDLER(DMA2_Stream4_IRQ);
-
-DEFAULT_HANDLER(ETH_IRQ);
-DEFAULT_HANDLER(ETH_WKUP_IRQ);
-DEFAULT_HANDLER(CAN2_TX_IRQ);
-DEFAULT_HANDLER(CAN2_RX0_IRQ);
-DEFAULT_HANDLER(CAN2_RX1_IRQ);
-DEFAULT_HANDLER(CAN2_SCE_IRQ);
-DEFAULT_HANDLER(OTG_FS_IRQ);
-DEFAULT_HANDLER(DMA2_Stream5_IRQ);
-DEFAULT_HANDLER(DMA2_Stream6_IRQ);
-DEFAULT_HANDLER(DMA2_Stream7_IRQ);
-DEFAULT_HANDLER(USART6_IRQ);
-DEFAULT_HANDLER(I2C3_EV_IRQ);
-DEFAULT_HANDLER(I2C3_ER_IRQ);
-DEFAULT_HANDLER(OTG_HS_EP1_OUT_IRQ);
-DEFAULT_HANDLER(OTG_HS_EP1_IN_IRQ);
-DEFAULT_HANDLER(OTG_HS_WKUP_IRQ);
-DEFAULT_HANDLER(OTG_HS_IRQ);
-DEFAULT_HANDLER(DCMI_IRQ);
-DEFAULT_HANDLER(CRYP_IRQ);
-DEFAULT_HANDLER(HASH_RNG_IRQ);
-
-DEFAULT_HANDLER(FMC_IRQ);
-DEFAULT_HANDLER(SDMMC1_IRQ);
-DEFAULT_HANDLER(RNG_IRQ);
-DEFAULT_HANDLER(FPU_IRQ);
-DEFAULT_HANDLER(UART7_IRQ);
-DEFAULT_HANDLER(UART8_IRQ);
-DEFAULT_HANDLER(SPI4_IRQ);
-DEFAULT_HANDLER(SPI5_IRQ);
-DEFAULT_HANDLER(SPI6_IRQ);
-DEFAULT_HANDLER(SAI1_IRQ);
-DEFAULT_HANDLER(LTDC_IRQ);
-DEFAULT_HANDLER(LTDC_ER_IRQ);
-DEFAULT_HANDLER(DMA2D_IRQ);
-DEFAULT_HANDLER(SAI2_IRQ);
-DEFAULT_HANDLER(QUADSPI_IRQ);
-DEFAULT_HANDLER(LPTIM1_IRQ);
-DEFAULT_HANDLER(CEC_IRQ);
-DEFAULT_HANDLER(I2C4_EV_IRQ);
-DEFAULT_HANDLER(I2C4_ER_IRQ);
-DEFAULT_HANDLER(SPDIF_RX_IRQ);
-
-#define VECTAB_ENTRY(x) [x##n] = stm32_##x
-
-/* appended to the end of the main vector table */
-const void *const __SECTION(".text.boot.vectab2") vectab2[] = {
-    VECTAB_ENTRY(WWDG_IRQ),      /*!< Window WatchDog Interrupt                                         */
-    VECTAB_ENTRY(PVD_IRQ),      /*!< PVD through EXTI Line detection Interrupt                         */
-    VECTAB_ENTRY(TAMP_STAMP_IRQ),      /*!< Tamper and TimeStamp interrupts through the EXTI line             */
-    VECTAB_ENTRY(RTC_WKUP_IRQ),      /*!< RTC Wakeup interrupt through the EXTI line                        */
-    VECTAB_ENTRY(FLASH_IRQ),      /*!< FLASH global Interrupt                                            */
-    VECTAB_ENTRY(RCC_IRQ),      /*!< RCC global Interrupt                                              */
-    VECTAB_ENTRY(EXTI0_IRQ),      /*!< EXTI Line0 Interrupt                                              */
-    VECTAB_ENTRY(EXTI1_IRQ),      /*!< EXTI Line1 Interrupt                                              */
-    VECTAB_ENTRY(EXTI2_IRQ),      /*!< EXTI Line2 Interrupt                                              */
-    VECTAB_ENTRY(EXTI3_IRQ),      /*!< EXTI Line3 Interrupt                                              */
-    VECTAB_ENTRY(EXTI4_IRQ),     /*!< EXTI Line4 Interrupt                                              */
-    VECTAB_ENTRY(DMA1_Stream0_IRQ),     /*!< DMA1 Stream 0 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream1_IRQ),     /*!< DMA1 Stream 1 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream2_IRQ),     /*!< DMA1 Stream 2 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream3_IRQ),     /*!< DMA1 Stream 3 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream4_IRQ),     /*!< DMA1 Stream 4 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream5_IRQ),     /*!< DMA1 Stream 5 global Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream6_IRQ),     /*!< DMA1 Stream 6 global Interrupt                                    */
-    VECTAB_ENTRY(ADC_IRQ),     /*!< ADC1, ADC2 and ADC3 global Interrupts                             */
-    VECTAB_ENTRY(CAN1_TX_IRQ),     /*!< CAN1 TX Interrupt                                                 */
-    VECTAB_ENTRY(CAN1_RX0_IRQ),     /*!< CAN1 RX0 Interrupt                                                */
-    VECTAB_ENTRY(CAN1_RX1_IRQ),     /*!< CAN1 RX1 Interrupt                                                */
-    VECTAB_ENTRY(CAN1_SCE_IRQ),     /*!< CAN1 SCE Interrupt                                                */
-    VECTAB_ENTRY(EXTI9_5_IRQ),     /*!< External Line[9:5] Interrupts                                     */
-    VECTAB_ENTRY(TIM1_BRK_TIM9_IRQ),     /*!< TIM1 Break interrupt and TIM9 global interrupt                    */
-    VECTAB_ENTRY(TIM1_UP_TIM10_IRQ),     /*!< TIM1 Update Interrupt and TIM10 global interrupt                  */
-    VECTAB_ENTRY(TIM1_TRG_COM_TIM11_IRQ),     /*!< TIM1 Trigger and Commutation Interrupt and TIM11 global interrupt */
-    VECTAB_ENTRY(TIM1_CC_IRQ),     /*!< TIM1 Capture Compare Interrupt                                    */
-    VECTAB_ENTRY(TIM2_IRQ),     /*!< TIM2 global Interrupt                                             */
-    VECTAB_ENTRY(TIM3_IRQ),     /*!< TIM3 global Interrupt                                             */
-    VECTAB_ENTRY(TIM4_IRQ),     /*!< TIM4 global Interrupt                                             */
-    VECTAB_ENTRY(I2C1_EV_IRQ),     /*!< I2C1 Event Interrupt                                              */
-    VECTAB_ENTRY(I2C1_ER_IRQ),     /*!< I2C1 Error Interrupt                                              */
-    VECTAB_ENTRY(I2C2_EV_IRQ),     /*!< I2C2 Event Interrupt                                              */
-    VECTAB_ENTRY(I2C2_ER_IRQ),     /*!< I2C2 Error Interrupt                                              */
-    VECTAB_ENTRY(SPI1_IRQ),     /*!< SPI1 global Interrupt                                             */
-    VECTAB_ENTRY(SPI2_IRQ),     /*!< SPI2 global Interrupt                                             */
-    VECTAB_ENTRY(USART1_IRQ),     /*!< USART1 global Interrupt                                           */
-    VECTAB_ENTRY(USART2_IRQ),     /*!< USART2 global Interrupt                                           */
-    VECTAB_ENTRY(USART3_IRQ),     /*!< USART3 global Interrupt                                           */
-    VECTAB_ENTRY(EXTI15_10_IRQ),     /*!< External Line[15:10] Interrupts                                   */
-    VECTAB_ENTRY(RTC_Alarm_IRQ),     /*!< RTC Alarm (A and B) through EXTI Line Interrupt                   */
-    VECTAB_ENTRY(OTG_FS_WKUP_IRQ),     /*!< USB OTG FS Wakeup through EXTI line interrupt                     */
-    VECTAB_ENTRY(TIM8_BRK_TIM12_IRQ),     /*!< TIM8 Break Interrupt and TIM12 global interrupt                   */
-    VECTAB_ENTRY(TIM8_UP_TIM13_IRQ),     /*!< TIM8 Update Interrupt and TIM13 global interrupt                  */
-    VECTAB_ENTRY(TIM8_TRG_COM_TIM14_IRQ),     /*!< TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt */
-    VECTAB_ENTRY(TIM8_CC_IRQ),     /*!< TIM8 Capture Compare Interrupt                                    */
-    VECTAB_ENTRY(DMA1_Stream7_IRQ),     /*!< DMA1 Stream7 Interrupt                                            */
-    VECTAB_ENTRY(FMC_IRQ),     /*!< FMC global Interrupt                                              */
-    VECTAB_ENTRY(SDMMC1_IRQ),     /*!< SDMMC1 global Interrupt                                             */
-    VECTAB_ENTRY(TIM5_IRQ),     /*!< TIM5 global Interrupt                                             */
-    VECTAB_ENTRY(SPI3_IRQ),     /*!< SPI3 global Interrupt                                             */
-    VECTAB_ENTRY(UART4_IRQ),     /*!< UART4 global Interrupt                                            */
-    VECTAB_ENTRY(UART5_IRQ),     /*!< UART5 global Interrupt                                            */
-    VECTAB_ENTRY(TIM6_DAC_IRQ),     /*!< TIM6 global and DAC1&2 underrun error  interrupts                 */
-    VECTAB_ENTRY(TIM7_IRQ),     /*!< TIM7 global interrupt                                             */
-    VECTAB_ENTRY(DMA2_Stream0_IRQ),     /*!< DMA2 Stream 0 global Interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream1_IRQ),     /*!< DMA2 Stream 1 global Interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream2_IRQ),     /*!< DMA2 Stream 2 global Interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream3_IRQ),     /*!< DMA2 Stream 3 global Interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream4_IRQ),     /*!< DMA2 Stream 4 global Interrupt                                    */
-    VECTAB_ENTRY(ETH_IRQ),     /*!< Ethernet global Interrupt                                         */
-    VECTAB_ENTRY(ETH_WKUP_IRQ),     /*!< Ethernet Wakeup through EXTI line Interrupt                       */
-    VECTAB_ENTRY(CAN2_TX_IRQ),     /*!< CAN2 TX Interrupt                                                 */
-    VECTAB_ENTRY(CAN2_RX0_IRQ),     /*!< CAN2 RX0 Interrupt                                                */
-    VECTAB_ENTRY(CAN2_RX1_IRQ),     /*!< CAN2 RX1 Interrupt                                                */
-    VECTAB_ENTRY(CAN2_SCE_IRQ),     /*!< CAN2 SCE Interrupt                                                */
-    VECTAB_ENTRY(OTG_FS_IRQ),     /*!< USB OTG FS global Interrupt                                       */
-    VECTAB_ENTRY(DMA2_Stream5_IRQ),     /*!< DMA2 Stream 5 global interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream6_IRQ),     /*!< DMA2 Stream 6 global interrupt                                    */
-    VECTAB_ENTRY(DMA2_Stream7_IRQ),     /*!< DMA2 Stream 7 global interrupt                                    */
-    VECTAB_ENTRY(USART6_IRQ),     /*!< USART6 global interrupt                                           */
-    VECTAB_ENTRY(I2C3_EV_IRQ),     /*!< I2C3 event interrupt                                              */
-    VECTAB_ENTRY(I2C3_ER_IRQ),     /*!< I2C3 error interrupt                                              */
-    VECTAB_ENTRY(OTG_HS_EP1_OUT_IRQ),     /*!< USB OTG HS End Point 1 Out global interrupt                       */
-    VECTAB_ENTRY(OTG_HS_EP1_IN_IRQ),     /*!< USB OTG HS End Point 1 In global interrupt                        */
-    VECTAB_ENTRY(OTG_HS_WKUP_IRQ),     /*!< USB OTG HS Wakeup through EXTI interrupt                          */
-    VECTAB_ENTRY(OTG_HS_IRQ),     /*!< USB OTG HS global interrupt                                       */
-    VECTAB_ENTRY(DCMI_IRQ),     /*!< DCMI global interrupt                                             */
-    VECTAB_ENTRY(RNG_IRQ),     /*!< RNG global interrupt                                              */
-    VECTAB_ENTRY(FPU_IRQ),     /*!< FPU global interrupt                                              */
-    VECTAB_ENTRY(UART7_IRQ),     /*!< UART7 global interrupt                                            */
-    VECTAB_ENTRY(UART8_IRQ),     /*!< UART8 global interrupt                                            */
-    VECTAB_ENTRY(SPI4_IRQ),     /*!< SPI4 global Interrupt                                             */
-    VECTAB_ENTRY(SPI5_IRQ),     /*!< SPI5 global Interrupt                                             */
-    VECTAB_ENTRY(SPI6_IRQ),     /*!< SPI6 global Interrupt                                             */
-    VECTAB_ENTRY(SAI1_IRQ),     /*!< SAI1 global Interrupt                                             */
-    VECTAB_ENTRY(LTDC_IRQ),     /*!< LTDC global Interrupt                                             */
-    VECTAB_ENTRY(LTDC_ER_IRQ),     /*!< LTDC Error global Interrupt                                       */
-    VECTAB_ENTRY(DMA2D_IRQ),     /*!< DMA2D global Interrupt                                            */
-    VECTAB_ENTRY(SAI2_IRQ),     /*!< SAI2 global Interrupt                                             */
-    VECTAB_ENTRY(QUADSPI_IRQ),     /*!< Quad SPI global interrupt                                         */
-    VECTAB_ENTRY(LPTIM1_IRQ),     /*!< LP TIM1 interrupt                                                 */
-    VECTAB_ENTRY(CEC_IRQ),     /*!< HDMI-CEC global Interrupt                                         */
-    VECTAB_ENTRY(I2C4_EV_IRQ),     /*!< I2C4 Event Interrupt                                              */
-    VECTAB_ENTRY(I2C4_ER_IRQ),     /*!< I2C4 Error Interrupt                                              */
-    VECTAB_ENTRY(SPDIF_RX_IRQ)     /*!< SPDIF-RX global Interrupt                                         */
-};
-
diff --git a/platform/zynq/clocks.c b/platform/zynq/clocks.c
deleted file mode 100644
index 8ed1dea5..00000000
--- a/platform/zynq/clocks.c
+++ /dev/null
@@ -1,389 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <bits.h>
-#include <stdio.h>
-#include <assert.h>
-#include <trace.h>
-#include <err.h>
-#include <kernel/thread.h>
-#include <platform/debug.h>
-#include <platform/zynq.h>
-#include <target/debugconfig.h>
-#include <reg.h>
-
-#define LOCAL_TRACE 0
-
-static uint32_t get_arm_pll_freq(void)
-{
-    LTRACEF("ARM_PLL_CTRL 0x%x\n", SLCR_REG(ARM_PLL_CTRL));
-
-    // XXX test that the pll is actually enabled
-
-    uint32_t fdiv = BITS_SHIFT(SLCR_REG(ARM_PLL_CTRL), 18, 12);
-
-    return EXTERNAL_CLOCK_FREQ * fdiv;
-}
-
-static uint32_t get_ddr_pll_freq(void)
-{
-    LTRACEF("DDR_PLL_CTRL 0x%x\n", SLCR_REG(DDR_PLL_CTRL));
-
-    // XXX test that the pll is actually enabled
-
-    uint32_t fdiv = BITS_SHIFT(SLCR_REG(DDR_PLL_CTRL), 18, 12);
-
-    return EXTERNAL_CLOCK_FREQ * fdiv;
-}
-
-static uint32_t get_io_pll_freq(void)
-{
-    LTRACEF("IO_PLL_CTRL 0x%x\n", SLCR_REG(IO_PLL_CTRL));
-
-    // XXX test that the pll is actually enabled
-
-    uint32_t fdiv = BITS_SHIFT(SLCR_REG(IO_PLL_CTRL), 18, 12);
-
-    return EXTERNAL_CLOCK_FREQ * fdiv;
-}
-
-static uint32_t get_cpu_input_freq(void)
-{
-    LTRACEF("ARM_CLK_CTRL 0x%x\n", SLCR_REG(ARM_CLK_CTRL));
-
-    uint32_t divisor = BITS_SHIFT(SLCR_REG(ARM_CLK_CTRL), 13, 8);
-    uint32_t srcsel = BITS_SHIFT(SLCR_REG(ARM_CLK_CTRL), 5, 4);
-
-    uint32_t srcclk;
-    switch (srcsel) {
-        default:
-        case 0:
-        case 1: // arm pll
-            srcclk = get_arm_pll_freq();
-            break;
-        case 2: // ddr pll
-            srcclk = get_ddr_pll_freq();
-            break;
-        case 3: // io pll
-            srcclk = get_io_pll_freq();
-            break;
-    }
-
-    // cpu 6x4x
-    return srcclk / divisor;
-}
-
-static uint32_t get_cpu_6x4x_freq(void)
-{
-    // cpu 6x4x is the post divided frequency in the cpu clock block
-    return get_cpu_input_freq();
-}
-
-static uint32_t get_cpu_3x2x_freq(void)
-{
-    // cpu 3x2x is always half the speed of 6x4x
-    return get_cpu_input_freq() / 2;
-}
-
-static uint32_t get_cpu_2x_freq(void)
-{
-    // cpu 2x is either /3 or /2 the speed of 6x4x
-    return get_cpu_input_freq() / ((SLCR_REG(CLK_621_TRUE) & 1) ? 3 : 2);
-}
-
-static uint32_t get_cpu_1x_freq(void)
-{
-    // cpu 1x is either /6 or /4 the speed of 6x4x
-    return get_cpu_input_freq() / ((SLCR_REG(CLK_621_TRUE) & 1) ? 6 : 4);
-}
-
-uint32_t zynq_get_arm_freq(void)
-{
-    return get_cpu_6x4x_freq();
-}
-
-uint32_t zynq_get_arm_timer_freq(void)
-{
-    return get_cpu_3x2x_freq();
-}
-
-uint32_t zynq_get_swdt_freq(void)
-{
-    return get_cpu_1x_freq();
-}
-
-struct periph_clock {
-    addr_t clk_ctrl_reg;
-    uint enable_bit_pos;
-};
-
-static addr_t periph_clk_ctrl_reg(enum zynq_periph periph)
-{
-    DEBUG_ASSERT(periph < _PERIPH_MAX);
-
-    switch (periph) {
-        case PERIPH_USB0:
-            return (uintptr_t)&SLCR->USB0_CLK_CTRL;
-        case PERIPH_USB1:
-            return (uintptr_t)&SLCR->USB1_CLK_CTRL;
-        case PERIPH_GEM0:
-            return (uintptr_t)&SLCR->GEM0_CLK_CTRL;
-        case PERIPH_GEM1:
-            return (uintptr_t)&SLCR->GEM1_CLK_CTRL;
-        case PERIPH_SMC:
-            return (uintptr_t)&SLCR->SMC_CLK_CTRL;
-        case PERIPH_LQSPI:
-            return (uintptr_t)&SLCR->LQSPI_CLK_CTRL;
-        case PERIPH_SDIO0:
-            return (uintptr_t)&SLCR->SDIO_CLK_CTRL;
-        case PERIPH_SDIO1:
-            return (uintptr_t)&SLCR->SDIO_CLK_CTRL;
-        case PERIPH_UART0:
-            return (uintptr_t)&SLCR->UART_CLK_CTRL;
-        case PERIPH_UART1:
-            return (uintptr_t)&SLCR->UART_CLK_CTRL;
-        case PERIPH_SPI0:
-            return (uintptr_t)&SLCR->SPI_CLK_CTRL;
-        case PERIPH_SPI1:
-            return (uintptr_t)&SLCR->SPI_CLK_CTRL;
-        case PERIPH_CAN0:
-            return (uintptr_t)&SLCR->CAN_CLK_CTRL;
-        case PERIPH_CAN1:
-            return (uintptr_t)&SLCR->CAN_CLK_CTRL;
-        case PERIPH_DBG:
-            return (uintptr_t)&SLCR->DBG_CLK_CTRL;
-        case PERIPH_PCAP:
-            return (uintptr_t)&SLCR->PCAP_CLK_CTRL;
-        case PERIPH_FPGA0:
-            return (uintptr_t)&SLCR->FPGA0_CLK_CTRL;
-        case PERIPH_FPGA1:
-            return (uintptr_t)&SLCR->FPGA1_CLK_CTRL;
-        case PERIPH_FPGA2:
-            return (uintptr_t)&SLCR->FPGA2_CLK_CTRL;
-        case PERIPH_FPGA3:
-            return (uintptr_t)&SLCR->FPGA3_CLK_CTRL;
-        default:
-            return 0;
-    }
-}
-
-static int periph_clk_ctrl_enable_bitpos(enum zynq_periph periph)
-{
-    switch (periph) {
-        case PERIPH_SDIO1:
-            case PERIPH_UART1:
-                case PERIPH_SPI1:
-                    case PERIPH_CAN1:
-                            return 1;
-        case PERIPH_FPGA0:
-        case PERIPH_FPGA1:
-        case PERIPH_FPGA2:
-        case PERIPH_FPGA3:
-            return -1; // enable bit is more complicated on fpga
-        default:
-            // most peripherals have the enable bit in bit0
-            return 0;
-    }
-}
-
-static uint periph_clk_ctrl_divisor_count(enum zynq_periph periph)
-{
-    switch (periph) {
-        case PERIPH_GEM0:
-            case PERIPH_GEM1:
-                case PERIPH_CAN0:
-                    case PERIPH_CAN1:
-                        case PERIPH_FPGA0:
-                            case PERIPH_FPGA1:
-                                case PERIPH_FPGA2:
-                                    case PERIPH_FPGA3:
-                                            return 2;
-        default:
-            // most peripherals have a single divisor
-            return 1;
-    }
-}
-
-static const char *periph_to_name(enum zynq_periph periph)
-{
-    switch (periph) {
-        case PERIPH_USB0:
-                return "USB0";
-        case PERIPH_USB1:
-            return "USB1";
-        case PERIPH_GEM0:
-            return "GEM0";
-        case PERIPH_GEM1:
-            return "GEM1";
-        case PERIPH_SMC:
-            return "SMC";
-        case PERIPH_LQSPI:
-            return "LQSPI";
-        case PERIPH_SDIO0:
-            return "SDIO0";
-        case PERIPH_SDIO1:
-            return "SDIO1";
-        case PERIPH_UART0:
-            return "UART0";
-        case PERIPH_UART1:
-            return "UART1";
-        case PERIPH_SPI0:
-            return "SPI0";
-        case PERIPH_SPI1:
-            return "SPI1";
-        case PERIPH_CAN0:
-            return "CAN0";
-        case PERIPH_CAN1:
-            return "CAN1";
-        case PERIPH_DBG:
-            return "DBG";
-        case PERIPH_PCAP:
-            return "PCAP";
-        case PERIPH_FPGA0:
-            return "FPGA0";
-        case PERIPH_FPGA1:
-            return "FPGA1";
-        case PERIPH_FPGA2:
-            return "FPGA2";
-        case PERIPH_FPGA3:
-            return "FPGA3";
-        default:
-            return "unknown";
-    }
-}
-
-status_t zynq_set_clock(enum zynq_periph periph, bool enable, enum zynq_clock_source source, uint32_t divisor, uint32_t divisor2)
-{
-    DEBUG_ASSERT(periph < _PERIPH_MAX);
-    DEBUG_ASSERT(!enable || (divisor > 0 && divisor <= 0x3f));
-    DEBUG_ASSERT(source < 4);
-
-    // get the clock control register base
-    addr_t clk_reg = periph_clk_ctrl_reg(periph);
-    DEBUG_ASSERT(clk_reg != 0);
-
-    int enable_bitpos = periph_clk_ctrl_enable_bitpos(periph);
-
-    zynq_slcr_unlock();
-
-    // if we're enabling
-    if (enable) {
-        uint32_t ctrl = *REG32(clk_reg);
-
-        // set the divisor, divisor2 (if applicable), source, and enable
-        ctrl = (ctrl & ~(0x3f << 20)) | (divisor2 << 20);
-        ctrl = (ctrl & ~(0x3f << 8)) | (divisor << 8);
-        ctrl = (ctrl & ~(0x3 << 4)) | (source << 4);
-
-        if (enable_bitpos >= 0)
-            ctrl |= (1 << enable_bitpos);
-
-        *REG32(clk_reg) = ctrl;
-    } else {
-        if (enable_bitpos >= 0) {
-            // disabling
-            uint32_t ctrl = *REG32(clk_reg);
-
-            ctrl &= ~(1 << enable_bitpos);
-
-            *REG32(clk_reg) = ctrl;
-        }
-    }
-
-    zynq_slcr_lock();
-
-    return NO_ERROR;
-}
-
-uint32_t zynq_get_clock(enum zynq_periph periph)
-{
-    DEBUG_ASSERT(periph < _PERIPH_MAX);
-
-    // get the clock control register base
-    addr_t clk_reg = periph_clk_ctrl_reg(periph);
-    DEBUG_ASSERT(clk_reg != 0);
-
-    int enable_bitpos = periph_clk_ctrl_enable_bitpos(periph);
-
-    LTRACEF("clkreg 0x%x\n", *REG32(clk_reg));
-
-    // see if it's enabled
-    if (enable_bitpos >= 0) {
-        if ((*REG32(clk_reg) & (1 << enable_bitpos)) == 0) {
-            // not enabled
-            return 0;
-        }
-    }
-
-    // get the source clock
-    uint32_t srcclk;
-    switch (BITS_SHIFT(*REG32(clk_reg), 5, 4)) {
-        case 0:
-        case 1:
-            srcclk = get_io_pll_freq();
-            break;
-        case 2:
-            srcclk = get_arm_pll_freq();
-            break;
-        case 3:
-            srcclk = get_ddr_pll_freq();
-            break;
-    }
-
-    // get the divisor out of the register
-    uint32_t divisor = BITS_SHIFT(*REG32(clk_reg), 13, 8);
-    if (divisor == 0)
-        return 0;
-
-    uint32_t divisor2 = 1;
-    if (periph_clk_ctrl_divisor_count(periph) == 2) {
-        divisor2 = BITS_SHIFT(*REG32(clk_reg), 25, 20);
-        if (divisor2 == 0)
-            return 0;
-    }
-
-    uint32_t clk = srcclk / divisor / divisor2;
-
-    return clk;
-}
-
-void zynq_dump_clocks(void)
-{
-    printf("zynq clocks:\n");
-    printf("\tarm pll %d\n", get_arm_pll_freq());
-    printf("\tddr pll %d\n", get_ddr_pll_freq());
-    printf("\tio  pll %d\n", get_io_pll_freq());
-
-    printf("\tarm clock %d\n", zynq_get_arm_freq());
-    printf("\tarm timer clock %d\n", zynq_get_arm_timer_freq());
-    printf("\tcpu6x4x clock %d\n", get_cpu_6x4x_freq());
-    printf("\tcpu3x2x clock %d\n", get_cpu_3x2x_freq());
-    printf("\tcpu2x clock %d\n", get_cpu_2x_freq());
-    printf("\tcpu1x clock %d\n", get_cpu_1x_freq());
-
-    printf("peripheral clocks:\n");
-    for (uint i = 0; i < _PERIPH_MAX; i++) {
-        printf("\tperiph %d (%s) clock %u\n", i, periph_to_name(i), zynq_get_clock(i));
-    }
-}
-
diff --git a/platform/zynq/debug.c b/platform/zynq/debug.c
deleted file mode 100644
index d9dbd857..00000000
--- a/platform/zynq/debug.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (c) 2008-2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <stdio.h>
-#include <kernel/thread.h>
-#include <dev/uart.h>
-#include <platform.h>
-#include <platform/debug.h>
-#include <platform/zynq.h>
-#include <target/debugconfig.h>
-#include <reg.h>
-
-/* DEBUG_UART must be defined to 0 or 1 */
-#if defined(DEBUG_UART) && DEBUG_UART == 0
-#define DEBUG_UART_BASE UART0_BASE
-#elif defined(DEBUG_UART) && DEBUG_UART == 1
-#define DEBUG_UART_BASE UART1_BASE
-#else
-#error define DEBUG_UART to something valid
-#endif
-
-void platform_dputc(char c)
-{
-    if (c == '\n')
-        uart_putc(DEBUG_UART, '\r');
-    uart_putc(DEBUG_UART, c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
-    int ret = uart_getc(DEBUG_UART, wait);
-    if (ret == -1)
-        return -1;
-    *c = ret;
-    return 0;
-
-}
-
-/* zynq specific halt */
-void platform_halt(platform_halt_action suggested_action,
-                   platform_halt_reason reason)
-{
-    switch (suggested_action) {
-        default:
-        case HALT_ACTION_SHUTDOWN:
-        case HALT_ACTION_HALT:
-            printf("HALT: spinning forever... (reason = %d)\n", reason);
-            arch_disable_ints();
-            for (;;)
-                arch_idle();
-            break;
-        case HALT_ACTION_REBOOT:
-            printf("REBOOT\n");
-            arch_disable_ints();
-            for (;;) {
-                zynq_slcr_unlock();
-                SLCR->PSS_RST_CTRL = 1;
-            }
-            break;
-    }
-}
diff --git a/platform/zynq/fpga.c b/platform/zynq/fpga.c
deleted file mode 100644
index 3bddba1f..00000000
--- a/platform/zynq/fpga.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * Copyright (c) 2014 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <platform/fpga.h>
-#include <trace.h>
-#include <reg.h>
-#include <err.h>
-#include <platform.h>
-#include <kernel/thread.h>
-
-#define LOCAL_TRACE 0
-#define FPGA_TIMEOUT 1000
-
-#define DEVCFG_CTRL         0xF8007000
-#define  PCFG_PROG_B        (1 << 30)
-#define  PCFG_POR_CNT_4K    (1 << 29)
-#define  PCAP_PR            (1 << 27) // 0 = ICAP CFG, 1 = PCAP CFG
-#define  PCAP_MODE          (1 << 26) // 1 = Enable PCAP Interface
-#define DEVCFG_LOCK         0xF8007004
-#define DEVCFG_CFG          0xF8007008
-#define DEVCFG_INT_STS      0xF800700C
-#define  DMA_DONE_INT       (1 << 13)
-#define  PSS_CFG_RESET_B    (1 << 5) // 1 = PL in reset state
-#define  PCFG_DONE_INT      (1 << 2) // 1 = PL successfully programmed
-#define  PCFG_INIT_PE_INT   (1 << 1)
-#define  PCFG_INIT_NE_INT   (1 << 0)
-#define DEVCFG_INT_MASK     0xF8007010
-#define DEVCFG_STATUS       0xF8007014
-#define  PCFG_INIT          (1 << 4) // 1 = ready for bitstream
-#define DEVCFG_DMA_SRC_ADDR 0xF8007018
-#define DEVCFG_DMA_DST_ADDR 0xF800701C
-#define DEVCFG_DMA_SRC_LEN  0xF8007020 // words
-#define DEVCFG_DMA_DST_LEN  0xF8007024 // words
-#define DEVCFG_SW_ID        0xF8007030
-#define DEVCFG_MCTRL        0xF8007080
-#define  PCFG_POR_B         (1 << 8) // 1 = PL is powered on
-#define  INT_PCAP_LPBK      (1 << 4) // 1 = Loopback Enabled
-
-// Per Zynq TRM, 6.4.4
-// 1. wait for PCFG_INIT==1
-// 2. disable loopback
-// 3. set DEVCFG CTRL PCAP_PR and PCAP_MODE
-// 4. set dma src, dst, srclen, dstlen (in that specific order)
-// 5. wait for PCFG_DONE_INT==1
-
-status_t zynq_program_fpga(paddr_t physaddr, size_t length)
-{
-    LTRACEF("phys 0x%lx, len 0x%zx\n", physaddr, length);
-
-    lk_bigtime_t bt = current_time_hires();
-
-    /* length is in words */
-    length /= 4;
-
-    lk_time_t t;
-
-    t = current_time();
-    while (!(readl(DEVCFG_STATUS) & PCFG_INIT)) {
-        if (current_time() - t > FPGA_TIMEOUT) {
-            TRACEF("timeout waiting for PCFG_INIT\n");
-            return ERR_TIMED_OUT;
-        }
-    }
-    writel(readl(DEVCFG_MCTRL) & (~INT_PCAP_LPBK), DEVCFG_MCTRL);
-    writel(readl(DEVCFG_CTRL) | PCAP_PR | PCAP_MODE, DEVCFG_CTRL);
-    writel(0xffffffff, DEVCFG_INT_STS);
-    writel(physaddr, DEVCFG_DMA_SRC_ADDR);
-    writel(0xFFFFFFFF, DEVCFG_DMA_DST_ADDR);
-    writel(length, DEVCFG_DMA_SRC_LEN);
-    writel(length, DEVCFG_DMA_DST_LEN);
-
-    t = current_time();
-    uint32_t sts = 0;
-    for (;;) {
-        sts = readl(DEVCFG_INT_STS);
-#if LOCAL_TRACE
-        static uint32_t last = 0;
-        if (last != sts) {
-            printf("dsts 0x%x\n", sts);
-        }
-        last = sts;
-#endif
-        if (sts & PCFG_DONE_INT)
-            break;
-
-        if (current_time() - t > FPGA_TIMEOUT) {
-            TRACEF("timeout waiting for PCFG_DONE_INT, DEVCFG_INT_STS is 0x%x\n", sts);
-            return ERR_TIMED_OUT;
-        }
-    }
-
-    bt = current_time_hires() - bt;
-    LTRACEF("fpga program took %llu usecs\n", bt);
-
-    return NO_ERROR;
-}
-
-bool zync_fpga_config_done(void)
-{
-    return (0 != (readl(DEVCFG_INT_STS) & PCFG_DONE_INT));
-}
-
-void zynq_reset_fpga(void)
-{
-    writel(readl(DEVCFG_CTRL) & (~PCFG_PROG_B), DEVCFG_CTRL);
-    writel(readl(DEVCFG_CTRL) | PCFG_PROG_B, DEVCFG_CTRL);
-}
-
diff --git a/platform/zynq/gem.c b/platform/zynq/gem.c
deleted file mode 100644
index 86ac7402..00000000
--- a/platform/zynq/gem.c
+++ /dev/null
@@ -1,645 +0,0 @@
-/*
- * Copyright (c) 2014 Christopher Anderson
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <assert.h>
-#include <lib/console.h>
-#include <debug.h>
-#include <list.h>
-#include <err.h>
-#include <errno.h>
-#include <reg.h>
-#include <endian.h>
-#include <stdio.h>
-#include <string.h>
-#include <malloc.h>
-#include <trace.h>
-#include <bits.h>
-#include <pow2.h>
-#include <sys/types.h>
-#include <lib/cbuf.h>
-#include <kernel/timer.h>
-#include <kernel/thread.h>
-#include <kernel/vm.h>
-#include <kernel/spinlock.h>
-#include <kernel/debug.h>
-#include <platform/interrupts.h>
-#include <platform/debug.h>
-#include <platform/gem.h>
-#include <platform.h>
-#include <kernel/event.h>
-#include <kernel/semaphore.h>
-
-#include <lib/pktbuf.h>
-#include <lib/pool.h>
-
-#define LOCAL_TRACE         0
-
-/* Allow targets to override these values */
-#ifndef GEM_RX_DESC_CNT
-#define GEM_RX_DESC_CNT     32
-#endif
-
-#ifndef GEM_TX_DESC_CNT
-#define GEM_TX_DESC_CNT      32
-#endif
-
-#ifndef GEM_RX_BUF_SIZE
-#define GEM_RX_BUF_SIZE     1536
-#endif
-
-#ifndef GEM_TX_BUF_SIZE
-#define GEM_TX_BUF_SIZE     1536
-#endif
-
-pool_t rx_buf_pool;
-static spin_lock_t lock = SPIN_LOCK_INITIAL_VALUE;
-
-struct gem_desc {
-    uint32_t addr;
-    uint32_t ctrl;
-};
-
-/* Quick overview:
- * RX:
- *  rx_tbl contains rx descriptors. A pktbuf is allocated for each of these and a descriptor
- *  entry in the table points to a buffer in the pktbuf. rx_tbl[X]'s pktbuf is stored in rx_pbufs[X]
- *
- * TX:
- *  The current position to write new tx descriptors to is maintained by gem.tx_head. As frames are
- *  queued in tx_tbl their pktbufs are stored in the list queued_pbufs. As frame transmission is
- *  completed these pktbufs are released back to the pool by the interrupt handler for TX_COMPLETE
- */
-struct gem_descs {
-    struct gem_desc rx_tbl[GEM_RX_DESC_CNT];
-    struct gem_desc tx_tbl[GEM_TX_DESC_CNT];
-};
-
-struct gem_state {
-    volatile struct gem_regs *regs;
-
-    struct gem_descs *descs;
-    paddr_t descs_phys;
-
-    unsigned int tx_head;
-    unsigned int tx_tail;
-    unsigned int tx_count;
-    struct list_node tx_queue;
-    struct list_node queued_pbufs;
-
-    gem_cb_t rx_callback;
-    event_t rx_pending;
-    event_t tx_complete;
-    bool debug_rx;
-    pktbuf_t *rx_pbufs[GEM_RX_DESC_CNT];
-};
-
-struct gem_state gem;
-
-static void debug_rx_handler(pktbuf_t *p)
-{
-    static uint32_t pkt = 0;
-
-    printf("[%10u] packet %u, %zu bytes:\n", (uint32_t)current_time(), ++pkt, p->dlen);
-    hexdump8(p->data, p->dlen);
-    putchar('\n');
-}
-
-static int free_completed_pbuf_frames(void)
-{
-    int ret = 0;
-
-    gem.regs->tx_status = gem.regs->tx_status;
-
-    while (gem.tx_count > 0 &&
-            (gem.descs->tx_tbl[gem.tx_tail].ctrl & TX_DESC_USED)) {
-
-        bool eof;
-        do {
-            pktbuf_t *p = list_remove_head_type(&gem.queued_pbufs, pktbuf_t, list);
-            DEBUG_ASSERT(p);
-            eof = p->flags & PKTBUF_FLAG_EOF;
-            ret += pktbuf_free(p, false);
-        } while (!eof);
-
-        gem.tx_tail = (gem.tx_tail + 1) % GEM_TX_DESC_CNT;
-        gem.tx_count--;
-    }
-
-    return ret;
-}
-
-void queue_pkts_in_tx_tbl(void)
-{
-    pktbuf_t *p;
-    unsigned int cur_pos;
-
-    if (list_is_empty(&gem.tx_queue)) {
-        return;
-    }
-
-    // XXX handle multi part buffers
-
-    /* Queue packets in the descriptor table until we're either out of space in the table
-     * or out of packets in our tx queue. Any packets left will remain in the list and be
-     * processed the next time available */
-    while (gem.tx_count < GEM_TX_DESC_CNT &&
-            ((p = list_remove_head_type(&gem.tx_queue, pktbuf_t, list)) != NULL)) {
-        cur_pos = gem.tx_head;
-
-        uint32_t addr = pktbuf_data_phys(p);
-        uint32_t ctrl = gem.descs->tx_tbl[cur_pos].ctrl & TX_DESC_WRAP; /* protect the wrap bit */
-        ctrl |= TX_BUF_LEN(p->dlen);
-
-        DEBUG_ASSERT(p->flags & PKTBUF_FLAG_EOF); // a multi part buffer would have caused a race condition w/hardware
-        if (p->flags & PKTBUF_FLAG_EOF) {
-            ctrl |= TX_LAST_BUF;
-        }
-
-        /* fill in the descriptor, control word last (in case hardware is racing us) */
-        gem.descs->tx_tbl[cur_pos].addr = addr;
-        gem.descs->tx_tbl[cur_pos].ctrl = ctrl;
-
-        gem.tx_head = (gem.tx_head + 1) % GEM_TX_DESC_CNT;
-        gem.tx_count++;
-        list_add_tail(&gem.queued_pbufs, &p->list);
-    }
-
-    DMB;
-    gem.regs->net_ctrl |= NET_CTRL_START_TX;
-}
-
-int gem_send_raw_pkt(struct pktbuf *p)
-{
-    status_t ret = NO_ERROR;
-
-    if (!p || !p->dlen) {
-        ret = -1;
-        goto err;
-    }
-
-    /* make sure the output buffer is fully written to memory before
-     * placing on the outgoing list. */
-
-    // XXX handle multi part buffers
-    arch_clean_cache_range((vaddr_t)p->data, p->dlen);
-
-    spin_lock_saved_state_t irqstate;
-    spin_lock_irqsave(&lock, irqstate);
-    list_add_tail(&gem.tx_queue, &p->list);
-    queue_pkts_in_tx_tbl();
-    spin_unlock_irqrestore(&lock, irqstate);
-
-err:
-    return ret;
-}
-
-
-enum handler_return gem_int_handler(void *arg)
-{
-    uint32_t intr_status;
-    bool resched = false;
-
-    intr_status = gem.regs->intr_status;
-
-    spin_lock(&lock);
-
-    while (intr_status) {
-        // clear any pending status
-        gem.regs->intr_status = intr_status;
-
-        // Received an RX complete
-        if (intr_status & INTR_RX_COMPLETE) {
-            event_signal(&gem.rx_pending, false);
-
-            gem.regs->rx_status |= INTR_RX_COMPLETE;
-
-            resched = true;
-        }
-
-        if (intr_status & INTR_RX_USED_READ) {
-
-            for (int i = 0; i < GEM_RX_DESC_CNT; i++) {
-                gem.descs->rx_tbl[i].addr &= ~RX_DESC_USED;
-            }
-
-            gem.regs->rx_status &= ~RX_STATUS_BUFFER_NOT_AVAIL;
-            gem.regs->net_ctrl &= ~NET_CTRL_RX_EN;
-            gem.regs->net_ctrl |= NET_CTRL_RX_EN;
-            printf("GEM overflow, dumping pending packets\n");
-        }
-
-        if (intr_status & INTR_TX_CORRUPT) {
-            printf("tx ahb error!\n");
-            if (free_completed_pbuf_frames() > 0) {
-                resched = true;
-            }
-        }
-
-        /* A frame has been completed so we can clean up ownership of its buffers */
-        if (intr_status & INTR_TX_COMPLETE) {
-            if (free_completed_pbuf_frames() > 0) {
-                resched = true;
-            }
-        }
-
-        /* The controller has processed packets until it hit a buffer owned by the driver */
-        if (intr_status & INTR_TX_USED_READ) {
-            queue_pkts_in_tx_tbl();
-            gem.regs->tx_status |= TX_STATUS_USED_READ;
-        }
-
-        /* see if we have any more */
-        intr_status = gem.regs->intr_status;
-    }
-
-    spin_unlock(&lock);
-
-    return (resched) ? INT_RESCHEDULE : INT_NO_RESCHEDULE;
-}
-
-static bool wait_for_phy_idle(void)
-{
-    int iters = 1000;
-    while (iters && !(gem.regs->net_status & NET_STATUS_PHY_MGMT_IDLE)) {
-        iters--;
-    }
-
-    if (iters == 0) {
-        return false;
-    }
-
-    return true;
-}
-
-static bool gem_phy_init(void)
-{
-    return wait_for_phy_idle();
-}
-
-static status_t gem_cfg_buffer_descs(void)
-{
-    void *rx_buf_vaddr;
-    status_t ret;
-
-
-    if ((ret = vmm_alloc_contiguous(vmm_get_kernel_aspace(), "gem_rx_bufs",
-                                    GEM_RX_DESC_CNT * GEM_RX_BUF_SIZE,  (void **) &rx_buf_vaddr, 0, 0,
-                                    ARCH_MMU_FLAG_CACHED)) < 0) {
-        return ret;
-    }
-
-    /* Take pktbufs from the allocated target pool and assign them to the gem RX
-     * descriptor table */
-    pool_init(&rx_buf_pool, GEM_RX_BUF_SIZE, CACHE_LINE, GEM_RX_DESC_CNT, rx_buf_vaddr);
-    for (unsigned int n = 0; n < GEM_RX_DESC_CNT; n++) {
-        void *b = pool_alloc(&rx_buf_pool);
-        pktbuf_t *p = pktbuf_alloc_empty();
-        if (!p || !b) {
-            return -1;
-        }
-
-        pktbuf_add_buffer(p, b, GEM_RX_BUF_SIZE, 0, PKTBUF_FLAG_CACHED, NULL, NULL);
-        gem.rx_pbufs[n] = p;
-        gem.descs->rx_tbl[n].addr = (uintptr_t) p->phys_base;
-        gem.descs->rx_tbl[n].ctrl = 0;
-    }
-
-    /* Claim ownership of TX descriptors for the driver */
-    for (unsigned i = 0; i < GEM_TX_DESC_CNT; i++) {
-        gem.descs->tx_tbl[i].addr = 0;
-        gem.descs->tx_tbl[i].ctrl = TX_DESC_USED;
-    }
-
-    /* Both set of descriptors need wrap bits set at the end of their tables*/
-    gem.descs->rx_tbl[GEM_RX_DESC_CNT-1].addr |= RX_DESC_WRAP;
-    gem.descs->tx_tbl[GEM_TX_DESC_CNT-1].ctrl |= TX_DESC_WRAP;
-
-    /* Point the controller at the offset into state's physical location for RX descs */
-    gem.regs->rx_qbar = ((uintptr_t)&gem.descs->rx_tbl[0] - (uintptr_t)gem.descs) + gem.descs_phys;
-    gem.regs->tx_qbar = ((uintptr_t)&gem.descs->tx_tbl[0] - (uintptr_t)gem.descs) + gem.descs_phys;
-
-    return NO_ERROR;
-}
-
-static void gem_cfg_ints(void)
-{
-    uint32_t gem_base = (uintptr_t)gem.regs;
-
-    if (gem_base == GEM0_BASE) {
-        register_int_handler(ETH0_INT, gem_int_handler, NULL);
-        unmask_interrupt(ETH0_INT);
-    } else if (gem_base == GEM1_BASE) {
-        register_int_handler(ETH1_INT, gem_int_handler, NULL);
-        unmask_interrupt(ETH1_INT);
-    } else {
-        printf("Illegal gem periph base address 0x%08X!\n", gem_base);
-        return;
-    }
-
-    /* Enable all interrupts */
-    gem.regs->intr_en = INTR_RX_COMPLETE | INTR_TX_COMPLETE | INTR_HRESP_NOT_OK | INTR_MGMT_SENT |
-                        INTR_RX_USED_READ | INTR_TX_CORRUPT | INTR_TX_USED_READ | INTR_RX_OVERRUN;
-}
-
-int gem_rx_thread(void *arg)
-{
-    pktbuf_t *p;
-    int bp = 0;
-
-    while (1) {
-        event_wait(&gem.rx_pending);
-
-        for (;;) {
-            if (gem.descs->rx_tbl[bp].addr & RX_DESC_USED) {
-                uint32_t ctrl = gem.descs->rx_tbl[bp].ctrl;
-
-                p = gem.rx_pbufs[bp];
-                p->dlen = RX_BUF_LEN(ctrl);
-                p->data = p->buffer + 2;
-
-                /* copy the checksum offloading bits */
-                p->flags = 0;
-                p->flags |= (BITS_SHIFT(ctrl, 23, 22) != 0) ? PKTBUF_FLAG_CKSUM_IP_GOOD : 0;
-                p->flags |= (BITS_SHIFT(ctrl, 23, 22) == 1) ? PKTBUF_FLAG_CKSUM_UDP_GOOD : 0;
-                p->flags |= (BITS_SHIFT(ctrl, 23, 22) == 2) ? PKTBUF_FLAG_CKSUM_TCP_GOOD : 0;
-
-                /* invalidate any stale cache lines on the receive buffer to ensure
-                 * the cpu has a fresh copy of incomding data. */
-                arch_invalidate_cache_range((vaddr_t)p->data, p->dlen);
-
-                if (unlikely(gem.debug_rx)) {
-                    debug_rx_handler(p);
-                }
-
-                if (likely(gem.rx_callback)) {
-                    gem.rx_callback(p);
-                }
-
-                /* make sure all dirty data is flushed out of the buffer before
-                 * putting into the receive queue */
-                arch_clean_invalidate_cache_range((vaddr_t)p->buffer, PKTBUF_SIZE);
-
-                gem.descs->rx_tbl[bp].addr &= ~RX_DESC_USED;
-                gem.descs->rx_tbl[bp].ctrl = 0;
-                bp = (bp + 1) % GEM_RX_DESC_CNT;
-            } else {
-                break;
-            }
-        }
-    }
-
-    return 0;
-}
-
-
-int gem_stat_thread(void *arg)
-{
-    volatile bool *run = ((bool *)arg);
-    static uint32_t frames_rx = 0, frames_tx = 0;
-
-    while (*run) {
-        frames_tx += gem.regs->frames_tx;
-        frames_rx += gem.regs->frames_rx;
-        printf("GEM tx_head %u, tx_tail %u, tx_count %u, tx_frames %u, rx_frames %u\n",
-               gem.tx_head, gem.tx_tail, gem.tx_count, frames_tx, frames_rx);
-        thread_sleep(1000);
-    }
-
-    return 0;
-}
-
-void gem_deinit(uintptr_t base)
-{
-    /* reset the gem peripheral */
-    uint32_t rst_mask;
-    if (base == GEM0_BASE) {
-        rst_mask = (1<<6) | (1<<4) | (1<<0);
-    } else {
-        rst_mask = (1<<7) | (1<<5) | (1<<1);
-    }
-    SLCR->GEM_RST_CTRL |= rst_mask;
-    spin(1);
-    SLCR->GEM_RST_CTRL &= ~rst_mask;
-
-
-    /* Clear Network control / status registers */
-    gem.regs->net_ctrl |= NET_CTRL_STATCLR;
-    gem.regs->rx_status = 0x0F;
-    gem.regs->tx_status = 0xFF;
-    /* Disable interrupts */
-    gem.regs->intr_dis  = 0x7FFFEFF;
-
-    /* Empty out the buffer queues */
-    gem.regs->rx_qbar = 0;
-    gem.regs->tx_qbar = 0;
-}
-
-status_t gem_init(uintptr_t gem_base)
-{
-    status_t ret;
-    uint32_t reg_val;
-    thread_t *rx_thread;
-    void *descs_vaddr;
-    paddr_t descs_paddr;
-
-    DEBUG_ASSERT(gem_base == GEM0_BASE || gem_base == GEM1_BASE);
-
-    /* Data structure init */
-    event_init(&gem.tx_complete, false, EVENT_FLAG_AUTOUNSIGNAL);
-    event_init(&gem.rx_pending, false, EVENT_FLAG_AUTOUNSIGNAL);
-    list_initialize(&gem.queued_pbufs);
-    list_initialize(&gem.tx_queue);
-
-    /* allocate a block of uncached contiguous memory for the peripheral descriptors */
-    if ((ret = vmm_alloc_contiguous(vmm_get_kernel_aspace(), "gem_desc",
-                                    sizeof(*gem.descs), &descs_vaddr, 0, 0, ARCH_MMU_FLAG_UNCACHED_DEVICE)) < 0) {
-        return ret;
-    }
-    descs_paddr = vaddr_to_paddr((void *)descs_vaddr);
-
-    /* tx/rx descriptor tables and memory mapped registers */
-    gem.descs = (void *)descs_vaddr;
-    gem.descs_phys = descs_paddr;
-    gem.regs = (struct gem_regs *)gem_base;
-
-    /* rx background thread */
-    rx_thread = thread_create("gem_rx", gem_rx_thread, NULL, HIGH_PRIORITY, DEFAULT_STACK_SIZE);
-    thread_resume(rx_thread);
-
-    /* Bring whatever existing configuration is up down so we can do it cleanly */
-    gem_deinit(gem_base);
-    gem_cfg_buffer_descs();
-
-    /* Self explanatory configuration for the gige */
-    reg_val  = NET_CFG_FULL_DUPLEX;
-    reg_val |= NET_CFG_GIGE_EN;
-    reg_val |= NET_CFG_SPEED_100;
-    reg_val |= NET_CFG_RX_CHKSUM_OFFLD_EN;
-    reg_val |= NET_CFG_FCS_REMOVE;
-    reg_val |= NET_CFG_MDC_CLK_DIV(0x7);
-    reg_val |= NET_CFG_RX_BUF_OFFSET(2);
-    gem.regs->net_cfg = reg_val;
-
-    /* Set DMA to 1600 byte rx buffer, 8KB addr space for rx, 4KB addr space for tx,
-     * hw checksumming, little endian, and use INCR16 ahb bursts
-     */
-    reg_val  = DMA_CFG_AHB_MEM_RX_BUF_SIZE(0x19);
-    reg_val |= DMA_CFG_RX_PKTBUF_MEMSZ_SEL(0x3);
-    reg_val |= DMA_CFG_TX_PKTBUF_MEMSZ_SEL;
-    reg_val |= DMA_CFG_CSUM_GEN_OFFLOAD_EN;
-    reg_val |= DMA_CFG_AHB_FIXED_BURST_LEN(0x10);
-    gem.regs->dma_cfg = reg_val;
-
-    /* Enable VREF from GPIOB */
-    SLCR_REG(GPIOB_CTRL) = 0x1;
-
-    ret = gem_phy_init();
-    if (!ret) {
-        printf("Phy not idle, aborting!\n");
-        return ret;
-    }
-
-    gem_cfg_ints();
-
-    reg_val  = NET_CTRL_MD_EN;
-    reg_val |= NET_CTRL_RX_EN;
-    reg_val |= NET_CTRL_TX_EN;
-    gem.regs->net_ctrl = reg_val;
-
-    return NO_ERROR;
-}
-
-void gem_disable(void)
-{
-    /* disable all the interrupts */
-    gem.regs->intr_en = 0;
-    mask_interrupt(ETH0_INT);
-
-    /* stop tx and rx */
-    gem.regs->net_ctrl = 0;
-}
-
-void gem_set_callback(gem_cb_t rx)
-{
-    gem.rx_callback = rx;
-}
-
-void gem_set_macaddr(uint8_t mac[6])
-{
-    uint32_t en = gem.regs->net_ctrl &= NET_CTRL_RX_EN | NET_CTRL_TX_EN;
-
-    if (en) {
-        gem.regs->net_ctrl &= ~(en);
-    }
-
-    /* _top register must be written after _bot register */
-    gem.regs->spec_addr1_bot = (mac[3] << 24) | (mac[2] << 16) | (mac[1] << 8) | mac[0];
-    gem.regs->spec_addr1_top = (mac[5] << 8) | mac[4];
-
-    if (en) {
-        gem.regs->net_ctrl |= en;
-    }
-}
-
-
-/* Debug console commands */
-static int cmd_gem(int argc, const cmd_args *argv)
-{
-    static uint32_t frames_rx = 0;
-    static uint32_t frames_tx = 0;
-    static bool run_stats = false;
-    thread_t *stat_thread;
-
-    if (argc == 1) {
-        printf("gem raw <iter> <length>: Send <iter> raw mac packet for testing\n");
-        printf("gem rx_debug:      toggle RX debug output\n");
-        printf("gem stats          toggle periodic output of driver stats\n");
-        printf("gem status:        print driver status\n");
-    } else if (strncmp(argv[1].str, "rx_debug", sizeof("rx_debug")) == 0) {
-        pktbuf_t *p;
-        int iter;
-        if (argc < 4) {
-            return 0;
-        }
-
-        if ((p = pktbuf_alloc()) == NULL) {
-            printf("out of buffers\n");
-        }
-
-        iter = argv[2].u;
-        p->dlen = argv[3].u;
-        while (iter--) {
-            memset(p->data, iter, 12);
-            gem_send_raw_pkt(p);
-        }
-    } else if (strncmp(argv[1].str, "status", sizeof("status")) == 0) {
-        uint32_t mac_top = gem.regs->spec_addr1_top;
-        uint32_t mac_bot = gem.regs->spec_addr1_bot;
-        printf("mac addr: %02x:%02x:%02x:%02x:%02x:%02x\n",
-               mac_top >> 8, mac_top & 0xFF, mac_bot >> 24, (mac_bot >> 16) & 0xFF,
-               (mac_bot >> 8) & 0xFF, mac_bot & 0xFF);
-        uint32_t rx_used = 0, tx_used = 0;
-        for (int i = 0; i < GEM_RX_DESC_CNT; i++) {
-            rx_used += !!(gem.descs->rx_tbl[i].addr & RX_DESC_USED);
-        }
-
-        for (int i = 0; i < GEM_TX_DESC_CNT; i++) {
-            tx_used += !!(gem.descs->tx_tbl[i].ctrl & TX_DESC_USED);
-        }
-
-        frames_tx += gem.regs->frames_tx;
-        frames_rx += gem.regs->frames_rx;
-        printf("rx usage: %u/%u, tx usage %u/%u\n",
-               rx_used, GEM_RX_DESC_CNT, tx_used, GEM_TX_DESC_CNT);
-        printf("frames rx: %u, frames tx: %u\n",
-               frames_rx, frames_tx);
-        printf("tx:\n");
-        for (size_t i = 0; i < GEM_TX_DESC_CNT; i++) {
-            uint32_t ctrl = gem.descs->tx_tbl[i].ctrl;
-            uint32_t addr = gem.descs->tx_tbl[i].addr;
-
-            printf("%3zu 0x%08X 0x%08X: len %u, %s%s%s %s%s\n",
-                   i, addr, ctrl, TX_BUF_LEN(ctrl),
-                   (ctrl & TX_DESC_USED) ? "driver " : "controller ",
-                   (ctrl & TX_DESC_WRAP) ? "wrap " : "",
-                   (ctrl & TX_LAST_BUF) ? "eof " : "",
-                   (i == gem.tx_head) ? "<-- HEAD " : "",
-                   (i == gem.tx_tail) ? "<-- TAIL " : "");
-        }
-
-    } else if (strncmp(argv[1].str, "stats", sizeof("stats")) == 0) {
-        run_stats = !run_stats;
-        if (run_stats) {
-            stat_thread = thread_create("gem_stat",
-                                        gem_stat_thread, &run_stats, LOW_PRIORITY, DEFAULT_STACK_SIZE);
-            thread_resume(stat_thread);
-        }
-    } else if (argv[1].str[0] == 'd') {
-        gem.debug_rx = !gem.debug_rx;
-    }
-
-    return 0;
-}
-
-STATIC_COMMAND_START
-STATIC_COMMAND("gem", "ZYNQ GEM commands", &cmd_gem)
-STATIC_COMMAND_END(gem);
diff --git a/platform/zynq/gpio.c b/platform/zynq/gpio.c
deleted file mode 100644
index a942f212..00000000
--- a/platform/zynq/gpio.c
+++ /dev/null
@@ -1,285 +0,0 @@
-/*
- * Copyright (c) 2012-2015 Travis Geiselbrecht
- * Copyright (c) 2015 Christopher Anderson
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <assert.h>
-#include <debug.h>
-#include <reg.h>
-#include <stdio.h>
-#include <string.h>
-#include <dev/gpio.h>
-#include <platform/gpio.h>
-#include <platform/interrupts.h>
-#include <target/gpioconfig.h>
-
-#define MAX_GPIO 128
-
-static inline uint16_t extract_bank(unsigned gpio_id) { return gpio_id / 32; }
-static inline uint16_t extract_bit (unsigned gpio_id) { return gpio_id % 32; }
-
-struct {
-    int_handler callback;
-    void *args;
-} irq_callbacks[MAX_GPIO];
-
-static enum handler_return gpio_int_handler(void *arg)
-{
-
-    /* The mask register uses 1 to respresent masked, 0 for unmasked. Comparing that
-     * register with the interrupt status register is the only way to determine
-     * which gpio triggered the interrupt in the gic. */
-    for (uint32_t bank = 0; bank < 4; bank++) {
-        uint32_t mask = *REG32(GPIO_INT_MASK(bank));
-        uint32_t stat = *REG32(GPIO_INT_STAT(bank));
-        uint32_t active = ~mask & stat;
-
-        if (active == 0) {
-            continue;
-        }
-
-        //printf("mask 0x%08x stat 0x%08x active 0x%08x\n", mask, stat, active);
-        while (active) {
-            /* Find the rightmost set bit, calculate the associated gpio, and call the callback */
-            uint16_t bit = 32 - clz(active) - 1;
-            uint16_t gpio = bit + (bank * 32);
-
-            active ^= (1 << bit);
-            if (irq_callbacks[gpio].callback) {
-                irq_callbacks[gpio].callback(irq_callbacks[gpio].args);
-            }
-            //printf("bit %u bank %u gpio %u was triggered\n", bit, bank, gpio);
-        }
-
-        *REG32(GPIO_INT_STAT(bank)) = stat;
-    }
-
-    return 0;
-}
-
-void zynq_unmask_gpio_interrupt(unsigned gpio)
-{
-    uint16_t bank = extract_bank(gpio);
-    uint16_t bit  = extract_bit(gpio);
-
-    RMWREG32(GPIO_INT_EN(bank), bit, 1, 1);
-    RMWREG32(GPIO_INT_STAT(bank), bit, 1, 1);
-}
-
-void zynq_mask_gpio_interrupt(unsigned gpio)
-{
-    uint16_t bank = extract_bank(gpio);
-    uint16_t bit  = extract_bit(gpio);
-
-    RMWREG32(GPIO_INT_DIS(bank), bit, 1, 1);
-}
-
-
-void zynq_gpio_init(void)
-{
-    register_int_handler(GPIO_INT, gpio_int_handler, NULL);
-    unmask_interrupt(GPIO_INT);
-
-    // Note(johngro):
-    //
-    // The Zynq 700 series documentation describes two bits which affect the
-    // input vs. output nature of the GPIOs (DIRM and OEN, or output enable).
-    // On the surface, the docs seem to indicate that they do the same thing,
-    // which is to enable or disable the output driver on the pin.  The docs
-    // make it clear that the input function is always enabled, regardless of
-    // the settings of either the DIRM or OEN bits (input state is readable via
-    // the DATA_RO registers).  Also, they state that the output drivers cannot
-    // be enabled if the TRISTATE bit is set on the pin in the SLCR unit.
-    //
-    // In practice, however, there seems to be a subtle, undocumented,
-    // difference between these bits (At least whent the GPIOs in question are
-    // MIOs, this behavior has not been verified on EMIOs).
-    //
-    // The OEN bit seems to do what you would want it to do (toggle the output
-    // drivers on and off).  The desired drive state of the pin (reflected in
-    // the DATA and MASK_DATA registers) holds the user setting regardless of
-    // the state of the OEN bit, and the state of the line can be read via the
-    // DATA_RO bit.
-    //
-    // When the DIRM bit is cleared, however, the state of the line seems to
-    // become latched into the desired drive state of the pin instead of holding
-    // its last programmed state.  For example; say the pin is being used to
-    // as a line in an open collector bus, such as i2c.  The output drivers
-    // are enabled (OEN and DIRM == 1), and the pin is being driven low (DATA ==
-    // 0).  When it comes time to release the line, if a user clears OEN, the
-    // driver will be disabled and the line will be pulled high by the external
-    // pullup.  DATA will still read 0 (the desired drive state of the pin) and
-    // DATA_RO will read 1 (the actual state of the line).  If, on the other
-    // hand, the user clears the DIRM bit instead of the OEN bit, the driver
-    // will be disabled and the line will be pulled high again, but this time
-    // DATA will latch the value of the line itself (DATA == 1, DATA_RO == 1).
-    //
-    // Because of this behvior, we NEVER use the DIRM bit to control the driver
-    // state of the pin.  During init, set all pins to input mode by first
-    // clearing the OEN bits, and then making sure that the DIRM bits are all
-    // set.
-    for (unsigned int bank = 0; bank < 4; bank++) {
-        *REG32(GPIO_OEN(bank))  = 0x00000000;
-        *REG32(GPIO_DIRM(bank)) = 0xFFFFFFFF;
-    }
-}
-
-void zynq_gpio_early_init(void)
-{
-}
-
-void register_gpio_int_handler(unsigned gpio, int_handler handler, void *args)
-{
-    DEBUG_ASSERT(gpio < MAX_GPIO);
-    DEBUG_ASSERT(handler);
-
-    irq_callbacks[gpio].callback = handler;
-    irq_callbacks[gpio].args = args;
-}
-
-void unregister_gpio_int_handler(unsigned gpio)
-{
-    DEBUG_ASSERT(gpio < MAX_GPIO);
-
-    irq_callbacks[gpio].callback = NULL;
-    irq_callbacks[gpio].args = NULL;
-}
-
-int gpio_config(unsigned gpio, unsigned flags)
-{
-    DEBUG_ASSERT(gpio < MAX_GPIO);
-
-    uint16_t bank = extract_bank(gpio);
-    uint16_t bit  = extract_bit(gpio);
-
-    /* MIO region, exclude EMIO. MIO needs to be configured before the GPIO block. */
-    if (bank < 2) {
-        // Preserve all of the fields of the current pin configuration, except
-        // for PULLUP and the MUX configurtaion.  Force the mux config to select
-        // GPIO mode, and turn the pullup on or off as requested by the user.
-        uint32_t mio_cfg = SLCR_REG(MIO_PIN_00 + (gpio * 4));
-        mio_cfg &= MIO_TRI_ENABLE |
-                   MIO_SPEED_FAST |
-                   MIO_IO_TYPE_MASK |
-                   MIO_DISABLE_RCVR;
-
-        // No need to set any bits in the L[0123]_SEL fields; we want them to
-        // all be zero.
-
-        if (flags & GPIO_PULLUP) {
-            mio_cfg |= MIO_PULLUP;
-        }
-
-        SLCR_REG(MIO_PIN_00 + (gpio * 4)) = mio_cfg;
-    }
-
-    if (flags & GPIO_OUTPUT || flags & GPIO_INPUT) {
-        if (flags & GPIO_OUTPUT && flags & GPIO_INPUT) {
-            printf("Cannot configure a gpio as both an input and output direction.\n");
-            return -1;
-        }
-
-        // Note(johngro): use only the OEN bit to control the output driver.  Do
-        // not use the DIRM bit; see the note in zynq_gpio_init.
-        RMWREG32(GPIO_OEN(bank), bit, 1, ((flags & GPIO_OUTPUT) > 0));
-    }
-
-    if (flags & GPIO_EDGE || flags & GPIO_LEVEL) {
-        if (flags & GPIO_EDGE && flags & GPIO_LEVEL) {
-            printf("Cannot configure a gpio as both edge and level sensitive.\n");
-            return -1;
-        }
-        RMWREG32(GPIO_INT_TYPE(bank), bit, 1, ((flags & GPIO_EDGE) > 0));
-    }
-
-    if (flags & GPIO_RISING || flags & GPIO_FALLING) {
-        /* Zynq has a specific INT_ANY register for handling interrupts that trigger on both
-         * rising and falling edges, but it specifically must only be used in edge mode */
-        if (flags & GPIO_RISING && flags & GPIO_FALLING) {
-            if ((flags & GPIO_EDGE) == 0) {
-                printf("polarity must be rising or falling if level sensitivity is used.\n");
-                return -1;
-            }
-
-            RMWREG32(GPIO_INT_ANY(bank), bit, 1, 1);
-        } else {
-            RMWREG32(GPIO_INT_POLARITY(bank), bit, 1, ((flags & GPIO_RISING) > 0));
-            RMWREG32(GPIO_INT_ANY(bank), bit, 1, 0);
-        }
-    }
-
-    return 0;
-}
-
-void gpio_set(unsigned gpio, unsigned on)
-{
-    DEBUG_ASSERT(gpio < MAX_GPIO);
-
-    uint16_t bank = extract_bank(gpio);
-    uint16_t bit  = extract_bit(gpio);
-    uintptr_t reg;
-
-    if (bit < 16) {
-        reg = GPIO_MASK_DATA_LSW(bank);
-    } else {
-        reg = GPIO_MASK_DATA_MSW(bank);
-        bit -= 16;
-    }
-
-    *REG32(reg) = (~(1 << bit) << 16) | (!!on << bit);
-}
-
-int gpio_get(unsigned gpio)
-{
-    DEBUG_ASSERT(gpio < MAX_GPIO);
-
-    uint16_t bank = extract_bank(gpio);
-    uint16_t bit  = extract_bit(gpio);
-
-    return ((*REG32(GPIO_DATA_RO(bank)) & (1 << bit)) > 0);
-}
-
-#include <lib/console.h>
-#ifdef WITH_LIB_CONSOLE
-static int cmd_zynq_gpio(int argc, const cmd_args *argv)
-{
-    for (unsigned int bank = 0; bank < 4; bank++) {
-        printf("DIRM_%u (0x%08x):           0x%08x\n", bank, GPIO_DIRM(bank), *REG32(GPIO_DIRM(bank)));
-        printf("OEN_%u (0x%08x):            0x%08x\n", bank, GPIO_OEN(bank), *REG32(GPIO_OEN(bank)));
-        printf("MASK_DATA_LSW_%u (0x%08x):  0x%08x\n", bank, GPIO_MASK_DATA_LSW(bank), *REG32(GPIO_MASK_DATA_LSW(bank)));
-        printf("MASK_DATA_MSW_%u (0x%08x):  0x%08x\n", bank, GPIO_MASK_DATA_MSW(bank), *REG32(GPIO_MASK_DATA_MSW(bank)));
-        printf("DATA_%u (0x%08x):           0x%08x\n", bank, GPIO_DATA(bank), *REG32(GPIO_DATA(bank)));
-        printf("DATA_RO_%u (0x%08x):        0x%08x\n", bank, GPIO_DATA_RO(bank), *REG32(GPIO_DATA_RO(bank)));
-        printf("INT_MASK_%u (0x%08x):       0x%08x\n", bank, GPIO_INT_MASK(bank), *REG32(GPIO_INT_MASK(bank)));
-        printf("INT_STAT_%u (0x%08x):       0x%08x\n", bank, GPIO_INT_STAT(bank), *REG32(GPIO_INT_STAT(bank)));
-        printf("INT_TYPE_%u (0x%08x):       0x%08x\n", bank, GPIO_INT_TYPE(bank), *REG32(GPIO_INT_TYPE(bank)));
-        printf("INT_POLARITY_%u (0x%08x):   0x%08x\n", bank, GPIO_INT_POLARITY(bank), *REG32(GPIO_INT_POLARITY(bank)));
-        printf("INT_ANY_%u (0x%08x):        0x%08x\n", bank, GPIO_INT_ANY(bank), *REG32(GPIO_INT_ANY(bank)));
-    }
-    return 0;
-}
-STATIC_COMMAND_START
-#if LK_DEBUGLEVEL > 1
-STATIC_COMMAND("zynq_gpio", "Dump Zynq GPIO registers", &cmd_zynq_gpio)
-#endif
-STATIC_COMMAND_END(zynq_gpio);
-
-#endif
diff --git a/platform/zynq/include/dev/cache/pl310_config.h b/platform/zynq/include/dev/cache/pl310_config.h
deleted file mode 100644
index 124d6c5a..00000000
--- a/platform/zynq/include/dev/cache/pl310_config.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <platform/zynq.h>
-
-/* configuration for the PL310 L2 cache controller */
-#define PL310_BASE L2CACHE_BASE
-#define PL310_TAG_RAM_LATENCY ((1 << 8) | (1 << 4) | (1 << 0))
-#define PL310_DATA_RAM_LATENCY ((1 << 8) | (2 << 4) | (1 << 0))
-
diff --git a/platform/zynq/include/dev/qspi.h b/platform/zynq/include/dev/qspi.h
deleted file mode 100644
index 61c24877..00000000
--- a/platform/zynq/include/dev/qspi.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <stdint.h>
-#include <stdbool.h>
-
-/* a highly Zynq specific qspi interface */
-
-struct qspi_ctxt {
-    uint32_t cfg;
-    uint32_t khz;
-    bool linear_mode;
-};
-
-int qspi_set_speed(struct qspi_ctxt *qspi, uint32_t khz);
-int qspi_init(struct qspi_ctxt *qspi, uint32_t khz);
-int qspi_enable_linear(struct qspi_ctxt *qspi);
-int qspi_disable_linear(struct qspi_ctxt *qspi);
-void qspi_rd(struct qspi_ctxt *qspi, uint32_t cmd, uint32_t asize, uint32_t *data, uint32_t count);
-void qspi_wr(struct qspi_ctxt *qspi, uint32_t cmd, uint32_t asize, uint32_t *data, uint32_t count);
-void qspi_wr1(struct qspi_ctxt *qspi, uint32_t cmd);
-void qspi_wr2(struct qspi_ctxt *qspi, uint32_t cmd);
-void qspi_wr3(struct qspi_ctxt *qspi, uint32_t cmd);
-uint32_t qspi_rd1(struct qspi_ctxt *qspi, uint32_t cmd);
-
-/* set 0 for chip select */
-void qspi_cs(struct qspi_ctxt *qspi, unsigned int cs);
-
diff --git a/platform/zynq/include/dev/spiflash.h b/platform/zynq/include/dev/spiflash.h
deleted file mode 100644
index 270702bb..00000000
--- a/platform/zynq/include/dev/spiflash.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <sys/types.h>
-
-status_t spiflash_detect(void);
diff --git a/platform/zynq/include/platform/fpga.h b/platform/zynq/include/platform/fpga.h
deleted file mode 100644
index de2d7dc4..00000000
--- a/platform/zynq/include/platform/fpga.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Copyright (c) 2014 Brian Swetland
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <sys/types.h>
-#include <stdbool.h>
-
-status_t zynq_program_fpga(paddr_t physaddr, size_t length);
-bool zync_fpga_config_done(void);
-void zynq_reset_fpga(void);
-
diff --git a/platform/zynq/include/platform/gem.h b/platform/zynq/include/platform/gem.h
deleted file mode 100644
index 6f4d9d5b..00000000
--- a/platform/zynq/include/platform/gem.h
+++ /dev/null
@@ -1,236 +0,0 @@
-#pragma   once
-#include  <platform/zynq.h>
-
-struct pktbuf;
-
-typedef void (*gem_cb_t)(struct pktbuf *p);
-status_t gem_init(uintptr_t regsbase);
-void gem_set_callback(gem_cb_t rx);
-void gem_set_macaddr(uint8_t mac[6]);
-int gem_send_raw_pkt(struct pktbuf *p);
-
-void gem_disable(void);
-
-struct gem_regs {
-    uint32_t net_ctrl;
-    uint32_t net_cfg;
-    uint32_t net_status;
-    uint32_t ___reserved1;
-    uint32_t dma_cfg;
-    uint32_t tx_status;
-    uint32_t rx_qbar;
-    uint32_t tx_qbar;
-    uint32_t rx_status;
-    uint32_t intr_status;
-    uint32_t intr_en;
-    uint32_t intr_dis;
-    uint32_t intr_mask;
-    uint32_t phy_maint;
-    uint32_t rx_pauseq;
-    uint32_t tx_pauseq;
-    uint32_t ___reserved2[16];
-    uint32_t hash_bot;
-    uint32_t hash_top;
-    uint32_t spec_addr1_bot;
-    uint32_t spec_addr1_top;
-    uint32_t spec_addr2_bot;
-    uint32_t spec_addr2_top;
-    uint32_t spec_addr3_bot;
-    uint32_t spec_addr3_top;
-    uint32_t spec_addr4_bot;
-    uint32_t spec_addr4_top;
-    uint32_t type_id_match1;
-    uint32_t type_id_match2;
-    uint32_t type_id_match3;
-    uint32_t type_id_match4;
-    uint32_t wake_on_lan;
-    uint32_t ipg_stretch;
-    uint32_t stacked_vlan;
-    uint32_t tx_pfc_pause;
-    uint32_t spec_addr1_mask_bot;
-    uint32_t spec_addr1_mask_top;
-    uint32_t ___reserved3[11];
-    uint32_t module_id;
-    uint32_t octets_tx_bot;
-    uint32_t octets_tx_top;
-    uint32_t frames_tx;
-    uint32_t broadcast_frames_tx;
-    uint32_t multi_frames_tx;
-    uint32_t pause_frames_tx;
-    uint32_t frames_64b_tx;
-    uint32_t frames_65to127b_tx;
-    uint32_t frames_128to255b_tx;
-    uint32_t frames_256to511b_tx;
-    uint32_t frames_512to1023b_tx;
-    uint32_t frames_1024to1518b_tx;
-    uint32_t ___reserved4;
-    uint32_t tx_under_runs;
-    uint32_t single_collisn_frames;
-    uint32_t multi_collisn_frames;
-    uint32_t excessive_collisns;
-    uint32_t late_collisns;
-    uint32_t deferred_tx_frames;
-    uint32_t carrier_sense_errs;
-    uint32_t octets_rx_bot;
-    uint32_t octets_rx_top;
-    uint32_t frames_rx;
-    uint32_t bdcast_fames_rx;
-    uint32_t multi_frames_rx;
-    uint32_t pause_rx;
-    uint32_t frames_64b_rx;
-    uint32_t frames_65to127b_rx;
-    uint32_t frames_128to255b_rx;
-    uint32_t frames_256to511b_rx;
-    uint32_t frames_512to1023b_rx;
-    uint32_t frames_1024to1518b_rx;
-    uint32_t ___reserved5;
-    uint32_t undersz_rx;
-    uint32_t oversz_rx;
-    uint32_t jab_rx;
-    uint32_t fcs_errors;
-    uint32_t length_field_errors;
-    uint32_t rx_symbol_errors;
-    uint32_t align_errors;
-    uint32_t rx_resource_errors;
-    uint32_t rx_overrun_errors;
-    uint32_t ip_hdr_csum_errors;
-    uint32_t tcp_csum_errors;
-    uint32_t udp_csum_errors;
-    uint32_t ___reserved6[7];
-    uint32_t timer_strobe_s;
-    uint32_t timer_strobe_ns;
-    uint32_t timer_s;
-    uint32_t timer_ns;
-    uint32_t timer_adjust;
-    uint32_t timer_incr;
-    uint32_t ptp_tx_s;
-    uint32_t ptp_tx_ns;
-    uint32_t ptp_rx_s;
-    uint32_t ptp_rx_ns;
-    uint32_t ptp_peer_tx_s;
-    uint32_t ptp_peer_tx_ns;
-    uint32_t ptp_peer_rx_s;
-    uint32_t ptp_peer_rx_ns;
-    uint32_t ___reserved7[22];
-    uint32_t design_cfg2;
-    uint32_t design_cfg3;
-    uint32_t design_cfg4;
-    uint32_t design_cfg5;
-};
-
-/*      net_ctrl                             */
-#define NET_CTRL_LOOP_EN                     (1 <<  1)
-#define NET_CTRL_RX_EN                       (1 <<  2)
-#define NET_CTRL_TX_EN                       (1 <<  3)
-#define NET_CTRL_MD_EN                       (1 <<  4)
-#define NET_CTRL_STATCLR                     (1 <<  5)
-#define NET_CTRL_STATINC                     (1 <<  6)
-#define NET_CTRL_STATW_EN                    (1 <<  7)
-#define NET_CTRL_BACK_PRESSURE               (1 <<  8)
-#define NET_CTRL_START_TX                    (1 <<  9)
-#define NET_CTRL_HALT_TX                     (1 <<  10)
-#define NET_CTRL_PAUSE_TX                    (1 <<  11)
-#define NET_CTRL_ZERO_PAUSE_TX               (1 <<  12)
-#define NET_CTRL_STR_RX_TIMESTAMP            (1 <<  15)
-#define NET_CTRL_EN_PFC_PRI_PAUSE_RX         (1 <<  16)
-#define NET_CTRL_TX_PFC_PRI_PAUSE_FRAME      (1 <<  17)
-#define NET_CTRL_FLUSH_NEXT_RX_DPRAM_PKT     (1 <<  18)
-/*      net_cfg                              */
-#define NET_CFG_SPEED_100                    (1)
-#define NET_CFG_FULL_DUPLEX                  (1 <<  1)
-#define NET_CFG_DISC_NON_VLAN                (1 <<  2)
-#define NET_CFG_COPY_ALL                     (1 <<  4)
-#define NET_CFG_NO_BCAST                     (1 <<  5)
-#define NET_CFG_MULTI_HASH_EN                (1 <<  6)
-#define NET_CFG_UNI_HASH_EN                  (1 <<  7)
-#define NET_CFG_RX_1536_BYTE                 (1 <<  8)
-#define NET_CFG_EXT_ADDR_MATCH_EN            (1 <<  9)
-#define NET_CFG_GIGE_EN                      (1 <<  10)
-#define NET_CFG_PCS_SEL                      (1 <<  11)
-#define NET_CFG_RETRY_TEST                   (1 <<  12)
-#define NET_CFG_PAUSE_EN                     (1 <<  13)
-#define NET_CFG_RX_BUF_OFFSET(x)             (x <<  14)
-#define NET_CFG_LEN_ERR_FRAME_DISC           (1 <<  16)
-#define NET_CFG_FCS_REMOVE                   (1 <<  17)
-#define NET_CFG_MDC_CLK_DIV(x)               (x <<  18)
-#define NET_CFG_DBUS_WIDTH(x)                (x <<  21)
-#define NET_CFG_DIS_CP_PAUSE_FRAME           (1 <<  23)
-#define NET_CFG_RX_CHKSUM_OFFLD_EN           (1 <<  24)
-#define NET_CFG_RX_HD_WHILE_TX               (1 <<  25)
-#define NET_CFG_IGNORE_RX_FCS                (1 <<  26)
-#define NET_CFG_SGMII_EN                     (1 <<  27)
-#define NET_CFG_IPG_STRETCH_EN               (1 <<  28)
-#define NET_CFG_RX_BAD_PREAMBLE              (1 <<  29)
-#define NET_CFG_IGNORE_IPG_RX_ER             (1 <<  30)
-#define NET_CFG_UNIDIR_EN                    (1 <<  31)
-/*      net_status                           */
-#define NET_STATUS_PFC_PRI_PAUSE_NEG         (1 <<  6)
-#define NET_STATUS_PCS_AUTONEG_PAUSE_TX_RES  (1 <<  5)
-#define NET_STATUS_PCS_AUTONEG_PAUSE_RX_RES  (1 <<  4)
-#define NET_STATUS_PCS_AUTONEG_DUP_RES       (1 <<  3)
-#define NET_STATUS_PHY_MGMT_IDLE             (1 <<  2)
-#define NET_STATUS_MDIO_IN_PIN_STATUS        (1 <<  1)
-#define NET_STATUS_PCS_LINK_STATE            (1 <<  0)
-/*      dma_cfg                              */
-#define DMA_CFG_AHB_FIXED_BURST_LEN(x)       (x)
-#define DMA_CFG_AHB_ENDIAN_SWP_MGM           (1 <<  6)
-#define DMA_CFG_AHB_ENDIAN_SWP_PKT_EN        (1 <<  7)
-#define DMA_CFG_RX_PKTBUF_MEMSZ_SEL(x)       (x <<  8)
-#define DMA_CFG_TX_PKTBUF_MEMSZ_SEL          (1 <<  10)
-#define DMA_CFG_CSUM_GEN_OFFLOAD_EN          (1 <<  11)
-#define DMA_CFG_AHB_MEM_RX_BUF_SIZE(x)       (x <<  16)
-#define DMA_CFG_DISC_WHEN_NO_AHB             (1 <<  24)
-
-/* tx descriptor */
-#define TX_BUF_LEN(x)                        (x & 0x3FFF)
-#define TX_LAST_BUF                          (1 << 15)
-#define TX_CHKSUM_GEN_ERR(x)                 ((x >> 20) & 0x7)
-#define TX_NO_CRC                            (1 << 16)
-#define TX_LATE_COLLISION                    (1 << 26)
-#define TX_RETRY_EXCEEDED                    (1 << 29)
-#define TX_DESC_WRAP                         (1 << 30)
-#define TX_DESC_USED                         (1 << 31)
-
-/* rx descriptor */
-#define RX_DESC_USED                         (1 << 0)
-#define RX_DESC_WRAP                         (1 << 1)
-#define RX_BUF_LEN(x)                        (x & 0x1FFF)
-#define RX_FCS_BAD_FCS                       (1 << 13)
-#define RX_START_OF_FRAME                    (1 << 14)
-#define RX_END_OF_FRAME                      (1 << 15)
-#define RX_CFI                               (1 << 16)
-#define RX_VLAN_PRIO(x)                      ((x >> 17) & 0x7)
-#define RX_PRIO_TAG                          (1 << 20)
-#define RX_VLAN_DETECT                       (1 << 21)
-#define RX_CHKSUM_MATCH(x)                   ((1 >> 22) & 0x3)
-#define RX_SNAP_ENCODED                      (1 << 24)
-#define RX_ADDR_REG_MATCH(x)                 ((1 >> 25) & 0x3)
-#define RX_SPECIFIC_ADDR_MATCH               (1 << 27)
-#define RX_EXT_MATCH                         (1 << 28)
-#define RX_UNICAST_MATCH                     (1 << 30)
-#define RX_MULTICAST_MATCH                   (1 << 31)
-
-#define INTR_MGMT_SENT                       (1 << 0)
-#define INTR_RX_COMPLETE                     (1 << 1)
-#define INTR_RX_USED_READ                    (1 << 2)
-#define INTR_TX_USED_READ                    (1 << 3)
-#define INTR_RETRY_EX                        (1 << 5)
-#define INTR_TX_CORRUPT                      (1 << 6)
-#define INTR_TX_COMPLETE                     (1 << 7)
-#define INTR_RX_OVERRUN                      (1 << 10)
-#define INTR_HRESP_NOT_OK                    (1 << 11)
-
-#define TX_STATUS_USED_READ                  (1)
-#define TX_STATUS_COLLISION                  (1 << 1)
-#define TX_STATUS_RETRY_LIMIT                (1 << 2)
-#define TX_STATUS_GO                         (1 << 3)
-#define TX_STATUS_CORR_AHB                   (1 << 4)
-#define TX_STATUS_COMPLETE                   (1 << 5)
-#define TX_STATUS_UNDER_RUN                  (1 << 6)
-#define TX_STATUS_LATE_COLLISION             (1 << 7)
-#define TX_STATUS_HRESP_NOT_OK               (1 << 8)
-
-#define RX_STATUS_BUFFER_NOT_AVAIL           (1)
-#define RX_STATUS_FRAME_RECD                 (1 << 1)
-#define RX_STATUS_RX_OVERRUN                 (1 << 2)
-#define RX_STATUS_HRESP_NOT_OK               (1 << 3)
diff --git a/platform/zynq/include/platform/gic.h b/platform/zynq/include/platform/gic.h
deleted file mode 100644
index bacf7b81..00000000
--- a/platform/zynq/include/platform/gic.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_GIC_H
-#define __PLATFORM_GIC_H
-
-#include <platform/zynq.h>
-
-#define GICBASE(n)  (CPUPRIV_BASE)
-#define GICC_OFFSET (0x0100)
-#define GICD_OFFSET (0x1000)
-
-#endif
diff --git a/platform/zynq/include/platform/gpio.h b/platform/zynq/include/platform/gpio.h
deleted file mode 100644
index f962f3ea..00000000
--- a/platform/zynq/include/platform/gpio.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Copyright (c) 2015 Christopher Anderson
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <platform/interrupts.h>
-#include <platform/zynq.h>
-
-/* GPIO registers are not indexed in a particularly convenient manner, but can be calculated
- * via the GPIO bank */
-
-#define GPIO_MASK_DATA_BASE         (GPIO_BASE + 0x0)
-#define GPIO_MASK_DATA_LSW(bank)    (GPIO_MASK_DATA_BASE + (8 * bank))
-#define GPIO_MASK_DATA_MSW(bank)    (GPIO_MASK_DATA_BASE + 4 + (8 * bank))
-
-#define GPIO_DATA_BASE              (GPIO_BASE + 0x40)
-#define GPIO_DATA(bank)             (GPIO_DATA_BASE + (4 * bank))
-
-#define GPIO_DATA_RO_BASE           (GPIO_BASE + 0x60)
-#define GPIO_DATA_RO(bank)          (GPIO_DATA_RO_BASE + (4 * bank))
-
-#define GPIO_REGS(bank)             (GPIO_BASE + 0x204 + (0x40 * bank))
-#define GPIO_DIRM(bank)             (GPIO_REGS(bank) + 0x0)
-#define GPIO_OEN(bank)              (GPIO_REGS(bank) + 0x4)
-#define GPIO_INT_MASK(bank)         (GPIO_REGS(bank) + 0x8)
-#define GPIO_INT_EN(bank)           (GPIO_REGS(bank) + 0xC)
-#define GPIO_INT_DIS(bank)          (GPIO_REGS(bank) + 0x10)
-#define GPIO_INT_STAT(bank)         (GPIO_REGS(bank) + 0x14)
-#define GPIO_INT_TYPE(bank)         (GPIO_REGS(bank) + 0x18)
-#define GPIO_INT_POLARITY(bank)     (GPIO_REGS(bank) + 0x1C)
-#define GPIO_INT_ANY(bank)          (GPIO_REGS(bank) + 0x20)
-
-void zynq_unmask_gpio_interrupt(unsigned gpio);
-void zynq_mask_gpio_interrupt(unsigned gpio);
-void zynq_gpio_init(void);
-void zynq_gpio_early_init(void);
-void register_gpio_int_handler(unsigned gpio, int_handler handler, void *args);
-void unregister_gpio_int_handler(unsigned gpio);
diff --git a/platform/zynq/include/platform/zynq.h b/platform/zynq/include/platform/zynq.h
deleted file mode 100644
index bd434333..00000000
--- a/platform/zynq/include/platform/zynq.h
+++ /dev/null
@@ -1,589 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#define ZYNQ_MIO_CNT    54
-
-/* memory addresses */
-/* assumes sram is mapped at 0 the first MB of sdram is covered by it */
-#define SDRAM_BASE          (0x00100000)
-#define SDRAM_APERTURE_SIZE (0x3ff00000)
-#define SRAM_BASE           (0x0)
-#define SRAM_BASE_HIGH      (0xfffc0000)
-#define SRAM_APERTURE_SIZE  (0x00040000)
-#define SRAM_SIZE           (0x00040000)
-
-/* hardware base addresses */
-#define UART0_BASE (0xe0000000)
-#define UART1_BASE (0xe0001000)
-#define USB0_BASE  (0xe0002000)
-#define USB1_BASE  (0xe0003000)
-#define I2C0_BASE  (0xe0004000)
-#define I2C1_BASE  (0xe0005000)
-#define SPI0_BASE  (0xe0006000)
-#define SPI1_BASE  (0xe0007000)
-#define CAN0_BASE  (0xe0008000)
-#define CAN1_BASE  (0xe0009000)
-#define GPIO_BASE  (0xe000a000)
-#define GEM0_BASE  (0xe000b000) // gigabit eth controller
-#define GEM1_BASE  (0xe000c000) // ""
-#define QSPI_BASE  (0xe000d000)
-#define SMCC_BASE  (0xe000e000) // PL353 shared memory controller
-
-#define SD0_BASE   (0xe0100000)
-#define SD1_BASE   (0xe0101000)
-
-#define SLCR_BASE  (0xf8000000)
-#define TTC0_BASE  (0xf8001000)
-#define TTC1_BASE  (0xf8002000)
-#define DMAC0_NS_BASE (0xf8004000)
-#define DMAC0_S_BASE (0xf8003000)
-#define SWDT_BASE  (0xf8005000)
-
-#define CPUPRIV_BASE      (0xf8f00000)
-#define SCU_CONTROL_BASE  (CPUPRIV_BASE + 0x0000)
-#define GIC_PROC_BASE     (CPUPRIV_BASE + 0x0100)
-#define GLOBAL_TIMER_BASE (CPUPRIV_BASE + 0x0200)
-#define PRIV_TIMER_BASE   (CPUPRIV_BASE + 0x0600)
-#define GIC_DISTRIB_BASE  (CPUPRIV_BASE + 0x1000)
-#define L2CACHE_BASE      (CPUPRIV_BASE + 0x2000)
-
-#define QSPI_LINEAR_BASE  (0xfc000000)
-
-/* interrupts */
-#define TTC0_A_INT    42
-#define TTC0_B_INT    43
-#define TTC0_C_INT    44
-#define GPIO_INT      52
-#define USB0_INT      53
-#define ETH0_INT      54
-#define ETH0_WAKE_INT 55
-#define SDIO0_INT     56
-#define I2C0_INT      57
-#define SPI0_INT      58
-#define UART0_INT     59
-#define UART1_INT     82
-#define TTC1_A_INT    69
-#define TTC2_B_INT    70
-#define TTC3_C_INT    71
-#define ETH1_INT      77
-#define ETH1_WAKE_INT 78
-
-/* Perhipheral IRQs from fabric */
-#define F2P0_IRQ      61
-#define F2P1_IRQ      62
-#define F2P2_IRQ      63
-#define F2P3_IRQ      64
-#define F2P4_IRQ      65
-#define F2P5_IRQ      66
-#define F2P6_IRQ      67
-#define F2P7_IRQ      68
-
-#define F2P8_IRQ      84
-#define F2P9_IRQ      85
-#define F2P10_IRQ     86
-#define F2P11_IRQ     87
-#define F2P12_IRQ     88
-#define F2P13_IRQ     89
-#define F2P14_IRQ     90
-#define F2P15_IRQ     91
-
-#define MAX_INT       96
-
-#ifndef ASSEMBLY
-
-#include <reg.h>
-#include <compiler.h>
-#include <bits.h>
-#include <stdbool.h>
-#include <sys/types.h>
-
-/* Configuration values for each of the system PLLs. Refer to the TRM 25.10.4 */
-typedef struct {
-    uint32_t lock_cnt;
-    uint32_t cp;
-    uint32_t res;
-    uint32_t fdiv;
-} zynq_pll_cfg_t;
-
-typedef struct {
-    uint32_t arm_clk;
-    uint32_t ddr_clk;
-    uint32_t dci_clk;
-    uint32_t gem0_clk;
-    uint32_t gem0_rclk;
-    uint32_t gem1_clk;
-    uint32_t gem1_rclk;
-    uint32_t smc_clk;
-    uint32_t lqspi_clk;
-    uint32_t sdio_clk;
-    uint32_t uart_clk;
-    uint32_t spi_clk;
-    uint32_t can_clk;
-    uint32_t can_mioclk;
-    uint32_t usb0_clk;
-    uint32_t usb1_clk;
-    uint32_t pcap_clk;
-    uint32_t fpga0_clk;
-    uint32_t fpga1_clk;
-    uint32_t fpga2_clk;
-    uint32_t fpga3_clk;
-    uint32_t aper_clk;
-    uint32_t clk_621_true;
-} zynq_clk_cfg_t;
-
-typedef struct {
-    zynq_pll_cfg_t arm;
-    zynq_pll_cfg_t ddr;
-    zynq_pll_cfg_t io;
-} zynq_pll_cfg_tree_t;
-
-/* Configuration for the DDR controller and buffers. TRM Ch 10 */
-typedef struct {
-    uint32_t addr0;
-    uint32_t addr1;
-    uint32_t data0;
-    uint32_t data1;
-    uint32_t diff0;
-    uint32_t diff1;
-    bool ibuf_disable;
-    bool term_disable;
-} zynq_ddriob_cfg_t;;
-
-/* SLCR registers */
-struct slcr_regs {
-    uint32_t SCL;                             // Secure Configuration Lock
-    uint32_t SLCR_LOCK;                       // SLCR Write Protection Lock
-    uint32_t SLCR_UNLOCK;                     // SLCR Write Protection Unlock
-    uint32_t SLCR_LOCKSTA;                    // SLCR Write Protection Status
-    uint32_t ___reserved0[60];
-    uint32_t ARM_PLL_CTRL;                    // ARM PLL Control
-    uint32_t DDR_PLL_CTRL;                    // DDR PLL Control
-    uint32_t IO_PLL_CTRL;                     // IO PLL Control
-    uint32_t PLL_STATUS;                      // PLL Status
-    uint32_t ARM_PLL_CFG;                     // ARM PLL Configuration
-    uint32_t DDR_PLL_CFG;                     // DDR PLL Configuration
-    uint32_t IO_PLL_CFG;                      // IO PLL Configuration
-    uint32_t ___reserved1[1];
-    uint32_t ARM_CLK_CTRL;                    // CPU Clock Control
-    uint32_t DDR_CLK_CTRL;                    // DDR Clock Control
-    uint32_t DCI_CLK_CTRL;                    // DCI clock control
-    uint32_t APER_CLK_CTRL;                   // AMBA Peripheral Clock Control
-    uint32_t USB0_CLK_CTRL;                   // USB 0 ULPI Clock Control
-    uint32_t USB1_CLK_CTRL;                   // USB 1 ULPI Clock Control
-    uint32_t GEM0_RCLK_CTRL;                  // GigE 0 Rx Clock and Rx Signals Select
-    uint32_t GEM1_RCLK_CTRL;                  // GigE 1 Rx Clock and Rx Signals Select
-    uint32_t GEM0_CLK_CTRL;                   // GigE 0 Ref Clock Control
-    uint32_t GEM1_CLK_CTRL;                   // GigE 1 Ref Clock Control
-    uint32_t SMC_CLK_CTRL;                    // SMC Ref Clock Control
-    uint32_t LQSPI_CLK_CTRL;                  // Quad SPI Ref Clock Control
-    uint32_t SDIO_CLK_CTRL;                   // SDIO Ref Clock Control
-    uint32_t UART_CLK_CTRL;                   // UART Ref Clock Control
-    uint32_t SPI_CLK_CTRL;                    // SPI Ref Clock Control
-    uint32_t CAN_CLK_CTRL;                    // CAN Ref Clock Control
-    uint32_t CAN_MIOCLK_CTRL;                 // CAN MIO Clock Control
-    uint32_t DBG_CLK_CTRL;                    // SoC Debug Clock Control
-    uint32_t PCAP_CLK_CTRL;                   // PCAP Clock Control
-    uint32_t TOPSW_CLK_CTRL;                  // Central Interconnect Clock Control
-    uint32_t FPGA0_CLK_CTRL;                  // PL Clock 0 Output control
-    uint32_t FPGA0_THR_CTRL;                  // PL Clock 0 Throttle control
-    uint32_t FPGA0_THR_CNT;                   // PL Clock 0 Throttle Count control
-    uint32_t FPGA0_THR_STA;                   // PL Clock 0 Throttle Status read
-    uint32_t FPGA1_CLK_CTRL;                  // PL Clock 1 Output control
-    uint32_t FPGA1_THR_CTRL;                  // PL Clock 1 Throttle control
-    uint32_t FPGA1_THR_CNT;                   // PL Clock 1 Throttle Count
-    uint32_t FPGA1_THR_STA;                   // PL Clock 1 Throttle Status control
-    uint32_t FPGA2_CLK_CTRL;                  // PL Clock 2 output control
-    uint32_t FPGA2_THR_CTRL;                  // PL Clock 2 Throttle Control
-    uint32_t FPGA2_THR_CNT;                   // PL Clock 2 Throttle Count
-    uint32_t FPGA2_THR_STA;                   // PL Clock 2 Throttle Status
-    uint32_t FPGA3_CLK_CTRL;                  // PL Clock 3 output control
-    uint32_t FPGA3_THR_CTRL;                  // PL Clock 3 Throttle Control
-    uint32_t FPGA3_THR_CNT;                   // PL Clock 3 Throttle Count
-    uint32_t FPGA3_THR_STA;                   // PL Clock 3 Throttle Status
-    uint32_t ___reserved2[5];
-    uint32_t CLK_621_TRUE;                    // CPU Clock Ratio Mode select
-    uint32_t ___reserved3[14];
-    uint32_t PSS_RST_CTRL;                    // PS Software Reset Control
-    uint32_t DDR_RST_CTRL;                    // DDR Software Reset Control
-    uint32_t TOPSW_RST_CTRL;                  // Central Interconnect Reset Control
-    uint32_t DMAC_RST_CTRL;                   // DMAC Software Reset Control
-    uint32_t USB_RST_CTRL;                    // USB Software Reset Control
-    uint32_t GEM_RST_CTRL;                    // Gigabit Ethernet SW Reset Control
-    uint32_t SDIO_RST_CTRL;                   // SDIO Software Reset Control
-    uint32_t SPI_RST_CTRL;                    // SPI Software Reset Control
-    uint32_t CAN_RST_CTRL;                    // CAN Software Reset Control
-    uint32_t I2C_RST_CTRL;                    // I2C Software Reset Control
-    uint32_t UART_RST_CTRL;                   // UART Software Reset Control
-    uint32_t GPIO_RST_CTRL;                   // GPIO Software Reset Control
-    uint32_t LQSPI_RST_CTRL;                  // Quad SPI Software Reset Control
-    uint32_t SMC_RST_CTRL;                    // SMC Software Reset Control
-    uint32_t OCM_RST_CTRL;                    // OCM Software Reset Control
-    uint32_t ___reserved4[1];
-    uint32_t FPGA_RST_CTRL;                   // FPGA Software Reset Control
-    uint32_t A9_CPU_RST_CTRL;                 // CPU Reset and Clock control
-    uint32_t ___reserved5[1];
-    uint32_t RS_AWDT_CTRL;                    // Watchdog Timer Reset Control
-    uint32_t ___reserved6[2];
-    uint32_t REBOOT_STATUS;                   // Reboot Status, persistent
-    uint32_t BOOT_MODE;                       // Boot Mode Strapping Pins
-    uint32_t ___reserved7[40];
-    uint32_t APU_CTRL;                        // APU Control
-    uint32_t WDT_CLK_SEL;                     // SWDT clock source select
-    uint32_t ___reserved8[78];
-    uint32_t TZ_DMA_NS;                       // DMAC TrustZone Config
-    uint32_t TZ_DMA_IRQ_NS;                   // DMAC TrustZone Config for Interrupts
-    uint32_t TZ_DMA_PERIPH_NS;                // DMAC TrustZone Config for Peripherals
-    uint32_t ___reserved9[57];
-    uint32_t PSS_IDCODE;                      // PS IDCODE
-    uint32_t ___reserved10[51];
-    uint32_t DDR_URGENT;                      // DDR Urgent Control
-    uint32_t ___reserved11[2];
-    uint32_t DDR_CAL_START;                   // DDR Calibration Start Triggers
-    uint32_t ___reserved12[1];
-    uint32_t DDR_REF_START;                   // DDR Refresh Start Triggers
-    uint32_t DDR_CMD_STA;                     // DDR Command Store Status
-    uint32_t DDR_URGENT_SEL;                  // DDR Urgent Select
-    uint32_t DDR_DFI_STATUS;                  // DDR DFI status
-    uint32_t ___reserved13[55];
-    uint32_t MIO_PIN_00;                      // MIO Pin 0 Control
-    uint32_t MIO_PIN_01;                      // MIO Pin 1 Control
-    uint32_t MIO_PIN_02;                      // MIO Pin 2 Control
-    uint32_t MIO_PIN_03;                      // MIO Pin 3 Control
-    uint32_t MIO_PIN_04;                      // MIO Pin 4 Control
-    uint32_t MIO_PIN_05;                      // MIO Pin 5 Control
-    uint32_t MIO_PIN_06;                      // MIO Pin 6 Control
-    uint32_t MIO_PIN_07;                      // MIO Pin 7 Control
-    uint32_t MIO_PIN_08;                      // MIO Pin 8 Control
-    uint32_t MIO_PIN_09;                      // MIO Pin 9 Control
-    uint32_t MIO_PIN_10;                      // MIO Pin 10 Control
-    uint32_t MIO_PIN_11;                      // MIO Pin 11 Control
-    uint32_t MIO_PIN_12;                      // MIO Pin 12 Control
-    uint32_t MIO_PIN_13;                      // MIO Pin 13 Control
-    uint32_t MIO_PIN_14;                      // MIO Pin 14 Control
-    uint32_t MIO_PIN_15;                      // MIO Pin 15 Control
-    uint32_t MIO_PIN_16;                      // MIO Pin 16 Control
-    uint32_t MIO_PIN_17;                      // MIO Pin 17 Control
-    uint32_t MIO_PIN_18;                      // MIO Pin 18 Control
-    uint32_t MIO_PIN_19;                      // MIO Pin 19 Control
-    uint32_t MIO_PIN_20;                      // MIO Pin 20 Control
-    uint32_t MIO_PIN_21;                      // MIO Pin 21 Control
-    uint32_t MIO_PIN_22;                      // MIO Pin 22 Control
-    uint32_t MIO_PIN_23;                      // MIO Pin 23 Control
-    uint32_t MIO_PIN_24;                      // MIO Pin 24 Control
-    uint32_t MIO_PIN_25;                      // MIO Pin 25 Control
-    uint32_t MIO_PIN_26;                      // MIO Pin 26 Control
-    uint32_t MIO_PIN_27;                      // MIO Pin 27 Control
-    uint32_t MIO_PIN_28;                      // MIO Pin 28 Control
-    uint32_t MIO_PIN_29;                      // MIO Pin 29 Control
-    uint32_t MIO_PIN_30;                      // MIO Pin 30 Control
-    uint32_t MIO_PIN_31;                      // MIO Pin 31 Control
-    uint32_t MIO_PIN_32;                      // MIO Pin 32 Control
-    uint32_t MIO_PIN_33;                      // MIO Pin 33 Control
-    uint32_t MIO_PIN_34;                      // MIO Pin 34 Control
-    uint32_t MIO_PIN_35;                      // MIO Pin 35 Control
-    uint32_t MIO_PIN_36;                      // MIO Pin 36 Control
-    uint32_t MIO_PIN_37;                      // MIO Pin 37 Control
-    uint32_t MIO_PIN_38;                      // MIO Pin 38 Control
-    uint32_t MIO_PIN_39;                      // MIO Pin 39 Control
-    uint32_t MIO_PIN_40;                      // MIO Pin 40 Control
-    uint32_t MIO_PIN_41;                      // MIO Pin 41 Control
-    uint32_t MIO_PIN_42;                      // MIO Pin 42 Control
-    uint32_t MIO_PIN_43;                      // MIO Pin 43 Control
-    uint32_t MIO_PIN_44;                      // MIO Pin 44 Control
-    uint32_t MIO_PIN_45;                      // MIO Pin 45 Control
-    uint32_t MIO_PIN_46;                      // MIO Pin 46 Control
-    uint32_t MIO_PIN_47;                      // MIO Pin 47 Control
-    uint32_t MIO_PIN_48;                      // MIO Pin 48 Control
-    uint32_t MIO_PIN_49;                      // MIO Pin 49 Control
-    uint32_t MIO_PIN_50;                      // MIO Pin 50 Control
-    uint32_t MIO_PIN_51;                      // MIO Pin 51 Control
-    uint32_t MIO_PIN_52;                      // MIO Pin 52 Control
-    uint32_t MIO_PIN_53;                      // MIO Pin 53 Control
-    uint32_t ___reserved14[11];
-    uint32_t MIO_LOOPBACK;                    // Loopback function within MIO
-    uint32_t ___reserved15[1];
-    uint32_t MIO_MST_TRI0;                    // MIO pin Tri-state Enables, 31:0
-    uint32_t MIO_MST_TRI1;                    // MIO pin Tri-state Enables, 53:32
-    uint32_t ___reserved16[7];
-    uint32_t SD0_WP_CD_SEL;                   // SDIO 0 WP CD select
-    uint32_t SD1_WP_CD_SEL;                   // SDIO 1 WP CD select
-    uint32_t ___reserved17[50];
-    uint32_t LVL_SHFTR_EN;                    // Level Shifters Enable
-    uint32_t ___reserved18[3];
-    uint32_t OCM_CFG;                         // OCM Address Mapping
-    uint32_t ___reserved19[66];
-    uint32_t RESERVED;                        // Reserved
-    uint32_t ___reserved20[56];
-    uint32_t GPIOB_CTRL;                      // PS IO Buffer Control
-    uint32_t GPIOB_CFG_CMOS18;                // MIO GPIOB CMOS 1.8V config
-    uint32_t GPIOB_CFG_CMOS25;                // MIO GPIOB CMOS 2.5V config
-    uint32_t GPIOB_CFG_CMOS33;                // MIO GPIOB CMOS 3.3V config
-    uint32_t ___reserved21[1];
-    uint32_t GPIOB_CFG_HSTL;                  // MIO GPIOB HSTL config
-    uint32_t GPIOB_DRVR_BIAS_CTRL;            // MIO GPIOB Driver Bias Control
-    uint32_t ___reserved22[9];
-    uint32_t DDRIOB_ADDR0;                    // DDR IOB Config for A[14:0], CKE and DRST_B
-    uint32_t DDRIOB_ADDR1;                    // DDR IOB Config for BA[2:0], ODT, CS_B, WE_B, RAS_B and CAS_B
-    uint32_t DDRIOB_DATA0;                    // DDR IOB Config for Data 15:0
-    uint32_t DDRIOB_DATA1;                    // DDR IOB Config for Data 31:16
-    uint32_t DDRIOB_DIFF0;                    // DDR IOB Config for DQS 1:0
-    uint32_t DDRIOB_DIFF1;                    // DDR IOB Config for DQS 3:2
-    uint32_t DDRIOB_CLOCK;                    // DDR IOB Config for Clock Output
-    uint32_t DDRIOB_DRIVE_SLEW_ADDR;          // Drive and Slew controls for Address and Command pins of the DDR Interface
-    uint32_t DDRIOB_DRIVE_SLEW_DATA;          // Drive and Slew controls for DQ pins of the DDR Interface
-    uint32_t DDRIOB_DRIVE_SLEW_DIFF;          // Drive and Slew controls for DQS pins of the DDR Interface
-    uint32_t DDRIOB_DRIVE_SLEW_CLOCK;         // Drive and Slew controls for Clock pins of the DDR Interface
-    uint32_t DDRIOB_DDR_CTRL;                 // DDR IOB Buffer Control
-    uint32_t DDRIOB_DCI_CTRL;                 // DDR IOB DCI Config
-    uint32_t DDRIOB_DCI_STATUS;               // DDR IO Buffer DCI Status
-};
-
-/* Verify the entries match the TRM offset to validate the struct */
-STATIC_ASSERT(offsetof(struct slcr_regs, SCL) == 0x0);
-STATIC_ASSERT(offsetof(struct slcr_regs, DDRIOB_DCI_STATUS) == 0xb74);
-
-#define DDRC_CTRL                       0xF8006000
-#define DDRC_MODE_STATUS                0xF8006054
-
-#define DDRC_CTRL_OUT_OF_RESET          (1)
-#define DDRC_CTRL_BUS_WIDTH_16BIT       (1 << 2)
-#define DDRC_CTRL_RDRW_IDLE_GAP(x)      ((x & BIT_MASK(7) << 7)
-
-#define DDRC_STS_OPER_MODE(x)           (x & BIT_MASK(3))
-#define DDRC_STS_SELF_REFRESH           DDRC_STS_OPER_MODE(0x3)
-
-#define SLCR                            ((volatile struct slcr_regs *)SLCR_BASE)
-#define SLCR_REG(reg)                   (*REG32((uintptr_t)&SLCR->reg))
-
-/* ARM_PLL_CFG */
-#define PLL_CFG_PLL_RES(x)              ((x & BIT_MASK(4)) << 4)
-#define PLL_CFG_PLL_CP(x)               ((x & BIT_MASK(4)) << 8)
-#define PLL_CFG_LOCK_CNT(x)             ((x & BIT_MASK(10)) << 12)
-
-/* DDR_PLL_CFG */
-
-/* ARM_PLL_CTRL and IO_PLL_CTRL */
-#define PLL_RESET                       (1)
-#define PLL_PWRDOWN                     (1 << 1)
-#define PLL_BYPASS_QUAL                 (1 << 3)
-#define PLL_BYPASS_FORCE                (1 << 4)
-#define PLL_FDIV(x)                     ((x & BIT_MASK(7)) << 12)
-
-/* ARM_CLK_CTRL */
-#define ARM_CLK_CTRL_SRCSEL(x)          ((x & BIT_MASK(2)) << 4)
-#define ARM_CLK_CTRL_DIVISOR(x)         ((x & BIT_MASK(6)) << 8)
-#define ARM_CLK_CTRL_CPU_6OR4XCLKACT    (1 << 24)
-#define ARM_CLK_CTRL_CPU_3OR2XCLKACT    (1 << 25)
-#define ARM_CLK_CTRL_CPU_2XCLKACT       (1 << 26)
-#define ARM_CLK_CTRL_CPU_1XCLKACT       (1 << 27)
-#define ARM_CLK_CTRL_PERI_CLKACT        (1 << 28)
-
-/* DDR_CLK_CTRL */
-#define DDR_CLK_CTRL_DDR_3XCLKACT       (1)
-#define DDR_CLK_CTRL_DDR_2XCLKACT       (1 << 1)
-#define DDR_CLK_CTRL_DDR_3XCLK_DIV(x)   ((x & BIT_MASK(6)) << 20)
-#define DDR_CLK_CTRL_DDR_2XCLK_DIV(x)   ((x & BIT_MASK(6)) << 26)
-
-/* PLL_STATUS */
-#define PLL_STATUS_ARM_PLL_LOCK         (1)
-#define PLL_STATUS_DDR_PLL_LOCK         (1 << 1)
-#define PLL_STATUS_IO_PLL_LOCK          (1 << 2)
-#define PLL_STATUS_ARM_PLL_STABLE       (1 << 3)
-#define PLL_STATUS_DDR_PLL_STABLE       (1 << 4)
-#define PLL_STATUS_IO_PLL_STABLE        (1 << 5)
-
-/* Generic clock control */
-#define CLK_CTRL_CLKACT                 (1)
-#define CLK_CTRL_CLKACT1                (1 << 1)
-#define CLK_CTRL_SRCSEL(x)              ((x & BIT_MASK(2)) << 4)
-#define CLK_CTRL_DIVISOR0(x)            ((x & BIT_MASK(6)) << 8)
-#define CLK_CTRL_DIVISOR1(x)            ((x & BIT_MASK(6)) << 20)
-
-/* GEM clock control */
-#define GEM_CLK_CTRL_SRCSEL(x)          ((x & BIT_MASK(3)) << 4)
-
-/* CLK 621 just has a single enable bit */
-#define CLK_621_ENABLE                  (1)
-
-/* AMBA Peripheral Clock Control */
-#define SMC_CPU_CLK_EN                  (1 << 24)
-#define LQSPI_CPU_CLK_EN                (1 << 23)
-#define GPIO_CPU_CLK_EN                 (1 << 22)
-#define UART1_CPU_CLK_EN                (1 << 21)
-#define UART0_CPU_CLK_EN                (1 << 20)
-#define I2C1_CPU_CLK_EN                 (1 << 19)
-#define I2C0_CPU_CLK_EN                 (1 << 18)
-#define CAN1_CPU_CLK_EN                 (1 << 17)
-#define CAN0_CPU_CLK_EN                 (1 << 16)
-#define SPI1_CPU_CLK_EN                 (1 << 15)
-#define SPI0_CPU_CLK_EN                 (1 << 14)
-#define SDI1_CPU_CLK_EN                 (1 << 11)
-#define SDI0_CPU_CLK_EN                 (1 << 10)
-#define GEM1_CPU_CLK_EN                 (1 << 7)
-#define GEM0_CPU_CLK_EN                 (1 << 6)
-#define USB1_CPU_CLK_EN                 (1 << 3)
-#define USB0_CPU_CLK_EN                 (1 << 2)
-#define DMA_CPU_CLK_EN                  (1 << 0)
-
-/* GPIOB_CTRL */
-#define GPIOB_CTRL_VREF_09_EN           (1 << 4)
-#define GPIOB_CTRL_VREF_EN              (1)
-
-/* DDRIOB_ADDR */
-#define DDRIOB_PULLUP_EN                (1 << 11)
-#define DDRIOB_OUTPUT_EN(x)             ((x & BIT_MASK(2)) << 9)
-#define DDRIOB_TERM_DISABLE_MODE        (1 << 8)
-#define DDRIOB_IBUF_DISABLE_MODE        (1 << 7)
-#define DDRIOB_DCI_TYPE(x)              ((x & BIT_MASK(2)) << 5)
-#define DDRIOB_TERM_EN                  (1 << 4)
-#define DDRIOB_DCI_UPDATE_B             (1 << 3)
-#define DDRIOB_INP_TYPE(x)              ((x & BIT_MASK(2)) << 1)
-
-/* SD1_WP_CD_SEL */
-#define SDIO0_WP_SEL(x)                 (x & BIT_MASK(6))
-#define SDIO0_CD_SEL(x)                 ((x & BIT_MASK(6)) << 16)
-
-/* MIO pin configuration */
-#define MIO_TRI_ENABLE                  (1)
-#define MIO_L0_SEL                      (1 << 1)
-#define MIO_L1_SEL                      (1 << 2)
-#define MIO_L2_SEL(x)                   ((x & BIT_MASK(2)) << 3)
-#define MIO_L2_SEL_MASK                 MIO_L2_SEL(0x3)
-#define MIO_L3_SEL(x)                   ((x & BIT_MASK(3)) << 5)
-#define MIO_L3_SEL_MASK                 MIO_L3_SEL(0x7)
-#define MIO_SPEED_FAST                  (1 << 8)
-#define MIO_IO_TYPE_LVCMOS18            (0x1 << 9)
-#define MIO_IO_TYPE_LVCMOS25            (0x2 << 9)
-#define MIO_IO_TYPE_LVCMOS33            (0x3 << 9)
-#define MIO_IO_TYPE_HSTL                (0x4 << 9)
-#define MIO_IO_TYPE_MASK                (0x7 << 9)
-#define MIO_PULLUP                      (1 << 12)
-#define MIO_DISABLE_RCVR                (1 << 13)
-#define MIO_DEFAULT                     (0xFFFF0000)
-
-/* UART registers */
-#define UART_CR                         (0x00)
-#define UART_MR                         (0x04)
-#define UART_IER                        (0x08)
-#define UART_IDR                        (0x0c)
-#define UART_IMR                        (0x10)
-#define UART_ISR                        (0x14)
-#define UART_BAUDGEN                    (0x18)
-#define UART_RXTOUT                     (0x1c)
-#define UART_RXWM                       (0x20)
-#define UART_MODEMCR                    (0x24)
-#define UART_MODEMSR                    (0x28)
-#define UART_SR                         (0x2c)
-#define UART_FIFO                       (0x30)
-#define UART_BAUD_DIV                   (0x34)
-#define UART_FLOW_DELAY                 (0x38)
-#define UART_TX_FIFO_TRIGGER            (0x44)
-
-#define NUM_UARTS 2
-
-#define UART_CR_RXRES                   (1)
-#define UART_CR_TXRES                   (1 << 1)
-#define UART_CR_RXEN                    (1 << 2)
-#define UART_CR_RXDIS                   (1 << 3)
-#define UART_CR_TXEN                    (1 << 4)
-#define UART_CR_TXDIS                   (1 << 5)
-#define UART_CR_RSTTO                   (1 << 6)
-#define UART_CR_STTBRK                  (1 << 7)
-#define UART_CR_STPBRK                  (1 << 8)
-
-#define UART_MR_CLKS_DIV8               (1)
-#define UART_MR_CHRL(x)                 ((x & BIT_MASK(2)) << 1)
-#define UART_MR_PAR(x)                  ((x & BIT_MASK(3)) << 3)
-#define UART_MR_NBSTOP(x)               ((x & BIT_MASK(2)) << 6)
-#define UART_MR_CHMODE(x)               ((x & BIT_MASK(2)) << 8)
-
-#define UART_BRG_DIV(x)                 (x & BIT_MASK(16))
-#define UART_BRD_DIV(x)                 (x & BIT_MASK(8))
-
-/* system watchdog timer */
-struct swdt_regs {
-    uint32_t MODE;
-    uint32_t CONTROL;
-    uint32_t RESTART;
-    uint32_t STATUS;
-};
-
-#define SWDT                            ((volatile struct swdt_regs *)SWDT_BASE)
-#define SWDT_REG(reg)                   (*REG32((uintptr_t)&SWDT->reg))
-
-/* zynq specific functions */
-static inline void zynq_slcr_unlock(void) { SLCR->SLCR_UNLOCK = 0xdf0d; }
-static inline void zynq_slcr_lock(void) { SLCR->SLCR_LOCK = 0x767b; }
-
-uint32_t zynq_get_arm_freq(void);
-uint32_t zynq_get_arm_timer_freq(void);
-uint32_t zynq_get_swdt_freq(void);
-void zynq_dump_clocks(void);
-
-enum zynq_clock_source {
-    PLL_IO = 0,
-    PLL_CPU = 2,
-    PLL_DDR = 3,
-};
-
-enum zynq_periph {
-    PERIPH_USB0,
-    PERIPH_USB1,
-    PERIPH_GEM0,
-    PERIPH_GEM1,
-    PERIPH_SMC,
-    PERIPH_LQSPI,
-    PERIPH_SDIO0,
-    PERIPH_SDIO1,
-    PERIPH_UART0,
-    PERIPH_UART1,
-    PERIPH_SPI0,
-    PERIPH_SPI1,
-    PERIPH_CAN0,
-    PERIPH_CAN1,
-    PERIPH_DBG,
-    PERIPH_PCAP,
-    PERIPH_FPGA0,
-    PERIPH_FPGA1,
-    PERIPH_FPGA2,
-    PERIPH_FPGA3,
-
-    _PERIPH_MAX,
-};
-
-status_t zynq_set_clock(enum zynq_periph, bool enable, enum zynq_clock_source, uint32_t divisor, uint32_t divisor2);
-uint32_t zynq_get_clock(enum zynq_periph);
-
-/* boot mode */
-#define ZYNQ_BOOT_MODE_JTAG     (0)
-#define ZYNQ_BOOT_MODE_QSPI     (1)
-#define ZYNQ_BOOT_MODE_NOR      (2)
-#define ZYNQ_BOOT_MODE_NAND     (4)
-#define ZYNQ_BOOT_MODE_SD       (5)
-#define ZYNQ_BOOT_MODE_MASK     (0x7)    /* only interested in BOOT_MODE[2:0] */
-
-static inline uint32_t zynq_get_boot_mode(void) { return SLCR->BOOT_MODE & ZYNQ_BOOT_MODE_MASK; }
-
-#endif // !ASSEMBLY
-
diff --git a/platform/zynq/mkbootheader.py b/platform/zynq/mkbootheader.py
deleted file mode 100755
index 5178d086..00000000
--- a/platform/zynq/mkbootheader.py
+++ /dev/null
@@ -1,84 +0,0 @@
-#!/usr/bin/env python
-
-# generates Zynq bootrom header from input payout
-
-import sys, os, array
-
-if len(sys.argv) < 3:
-    print "not enough args, usage:"
-    print "%s <binfile> <outfile>" % sys.argv[0]
-    sys.exit(1)
-
-fin = open(sys.argv[1], "r+b")
-finsize = os.stat(sys.argv[1]).st_size
-fout = open(sys.argv[2], "w+b")
-
-header = array.array('I')
-
-# start generating header
-# from section 6.3.2 of Zynq-700 AP SoC Technical Reference Manual (v1.7)
-
-# vector table (8 words)
-for _ in range(0, 8):
-    header.append(0)
-
-# (0x20) width detection
-header.append(0xaa995566)
-
-# (0x24) identification 'XLNX'
-header.append(0x584c4e58)
-
-# (0x28) encryption status (not encrypted)
-header.append(0)
-
-# (0x2c) user defined
-header.append(0)
-
-# (0x30) source offset
-header.append(0x8c0)
-
-# (0x34) length of image
-header.append(finsize)
-
-# (0x38) reserved
-header.append(0)
-
-# (0x3c) start of execution (0)
-header.append(0)
-
-# (0x40) total image length (same as length of image for non secure)
-header.append(finsize)
-
-# (0x44) reserved
-header.append(0)
-
-# (0x48) header checksum
-sum = 0
-for i in header:
-    sum += i
-sum = ~sum
-header.append(sum & 0xffffffff)
-
-# user defined
-for _ in range(0x4c, 0xa0, 4):
-    header.append(0)
-
-# register init pairs (all ffs to cause it to skip)
-for _ in range(0xa0, 0x8a0, 4):
-    header.append(0xffffffff)
-
-# reserved
-for _ in range(0x8a0, 0x8c0, 4):
-    header.append(0)
-
-fout.write(header)
-
-# copy the input into the output
-while True:
-    buf = fin.read(1024)
-    if not buf:
-        break
-    fout.write(buf)
-
-fin.close()
-fout.close()
diff --git a/platform/zynq/platform.c b/platform/zynq/platform.c
deleted file mode 100644
index 8166641f..00000000
--- a/platform/zynq/platform.c
+++ /dev/null
@@ -1,547 +0,0 @@
-/*
- * Copyright (c) 2012-2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <debug.h>
-#include <stdio.h>
-#include <string.h>
-#include <arch/arm/mmu.h>
-#include <kernel/vm.h>
-#include <dev/uart.h>
-#include <dev/interrupt/arm_gic.h>
-#include <dev/timer/arm_cortex_a9.h>
-#include <lib/console.h>
-#include <lib/watchdog.h>
-#include <platform.h>
-#include <platform/zynq.h>
-#include <platform/gem.h>
-#include <platform/timer.h>
-#include "platform_p.h"
-
-#if ZYNQ_SDRAM_INIT
-STATIC_ASSERT(SDRAM_SIZE != 0);
-#endif
-
-/* default timeout of the global hardware watchdog */
-#ifndef ZYNQ_WATCHDOG_TIMEOUT
-#define ZYNQ_WATCHDOG_TIMEOUT (1000) // 1 second
-#endif
-
-/* saved REBOOT_STATUS register */
-static uint32_t saved_reboot_status;
-
-/* target can specify this as the initial jam table to set up the soc */
-__WEAK void ps7_init(void) { }
-
-/* These should be defined in the target somewhere */
-extern const uint32_t zynq_mio_cfg[ZYNQ_MIO_CNT];
-extern const long zynq_ddr_cfg[];
-extern const uint32_t zynq_ddr_cfg_cnt;
-extern const zynq_pll_cfg_tree_t zynq_pll_cfg;
-extern const zynq_clk_cfg_t zynq_clk_cfg;
-extern const zynq_ddriob_cfg_t zynq_ddriob_cfg;
-
-static inline int reg_poll(uint32_t addr,uint32_t mask)
-{
-    uint32_t iters = UINT_MAX;
-    while (iters-- && !(*REG32(addr) & mask)) ;
-
-    if (iters) {
-        return 0;
-    }
-
-    return -1;
-}
-
-/* For each PLL we need to configure the cp / res / lock_cnt and then place the PLL in bypass
- * before doing a reset to switch to the new values. Then bypass is removed to switch back to using
- * the PLL once its locked.
- */
-int zynq_pll_init(void)
-{
-    const zynq_pll_cfg_tree_t *cfg = &zynq_pll_cfg;
-
-    SLCR_REG(ARM_PLL_CFG)  = PLL_CFG_LOCK_CNT(cfg->arm.lock_cnt) | PLL_CFG_PLL_CP(cfg->arm.cp) |
-                             PLL_CFG_PLL_RES(cfg->arm.res);
-    SLCR_REG(ARM_PLL_CTRL) = PLL_FDIV(cfg->arm.fdiv) | PLL_BYPASS_FORCE | PLL_RESET;
-    SLCR_REG(ARM_PLL_CTRL) &= ~PLL_RESET;
-
-    if (reg_poll((uintptr_t)&SLCR->PLL_STATUS, PLL_STATUS_ARM_PLL_LOCK) == -1) {
-        return -1;
-    }
-
-    SLCR_REG(ARM_PLL_CTRL) &= ~PLL_BYPASS_FORCE;
-    SLCR_REG(ARM_CLK_CTRL) = zynq_clk_cfg.arm_clk;
-
-#if ZYNQ_SDRAM_INIT
-    SLCR_REG(DDR_PLL_CFG)  = PLL_CFG_LOCK_CNT(cfg->ddr.lock_cnt) | PLL_CFG_PLL_CP(cfg->ddr.cp) |
-                             PLL_CFG_PLL_RES(cfg->ddr.res);
-    SLCR_REG(DDR_PLL_CTRL) = PLL_FDIV(cfg->ddr.fdiv) | PLL_BYPASS_FORCE | PLL_RESET;
-    SLCR_REG(DDR_PLL_CTRL) &= ~PLL_RESET;
-
-    if (reg_poll((uintptr_t)&SLCR->PLL_STATUS, PLL_STATUS_DDR_PLL_LOCK) == -1) {
-        return -1;
-    }
-
-    SLCR_REG(DDR_PLL_CTRL) &= ~PLL_BYPASS_FORCE;
-    SLCR_REG(DDR_CLK_CTRL) = zynq_clk_cfg.ddr_clk;
-#elif SDRAM_SIZE == 0
-    /* if we're not using sdram and haven't been told to initialize sdram, stop the DDR pll */
-    SLCR_REG(DDR_CLK_CTRL) = 0;
-    SLCR_REG(DDR_PLL_CTRL) |= PLL_PWRDOWN;
-#endif
-    SLCR_REG(IO_PLL_CFG)  = PLL_CFG_LOCK_CNT(cfg->io.lock_cnt) | PLL_CFG_PLL_CP(cfg->io.cp) |
-                            PLL_CFG_PLL_RES(cfg->io.res);
-    SLCR_REG(IO_PLL_CTRL) = PLL_FDIV(cfg->io.fdiv) | PLL_BYPASS_FORCE | PLL_RESET;
-    SLCR_REG(IO_PLL_CTRL) &= ~PLL_RESET;
-
-    if (reg_poll((uintptr_t)&SLCR->PLL_STATUS, PLL_STATUS_IO_PLL_LOCK) == -1) {
-        return -1;
-    }
-
-    SLCR_REG(IO_PLL_CTRL) &= ~PLL_BYPASS_FORCE;
-    return 0;
-}
-
-int zynq_mio_init(void)
-{
-
-    /* This DDRIOB configuration applies to both zybo and uzed, but it's possible
-     * it may not work for all boards in the future. Just something to keep in mind
-     * with different memory configurations.
-     */
-    SLCR_REG(GPIOB_CTRL) = GPIOB_CTRL_VREF_EN;
-
-    for (size_t pin = 0; pin < countof(zynq_mio_cfg); pin++) {
-        if (zynq_mio_cfg[pin] != MIO_DEFAULT) {
-            SLCR_REG(MIO_PIN_00 + (pin * 4)) = zynq_mio_cfg[pin];
-        }
-    }
-
-    SLCR_REG(SD0_WP_CD_SEL) = SDIO0_WP_SEL(0x37) | SDIO0_CD_SEL(0x2F);
-
-    return 0;
-}
-
-void zynq_clk_init(void)
-{
-    SLCR_REG(DCI_CLK_CTRL)   = zynq_clk_cfg.dci_clk;
-    SLCR_REG(GEM0_CLK_CTRL)  = zynq_clk_cfg.gem0_clk;
-    SLCR_REG(GEM0_RCLK_CTRL) = zynq_clk_cfg.gem0_rclk;
-    SLCR_REG(GEM1_CLK_CTRL)  = zynq_clk_cfg.gem1_clk;
-    SLCR_REG(GEM1_RCLK_CTRL) = zynq_clk_cfg.gem1_rclk;
-    SLCR_REG(SMC_CLK_CTRL)   = zynq_clk_cfg.smc_clk;
-    SLCR_REG(LQSPI_CLK_CTRL) = zynq_clk_cfg.lqspi_clk;
-    SLCR_REG(SDIO_CLK_CTRL)  = zynq_clk_cfg.sdio_clk;
-    SLCR_REG(UART_CLK_CTRL)  = zynq_clk_cfg.uart_clk;
-    SLCR_REG(SPI_CLK_CTRL)   = zynq_clk_cfg.spi_clk;
-    SLCR_REG(CAN_CLK_CTRL)   = zynq_clk_cfg.can_clk;
-    SLCR_REG(CAN_MIOCLK_CTRL)= zynq_clk_cfg.can_mioclk;
-    SLCR_REG(USB0_CLK_CTRL)  = zynq_clk_cfg.usb0_clk;
-    SLCR_REG(USB1_CLK_CTRL)  = zynq_clk_cfg.usb1_clk;
-    SLCR_REG(PCAP_CLK_CTRL)  = zynq_clk_cfg.pcap_clk;
-    SLCR_REG(FPGA0_CLK_CTRL) = zynq_clk_cfg.fpga0_clk;
-    SLCR_REG(FPGA1_CLK_CTRL) = zynq_clk_cfg.fpga1_clk;
-    SLCR_REG(FPGA2_CLK_CTRL) = zynq_clk_cfg.fpga2_clk;
-    SLCR_REG(FPGA3_CLK_CTRL) = zynq_clk_cfg.fpga3_clk;
-    SLCR_REG(APER_CLK_CTRL)  = zynq_clk_cfg.aper_clk;
-    SLCR_REG(CLK_621_TRUE)   = zynq_clk_cfg.clk_621_true;
-}
-
-#if ZYNQ_SDRAM_INIT
-void zynq_ddr_init(void)
-{
-    SLCR_REG(DDRIOB_ADDR0) = zynq_ddriob_cfg.addr0;
-    SLCR_REG(DDRIOB_ADDR1) = zynq_ddriob_cfg.addr1;
-    SLCR_REG(DDRIOB_DATA0) = zynq_ddriob_cfg.data0;
-    SLCR_REG(DDRIOB_DATA1) = zynq_ddriob_cfg.data1;
-    SLCR_REG(DDRIOB_DIFF0) = zynq_ddriob_cfg.diff0;
-    SLCR_REG(DDRIOB_DIFF1) = zynq_ddriob_cfg.diff1;
-    SLCR_REG(DDRIOB_CLOCK) = DDRIOB_OUTPUT_EN(0x3);
-
-    /* These register fields are not documented in the TRM. These
-     * values represent the defaults generated via the Zynq tools
-     */
-    SLCR_REG(DDRIOB_DRIVE_SLEW_ADDR) = 0x0018C61CU;
-    SLCR_REG(DDRIOB_DRIVE_SLEW_DATA) = 0x00F9861CU;
-    SLCR_REG(DDRIOB_DRIVE_SLEW_DIFF) = 0x00F9861CU;
-    SLCR_REG(DDRIOB_DRIVE_SLEW_CLOCK) = 0x00F9861CU;
-    SLCR_REG(DDRIOB_DDR_CTRL) = 0x00000E60U;
-    SLCR_REG(DDRIOB_DCI_CTRL) = 0x00000001U;
-    SLCR_REG(DDRIOB_DCI_CTRL) |= 0x00000020U;
-    SLCR_REG(DDRIOB_DCI_CTRL) |= 0x00000823U;
-
-    /* Write addresss / value pairs from target table */
-    for (size_t i = 0; i < zynq_ddr_cfg_cnt; i += 2) {
-        *REG32(zynq_ddr_cfg[i]) = zynq_ddr_cfg[i+1];
-    }
-
-    /* Wait for DCI done */
-    reg_poll((uintptr_t)&SLCR->DDRIOB_DCI_STATUS, 0x2000);
-
-    /* Bring ddr out of reset and wait until self refresh */
-    *REG32(DDRC_CTRL) |= DDRC_CTRL_OUT_OF_RESET;
-    reg_poll(DDRC_MODE_STATUS, DDRC_STS_SELF_REFRESH);
-
-    /* Switch timer to 64k */
-    *REG32(0XF8007000) = *REG32(0xF8007000) & ~0x20000000U;
-
-    if (zynq_ddriob_cfg.ibuf_disable) {
-        SLCR_REG(DDRIOB_DATA0) |= DDRIOB_IBUF_DISABLE_MODE;
-        SLCR_REG(DDRIOB_DATA1) |= DDRIOB_IBUF_DISABLE_MODE;
-        SLCR_REG(DDRIOB_DIFF0) |= DDRIOB_IBUF_DISABLE_MODE;
-        SLCR_REG(DDRIOB_DIFF1) |= DDRIOB_IBUF_DISABLE_MODE;
-    }
-
-    if (zynq_ddriob_cfg.term_disable) {
-        SLCR_REG(DDRIOB_DATA0) |= DDRIOB_TERM_DISABLE_MODE;
-        SLCR_REG(DDRIOB_DATA1) |= DDRIOB_TERM_DISABLE_MODE;
-        SLCR_REG(DDRIOB_DIFF0) |= DDRIOB_TERM_DISABLE_MODE;
-        SLCR_REG(DDRIOB_DIFF1) |= DDRIOB_TERM_DISABLE_MODE;
-    }
-}
-#endif
-
-STATIC_ASSERT(IS_ALIGNED(SDRAM_BASE, MB));
-STATIC_ASSERT(IS_ALIGNED(SDRAM_SIZE, MB));
-
-#if SDRAM_SIZE != 0
-/* if we have sdram, the first 1MB is covered by sram */
-#define RAM_SIZE (MB + (SDRAM_SIZE - MB))
-#else
-#define RAM_SIZE (MB)
-#endif
-
-/* initial memory mappings. parsed by start.S */
-struct mmu_initial_mapping mmu_initial_mappings[] = {
-    /* 1GB of sram + sdram space */
-    {
-        .phys = SRAM_BASE,
-        .virt = KERNEL_BASE,
-        .size = RAM_SIZE,
-        .flags = 0,
-        .name = "memory"
-    },
-
-    /* AXI fpga fabric bus 0 */
-    {
-        .phys = 0x40000000,
-        .virt = 0x40000000,
-        .size = (128*1024*1024),
-        .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
-        .name = "axi0"
-    },
-
-    /* AXI fpga fabric bus 1 */
-    {
-        .phys = 0x80000000,
-        .virt = 0x80000000,
-        .size = (16*1024*1024),
-        .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
-        .name = "axi1"
-    },
-    /* 0xe0000000 hardware devices */
-    {
-        .phys = 0xe0000000,
-        .virt = 0xe0000000,
-        .size = 0x00300000,
-        .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
-        .name = "hw-e0000000"
-    },
-
-    /* 0xe1000000 hardware devices */
-    {
-        .phys = 0xe1000000,
-        .virt = 0xe1000000,
-        .size = 0x05000000,
-        .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
-        .name = "hw-e1000000"
-    },
-
-    /* 0xf8000000 hardware devices */
-    {
-        .phys = 0xf8000000,
-        .virt = 0xf8000000,
-        .size = 0x01000000,
-        .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
-        .name = "hw-f8000000"
-    },
-
-    /* 0xfc000000 hardware devices */
-    {
-        .phys = 0xfc000000,
-        .virt = 0xfc000000,
-        .size = 0x02000000,
-        .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
-        .name = "hw-fc000000"
-    },
-
-    /* sram high aperture */
-    {
-        .phys = 0xfff00000,
-        .virt = 0xfff00000,
-        .size = 0x00100000,
-        .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE
-    },
-
-    /* identity map to let the boot code run */
-    {
-        .phys = SRAM_BASE,
-        .virt = SRAM_BASE,
-        .size = RAM_SIZE,
-        .flags = MMU_INITIAL_MAPPING_TEMPORARY
-    },
-
-    /* null entry to terminate the list */
-    { 0 }
-};
-
-#if SDRAM_SIZE != 0
-static pmm_arena_t sdram_arena = {
-    .name = "sdram",
-    .base = SDRAM_BASE,
-    .size = SDRAM_SIZE - MB, /* first 1MB is covered by SRAM */
-    .flags = PMM_ARENA_FLAG_KMAP
-};
-#endif
-
-static pmm_arena_t sram_arena = {
-    .name = "sram",
-    .base = SRAM_BASE,
-    .size = SRAM_SIZE,
-    .priority = 1,
-    .flags = PMM_ARENA_FLAG_KMAP
-};
-
-void platform_init_mmu_mappings(void)
-{
-}
-
-void platform_early_init(void)
-{
-#if 0
-    ps7_init();
-#else
-    /* Unlock the registers and leave them that way */
-    zynq_slcr_unlock();
-    zynq_mio_init();
-    zynq_pll_init();
-    zynq_clk_init();
-#if ZYNQ_SDRAM_INIT
-    zynq_ddr_init();
-#endif
-#endif
-
-    /* Enable all level shifters */
-    SLCR_REG(LVL_SHFTR_EN) = 0xF;
-    /* FPGA SW reset (not documented, but mandatory) */
-    SLCR_REG(FPGA_RST_CTRL) = 0x0;
-
-    /* zynq manual says this is mandatory for cache init */
-    *REG32(SLCR_BASE + 0xa1c) = 0x020202;
-
-    /* save the reboot status register, clear bits we dont want to save */
-    saved_reboot_status = SLCR->REBOOT_STATUS;
-    SLCR->REBOOT_STATUS &= ~(0xff << 16);
-
-    /* early initialize the uart so we can printf */
-    uart_init_early();
-
-    /* initialize the interrupt controller */
-    arm_gic_init();
-    zynq_gpio_init();
-
-    /* initialize the timer block */
-    arm_cortex_a9_timer_init(CPUPRIV_BASE, zynq_get_arm_timer_freq());
-
-    /* initialize the hardware watchdog */
-    watchdog_hw_init(ZYNQ_WATCHDOG_TIMEOUT);
-
-    /* bump the 2nd cpu into our code space and remap the top SRAM block */
-    if (KERNEL_LOAD_OFFSET != 0) {
-        /* construct a trampoline to get the 2nd cpu up to the trap routine */
-
-        /* figure out the offset of the trampoline routine in physical space from address 0 */
-        extern void platform_reset(void);
-        addr_t tramp = (addr_t)&platform_reset;
-        tramp -= KERNEL_BASE;
-        tramp += MEMBASE;
-
-        /* stuff in a ldr pc, [nextaddrress], and a target address */
-        uint32_t *ptr = (uint32_t *)KERNEL_BASE;
-
-        ptr[0] = 0xe51ff004; // ldr pc, [pc, #-4]
-        ptr[1] = tramp;
-        arch_clean_invalidate_cache_range((addr_t)ptr, 8);
-    }
-
-    /* reset the 2nd cpu, letting it go through its reset vector (at 0x0 physical) */
-    SLCR_REG(A9_CPU_RST_CTRL) |= (1<<1); // reset cpu 1
-    spin(10);
-    SLCR_REG(A9_CPU_RST_CTRL) &= ~(1<<1); // unreset cpu 1
-
-    /* wait for the 2nd cpu to reset, go through the usual reset vector, and get trapped by our code */
-    /* see platform/zynq/reset.S */
-    extern volatile int __cpu_trapped;
-    uint count = 100000;
-    while (--count) {
-        arch_clean_invalidate_cache_range((addr_t)&__cpu_trapped, sizeof(__cpu_trapped));
-        if (__cpu_trapped != 0)
-            break;
-    }
-    if (count == 0) {
-        panic("ZYNQ: failed to trap 2nd cpu\n");
-    }
-
-    /* bounce the 4th sram region down to lower address */
-    SLCR_REG(OCM_CFG) &= ~0xf; /* all banks at low address */
-
-    /* add the main memory arena */
-#if !ZYNQ_CODE_IN_SDRAM && SDRAM_SIZE != 0
-    /* In the case of running from SRAM, and we are using SDRAM,
-     * there is a discontinuity between the end of SRAM (256K) and the start of SDRAM (1MB),
-     * so intentionally bump the boot-time allocator to start in the base of SDRAM.
-     */
-    extern uintptr_t boot_alloc_start;
-    extern uintptr_t boot_alloc_end;
-
-    boot_alloc_start = KERNEL_BASE + MB;
-    boot_alloc_end = KERNEL_BASE + MB;
-#endif
-
-#if SDRAM_SIZE != 0
-    pmm_add_arena(&sdram_arena);
-#endif
-    pmm_add_arena(&sram_arena);
-}
-
-void platform_init(void)
-{
-    uart_init();
-
-    /* enable if we want to see some hardware boot status */
-#if LK_DEBUGLEVEL > 0
-    printf("zynq boot status:\n");
-    printf("\tREBOOT_STATUS 0x%x\n", saved_reboot_status);
-    if (BIT(saved_reboot_status, 16)) printf("\t\tSWDT_RST\n");
-    if (BIT(saved_reboot_status, 17)) printf("\t\tAWDT0_RST\n");
-    if (BIT(saved_reboot_status, 18)) printf("\t\tAWDT1_RST\n");
-    if (BIT(saved_reboot_status, 19)) printf("\t\tSLC_RST\n");
-    if (BIT(saved_reboot_status, 20)) printf("\t\tDBG_RST\n");
-    if (BIT(saved_reboot_status, 21)) printf("\t\tSRST_B\n");
-    if (BIT(saved_reboot_status, 22)) printf("\t\tPOR\n");
-    printf("\tREBOOT_STATE 0x%lx\n", BITS_SHIFT(saved_reboot_status, 31, 24));
-    printf("\tboot mode 0x%x\n", zynq_get_boot_mode());
-#endif
-}
-
-void platform_quiesce(void)
-{
-#if ZYNQ_WITH_GEM_ETH
-    gem_disable();
-#endif
-
-    platform_stop_timer();
-
-    /* stop the 2nd cpu and hold in reset */
-    SLCR_REG(A9_CPU_RST_CTRL) |= (1<<1); // reset cpu 1
-}
-
-/* called from lkboot to see if we want to abort autobooting.
- * having the BOOT_MODE pins set to JTAG should cause us to hang out in
- * whatever binary is loaded at the time.
- */
-bool platform_abort_autoboot(void)
-{
-    /* test BOOT_MODE pins to see if we want to skip the autoboot stuff */
-    uint32_t boot_mode = zynq_get_boot_mode();
-    if (boot_mode == ZYNQ_BOOT_MODE_JTAG) {
-        printf("ZYNQ: disabling autoboot due to JTAG/QSPI jumper being set to JTAG\n");
-        return true;
-    }
-
-    return false;
-}
-
-#if WITH_LIB_CONSOLE
-static int cmd_zynq(int argc, const cmd_args *argv)
-{
-    if (argc < 2) {
-notenoughargs:
-        printf("not enough arguments\n");
-usage:
-        printf("usage: %s <command>\n", argv[0].str);
-        printf("\tslcr lock\n");
-        printf("\tslcr unlock\n");
-        printf("\tslcr lockstatus\n");
-        printf("\tmio\n");
-        printf("\tclocks\n");
-        printf("\ttrip_watchdog\n");
-        return -1;
-    }
-
-    if (!strcmp(argv[1].str, "slcr")) {
-        if (argc < 3) goto notenoughargs;
-
-        bool print_lock_status = false;
-        if (!strcmp(argv[2].str, "lock")) {
-            zynq_slcr_lock();
-            print_lock_status = true;
-        } else if (!strcmp(argv[2].str, "unlock")) {
-            zynq_slcr_unlock();
-            print_lock_status = true;
-        } else if (print_lock_status || !strcmp(argv[2].str, "lockstatus")) {
-            printf("%s\n", (SLCR->SLCR_LOCKSTA & 0x1) ? "locked" : "unlocked");
-        } else {
-            goto usage;
-        }
-    } else if (!strcmp(argv[1].str, "mio")) {
-        printf("zynq mio:\n");
-        for (size_t i = 0; i < ZYNQ_MIO_CNT; i++) {
-            printf("\t%02u: 0x%08x", i, *REG32((uintptr_t)&SLCR->MIO_PIN_00 + (i * 4)));
-            if (i % 4 == 3 || i == 53) {
-                putchar('\n');
-            }
-        }
-    } else if (!strcmp(argv[1].str, "clocks")) {
-        zynq_dump_clocks();
-    } else if (!strcmp(argv[1].str, "trip_watchdog")) {
-        /* try to trip the watchdog by disabling interrupts for a while */
-        arch_disable_ints();
-        for (int i = 0; i < 20; i++) {
-            spin(250000);
-            printf("SWDT MODE 0x%x CONTROL 0x%x STATUS 0x%x\n", SWDT->MODE, SWDT->CONTROL, SWDT->STATUS);
-        }
-        arch_enable_ints();
-    } else {
-        goto usage;
-    }
-
-    return 0;
-}
-
-STATIC_COMMAND_START
-#if LK_DEBUGLEVEL > 1
-STATIC_COMMAND("zynq", "zynq configuration commands", &cmd_zynq)
-#endif
-STATIC_COMMAND_END(zynq);
-#endif // WITH_LIB_CONSOLE
diff --git a/platform/zynq/platform_p.h b/platform/zynq/platform_p.h
deleted file mode 100644
index f91316a8..00000000
--- a/platform/zynq/platform_p.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_P_H
-#define __PLATFORM_P_H
-
-void platform_init_interrupts(void);
-void platform_init_timer(uint32_t freq);
-void zynq_gpio_init(void);
-
-#endif
-
diff --git a/platform/zynq/qspi.c b/platform/zynq/qspi.c
deleted file mode 100644
index 77010526..00000000
--- a/platform/zynq/qspi.c
+++ /dev/null
@@ -1,380 +0,0 @@
-/*
- * Copyright (c) 2014 Brian Swetland
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <dev/qspi.h>
-
-#include <debug.h>
-#include <assert.h>
-#include <compiler.h>
-#include <printf.h>
-#include <string.h>
-#include <reg.h>
-
-#include <lib/console.h>
-
-#include <platform/zynq.h>
-
-#define QSPI_CONFIG             0xE000D000
-#define  CFG_IFMODE             (1 << 31) // Inteligent Flash Mode
-#define  CFG_LITTLE_ENDIAN      (0 << 26)
-#define  CFG_BIG_ENDIAN         (1 << 26)
-#define  CFG_HOLDB_DR           (1 << 19) // set to 1 for dual/quad spi mode
-#define  CFG_NO_MODIFY_MASK     (1 << 17) // do not modify this bit
-#define  CFG_MANUAL_START       (1 << 16) // start transaction
-#define  CFG_MANUAL_START_EN    (1 << 15) // enable manual start mode
-#define  CFG_MANUAL_CS_EN       (1 << 14) // enable manual CS control
-#define  CFG_MANUAL_CS          (1 << 10) // directly drives n_ss_out if MANUAL_CS_EN==1
-#define  CFG_FIFO_WIDTH_32      (3 << 6)  // only valid setting
-#define  CFG_BAUD_MASK          (7 << 3)
-#define  CFG_BAUD_DIV_2         (0 << 3)
-#define  CFG_BAUD_DIV_4         (1 << 3)
-#define  CFG_BAUD_DIV_8         (2 << 3)
-#define  CFG_BAUD_DIV_16        (3 << 3)
-#define  CFG_CPHA               (1 << 2) // clock phase
-#define  CFG_CPOL               (1 << 1) // clock polarity
-#define  CFG_MASTER_MODE        (1 << 0) // only valid setting
-
-#define QSPI_IRQ_STATUS         0xE000D004 // ro status (write UNDERFLOW/OVERFLOW to clear)
-#define QSPI_IRQ_ENABLE         0xE000D008 // write 1s to set mask bits
-#define QSPI_IRQ_DISABLE        0xE000D00C // write 1s to clear mask bits
-#define QSPI_IRQ_MASK           0xE000D010 // ro mask value (1 = irq enabled)
-#define  TX_UNDERFLOW           (1 << 6)
-#define  RX_FIFO_FULL           (1 << 5)
-#define  RX_FIFO_NOT_EMPTY      (1 << 4)
-#define  TX_FIFO_FULL           (1 << 3)
-#define  TX_FIFO_NOT_FULL       (1 << 2)
-#define  RX_OVERFLOW            (1 << 0)
-
-#define QSPI_ENABLE             0xE000D014 // write 1 to enable
-
-#define QSPI_DELAY              0xE000D018
-#define QSPI_TXD0               0xE000D01C
-#define QSPI_RXDATA             0xE000D020
-#define QSPI_SLAVE_IDLE_COUNT   0xE000D024
-#define QSPI_TX_THRESHOLD       0xE000D028
-#define QSPI_RX_THRESHOLD       0xE000D02C
-#define QSPI_GPIO               0xE000D030
-#define QSPI_LPBK_DLY_ADJ       0xE000D038
-#define QSPI_TXD1               0xE000D080
-#define QSPI_TXD2               0xE000D084
-#define QSPI_TXD3               0xE000D088
-
-#define QSPI_LINEAR_CONFIG      0xE000D0A0
-#define  LCFG_ENABLE            (1 << 31) // enable linear quad spi mode
-#define  LCFG_TWO_MEM           (1 << 30)
-#define  LCFG_SEP_BUS           (1 << 29) // 0=shared 1=separate
-#define  LCFG_U_PAGE            (1 << 28)
-#define  LCFG_MODE_EN           (1 << 25) // send mode bits (required for dual/quad io)
-#define  LCFG_MODE_ON           (1 << 24) // only send instruction code for first read
-#define  LCFG_MODE_BITS(n)      (((n) & 0xFF) << 16)
-#define  LCFG_DUMMY_BYTES(n)    (((n) & 7) << 8)
-#define  LCFG_INST_CODE(n)      ((n) & 0xFF)
-
-#define QSPI_LINEAR_STATUS      0xE000D0A4
-#define QSPI_MODULE_ID          0xE000D0FC
-
-int qspi_set_speed(struct qspi_ctxt *qspi, uint32_t khz)
-{
-    uint32_t n;
-
-    if (khz >= 100000) {
-        n = CFG_BAUD_DIV_2;
-        khz = 100000;
-    } else if (khz >= 50000) {
-        n = CFG_BAUD_DIV_4;
-        khz = 50000;
-    } else if (khz >= 25000) {
-        n = CFG_BAUD_DIV_8;
-        khz = 25000;
-    } else {
-        return -1;
-    }
-
-    if (khz == qspi->khz)
-        return 0;
-
-    qspi->khz = khz;
-
-    writel(0, QSPI_ENABLE);
-    if (n == CFG_BAUD_DIV_2) {
-        writel(0x20, QSPI_LPBK_DLY_ADJ);
-    } else {
-        writel(0, QSPI_LPBK_DLY_ADJ);
-    }
-
-    qspi->cfg &= ~CFG_BAUD_MASK;
-    qspi->cfg |= n;
-
-    writel(qspi->cfg, QSPI_CONFIG);
-    writel(1, QSPI_ENABLE);
-
-    return 0;
-}
-
-int qspi_init(struct qspi_ctxt *qspi, uint32_t khz)
-{
-    writel(0, QSPI_ENABLE);
-    writel(0, QSPI_LINEAR_CONFIG);
-
-    // flush rx fifo
-    while (readl(QSPI_IRQ_STATUS) & RX_FIFO_NOT_EMPTY)
-        readl(QSPI_RXDATA);
-
-    qspi->cfg = (readl(QSPI_CONFIG) & CFG_NO_MODIFY_MASK) |
-                CFG_IFMODE |
-                CFG_HOLDB_DR |
-                CFG_FIFO_WIDTH_32 |
-                CFG_CPHA | CFG_CPOL |
-                CFG_MASTER_MODE |
-                CFG_BAUD_DIV_2 |
-                CFG_MANUAL_START_EN | CFG_MANUAL_CS_EN | CFG_MANUAL_CS;
-
-    writel(qspi->cfg, QSPI_CONFIG);
-    qspi->khz = 100000;
-    qspi->linear_mode = false;
-
-    writel(1, QSPI_ENABLE);
-
-    // clear sticky irqs
-    writel(TX_UNDERFLOW | RX_OVERFLOW, QSPI_IRQ_STATUS);
-
-    return 0;
-}
-
-int qspi_enable_linear(struct qspi_ctxt *qspi)
-{
-    if (qspi->linear_mode)
-        return 0;
-
-    /* disable the controller */
-    writel(0, QSPI_ENABLE);
-    writel(0, QSPI_LINEAR_CONFIG);
-
-    /* put the controller in auto chip select mode and assert chip select */
-    qspi->cfg &= ~(CFG_MANUAL_START_EN | CFG_MANUAL_CS_EN | CFG_MANUAL_CS);
-    writel(qspi->cfg, QSPI_CONFIG);
-
-#if 1
-    // uses Quad I/O mode
-    // should be 0x82FF02EB according to xilinx manual for spansion flashes
-    writel(LCFG_ENABLE |
-           LCFG_MODE_EN |
-           LCFG_MODE_BITS(0xff) |
-           LCFG_DUMMY_BYTES(2) |
-           LCFG_INST_CODE(0xeb),
-           QSPI_LINEAR_CONFIG);
-#else
-    // uses Quad Output Read mode
-    // should be 0x8000016B according to xilinx manual for spansion flashes
-    writel(LCFG_ENABLE |
-           LCFG_MODE_BITS(0) |
-           LCFG_DUMMY_BYTES(1) |
-           LCFG_INST_CODE(0x6b),
-           QSPI_LINEAR_CONFIG);
-#endif
-
-    /* enable the controller */
-    writel(1, QSPI_ENABLE);
-
-    qspi->linear_mode = true;
-
-    DSB;
-
-    return 0;
-}
-
-int qspi_disable_linear(struct qspi_ctxt *qspi)
-{
-    if (!qspi->linear_mode)
-        return 0;
-
-    /* disable the controller */
-    writel(0, QSPI_ENABLE);
-    writel(0, QSPI_LINEAR_CONFIG);
-
-    /* put the controller back into manual chip select mode */
-    qspi->cfg |= (CFG_MANUAL_START_EN | CFG_MANUAL_CS_EN | CFG_MANUAL_CS);
-    writel(qspi->cfg, QSPI_CONFIG);
-
-    /* enable the controller */
-    writel(1, QSPI_ENABLE);
-
-    qspi->linear_mode = false;
-
-    DSB;
-
-    return 0;
-}
-
-void qspi_cs(struct qspi_ctxt *qspi, unsigned int cs)
-{
-    DEBUG_ASSERT(cs <= 1);
-
-    if (cs == 0)
-        qspi->cfg &= ~(CFG_MANUAL_CS);
-    else
-        qspi->cfg |= CFG_MANUAL_CS;
-    writel(qspi->cfg, QSPI_CONFIG);
-}
-
-static inline void qspi_xmit(struct qspi_ctxt *qspi)
-{
-    // start txn
-    writel(qspi->cfg | CFG_MANUAL_START, QSPI_CONFIG);
-
-    // wait for command to transmit and TX fifo to be empty
-    while ((readl(QSPI_IRQ_STATUS) & TX_FIFO_NOT_FULL) == 0) ;
-}
-
-static inline void qspi_flush_rx(void)
-{
-    while (!(readl(QSPI_IRQ_STATUS) & RX_FIFO_NOT_EMPTY)) ;
-    readl(QSPI_RXDATA);
-}
-
-static const uint32_t TXFIFO[] = { QSPI_TXD1, QSPI_TXD2, QSPI_TXD3, QSPI_TXD0, QSPI_TXD0, QSPI_TXD0 };
-
-void qspi_rd(struct qspi_ctxt *qspi, uint32_t cmd, uint32_t asize, uint32_t *data, uint32_t count)
-{
-    uint32_t sent = 0;
-    uint32_t rcvd = 0;
-
-    DEBUG_ASSERT(qspi);
-    DEBUG_ASSERT(asize < 6);
-
-    qspi_cs(qspi, 0);
-
-    writel(cmd, TXFIFO[asize]);
-    qspi_xmit(qspi);
-
-    if (asize == 4) { // dummy byte
-        writel(0, QSPI_TXD1);
-        qspi_xmit(qspi);
-        qspi_flush_rx();
-    }
-
-    qspi_flush_rx();
-
-    while (rcvd < count) {
-        while (readl(QSPI_IRQ_STATUS) & RX_FIFO_NOT_EMPTY) {
-            *data++ = readl(QSPI_RXDATA);
-            rcvd++;
-        }
-        while ((readl(QSPI_IRQ_STATUS) & TX_FIFO_NOT_FULL) && (sent < count)) {
-            writel(0, QSPI_TXD0);
-            sent++;
-        }
-        qspi_xmit(qspi);
-    }
-    qspi_cs(qspi, 1);
-}
-
-void qspi_wr(struct qspi_ctxt *qspi, uint32_t cmd, uint32_t asize, uint32_t *data, uint32_t count)
-{
-    uint32_t sent = 0;
-    uint32_t rcvd = 0;
-
-    DEBUG_ASSERT(qspi);
-    DEBUG_ASSERT(asize < 6);
-
-    qspi_cs(qspi, 0);
-
-    writel(cmd, TXFIFO[asize]);
-    qspi_xmit(qspi);
-
-    if (asize == 4) { // dummy byte
-        writel(0, QSPI_TXD1);
-        qspi_xmit(qspi);
-        qspi_flush_rx();
-    }
-
-    qspi_flush_rx();
-
-    while (rcvd < count) {
-        while (readl(QSPI_IRQ_STATUS) & RX_FIFO_NOT_EMPTY) {
-            readl(QSPI_RXDATA); // discard
-            rcvd++;
-        }
-        while ((readl(QSPI_IRQ_STATUS) & TX_FIFO_NOT_FULL) && (sent < count)) {
-            writel(*data++, QSPI_TXD0);
-            sent++;
-        }
-        qspi_xmit(qspi);
-    }
-
-    qspi_cs(qspi, 1);
-}
-
-void qspi_wr1(struct qspi_ctxt *qspi, uint32_t cmd)
-{
-    DEBUG_ASSERT(qspi);
-
-    qspi_cs(qspi, 0);
-    writel(cmd, QSPI_TXD1);
-    qspi_xmit(qspi);
-
-    while (!(readl(QSPI_IRQ_STATUS) & RX_FIFO_NOT_EMPTY)) ;
-
-    readl(QSPI_RXDATA);
-    qspi_cs(qspi, 1);
-}
-
-void qspi_wr2(struct qspi_ctxt *qspi, uint32_t cmd)
-{
-    DEBUG_ASSERT(qspi);
-
-    qspi_cs(qspi, 0);
-    writel(cmd, QSPI_TXD2);
-    qspi_xmit(qspi);
-
-    while (!(readl(QSPI_IRQ_STATUS) & RX_FIFO_NOT_EMPTY)) ;
-
-    readl(QSPI_RXDATA);
-    qspi_cs(qspi, 1);
-}
-
-void qspi_wr3(struct qspi_ctxt *qspi, uint32_t cmd)
-{
-    DEBUG_ASSERT(qspi);
-
-    qspi_cs(qspi, 0);
-    writel(cmd, QSPI_TXD3);
-    qspi_xmit(qspi);
-
-    while (!(readl(QSPI_IRQ_STATUS) & RX_FIFO_NOT_EMPTY)) ;
-
-    readl(QSPI_RXDATA);
-    qspi_cs(qspi, 1);
-}
-
-uint32_t qspi_rd1(struct qspi_ctxt *qspi, uint32_t cmd)
-{
-    qspi_cs(qspi, 0);
-    writel(cmd, QSPI_TXD2);
-    qspi_xmit(qspi);
-
-    while (!(readl(QSPI_IRQ_STATUS) & RX_FIFO_NOT_EMPTY)) ;
-
-    qspi_cs(qspi, 1);
-    return readl(QSPI_RXDATA);
-}
diff --git a/platform/zynq/rules.mk b/platform/zynq/rules.mk
deleted file mode 100644
index 77a8e497..00000000
--- a/platform/zynq/rules.mk
+++ /dev/null
@@ -1,91 +0,0 @@
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-ARCH := arm
-ARM_CPU := cortex-a9-neon
-WITH_SMP ?= 1
-SMP_MAX_CPUS := 2
-
-MODULE_DEPS := \
-	lib/bio \
-	lib/cbuf \
-	lib/watchdog \
-	dev/cache/pl310 \
-	dev/interrupt/arm_gic \
-	dev/timer/arm_cortex_a9
-
-MODULE_SRCS += \
-	$(LOCAL_DIR)/clocks.c \
-	$(LOCAL_DIR)/debug.c \
-	$(LOCAL_DIR)/fpga.c \
-	$(LOCAL_DIR)/gpio.c \
-	$(LOCAL_DIR)/platform.c \
-	$(LOCAL_DIR)/qspi.c \
-	$(LOCAL_DIR)/spiflash.c \
-	$(LOCAL_DIR)/start.S \
-	$(LOCAL_DIR)/swdt.c \
-	$(LOCAL_DIR)/uart.c \
-
-# default to no sdram unless the target calls it out
-ZYNQ_SDRAM_SIZE ?= 0
-
-# default to having the gem ethernet controller
-ZYNQ_WITH_GEM_ETH ?= 1
-
-ifeq ($(ZYNQ_WITH_GEM_ETH),1)
-MODULE_SRCS += \
-	$(LOCAL_DIR)/gem.c \
-
-GLOBAL_DEFINES += \
-	ZYNQ_WITH_GEM_ETH=1 \
-	ARM_ARCH_WAIT_FOR_SECONDARIES=1
-
-# gem driver depends on minip interface
-MODULE_DEPS += \
-	lib/minip
-endif
-
-ifeq ($(ZYNQ_USE_SRAM),1)
-MEMBASE := 0x0
-MEMSIZE := 0x40000 # 4 * 64K
-
-GLOBAL_DEFINES += \
-	ZYNQ_CODE_IN_SRAM=1
-
-ifneq ($(ZYNQ_SDRAM_SIZE),0)
-GLOBAL_DEFINES += \
-	ZYNQ_SDRAM_INIT=1
-endif
-
-else
-MEMBASE := 0x00000000
-MEMSIZE ?= $(ZYNQ_SDRAM_SIZE) # 256MB
-KERNEL_LOAD_OFFSET := 0x00100000 # loaded 1MB into physical space
-
-# set a #define so system code can decide if it needs to reinitialize dram or not
-GLOBAL_DEFINES += \
-	ZYNQ_CODE_IN_SDRAM=1
-endif
-
-# put our kernel at 0xc0000000 so we can have axi bus 1 mapped at 0x80000000
-KERNEL_BASE = 0xc0000000
-
-GLOBAL_DEFINES += \
-	SDRAM_SIZE=$(ZYNQ_SDRAM_SIZE)
-
-LINKER_SCRIPT += \
-	$(BUILDDIR)/system-onesegment.ld
-
-# python script to generate the zynq's bootrom bootheader
-BOOTHEADERBIN := $(BUILDDIR)/BOOT.BIN
-MKBOOTHEADER := $(LOCAL_DIR)/mkbootheader.py
-EXTRA_BUILDDEPS += $(BOOTHEADERBIN)
-GENERATED += $(BOOTHEADERBIN)
-
-$(BOOTHEADERBIN): $(OUTBIN) $(MKBOOTHEADER)
-	@$(MKDIR)
-	$(NOECHO)echo generating $@; \
-	$(MKBOOTHEADER) $(OUTBIN) $@
-
-include make/module.mk
diff --git a/platform/zynq/spiflash.c b/platform/zynq/spiflash.c
deleted file mode 100644
index ffcec663..00000000
--- a/platform/zynq/spiflash.c
+++ /dev/null
@@ -1,580 +0,0 @@
-/*
- * Copyright (c) 2014 Brian Swetland
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <assert.h>
-#include <trace.h>
-#include <compiler.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <err.h>
-#include <string.h>
-#include <rand.h>
-#include <reg.h>
-#include <pow2.h>
-
-#include <lib/bio.h>
-#include <lib/console.h>
-#include <dev/qspi.h>
-#include <kernel/thread.h>
-
-#include <platform/zynq.h>
-
-#define LOCAL_TRACE 0
-
-// parameters specifically for the 16MB spansion S25FL128S flash
-#define PARAMETER_AREA_SIZE (128*1024)
-#define PAGE_PROGRAM_SIZE (256)     // can be something else based on the part
-#define PAGE_ERASE_SLEEP_TIME (150) // amount of time before waiting to check if erase completed
-#define SECTOR_ERASE_SIZE (4096)
-#define LARGE_SECTOR_ERASE_SIZE (64*1024)
-
-#define STS_PROGRAM_ERR (1<<6)
-#define STS_ERASE_ERR (1<<5)
-#define STS_BUSY (1<<0)
-
-#define MAX_GEOMETRY_COUNT (2)
-
-struct spi_flash {
-    bool detected;
-
-    struct qspi_ctxt qspi;
-    bdev_t bdev;
-    bio_erase_geometry_info_t geometry[MAX_GEOMETRY_COUNT];
-
-    off_t size;
-};
-
-static struct spi_flash flash;
-
-static ssize_t spiflash_bdev_read(struct bdev *, void *buf, off_t offset, size_t len);
-static ssize_t spiflash_bdev_read_block(struct bdev *, void *buf, bnum_t block, uint count);
-static ssize_t spiflash_bdev_write_block(struct bdev *, const void *buf, bnum_t block, uint count);
-static ssize_t spiflash_bdev_erase(struct bdev *, off_t offset, size_t len);
-static int spiflash_ioctl(struct bdev *, int request, void *argp);
-
-// adjust 24 bit address to be correct-byte-order for 32bit qspi commands
-static uint32_t qspi_fix_addr(uint32_t addr)
-{
-    DEBUG_ASSERT((addr & ~(0x00ffffff)) == 0); // only dealing with 24bit addresses
-
-    return ((addr & 0xff) << 24) | ((addr&0xff00) << 8) | ((addr>>8) & 0xff00);
-}
-
-static void qspi_rd32(struct qspi_ctxt *qspi, uint32_t addr, uint32_t *data, uint32_t count)
-{
-    qspi_rd(qspi, qspi_fix_addr(addr) | 0x6B, 4, data, count);
-}
-
-static inline void qspi_wren(struct qspi_ctxt *qspi)
-{
-    qspi_wr1(qspi, 0x06);
-}
-
-static inline void qspi_clsr(struct qspi_ctxt *qspi)
-{
-    qspi_wr1(qspi, 0x30);
-}
-
-static inline uint32_t qspi_rd_cr1(struct qspi_ctxt *qspi)
-{
-    return qspi_rd1(qspi, 0x35) >> 24;
-}
-
-static inline uint32_t qspi_rd_status(struct qspi_ctxt *qspi)
-{
-    return qspi_rd1(qspi, 0x05) >> 24;
-}
-
-static inline void qspi_wr_status_cr1(struct qspi_ctxt *qspi, uint8_t status, uint8_t cr1)
-{
-    uint32_t cmd = (cr1 << 16) | (status << 8) | 0x01;
-
-    qspi_wren(qspi);
-    qspi_wr3(qspi, cmd);
-}
-
-static ssize_t qspi_erase_sector(struct qspi_ctxt *qspi, uint32_t addr)
-{
-    uint32_t cmd;
-    uint32_t status;
-    ssize_t toerase;
-
-    LTRACEF("addr 0x%x\n", addr);
-
-    DEBUG_ASSERT(qspi);
-
-    if (addr < PARAMETER_AREA_SIZE) {
-        // erase a small parameter sector (4K)
-        DEBUG_ASSERT(IS_ALIGNED(addr, SECTOR_ERASE_SIZE));
-        if (!IS_ALIGNED(addr, SECTOR_ERASE_SIZE))
-            return ERR_INVALID_ARGS;
-
-        cmd = 0x20;
-        toerase = SECTOR_ERASE_SIZE;
-    } else {
-        // erase a large sector (64k or 256k)
-        DEBUG_ASSERT(IS_ALIGNED(addr, LARGE_SECTOR_ERASE_SIZE));
-        if (!IS_ALIGNED(addr, LARGE_SECTOR_ERASE_SIZE))
-            return ERR_INVALID_ARGS;
-
-        cmd = 0xd8;
-        toerase = LARGE_SECTOR_ERASE_SIZE;
-    }
-
-    qspi_wren(qspi);
-    qspi_wr(qspi, qspi_fix_addr(addr) | cmd, 3, 0, 0);
-
-    thread_sleep(PAGE_ERASE_SLEEP_TIME);
-    while ((status = qspi_rd_status(qspi)) & STS_BUSY)
-        ;
-
-    LTRACEF("status 0x%x\n", status);
-    if (status & (STS_PROGRAM_ERR | STS_ERASE_ERR)) {
-        TRACEF("failed @ 0x%x\n", addr);
-        qspi_clsr(qspi);
-        return ERR_IO;
-    }
-
-    return toerase;
-}
-
-static ssize_t qspi_write_page(struct qspi_ctxt *qspi, uint32_t addr, const uint8_t *data)
-{
-    uint32_t oldkhz, status;
-
-    LTRACEF("addr 0x%x, data %p\n", addr, data);
-
-    DEBUG_ASSERT(qspi);
-    DEBUG_ASSERT(data);
-    DEBUG_ASSERT(IS_ALIGNED(addr, PAGE_PROGRAM_SIZE));
-
-    if (!IS_ALIGNED(addr, PAGE_PROGRAM_SIZE))
-        return ERR_INVALID_ARGS;
-
-    oldkhz = qspi->khz;
-    if (qspi_set_speed(qspi, 80000))
-        return ERR_IO;
-
-    qspi_wren(qspi);
-    qspi_wr(qspi, qspi_fix_addr(addr) | 0x32, 3, (uint32_t *)data, PAGE_PROGRAM_SIZE / 4);
-    qspi_set_speed(qspi, oldkhz);
-
-    while ((status = qspi_rd_status(qspi)) & STS_BUSY) ;
-
-    if (status & (STS_PROGRAM_ERR | STS_ERASE_ERR)) {
-        printf("qspi_write_page failed @ %x\n", addr);
-        qspi_clsr(qspi);
-        return ERR_IO;
-    }
-    return PAGE_PROGRAM_SIZE;
-}
-
-static ssize_t spiflash_read_cfi(void *buf, size_t len)
-{
-    DEBUG_ASSERT(len > 0 && (len % 4) == 0);
-
-    qspi_rd(&flash.qspi, 0x9f, 0, buf, len / 4);
-
-    if (len < 4)
-        return len;
-
-    /* look at byte 3 of the cfi, which says the total length of the cfi structure */
-    size_t cfi_len = ((uint8_t *)buf)[3];
-    if (cfi_len == 0)
-        cfi_len = 512;
-    else
-        cfi_len += 3;
-
-    return MIN(len, cfi_len);
-}
-
-static ssize_t spiflash_read_otp(void *buf, uint32_t addr, size_t len)
-{
-    DEBUG_ASSERT(len > 0 && (len % 4) == 0);
-
-    if (len > 1024)
-        len = 1024;
-
-    qspi_rd(&flash.qspi, 0x4b, 4, buf, len / 4);
-
-    if (len < 4)
-        return len;
-
-    return len;
-}
-
-status_t spiflash_detect(void)
-{
-    if (flash.detected)
-        return NO_ERROR;
-
-    qspi_init(&flash.qspi, 100000);
-
-    /* read and parse the cfi */
-    uint8_t *buf = calloc(1, 512);
-    ssize_t len = spiflash_read_cfi(buf, 512);
-    if (len < 4)
-        goto nodetect;
-
-    LTRACEF("looking at vendor/device id combination: %02x:%02x:%02x\n", buf[0], buf[1], buf[2]);
-
-    /* at the moment, we only support particular spansion flashes */
-    if (buf[0] != 0x01) goto nodetect;
-
-    if (buf[1] == 0x20 && buf[2] == 0x18) {
-        /* 128Mb version */
-        flash.size = 16*1024*1024;
-    } else if (buf[1] == 0x02 && buf[2] == 0x19) {
-        /* 256Mb version */
-        flash.size = 32*1024*1024;
-    } else {
-        TRACEF("unknown vendor/device id combination: %02x:%02x:%02x\n",
-               buf[0], buf[1], buf[2]);
-        goto nodetect;
-    }
-
-    /* Fill out our geometry info based on the CFI */
-    size_t region_count = buf[0x2C];
-    if (region_count > countof(flash.geometry)) {
-        TRACEF("erase region count (%zu) exceeds max allowed (%zu)\n",
-               region_count, countof(flash.geometry));
-        goto nodetect;
-    }
-
-    size_t offset = 0;
-    for (size_t i = 0; i < region_count; i++) {
-        const uint8_t *info = buf + 0x2D + (i << 2);
-        size_t pages      = ((((size_t)info[1]) << 8) | info[0]) + 1;
-        size_t erase_size = ((((size_t)info[3]) << 8) | info[2]) << 8;
-
-        if (!ispow2(erase_size)) {
-            TRACEF("Region %zu page size (%zu) is not a power of 2\n",
-                   i, erase_size);
-            goto nodetect;
-        }
-
-        flash.geometry[i].erase_size  = erase_size;
-        flash.geometry[i].erase_shift = log2_uint(erase_size);
-        flash.geometry[i].start       = offset;
-        flash.geometry[i].size        = pages << flash.geometry[i].erase_shift;
-
-        size_t erase_mask = ((size_t)0x1 << flash.geometry[i].erase_shift) - 1;
-        if (offset & erase_mask) {
-            TRACEF("Region %zu not aligned to erase boundary (start %zu, erase size %zu)\n",
-                   i, offset, erase_size);
-            goto nodetect;
-        }
-
-        offset += flash.geometry[i].size;
-    }
-
-    free(buf);
-
-    /* read the 16 byte random number out of the OTP area and add to the rand entropy pool */
-    uint32_t r[4];
-    memset(r, 0, sizeof(r));
-    spiflash_read_otp(r, 0, 16);
-
-    LTRACEF("OTP random %08x%08x%08x%08x\n", r[0], r[1], r[2], r[3]);
-    rand_add_entropy(r, sizeof(r));
-
-    flash.detected = true;
-
-    /* see if we're in serial mode */
-    uint32_t cr1 = qspi_rd_cr1(&flash.qspi);
-    if ((cr1 & (1<<1)) == 0) {
-        printf("spiflash: device not in quad mode, cannot use for read/write\n");
-        goto nouse;
-    }
-
-    /* construct the block device */
-    bio_initialize_bdev(&flash.bdev, "spi0",
-                        PAGE_PROGRAM_SIZE, flash.size / PAGE_PROGRAM_SIZE,
-                        region_count, flash.geometry, BIO_FLAGS_NONE);
-
-    /* override our block device hooks */
-    flash.bdev.read = &spiflash_bdev_read;
-    flash.bdev.read_block = &spiflash_bdev_read_block;
-    // flash.bdev.write has a default hook that will be okay
-    flash.bdev.write_block = &spiflash_bdev_write_block;
-    flash.bdev.erase = &spiflash_bdev_erase;
-    flash.bdev.ioctl = &spiflash_ioctl;
-
-    /* we erase to 0xff */
-    flash.bdev.erase_byte = 0xff;
-
-    bio_register_device(&flash.bdev);
-
-    LTRACEF("found flash of size 0x%llx\n", flash.size);
-
-nouse:
-    return NO_ERROR;
-
-nodetect:
-    LTRACEF("flash not found\n");
-
-    free(buf);
-    flash.detected = false;
-    return ERR_NOT_FOUND;
-}
-
-// bio layer hooks
-static ssize_t spiflash_bdev_read(struct bdev *bdev, void *buf, off_t offset, size_t len)
-{
-    LTRACEF("dev %p, buf %p, offset 0x%llx, len 0x%zx\n", bdev, buf, offset, len);
-
-    DEBUG_ASSERT(flash.detected);
-
-    len = bio_trim_range(bdev, offset, len);
-    if (len == 0)
-        return 0;
-
-    // XXX handle not multiple of 4
-    qspi_rd32(&flash.qspi, offset, buf, len / 4);
-
-    return len;
-}
-
-static ssize_t spiflash_bdev_read_block(struct bdev *bdev, void *buf, bnum_t block, uint count)
-{
-    LTRACEF("dev %p, buf %p, block 0x%x, count %u\n", bdev, buf, block, count);
-
-    count = bio_trim_block_range(bdev, block, count);
-    if (count == 0)
-        return 0;
-
-    return spiflash_bdev_read(bdev, buf, block << bdev->block_shift, count << bdev->block_shift);
-}
-
-static ssize_t spiflash_bdev_write_block(struct bdev *bdev, const void *_buf, bnum_t block, uint count)
-{
-    LTRACEF("dev %p, buf %p, block 0x%x, count %u\n", bdev, _buf, block, count);
-
-    DEBUG_ASSERT(bdev->block_size == PAGE_PROGRAM_SIZE);
-
-    count = bio_trim_block_range(bdev, block, count);
-    if (count == 0)
-        return 0;
-
-    const uint8_t *buf = _buf;
-
-    ssize_t written = 0;
-    while (count > 0) {
-        ssize_t err = qspi_write_page(&flash.qspi, block * PAGE_PROGRAM_SIZE, buf);
-        if (err < 0)
-            return err;
-
-        buf += PAGE_PROGRAM_SIZE;
-        written += err;
-        block++;
-        count--;
-    }
-
-    return written;
-}
-
-static ssize_t spiflash_bdev_erase(struct bdev *bdev, off_t offset, size_t len)
-{
-    LTRACEF("dev %p, offset 0x%llx, len 0x%zx\n", bdev, offset, len);
-
-    len = bio_trim_range(bdev, offset, len);
-    if (len == 0)
-        return 0;
-
-    ssize_t erased = 0;
-    while (erased < (ssize_t)len) {
-        ssize_t err = qspi_erase_sector(&flash.qspi, offset);
-        if (err < 0)
-            return err;
-
-        erased += err;
-        offset += err;
-    }
-
-    return erased;
-}
-
-static int spiflash_ioctl(struct bdev *bdev, int request, void *argp)
-{
-    LTRACEF("dev %p, request %d, argp %p\n", bdev, request, argp);
-
-    int ret = NO_ERROR;
-    switch (request) {
-        case BIO_IOCTL_GET_MEM_MAP:
-            /* put the device into linear mode */
-            ret = qspi_enable_linear(&flash.qspi);
-            // Fallthrough.
-        case BIO_IOCTL_GET_MAP_ADDR:
-            if (argp)
-                *(void **)argp = (void *)QSPI_LINEAR_BASE;
-            break;
-        case BIO_IOCTL_PUT_MEM_MAP:
-            /* put the device back into regular mode */
-            ret = qspi_disable_linear(&flash.qspi);
-            break;
-        default:
-            ret = ERR_NOT_SUPPORTED;
-    }
-
-    return ret;
-}
-
-// debug tests
-int cmd_spiflash(int argc, const cmd_args *argv)
-{
-    if (argc < 2) {
-notenoughargs:
-        printf("not enough arguments\n");
-usage:
-        printf("usage:\n");
-#if LK_DEBUGLEVEL > 1
-        printf("\t%s detect\n", argv[0].str);
-        printf("\t%s cfi\n", argv[0].str);
-        printf("\t%s cr1\n", argv[0].str);
-        printf("\t%s otp\n", argv[0].str);
-        printf("\t%s linear [true/false]\n", argv[0].str);
-        printf("\t%s read <offset> <length>\n", argv[0].str);
-        printf("\t%s write <offset> <length> <address>\n", argv[0].str);
-        printf("\t%s erase <offset>\n", argv[0].str);
-#endif
-        printf("\t%s setquad (dangerous)\n", argv[0].str);
-        return ERR_INVALID_ARGS;
-    }
-
-#if LK_DEBUGLEVEL > 1
-    if (!strcmp(argv[1].str, "detect")) {
-        spiflash_detect();
-    } else if (!strcmp(argv[1].str, "cr1")) {
-        if (!flash.detected) {
-            printf("flash not detected\n");
-            return -1;
-        }
-
-        uint32_t cr1 = qspi_rd_cr1(&flash.qspi);
-        printf("cr1 0x%x\n", cr1);
-    } else if (!strcmp(argv[1].str, "cfi")) {
-        if (!flash.detected) {
-            printf("flash not detected\n");
-            return -1;
-        }
-
-        uint8_t *buf = calloc(1, 512);
-        ssize_t len = spiflash_read_cfi(buf, 512);
-        printf("returned cfi len %ld\n", len);
-
-        hexdump8(buf, len);
-
-        free(buf);
-    } else if (!strcmp(argv[1].str, "otp")) {
-        if (!flash.detected) {
-            printf("flash not detected\n");
-            return -1;
-        }
-
-        uint8_t *buf = calloc(1, 1024);
-        ssize_t len = spiflash_read_otp(buf, 0, 1024);
-        printf("spiflash_read_otp returns %ld\n", len);
-
-        hexdump8(buf, len);
-
-        free(buf);
-    } else if (!strcmp(argv[1].str, "linear")) {
-        if (argc < 3) goto notenoughargs;
-        if (!flash.detected) {
-            printf("flash not detected\n");
-            return -1;
-        }
-
-        if (argv[2].b)
-            qspi_enable_linear(&flash.qspi);
-        else
-            qspi_disable_linear(&flash.qspi);
-    } else if (!strcmp(argv[1].str, "read")) {
-        if (argc < 4) goto notenoughargs;
-        if (!flash.detected) {
-            printf("flash not detected\n");
-            return -1;
-        }
-
-        uint8_t *buf = calloc(1, argv[3].u);
-
-        qspi_rd32(&flash.qspi, argv[2].u, (uint32_t *)buf, argv[3].u / 4);
-
-        hexdump8(buf, argv[3].u);
-        free(buf);
-    } else if (!strcmp(argv[1].str, "write")) {
-        if (argc < 5) goto notenoughargs;
-        if (!flash.detected) {
-            printf("flash not detected\n");
-            return -1;
-        }
-
-        status_t err = qspi_write_page(&flash.qspi, argv[2].u, argv[4].p);
-        printf("write_page returns %d\n", err);
-    } else if (!strcmp(argv[1].str, "erase")) {
-        if (argc < 3) goto notenoughargs;
-        if (!flash.detected) {
-            printf("flash not detected\n");
-            return -1;
-        }
-
-        status_t err = qspi_erase_sector(&flash.qspi, argv[2].u);
-        printf("erase returns %d\n", err);
-    } else
-#endif
-        if (!strcmp(argv[1].str, "setquad")) {
-            if (!flash.detected) {
-                printf("flash not detected\n");
-                return -1;
-            }
-
-            uint32_t cr1 = qspi_rd_cr1(&flash.qspi);
-            printf("cr1 before 0x%x\n", cr1);
-
-            if (cr1 & (1<<1)) {
-                printf("flash already in quad mode\n");
-                return 0;
-            }
-
-            qspi_wr_status_cr1(&flash.qspi, 0, cr1 | (1<<1));
-
-            thread_sleep(500);
-            cr1 = qspi_rd_cr1(&flash.qspi);
-            printf("cr1 after 0x%x\n", cr1);
-        } else {
-            printf("unknown command\n");
-            goto usage;
-        }
-
-    return 0;
-}
-
-#if defined(WITH_LIB_CONSOLE)
-#include <lib/console.h>
-
-STATIC_COMMAND_START
-STATIC_COMMAND("spiflash", "spi flash manipulation utilities", cmd_spiflash)
-STATIC_COMMAND_END(qspi);
-
-#endif
diff --git a/platform/zynq/start.S b/platform/zynq/start.S
deleted file mode 100644
index c97c5241..00000000
--- a/platform/zynq/start.S
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * Copyright (c) 2014-2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <asm.h>
-#include <platform/zynq.h>
-
-/* code run at the very beginning of the system, attempting to trap the 2nd cpu */
-FUNCTION(platform_reset)
-    /* figure out our cpu number */
-    mrc     p15, 0, r12, c0, c0, 5 /* MPIDR */
-
-    /* mask off the bottom 8 bits to test cpu number */
-    ubfx    r12, r12, #0, #8
-
-    /* if we're the 0th cpu, continue to arm_reset */
-    teq     r12, #0
-    beq     arm_reset
-
-    /* bump the cpu counter */
-    adr     r12, __cpu_trapped
-    mov     r11, #1
-    str     r11, [r12]
-    dsb
-
-#if !WITH_SMP
-0:
-    /* stay trapped here forever */
-    wfe
-    b       0b
-#else
-    /* pass on through the reset vector, where the arm arch code will trap the cpu */
-    b       arm_reset
-#endif
-
-DATA(__cpu_trapped)
-    .word     0
-
-#if 0
-/* disabled for now */
-
-/* this code attempts to remap sram to 0xfffc0000 - 0xffffffff and
-   branch the cpu into the equivalent spot. Assumes the cpu is running
-   at the initial 0 based mapping */
-
-/* a spot of the top bank of OCM memory for us to run our code from
-   needs to be below where the second cpu is running (0xffffe00-0xfffffff0) */
-#define TARGET_SPOT 0xfffff800
-
-/* first piece of code run out of the reset vector. use
-   to relocate sram to the final location at 0xfffc0000
-   and switch to there */
-FUNCTION(platform_reset)
-    /* relocate the below code to TARGET_SPOT */
-    ldr     r8, =TARGET_SPOT
-    adr     r9, .Lcore_reloc_start
-    adr     r10, .Lcore_reloc_end
-
-0:
-    ldr     r12, [r9], #4
-    str     r12, [r8], #4
-    cmp     r9, r10
-    bne     0b
-
-    /* load constants we will need below */
-    ldr     r8, =SLCR_BASE
-    ldr     r9, =SCU_CONTROL_BASE
-
-    /* calculate the new return address this code will need to branch to */
-    adr     r12, .Ldone
-    add     r12, #0xfffc0000
-
-    ldr     r10, =TARGET_SPOT
-    bx      r10
-
-.Ldone:
-    b       arm_reset
-
-.Lcore_reloc_start:
-    # use SCLR to map the sram blocks to the top of their segment
-    movw    r10, #SLCR_UNLOCK_KEY
-    str     r10, [r8, #SLCR_UNLOCK]
-
-    ldr     r10, [r8, #OCM_CFG]
-    orr     r10, #0xf
-    str     r10, [r8, #OCM_CFG]
-
-    movw    r10, #SLCR_LOCK_KEY
-    str     r10, [r8, #SLCR_LOCK]
-
-    # tell the SCU to not filter first 1MB
-    mov     r10, #0
-    str     r10, [r9, #0x40] /* SCU filter start address */
-    dmb
-
-    bx      r12
-.Lcore_reloc_end:
-
-.ltorg
-#endif
-
-
diff --git a/platform/zynq/swdt.c b/platform/zynq/swdt.c
deleted file mode 100644
index 830c13f8..00000000
--- a/platform/zynq/swdt.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
- * Copyright (c) 2015 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <err.h>
-#include <debug.h>
-#include <trace.h>
-#include <stdio.h>
-#include <string.h>
-#include <lib/watchdog.h>
-#include <platform.h>
-#include <platform/zynq.h>
-
-/* Driver for the system wide watchdog timer for Zynq */
-
-#define LOCAL_TRACE 0
-
-/* three magic values for the MODE, CONTROL, and RESTART registers */
-#define SWDT_MODE_ZKEY      (0xabc << 12)
-#define SWDT_CONTROL_CKEY   (0x248 << 14)
-#define SWDT_RESTART_RSTKEY (0x1999)
-
-/* reserved field in the MODE register */
-#define SWDT_MODE_RESERVED  (0x4 << 4)
-
-/* routines called from lib/watchdog */
-status_t platform_watchdog_init(lk_time_t  target_timeout,
-                                lk_time_t *recommended_pet_period)
-{
-    LTRACEF("target_timeout %u\n", (uint32_t)target_timeout);
-
-    /* make sure the swdt is stopped */
-    SWDT->MODE = SWDT_MODE_ZKEY | SWDT_MODE_RESERVED;
-
-    /* make sure swdt has the proper clock */
-    SLCR->WDT_CLK_SEL = 0; // cpu 1x
-
-    uint32_t swdt_clock = zynq_get_swdt_freq();
-
-    /* assuming a prescalar of / 4096, figure out the restart value */
-    uint32_t restart = ((swdt_clock / 4096) * target_timeout) / 1000;
-
-    /* make sure the restart value is <= 24 bits */
-    if (restart > 0x00ffffff)
-        restart = 0x00ffffff;
-
-    LTRACEF("restart value %u\n", restart);
-
-    /* the bottom 12 bits of restart are set to 0xfff by hardware */
-    restart |= 0xfff;
-
-    /* pet period is / 2 the computed restart value */
-    if (recommended_pet_period)
-        *recommended_pet_period = ((restart * 1000) / (swdt_clock / 4096)) / 2;
-
-    LTRACEF("recommended pet period %u\n", (uint32_t)*recommended_pet_period);
-
-    /* set up the swdt */
-
-    /* load counter restart (top 12 bits of restart count), pclk / 4096 */
-    SWDT->CONTROL = SWDT_CONTROL_CKEY | ((restart >> 12) << 2) | 3;
-
-    /* zero it out */
-    SWDT->RESTART = SWDT_RESTART_RSTKEY;
-
-    DMB;
-
-    return NO_ERROR;
-}
-
-void platform_watchdog_set_enabled(bool enabled)
-{
-    LTRACEF("enabled %u\n", enabled);
-
-    if (enabled) {
-        /* wide irq length, reset enable on counter zero, enable */
-        SWDT->MODE = SWDT_MODE_ZKEY | SWDT_MODE_RESERVED | (3 << 7) | (1<<1) | 1;
-
-        /* start it by petting it once, in case it already latched */
-        SWDT->RESTART = SWDT_RESTART_RSTKEY;
-    } else {
-        /* disable everything */
-        SWDT->MODE = SWDT_MODE_ZKEY | SWDT_MODE_RESERVED;
-    }
-    DMB;
-}
-
-void platform_watchdog_pet(void)
-{
-    //LTRACEF("pet\n");
-    SWDT->RESTART = SWDT_RESTART_RSTKEY;
-    DMB;
-}
-
diff --git a/platform/zynq/timer.c b/platform/zynq/timer.c
deleted file mode 100644
index 17c1359f..00000000
--- a/platform/zynq/timer.c
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <sys/types.h>
-#include <err.h>
-#include <stdio.h>
-#include <assert.h>
-#include <trace.h>
-#include <kernel/thread.h>
-#include <platform.h>
-#include <platform/interrupts.h>
-#include <platform/timer.h>
-#include <platform/zynq.h>
-#include "platform_p.h"
-
-/* unused, arm_cortex_a9_timer does timer duty */
-
-#if 0
-/* driver for Cadence triple timer counter (TTC) */
-
-#define LOCAL_TRACE 0
-
-#define TIMREG(reg)   (*REG32(TTC0_BASE + (reg)))
-#define TIMREG16(reg) (*REG16(TTC0_BASE + (reg)))
-#define TIMREG8(reg)  (*REG8(TTC0_BASE + (reg)))
-
-#define CLK_CTRL(n)     (0x00 + (n) * 4)
-#define CNT_CTRL(n)     (0x0c + (n) * 4)
-#define CNT_VAL(n)      (0x18 + (n) * 4)
-#define INTERVAL_VAL(n) (0x24 + (n) * 4)
-#define MATCH_1(n)      (0x30 + (n) * 4)
-#define MATCH_2(n)      (0x3c + (n) * 4)
-#define MATCH_3(n)      (0x48 + (n) * 4)
-#define ISR(n)          (0x54 + (n) * 4)
-#define IEN(n)          (0x60 + (n) * 4)
-#define EVT_CTRL(n)     (0x6c + (n) * 4)
-#define EVT(n)          (0x78 + (n) * 4)
-
-static platform_timer_callback t_callback;
-
-static volatile uint ticks = 0;
-static lk_time_t periodic_interval;
-
-status_t platform_set_periodic_timer(platform_timer_callback callback, void *arg, lk_time_t interval)
-{
-    enter_critical_section();
-
-    LTRACEF("callback %p, arg %p, interval %lu\n", callback, arg, interval);
-
-    t_callback = callback;
-
-    periodic_interval = interval;
-
-    uint32_t ticks = periodic_interval * 1000; /* timer is running close to 1Mhz */
-    ASSERT(ticks <= 0xffff);
-
-    TIMREG(IEN(0)) = (1<<0); // interval interrupt
-    TIMREG(INTERVAL_VAL(0)) = ticks;
-    TIMREG(CNT_CTRL(0)) = (1<<5) | (1<<4) | (1<<1); // no wave, reset, interval mode
-
-    unmask_interrupt(TTC0_A_INT);
-
-    exit_critical_section();
-
-    return NO_ERROR;
-}
-
-lk_bigtime_t current_time_hires(void)
-{
-    lk_bigtime_t time;
-
-    time = ticks * periodic_interval * 1000ULL;
-
-    return time;
-}
-
-lk_time_t current_time(void)
-{
-    lk_time_t time;
-
-    time = ticks * periodic_interval;
-
-    return time;
-}
-
-static enum handler_return platform_tick(void *arg)
-{
-    ticks++;
-
-    volatile uint32_t hole = TIMREG(ISR(0)); // ack the irq
-
-    if (t_callback) {
-        return t_callback(arg, current_time());
-    } else {
-        return INT_NO_RESCHEDULE;
-    }
-}
-
-void platform_init_timer(void)
-{
-    /* disable timers */
-    TIMREG(CNT_CTRL(0)) = 0x1;
-    TIMREG(CNT_CTRL(1)) = 0x1;
-    TIMREG(CNT_CTRL(2)) = 0x1;
-
-    TIMREG(CLK_CTRL(0)) = (6 << 1) | 1; // prescale 133Mhz/(2^7) == 1039062Hz (close to 1Mhz)
-
-    register_int_handler(TTC0_A_INT, &platform_tick, NULL);
-    register_int_handler(TTC0_B_INT, &platform_tick, NULL);
-    register_int_handler(TTC0_C_INT, &platform_tick, NULL);
-}
-#endif
diff --git a/platform/zynq/uart.c b/platform/zynq/uart.c
deleted file mode 100644
index 531c051e..00000000
--- a/platform/zynq/uart.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/*
- * Copyright (c) 2014 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <reg.h>
-#include <stdio.h>
-#include <trace.h>
-#include <assert.h>
-#include <lib/cbuf.h>
-#include <kernel/thread.h>
-#include <platform/interrupts.h>
-#include <platform/debug.h>
-#include <platform/zynq.h>
-
-#define RXBUF_SIZE 16
-
-static cbuf_t uart_rx_buf[NUM_UARTS];
-
-static inline uintptr_t uart_to_ptr(unsigned int n) { return (n == 0) ? UART0_BASE : UART1_BASE; }
-static inline uint uart_to_irq(unsigned int n) { return (n == 0) ? UART0_INT : UART1_INT; }
-
-#define UART_REG(base, reg)  (*REG32((base)  + (reg)))
-
-static enum handler_return uart_irq(void *arg)
-{
-    bool resched = false;
-    uint port = (uint)arg;
-    uintptr_t base = uart_to_ptr(port);
-
-    /* read interrupt status and mask */
-    uint32_t isr = UART_REG(base, UART_ISR);
-    isr &= UART_REG(base, UART_IMR);
-
-    if (isr & (1<<0)) { // rxtrig
-        UART_REG(base, UART_ISR) = (1<< 0);
-
-        while ((UART_REG(base, UART_SR) & (1<<1)) == 0) { // ~rempty
-            char c = UART_REG(base, UART_FIFO);
-            cbuf_write_char(&uart_rx_buf[port], c, false);
-
-            resched = true;
-        }
-    }
-
-    return resched ? INT_RESCHEDULE : INT_NO_RESCHEDULE;
-}
-
-void uart_init(void)
-{
-    for (uint i = 0; i < NUM_UARTS; i++) {
-        cbuf_initialize(&uart_rx_buf[i], RXBUF_SIZE);
-
-        uintptr_t base = uart_to_ptr(i);
-
-        // clear all irqs
-        UART_REG(base, UART_IDR) = 0xffffffff;
-
-        // set rx fifo trigger to 1
-        UART_REG(base, UART_RXWM) = 1;
-
-        // enable the receiver
-        // NOTE: must clear rxdis and set rxen in the same write
-        UART_REG(base, UART_CR) = (UART_REG(base, UART_CR) & ~(1<<3)) | (1 << 2);
-
-        // enable rx interrupt
-        UART_REG(base, UART_IER) = (1<<0); // rxtrig
-
-        // set up interrupt handler
-        register_int_handler(uart_to_irq(i), &uart_irq, (void *)i);
-        unmask_interrupt(uart_to_irq(i));
-    }
-}
-
-void uart_init_early(void)
-{
-    for (uint i = 0; i < NUM_UARTS; i++) {
-        uintptr_t base = uart_to_ptr(i);
-
-        UART_REG(base, UART_BAUD_DIV) = UART_BRD_DIV(6);
-        UART_REG(base, UART_BAUDGEN) = UART_BRG_DIV(0x3E);
-
-        // reset the tx/rx path
-        UART_REG(base, UART_CR) |= UART_CR_TXRES | UART_CR_RXRES;
-        while ((UART_REG(base, UART_CR) & (UART_CR_TXRES | UART_CR_RXRES)) != 0)
-            ;
-
-        // n81, clock select ref_clk
-        UART_REG(base, UART_MR) = UART_MR_PAR(0x4); // no parity
-
-        // no flow
-        UART_REG(base, UART_MODEMCR) = 0;
-
-        UART_REG(base, UART_CR) = UART_CR_TXEN;
-    }
-
-    /* Configuration for the serial console */
-    /*UART_REG(UART1_BASE, UART_CR) = 0x00000017;*/
-    /*UART_REG(UART1_BASE, UART_MR) = 0x00000020;*/
-}
-
-int uart_putc(int port, char c)
-{
-    DEBUG_ASSERT(port >= 0 && port < NUM_UARTS);
-
-    uintptr_t base = uart_to_ptr(port);
-
-    /* spin while fifo is full */
-    while (UART_REG(base, UART_SR) & (1<<4))
-        ;
-    UART_REG(base, UART_FIFO) = c;
-
-    return 1;
-}
-
-int uart_getc(int port, bool wait)
-{
-    DEBUG_ASSERT(port >= 0 && port < NUM_UARTS);
-
-    char c;
-    if (cbuf_read_char(&uart_rx_buf[port], &c, wait) == 1)
-        return c;
-
-    return -1;
-}
-
-void uart_flush_tx(int port)
-{
-    DEBUG_ASSERT(port >= 0 && port < NUM_UARTS);
-}
-
-void uart_flush_rx(int port)
-{
-    DEBUG_ASSERT(port >= 0 && port < NUM_UARTS);
-}
-
-void uart_init_port(int port, uint baud)
-{
-    DEBUG_ASSERT(port >= 0 && port < NUM_UARTS);
-
-    PANIC_UNIMPLEMENTED;
-}
-
author	Nick Bray <ncbray@google.com>	2018-08-23 14:19:10 -0700
committer	Nick Bray <ncbray@google.com>	2018-10-08 13:29:11 -0700
commit	8007cb550a559cb7e6aa347b8e0c30c30bcee1ee (patch)
tree	73b2592fac9a701b827ba967017982e7344026c4 /platform
parent	dbfc27fcd8d5fd5c8031ab27201c6b2165c773b8 (diff)
download	common-8007cb550a559cb7e6aa347b8e0c30c30bcee1ee.tar.gz